UTRON UT62L2568LS-70LLI, UT62L2568LS-70LI, UT62L2568LS-55LLI, UT62L2568LS-55LI, UT62L2568LC-70LLI Datasheet

UTRON	UT62L2568(I)
Preliminary Rev. 0.1	256K X 8 BIT LOW POWER CMOS SRAM

FEATURES

Fast access time :

55ns(max.) for Vcc=2.7V~3.6V 70ns(max.) for Vcc=2.5V~3.6V

CMOS Low operating power Operating : 40/25mA (Icc max.) Standby : TA=0 ~50

20 uA(max.) L -version

3 uA(max.) LL-version Single 2.5V~3.6V power supply Operating temperature:

Industrial : -40 ~85

All inputs and outputs TTL compatible Fully static operation

Three state outputs

Data retention voltage: 1.5V (min) Package : 32-pin 8mm x 20mm TSOP-

32-pin 8mm x 13.4mm STSOP

36-pin 6mm × 8mm TFBGA

GENERAL DESCRIPTION

The UT62L2568 is a 2,097,152-bit low power CMOS static random access memory organized as 262,144 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology.

The UT62L2568 is designed for very low power system applications. It is particularly well suited for battery back-up nonvolatile memory applications.

It operates from a wide range of 2.5V~ 3.6V supply voltage. Easy memory expansion is provided by

using two chip enable input ( CE1 ,CE2). And all inputs and three-state outputs are fully TTL compatible.

FUNCTIONAL BLOCK DIAGRAM

256K × 8

A0-A17 DECODER MEMORY ARRAY

Vcc

Vss

	I/O1-I/O8	I/O DATA	COLUMN I/O
		CIRCUIT

CE1
CE2								CONTROL
								CIRCUIT
	OE
	WE

UTRON TECHNOLOGY INC.

P80082

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: [phone] FAX: [phone]

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		UTRON							UT62L2568(I)
Preliminary Rev. 0.1							256K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
							A11	1		32	OE
A	A0	A1	CE2	A3	A6	A8	A9	2		31	A10
							A8	3		30	CE1
B	I/O5	A2	WE	A4	A7	I/O1	A13	4		29	I/O8
							WE	5		28	I/O7
C	I/O6		NC	A5		I/O2	CE2	6		27	I/O6
							A15	7		26	I/O5
									UT62L2568
D	Vss					Vcc	Vcc	8		25	I/O4
							A17	9		24	Vss
E	Vcc					Vss	A16	10		23	I/O3
							A14	11		22	I/O2
F	I/O7		NC	A17		I/O3	A12	12		21	I/O1
							A7	13		20	A0
G	I/O8		CE1	A16	A15	I/O4	A6	14		19	A1
		OE					A5	15		18	A2
H	A9	A10	A11	A12	A13	A14	A4	16		17	A3
									TSOP-1 / STSOP
	1	2	3	4	5	6

TFBGA

PIN DESCRIPTION

SYMBOL							DESCRIPTION
	A0 - A17						Address Inputs
I/O1 - I/O8							Data Inputs/Outputs
				,CE2			Chip Enable Inputs
	CE1
							Write Enable Input
		WE
							Output Enable Input
			OE
		VCC					Power Supply
		VSS					Ground
			NC				No Connection

UTRON TECHNOLOGY INC.

P80082

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: [phone] FAX: [phone]

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UTRON

UT62L2568(I)

Preliminary Rev. 0.1

256K X 8 BIT LOW POWER CMOS SRAM

TRUTH TABLE

MODE

CE1

CE2

OE

WE

I/O OPERATION

SUPPLY CURRENT

Standby

H

X

X

X

High - Z

ISB,ISB1 , ISB2

X

L

X

X

High -Z

ISB,ISB1 , ISB2

Output Disable

L

H

H

H

High - Z

ICC , Icc1 , Icc2

Read

L

H

L

H

DOUT

ICC, Icc1 , Icc2

Write

L

H

X

L

DIN

ICC, Icc1 , Icc2

Note: H = VIH, L=VIL, X = Don't care.

ABSOLUTE MAXIMUM RATINGS*

PARAMETER		SYMBOL	RATING	UNIT
Terminal Voltage with Respect to VSS		VTERM	-0.5 to Vcc+0.3V	V
Operating Temperature	Industrial	TA	-40 to 85
Storage Temperature		TSTG	-65 to 150
Power Dissipation		PD	1	W
DC Output Current		IOUT	50	mA
Soldering Temperature (under 10 secs)		Tsolder	260

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

DC ELECTRICAL CHARACTERISTICS (VCC = 2.5V~3.6V, TA = -40 to 85 )

PARAMETER

SYMBOL

TEST CONDITION

MIN.

TYP.

MAX.

UNIT

Power Voltage

Vcc

2.5

3.0

3.6

V

Input High Voltage

VIH

2.2

-

Vcc+0.3

V

Input Low Voltage

VIL

- 0.3

-

0.6

V

Input Leakage Current

ILI

VSS VIN VCC

- 1

-

1

µA

Output Leakage Current

ILO

VSS VI/O VCC, Output Disabled

- 1

-

1

µA

Output High Voltage

VOH

IOH= - 1mA

2.2

-

-

V

Output Low Voltage

VOL

IOL= 2.1mA

-

-

0.4

V

ICC

Cycle time=Min.100% duty,

55

-

25

40

mA

70

-

15

25

mA

CE1 =VIL, CE2 = VIH, II/O =0mA

Icc1

Cycle time = 1µs,100% duty,

-

4

5

mA

Operating Current

CE1 0.2V,CE2 VCC-0.2V, II/O=0mA,

other pins at 0.2V or Vcc-0.2V,

Cycle time =500ns,100% duty,

Icc2

-

8

10

mA

CE1 0.2V,CE2 VCC-0.2V, II/O=0mA,

other pins at 0.2V or Vcc-0.2V,

Standby Current (TTL)

ISB

-

0.3

0.5

mA

CE1 =VIH or CE2 = VIL

ISB1

CE1 VCC-0.2V or CE2 0.2V,

-L

-

-

20

µA

other pins at 0.2V or Vcc-0.2V,

-LL

-

-

3

µA

Standby Current (CMOS)

TA=0 ~50

-L

-

-

80

µA

ISB2

CE1 VCC-0.2V or CE2 0.2V,

other pins at 0.2V or Vcc-0.2V,

-LL

-

-

10

µA

TA= - 40 ~85

UTRON TECHNOLOGY INC.

P80082

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: [phone] FAX: [phone]

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UTRON	UT62L2568(I)
Preliminary Rev. 0.1	256K X 8 BIT LOW POWER CMOS SRAM

CAPACITANCE (TA=25 , f=1.0MHz)

PARAMETER	SYMBOL	MIN.	MAX	UNIT
Input Capacitance	CIN	-	6	pF
Input/Output Capacitance	CI/O	-	8	pF

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

Input Pulse Levels	0V to 3V
Input Rise and Fall Times	5ns
Input and Output Timing Reference Levels	1.5V
Output Load	CL = 30pF+1TTL, IOH= -1mA, IOL= 2.1mA

AC ELECTRICAL CHARACTERISTICS			( TA = - 40 to 85 )
(1) READ CYCLE
PARAMETER	SYMBOL		UT62L2568-55		UT62L2568-70		UNIT
			VCC = 2.7V~3.6V		VCC = 2.5V~3.6V
			MIN.	MAX.	MIN.	MAX.
Read Cycle Time	tRC		55	-	70	-	ns
Address Access Time	tAA		-	55	-	70	ns
Chip Enable Access Time	tACE1, tACE2		-	55	-	70	ns
Output Enable Access Time	tOE		-	30	-	35	ns
Chip Enable to Output in Low Z	tCLZ1*, tCLZ2*		10	-	10	-	ns
Output Enable to Output in Low Z	tOLZ*		5	-	5	-	ns
Chip Disable to Output in High Z	tCHZ1*, tCHZ2*		-	20	-	25	ns
Output Disable to Output in High Z	tOHZ*		-	20	-	25	ns
Output Hold from Address Change	tOH		10	-	10	-	ns
(2) WRITE CYCLE
PARAMETER	SYMBOL		UT62L2568-55		UT62L2568-70		UNIT
			VCC = 2.7V~3.6V		VCC = 2.5V~3.6V
			MIN.	MAX.	MIN.	MAX.
Write Cycle Time	tWC		55	-	70	-	ns
Address Valid to End of Write	tAW		50	-	60	-	ns
Chip Enable to End of Write	tCW1, tCW2		50	-	60	-	ns
Address Set-up Time	tAS		0	-	0	-	ns
Write Pulse Width	tWP		45	-	55	-	ns
Write Recovery Time	tWR		0	-	0	-	ns
Data to Write Time Overlap	tDW		25	-	30	-	ns
Data Hold from End of Write Time	tDH		0	-	0	-	ns
Output Active from End of Write	tOW*		5	-	5	-	ns
Write to Output in High Z	tWHZ*		-	30	-	30	ns

*These parameters are guaranteed by device characterization, but not production tested.

UTRON TECHNOLOGY INC.

P80082

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: [phone] FAX: [phone]

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