UTRON UT6264BPC-70L, UT6264BPC-70LL, UT6264BPC-70, UT6264BSC-70LL, UT6264BSC-70L Datasheet

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UTRON
UT6264B
Rev 1.0
8K X 8 BIT LOW POWER CMOS SRAM
____________________________________________________________________________________________
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC. P80039
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
FEATURES
Access time : 35/70ns (max.)
Low power consumption:
Operating : 60/40 mA (typical)
Standby :0.3 mA (typical) normal
2 µA (typical) L-version
1 µA (typical) LL-version
Single 5V power supply
All inputs and outputs TTL compatible
Fully static operation
Three state outputs
Data retention voltage : 2V (min.)
Package : 28-pin 600 mil PDIP
28-pin 330 mil SOP
FUNCTIONAL BLOCK DIAGRAM
COLUMN I/ O
COLUMN DECODER
ROW
DECODER
I/O
CONTROL
LOGI C
CONTROL
A4
I/O1
V
SS
V
CC
WE
OE
CE
I/O8
.
.
.
.
.
.
. .
.
A3
A
12
A7
A6
A5
A8
A
9
A2
A
1
A
0
A
10
.
.
.
.
.
.
MEMORY ARRAY
256 ROWS × 256 COLUMNS
A
11
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 – A12 Address Inputs
I/O1 – I/O8 Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
V
CC
Power Supply
V
SS
Ground
NC No Connection
GENERAL DESCRIPTION
The UT6264B is a 65,536-bit low power
CMOS static random access memory
organized as 8,192 words by 8 bits. It is
fabricated using high performance, high
reliability CMOS technology.
The UT6264B is designed for high-speed
and low power application. It is particularly
well suited for battery back-up nonvolatile
memory application.
The UT6264B operates from a single 5V
power supply and all inputs and outputs are
fully TTL compatible.
PIN CONFIGURATION
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
Vcc
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
Vss
UT6264B
PDIP / SOP
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
CE
WE
OE
NC
NC
UTRON
UT6264B
Rev 1.0
8K X 8 BIT LOW POWER CMOS SRAM
____________________________________________________________________________________________
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC. P80039
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
ABSOLUTE MAXIMUM RATINGS
*
PARAMETER SYMBOL RATING UNIT
Terminal Voltage with Respect to V
SS
V
TERM
-0.5 to +7.0 V
Operating Temperature T
A
0 to +70
Storage Temperature T
STG
-65 to +150
Power Dissipation P
D
1 W
DC Output Current I
OUT
50 mA
Soldering Temperature (under 10 sec) Tsolder 260
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended
period may affect device reliability.
TRUTH TABLE
MODE
CE
OE
WE
I/O OPERATION SUPPLY CURRENT
Standby H X X High - Z
I
SB,
I
SB1
Output Disable L H H High - Z
I
CC
Read L L H
D
OUT
I
CC
Write L X L
D
IN
I
CC
Note: H = V
IH
, L=V
IL
, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V
±
10%, T
A
= 0
to 70
)
PARAMETER
SYMBO
L
TEST CONDITION MIN. TYP. MAX. UNIT
Input High Voltage
V
IH
2.2 - V
CC
+0.5 V
Input Low Voltage V
IL
- 0.5 - 0.8 V
Input Leakage Current I
LI
V
SS
V
IN
V
CC
- 1 - 1
µ
A
Output Leakage Current I
LO
V
SS
V
I/O
V
CC
CE
=V
IH
or
OE
=V
IH
or
WE
=V
IL
- 1 - 1
µ
A
Output High Voltage V
OH
I
OH
= - 1mA 2.4 - - V
Output Low Voltage V
OL
I
OL
= 4mA - - 0.4 V
- 35 - 60 100 mA Operating Power
Supply Current
I
CC
Cycle time=Min,
CE
= V
IL ,
I
I/O
=
0mA,
- 70 - 40 70 mA
Normal - 1 10 mA I
SB
CE
= V
IH
- L/- LL - - 3 mA
Normal - 0.3 5 mA
- L - 2 100
µ
A
Standby Power
Supply Current
I
SB1
CE
V
CC
-0.2V
- LL - 1 50
µ
A
UTRON
UT6264B
Rev 1.0
8K X 8 BIT LOW POWER CMOS SRAM
_____________________________________________________________________________________________
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC. P80039
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
CAPACITANCE
(T
A
=25
, f=1.0MHz)
PARAMETER SYMBOL MIN. MAX UNIT
Input Capacitance
C
IN
-
8 pF
Input/Output Capacitance
C
I/O
-
10 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels 0V to 3.0V
Input Rise and Fall Times 5ns
Input and Output Timing Reference Levels 1.5V
Output Load C
L
= 100pF, I
OH
/I
OL
= -1mA/4mA
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V
±
10% , T
A
= 0
to 70
)
(1) READ CYCLE
PARAMETER
SYMBOL
UT6264B-35 UT6264B-70 UNIT
MIN. MAX. MIN. MAX.
Read Cycle Time
t
RC
35 - 70 - ns
Address Access Time
t
AA
- 35 - 70 ns
Chip Enable Access Time
t
ACE
- 35 - 70 ns
Output Enable Access Time
t
OE
- 25 - 35 ns
Chip Enable to Output in Low Z
t
CLZ*
10 - 10 - ns
Output Enable to Output in Low Z
t
OLZ*
5 - 5 - ns
Chip Disable to Output in High Z
t
CHZ*
- 25 - 35 ns
Output Disable to Output in High Z
t
OHZ*
- 25 - 35 ns
Output Hold from Address Change
t
OH
5 - 5 - ns
(2) WRITE CYCLE
PARAMETER SYMBOL UT6264B-35 UT6264B-70 UNIT
MIN. MAX. MIN. MAX.
Write Cycle Time
t
WC
35 - 70 - ns
Address Valid to End of Write
t
AW
30 - 60 - ns
Chip Enable to End of Write
t
CW
30 - 60 - ns
Address Set-up Time
t
AS
0 - 0 - ns
Write Pulse Width
t
WP
25 - 50 - ns
Write Recovery Time
t
WR
0 - 0 - ns
Data to Write Time Overlap
t
DW
20 - 30 - ns
Data Hold from End of Write Time
t
DH
0 - 0 - ns
Output Active from End of Write
t
OW*
5 - 5 - ns
Write to Output in High Z
t
WHZ*
- 15 - 25 ns
*These parameters are guaranteed by device characterization, but not production tested.
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