•Low-voltage and Standard-voltage Operation
–5.0 (VCC = 4.5V to 5.5V)
–2.7 (VCC = 2.7V to 5.5V)
–2.5 (VCC = 2.5V to 5.5V)
–1.8 (VCC = 1.8V to 5.5V)
•User-selectable Internal Organization
–1K: 128 x 8 or 64 x 16
–2K: 256 x 8 or 128 x 16
–4K: 512 x 8 or 256 x 16
•3-wire Serial Interface
•2 MHz Clock Rate (5V)
•Self-timed Write Cycle (10 ms max)
•High Reliability
–Endurance: 1 Million Write Cycles
–Data Retention: 100 Years
•Automotive Grade and Extended Temperature Devices Available
•8-lead PDIP, 8-lead JEDEC and EIAJ SOIC, and 8-lead TSSOP Packages
The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 64/128/256 words of 16 bits each, when the ORG pin is connected to VCC and 128/256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low power and low voltage operations are essential. The AT93C46/56/66 is available in space-saving 8-lead PDIP and 8-lead JEDEC and EIAJ SOIC packages. (continued)
Pin Configurations
Pin Name |
Function |
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CS |
Chip Select |
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SK |
Serial Data Clock |
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DI |
Serial Data Input |
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DO |
Serial Data Output |
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GND |
Ground |
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VCC |
Power Supply |
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ORG |
Internal Organization |
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DC |
Don’t Connect |
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8-lead SOIC
Rotated (R)
(1K JEDEC Only)
DC |
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1 |
8 |
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ORG |
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VCC |
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2 |
7 |
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GND |
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CS |
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3 |
6 |
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DO |
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SK |
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4 |
5 |
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DI |
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8-lead PDIP |
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VCC |
CS |
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1 |
8 |
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SK |
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2 |
7 |
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DC |
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DI |
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3 |
6 |
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ORG |
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DO |
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4 |
5 |
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GND |
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8-lead SOIC |
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CS |
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1 |
8 |
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VCC |
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SK |
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2 |
7 |
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DC |
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DI |
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3 |
6 |
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ORG |
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DO |
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4 |
5 |
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GND |
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8-lead TSSOP |
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CS |
1 |
8 |
VCC |
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SK |
2 |
7 |
DC |
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DI |
3 |
6 |
ORG |
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DO |
4 |
5 |
GND |
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3-wire Serial
EEPROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
AT93C46
AT93C56
AT93C66
Rev. 0172O–08/01
1
The AT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought “high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part.
The AT93C46 is available in 4.5V to 5.5V, 2.7V to 5.5V, 2.5V to 5.5V, and 1.8V to 5.5V versions. The AT93C56/66 is available in 4.5V to 5.5V, 2.7V to 5.5V, and 2.5V to 5.5V versions.
..................................Operating Temperature |
-55°C to +125°C |
*NOTICE: Stresses beyond those listed under “Absolute |
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Maximum Ratings” may cause permanent dam- |
Storage Temperature ..................................... |
-65°C to +150°C |
age to the device. This is a stress rating only and |
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functional operation of the device at these or any |
Voltage on Any Pin |
|
other conditions beyond those indicated in the |
with Respect to Ground ..................................... |
-1.0V to +7.0V |
operational sections of this specification is not |
Maximum Operating Voltage |
6.25V |
implied. Exposure to absolute maximum rating |
conditions for extended periods may affect |
||
DC Output Current |
5.0 mA |
device reliability |
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Notes: 1. When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of the internal 1 Meg ohm pullup, then the x 16 organization is selected. The feature is not available on the 1.8V devices.
2.For the AT93C46, if x 16 organization is the mode of choice and Pin 6 (ORG) is left unconnected, Atmel recommends using the AT93C46A device. For more details, see the AT93C46A datasheet.
2 AT93C46/56/66
0172O–08/01
AT93C46/56/66
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Symbol |
|
Test Conditions |
Max |
Units |
Conditions |
|
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COUT |
|
Output Capacitance (DO) |
5 |
pF |
VOUT = 0V |
CIN |
|
Input Capacitance (CS, SK, DI) |
5 |
pF |
VIN = 0V |
Note: 1. |
This parameter is characterized and is not 100% tested. |
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Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted).
Symbol |
|
Parameter |
Test Condition |
Min |
Typ |
Max |
Unit |
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VCC1 |
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Supply Voltage |
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1.8 |
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5.5 |
V |
VCC2 |
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Supply Voltage |
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2.5 |
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5.5 |
V |
VCC3 |
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Supply Voltage |
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2.7 |
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5.5 |
V |
VCC4 |
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Supply Voltage |
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4.5 |
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5.5 |
V |
ICC |
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Supply Current |
VCC = 5.0V |
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READ at 1.0 MHz |
|
0.5 |
2.0 |
mA |
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WRITE at 1.0 MHz |
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0.5 |
2.0 |
mA |
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ISB1 |
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Standby Current |
VCC = 1.8V |
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CS = 0V |
|
0 |
0.1 |
µA |
ISB2 |
|
Standby Current |
VCC = 2.5V |
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CS = 0V |
|
6.0 |
10.0 |
µA |
ISB3 |
|
Standby Current |
VCC = 2.7V |
|
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CS = 0V |
|
6.0 |
10.0 |
µA |
ISB4 |
|
Standby Current |
VCC = 5.0V |
|
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CS = 0V |
|
17 |
30 |
µA |
IIL |
|
Input Leakage |
VIN = 0V to VCC |
|
0.1 |
1.0 |
µA |
|||
IOL |
|
Output Leakage |
VIN = 0V to VCC |
|
0.1 |
1.0 |
µA |
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(1) |
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Input Low Voltage |
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-0.6 |
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0.8 |
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VIL1 |
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4.5V ≤ VCC ≤ 5.5V |
|
V |
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(1) |
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Input High Voltage |
2.0 |
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VCC + 1 |
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VIH1 |
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(1) |
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Input Low Voltage |
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-0.6 |
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VCC x 0.3 |
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VIL2 |
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1.8V ≤ VCC ≤ 2.7V |
|
V |
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(1) |
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Input High Voltage |
VCC x 0.7 |
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VCC + 1 |
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VIH2 |
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VOL1 |
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Output Low Voltage |
4.5V ≤ VCC |
≤ |
5.5V |
IOL = 2.1 mA |
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0.4 |
V |
VOH1 |
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Output High Voltage |
IOH = -0.4 mA |
2.4 |
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V |
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VOL2 |
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Output Low Voltage |
1.8V ≤ VCC |
≤ |
2.7V |
IOL = 0.15 mA |
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0.2 |
V |
VOH2 |
|
Output High Voltage |
IOH = -100 µA |
VCC - 0.2 |
|
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V |
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Note: 1. |
VIL min and VIH max are reference only and are not tested. |
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3
0172O–08/01
Applicable over recommended operating range from TA = -40°C to + 85°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol |
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Parameter |
Test Condition |
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Min |
Typ |
Max |
Units |
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4.5V ≤ VCC ≤ 5.5V |
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0 |
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2 |
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fSK |
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SK Clock |
2.7V ≤ VCC ≤ 5.5V |
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0 |
|
1 |
MHz |
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Frequency |
2.5V ≤ VCC |
≤ 5.5V |
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0 |
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0.5 |
||
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1.8V ≤ VCC |
≤ 5.5V |
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0 |
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0.25 |
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4.5V ≤ VCC ≤ 5.5V |
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250 |
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tSKH |
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SK High Time |
2.7V ≤ VCC ≤ 5.5V |
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250 |
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ns |
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2.5V ≤ VCC ≤ 5.5V |
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500 |
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1.8V ≤ VCC ≤ 5.5V |
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1000 |
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4.5V ≤ VCC |
≤ 5.5V |
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250 |
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tSKL |
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SK Low Time |
2.7V ≤ VCC |
≤ 5.5V |
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250 |
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ns |
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2.5V ≤ VCC ≤ 5.5V |
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500 |
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1.8V ≤ VCC ≤ 5.5V |
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1000 |
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4.5V ≤ VCC ≤ 5.5V |
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250 |
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tCS |
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Minimum CS |
2.7V ≤ VCC ≤ 5.5V |
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250 |
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ns |
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Low Time |
2.5V ≤ VCC |
≤ 5.5V |
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500 |
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1.8V ≤ VCC |
≤ 5.5V |
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1000 |
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4.5V |
≤ VCC ≤ 5.5V |
50 |
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tCSS |
|
CS Setup Time |
Relative to SK |
2.7V |
≤ VCC ≤ 5.5V |
50 |
|
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ns |
||
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2.5V |
≤ VCC |
≤ 5.5V |
100 |
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1.8V |
≤ VCC ≤ 5.5V |
200 |
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4.5V |
≤ VCC |
≤ 5.5V |
100 |
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tDIS |
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DI Setup Time |
Relative to SK |
2.7V |
≤ VCC |
≤ 5.5V |
100 |
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ns |
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2.5V |
≤ VCC |
≤ 5.5V |
200 |
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1.8V |
≤ VCC ≤ 5.5V |
400 |
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tCSH |
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CS Hold Time |
Relative to SK |
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0 |
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ns |
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4.5V |
≤ VCC ≤ 5.5V |
100 |
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tDIH |
|
DI Hold Time |
Relative to SK |
2.7V |
≤ VCC ≤ 5.5V |
100 |
|
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ns |
||
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2.5V |
≤ VCC |
≤ 5.5V |
200 |
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1.8V |
≤ VCC ≤ 5.5V |
400 |
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4.5V |
≤ VCC |
≤ 5.5V |
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250 |
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tPD1 |
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Output Delay to ‘1’ |
AC Test |
|
2.7V |
≤ VCC |
≤ 5.5V |
|
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250 |
ns |
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2.5V |
≤ VCC |
≤ 5.5V |
|
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500 |
||||
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1.8V |
≤ VCC ≤ 5.5V |
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1000 |
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4.5V |
≤ VCC ≤ 5.5V |
|
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250 |
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tPD0 |
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Output Delay to ‘0’ |
AC Test |
|
2.7V |
≤ VCC ≤ 5.5V |
|
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250 |
ns |
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2.5V |
≤ VCC |
≤ 5.5V |
|
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500 |
||||
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1.8V |
≤ VCC |
≤ 5.5V |
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1000 |
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4.5V |
≤ VCC ≤ 5.5V |
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250 |
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tSV |
|
CS to Status Valid |
AC Test |
|
2.7V |
≤ VCC ≤ 5.5V |
|
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250 |
ns |
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2.5V |
≤ VCC |
≤ 5.5V |
|
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500 |
||||
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1.8V |
≤ VCC ≤ 5.5V |
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1000 |
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4.5V |
≤ VCC |
≤ 5.5V |
|
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100 |
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tDF |
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CS to DO in High |
AC Test |
|
2.7V ≤ VCC |
≤ 5.5V |
|
|
100 |
ns |
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Impedance |
CS = VIL |
|
2.5V ≤ VCC |
≤ 5.5V |
|
|
200 |
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1.8V |
≤ VCC ≤ 5.5V |
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400 |
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tWP |
|
Write Cycle Time |
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10 |
ms |
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4.5V |
≤ VCC ≤ 5.5V |
|
3 |
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ms |
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Endurance(1) |
5.0V, 25°C, Page Mode |
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1M |
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Write Cycles |
||
Note: |
1. This parameter is characterized and is not 100% tested. |
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4 AT93C46/56/66
0172O–08/01
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AT93C46/56/66 |
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Instruction Set for the AT93C46 |
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Op |
Address |
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Data |
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Instruction |
SB |
Code |
x 8 |
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x 16 |
x 8 |
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x 16 |
Comments |
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READ |
1 |
10 |
A6 - A0 |
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A5 - A0 |
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Reads data stored in memory, at |
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specified address. |
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EWEN |
1 |
00 |
11XXXXX |
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11XXXX |
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Write enable must precede all |
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programming modes. |
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ERASE |
1 |
11 |
A6 - A0 |
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A5 - A0 |
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Erase memory location An - A0. |
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WRITE |
1 |
01 |
A6 - A0 |
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A5 - A0 |
D7 - D0 |
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D15 - D0 |
Writes memory location An - A0. |
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ERAL |
1 |
00 |
10XXXXX |
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10XXXX |
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Erases all memory locations. Valid |
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only at VCC = 4.5V to 5.5V. |
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WRAL |
1 |
00 |
01XXXXX |
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01XXXX |
D7 - D0 |
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D15 - D0 |
Writes all memory locations. Valid |
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only at VCC = 4.5V to 5.5V. |
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EWDS |
1 |
00 |
00XXXXX |
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00XXXX |
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Disables all programming |
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instructions. |
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5
0172O–08/01