1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
SCHEMATIC,MLB,Q45B ("Amo II")
7 8
6
5
4
3
ECN
ZONE
I
REV
355571
DESCRIPTION OF CHANGE
PRODUCTION RELEASED
1 2
CK
APPD
DATE
12/13/04
ENG
APPD
?
DATE
D
PAGE
10
11 11
13*
C
14
16
17
18
21*
22
23
24
25*
26
27
28
29
B
30
31
32
33
34
35
36
37
38
40
44
45
46
A
48
49
50
8
PDF
1
2
3
4
55
6
7
8
9
1
2
3
4
6
7
8
9
10
TABLE OF CONTENTS
SYSTEM BLOCK DIAGRAM
POWER BLOCK DIAGRAM
REVISION HISTORY
TABLE ITEMS
FUNC TEST
POWER CONNECTOR / POWER ALIAS
SIGNAL ALIAS
2.5V VREG
1.2V VREG
CIRCUIT
3.3V/5V PWRON SWITCHING
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
SMU
CPU LOGIC ANALYZER CONNECTOR
FAN 1, 2 AND SYSTEM TEMP SENSOR
FAN 3 AND HARD DRIVE TEMP SENSOR
I2C CONNECTIONS
INDICATOR LED
U3LITE CORE
SHASTA CORE
U3LITE MISC
SHASTA SERIAL
PULSAR POWER
PULSAR CLOCKS
U3LITE APPLE PI
NEO APPLE PI
CPU STRAPS
NEO POWER & BYPASS
CPU BYPASS
CPU VREG
CPU VREG
CPU VREG OUTPUT CAPS
CPU DIODE CONDITIONER
U3LITE MEMORY
SERIES TERMINATION
DIMMS
PARALLEL TERMINATION
PARALLEL TERMINATION
VTT VREG
U3LITE AGP
GPU AGP
GRAPHICS VREGS (GPU CORE & 1.5V)
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
6 7
BLOCK
TOP
PROCESSOR
MEMORY
GRAPHICS
5
PAGE51PDF
42
52
53
54
55
56
57
58
59
60
62*
64
73
74*
75*
76
77*
80*
83
84*
87
88*
90
91*
92
94
95*
96*
98*
100*
101*
102*
103*
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
4
CIRCUIT
EXTERNAL TMDS TRANSMITTER
GPU FRAME BUFFER
FRAME BUFFER TERMINATION
GRAPHICS DDR SDRAM A
GRAPHICS DDR SDRAM B
GPU STRAPS
GPU DAC & CLOCKS
GPU DVI & STRAPS
EXT VGA & TMDS
U3LITE HYPERTRANSPORT
SHASTA HYPERTRANSPORT
HYPERTRANSPORT LA CONNECTORS
PCI SERIES TERMINATION
SHASTA PCI
BOOT ROM
AIRPORT EXTREME
USB2 PCI
SHASTA DISK
DISK CONNECTORS
SHASTA ETHERNET
ETHERNET PHY & CONNECTORS
SHASTA FIREWIRE
FIREWIRE A PHY & CONNECTORS
USB HOST INTERFACE
USB DEVICE INTERFACE
MODEM CONNECTOR
PCM3052 AUDIO CODEC
LINE IN AMP
LINE OUT AMP
SPEAKER AMP
AUDIO CONNECTORS
AUDIO POWER SUPPLIES
S/PDIF TRANSMITTER
DIMENSIONS ARE IN MILLIMETERS
XX
X.XX
X.XXX
ANGLES
DO NOT SCALE DRAWING
THIRD ANGLE PROJECTION
DRAFTER
ENG APPD
QA APPD
RELEASE
3
METRIC
MATERIAL/FINISH
NOTED AS
APPLICABLE
DESIGN CK
MFG APPD
DESIGNER
SCALE
NONE
SIZE
2
Apple Computer Inc.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TITLE
SCH,MLB,Q45B
DRAWING NUMBER
D
051-6599
BLOCK
GRAPHICS
HT
PCI
DISK
ETHERNET
FIREWIRE
USB
MODEM
AUDIO
SHT
1
REV.
1
I
OF
D
C
B
A
103
FREQUENCIES LISTED ARE MAXIMUM DATA TRANSFER RATES SUPPORTED BY U3LITE
D
U5400, U5401
FRAME
BUFFER A
PAGE 54
U2600
PULSAR
POWER
C
PAGE 26
B
CLOCKS
PAGE 27
EDUCATION: NOT USED
GOOD,BETTER,BEST: HARD DRIVE
FOR DEVELOPMENT ONLY
EDUCATION: HARD DRIVE
GOOD,BETTER,BEST: OPTICAL
7 8
64-BIT
FRAME BUFFER
2.6V/540MHZ
JXXXX
SATA
CONNECTOR
PAGE 83
J8302
SATA DEV
CONNECTOR
PAGE 83
J8301
UATA
CONNECTOR
PAGE 83
J5900, J5901
J5902, J5903
17",20" INVERTER
TMDS
EXT VGA
PAGE 59
U4900
GPU
NV18B/NV34
PAGE 49
U5500, U5501
FRAME
BUFFER B
PAGE 55
SATA/150
1.2V/1.5GHZ
SATA/150
1.2V/1.5GHZ
UATA/133
3.3V/133MHZ
64-BIT
FRAME BUFFER
2.6V/540MHZ
6
32-BIT
8X AGP
0.8V/533MHZ
4X = 1.5V
I/O = 1.5V
U2900
CPU
NEO 10S
PAGE 29
APPLE PI
PAGE 28
U3
AGP
U3LITE
PAGE
48
HYPERTRANSPORT
MISC
PAGE 24
I2C
PAGE 18
SATA1 SATA2
PAGE 80 PAGE 80
ETHERNET FIREWIRE
PAGE 84
GMII (3.3V/125MHz)
8-bit TX & 8-bit RX
HYPERTRANSPORT
SATA
U2300
UATA
CORE
PAGE 23
PAGE 88
32-BIT
APPLE PI
ELASTIC INTERFACE
1.2V/900MHZ
CORE
PAGE 22
PAGE 60
J6400
J6401
J6402
HT
DEBUG
PAGE 64
PAGE 62
SHASTA
NCs
PAGE 91
1394 OHCI (3.3V/98MHz)
8-bit TX/RX
5
64/128-BIT
MAIN MEMORY
2.6V/400MHZ
PAGE 37
MAIN MEMORY
8-BIT
HYPERTRANSPORT
1.2V/400MHZ
CONTROL = 2.5V
I2S
PAGE 25
SCCA SCCB
I2S1
PCI
PAGE 74
PAGE 25
GPIO/PCI64
I2S2 I2S0
SERIES
TERM
PAGE 38
U7500
BOOTROM
32-bit PCI (5V-3.3V/33MHz)
4
J4000
J4001
DIMMS
PAGE 40
J7600
AIRPORT
EXTREME
CONNECTOR
PAGE 76
J9401
CTL-LESS /
SOFT MODEM
CONNECTOR
PAGE 94
PARALLEL
PAGES 44&45
123
PAGE 91
U7700
USB 2.0
uPD720101
PAGE 77 PAGE 75
TERM
USB
PCI
3
45
J9210/J9220/J9230
USB
CONNECTORS
PAGE 92
J9400
MICRODASH MODEM
CONNECTOR
PAGE 94
J9240
BLUETOOTH
CONNECTOR
PAGE 92
U1300
SMU
PAGE 13
To Shasta
SCCA
1 2
U1301
RTC
PAGE 13
D
C
B
U9500
S/PDIF
AUDIO CODEC
U8700
10/100 ETHERNET
BCM5221
A
4 Diff pairs
8
PAGE 87
J8700
ETHERNET
CONNECTOR
PAGE 87
6 7
U9000
FIREWIRE A
802A
PAGE 90
0
J9000, J9001
FIREWIRE A
CONNECTORS
PAGE 90
1
2 Diff pairs
5
PCM3052
LINE IN
AMP
PAGE 97
J9800
LINE IN
CONNECTOR
PAGE 98
PAGE 95
J9802
MIC
CONNECTOR
PAGE 98
LINE OUT
AMP
PAGE 97
SPEAKER
AMP
PAGE 97
4
OPTICAL OUT
J9803
COMBO OUT
CONNECTOR
PAGE 98
LINE OUT
J9801
SPEAKER
CONNECTOR
PAGE 98
SYSTEM BLOCK DIAGRAM
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6599
APPLE COMPUTER INC.
3
2
D
SCALE
NONE
SHT
2
1
REV.
OF
103
A
I
7 8
6
5
4
3
1 2
D
C
J700
PAGE 7
PP24V_RUN
FW CONN
20" LCD INVERTER
PP5V_RUN_AUDIO
LINEAR
PAGE 99
5V
HP/LINEOUT AMP
PP4V5_RUN_AUDIO
LINEAR
PAGE 99
4.5V
AUDIO CODEC
PP12V_RUN
20" PANEL POWER
20" LCD INVERTER
PAGE 33
0.8~1.2V
CPU CORE
SWITCHER
SC2643VX*1
SC1211*4
POWER CONNECTOR
PP5V_RUN
HDD & OPTICAL
31
8 7
ALIAS
6
CPU_AVDD_EN
PP2V5_RUN_CPU_AVDD
31
LINEAR
PAGE 31
2.8V
=PP5V_RUN_CPU
GPUL
CPU AVDD
U3LITE CORE
SWITCHER
PAGE 22
1.53V
IRU3037CS
U3LITE CORE
PP5V_ALL
PP5V_PWRON
FET SWITCH
PAGE 11
5V
USB CONN
UDASH MODEM
PP2V5_PWRON
SWITCHER
PAGE 9
2.62V
IRU3037CS
PAGE 11
3.3V
PP3V3_PWRON
PAGE 11
3.3V
SHASTA HT
DDR DIMM
PP3V3_ALL
LINEAR
FW PHY
SMU
FET SWITCH
ENET PHY
USB2 HOST
MODEM & BT
PP2V5_PWRON
IN
SYS_POWERUP_L
PP3V3_RUN
GPU CORE
SWITCHER
PAGE 50
1.6/1.4V
PCI BUS
AUDIO CODEC
IRU3037CS
NV18B/NV34
PP1V2_PWRON
FET SWITCH
PAGE 10
10
10 10
PP1V2_SHASTA_CORE
SWITCHER
PAGE 10
1.2V
PWRON_SD
PWRON_DISK_SB
PULSAR_POWER_DOWN
MAKE_BASE=TRUE
TURN_ON_SHASTA_CORE_L
TURN_ON_PP1V2_L
=PULSAR_POWER_DOWN
27
5V
IRU3037ACS
SHASTA CORE
IN IN
IN
PPVCORE_PWRON_SB
6
10
PP1V2_RUN
FET SWITCH
PAGE 10
IN
HT BUS
API BUS
SYS_POWERUP_L
POWER SEQUENCE PIN
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_0
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P1_2
11
R330
100K
2 1
COMPARE_SB_CORE
5%
1
1/16W
402
C330
MF
0.01UF
20%
16V
2
CERM
402
13
13
13
13
13
13
RAIL_CTL_NEG
SMU
PP3V3_ALL
(PWR_GOOD_SB_CORE)
(PWR_GOOD_PP2V5)
(TURN_ON_VTT)
1
R331
10K
5%
1/16W
MF
402
2
PWR_GOOD_SB_CORE
3
8
V+
U1100
GND
9
12
LM339A
SOI
14
D
C
PP2V5_RUN
FET SWITCH
PAGE 9
B
RAM TERM
GRAPHIC FB
PP1V25_RAM_VTT
LINEAR
PAGE 46
1.25V
46
IN
RAM VTT
TURN_ON_VTT
PP1V5_PWRON
LINEAR
PAGE 50
1.5V
PP1V5_RUN
POWER SW
PAGE 50
PULSAR CORE
AGP BUS
R340
100K
5%
1/16W
MF
402
PP5V_ALL
1
R342
150K
5%
1/16W
MF
402
2
PS_2V_REF
2 1
1
C340
0.01UF
20%
16V
2
CERM
402
COMPARE_PP2V5
1
R343
100K
5%
1/16W
MF
402
2
6
U1100
7
GND
3
LM339A
SOI
V+
12
PP3V3_ALL
1
R341
10K
5%
1/16W
MF
402
1
2
PWR_GOOD_PP2V5
B
POWER BLOCK DIAGRAM
A
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6599
D
NONE
SHT
3
SCALE
REV.
OF
103
A
I
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
DATE
02/27/04
03/05/04
D
03/24/04
04/12/04
04/12/04
04/13/04
C
04/14/04
04/21/04
04/21/04
B
04/26/04
04/27/04
04/29/04
04/30/04
05/03/04
A
05/05/04
DESCRIPTION
EVT3 RELEASE (REV 20)
GPU XTAL - C5700 AND C5719 -> 27PF FROM 22PF
I2C A - U1800 MOVED BACK TO PWRON RAIL
HEATSINK ASSEMBLY - NEW PART NUMBERS
FAN 3 - STUFFING ON ALL CONFIGS
FIREWIRE POWER DU JOUR
EVT3 - BOM REV 21 RELEASE
MASTER PAGE SYNC
EVT3 REWORKS
NOSTUFF R807 - SMU_BOOT_SCLK IS ALSO CPU_VID<5>
NOSTUFF R3691 & R828 - DIODE CAL RETURN PATH
MOVED MARTY SERIAL 0 OHM RESISTORS TO COMMON BOM
SMU - ADDED QREQ
GPU - ADDED DECOUPLING TO GPU_VTT FOR NV36
INVERTER CONTROL - ADDED AND GATES U5850 & U5851 TO CONTROL LCD_PWM AND FPD_PWR_ON
CHECKIN 21001
CPU - CHANGED CPU SYMBOL TO NEO-10S-REV2-76C (OLD IS OBSOLETE)
SCHEMATIC REUSE - NETS THAT NEED ALIASES START WITH = (DOES NOT EFFECT NETLIST)
3PHASE CPU POWER SUPPLY - ADDED TABLE FOR R3328
INVERTER - ADDED RESISTORS R5860-1 AND CHANGED R5808-9 TO 47OHM
TMDS POWER - ADDED R5960 AND D5914
DIODE CAL - ADDED OPTION TO POWER FROM PP5V_ALL AND PP3V3_ALL RAILS
CHECKIN 21002
MASTER PAGE SYNC - IN SYNC ON ALL PAGES EXCEPT PAGE 13
EMI - REMOVED EMI700 & EMI9400
QREQ_L HACK - ADDED U2850, C2850, R2850, R2851
VOLTAGE SENSE FROM 12V - ADDED R3360, R3361
CHECKIN 21003
MAIN MEMORY DQS PARALLEL TERM - CHANGED TO 100 OHM (LIKE EVT3)
I/O ALIGNMENT FIXTURE - ADDED 815-8008 TO MLB BOM
DIMM CONNECTORS - UPDATED 30 DEGREE SYMBOL
GREEN LED - ADDED KINGBRIGHT AS ALTERNATE
VTT - NO LONGER POWER SEQUENCED - NO STUFFED R4610 AND R4603
HD TEMP SENSOR - STUFFED ON ALL CONFIGS
SMU PULLUPS CHANGES - R1312 -> 2K; R1311 -> 10K
SDF804 -> ZH804
CHECKIN 21004
RAM PARALLEL TERM - DQ RPAKS CHANGED TO 68 OHM
STROBE RESISTORS CHANGED TO 120 OHM
EVT3A RELEASE (REV 22)
CHECKIN 22001 - FIXING DIMM SYMBOL
CHECKIN 22002 - FIXING DIMM SYMBOL AGAIN
MASTER PAGE SYNC - NOW IN SYNC ON ALL SHAREABLE PAGES
MAIN MEMORY - DQ SERIES TERM CHANGED TO 22 OHM
MAIN MEMORY - DQ PARALLEL TERM CHANGED TO 82 OHM
FIREWIRE POWER - NEW CURRENT LIMITING RESISTOR
NOSTUFFING FIREWIRE PORT POWER "CHOICE A" CIRCUIT
INPUT VOLTAGE SENSE - CHANGED DIVIDER VALUES
INPUT CURRENT SENSE - CHANGED R3343 TO 0.025 OHM 1% RESISTOR
CHECKIN 22003
SMU_SUSPENDREQ - STUFFED LEVEL SHIFTER
CPU POWER SUPPLY - NOSTUFFED R3305
CHANGED R3304 TO 116S1000
CHANGED C3304-7 TO 132S4733
EVT3A BOM RELEASE REV 23
USB POWER CAPS - NOSTUFFED C9211, C9221, C9231
PULSAR_POWER_DOWN CONNECTED TO SMU_PWRSEQ_P1_4
SW703 CHANGED TO 516S0221
MASTER PAGE SYNC
CHECKIN 23001
MASTER PAGE SYNC - AUDIO AND SMU CHANGES
SUSPENDACK LEVEL SHIFTER - REPLACED Q2407 AND Q2408 WITH Q2420 SN7002DW
I2C_CPU_A - ADDED Q1801 TO LEVEL SHIFTER
ADDED POWER SUPPLY TEMP SENSOR
Q3000 ADDED TO LEVEL SHIFT / INVERT CPU_BYPASS AND CPU_HRESET
CURRENT SENSE - CHANGED R3345 FROM 121K TO 73.2K
CHECKIN 23002
QREQ CIRCUITS MOVED TO PWRON RAIL
I2C UPDATE
NB_SUSPENDACK_L NOW USED U700 TO LEVEL SHIFT - OLD CIRCUIT REMOVED
DIMMS - UPDATED TO 25/28 DEGREE CONNECTORS
MASTER PAGE SYNC
CHECKIN 23003
SOFT MODEM - ADDED DECOUPLING CAPS TO POWER RAIL
REMOVED OLD OVERTEMP CIRCUIT
ADDED DIAG LED
MASTER PAGE SYNC
CHECKIN 23004
CPU POWER SUPPLY - ON SEMI FETS ONLY
ADDED 1.6GHZ CPU PART NUMBER
UPDATED PLATING FOR ZH702
CHECKIN 23005
CPU AVDD - ADDED 2.7V BOM OPTION
POWER_FAIL - RESISTOR DIVIDED TO 3.3V
ADDED BOMS OPTIONS FOR ON_SEMI AND VISHAY FETS FOR 3PHASE AND 4PHASE
CPU PS AVP CHANGES
CPU VREG - ADDED BOM OPTION ’EXTRA_C’ FOR CAPS WE WOULD LIKE TO NOSTUFF
CHECKIN 23006
CPU VREG AVP - C3304, C3305, C3306, C3307 CHANGED TO 8.2NF
TMDS TERM - STUFFING CHANGES
CHECKIN 23007
05/06/04
05/07/04
05/10/04
05/11/04
06/10/04
06/11/04
06/21/04
06/22/04
06/22/04
06/23/04
06/24/04
06/28/04
06/28/04
07/01/04
07/02/04
07/06/04
07/08/04
07/12/04
07/13/04
07/14/04
DVT RELEASE (REV 24)
TMDS - NEW PARALLEL TERMINATION RESISTORS R5869-R5872
CHECKIN 24001
FRAME BUFFER CLOCKS - ADDED DIFF PAIR PROPERTIES
PCI_RESET - UPDATES FOR SCHEMATIC REUSE
MASTER PAGE SYNC - ADDED S/PDIF XMITTER AND BITCLK DELAY
CHECKIN 24002
AUDIO UPDATES
CHECKINS 24003-24005
DVT RELEASE (REV 25)
LAST MINUTE BOM CHANGES FOR DVT:
SUSPENDREQ LEVEL SHIFTER - R2419, R2420 CHANGED TO 330 OHM
I2C A BUS PULLUPS - R1816,R1817 CHANGED TO 200 OHM
USB PULL-DOWNS - R9403,R9404 MOVED TO COMMON BOM
SMU CRYSTAL CAPS - C1304,C1305 CHANGED TO 18PF FROM 12PF
SMU RESET - CHANGED R1322 TO 150K FROM 100K
CPU HEATSINK ASSEMBLIES - NEW PART NUMBERS
TMDS POWER - CHANGED D5914 TO SURFACE MOUNT PART FROM THROUGH HOLE
MOVED R714 TO R1303 FOR SCHEMATIC REUSE
U1600,U1601,U1700 CHANGED TO 353S0890 FOR MORE SOURCES
MOVED CPU LOGIC ANALYZER RESISTORS TO DEVELOPMENT BOM
CHECKIN 25001
MASTER PAGE SYNC - NOSUFFED EXTERNAL S/PDIF TRANSMITTER
ADDED TABLES FOR:
PATA CONN J8301 CHANGED TO 516S0235 (ADDED VENDOR)
NEW SATA CONNECTER SOURCES J8300, J8302
NEW TMDS CONNECTOR W/ BOSS J5902
REMOVED COIN CELL BATTERY AND I/O ALIGNMENT FIXTURE FROM MLB BOM (FATP ITEMS)
NEW BACKUP SMU_RESET CIRCUIT (SAME AS Q78)
CHECKIN 25003
REPLACED Q5006 (FET FOR 1.5V) WITH 376S0254
FAN OPAMPS - REPLACED U1600 W/ SECOND OPAMP IN U1700
TIED INPUTS IN UNUSED OPAMP IN U1601
NOSTUFFED CPU VREG ELECTROLYTIC CAPS C3332, C3427, C3421
NOSTUFFED R2775/6 (UNUSED CLOCKS)
CHECKIN 25004
"PROPERLY" TERMINATED UNUSED OPAMP IN U1601
BOM RELEASE REV 26
"PROPERLY" TERMINATED UNUSED OPAMP IN U2100
R5010 REMOVED TO DECREASE DROOP ON 1.5V RAIL
ADDED CONNECTOR J1701 TO SUPPORT REMOTE HD TEMP SENSOR
CHECKIN 26001
MASTER PAGE SYNC - PICKED UP AUDIO CHANGES RELATED TO BITCLK
CHECKIN 26002
SUPPORT FOR 2GB DIMMS - SWAPPED PINS 103 & 167 ON DIMM CONNECTOR
CHECKIN 26003
ADDED SECOND SOURCE VTT REGULATOR (PAGE 46)
NO STUFF POWER SUPPLY TEMP SENSOR
CHANGED HD TEMP SENSOR CONN J1701 TO 4 PIN
MASTER PAGE SYNC - AUDIO CHANGES
CHECKIN 26004
UPDATED LINE AND NECK WIDTH CONSTRAINTS THROUGHOUT SCHEMATIC
NOSTUFFED ON BOARD HD TEMP SENSOR
CHANGED U3LITE CORE TO 1.53V
FEEDBACK RESISTORS CHANGED TO 603
CHECKIN 26005
REMOVED ON BOARD HARD DRIVE TEMP SENSOR
AUDIO DETECT PULLUPS - CHANGED FROM 47K TO 4.7K
CHANGED AUDIO I2S_BITCLK SERIES RESISTER TO 0 OHM
U3LITE FEEDBACK RESISTORS CHANGED TO 0.5% TOLERANCE
CHECKIN 26006
REPLACED MAXIM ANALOG SWITCH U2850 WITH TI ANALOG SWITCH
PERICOM ADDED AS AN ALTERNATE
ALL I/O CONNECTORS CHANGED
POWER CONNECTOR CHANGED
POWER SWITCH CHANGED
SMU DOWNLOAD CONNECTOR - PRODUCTION P/N
CPU PART NUMBERS - UPDATED WITH ACTUAL PART NUMBERS
CHECKIN 26007
BOM RELEASE REV 27
CPU VREG DROOP - R3327 CHANGED TO 1.5K; R3326 CHANGED TO 301
PULSAR_POWER_DOWN - R2750 CHANGED TO 47 OHM FOR ICT
AUDIO DETECT PULLUPS - CHANGED BACK TO 47K FROM 4.7K
AUDIO MUTE PULLDOWNS R9815 & RA012 - CHANGED FROM 47K TO 4.7K
MIC BIAS - NOSTUFFED CA210 TO HELP NOISE FLOOR
1.5V_RUN FET - ADDED (N/S) C5060 FOR POSSIBLE SOFT-START
2.5V VREG SOFT START - CHANGED C915 TO 1UF FOR U3L POWER SEQUENCING
MLB CARCODE - CHANGED TO 825-6447
I/O CONNECTOR SYMBOL UPDATES
CHECKIN 27001
POWER_FAIL_L R DIVIDE - ADJUSTED FOR 2K PULLUP THAT WILL BE IN PVT POWER SUPPLIES
ORIGIN HOLE ZH702 - CHANGED TO 4.15MM
CHECKIN 27002
FIREWIRE CRYSTAL - ADDED R9060 & R9061
CHECKIN 27003
FIREWIRE CRYSTAL R - FIXED REF DES
ANALOG SWITCH U2850 - ADDED PERICOM & AND MAXIM AS ALTERNATES TO TI
STUFFED P/S TEMP SENSOR
NAMED SOME UNNAMED NETS
CHECKIN 27004
NEW 1.5V FET - LOWER RDS(ON) - Q5006
07/15/04
07/28/04
08/03/04
08/20/04
08/27/04
09/14/04
09/30/04
11/15/04
12/13/04
U3LITE PWR SEQ - CHANGED C915 TO 0.22UF
P/S TEMP SENSOR - NOSTUFF
REMOTE HD TEMP SENSOR CONNECTOR - NOSTUFF
PVT / PRODUCTION RELEASE 820-1540:A (SCH 051-6482 REV A)
STUFFED TMDS CONNECTOR J5902 (ACCIDENTALLY OMITTED)
FIREWIRE CRYSTAL - CHANGED R9061 TO 470 OHM
2.5V VREG - CHANGED SOFT START CAP TO 0.68UF
NEW P/N FOR HEATSINK ASSEMBLIES
NOSTUFFED OPTICAL TEMP SENSOR
STUFFED REMOTE HD TEMP SENSOR CONNECTOR
BOM RELEASE (REV B)
2.5V VREG - CHANGED SOFT START CAP TO 0.47UF
I/O CONNECTOR SHIELD CHANGE P/N TO 805-5664
NEW CPU P/N AND BINCODES FOR 1.10V VMIN
BOM RELEASE (REV C)
TMDS VCC - CHANGED C5918 TO 0.022UF TO LOWER INRUSH CURRENT
POWER SWITCH SW703 - MADE FOXCONN 516S0248 AND SUYIN 516S0249 ALTERNATES
PATA CONNECTOR J8301 - CHANGED TO 516S0264 TO MATCH REVERSED BOSSES ON FAB
BOM RELEASE (REV D)
NOSTUFF SDF700
SW703 - SUYIN WAS REMOVED AS ALTERNATE
BOM RELEASE (REV E)
CPU - WAVE5 PROCESSORS ADDED AS ALTERNATES (ARL, BPL, BRL)
CPU P/S CAPS - AIR CHANNEL BY STUFFING C3427, C3332 AND NOSTUFFING C3327, C3428
SATABR RESET - STUFFED PULLDOWN R2565
CPU_INT_L - CHANGED R2578 TO 47 OHM TO CURRENT LIMIT
BOM RELEASE (REV F)
CPU - 1.6GHZ 1.20V PROCESSORS ADDED AS ALTERNATES (APA, APL)
REMOTE HD TEMP SENSOR CONN - CHANGED J1701 TO BLACK 518S0193
KEPT 518S0084 AS ALTERNATE
FW SURGE RESISTORS - CHANGED R9056 & R9002 TO 1.3 OHM 107S0060
BOM RELEASE (REV G)
CPU - ADDED HP PROCESSORS AS ALTERNATES (ANA, BNA)
AUDIO GROUND - CHANGED R9813 & R9814 TO 0 OHM
HD TEMP CONN - REMOVED ALTERNATE CONNECTOR
BOM RELEASE (REV H)
CPU DECOUPLING - NOSTUFFED EXTRA_C BOM OPTION
U3LITE - ADDED NEW LAMINATE PART AS ALTERNATE
BOM RELEASE (REV I)
REVISION HISTORY
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6599
APPLE COMPUTER INC.
D
SCALE
NONE
D
C
B
A
REV.
I
SHT
OF
4
103
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
PROCESSORS
QTY
PART#
QUALIFIED
QTY
D
WAVE3
WAVE3
WAVE3
WAVE5
WAVE5
WAVE5 HP
WAVE3
WAVE5
WAVE5 HP
337S2969
1
PART NUMBER
337S2995
337S2980
337S2997 337S2968
337S2981
337S2982
337S2998
ALTERNATE FOR
PART NUMBER
337S2968 337S2994
337S2968
337S2968
337S2969 337S2970
337S2969
337S2969
337S2969
DEVICE
PROCESSOR
PROCESSOR
PACKAGE
CBGA-576-1MM
CBGA-576-1MM
DESCRIPTION
IC,GPUL,10S,DD3,1.6G,85C,ARA
IC,GPUL,10S,DD3,1.8G,85C,BPA
BOM OPTION
CPU_DD30_1_6GHZ
CPU_DD30_1_6GHZ
CPU_DD30_1_6GHZ
CPU_DD30_1_6GHZ
CPU_DD30_1_8GHZ IC,GPUL,DD3,1.8G,BRA
CPU_DD30_1_8GHZ
REF DES
U2900
U2900
U2900
U2900
U2900
U2900
U2900
U2900
COMMENTS:
IC,GPUL,DD3,1.6G,APA
IC,GPUL,DD3,1.6G,APL
IC,GPUL,DD3,1.6G,ARL
IC,GPUL,DD3,1.6G,ANA
IC,GPUL,DD3,1.8G,BPL CPU_DD30_1_8GHZ
IC,GPUL,DD3,1.8G,BRL
IC,GPUL,DD3,1.8G,BNA CPU_DD30_1_8GHZ
1.6GHZ 337S2968
1.8GHZ
VALUE VOLT. WATT.
42W
1.25V
42W
1.20V
TABLE_ALT_HEAD
VOLTAGE
TABLE_ALT_ITEM
1.20V
TABLE_ALT_ITEM
1.20V
TABLE_ALT_ITEM
1.25V
TABLE_ALT_ITEM
1.20V
TABLE_ALT_ITEM
1.25V
TABLE_ALT_ITEM
1.20V
TABLE_ALT_ITEM
1.25V WAVE5
TABLE_ALT_ITEM
1.20V
REFERENCE DESIGNATOR(S)
TOL. PART #
? 1
?
U2900
U2900
BOM OPTION
CPU_DD30_1_6GHZ
CPU_DD30_1_8GHZ
TABLE_11_HEAD
TABLE_11_HEAD
TABLE_11_HEAD
PART#
343S0283
PART#
820-1540 MLB1
825-6447
051-6482
341T1366
341T1395
CRITICAL
C
337S2865
337S2866
337S2787
QTY
1 ?
1
DEVICE
PROCESSOR
PROCESSOR
PROCESSOR
PACKAGE
CBGA-576-1MM
CBGA-576-1MM
CBGA-576-1MM
DESCRIPTION
IC,GPUL,10S,DD2.11,1.8GHZ,85C
IC,GPUL,10S,DD2.11,2.0GHZ,85C
IC,GPUL,10S,REV3,2.0G,85C,CJA
NOT QUALIFIED
VALUE VOLT. WATT.
1.45V
1.8GHZ
2.0GHZ
1.45V
2.0GHZ
1.25V
REFERENCE DESIGNATOR(S)
TOL. PART #
45W
45W
? 1
?
45W
U2900
U2900
U2900
BOM OPTION
CPU_DD211_1_8GHZ
CPU_DD211_2_0GHZ
CPU_DD30_2_0GHZ
TABLE_11_HEAD
TABLE_11_HEAD
TABLE_11_HEAD
TABLE_11_HEAD
603-6015
CRITICAL1603-6016
DESCRIPTION
1
IC,U3LITE,V1.1,300MM,PBGA
PART NUMBER
343S0282
QTY
1
QTY
1
1
1
1
1
1
1
ALTERNATE FOR
PART NUMBER
343S0284 U3 343S0321
DESCRIPTION
IC,ASIC,SHASTA,V1.1,PBGA
DESCRIPTION
SPEC,VENDOR PACKAGING PROCEDURE
PCB,FAB,MLB
BARCODE LABEL, MLB, Q45
PCB,SCHEM,MLB
IC,FLASH,1MX8,3.3V,90NS
PURCH ASSY, SMU BIG
HEAT SINK ASSEMBLY 17 IN
HEAT SINK ASSEMBLY 20 IN
PART NUMBER
378S0119
ASICS
BOM OPTION
MISC PARTS
ALTERNATE FOR
PART NUMBER
378S0114
REFERENCE DESIGNATOR(S)
U3 343S0284
REF DES
U3 343S0284
U3 343S0284 343S0320
REFERENCE DESIGNATOR(S)
U2300
REFERENCE DESIGNATOR(S)
VPP1 062-2082
LBL1
SCH1
U7500
U1300
MECH17
MECH20
ALTERNATES
BOM OPTION
REF DES
LED700,LED702,LED5900
BOM OPTION
COMMENTS:
U3L,V1.1,200MM,PBGA
U3L,NEW LAM,200MM
U3L,NEW LAM,300MM
BOM OPTION
BOM OPTION
17_INCH_LCD
20_INCH_LCD
COMMENTS:
KINGBRIGHT LED
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
TABLE_ALT_ITEM
D
C
B
B
TABLE ITEMS
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6599
D
NONE
SHT
5
SCALE
1
REV.
OF
103
A
I
PP5V_ALL
PP5V_PWRON
SHT
1 2
PP5V_RUN
6
PP24V_RUN
PP3V3_RUN
PP1V2_PWRON
PP3V3_PWRON
OF
D
C
B
A
REV.
I
103
7 8
6
5
4
3
PP12V_RUN
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
I3
NO_TEST=YES
I4
NO_TEST=YES
I5
NO_TEST=YES
I6
NO_TEST=YES
I7
NO_TEST=YES
I8
NO_TEST=YES
I9
NO_TEST=YES
I10
NO_TEST=YES
I295
NO_TEST=YES
D
C
B
A
I296
I297
I298
I300
I299
I302
I307
I311
I314
I315
I316
I317
I320
I319
I322
I323
I321
I336
I337
I338
I340
I339
I342
I343
I341
I344
I345
I346
I347
I348
I350
I349
I354
I355
I356
I357
I358
I360
I359
I362
I363
I361
I364
I365
I372
I373
I371
I374
I375
I376
I377
I378
I380
I379
I382
I383
I381
I384
I385
I386
I388
I387
I390
I389
I391
I393
I392
I395
I394
I396
I398
I397
I399
I401
I400
I403
I402
I404
I405
I406
I408
I407
I426
I429
I428
I431
I430
I432
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
TP_BUF_RST
TP_DFPCLK
TP_DFPCLK_L
TP_DFPD0
TP_DFPD1
TP_DFPD2
TP_DFPD3
TP_DFPD5
TP_DFPD6
TP_EXT_TMDS_CKM
TP_EXT_TMDS_CKP
TP_EXT_TMDS_D0M
TP_EXT_TMDS_D0P
TP_EXT_TMDS_D1M
TP_EXT_TMDS_D1P
TP_EXT_TMDS_D2M
TP_EXT_TMDS_D2P
TP_FBBCS1_L
TP_GPU_INTB_L
TP_GPU_THERMA
TP_GPU_THERMC
TP_IFP1VREF
TP_NVAGP_TDO
TP_TMDS_TXD3M
TP_TMDS_TXD3P
TP_TMDS_TXD7M
TP_TMDS_TXD7P
TP_VIPHCLK
TP_FRWRLPS
TP_AGP_MB_AGP8X_DET_L
TP_ATTENTION
TP_ENET_CLK125M_GTX
TP_ENET_TXD<7>
TP_ENET_TXD<4>
TP_ENET_TXD<5>
TP_FW_CLK98M_LCLK
TP_AFN
TP_PSRO1
TP_PSRO2
TP_PSYNCOUT
TP_USB2_PWREN<2>
TP_USB2_PWREN<3>
TP_USB2_PWREN<4>
TP_NEC_AMC
TP_NEC_NANDTEST
TP_NEC_NTEST1
TP_NEC_SMC
TP_NEC_SMI_L
TP_NEC_SRCLK
TP_NEC_SRDATA
TP_NEC_SRMOD
TP_NEC_TEB
TP_NEC_TEST
TP_PLS_CLK_66M_0
TP_PLS_CLK_66M_1
TP_PLS_REF_CML
TP_PLS_TEST1
TP_PLS_TEST2
TP_PLS_TEST3
TP_SB_FSTEST
TP_SB_PLLTEST
TP_VREF_CG
TP_SB_NC_P7
TP_SB_NC_P8
TP_SB_NC_R3
TP_SB_NC_R4
TP_SB_NC_R5
TP_SB_NC_R6
TP_SB_NC_R7
TP_SB_NC_R8
TP_SB_NC_T1
TP_SB_NC_T2
TP_SB_NC_T3
TP_SB_NC_T4
TP_SB_NC_T5
TP_SB_NC_T6
TP_SB_NC_T7
TP_SB_NC_T8
TP_SB_NC_U1
TP_SB_NC_U2
TP_SB_NC_U3
TP_SB_NC_U4
TP_SB_NC_U5
TP_SB_NC_U6
TP_SB_NC_V1
TP_SB_NC_V2
TP_SB_NC_V3
TP_SB_NC_V4
TP_SB_NC_W1
TP_SB_NC_W3
TP_SB_NC_Y1
TP_SB_NC_Y3
TP_SATA_CLK25M
TP_ENET_TCK
TP_USB2_PWREN<0>
TP_USB2_PWREN<1>
TP_DUMMY_A
TP_DUMMY_B
TP_RAM_CKE_R<2>
57
58
58
58
58
58
58
58
58
58
58
58
58
58
58
58
58
52
49
58
58
58
49
58
58
58
58
57
58
48
29
87
87
87
87
90
29
29
29
29
92
92
92
77
77
77
77
77
77
77
77
77
77
27
27
27
27
27
27
25
25
48
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
27
87
92
92
24
24
8
NO_TEST=YES
I434
NO_TEST=YES
I433
NO_TEST=YES
I436
NO_TEST=YES
I435
NO_TEST=YES
I437
NO_TEST=YES
I439
NO_TEST=YES
I438
NO_TEST=YES
I440
NO_TEST=YES
I441
NO_TEST=YES
I442
NO_TEST=YES
I444
NO_TEST=YES
I443
NO_TEST=YES
I445
NO_TEST=YES
I446
NO_TEST=YES
I781
NO_TEST=YES
I809
NO_TEST=YES
I810
GENZ SHOULD USE J1400 FOR THE FOLLOWING NETS:
NO_TEST=TRUE
I782
NO_TEST=YES
I784
NO_TEST=YES
I785
NO_TEST=TRUE
I786
NO_TEST=TRUE
I787
NO_TEST=TRUE
I789
NO_TEST=YES
I788
NO_TEST=YES
I790
NO_TEST=TRUE
I792
NO_TEST=TRUE
I791
NO_TEST=YES
I793
NO_TEST=YES
I794
NO_TEST=YES
I795
NO_TEST=YES
I796
NO_TEST=YES
I797
NO_TEST=YES
I798
NO_TEST=YES
I799
NO_TEST=YES
I800
NO_TEST=YES
I801
NO_TEST=YES
I802
NO_TEST=YES
I803
NO_TEST=YES
I804
NO_TEST=YES
I805
NO_TEST=YES
I806
NO_TEST=YES
I807
NO_TEST=YES
I808
TP_RAM_CKE_R<3>
TP_RAM_CKE_R<6>
TP_RAM_CKE_R<7>
TP_RAM_CS_L_R<10>
TP_RAM_CS_L_R<11>
TP_RAM_CS_L_R<2>
TP_RAM_CS_L_R<3>
TP_RAM_MUXEN0
TP_RAM_MUXEN4
TP_NB_PM_SLEEP0
TP_J4000_SJRESET_L
TP_J4001_SJRESET_L
TP_CMP_SPARE
TP_ENET_TXD<6>
U2100_UNUSED
PLS_CLK_66M_0_R
PLS_CLK_66M_1_R
EI_CPU_TO_NB_AD<0..43>
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_N<0..1>
EI_CPU_TO_NB_SR_P<0..1>
EI_NB_TO_CPU_AD<0..43>
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_CLK_P
EI_NB_TO_CPU_SR_N<0..1>
EI_NB_TO_CPU_SR_P<0..1>
CHKSTOP_L
CPU_HRESET_L
CPU_INT_L
CPU1_HTBEN
EI_CPU1_CLK_N
EI_CPU1_CLK_P
EI_QACK_L
EI_QREQ_L
EI_SE
I2C_SMU_A_SCL_OUT_L
I2C_SMU_A_SDA_OUT_L
MCP_L
RI_L
SYNCENABLE
TP_PROC_TRIGGER_OUT
EI_CPU1_SYNC
8
8
8
8
8
8
8
8
8
24
40
40
87
21
27
27
29
28
14
29
28
14
29
28
14
29
28
14
29
28
14
28
29
14
29
28
14
29
28
14
29
28
14
29
28
14
29
14
8
30
29
14
30
29
25
14
14
27
14
27
14
28
29
14
28
30
29
14
28
30
29
14
14
18
13
14
18
13
29
14
29
30
14
29
30
14
29
14
27
14
90
IN
90
IN
90
IN
90
IN
90
IN
90
IN
90
IN
90
IN
90
IN
90
IN
90
IN
73 74 75 76 77
IN
73 74 76 77
IN
8
IN
74 76
IN
74 76
IN
25 76
IN
8
51 58 74
IN
73 74 76 77
IN
73 74 76 77
IN
73 74 76 77
IN
73 74 76 77
IN
73 74 76 77
IN
73 74 76 77
IN
76
IN
74 75 76
IN
74 75 76
IN
74 75 76
IN
75 76
IN
76
IN
92
IN
92
IN
92
IN
92
IN
92
IN
92
IN
92
IN
92
IN
92
IN
92
IN
92
IN
25 76 94
IN
25 94
IN
25 94
IN
25 76 94
IN
25 76 94
IN
25 94
IN
25 94
IN
18 94
IN
18 94
IN
94
IN
94
IN
25 94
IN
25 94
IN
94
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
7
59
IN
59
IN
59
IN
59
IN
56 57 59
IN
56 57 59
IN
59
IN
59
IN
58 59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
59
IN
8
33
IN
36
IN
36
IN
36
IN
36
IN
33 36
IN
33 36
IN
FW_VP_PORT1
FW_TPO1P
FW_TPO1N
FW_TPI1P
FW_TPI1N
FW_VP_PORT2
FW_TPO2P
FW_TPO2N
FW_TPI2P
FW_TPI2N
FW_VGND
PCI_AD<31..0>
PCI_CBE_L<3..0>
PCI_CLK33M_AIRPORT
PCI_SLOTA_REQ_L
PCI_SLOTA_GNT_L
PCI_SLOTA_INT_L
PCI_RESET_L
PCI_FRAME_L
PCI_TRDY_L
PCI_IRDY_L
PCI_STOP_L
PCI_DEVSEL_L
PCI_PAR
PCI_SLOTA_IDSEL
ROM_CS_L
ROM_OE_L
ROM_WE_L
ROM_ONBOARD_CS_L
AIRPORT_CLKRUN_L_PD
USB_BT_N
USB_BT_P
USB2_PORT1_N_F
USB2_PORT1_P_F
USB2_PORT2_N_F
USB2_PORT2_P_F
USB2_PORT3_N_F
USB2_PORT3_P_F
PP5V_USB2_PORT1_F
PP5V_USB2_PORT2_F
PP5V_USB2_PORT3_F
I2S1_DEV_TO_SB_DTI
I2S1_SYNC
I2S1_BITCLK
I2S1_MCLK
I2S1_SB_TO_DEV_DTO
I2S1_RESET_L
MODEM_RING2SYS_L
I2C_UDASH_SDA
I2C_UDASH_SCL
USB_UDASH_N
USB_UDASH_P
UDASH_SDOWN
UDASH_RESET_L
UDASH_I2C_A1_PU
PPVCC_TMDS
PP3V3_DDC
TD0M
TD0P
TD1M
TD1P
TD2M
TD2P
TCKM
TCKP
TMDS_DDC_DAT
TMDS_DDC_CLK
GND_CHASSIS_TMDS
FILT_ANALOG_RED
FILT_ANALOG_GRN
FILT_ANALOG_BLU
ANALOG_HSYNC_L
ANALOG_VSYNC_L
VGA_IIC_CLK
VGA_IIC_DAT
MON_DETECT
DDC_VCC_5
PP24V_INV
GND_20_INV
INV_20_LCD_PWM_
INV_20_CUR_HI_F
PP12V_INV
GND_17_INV
PP5V_AGP_RL
INV_17_LCD_PWM_F
LAMP_STS_F
INV_17_CUR_HI_F
CPU_VID_R<5..0>
KPVDD2_FMAX
KPGND2_FMAX
TDIODE_POS_FMAX
TDIODE_NEG_FMAX
CORE_ISNS_M
CORE_ISNS_P
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
10 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
12 TEST POINTS
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
7
11
11 18
11 18
7
83
7
83
PP12V_RUN
IN
PP5V_ALL
IN
PP5V_RUN
IN
PP3V3_RUN
IN
PP24V_RUN
IN
=PP5V_DISK
IN
=PP12V_DISK
IN
GND
IN
PP2V5_RUN
PP2V5_RUN
IN
PP1V5_RUN
IN
PP5V_PWRON
11 18
IN
PP3V3_PWRON
11 18 27
IN
PP1V2_PWRON
IN
PPVCORE_PWRON_SB
3
10
IN
=PP3V3_ALL_SMU
7 8
13
IN
=PP5V_RUN_CPU
3 7 8
31
IN
PPVCORE_NB
7
22
IN
PPVCORE_CPU
7
33 34 35
IN
PP12V_CPU
33 34
IN
VCORE_SENSE_GND
33
IN
VCORE_SENSE_VOUT
33
IN
SMU_MANUAL_RESET_L
7 8
IN
SYS_POWER_BUTTON_L
7
13
IN
POWER_BUTTON_L
7
IN
RESET_BUTTON_L
7
IN
SMU_RESET_L
13
8
IN
SYS_POWERUP_L
7
10 11 13 33
IN
SYS_SLEEP
8 9
10 11 46 50
IN
SYS_POWERFAIL_L
8
13
IN
EXT_POWER_BUTTON_L
IN
U900_FEEDBACK
9
IN
U2200_FEEDBACK
22
IN
ANALOG_RED
57 59
IN
ANALOG_GRN
57 59
IN
ANALOG_BLU
57 59
IN
AUDIO_LI_DETECT_L
IN
25
IN
75
IN
80 83
IN
80 83
IN
80 83
IN
80 83
IN
80 83
IN
83
IN
80 83
IN
6
6
80 83
IN
80 83
83
IN
80 83
IN
83
IN
83
IN
83
IN
31 36
IN
76
IN
76
IN
AUDIO_LO_DET_L
ROM_WP_L
UATA_DD<15..0>
UATA_DA<2..0>
UATA_CS0_L
UATA_CS1_L
UATA_RESET_L
UATA_DSTROBE_R
UATA_HSTROBE
UATA_STOP UATA_STOP
UATA_DMARQ_R
UATA_DMACK_L
UATA_INTRQ_R
UATA_IOCS16_PU
UATA_CSEL_PD
TDIODE_NEG
TP_AIRPORT_PME_L
TP_AIRPORT_RF_DISABLE
101
2 TEST POINTS
2 TEST POINTS
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
PP1V5_RUN
FUNC TEST
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6599
APPLE COMPUTER INC.
D
SCALE
NONE
8
6 7
5
4
3
2
1
7 8
PP12V_RUN
D
POWER_GOOD
8
SYS_POWERUP_L
33
13
10
6
11
C
PP5V_ALL
R710
330
5%
1/16W
MF
603
13
2 1
ITS_PLUGGED_IN
LED702
GREEN
2.0X1.25A
SILKSCREEN:1
SYS_POWER_BUTTON_L
7
6
B
SYS_POWER_BUTTON_L
7
6
13
DEVELOPMENT
R712
1/16W
8
6
1K
402
5%
MF
SYS_RESET_BUTTON_L
13
A
PP5V_RUN
PP5V_ALL
90
59
1
2
2 1
SMU_MANUAL_RESET_L
PP3V3_RUN
CRITICAL
J700
HM96110-P2
F-RT-TH
1
2
3
4
5
6
7
8
9
10
11
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
PP3V3_ALL
11
7
PP3V3_PWRON
FERR-EMI-100-OHM
1
C703
0.1UF
20%
10V
2
CERM
PART NUMBER
516S0249
R713
1K
1/16W
402
DEVELOPMENT
RESET
P/N 518-0159
CRITICAL
U700
74LCX125
14
2
3
125
TSSOP
17
R700
330
2 1
ITS_ALIVE
5%
1/16W
MF
603
LED700
2.0X1.25A
SILKSCREEN:2
L700
2 1
SYS_PWR_BTN_FILT
SM
402
L701
FERR-EMI-100-OHM
2 1
5%
MF
SW701
SPST
SM
2 1
SM
ALTERNATE FOR
PART NUMBER
516S0248
SUYIN WILL NOT BE USED FOR INITIAL RAMP
SW702
2 1
4 3
POWER
SW700
SPST
SM
SMU RESET
PP24V_RUN
PP12V_RUN
12
13
14
15
16
17
18
19
20
21
22
VOLTAGE=0V
1
C700
0.1UF
20%
10V
2
CERM
402
SYS_POWERUP_L_BUF
PP3V3_RUN
1
GREEN
2
GND_SYS_PWR_BTN_FILT
BOM OPTION
SPST
SM
2 1
1
2
4 3
2 1
4 3
PP5V_RUN
DEVELOPMENT
R701
330
5%
1/16W
MF
603
CRITICAL
SW703
PWR-BUTT
ST-SM3
1
2
5 4
REF DES
SW703
POWER_BUTTON_L
RESET_BUTTON_L
C705
0.1UF
20%
10V
CERM
402
2 1
ITS_RUNNING
DEVELOPMENT
LED701
GREEN
2.0X1.25A
SILKSCREEN:RUN
SILKSCREEN:POWER
3
516S0248
FOXCONN
COMMENTS:
POWER SWITCH - SUYIN
6
6
1
C704
0.1UF
20%
10V
2
CERM
402
35
31
=PP1V2_EI_CPU
18 18
14 14
30
29 28
8
6
PP24V_RUN
VOLTAGE=24V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
PP12V_RUN
VOLTAGE=12V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
PP5V_RUN
PP3V3_RUN
1
2
TABLE_ALT_HEAD
PP2V5_RUN
PP1V5_RUN
35
XW700
XW704
XW701
XW705
VOLTAGE=5V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
MAKE_BASE=TRUE
VOLTAGE=2.5V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.5V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PPVCORE_CPU
6
34
33
MAKE_BASE=TRUE
EI OVDD POWER OPTIONS
5
RUN RAILS
ONLY ON IN RUN
SM
2 1
PP12V_AUDIO_CODEC
SM
2 1
SM
2 1
PP12V_AUDIO_SPKRAMP
SM
2 1
ALIAS
ALIAS
ALIAS
PP1V5_RUN
=PP24V_GRAPHICS
=PP12V_AGP
=PP12V_RUN_CPU
=PP12V_DISK
=PP5V_PATA
=PP5V_DISK
=PP5V_AGP
=PP5V_RUN_CPU
PP5V_AUDIO
=PP5V_RUN_RAM
=PP3V3_AGP
PP3V3_AUDIO
=PP3V3_RUN_CPU
=PP3V3_PATA
=PP3V3_SB_PCI
=PP3V3_PCI
=PPVIO_PCI_USB2
=PP3V3_DISK
PP2V5_GPU
=PP2V5_RUN_CPU
=PP2V5_RUN_RAM
=PP1V5_AGP
=PPVCORE_PULSAR
=PPVCORE_CPU
59
50
59
33
6
83
102
100
83
83
6
49
50
59
31
8
6
3
101
46
49
48
50
52
51
102
101
100
95
33
83
74
25
77
76
75
74
77
83
55
54
52
50
31
46
45
44
48
49
26
7
31
36
32
29
VOLTAGE=1.2V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
=PP1V2_HT
=PP1V2_PULSAR
1
5%
1/10W
FF
805
5%
1/10W
FF
805
0
0
R715
1/10W
2 1
2 1
1
R711
0
0
5%
5%
1/10W
FF
FF
805
805
2
2
NOSTUFF
R708
1/10W
1
0
5%
FF
805
2
NOSTUFF
1
R709
0
5%
1/10W
FF
805
2
PP1V2_EI_NB
VOLTAGE=1.2V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
36
32
31
PP1V2_EI_CPU
VOLTAGE=1.2V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
6 7
=PPVCORE_CPU
29
7
NOSTUFF
R705
1/10W
1
1
1/10W
R718
0
0
5%
5%
1/10W
FF
FF
805
805
2
2
R703
R719
NOSTUFF
1
1
R706
0
0
5%
5%
1/10W
FF
FF
805
805
2
2
R704
5
4
PWRON RAILS
ON IN RUN AND SLEEP
PP5V_PWRON
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
PP3V3_PWRON
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
PP2V5_PWRON
VOLTAGE=2.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
PP1V5_PWRON
59 58 57
56
103
PP1V2_RUN
NOSTUFF
R716
0
5%
1/10W
FF
805
NOSTUFF
R717
0
5%
1/10W
FF
805
MAKE_BASE=TRUE
VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PP1V2_PWRON
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.2V
24
60
26
2 1
PP1V25_RAM_VTT
2 1
=PP1V2_EI_NB
44
45
46
ALIAS
R707
21
2512
4
3
_PP5V_PWRON_USB
_PP5V_PWRON_UDASH
=PP5V_PWRON_CPU
=PP5V_PWRON_AIRPORT
=PP3V3_PWRON_SB
=PPPCI64_PWRON_SB
=PPPCI32_PWRON_SB
_PP3V3_PWRON_MODEM
=PP3V3_PWRON_USB
PP3V3_PWRON_ENET
_PP3V3_PWRON_BT
_PP3V3_PWRON_UDASH
=PP3V3_PWRON_CPU
=PP3V3_PWRON_EI
=PP2V5_PWRON_SB
=PP2V5_PWRON_RAM
=PP2V5_HT
=PP2V5_PWRON_HT
=PP1V5_PWRON_NB_AVDD
=PPVCORE_PWRON_PULSAR
0
PPVCORE_NB
5%
1W
FF
=PP1V2_PWRON_HT
=PP1V2_PWRON_DISK_SB
=PP1V2_PWRON_SB
=PP3V3_ALL_RTC
13
3
92
94
36
76
23
74
25
23
23
94
91
87
92
94
36
28
23
25
74
26
37
40
60
64
62
28
60
37
48
26
22
6
62
80
25
PP3V3_ALL_RTC
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
ALL RAILS
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
PP3V3_ALL
59
7
11
90
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PP5V_ALL
11
6
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
PP5V_ALL
=PP3V3_ALL_SMU
=PP3V3_ALL_EI
=PP3V3_ALL_CPU
=PP5V_ALL_CPU
GND RAILS
XW702
SM
XW706
SM
XW703
SM
XW707
SM
2 1
2 1
2 1
2 1
GND_AUDIO
102
88
GND_AUDIO_SPKRAMP
102
100
CHASSIS GND
GND_CHASSIS_AUDIO_EXTERNAL
102
101
MIN_NECK_WIDTH=15MIL
MAKE_BASE=TRUE
VOLTAGE=0
MIN_LINE_WIDTH=25MIL
GND_CHASSIS_VGA
59
GND_CHASSIS_USB
92
GND_CHASSIS_FIREWIRE
90
GND_CHASSIS_TMDS
6
59
MIN_NECK_WIDTH=15MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=0
GND_CHASSIS_RJ45
87
MIN_NECK_WIDTH=15MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=0
GND_CHASSIS_AUDIO_INTERNAL
101
MAKE_BASE=TRUE
GND_CHASSIS_LED
21
GND_CHASSIS_17_INCH_INVERTER
59
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=0
GND_CHASSIS_20_INCH_INVERTER
59
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=0
SDF700 IS USED FOR CPU HEATSINK MOUNTING
ALIAS
ZH701
315R138
1
ALIAS
ZH703
6.00MM-PTH
1
NOSTUFF
SDF700
HSK-NUT-6.5MM
TH
1
RTC BATTERY
ALWAYS ON (TRICKLE)
DS700
SM
21
PP3V3_ALL_BATT_SAFETY
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MBR0530
R702
1K
5%
1/16W
MF
402
2 1
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
POWER CONN / ALIAS
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6599
APPLE COMPUTER INC.
2
D
SCALE
NONE
1 2
SH700
1
SHLD-IO-CONN
Q45-TH1
805-5664
PP3V3_ALL_BATT
SHT
7
1
8
6
13
36
36
ZH700
315R138
1
4
3 2
CRITICAL
J702
BB10209-A5
OF
ZH702
7R4.15
1
12
TH
REV.
103
D
C
B
A
I
7 8
6
5
4
3
1 2
PCI CLOCKS
TP_NB_THMI
MAKE_BASE=TRUE
TP_THMO
MAKE_BASE=TRUE
TP_RAM_CKE_R<2>
6
MAKE_BASE=TRUE
TP_RAM_CKE_R<3>
6
MAKE_BASE=TRUE
TP_RAM_CKE_R<6>
6
MAKE_BASE=TRUE
TP_RAM_CKE_R<7>
6
MAKE_BASE=TRUE
TP_RAM_MUXEN0
6
MAKE_BASE=TRUE
TP_RAM_MUXEN4
D
6
MAKE_BASE=TRUE
TP_RAM_CS_L_R<2>
6
MAKE_BASE=TRUE
TP_RAM_CS_L_R<3>
6
MAKE_BASE=TRUE
TP_RAM_CS_L_R<10>
6
MAKE_BASE=TRUE
TP_RAM_CS_L_R<11>
6
MAKE_BASE=TRUE
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
DIAG LED
LED850P1
1
LED850
RED
SM
2
LED850P2
R851
1K
DIAG_LED
13
MAKE_BASE=TRUE
5%
1/16W
MF
402
2 1
DIAG_LED_R
RAM_CKE_R<2>
RAM_CKE_R<3>
RAM_CKE_R<6>
RAM_CKE_R<7>
RAM_MUXEN0
RAM_MUXEN4
RAM_CS_L_R<2>
RAM_CS_L_R<3>
RAM_CS_L_R<10>
RAM_CS_L_R<11>
PP5V_ALL
1
R850
180
5%
1/16W
MF
402
2
3
1
2
NB_THMI
NB_THMO
Q850
2N3904
SM
24
24
37
37
37
37
37
37
37
37
37
PCI_CLK33M_USB2
MAKE_BASE=TRUE
TP_PCI_CLK_GP1
MAKE_BASE=TRUE
PCI_CLK33M_AIRPORT
6
MAKE_BASE=TRUE
TP_PCI_CLK_P4
MAKE_BASE=TRUE
PCI_CLK33M_SB_EXT
74
27 27
MAKE_BASE=TRUE
TP_ALS0_OUT
MAKE_BASE=TRUE
TP_ALS1_OUT
MAKE_BASE=TRUE
TP_ALS_GAIN_BOOST
MAKE_BASE=TRUE
TP_SMU_ONEWIRE
MAKE_BASE=TRUE
TP_SYS_SLOT_PWR
MAKE_BASE=TRUE
TP_SMU_PWRSEQ_P1_3
MAKE_BASE=TRUE
TP_SYS_DOOR_AJAR_L
MAKE_BASE=TRUE
TP_FAN_PWM8
MAKE_BASE=TRUE
TP_SYS_DRIVE_BAY_INT_L
MAKE_BASE=TRUE
SMU_WARM_RESET_L
13
8
MAKE_BASE=TRUE
PCI_RESET_L
6
74
58
51
MAKE_BASE=TRUE
C
CPU VID<0:5>
VID CONTROLLED BY SMU
R819
0
20%
10V
402
5%
1/16W
MF
402
R821
0
5%
1/16W
MF
402
R823
0
5%
1/16W
MF
402
1
2
2 1
R820
0
2 1
5%
1/16W
MF
2 1
402
R822
0
2 1
5%
1/16W
MF
2 1
402
R824
0
2 1
5%
1/16W
MF
402
14
NOSTUFF
F-ST-SM
J803
BM12B-SRSS-TB
5
VOLTAGE DETECTOR
MC33465N_30ATR
R810
0
2 1
5%
1/16W
MF
402
2
1
NOTE:PULL UP CPU_VID<5>TO
2.2V FOR CPU VRM10.
2
VCC
U890
SM
RESET DELAY
NOSTUFF
GND
3
CPU_VID<0>
13
CPU_VID<1>
13
CPU_VID<2>
13
CPU_VID<3>
13
CPU_VID<4>
13
CPU_VID<5>
13
B
=PP3V3_ALL_SMU
13
6
7
NOSTUFF
C800
0.1uF
CERM
SMU_MANUAL_RESET_L
6
8
7
NOSTUFF
1
C890
0.01UF
10%
A
16V
CERM
402
2
CPU_VID_R<0>
CPU_VID_R<1>
CPU_VID_R<2>
CPU_VID_R<3>
CPU_VID_R<4>
CPU_VID_R<5>
9876543
1
2
1
NOSTUFF
R890
1K
5%
1/16W
MF
402
121110
NOSTUFF
1
C891
1uF
10%
6.3V
2
CERM
402
1
R814
10K
5%
1/16W
MF
402
2
NOSTUFF
1
R832
1K
13
2
SMU_RESET_L
5%
1/16W
MF
402
1
R816
10K
5%
1/16W
MF
402
2
NOSTUFF
1
R831
1K
5%
1/16W
MF
402
2
PULSAR ERROR_L LED BACKUP SMU RESET CIRCUIT
13
6
CLOCK_ERROR_L
27
DEVELOPMENT
ALIAS
ALIAS
ALIAS
SMU
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
1
R817
10K
5%
1/16W
MF
402
2
NOSTUFF
1
R830
1K
5%
1/16W
MF
402
2
R801
4.7K
1/16W
5%
MF
402
PCI_CLK_GP0
=PCI_CLK33M_USB2
PCI_CLK_GP1
PCI_CLK_P3
_PCI_CLK33M_AIRPORT
PCI_CLK_P4
PCI_CLK_P1
ALS0_OUT
ALS1_OUT
ALS_GAIN_BOOST
SMU_ONEWIRE
SYS_SLOT_PWR
SMU_PWRSEQ_P1_3
SYS_DOOR_AJAR_L
FAN_PWM8
SYS_DRIVE_BAY_INT_L
NB_WARM_RESET_L
PCI_AIRPORT_RESET_L
GPU_RESET_L
=PCI_ROM_RESET_L
=PCI_USB2_RESET_L
1
2
PP3V3_RUN
1
2
R808
10K
5%
1/16W
MF
402
NOSTUFF
1
R829
1K
5%
1/16W
MF
402
2
DEVELOPMENT
1
R800
330
5%
1/16W
MF
402
2
ERROR_LED
1
2
1
R809
10K
5%
1/16W
MF
402
2
NOSTUFF
1
2
DEVELOPMENT
D810
RED
SM
PP3V3_RUN
R827
1K
5%
1/16W
MF
402
27
77
27
27
76
27 37
13
13
13
13
13
13
13
13
13
24
76
49
75
77
1
R804
10K
2
5%
1/16W
MF
402
6
6
6
6
6
6
1
R811
20K
5%
1/16W
MF
402
2
ELECTRICAL_CONSTRAINT_SET
SMU_RESET
I246
SMU_RESET
I247
PP2V5_PWRON
SMU_WARM_RESET_L SYS_WARM_RESET_L
13 25
8 8
SMU_SLEEP
13
NB_SUSPEND_ACK_L
24
SMU_BOOT_SCLK
13
SMU_BOOT_CE
33
33
33
33
33
33
13
SMU_BOOT_CNVSS
13
NET_SPACING_TYPE
10 MIL SPACING
10 MIL SPACING
1
R870
4.7K
5%
1/16W
U700
MF
402
2
R806
10K
1/16W
74LCX125
14
9
8
125
TSSOP
7
10
U700
74LCX125
14
5
6
125
TSSOP
47
U700
74LCX125
14
11
12
125
TSSOP
7
13
PP3V3_ALL
NOSTUFF
1
1
R807
10K
5%
5%
1/16W
MF
MF
402
402
2
2
J802 & R826 CAN MOVE TO DEVELOPMENT BOM POST RAMP
PLL LOCK LED
=PP5V_RUN_CPU
31
8
7
6
3
DEVELOPMENT
1
R837
DEVELOPMENT
180
5%
Q802
1/16W
2N3906
29
PLLLOCK
DEVELOPMENT
R839
180
5%
1/16W
MF
402
2 1
Q803_B
MF
402
2
Q803_C
1
Q802_B
DEVELOPMENT
1
R838
1K
5%
1/16W
MF
402
2
3
DEVELOPMENT
Q803
2N3904
SM
2
SM
1
DIFFERENTIAL_PAIR
SYS_SLEEP
NB_SUSPENDACK_L
DOWNLOAD
CONNECTOR
J802
HC17051
M-ST-TH
1
2
J802_2
4 3
6 5
J802_6
8 7
9
10
R835
180
5%
1/16W
MF
402
DEVELOPMENT
LED802
GREEN
2.0X1.25A
NOSTUFF
R805
1/16W
518-0158
2
3
Q802_E
DEVELOPMENT
1
2
LED802_1
1
2
402
10
9
6
13
1
0
5%
MF
2
14
6
29
SYS_COLD_RESET_L
SYS_WARM_RESET_L
87
77
74
46
50
11
R826
100
21
5%
1/16W
MF
402
SMU_MANUAL_RESET_L
1
R803
10K
5%
1/16W
MF
402
2
CHKSTOP_L
NB_PMR_OBSV
24
SMU_BOOT_BUSY
SMU_BOOT_RXD
(SMU_BOOT_EPM)
SMU_BOOT_TXD
=PP5V_RUN_CPU
3
31
8
7
6
DEVELOPMENT
R836
180
2 1
5%
Q801_B
1/16W
MF
402
24
13
8
77
74
25
87
U.FL-R_SMT
13
13
13
6
8
7
13
NOSTUFF
C801
2.2UF
CHKSTOP LED
DEVELOPMENT
1
R834
180
5%
1/16W
MF
402
2
Q800_G
3
DEVELOPMENT
1
Q801
2N3904
SM
2
DEVELOPMENT
J800
F-ST-SM
3
1
2
518S0104
PP3V3_ALL_SMU_AVCC
1
20%
10V
2
CERM
805
DEVELOPMENT
1
R833
180
5%
1/16W
MF
402
2
LED801_1
1
2
Q800_D
3
DEVELOPMENT
D
Q800
2N7002
1
SM
G
S
2
SMU ANALOG VREF
NOSTUFF
1
R818
200
1%
1/16W
MF
402
NOSTUFF
2.5V
SSOT-23
VR801
DEVELOPMENT
LED801
RED
SM
2
1 2
3
PPVREF_SMU
MAKE_BASE=TRUE
R802
0
5%
1/16W
MF
402
NOSTUFF
1
C802
0.47UF
20%
10V
2
CERM
603
NOSTUFF
R828
0
5%
1/16W
MF
402
2 1
PPVREF_SMU_ADC_REF
GND_SMU_AVSS
2 1
GND_SMU_AVSS_DAGND
HS_SDF800 HS_SDF801 HS_SDF802
1
2
HS_SDF803
1
2
=PPVREF_SMU
SDF800
HSK-NUT-6.5MM
1
C880
0.01UF
20%
16V
CERM
402
SDF803
HSK-NUT-6.5MM
1
C883
0.01UF
20%
16V
CERM
402
POWER_FAIL_L
CONNECTION
POWER_GOOD
7
13
36
33
13
36
STDOFF-6MMOD1MMH-TH
36
CPU HEATSINK SMT NUTS
NOSTUFF
TH
1
2
NOSTUFF
TH
HS_SDF804
1
2
PP3V3_ALL
NOSTUFF
1
1
R812
R813
10K
430
5%
5%
1/16W
1/16W
MF
MF
402
2
1
2
402
2
SYS_POWERFAIL_L
R860
4.7K
POWER_GOOD IS A 5V DRIVEN
5%
SIGNAL FROM POWER SUPPLY
1/16W
MF
402
2K PULLUP INSIDE P/S
AIRPORT CARDGUIDE
SMT NUTS
SDF890
1
HSK-NUT-6.5MM
C881
0.01UF
20%
16V
CERM
402
6P15R5P4
C884
0.01UF
20%
16V
CERM
402
STDOFF-6MMOD1MMH-TH
NOSTUFF
SDF801
TH
1
1
C882
0.01UF
20%
16V
2
CERM
402
OMIT
ZH804
1
SDF700 IS ALSO
USED FOR HEATSINK
MOUNTING
13
6
SDF891
1
NOSTUFF
SDF802
HSK-NUT-6.5MM
TH
1
D
C
B
SIGNAL ALIAS
A
I
SHASTA JTAG
TP_JTAG_SB_TCK
MAKE_BASE=TRUE
TP_JTAG_SB_TDI
MAKE_BASE=TRUE
TP_JTAG_SB_TDO
MAKE_BASE=TRUE
TP_JTAG_SB_TMS
MAKE_BASE=TRUE
PULL DOWN
25
THESE PINS HAVE INTERNAL PULLUPS
ALIAS
ALIAS
ALIAS
ALIAS
JTAG_SB_TRST_L
JTAG_SB_TCK
JTAG_SB_TDI
JTAG_SB_TDO
JTAG_SB_TMS
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
1
25
25
25
25
R825
10K
5%
1/16W
MF
402
2
APPLE COMPUTER INC.
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
SCALE
REV.
OF
8
103
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
D
D
2.5V VOLTAGE REGULATOR
1
1
PP5V_PWRON
G
G
U900_VC_D
4
D
Q901
NTD70N03R
CASE369
S
3
Q902_DRAIN
4
D
Q902
NTD70N03R
CASE369
S
3
1
D902
MBR0520L
SM
2
1
C917
1UF
20%
10V
2
CERM
603
NOSTUFF
1
R904
1.1K
5%
1/8W
FF
1206
2
R904_P2
1
2
NOSTUFF
C912
1UF
20%
25V
CERM
1206
1
C901
10UF
20%
6.3V
2
CERM
1206
CRITICAL
L901
1.6UH
TH
1
2
2 1
CRITICAL
C902
390UF
20%
6.3V
ELEC
8X11.5-TH
NOSTUFF
1
C907
3300PF
10%
50V
2
CERM
603
1
C903
390UF
20%
6.3V
2
ELEC
8X11.5-TH
1
R903
11K
1%
1/16W
MF
402
2
1
R905
10K
1%
1/16W
MF
402
2
1
2
PP5V_PWRON
D900
21
1
R900
4.7
5%
1/10W
FF
805
2
26
VCC
VC
U900
SOI
GND
4
U900_VC
HD
LD
FB
1
C904
1UF
C
20%
25V
2
CERM
805
IRU3037CS
1
C915
0.47UF
20%
10V
2
CERM
603
U900_SS
U900_COMP
1
R901
27.4K
1%
1/16W
MF
402
2
R901_P2
1
C914
3900PF
5%
50V
2
CERM
603
1
C913
2
8
7
56PF
5%
50V
CERM
402
SS
COMP
5
U900_GATE_H
3
U900_GATE_L
1
U900_FEEDBACK
6
U900_VC_R
1
C916
1UF
20%
25V
2
CERM
805
1
C906
220PF
5%
25V
2
CERM
402
MBR0520L
D901
21
MBR0520L
R902
0
5%
1/10W
FF
805
SM
SM
2 1
Q901_GATE
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
NOSTUFF
1
C905
0.022UF
10%
50V
2
CERM
603
NOTE:
SET OUTPUT=2.62V FOR FRAMEBUFFER.
IRU3037CS VREF=1.25VDC
VOUT=VREF*(R903+R905)/R905=2.62VDC
PEAK CURRENT OF TOTAL RAILS
12.68A WITH DIMM TERMINATION
9.24A WITHOUT DIMM TERMINATION
PP2V5_PWRON
VOLTAGE=2.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
C908
1800UF
20%
6.3V
ELEC
TH-KZJ
1
2
C909
1800UF
20%
6.3V
ELEC
TH-KZJ
3
2
1
Q903
IRF7410
SO-8
S
G
4
8
7
D
6
5
LOW TO ENABLE
SYS_SLEEP
PP2V5_RUN
8 6
C
50 46 11 10
U900_FEEDBACK
B
B
2.5V VREG
A
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
9
SCALE
REV.
OF
103
A
I
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
SHASTA CORE VOLTAGE REGULATOR
D
PP5V_ALL
D1000
21
1
R1002
4.7
5%
1/10W
FF
805
2
26
VCC
VC
U1000
SOI
GND
4
U1000_VC
HD
LD
FB
1
C1004
1UF
20%
25V
2
CERM
805
8
7
1
C1013
68PF
5%
50V
2
CERM
603
SS
COMP
IRU3037ACS
PP3V3_ALL
U1000_SS
1
R1007
100K
5%
1/16W
MF
402
2
C
TURN_ON_SHASTA_CORE_L
3
NOSTUFF
SYS_POWERUP_L
6
11
10
13
33
7
R1011
1/16W
402-1
R1010
0
2 1
Q1000_G
5%
1/16W
MF
402
0
2 1
5%
MF
3
D
Q1000
2N7002
1
SM
G
S
2
1
C1015
0.1UF
20%
16V
2
CERM
603
U1000_COMP
1
R1001
27.4K
1%
1/16W
MF
402
2
R1001_P2
1
C1014
3900PF
5%
50V
2
CERM
603
U1000_VC_R U1000_VC_D
1
C1000
1UF
20%
25V
2
CERM
805
5
U1000_GATE_H
3
U1000_GATE_L
1
U1000_FEEDBACK
1
C1006
220PF
5%
25V
2
CERM
402
MBR0520L
D1001
21
MBR0520L
R1000
0
5%
1/10W
FF
805
SM
SM
2 1
Q1001_GATE
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
NOSTUFF
1
C1005
0.022UF
10%
50V
2
CERM
603
1
PP5V_ALL
D
1
G
S
G
4
Q1001
NTD60N02R
CASE369
3
Q1002_DRAIN
4
D
Q1002
NTD70N03R
CASE369
S
3
1
D1002
MBR0520L
SM
2
1
C1017
1UF
20%
10V
2
CERM
603
NOSTUFF
1
R1004
1.1K
5%
1/8W
FF
1206
2
R1004_P2
1
2
NOSTUFF
C1012
1UF
20%
25V
CERM
1206
1
C1001
10UF
20%
6.3V
2
CERM
1206
L1001
1.6UH
TH
U1000_FEEDBACK
1
C1002
390UF
20%
6.3V
2
ELEC
8X11.5-TH
2 1
NOSTUFF
1
C1007
3300PF
10%
50V
2
CERM
603
1
C1003
390UF
20%
6.3V
2
ELEC
8X11.5-TH
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=15MIL
1
R1003
5.11K
1%
1/16W
MF
402
2
1
R1005
10K
1%
1/16W
MF
402
2
NOTE:
SET OUTPUT=1.2V
IRU3037ACS VREF=0.8VDC
VOUT=VREF*(R1003+R1005)/R1005=1.206VDC
PEAK CURRENT OF TOTAL RAILS
5.96A
1
C1008
1800UF
20%
6.3V
2
ELEC
TH-KZJ
1
C1009
1800UF
20%
6.3V
2
ELEC
TH-KZJ
PPVCORE_PWRON_SB
=PPVCORE_PWRON_SB
10
6
3
23
D
C
PP1V2_PWRON FET SWITCH
PEAK CURRENT 0.6A
PP1V2_PWRON
B
Q1006
2 1
SI3446DV
TSOP
R1009
100K
21
5%
1/16W
MF
402
Q1005_G
NOSTUFF
R1013
0
5%
1/16W
MF
402-1
PP5V_ALL
2 1
R1012
0
5%
1/16W
MF
402
PP3V3_ALL
1
R1014
100K
5%
1/16W
MF
402
TURN_ON_PP1V2_L
3
SYS_POWERUP_L
6
11
10
13
33
7
2
Q1006_G
1
521
RDSON=0.06 OHM
@ VGS=2.5 V
4
36
3
D
Q1005
2N7002
SM
G
S
2
PP1V2_RUN FET SWITCH
PEAK CURRENT 4.43A
PPVCORE_PWRON_SB PPVCORE_PWRON_SB
3 3
10 10
PP5V_ALL
6 6
R1008
100K
21
5%
1/16W
MF
402
Q1004
2N7002DW
SOT-363
8765
Q1003_G
5
G
Q1003
SI9426DY
SOI
I70
4
3
D
S
4
6
D
S
1
321
RDSON=0.016 OHM
@ VGS=2.5 V
Q1004
2N7002DW
SOT-363
2
G
PP1V2_RUN
SYS_SLEEP
B
6
11
46
50
9
8
1.2V VREG
A
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
10
SCALE
REV.
OF
103
A
I
8
6 7
5
4
3
2
1
3
7
6
6
PP5V_ALL
5
7 8
11
4
1 2
D
PP5V_RUN
18
6
100K
5%
1/16W
MF
402
R1100
100K
2 1
R1103
100K
RAIL_CTL_POS
RAIL_CTL_NEG
3
5%
1/16W
MF
402
5%
1/16W
MF
402
R1102
47.0K
1/16W
2 1
2 1
1
1%
MF
603
2
10
11
4
5
V+
U1100
GND
12
V+
U1100
GND
12
3
CRITICAL
3
LM339A
SOI
LM339A
SOI
13
2
RUN -> FLOAT
SLEEP -> LOW
SHUTDOWN -> FLOAT
RAIL_RUN_FET
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
RUN -> LOW
SLEEP -> FLOAT
SHUTDOWN -> FLOAT
RAIL_SLEEP_FET
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
FET ON IN SLEEP
Vpwr >= Vout+0.35V
Vctrl >= Vout+1.25V
PP3V3_ALL
59
90
11
7
R1104
50 46
SYS_POWERUP_L
10
33
13
7
6
SYS_SLEEP
10
9
8
6
C
PP5V_ALL
11
7
6
CRITICAL
Q1100
SI4467DY
8
7
D
6
5
FET ON IN RUN
G
1
2
3
P-CHANNEL
Ron=11mOhm
SM-1
CRITICAL
Q1101
4
SI4467DY
SM-1
S
G
4
D S
1
C1102
100UF
2
3
2
1
5
6
7
8
CRITICAL
VR1100
5
4
VCTRL
20%
6.3V
ELEC
SM
1
R1107
1K
1%
1/16W
MF
402
2
1
SENSE
CS5253
SM
VOUT VPWR
VOUT
TAB
ADJ
2
3_3V_ALL_ADJ
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
1
C1101
0.1UF
N20P80%
16V
2
CERM
603
PP5V_PWRON
VOLTAGE=5V
PP5V_PWRON
1
R1101
1K
1%
1/16W
MF
402
2
3
6
R1
R2
1
R1105
124
1%
1/16W
MF
603
2
1
R1106
210
1%
1/16W
MF
603
2
PP3V3_RUN
18
6
FET ON IN RUN
FET ON IN SLEEP
PROCESS SWING
3.30V - 3.45V
Vout=Vref(1+R2/R1)+Iadj(R2)
Vref=1.250V typ
Iadj=50uA typ
1
C1100
150UF
20%
10V
2
ELEC
SM
8
7
6
5
1
2
3
Q1102
SI4467DY
SM-1
D
Q1103
4
SI4467DY
SM-1
G
P-CHANNEL
Ron=11mOhm
S
G
4
D S
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PP3V3_PWRON
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
3
MIN_NECK_WIDTH=10MIL
2
1
5
6
7
8
PP3V3_ALL
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
18
6
27
18
6
59
11
90
7
D
C
B
B
5V & 3.3V VREGS
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
11
SCALE
1
REV.
OF
103
A
I
ELECTRICAL_CONSTRAINT_SET
SMU_CLK10M_XTAL
RTC_CLK32K_XTAL
Page Notes
Power aliases required by this page:
D
- _PP3V3_ALL_SMU
- _PP3V3_ALL_RTC
- _PP3V3_PWRON_SMU
- _PPVREF_SMU (SMU AVCC or 2.5V reference)
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
NOTE: CPU current/voltage monitoring
(CPU_SENSE_I/CPU_SENSE_V) requires
100K/10uF RC filter at SMU pins.
Caps should connect to GND_SMU_AVSS.
SMU_VREF should be same signal or
reference used by monitoring
circuit, but be aware that this will
affect other analog inputs such as
AC adapter ID.
NOTE: All analog inputs to SMU should have
a 100pF capacitor to the SMU AVSS
signal (GND_SMU_AVSS). None of
those capacitors are provided on
this page.
NOTE: Some primary and alternate functions
reuire pull-ups that are not.
C
provided on this page. Please.
review the latest SMU specification
to ensure missing pull-ups are
provided on another page.
NOTE: Pinout matches SMU pinout v1.51.
B
NET_SPACING_TYPE
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
7 8
DIFFERENTIAL_PAIR
SMU_CLK10M_XIN
SMU_CLK10M_XOUT
SMU_CLK10M_XOUT_R
RTC_CLK32K_X1
RTC_CLK32K_X2
=PP3V3_ALL_SMU
6
7
8
13
SMU_TO_SB_INT_L
25
D1310
1N914
SOT23
C1310
0.22uF
SMU_CLK10M_XOUT
13
13
13
13
13
13
3
1
20%
6.3V
CERM
402
C1304
6
NO_SMU_I2C_D
R1399
1
R1322
150K
5%
1/16W
MF
402
2
1
2
R1317
1/16W
18pF
50V
CERM
402
5%
1/16W
MF
402
0
5%
MF
402
5%
0
2 1
NO STUFF
R1316
1
CRITICAL
Y1300
2
10.0000M
8X4.5MM-SM
1
C1305
2
5
4
System Management Unit
=PP3V3_ALL_SMU
6 8
8
7
13
C1300
Y = Primary function
N = Alternate function
(see aliases below)
S = Spare
CPU_SENSE_I
33
CPU_SENSE_V
33
CPU_TEMP
36
CPU_BYPASS
30
FAN_RPM3
13
FAN_RPM4
13
FAN_RPM5
13
SMU_ONEWIRE
8
SMU_PWRSEQ_P1_0
3
SMU_PWRSEQ_P1_1
3
SMU_PWRSEQ_P1_2
3
SMU_PWRSEQ_P1_3
8
SMU_PWRSEQ_P1_4
3
SYS_POWERFAIL_L
8
6
13
SYS_DRIVE_BAY_INT_L
13
8
SYS_DOOR_AJAR_L
13
8
I2C_SMU_E_SDA
18
I2C_SMU_E_SCL
18
FAN_TACH0
16
FAN_TACH1
16
FAN_TACH2
17
FAN_TACH3
13
FAN_TACH4
13
FAN_TACH5
13
I2C_SMU_A_SDA_IN
18
I2C_SMU_A_SDA_OUT_L
14
6
18
I2C_SMU_A_SCL_IN
18
I2C_SMU_A_SCL_OUT_L
14
6
18
18
I2C_SMU_D_SDA
I2C_SMU_D_SCL
18
SMU_CHARGE_BATT
13
SYS_OVERTEMP_L
25
16
27
=PPVREF_SMU
8
SMU_BOOT_CNVSS
8
6
8
SMU_RESET_L
13
SMU_CLK10M_XOUT_R
13
SMU_CLK10M_XIN
10M
2 1
5%
1/16W
MF
402
2 1
Keep crystal subcircuit close to SMU.
Y1300’s load capacitance is 12pF
1
18pF
5%
50V
2
CERM
402
10uF
6.3V
CERM
20%
805
R1325
1
2
10K
1/16W
C1301
0.1uF
CERM
1
5%
MF
402
2
1
20%
10V
2
402
Portable
Consumer
Y
Y
YYY
YYY
Y
Y
Y
Y
N
S
S
N
YYY
N
YYY Y Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
YN
S
S
N
S
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
SSN
Y
Y
N
Y
N
S
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
SS
Y
S
Y
S
1
C1325
1uF
10%
6.3V
2
CERM
402
C1302
0.1uF
CERM
Server
Desktop
Entry Desktop
S
S
67
S
S
66
SS
65
SS
64
Y
63
Y
62
Y
YYY
61
60
Y
Y
59
Y
Y
58
Y
Y
57
Y
Y
56
YSY
Y
55
Y
Y
54
Y
S
53
Y
YY
52
Y
Y
51
Y
Y
50
Y
YYY
49
Y
Y
48
Y
Y
47
Y
Y
46
Y
Y
45
Y
Y
44
Y
YYYY
39
Y
38
Y
Y
37
Y
Y
36
Y
Y
35
Y
Y
34
S
S
33
S
S
32
6
9
10
12
77
20%
10V
402
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
P1[0]
P1[1]
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
P1[7]
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
PCNVSS
RESET*
XOUT
XIN
VREF
R1315
4.7
2 1
5%
1
2
1/16W
402
MF
13
VCC
U1300
M30280F8
QFP-80
AN00
AN01
OMIT
AN02
AN03
AN04
AN05
AN06
AN07
AN20
AN21
AN22
AN23
INT3*
INT4*
INT5*
SDAmm
SCLmm
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
CLK3
Sin3
Sout3
VSS
11
XW1300
SM
(BUSY)
TA1out
TA2out
TA3out
TA4out
2 1
PP3V3_ALL_SMU_AVCC
VOLTAGE=3.3V
MIN_LINE_WIDTH=15 mil
MIN_NECK_WIDTH=10 mil
1
C1303
1uF
10%
6.3V
2
CERM
402
GND_SMU_AVSS
78
AVCC
RTS0*/
CTS0*
P6[0]
P6[1]
CLK0
P6[2]
RXD0
TXD0
P6[3]
RTS1*
P6[4]
P6[5]
CLK1
P6[6]
RXD1
P6[7]
TXD1
P7[0]
SDA
P7[1]
SCL
P7[2]
P7[3]
TA1in
P7[4]
TA2in
P7[5]
P7[6]
P7[7]
TA3in
P8[0]
TA4in
P8[1]
P8[2]
INT0*
P8[3]
INT1*
INT2*
P8[4]
NMI*
P8[5]
P8[6]
CE*
P8[7]
P9[0]
TB0in
P9[1]
TB1in
P9[2]
TB2in
AN24
P9[3]
AN25
P9[5]
AN26
P9[6]
AN27
P9[7]
AN0
P10[0]
P10[1]
AN1
P10[2]
AN2
P10[3]
AN3
P10[4]
KI0*
KI1*
P10[5]
P10[6]
KI2*
P10[7]
KI3*
AVSS
75
GND_SMU_AVSS
VOLTAGE=0V
MIN_LINE_WIDTH=15 mil
MIN_NECK_WIDTH=10 mil
43
42
41
40
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
8
7
5
4
3
2
1
80
79
76
74
73
72
71
70
69
68
Consumer
Portable
Y
Y
Y
Y
YYYY
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
YSSNN
Y
Y
Y
Y
Y
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
S
S
S
Y
Y
Y
Y
YYYY
Y
Y
Y
Y
Y
Y
Y
YYYY
Y
Y
Y
Y
YYY
Y
Y
Y
Y
Y
Y
SSYYY
SYYS
S
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
8
13
33
13
8
36
Server
Desktop
Entry Desktop
N
N
N
N
N
N
SS
S
S
S
S
Y
Y
Y
Y
Y
YY YY
Y
N
N
Y
Y
Y
Y
YY
Y
Y
Y
Y
Y
Y
Y
Y
S
S
Y
Y
S
S
Y
Y
Y
Y
Y
Y
S
S
Y
Y
Y
Y
Y
Y
Y
S
S
S
Y
Y
Y
Y
YY
Y
Y
Y
Y
Y
Y
SS
1
R1327
10K
5%
1/16W
MF
402
2
36
33
SMU_BOOT_BUSY
SMU_BOOT_SCLK
SMU_BOOT_CE
CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>
SMU_BOOT_RXD
SMU_BOOT_TXD
I2C_SMU_B_SDA
I2C_SMU_B_SCL
I2C_SMU_CPU_SDA_IN
FAN_RPM0
I2C_SMU_CPU_SCL_IN
FAN_RPM1
FAN_PWM8
FAN_RPM2
SYS_LED
SYS_COLD_RESET_L
SYS_PME_L
SMU_QREQ
SYS_SLEWING_L
I2C_SMU_CPU_SDA_OUT_L
SYS_POWERUP_L
MAKE_BASE=TRUE
SMU_SLEEP
CLOCK_RESET_L
CPU_HRESET
SB_TO_SMU_INT_L
SB_STOPXTALS_L
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P9_6
SYS_SLOT_PWR
TP_SMU_SPARE_P10_0
SMU_WARM_RESET_L
NB_SUSPENDACK_L
SB_SUSPENDACK_L
SMU_SUSPENDREQ_L
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
I2C_SMU_CPU_SCL_OUT_L
3
1 2
Real Time Clock
=PP3V3_ALL_RTC
7
=PP3V3_ALL_SMU
6
8
7
13
C1308
I2C_RTC_SDA
18
I2C_RTC_SCL
18
8
8
8
13
8
13
8
13
8
8
8
8
8
8
18
18
18
13
16
18
13
16
13
8
17
21
13
8
24
77
25
13
28
27
25
33
13
18
6
10
7
33
13
11
8
13
27
30
25
25
3
3
8
8
8
25
25
24
28
13
7
6
13
13
7
18
SMU Pull-ups / pull-down
PP3V3_PWRON
PP3V3_RUN
PP2V5_PWRON
1
0.1uF
20%
10V
2
CERM
402
NC
=PP3V3_ALL_SMU
R1302
10K
2 1
5%
1/16W
MF
402
R1313
100K
2 1
5%
1/16W
MF
402
5
6
7
R1300
10K
5%
1/16W
MF
402
R1303
10K
5%
1/16W
MF
402
R1304
10K
5%
1/16W
MF
402
R1312
2K
5%
1/16W
MF
402
NO STUFF
R1311
2K
5%
1/16W
MF
402
R1310
100K
5%
1/16W
MF
402
VCC
U1301
DS1338
MSOP
SDA
SCL
SQW/
OUT
GND
8
7
6
13
2 1
2 1
1 2
2 1
2 1
2 1
8
1
X1
2
X2
3
VBAT
4
SYS_POWERUP_L
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
SYS_PME_L
SYS_SLEWING_L
SMU_SUSPENDREQ_L
SYS_COLD_RESET_L
SMU_SLEEP
1
C1309
0.1uF
20%
10V
2
CERM
402
RTC_CLK32K_X1
CRITICAL
1
Y1301
32.768K
SM-1
4
RTC_CLK32K_X2
6
11
10
7
13
6
7
7
13
13
25
77
13
25
33
27
13
24
28
25
8
13
24
8
13
13
D
13
C
33
13
B
Master: Link
A
Portable
FAN_RPM3 ALS0_OUT
13
FAN_RPM4 ALS1_OUT
13
FAN_RPM5
13
SYS_POWERFAIL_L
8
6
13
SYS_DRIVE_BAY_INT_L
8
13
SYS_DOOR_AJAR_L
8
13
FAN_PWM8
8
13
Port
0.4
0.5
0.6
1.5
1.6
1.7
7.6
ALS_GAIN_BOOST
SMU_ACIN
SMU_BATT_DET_L
SYS_LID_OPEN
SYS_KBDLED
8
8
8
8
Alternate Functions
Consumer
FAN_TACH3
13 21
FAN_TACH4
13 21
FAN_TACH5
SMU_CHARGE_BATT
13
Port
2.5
2.6
2.7
3.6
SYS_LED_RED
SYS_LED_GREEN
SYS_LED_BLUE
DIAG_LED
6 7
Tower & Server
CPU_VID<0>
13
8
CPU_VID<1>
13
8
CPU_VID<2>
13
21 13
8
8
I2C_SMU_CPU_SDA_IN
13
18
I2C_SMU_CPU_SCL_IN
13
18
Port
6.0
6.1
6.2
7.2
7.4
FAN_TACH6
FAN_TACH7
FAN_TACH8
FAN_PWM6
FAN_PWM7
APPLE COMPUTER INC.
5
4
3
System Management Unit
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
SCALE
2
A
REV.
I
OF
13 103
1
7 8
6
5
4
3
1 2
DEVELOPMENT
R1400
0
EI_CPU1_CLK_P_R
27
EI_CPU1_CLK_N_R
27
D
27
27
CPU1_HTBEN_R
EI_CPU1_SYNC_R
5%
MF
DEVELOPMENT
R1401
0
5%
MF
DEVELOPMENT
R1402
0
5% 402
DEVELOPMENT
0
R1403
402 5%
2 1
1/16W
402
2 1
1/16W
402
2 1
2 1
EI_CPU1_CLK_P
EI_CPU1_CLK_N
CPU1_HTBEN
EI_CPU1_SYNC
6
27
14
14
6
27
D
6
14
6
27
14
=PP1V2_EI_CPU
EI_CPU1_SYNC
14
6
27
CHKSTOP_L
8
6
29
C
EI_NB_TO_CPU_AD<13>
6
29
28
EI_NB_TO_CPU_AD<15>
6
29
28
EI_NB_TO_CPU_AD<17>
6
29
28
EI_NB_TO_CPU_AD<21>
6
29
28
EI_NB_TO_CPU_AD<20>
6
29
28
EI_NB_TO_CPU_AD<25>
6
29
28
EI_NB_TO_CPU_AD<29>
6
29
28
EI_NB_TO_CPU_AD<28>
6
29
28
EI_NB_TO_CPU_AD<40>
6
29
28
EI_NB_TO_CPU_AD<10>
6
29
28
EI_NB_TO_CPU_AD<39>
6
29
28
EI_NB_TO_CPU_AD<36>
29
RI_L
30
EI_QREQ_L
30
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
H12
H13
H14
H15
H16
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
H29
H30
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
H12
H13
H14
H15
H16
H17
H18
H19
H20
H21
H22
H23
H24
H25 G25
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G26 H26
G27 H27
G28 H28
G29 H29
G30 H30
G1
G1
G2
G2
G3
G3
NC
G4
G4
G5
G5
G6
G6
G7
G7
G8
G8
G9
G9
G10
G11
G12
NC
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
EI_CPU1_CLK_P
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_N<1>
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<28>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_SR_P<0>
I2C_SMU_A_SCL_OUT_L
14
14
6
27
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
28
6
29
28
6
29
28
6
29
28
6
29
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6 6
28 28
29
6 6
29
28 29
29
6 6
18 29
28
13 28
EI_CPU1_CLK_N
6
27
EI_NB_TO_CPU_AD<5>
6
29
EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_SR_N<1>
EI_NB_TO_CPU_SR_P<1>
6
29
F1
F1
F2
F2
F3
F3
F4
F4
F5
F5
F6
F6
F7
F7
F8
F8
F9
F9
F10
F10
F11
F11
F12
F12
F13
F13
F14
F14
F15
F15
F16
F16
F17
F17
F18
F18
F19
F19
F20
F20
F21
F21
F22
F22
F23
F23
F24
F24
F25
F26
F27
F28
F29
F30
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
E23
E24
E25 F25
E26 F26
E27 F27
E28 F28
E29 F29
E30 F30
E1
E1
E2
E2
E3
E3
E4
E4
E5
E5
E6
E6
E7
E8
E9
EI_CPU_TO_NB_AD<8>
E7
EI_CPU_TO_NB_AD<13>
E8
NC
E9
EI_CPU_TO_NB_AD<12>
E10
EI_CPU_TO_NB_AD<5>
E11
EI_CPU_TO_NB_AD<36>
E12
EI_CPU_TO_NB_AD<35>
E13
EI_CPU_TO_NB_AD<18>
E14
EI_CPU_TO_NB_AD<43>
E15
EI_CPU_TO_NB_AD<42>
E16
EI_CPU_TO_NB_AD<38>
E17
EI_CPU_TO_NB_AD<40>
E18
EI_NB_TO_CPU_AD<9>
E19
EI_NB_TO_CPU_AD<11>
E20
EI_NB_TO_CPU_AD<0>
E21
EI_NB_TO_CPU_AD<1>
E22
E23
EI_NB_TO_CPU_AD<22>
E24
EI_NB_TO_CPU_AD<33>
E25
EI_NB_TO_CPU_AD<43>
E26
EI_NB_TO_CPU_AD<2>
E27
EI_NB_TO_CPU_AD<38>
E28
E29
TP_PROC_TRIGGER_OUT
E30
SYNCENABLE
18
7
30
35 31
29
NOSTUFF
J1400
YFS-30-03-H-08-SB
28
6
6
6
28
6
6
6
6
6
6
6
6
28
6
6
28
6
6
28
6
6
6
6
28
29
6
29
6 6
29 28
6 6
F-ST-BGA
30
29
29
28
29
28
29
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
29
28
29
29
29
29
28
29
28
29
28
29
29
28
30 29
29 28
29
25
28
28
28
28
28
CPU_INT_L
6
EI_CPU_TO_NB_AD<15>
6
29
EI_NB_TO_CPU_AD<8>
6
EI_NB_TO_CPU_AD<24>
6
EI_NB_TO_CPU_AD<7>
6
29
EI_NB_TO_CPU_AD<6>
EI_QACK_L
6
=PP1V2_EI_NB
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
D8
D8
D9
D9
D10
D10
D11
D11
D12
D12
D13
D13
D14
D14
D15
D15
D16
D16
D17
D17
D18
D18
D19
D19
D20
D20
D21
D21
D22
D22
D23
D23
D24
D24
D25
D26
D27
D28
D29
D30
=PP1V2_EI_NB
7
28
18
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
6
29
28
28
6
29
6
29
28
28
6
29
29
29
29
29
29
29
29
29
29
6 6
29 29
28 28
30
18
14
EI_NB_TO_CPU_AD<4>
29
EI_NB_TO_CPU_AD<3>
28
6
EI_NB_TO_CPU_AD<16>
28
6
EI_NB_TO_CPU_AD<35>
6
28
EI_NB_TO_CPU_AD<34>
6
28
EI_NB_TO_CPU_AD<31>
6
28
EI_NB_TO_CPU_AD<32>
6
28
EI_NB_TO_CPU_AD<23>
6
28
EI_NB_TO_CPU_CLK_N
6
28
EI_NB_TO_CPU_CLK_P
6
28
MCP_L
6
29
I2C_SMU_A_SDA_OUT_L
6
13
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10
B10
B11
B11
B12
B12
B13
B13
B14
B14
B15
B15
B16
B16
B17
B17
B18
B18
B19
B19
B20
B20
B21
B21
B22
B22
B23
B23
B24
B24
B25
B25
B26
B27
B28
B29
B30
7
28
18
14
C1
C1 B1 A1
C2
C2
C3
C3
C4
C4
C5
C5
C6
EI_CPU_TO_NB_AD<6>
C7
EI_CPU_TO_NB_AD<21>
C8
EI_CPU_TO_NB_AD<20>
C9
EI_CPU_TO_NB_AD<25>
C10
EI_CPU_TO_NB_AD<26>
C11
EI_CPU_TO_NB_SR_P<0>
C12
EI_CPU_TO_NB_SR_N<0>
C13
EI_CPU_TO_NB_AD<27>
C14
EI_CPU_TO_NB_AD<23>
C15
EI_CPU_TO_NB_AD<39>
C16
EI_CPU_TO_NB_AD<16>
C17
EI_CPU_TO_NB_AD<19>
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
EI_SE
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25 D25
C26 D26
C27 D27
C28 D28
C29 D29
C30 D30
C6
C7
C8
C9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26 B26
A27 B27
A28 B28
A29 B29
A30 B30
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
A9
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
CPU_HRESET_L
CPU1_HTBEN
EI_CPU_TO_NB_AD<0>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<29>
29
6
30
14
6
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28
6
29
28 28
6 6
29
C
B
B
CPU LOGIC ANALYZER
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
14
SCALE
1
REV.
OF
103
A
I
7 8
6
5
4
3
1 2
OPTICAL TEMP SENSOR
FAN 1 - Q37 STYLE CPU FAN CONTROL CIRCUIT
CPU FAN 2
R1645
4.7
2 1
5%
2 1
5%
1/16W
MF
402
D1604
C1616
4700PF
2 1
10%
50V
CERM
603
R1644
4.7K
1/16W
FAN_0_GATE
1N914
31
SOT23
C1617
1
5%
MF
402
2
3
1
GDS
4
1
1
10UF
CERM
1210
10%
16V
C1618
10UF
10%
2
16V
2
CERM
1210
Q1601
IRF5505
SM
2
1
C1619
D1605
1
47UF
20%
16V
2
ELEC
SM
MAX FAN CURRENT=0.5A
FAN_0_PWR
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
CRITICAL
SM
MBR0530
PP12V_FAN_0_ANALOG
VOLTAGE=12V
MIN_LINE_WIDTH=20MIL
1
R1640
D
R1605
0
2 1
FAN_RPM0
13
NOSTUFF
R1600
PP3V3_RUN
C
R1606
0
13
FAN_TACH0
5%
1/16W
MF
402
2 1
5%
1/16W
MF
402
0
5%
1/16W
MF
402
1
2
FAN_0_CNTL
2 1
R1604
10K
1%
1/16W
MF
402
FAN_0_TACH
10K
1%
1/16W
MF
402
2
FAN_0_DRV
3
D
Q1600
2N7002
1
SM
G
S
2
MIN_NECK_WIDTH=10MIL
FAN_0_DRV_F
R1641
100K
1%
1/16W
MF
402
1
R1639
10K
1%
1/16W
MF
402
2
NOSTUFF
1
R1603
0
5%
1/16W
MF
402
2
2 1
R1642
1
C1613
0.1UF
20%
16V
2
CERM
603
C1614
100K
1%
1/16W
MF
402
10UF
2 1
1
20%
16V
2
ELEC
SM
6
5
FAN_0_OPP
R1601
10K
1/16W
1%
MF
402
FAN_0_OPM
CRITICAL
U1700
8
LM358-SOI1
7
4
1
2
1
C1601
0.47UF
20%
16V
2
CERM
805
C1615
100PF
FAN_0_GT
R1643
10K
1%
1/16W
MF
402
50V
CERM
402
2 1
PP12V_RUN
NOSTUFF
1
C1600
10UF
10%
16V
2
CERM
1210
CRITICAL
J1600
HF28040-B
M-ST-TH
1
MOTOR CONTROL
2
TACH
3
GND
4
12V DC
17" SYSTEM FAN 603-5518
20" SYSTEM FAN 603-5521
I2C ADDR:94(1001010)
18
18
I2C ADDR:90(1001000)
I2C_OPTICAL_SDA
18
I2C_OPTICAL_SCL
18
POWER SUPPLY TEMP SENSOR
I2C_PS_TEMP_SDA
I2C_PS_TEMP_SCL
PP3V3_PWRON
U1602
7
A0
6
A1
5
A2
1
SDA
2
SCL
PP3V3_PWRON
VS+
U1650
SOP
LM75
7
A0
6
A1
5
A2
CRITICAL
1
SDA
2
SCL
GND
VS+
SOP
LM75
CRITICAL
GND
NOSTUFF
8
OS
4
NOSTUFF
8
NOSTUFF
3
TEMP_SENSOR_OS SYS_OVERTEMP_L
OS
4
3
PS_SENSOR_OS
R1621
NOSTUFF
R1650
0
5%
1/16W
MF
402
0
2 1
5%
1/16W
MF
402
2 1
SYS_OVERTEMP_L
D
27
25
16
13
C
27
25
16
13
FAN 2 - Q37 STYLE CPU FAN CONTROL CIRCUIT
SYSTEM FAN 1
R1611
4.7
2 1
5%
2 1
5%
1/16W
MF
402
D1602
C1608
4700PF
2 1
10%
50V
CERM
603
R1610
4.7K
1/16W
FAN_1_GATE
1N914
31
SOT23
C1607
1
5%
MF
402
2
3
1
GDS
4
1
1
C1606
10UF
CERM
1210
10%
16V
10UF
10%
16V
2
2
CERM
1210
C1604
47UF
Q1603
IRF5505
SM
MAX FAN CURRENT=0.5A
FAN_1_PWR
CRITICAL
2
D1601
SM
MBR0530
1
ELEC
20%
16V
SM
U1601_UNUSED
6
5
R1636
0
5%
1/16W
MF
402
2 1
LM358-SOI1
4
R1635
0
5%
1/16W
MF
402
NOSTUFF
R1619
0
5%
1/16W
MF
402
PP3V3_RUN
1
R1623
10K
1%
1/16W
MF
402
2
7
2 1
2 1
FAN_1_CNTL
FAN_1_TACH
13
PP3V3_RUN
FAN_RPM1
B
A
FAN_TACH1
13
U1601
8
1
R1616
10K
1%
1/16W
MF
402
2
FAN_1_DRV
3
D
Q1602
2N7002
1
SM
G
S
2
PP12V_FAN_1_ANALOG
VOLTAGE=12V
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
FAN_1_DRV_F
R1615
100K
1%
1/16W
MF
402
1
R1620
10K
1%
1/16W
MF
402
2
NOSTUFF
1
R1618
0
5%
1/16W
MF
402
2
2 1
R1614
1
C1611
0.1UF
20%
16V
2
CERM
603
C1610
100K
1%
1/16W
MF
402
10UF
2 1
1
20%
16V
2
ELEC
SM
2
3
FAN_1_OPP
R1617
10K
1/16W
1%
MF
402
1
2
FAN_1_OPM
CRITICAL
8
U1601
LM358-SOI1
1
4
1
2
C1609
0.47UF
20%
16V
CERM
805
C1605
100PF
FAN_1_GT
R1613
10K
1%
1/16W
MF
402
50V
CERM
402
2 1
PP12V_RUN
1
2
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
1
2
FERR-EMI-100-OHM
NOSTUFF
C1603
10UF
10%
16V
CERM
1210
FERR-EMI-100-OHM
FERR-EMI-100-OHM
L1602
SM
C1602
0.01UF
L1600
SM
L1601
SM
2 1
PP12V_RUN_FAN_1_LC
VOLTAGE=12V
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
1
20%
16V
2
CERM
402
2 1
FAN_1_PWR_FILT
2 1
FAN_1_TACH_FILT
L1604
FERR-EMI-100-OHM
FERR-EMI-100-OHM
CRITICAL
J1601
10-89-7062
TACH
2 1
M-ST-TH
4
65
FAN_1_GND_FILT
VOLTAGE=0V
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
MOTOR CONTROL
SM
17" CPU FAN 603-5519
20" HD FAN 603-5487
L1603
2 1
SM
1
PP12V_RUN_FAN_1_LCL
VOLTAGE=12V
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
GND
APPLE COMPUTER INC.
FAN 1, 2 & SYSTEM TEMP
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
16
OF
103
SCALE
B
A
REV.
I
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
FAN 3 - Q37 STYLE SYSTEM FAN CONTROL CIRCUIT
PP12V_RUN
R1745
4.7
2 1
5%
2 1
5%
1/16W
MF
402
C1716
4700PF
2 1
10%
50V
CERM
603
R1744
4.7K
FAN_2_GATE
D1704
1N914
31
SOT23
1
5%
1/16W
MF
402
2
C1717
10UF
CERM
1210
NOSTUFF
C1719
3
4
1
C1718
10UF
10%
16V
2
CERM
1210
Q1701
IRF5505
SM
2
1
1
GDS
1
10%
16V
2
1
47UF
20%
16V
2
ELEC
SM
MAX FAN CURRENT=0.5A
FAN_2_PWR
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
D1705
SM
MBR0530
CRITICAL
1
C1700
10UF
10%
16V
2
CERM
1210
MOTOR CONTROL
TACH
CRITICAL
J1700
10-89-7062
M-ST-TH
4
65
+12V DC
1
GND
17" HD FAN 603-5520
D
C
20" CPU FAN 603-5459
PP12V_FAN_2_ANALOG
VOLTAGE=12V
MIN_LINE_WIDTH=20MIL
1
R1740
D
R1705
0
2 1
FAN_RPM2
13
NOSTUFF
R1700
PP3V3_RUN
C
R1706
0
13
FAN_TACH2
5%
1/16W
MF
402
2 1
5%
1/16W
MF
402
0
5%
1/16W
MF
402
1
2
FAN_2_CNTL
2 1
R1704
10K
1%
1/16W
MF
402
FAN_2_TACH
10K
1%
1/16W
MF
402
2
FAN_2_DRV
3
D
Q1700
2N7002
1
SM
G
S
2
MIN_NECK_WIDTH=10MIL
FAN_2_DRV_F
R1741
100K
1%
1/16W
MF
1
R1739
10K
1%
1/16W
MF
402
2
NOSTUFF
1
R1703
0
5%
1/16W
MF
402
2
402
2 1
R1742
1
C1713
0.1UF
20%
16V
2
CERM
603
C1714
100K
1%
1/16W
MF
402
10UF
2 1
20%
16V
ELEC
SM
2
3
FAN_2_OPP
R1701
1
2
10K
1/16W
1%
MF
402
1
C1701
0.47UF
20%
16V
2
CERM
805
FAN_2_OPM
CRITICAL
U1700
8
LM358-SOI1
1
4
1
2
C1715
100PF
FAN_2_GT
R1743
10K
1%
1/16W
MF
402
50V
CERM
402
2 1
REMOTE HARD DRIVE TEMP SENSOR
REMOTE HD TEMP SENSOR
B
PP3V3_PWRON
I2C_HD_TEMP_SDA
18
I2C_HD_TEMP_SCL
18
I2C ADDR:92(1001001)
CRITICAL
J1701
53261-0498
M-RT-SM
5
1
2
3
4
6
518S0193
B
FAN 3 & HD TEMP
A
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
17
SCALE
REV.
OF
103
A
I
8
6 7
5
4
3
2
1
1
R1802
2K
5%
1/16W
MF
402
2
SHT
1 2
18
D
C
B
A
REV.
I
OF
103
7 8
NOSTUFF
1
1
R1831
2K
5%
1/16W
MF
402
2
2
0K
5%
SM1
CPU JTAG
JTAG_CPU_TDO
JTAG_CPU_TDI
JTAG_CPU_TMS
JTAG_CPU_TCK
R1832
0
603
NOSTUFF
R1833
0
603
27
8
SMU_CPU_JTAG_OR_I2C
7
I2C_CPU_A_SCL
6
I2C_CPU_A_SDA_TO_SMU
5
I2C_CPU_A_SDA_TO_CPU
PP5V_PWRON
6
11
PP5V_RUN
6
D
G
S
11
PP3V3_RUN
6
11
NOSTUFF
R1830
1/16W
RP1800
1
2
3
4
6
Q1801
2N7002DW
SOT-363
1
I2C_CPU_SCL_LS
NOSTUFF
RP1801
0K
5%
1
2
3
4
1/16W
SM1
2K
5%
MF
402
1/16W
8
7
6
5
I2C A BUS
SMU
D
C
PP2V5_PWRON
MASTER
U1300
I2C_SMU_A_SDA_IN
13
MAKE_BASE=TRUE
I2C_SMU_A_SDA_OUT_L
14
6
13
MAKE_BASE=TRUE
I2C_SMU_A_SCL_IN
13
MAKE_BASE=TRUE
I2C_SMU_A_SCL_OUT_L
13
14
6
MAKE_BASE=TRUE
PINS 36-39
SMU
MASTER
U1300
I2C_SMU_CPU_SCL_IN
13
MAKE_BASE=TRUE
I2C_SMU_CPU_SCL_OUT_L
13
MAKE_BASE=TRUE
I2C_SMU_CPU_SDA_IN
13
MAKE_BASE=TRUE
I2C_SMU_CPU_SDA_OUT_L
13
MAKE_BASE=TRUE
PINS 14,25,23,68
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
I2C
I2C
I2C
I2C
2
I2C C BUS
B
R1805
1/16W
A
1
1
R1804
2K
2K
5%
5%
1/16W
MF
MF
402
402
2
2
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
ALIAS
ALIAS
U3LITE
MASTER
U3
I2C_NB_C_SDA
MAKE_BASE=TRUE
I2C_NB_C_SCL
MAKE_BASE=TRUE
PINS C21, E21
DIMMS
J4000 = A0
J4001 = A2
I2C_DIMM_SDA
I2C_DIMM_SCL
PINS 91, 92
OF EACH DIMM
24
24
24
40
40
6
2 1
PP5V_U1800
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
2 1
PP3V3_PWRON
18
27
6
11
R1800
1/16W
PP3V3_PWRON
18
6
11
R1819
29
30
29
30
29
30
29
30
2K
402
1/16W
1
5%
MF
2
1
2K
5%
MF
402
2
C1800
0.1UF
20%
10V
1
R1801
2K
5%
1/16W
MF
402
2
1
2
CERM
402
LM339A
14
LM339A
1
R1818
2K
5%
1/16W
MF
LM339A
402
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
13
LM339A
2
C1801
0.1UF
1
2
SOI
U1800
SOI
U1800
SOI
U1800
SOI
U1800
20%
10V
CERM
402
3
V+
GND
12
3
V+
GND
12
3
V+
GND
12
3
V+
GND
12
1
2
NOSTUFF
R1809
I2C_0V6_REF
R1811
4.7K
1/16W
8
9
6
7
10
11
4
5
4.7K
1/16W
5
1
0.1UF
20%
10V
CERM
402
R1808
200
1/16W
NOSTUFF
R1820
1/16W
5%
MF
402
2
1
0
5%
MF
402
2
1
1
R1828
4.7K
5%
5%
1/16W
MF
MF
402
402
2
2
1
5%
MF
402
2
1
C1802
2
6
D
Q1800
2N7002DW
2
5
5
SOT-363
G
S
1
3
D
Q1800
2N7002DW
SOT-363
G
S
4
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
3
D
Q1801
2N7002DW
SOT-363
G
S
4
USE 576 OHM FOR R1811 IF 5V RAIL IS USED FOR REFERENCE
I2C D & E BUS
PP2V5_PWRON
1
1/16W
1/16W
1
R1813
2K
2K
5%
5%
1/16W
MF
MF
402
402
2
2
NOSTUFF
1
1
R1823
0
0
5%
5%
1/16W
MF
MF
402
402
2
2
R1824
21
1/16W
R1825
21
1/16W
SMU ’D’ AND RTC CAN MAKE AN I2C ’D’ BUS
R1812
U3LITE ’B’
U3
I2C_NB_B_SDA
I2C_NB_B_SCL
PINS C20, B21
I2C
I2C
NOSTUFF
R1822
SMU ’E’
MASTER
U1300
I2C_SMU_E_SDA
13
I2C_SMU_E_SCL
13
PINS 50, 51
STANDARD CONFIGURATION: SMU IS MASTER OF BUS E WITH RTC AS SLAVE; U3LITE ’B’ AND SMU ’D’ ARE NOT USED
TO IMPROVE LATENCY WITH RGB LED - U3LITE ’B’ AND SMU ’E’ CAN MAKE AN I2C ’E’ BUS
I2C
I2C
R1807
0
5%
MF
402
0
5%
MF
402
PP3V3_ALL
2K
5%
1/16W
MF
402
1
2
1
R1806
2K
5%
1/16W
MF
402
2
NOSTUFF
R1826
0
21
5%
1/16W
MF
402
NOSTUFF
R1827
0
21
5%
1/16W
MF
402
I2C
I2C
I2C
I2C
I2C_RTC_SDA
I2C_RTC_SCL
PINS 5, 6
SMU ’D’
I2C_SMU_D_SDA
I2C_SMU_D_SCL
PINS 34, 35
1
2
1
2
RTC
U1301
MASTER
U1300
R1810
200
5%
1/16W
MF
402
NOSTUFF
R1821
0
5%
1/16W
MF
402
R1816
4
=PP1V2_EI_NB
=PP1V2_EI_CPU
1
200
5%
1/16W
MF
402
2
13
13 24
13
13
7
14
1
R1817
200
5%
1/16W
MF
402
2
28
29
30
7
14
I2C_CPU_A_SCL
I2C_CPU_A_SDA
SHASTA
MASTER
U2300
I2C_SB_SDA
25
MAKE_BASE=TRUE
I2C_SB_SCL
25
MAKE_BASE=TRUE
PINS Y9, AB7
MICRODASH
J9400
I2C_UDASH_SDA
94
6
I2C_UDASH_SCL
94
6
PINS 21, 24
AUDIO
U9500 / AU300
I2C_AUDIO_SDA
103
95
I2C_AUDIO_SCL
103
95
PINS 18, 19
U3LITE
U3
I2C_NB_A_SDA
I2C_NB_A_SCL
PINS A20, B20
35 31
CPU
U2900
PINS AA20, Y21
I2C SB BUS
3
PP3V3_PWRON
I2C B BUS
1
R1803
2K
5%
SMU
MASTER
U1300
I2C_SMU_B_SDA
13
MAKE_BASE=TRUE
I2C_SMU_B_SCL
13
MAKE_BASE=TRUE
24
24
29
29
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
ALIAS
ALIAS
PINS 26, 27
PULSAR
U2600
I2C_CLOCK_SDA
27
I2C_CLOCK_SCL
27
PINS C1, B1
OPTICAL TEMP SENSOR
U1602
I2C_OPTICAL_SDA
16
I2C_OPTICAL_SCL
16
PINS 1, 2
I2C ADDR:90
PS TEMP SENSOR
U1650
I2C_PS_TEMP_SDA
16
I2C_PS_TEMP_SCL
16
PINS 1, 2
I2C ADDR:94
HD TEMP SENSOR
U1702
I2C_HD_TEMP_SDA
17
I2C_HD_TEMP_SCL
17
PINS 1, 2
I2C ADDR:92
PP3V3_RUN
1
R1815
1K
5%
1/16W
MF
402
2
1
R1814
1K
5%
1/16W
MF
402
2
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
1/16W
MF
402
2
I2C CONNECTIONS
ALIAS
ALIAS
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
SCALE
NONE
8
6 7
5
4
3
2
1
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
7 8
6
5
4
3
1 2
RGB_LED
C2105
220PF
2 1
GND_CHASSIS_LED
PLACE THESE PARTS CLOSE TO SMU IC
RGB_LED
G_PWM_IN_H
RGB_LED
R2104
953K
1/16W
402
RGB_LED
R2105
200K
1/16W
402
RGB_LED
R2102
1
953K
1%
1/16W
MF
402
2
1
200K
1%
1/16W
MF
402
2
R2109
1
1%
MF
2
1
1%
MF
2
953K
1/16W
402
R_PWM_DC
D
SYS_LED_GREEN
13
MAKE_BASE=TRUE
PWM INPUT FROM SMU
C
PLACE THESE PARTS CLOSE TO SMU IC
SYS_LED_RED
13
MAKE_BASE=TRUE
PWM INPUT FROM SMU
RGB_LED
C2106
0.47UF
RGB_LED
R2115
21
RGB_LED
C2112
0.47UF
CERM
RGB_LED
R2101
0
21
5%
1/16W
MF
402
1
20%
10V
2
CERM
603
100% DUTY CYCLE OF 3V-PP PWM = 0.5V
0
R_PWM_IN_H
5%
RGB_LED
1/16W
R2110
MF
402
RGB_LED
R2111
1
20%
10V
2
603
953K
1/16W
1%
MF
1%
MF
402
G_PWM_DC
1
2
PP5V_PWRON
1
2
4
12
+
13
-
11
G_IN_OFFSET
5MV INPUT OFFSET
PP5V_PWRON
RGB_LED
U2100
4
LP324
5
+
6
-
TSSOP
11
R_IN_OFFSET
RGB_LED
U2100
LP324
14
TSSOP
RGB_LED
C2104
0.022UF
7
R_BASE_DRV
RGB_LED
C2101
0.022UF
G_BASE_DRV
21
20%
16V
CERM
402
21
20%
16V
CERM
402
RGB_LED
R2112
1K
21
1%
1/16W
MF
402
RGB_LED
R2114
1K
21
1%
1/16W
MF
402
1
1
B
PLACE THESE PARTS CLOSE TO SMU IC
RGB_LED
R2118
953K
953K
1/16W
402
200K
1/16W
402
1/16W
1
1%
MF
2
1
1%
MF
2
RGB_LED
R2130
0
SYS_LED_BLUE
13
MAKE_BASE=TRUE
PWM INPUT FROM SMU
A
21
RGB_LED
C2118
0.47UF
CERM
1/16W
20%
10V
603
B_PWM_IN_H
5%
RGB_LED
R2116
MF
402
RGB_LED
R2117
1
2
1
1%
MF
402
2
B_PWM_DC
PP5V_PWRON
3
+
2
-
B_IN_OFFSET
RGB_LED
U2100
4
LP324
1
TSSOP
11
C2102
0.022UF
B_BASE_DRV
RGB_LED
2 1
20%
16V
CERM
402
RGB_LED
R2127
1K
21
1%
1/16W
MF
402
1
5%
25V
CERM
402
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
RGB_LED
L2100
400-OHM-EMI
SM-1
2
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
3
RGB_LED
Q2102
2N3904
SM
2
G_DRV_FB
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
RGB_LED
1
R2100
25.5
1%
1/16W
MF
402
2
MAX LED CURRENT = 0.5 / R
R_DRV_K
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
L2101
400-OHM-EMI
SM-1
2
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
3
RGB_LED
Q2108
2N3904
SM
2
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
RGB_LED
1
R2113
25.5
1%
1/16W
MF
402
2
B_DRV_K
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
RGB_LED
L2102
400-OHM-EMI
SM-1
2
B_DRV
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
3
RGB_LED
Q2114
2N3904
SM
2
B_DRV_FB
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
RGB_LED
1
R2126
25.5
1%
1/16W
MF
402
2
G_DRV_K
G_DRV
<-- 17 INCH
CHANGE R2100 VALUE
TO SET LED CURRENT
RGB_LED
R_DRV
R_DRV_FB
<-- 17 INCH
<-- 17 INCH
21
7
RGB_LED
LED2100
LATBG66B
AMB-GRN-BLUE
PLCC
1
AMB
3
GRN
4
BLUE
RGB_LED
C2108
220PF
21
CERM
RGB_LED
C2109
220PF
21
CERM
SM-1
21
7
PP5V_PWRON
2 1
RGB_LED
L2104
6
2
5
5%
25V
402
5%
25V
402
RGB_LED_A
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
RGB_LED
1
C2107
220PF
5%
25V
2
CERM
402
GND_CHASSIS_LED
400-OHM-EMI
RGB_LED
C2103
LED2101
2
WHITE
SM6
SYS_DRV_K
WHITE_LED
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
C2110
220PF
PLACE THESE PARTS CLOSE TO SMU IC
PP3V3_PWRON
NOSTUFF
R2119
953K
21
1%
1/16W
MF
402
NOSTUFF
R2132
1K
SYS_LED
13
PWM INPUT FROM SMU
20 INCH -->
21
5%
1/16W
MF
402
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)
(AND NO STUFF R2132, R2119 & Q2100)
PART#
114S3921
114S1821
NOSTUFF
Q2100
FDV302P
SOT-23
S
2
G
1
SYS_LED_IN
WHITE_LED
R2107
0
21
5%
1/16W
MF
402
QTY
DESCRIPTION
1
RES, 39.2 OHM, 1%, 402
RES, 18.2 OHM, 1%, 402
3
D
3
SYS_LED_H
WHITE_LED
R2129
4.7K
1/16W
1
5%
MF
402
2
REFERENCE DESIGNATOR(S)
WHITE_LED
R2106
1K
21
5%
1/16W
MF
402
R2103
R2100,R2113,R2126
SYS_GATE
BOM OPTION
20_INCH_LCD
NOSTUFF
1
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
21
5%
25V
CERM
1
2
17_INCH_LCD
1
R2103
56.2
1%
1/16W
MF
402
2
3
2
402
WHITE_LED
L2103
400-OHM-EMI
SM-1
SYS_LED_DRV_K
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
SYS_LED_DRV_C
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
WHITE_LED
Q2101
FDV301N
SM
APPLE COMPUTER INC.
PP3V3_PWRON
PP5V_PWRON
RGB_LED
U2100
4
LP324
10
+
9
-
TSSOP
11
6
U2100_UNUSED
WHITE_LED
L2105
2 1
SM-1
GND_CHASSIS_LED
8
PP5V_PWRON
7
0.1UF
CERM
1
1
20%
10V
2
402
SYS_DRV_A
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
400-OHM-EMI
WHITE_LED
1
C2111
220PF
5%
25V
2
CERM
402
INDICATOR LED
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
SCALE
051-6482 I
SHT
NONE
D
C
21
B
A
REV.
OF
103 21
8
6 7
5
4
3
2
1
7 8
6
5
D
4
NOTE:
SET OUTPUT=1.5VDC FOR U3LITE CORE
IRU3037CS VREF=1.25VDC
VOUT=VREF*(R2203+R2205)/R2205=1.53VDC
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
3
1 2
D
PPVCORE_NB
VOLTAGE=1.2V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
=PPVCORE_NB
22
D2200
21
MBR0520L
SM
D2201
21
SM
R2202
PP5V_PWRON
1
D2202
MBR0520L
SM
2
0
2 1
Q2201_GATE
5%
1/10W
FF
805
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
NOSTUFF
1
C2205
0.022UF
10%
50V
2
CERM
603
PP5V_PWRON
1
R2200
4.7
5%
1/10W
FF
805
2
26
VCC
VC
U2200
SOI
GND
4
U2200_VC
HD
LD
FB
1
2
5
U2200_GATE_H
3
U2200_GATE_L
1
6
U2200_FEEDBACK
1
2
C2216
1UF
C2206
220PF
1
C2204
1UF
20%
25V
2
CERM
805
IRU3037CS
U2200_SS
U2200_COMP
1
C
1
C2214
0.1UF
20%
16V
2
CERM
603
R2201
27.4K
1%
1/16W
MF
402
2
R2201_P2
1
C2215
3900PF
5%
50V
2
CERM
603
8
7
1
C2213
68PF
5%
50V
2
CERM
603
SS
COMP
20%
25V
CERM
805
5%
25V
CERM
402
MBR0520L
PP5V_PWRON
D
G
S
Q2202_DRAIN
D
4
1
G
S
3
U2200_FEEDBACK
CHECK FETS
U2200_VC_D U2200_VC_R
Q2201
NTD60N02R
CASE369
Q2202
NTD60N02R
CASE369
1
C2217
1UF
20%
25V
2
CERM
805
NOSTUFF
1
R2204
1.1K
1%
1/16W
MF
402
2
R2204_P2
NOSTUFF
1
C2212
1UF
20%
25V
2
CERM
1206
1
C2201
10UF
20%
6.3V
2
CERM
1206
L2201
1.6UH
TH
1
C2202
390UF
20%
6.3V
2
ELEC
8X11.5-TH
2 1
NOSTUFF
1
C2207
1UF
20%
10V
2
CERM
603
1
C2203
390UF
20%
6.3V
2
ELEC
8X11.5-TH
1
R2203
2.21K
0.5%
1/16W
MF-LF
603
2
1
R2205
10K
0.5%
1/16W
MF-LF
603
2
1
C2208
1800UF
20%
6.3V
2
ELEC
TH-KZJ
1
C2209
1800UF
20%
6.3V
2
ELEC
TH-KZJ
B
7 6
R14
T16
T11
U18
U13
U10
AG13
AG16
AG22
AE10
AE19
AE25
AC13
AC16
AC22
AB23
AB27
AA10
AA19
AG7
AE4
AC7
AB2
AB6
Y12
Y15
Y20
W13
W18
W21
W25
V11
V16
V19
U14
U17
T12
T15
T20
T23
T27
R10
R13
V15
V12
W17
W14
GND
W4
W8
U9
T2
T6
R17
VDD
OMIT
U3
U3LITE
V1.0-300MM
PBGA
(SYM 6 OF 7)
P12
P15
N13
N18
M11
M16
L14
L17
K12
GND
K15
R18
P11
P16
P19
N4
N8
N9
N14
N17
N23
N27
M12
M15
M20
L10
L13
L18
K2
K6
K11
K16
K21
K25
J9
J14
H10
H19
G4
G23
G27
F13
F16
F22
D2
D7
D10
D19
D25
B4
B13
B16
B22
C
B
=PPVCORE_NB
22
1
C2222
0.1UF
20%
10V
2
CERM
402
1
C2223
0.1UF
20%
10V
2
CERM
402
1
C2225
0.1UF
20%
10V
2
CERM
402
1
C2227
0.1UF
20%
10V
2
CERM
402
1
C2228
0.1UF
20%
10V
2
CERM
402
1
C2229
0.1UF
20%
10V
2
CERM
402
1
C2230
0.1UF
20%
10V
2
CERM
402
1
C2231
0.1UF
20%
10V
2
CERM
402
1
C2232
0.1UF
20%
10V
2
CERM
402
1
C2233
0.1UF
20%
10V
2
CERM
402
1
C2234
0.1UF
20%
10V
2
CERM
402
1
C2235
0.1UF
20%
10V
2
CERM
402
1
C2236
0.1UF
20%
10V
2
CERM
402
1
C2237
0.1UF
20%
10V
2
CERM
402
1
C2238
0.1UF
20%
10V
2
CERM
402
1
C2239
0.1UF
20%
10V
2
CERM
402
1
C2240
0.1UF
20%
10V
2
CERM
402
1
C2242
0.1UF
20%
10V
2
CERM
402
1
C2243
0.1UF
20%
10V
2
CERM
402
1
C2244
0.1UF
20%
10V
2
CERM
402
1
C2245
0.1UF
20%
10V
2
CERM
402
1
C2246
0.1UF
20%
10V
2
CERM
402
1
C2247
0.1UF
20%
10V
2
CERM
402
U3LITE CORE POWER
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
22
SCALE
1
REV.
OF
103
A
I
Page Notes
Power aliases required by this page:
- _PPPCI64_PWRON_SB (to 5V or 3.3V)
- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PP3V3_PWRON_SB
- _PP2V5_PWRON_SB
- _PPVCORE_PWRON_SB (1.2V)
NOTE: PCI pads use the VIO supply to meet
different drive timing
characteristics required by the PCI
spec for 5V vs. 3.3V operation.
D
Connect _PPPCI32_PWRON_SB to
appropriate PCI bus voltage and
_PPPCI64_PWRON_SB to same if 64-bit
PCI, otherwise 3.3V.
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
Power Sequencing:
Must power Shasta VCore rail before any
other Shasta supplies.
C
B
7 8
10
74
=PPVCORE_PWRON_SB
=PP3V3_PWRON_SB
25
7
1
C2300
0.1uF
20%
10V
2
CERM
402
1
C2305
0.1uF
20%
10V
2
CERM
402
1
C2310
0.1uF
20%
10V
2
CERM
402
1
C2320
0.1uF
20%
10V
2
CERM
402
1
C2325
0.1uF
20%
10V
2
CERM
402
1
C2330
0.1uF
20%
10V
2
CERM
402
1
C2335
0.1uF
20%
10V
2
CERM
402
6
1
C2301
0.1uF
20%
10V
2
CERM
402
1
C2306
0.1uF
20%
10V
2
CERM
402
1
C2311
0.1uF
20%
10V
2
CERM
402
1
C2321
0.1uF
20%
10V
2
CERM
402
1
C2326
0.1uF
20%
10V
2
CERM
402
1
C2331
0.1uF
20%
10V
2
CERM
402
1
C2336
0.1uF
20%
10V
2
CERM
402
1
C2302
0.1uF
20%
10V
2
CERM
402
1
C2307
0.1uF
20%
10V
2
CERM
402
1
C2312
0.1uF
20%
10V
2
CERM
402
1
C2322
0.1uF
20%
10V
2
CERM
402
1
C2327
0.1uF
20%
10V
2
CERM
402
1
C2332
0.1uF
20%
10V
2
CERM
402
1
C2337
0.1uF
20%
10V
2
CERM
402
1
C2303
0.1uF
20%
10V
2
CERM
402
1
C2308
0.1uF
20%
10V
2
CERM
402
1
C2313
0.1uF
20%
10V
2
CERM
402
1
C2323
0.1uF
20%
10V
2
CERM
402
1
C2328
0.1uF
20%
10V
2
CERM
402
1
C2333
0.1uF
20%
10V
2
CERM
402
1
C2338
0.1uF
20%
10V
2
CERM
402
1
C2304
0.1uF
20%
10V
2
CERM
402
1
C2309
0.1uF
20%
10V
2
CERM
402
1
C2314
0.1uF
20%
10V
2
CERM
402
1
C2324
0.1uF
20%
10V
2
CERM
402
1
C2329
0.1uF
20%
10V
2
CERM
402
1
C2334
0.1uF
20%
10V
2
CERM
402
1
C2339
0.1uF
20%
10V
2
CERM
402
5
4
3
1 2
D
H8
J15
J12
H15
AA1
AA2
AA3
AB10
AB2
AB6
B1
B2
B5
D1
F4
VDDO33
F8
H1
L7
M1
R2
U12
Shasta max (est 06/30/03) current:
U9
V7
DIGITAL - 1.2V - 950 mA (1175 mW)
W4
ANALOG12 - 1.2V - 600 mA ( 760 mW)
VDDPs - 2.5V - 100 mA ( 250 mW)
A1
I/O 2.5 - 2.5V - 20 mA ( 60 mW)
A2
I/O 3.3 - 3.3V - 220 mA ( 770 mW)
A22
Total: 3015 mW
AA10
AA6
AB1
AB22
C19
D2
GND
E22
F3
F7
H2
H9
J10
J11
J13
J14
J16
K7
K13
K12
K11
K10
J22
K8
L15
U2300
SHASTA
POWER
K9
L10
L8
M15
VDDC
V1.0
BGA
(1 OF 8)
OMIT
GND
L11
=PP2V5_PWRON_SB
1
C2350
0.1uF
20%
10V
2
N8
R9
P15
L14
L13A5L12
R10
L16
R12
L9
M10
T10
M11
T15
VDDO25
VDDP_KL
M13
M12
VIO1
VIO2
M14
GND
D19
G15
H18
H17
K21
L21
W22
Y19
V8
W5
W19
U22
U13
U10
T12
R19
P9
P4
P14
P13
P12
P10
N9
N22
N13
N12
N11
N10
M2
1
C2355
0.1uF
20%
10V
2
CERM
402
For PCI_AD<63..32>
1
C2360
0.1uF
20%
10V
2
CERM
402
For PCI_AD<31..0>
CERM
402
1
C2356
0.1uF
20%
10V
2
CERM
402
1
C2361
0.1uF
20%
10V
2
CERM
402
1
C2351
0.1uF
20%
10V
2
CERM
402
=PPPCI64_PWRON_SB
1
C2357
0.1uF
20%
10V
2
CERM
402
=PPPCI32_PWRON_SB
1
C2362
0.1uF
20%
10V
2
CERM
402
=PP2V5_PWRON_SB
1
C2365
0.1uF
20%
10V
2
CERM
402
88
74
25
23
7
7
C
7
88
74
25
23
7
B
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:01:04 2004
8
Master: Link
Shasta Core Power
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
6 7
5
4
3
2
SCALE
NONE
051-6482
SHT
23 103
1
REV.
I
OF
A
7 8
6
5
4
3
1 2
D
=PP1V2_HT
60
7
PP2V5_PWRON
U3LITE REQUIRES ALL JTAG SIGNALS
HIGH FOR NORMAL OPERATION
1
R2424
10K
2
JTAG_NB_TCK
JTAG_NB_TDI
JTAG_NB_TDO
JTAG_NB_TMS
C
JTAG_NB_TRST_L
5%
1/16W
MF
402
1
R2426
10K
5%
1/16W
MF
402
2
1
R2429
10K
5%
1/16W
MF
402
2
1
R2431
10K
5%
1/16W
MF
402
2
1
R2433
10K
5%
1/16W
MF
402
2
1
R2444
10K
5%
1/16W
MF
402
2
1
R2436
10K
5%
1/16W
MF
402
2
1
R2443
10K
5%
1/16W
MF
402
2
1
2
1
R2442
10K
5%
1/16W
MF
402
2
NOSTUFF
C2401
1000PF
5%
25V
CERM
603
1
R2400
100
1%
1/16W
MF
402
2
1
R2403
100
1%
1/16W
MF
402
2
VSP_NB_CLK_P
27
VSP_NB_CLK_N
27
JTAG_NB_TCK
JTAG_NB_TDI
JTAG_NB_TDO
JTAG_NB_TMS
JTAG_NB_TRST_L
NB_RI_PU
NB_TEST_PD
NB_MC_PD
NB_RE_PD
NB_VSP_CLK_VREF
VOLTAGE=0.6V
1
C2400
0.1UF
20%
10V
2
CERM
402
TP_NB_PM_SLEEP0
6
1
R2402
121
1%
1/16W
MF
402
2
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
R2401
121
1%
1/16W
MF
402
2
P4
VSP_CLKP
R4
VSP_CLKN
R25
CE1_LT_TCK
V25
CE1_A_TDI
AA25
CE1_B_TDO
M26
CE1_DI1_TMS
F20
CE1_DI2_TRST
AC2
CE1_RI
AH3
CEO_TEST
AD5
CE0_MC
AD3
CE0_RE
D15
PM_SLEEP0
U3
U3LITE
V1.0-300MM
PBGA
(SYM 7 OF 7)
OMIT
HRESET*
PURESET*
SUSPENDACK*
SUSPENDREQ*
API0_ISCL
API_ISCA
SYS_ISCL0
SYS_ISCA0
SYS_ISCL1
SYS_ISCA1
DUMMY_A
DUMMY_B
IRQ0
PMR_OBSV
THMI
THMO
A21
E20
D20
D21
A20
B20
C20
B21
C21
E21
AC28
AB28
E9
Y9
J17
J18
NB_WARM_RESET_L
NB_COLD_RESET_L
NB_SUSPEND_ACK_L
NB_SUSPEND_REQ_L
I2C_NB_A_SCL
I2C_NB_A_SDA
I2C_NB_B_SCL
I2C_NB_B_SDA
I2C_NB_C_SCL
I2C_NB_C_SDA
TP_DUMMY_A
TP_DUMMY_B
NB_INT_L
NB_PMR_OBSV
NB_THMI
NB_THMO
SMU_SUSPENDREQ_L
13
28 25
8
24
8
24
18
18
18
18
18
18
6
6
25
8
8
8
PP3V3_PWRON PP2V5_PWRON
1
R2420
330
5%
1/16W
MF
402
2
PMU_SUSPEND_REQ
6
D
Q2404
2N7002DW
2
SOT-363
G
S
1
NOSTUFF
R2408
5%
1/16W
MF
402
5
G
0
2 1
1
R2419
330
5%
1/16W
MF
402
2
3
D
Q2404
2N7002DW
SOT-363
S
4
NB_SUSPEND_REQ_L
24
D
C
PP3V3_PWRON
PP2V5_PWRON
NOSTUFF
1
B
SYS_COLD_RESET_L
8
13
R2405
4.7K
5%
1/16W
MF
402
2
NOSTUFF
1
R2438
10K
5%
1/16W
MF
402
2
NB_PU_RESET
6
NOSTUFF
D
Q2412
2N7002DW
2
SOT-363
G
S
1
R2406
0
5%
1/16W
MF
402
1
R2435
4.7K
5%
1/16W
MF
402
2
3
NOSTUFF
D
Q2412
2N7002DW
5
2 1
SOT-363
G
S
4
NB_COLD_RESET_L
24
LAST MODIFIED: JUNE 10, 04
MASTER: GILA
B
U3LITE MISC
A
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
24
SCALE
REV.
OF
103
A
I
8
6 7
5
4
3
2
1
ELECTRICAL_CONSTRAINT_SET
I2S0_TO_SB
I2S0_TO_DEV
I2S0_TO_DEV
I2S0_BIDIR
I2S0_BIDIR
I2S1_TO_SB
I2S1_TO_DEV
I2S1_TO_DEV
I2S1_BIDIR
D
I2S1_BIDIR
I2S2_TO_SB
I2S2_TO_DEV
I2S2_TO_DEV
I2S2_BIDIR
I2S2_BIDIR
SB_CLK25M_ATA
Page Notes
Power aliases required by this page:
- _PP3V3_PCI
- _PP3V3_PWRON_SB
- _PP2V5_PWRON_SB
- _PP1V2_PWRON_SB
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
- PCI_64BIT
Configures Shasta for 64-bit PCI
NOTE: XGC required for Shasta GPIOs
- MPIC_NB/MPIC_SB
C
Selects whether NorthBridge or
SouthBridge MPIC will be used for
interrupt controller.
NorthBridge / SouthBridge MPIC Routing
-> From NorthBridge
NB_INT_L
24
B
<- To CPU
CPU_INT_L
29
30
14
6
=PP3V3_PCI
R2551
10K
5%
1/16W
MF
402
R2553
10K
5%
1/16W
MF
402
R2557
A
10K
5%
1/16W
MF
402
R2559
10K
5%
1/16W
MF
402
DRAWING
LAST_MODIFIED=Mon Dec 13 20:01:12 2004
2 1
2 1
2 1
2 1
MPIC_NB
R2579
75
74
7
R2550
10K
5%
1/16W
MF
402
R2552
10K
5%
1/16W
MF
402
R2556
10K
5%
1/16W
MF
402
R2558
10K
5%
1/16W
MF
402
76
1/16W
77
0
5%
MF
402
2 1
2 1
2 1
2 1
1
2
PCI_SLOTE_REQ_L
PCI_SLOTE_GNT_L
PCI_SLOTF_REQ_L
PCI_SLOTF_GNT_L
PCI_SLOTA_INT_L
PCI_SLOTD_INT_L
PCI_SLOTE_INT_L
PCI_SLOTG_INT_L
MPIC_SB
R2575
10K
5%
1/16W
MF
402
MPIC_SB
R2578
47
5%
1/16W
MF
402
NET_SPACING_TYPE
AUDIO
10 MIL SPACING
10 MIL SPACING
15 MIL SPACING SB_CLK18M_XTAL
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
2 1
NB_INT_L_R
2 1
25
25
25
25
76
25
6
25
25
77
25
7 8
DIFFERENTIAL_PAIR
PP3V3_RUN
1
R2576
10K
5%
1/16W
MF
402
2
3
MPIC_SB
1
Q2576
2N3904
SM
2
I2S0_DEV_TO_SB_DTI
I2S0_SB_TO_DEV_DTO
I2S0_MCLK
I2S0_BITCLK
I2S0_SYNC
I2S1_DEV_TO_SB_DTI
I2S1_SB_TO_DEV_DTO
I2S1_MCLK
I2S1_BITCLK
I2S1_SYNC
I2S2_DEV_TO_SB_DTI
I2S2_SB_TO_DEV_DTO
I2S2_MCLK
I2S2_BITCLK
I2S2_SYNC
SB_CLK18M_XTALI
SB_CLK18M_XTALO
SB_CLK18M_XTALO_R
SB_CLK25M_ATA
To SouthBridge ->
NB_TO_SB_INT
From SouthBridge <ÂSB_INT_L
25
25
6
95
25
103
95
25
102
25
103
102
25
103
95
25
76
25
6
94
25
94
76
6
6
76
94
25
6
94
25
94
25
6
102
25
102
25
102
25
102
25
25
102
25
25
25
27
25
95
95
103
102
102
103
95
103
I2S0: Audio DAC
25
94
76
76
25
94
76
25
94
94
25
94
25
25
94
I2S1: Soft Modem
102
102
102
102
102
I2S2: S/P-DIF
23
74
25
PCI 32-bit select
1 = 32-bit PCI & GPIOs
0 = 64-bit PCI & XGC
=PP2V5_PWRON_SB
7
74
88
23
Re-pin within each RPAK as necessary
DO NOT swap between RPAKs
I2S0_DEV_TO_SB_DTI
25
I2S0_SB_TO_DEV_DTO
25
I2S0_MCLK
25
I2S0_BITCLK
25
I2S0_SYNC
25
I2S1_DEV_TO_SB_DTI
6
I2S1_SB_TO_DEV_DTO
6
I2S1_MCLK
6
I2S1_BITCLK
6
I2S1_SYNC
6
I2S1_RESET_L
6
I2S2_DEV_TO_SB_DTI
25
I2S2_SB_TO_DEV_DTO
25
I2S2_MCLK
25
I2S2_BITCLK
25
I2S2_SYNC
25
I2S2_RESET_L
102
AUDIO GPIO - see note on right
=PP3V3_PWRON_SB
7
R2500
10K
5%
1/16W
MF
402
PCI_64BIT
R2501
1K
5%
1/16W
MF
402
1
R2580
4.7K
5%
1/16W
MF
402
2
C2590
22pF
5%
50V
CERM
402
1
2
1
2
1
2
R2511
4
RP2510
3
1
2
2
RP2520
1
4
3
4
RP2530
3
2
1
CRITICAL
Y2590
18.432M
8X4.5MM-SM
1/16W
33
5%
1/16W
SM1
33
5%
1/16W
SM1
33
5%
1/16W
SM1
2 1
5
R2505
3.3
5%
1/10W
FF
805
R2510
3.3
5%
1/10W
FF
805
0
2 1
5%
MF
402
87
1
R2590
200
2
SB_CLK18M_XTALO
1
2
PP2V5_PWRON_SB_XTAL18VDD
2 1
1
C2500
10uF
20%
6.3V
2
CERM
1206
PP2V5_PWRON_SB_XTALVDD
2 1
1
C2510
10uF
20%
6.3V
2
CERM
1206
(I2S0_DEV_TO_SB_DTI)
5
I2S0_SB_TO_DEV_DTO_R
6
I2S0_MCLK_R
8
I2S0_BITCLK_R
7
I2S0_SYNC_R
(I2S1_DEV_TO_SB_DTI)
7
I2S1_SB_TO_DEV_DTO_R
8
I2S1_MCLK_R
5
I2S1_BITCLK_R
6
I2S1_SYNC_R
(I2S1_RESET_L)
(I2S2_DEV_TO_SB_DTI)
5
I2S2_SB_TO_DEV_DTO_R
6
I2S2_MCLK_R
7
I2S2_BITCLK_R
8
I2S2_SYNC_R
(I2S2_RESET_L)
SB_INT_L
25
MODEM_RING2SYS_L
6
25
94
SB_PCI_SEL32BIT
I2C_SB_SCL
18
I2C_SB_SDA
18
SYS_WARM_RESET_L
77
74
8
SB_STOPXTALS_L
13
SMU_SUSPENDREQ_L
24
28
13
SB_SUSPENDACK_L
13
SYS_PME_L
77
13
TP_SB_WATCHDOG
JTAG_SB_TDI
8
JTAG_SB_TDO
8
JTAG_SB_TCK
8
JTAG_SB_TMS
8
JTAG_SB_TRST_L
8
SB_TEST_MODE_PD
TP_SB_PLLTEST
6
TP_SB_FSTEST
6
25
SB_CLK18M_XTALI
SB_CLK18M_XTALO_R
25
SB_CLK25M_ATA
27
25
1%
1/16W
MF
402
C2591
22pF
5%
50V
CERM
402
VOLTAGE=2.5V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
1
C2501
1uF
10%
6.3V
2
CERM
402
VOLTAGE=2.5V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
1
C2511
1uF
10%
6.3V
2
CERM
402
W10
U11
V11
W18
V12
AA11
AB11
W12
NC
25
W14
VDD VDD
W7
I2S0DTI_H
Y5
I2S0DTO_H
U8
I2S0MCLK_H
AA4
I2S0BITCLK_H
Y6
I2S0SYNC_H
V10
I2S1DTI_H
AB5
I2S1DTO_H
V9
I2S1MCLK_H
AA8
I2S1BITCLK_H
AA7
I2S1SYNC_H
V5
GPIO_H_0
AA5
I2S2DTI_H
Y8
I2S2DTO_H
Y7
I2S2MCLK_H
AB4
I2S2BITCLK_H
W9
I2S2SYNC_H
Y2
GPIO_H_1
AB3
GPIO_H_2
W8
GPIO_H_3
W6
PCI_SEL32BIT_H
Y9
I2CCLK_H
AB7
I2CDATA_H
E9
RESET_L
STOPXTALS_L
SUSPENDREQ_L
SUSPENDACK_L
PCI1PME_L
INTRWD_H
TDI
W11
TDO
TCK
Y11
TMS
TRST_L
A3
TEST_MODE_H
U14
PLLTEST
V14
FSTEST
W13
XTAL_18_I
V13
XTAL_18_O
U15
XTALI
V15
XTALO
XTAL_18 PLL_45
GND
AB12
XTAL_18 XTAL
4
Y13
AA13 AB13
PLL_45
VDD
U2300
SHASTA
V1.0
BGA
(2 OF 8)
(SCCA) (SCCB)
I2S2 I2S1 I2S0
GPIO
I2C
PWR_MGT
TEST
XTALS
GND
PP1V2_PWRON_SB_PLL45VDD
PP1V2_PWRON_SB_PLL49VDD
Y12
PLL_49
VDD
OMIT
GPIO
PCI1REQ_3_L
6
PCI1GNT_3_L
7
PCI1REQ_4_L
8
PCI1GNT_4_L
9
PCI1REQ_5_L
10
PCI1GNT_5_L
11
PCI1AD_32_H
12
PCI1AD_33_H
13
PCI1AD_34_H
14
PCI1AD_35_H
15
PCI1AD_36_H
16
PCI1AD_37_H
17
PCI1AD_38_H
18
PCI1AD_39_H
19
PCI1AD_40_H
20
PCI1AD_41_H
21
PCI1AD_42_H
22
PCI1AD_43_H
23
PCI1AD_44_H
24
PCI1AD_45_H
25
PCI1AD_46_H
26
PCI
PCI1AD_47_H
27
PCI1AD_48_H
28
PCI1AD_49_H
29
30
PCI1AD_50_H
31
PCI1AD_51_H
32
PCI1AD_52_H
33
PCI1AD_53_H
34
PCI1AD_54_H
PCI1AD_55_H
35
36
PCI1AD_56_H
PCI1AD_57_H
37
PCI1AD_58_H
38
39
PCI1AD_59_H
40
PCI1AD_60_H
PCI1AD_61_H
41
PCI1AD_62_H
42
43
PCI1AD_63_H
PCI1C_BE_4_L
44
PCI1C_BE_5_L
45
PCI1C_BE_6_L
46
PCI1C_BE_7_L
47
PCI1REQ64_L
48
PCI1ACK64_L
49
PCI1PAR64_H
50
XGI_CLK_H
51
XGI_DTO0_H
52
XGI_DTO1_H
53
XGI
XGI_DTI_H
54
PLL_49
GND
AA12
VOLTAGE=1.2V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
1
C2521
VOLTAGE=1.2V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
C2531
W17
VIO
PME
C2520
1uF
10%
6.3V
2
CERM
402
1
C2530
1uF
10%
6.3V
2
CERM
402
1
C2540
0.1uF
20%
10V
2
CERM
402
"Slot E" - AD21
U17
PCI_SLOTE_REQ_L
AA19
PCI_SLOTE_GNT_L
"Slot F" - AD22
AB21
PCI_SLOTF_REQ_L
AA20
PCI_SLOTF_GNT_L
U16
SB_TO_SMU_INT_L
Y20
CPU_SRESET_L
D18
SB_GPIO12
A20
SYS_OVERTEMP_L
F18
UDASH_SDOWN
F17
UDASH_RESET_L
G16
AGP_INT_L
F16
PCI_SLOTA_INT_L
A21
PCI_SLOTB_INT_L
B21
PCI_SLOTC_INT_L
C20
PCI_SLOTD_INT_L
G17
PCI_SLOTE_INT_L
G18
PCI_SLOTF_INT_L
E19
SB_GPIO23
F19
SB_GPIO24
D20
SB_GPIO25
E20
SB_SATABR_RESET_L
C21
PCI_SLOTG_INT_L
F20
FW_LOWPWR
G19
ENETFW_RESET
C22
SB_GPIO30
D21
ENET_ENERGYDET
G20
AUDIO_LO_DET_L
D22
AUDIO_LO_OPTICAL_PLUG_L
K18
AUDIO_LI_DET_L
H19
AUDIO_LI_OPTICAL_PLUG_L
J17
AUDIO_HP_DET_L
F21
AUDIO_SPKR_DET_L
G21
AUDIO_LO_MUTE_L
H20
AUDIO_HP_MUTE_L
J19
AUDIO_SPKR_MUTE_L
F22
AUDIO_EXT_MCLK_SEL
G22
AUDIO_GPIO_11
H21
AUDIO_GPIO_12
J20
I2S0_RESET_L
H22
SB_GPIO45
K22
SB_GPIO46
K20
SB_GPIO47
K17
SYS_SLEWING_L
L17
SB_GPIO49
E18
SB_GPIO50
Y4
SB_GPIO51
U7
SB_GPIO52
T9
NB_TO_SB_INT
W2
SMU_TO_SB_INT_L
3
1
10uF
20%
6.3V
2
CERM
1206
1
10uF
20%
6.3V
2
CERM
1206
=PP3V3_PWRON_SB
R2520
3.3
5%
1/10W
FF
805
R2530
3.3
5%
1/10W
FF
805
7
2 1
2 1
25
23
=PP1V2_PWRON_SB
74
25
25
25
25
25
13
29
30
25
25
16
25
27
13
6
94
6
25
94
49
6
25
76
25
25
25
25
25
25
25
25
25
77
25
90
25
87
25
25
87
25
101
6
101
101
102
102
102
98
102
100
102
103
102
101
95
25
25
25
27
33
25
13
25
25
25
25
25
25
13
7
REDUNDANT - NEED TO ADDRESS THIS
REDUNDANT - NEED TO ADDRESS THIS
AUDIO GPIOS
the audio circuit to provide the
necessary pull-ups & pull-downs.
NOTE: It is the responsibility of
APPLE COMPUTER INC.
1 2
=PP3V3_PWRON_SB
25
74
23
7
R2554
1K
SB_TO_SMU_INT_L
13
25
CPU_SRESET_L
25
30
29
SYS_OVERTEMP_L
13
27
25
16
UDASH_RESET_L
6
94
25
SYS_SLEWING_L
13
27
33
25
MODEM_RING2SYS_L
94
25
6
I2S1_RESET_L
94
25
6
SB_SATABR_RESET_L
25
FW_LOWPWR
25
90
ENETFW_RESET
25
87
ENET_ENERGYDET
25
87
SB_GPIO12
25
PCI_SLOTB_INT_L
25
PCI_SLOTC_INT_L
25
PCI_SLOTF_INT_L
25
SB_GPIO23
25
SB_GPIO24
25
SB_GPIO25
25
SB_GPIO30
25
SB_GPIO45
25
SB_GPIO46
25
SB_GPIO47
25
SB_GPIO49
25
SB_GPIO50
25
SB_GPIO51
25
SB_GPIO52
25
SMU_TO_SB_INT_L
13
25
Shasta Serial / Misc
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
SCALE
NONE
2 1
NO STUFF
5%
1/16W
R2555
MF
402
R2560
1K
2 1
5%
1/16W
R2561
MF
402
NO STUFF
R2562
1K
2 1
5%
1/16W
R2563
MF
402
R2564
10K
2 1
5%
1/16W
MF
402
R2565
R2566
10K
2 1
5%
1/16W
R2567
MF
402
R2568
10K
2 1
5%
1/16W
MF
402
=PP3V3_PWRON_SB
25
74
23
7
RP2550
10K
5 4
5%
RP2550
1/16W
SM1
RP2550
10K
8 1
5%
RP2551
1/16W
SM1
RP2551
10K
6 3
5%
RP2551
1/16W
SM1
RP2550
10K
6 3
5%
RP2551
1/16W
SM1
RP2552
10K
8 1
5%
RP2552
1/16W
SM1
RP2552
10K
6 3
5%
RP2552
1/16W
SM1
RP2553
10K
5 4
5%
RP2553
1/16W
SM1
RP2553
10K
6 3
5%
RP2553
1/16W
SM1
Master: Link
SHT
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
OF
2 1
D
2 1
2 1
2 1
2 1
C
7 2
8 1
7 2
5 4
B
7 2
5 4
7 2
8 1
A
REV.
I
103 25
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
C2_VDD
C3_VDD
C4_VDD
VDD_PLL1
VDD_PLL2
VDD_PLL3
VDD_PLL4
VDD_I2C
VDD_NBSYNC
VDD_PCLK
VDD25
VDD25
VDD33
VDD33_BC
VDD33_BC1
VDD_HCLK0
VDD_HCLK0
VDD_HCLK1
VDD_HCLK2
VDD_HCLK2
VDD_HSYNC
VDD_HSYNC
VDD15_HSYNC
VDD15_PCLK
VDD_VCLK
VDD_XTAL
C2637
0.1UF
20%
10V
CERM
402
SYM 2 OF 2
OMIT
U2600
PULSAR
FSBGA
1
C2638
0.1UF
20%
10V
2
CERM
402
C1_VSS C1_VDD
C2_VSS
C3_VSS
C4_VSS
VSS_PLL1
VSS_PLL2
VSS_PLL3
VSS_PLL4
VSS_CML
VSS_I2C
VSS_NBSYNC
VSS_PCLK
VSS25
VSS25
VSS33
VSS33_BC
VSS33_BC1
VSS_HCLK0
VSS_HCLK0
VSS_HCLK1
VSS_HCLK2
VSS_HCLK2
VSS_HSYNC
VSS_HSYNC
VSS_VCLK
VSS_XTAL
G1 F1
M4 L3
E10 E12
C9 B9
D12
D1
K8
M2
A6
C2
F11
L12
L2
H2
E2
L7
M5
C10
B11
B7
A4
A7
H10
K12
A3
C12
D
C
B
L2601
=PPVCORE_PWRON_PULSAR
7
26
D
C
PP3V3_PWRON
B
180-OHM-1.5A
0603
R2601
4.7
5%
1/16W
MF
402
1
C2611
0.1UF
20%
10V
2
CERM
402
L2603
180-OHM-1.5A
0603
R2609
4.7
5%
1/16W
MF
402
1
C2613
0.1UF
20%
10V
2
CERM
402
L2605
180-OHM-1.5A
0603
R2603
4.7
5%
1/16W
MF
402
1
C2615
0.1UF
20%
10V
2
CERM
402
L2607
180-OHM-1.5A
0603
R2605
4.7
5%
1/16W
MF
402
1
C2619
0.1UF
20%
10V
2
CERM
402
L2609
180-OHM-1.5A
0603
R2607
4.7
5%
1/16W
MF
402
1
C2620
0.1UF
20%
10V
2
CERM
402
2 1
2 1
1
C2645
2.2UF
20%
6.3V
2
CERM1
603
PLACE NEAR PIN D10 D12
2 1
2 1
1
C2669
2.2UF
20%
6.3V
2
CERM1
603
PLACE NEAR PIN D2 D1
2 1
2 1
1
C2603
2.2UF
20%
6.3V
2
CERM1
603
PLACE NEAR PIN L8 K8
2 1
2 1
1
C2607
2.2UF
20%
6.3V
2
CERM1
603
PLACE NEAR PIN M3 M2
2 1
2 1
1
C2621
2.2UF
20%
6.3V
2
CERM1
603
PP1V5_PSL_PLL1
1
C2609
0.1UF
20%
10V
2
CERM
402
PP1V5_PSL_PLL2
1
C2617
0.1UF
20%
10V
2
CERM
402
PP1V5_PSL_PLL3
1
C2601
0.1UF
20%
10V
2
CERM
402
PP1V5_PSL_PLL4
1
C2605
0.1UF
20%
10V
2
CERM
402
PP3V3_PSL_XTAL
1
C2622
0.1UF
20%
10V
2
CERM
402
402 CAPS NOT NEEDED
IF 603 CAN BE PLACED CLOSE TO PULSAR
VOLTAGE=1.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
=PP2V5_PWRON_RAM
40
37
7
26
=PPVCORE_PULSAR
7
26
=PPVCORE_PWRON_PULSAR
7
26
PP3V3_PWRON
1
C2665
0.1UF
20%
10V
2
CERM
402
1
C2639
0.1UF
20%
10V
2
CERM
402
1
C2631
0.1UF
20%
10V
2
CERM
402
1
C2627
0.1UF
20%
10V
2
CERM
402
1
C2667
0.1UF
20%
10V
2
CERM
402
1
C2640
0.1UF
20%
10V
2
CERM
402
1
C2632
0.1UF
20%
10V
2
CERM
402
1
C2628
0.1UF
20%
10V
2
CERM
402
40
=PPVCORE_PWRON_PULSAR
7
26
=PP1V2_PULSAR
7
26
=PP2V5_PWRON_RAM
37
7
26
PP3V3_PWRON
PP3V3_RUN
=PPVCORE_PULSAR
7
26
=PP1V2_PULSAR
7
26
=PPVCORE_PULSAR
7
26
PP3V3_RUN
1
C2651
0.1UF
20%
10V
2
CERM
402
1
C2633
0.1UF
20%
10V
2
CERM
402
1
C2629
0.1UF
20%
10V
2
CERM
402
PP3V3_PWRON
1
C2634
0.1UF
20%
10V
2
CERM
402
1
C2630
0.1UF
20%
10V
2
CERM
402
1
C2671
0.1UF
20%
10V
2
CERM
402
1
C2635
2
D10
D2
L8
M3
B2
G12
M12
H3
K1
E1
L5
M9
A11
A9
A8
C5
B4
K10
H12
J11
M11
A1
A12
PINS G12, M12, H3, K1, L5, M9, A11, A9
A8, C5, B4, K10, H12 J11, M11, A1
CAN BE TURNED OFF IN SLEEP
0.1UF
20%
10V
CERM
402
1
C2636
0.1UF
20%
10V
2
CERM
402
1
2
=PP1V2_PULSAR
7
26
1
C2623
0.1UF
20%
10V
2
CERM
402
PART#
359S0076
QTY
1
DESCRIPTION
PULSAR, PBGA
REFERENCE DESIGNATOR(S)
U2600
BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM
A
8
6 7
5
4
1
C2624
0.1UF
20%
10V
2
CERM
402
1
C2625
0.1UF
20%
10V
2
CERM
402
1
C2626
0.1UF
20%
10V
2
CERM
402
LAST MODIFIED: APR 09, 04
MASTER: GILA
PULSAR POWER
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
3
2
051-6482
SCALE
NONE
SHT
26
1
REV.
I
OF
103
A
7 8
6
5
4
3
1 2
ELECTRICAL_CONSTRAINT_SET
EI_CPU_CLK_P
27
29
EI_CPU_CLK_N
27
29
EI_CPU1_CLK_P
14
6
EI_CPU1_CLK_N
14
6
EI_NB_CLK_P
27
28
EI_NB_CLK_N
27
28
EI_CPU_SYNC
27
29
EI_NB_SYNC
27
28
EI_CPU1_SYNC
14
D
6
VSP_NB_CLK_P
24
27
VSP_NB_CLK_N
24
27
AGP_CLK66M_NB
27
48
AGP_CLK66M_GPU
27
49
HT_CLK66M_NB
27
60
HT_CLK66M_SB
27
62
PCI_CLK66M_SB_INT
27
74
PCI_CLK33M_SB_EXT
8
74
PLS_EXTCLK
27
EI_CPU_CLK EI_CPU_CLK
EI_CPU_CLK EI_CPU_CLK
EI_NB_CLK
EI_NB_CLK
EI_SYNC
EI_CPU1_SYNC
VSP_NB_CLK VSP_NB_CLK
AGP_NB_CLK
AGP_GPU_CLK
HT_NB_CLK
HT_SB_CLK
CLOCKS_PCI
CLOCKS_PCI
PLS_XTAL
DIFFERENTIAL SIGNALS SHOULD HAVE 5 MIL SPACING TO EACH OTHER
ALL SPACING GROUPS SHOULD HAVE 15 MIL SPACING TO SIGNALS NOT IN THEIR GROUP
EI_NB_SYNC IS PART OF EI_CPU_SYNC TOPOLOGY
NET_SPACING_TYPE
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
C
CLOCK_RESET_L
13
0=IIC ADDR D2/D3
1=IIC ADDR D4/D5
PP3V3_PWRON
18
6
11
1
R2722
1K
5%
1/16W
MF
2 1
25.0000M
402
2
NO STUFF
R2752
0
5%
1/16W
MF
402
NO STUFF
R2758
330K
5%
1/16W
MF
402
CRITICAL
Y2701
8X4.5MM-SM
2 1
2 1
2 1
R2754
1/16W
R2756
1/16W
PLS_X_OUT_B
402
402
0
2 1
5%
MF
0
2 1
5%
MF
NOSTUFF
R2748
PLS_X_IN_B
5%
1/16W
MF
402
0
SYS_OVERTEMP_L
25
16
B
13
=PULSAR_POWER_DOWN
3
NOSTUFF
J2700
U.FL-R_SMT
F-ST-SM
3
1
2
27
PLS_EXTCLK
NOSTUFF
1
R2762
24
5%
1/16W
MF
402
2
PLS_INTERM
NOSTUFF
1
R2764
24
5%
1/16W
MF
402
2
R2706
R2744
R2740
R2746
R2742
R2750
R2724
249
1K
1K
681
806
DIFFERENTIAL_PAIR NET_PHYSICAL_TYPE
EI_CPU1_CLK EI_CPU1_CLK
EI_CPU1_CLK EI_CPU1_CLK
EI_NB_CLK
EI_NB_CLK
VSP_NB_CLK VSP_NB_CLK
NOSTUFF
NOSTUFF
R2704
0
5% 402
R2738
1K
402 5%
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
402
402 1%
402 1%
4021K1%
402
402 5%
18
18
PLS_RESET_L
PLS_X_IN
PLS_X_OUT
PLS_X_ADDRSEL
TP_PLS_TEST1
6
TP_PLS_TEST2
6
TP_PLS_TEST3
6
1%
PLS_SCAN_MODE
PLS_REF15
PLS_REF25
PLS_REF33
TP_PLS_REF_CML
6
1%
PLS_PRES_CML
PLS_FORCE_P0_L_R
5%47402
PULSAR_POWER_DOWN_R
I86
I87
I116
I117
I96
I97
I98
I99
I118
I94
I95
I100
I101
I102
I103
I90
I91
I119
I2C_CLOCK_SCL
I2C_CLOCK_SDA
C11
B12
E11
D11
G11
C1
B1
D3
E3
K3
M1
J2
M6
A5
B6
F2
C3
U2600
PULSAR
SCLK
SDATA
RESET*
XIN
XOUT
ADDRSEL
TEST1
TEST2
TEST3
SCAN_MODE
REF15
REF25
REF33
REF_CML
PRES_CML
FORCESPO*
PD
SYM 1 OF 2
OMIT
FSBGA
GPCLK33_0
GPCLK33_1
VCLKN
VCLKP
HCLKN_0
HCLKN_1
HCLKN_2
HCLKP_0
HCLKP_1
HCLKP_2
GPCLK25_0
GPCLK25_1
PCLK25_0
PCLK25_1
PCLK33_0
PCLK33_1
PCLK33_2
PCLK33_3
PCLK33_4
HTBEN_0
HTBEN_1
NBSYNC
HSYNC_0
HSYNC_1
REFCLK_0
REFCLK_1
SLEWING*
ERROR*
PCLK12
PCLK15
L4
PCI_CLK_GP0_R
K4
PCI_CLK_GP1_R
A2
VSP_NB_CLK_N_C
B3
VSP_NB_CLK_P_C
B10
EI_CPU_CLK_N_C
C8
EI_CPU1_CLK_N_R
C4
EI_NB_CLK_N_C
A10
EI_CPU_CLK_P_C
B8
EI_CPU1_CLK_P_R
B5
EI_NB_CLK_P_C
J3
PLS_CLK_66M_0_R
6
J1
6
PLS_CLK_66M_1_R
K2
HT_CLK66M_NB_R
L1
RAM_CLK66M_NB_R
K5
PCI_CLK66M_SB_INT_R
L6
PCI_CLK_P1_R
M7
AGP_CLK66M_GPU_R
L9
PCI_CLK_P3_R
M10
PCI_CLK_P4_R
K11
CPU_HTBEN_R
J12
CPU1_HTBEN_R
F12
EI_NB_SYNC_R
J10
EI_CPU_SYNC_R
H11
EI_CPU1_SYNC_R
G2
SB_CLK25M_ATA_R
H1
SATA_CLK25M_R
K9
SLEWING_L_R
M8
CLOCK_ERROR_L
L11
HT_CLK66M_SB_R
L10
AGP_CLK66M_NB_R
R2701
5%
0
2 1
R2761
2 1
5%0402
C2708
0.001UF
CERM
50V
2 1
10% 402
C2710
0.001UF
50V
CERM
2 1
402 10%
C2713
0.001UF
50V
CERM
2 1
402 10%
C2715
0.001UF
CERM
50V
2 1
10% 402
NET
SPACING
TYPE
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
14
CLOCKS
CLOCKS
CLOCKS
14
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
CLOCKS
14
CLOCKS
CLOCKS
CLOCKS
14
CLOCKS
CLOCKS
CLOCKS
8
CLOCKS
CLOCKS
R2720
5%0402
2 1
SYS_SLEWING_L
33
13
25
NOSTUFF
0
R2775
402 5%
20
R2709
402 5%
0
R2707
402 5%
0
R2715
5% 402
0
R2772
402 5%
NOSTUFF
R2700
402225%
0
R2717
402 5%
C2700
0.001UF
50V
C2702
0.001UF
50V
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
10% 402
NOSTUFF
0
5%
CERM
402 10%
CERM
R2776
40205%
R2705
402
R2702
40205%
R2719
40205%
2 1
2 1
2 1
2 1
20
R2703
402 5%
R2711
40205%
R2779
5%0402
0
R2768
402 5%
20
R2770
5% 402
3.3V
33MHZ
3.3V
33MHZ
66MHZ
2.5V
66MHZ
2.5V
2 1
2 1
2 1
2 1
2 1
2.5V
2.5V
3.3V
3.3V
3.3V
3.3V
1.2V
1.2V
1.2V
2.5V
2.5V
1.2V
1.5V
66MHZ
66MHZ
66MHZ
33MHZ
66MHZ
33MHZ
33MHZ
25MHZ
25MHZ
66MHZ
66MHZ
PCI_CLK_GP0
PCI_CLK_GP1
VSP_NB_CLK_P
VSP_NB_CLK_N
EI_CPU_CLK_P
EI_CPU_CLK_N
EI_NB_CLK_P
EI_NB_CLK_N
TP_PLS_CLK_66M_0
TP_PLS_CLK_66M_1
HT_CLK66M_NB
RAM_CLK66M_NB
PCI_CLK66M_SB_INT
PCI_CLK_P1
AGP_CLK66M_GPU
PCI_CLK_P3
PCI_CLK_P4
CPU_HTBEN
EI_NB_SYNC
EI_CPU_SYNC
SB_CLK25M_ATA
TP_SATA_CLK25M
HT_CLK66M_SB
AGP_CLK66M_NB
8
8
24
27
24
27
27
29
27
29
27
28
27
28
6
6
27
60
37
27
74
8
27
49
8
8
29
30
27
28
27
29
25
6
27
62
27
48
LAST MODIFIED: JULY 12, 04
MASTER: GILA
D
C
B
PULSAR CLOCKS
A
C2707
33PF
CERM
50V
402
1
5%
2
1
C2705
33PF
5%
50V
2
CERM
402
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
27
SCALE
REV.
OF
103
A
I
8
6 7
5
4
3
2
1
D
C
B
A
=PP1V2_EI_NB
1
C2800
0.1UF
20%
10V
2
CERM
402
PLACE R2805 AND R2806
NEAR U3LITE
PART NUMBER
1
C2801
0.1UF
20%
10V
2
CERM
402
=PP1V5_PWRON_NB_AVDD
7
48
60
37
30
ALTERNATE FOR
PART NUMBER
353S0867 353S0920
353S0867 353S0924
8
7
18
28
14
27
29
14
29
6
POST-RAMP QUAL
1
C2802
0.1UF
20%
10V
2
CERM
402
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
29
28
28
29
29
28
29
28
29
28
29
EI_NB_SYNC
EI_SYNC_FROM_NB
EI_SE
BOM OPTION
7 8
1
C2803
0.1UF
20%
10V
2
CERM
402
14
6
14
6
6
14
6
14
6
14
14
6
6
14
14
6
14
6
14
6
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
14
6
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
6
14
14
6
14
6
6
14
6
14
1
C2804
0.1UF
20%
10V
2
CERM
402
R2800
2.2
2 1
5%
1/16W
MF
603
EI_NB_TO_CPU_CLK_P
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<4>
EI_NB_TO_CPU_AD<5>
EI_NB_TO_CPU_AD<6>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<32>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<35>
EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_SR_P<0>
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_SR_N<1>
EI_QACK_L
R2805
0
2 1
402
NOSTUFF
R2806
0
2 1
402
30
25
REF DES
COMMENTS:
PERICOM ANALOG SWITCH
U2850
U2850
MAXIM ANALOG SWITCH
PLACE QREQ CIRCUITS BETWEEN CPU AND U3LITE
1
C2805
0.1UF
20%
10V
2
CERM
402
PP1V5_PWRON_EI_NB_AVDD
VOLTAGE=1.5V
1
C2818
1UF
10%
6.3V
2
CERM
402
NB_APSYNC
C2850
EI_QREQ_L
6
29
14
SMU_SUSPENDREQ_L
13
24
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
1
2
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
K4
F21
API
APCLK_AVDD
1
C2819
0.1UF
20%
10V
2
CERM
402
F15
E15
F11
F12
G11
H11
G12
H12
H14
G14
D9
C9
D11
E11
A10
A9
A8
B9
C11
B11
A11
A12
B12
C12
D12
E12
A13
A14
B14
C14
A16
A15
B15
C15
H15
G15
F17
G17
G18
H18
F18
E18
A17
A18
B17
C17
D17
A19
E17
B18
E8
H17
1
C2806
0.1UF
20%
10V
2
CERM
402
API0_BCLKIP
API0_BCLKIN
API0_ADI0
API0_ADI1
API0_ADI2
API0_ADI3
API0_ADI4
API0_ADI5
API0_ADI6
API0_ADI7
API0_ADI8
API0_ADI9
API0_ADI10
API0_ADI11
API0_ADI12
API0_ADI13
API0_ADI14
API0_ADI15
API0_ADI16
API0_ADI17
API0_ADI18
API0_ADI19
API0_ADI20
API0_ADI21
API0_ADI22
API0_ADI23
API0_ADI24
API0_ADI25
API0_ADI26
API0_ADI27
API0_ADI28
API0_ADI29
API0_ADI30
API0_ADI31
API0_ADI32
API0_ADI33
API0_ADI34
API0_ADI35
API0_ADI36
API0_ADI37
API0_ADI38
API0_ADI39
API0_ADI40
API0_ADI41
API0_ADI42
API0_ADI43
API0_SRIP0
API0_SRIN0
API0_SRIP1
API0_SRIN1
API_QACK0
API0_APSYNC
API0_SE
QREQ_L HACK
=PP3V3_PWRON_EI
7
28
1
0.1UF
20%
10V
CERM
402
CRITICAL
2
5
VCC
1
4
GND
3
C2807
0.1UF
20%
10V
CERM
402
K8
H16
H13
J13
U3
U3LITE
V1.0-300MM
PBGA
(SYM 1 OF 7)
OMIT
APPLE PI
INTERFACE
API_APCLK_AVSS
CRITICAL
U2850
74LVC1G66
SOT23-5
TI
2
NOSTUFF
R2850
1/16W
G2
VDD_API
G20
0
5%
MF
402
1
C2808
0.1UF
20%
10V
2
CERM
402
F7
F10
2 1
6
D4
D13
API0_BCLKOP
API0_BCLKON
API0_ADO10
API0_ADO11
API0_ADO12
API0_ADO13
API0_ADO14
API0_ADO15
API0_ADO16
API0_ADO17
API0_ADO18
API0_ADO19
API0_ADO20
API0_ADO21
API0_ADO22
API0_ADO23
API0_ADO24
API0_ADO25
API0_ADO26
API0_ADO27
API0_ADO28
API0_ADO29
API0_ADO30
API0_ADO31
API0_ADO32
API0_ADO33
API0_ADO34
API0_ADO35
API0_ADO36
API0_ADO37
API0_ADO38
API0_ADO39
API0_ADO40
API0_ADO41
API0_ADO42
API0_ADO43
API0_SROP0
API0_SRON0
API0_SROP1
API0_SRON1
API_APCLKP
API_APCLKN
6 7
1
C2809
0.1UF
20%
10V
2
CERM
402
=PP1V2_EI_NB
B7
B19
B10
D16
API0_ADO0
API0_ADO1
API0_ADO2
API0_ADO3
API0_ADO4
API0_ADO5
API0_ADO6
API0_ADO7
API0_ADO8
API0_ADO9
API_QREQ0
API_CSTP
EI_NB_QREQ_L
R2851
D6
E6
J2
H1
J1
K1
E1
F2
J4
H4
G1
H2
F1
H5
H3
J3
J5
J6
E3
F4
E2
F5
H6
J7
F3
J8
F6
E5
D5
E4
D8
A5
C2
C3
C5
C6
B2
D1
B1
C1
A6
C8
A2
B3
A7
B8
A3
A4
B5
B6
E14 D14
D18
C18
F14
10K
1/16W
402
5%
MF
1
C2810
0.1UF
20%
10V
2
CERM
402
1
2
1
C2811
0.1UF
20%
10V
2
CERM
402
7
18
28
14
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_AD<0>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_SR_N<1>
EI_NB_CLK_P
EI_NB_CLK_N
CPU_CHKSTOP_L
NOSTUFF
R2899
180
2 1
EI_NB_QREQ_L_R
5%
1/16W
MF
402
5
1
C2812
0.1UF
20%
10V
2
CERM
402
QREQ TO SMU
7
28
1
C2813
2
6
29
28
14
6
29
14
28
6
29
14
28
6
29
28
14
6
29
14
28
6
29
28
14
6
29
28
14
6
29
14
28
6
29
28
14
29
14
28
6
6
29
14
28
6
29
14
28
6
29
28
14
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
28
14
6
29
14
28
6
29
14
28
6
29
28
14
6
29
14
28
6
29
14
28
6
29
14
28
29
6
28
14
29
14
28
6
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
29
14
28
6
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
6
29
14
28
29
14
28
6
14
29
28
6
6
14
29
28
29
=PP3V3_PWRON_EI
1
0.1UF
20%
10V
CERM
402
NOSTUFF
1
R2898
2
3
2
5
1
2
10K
5%
1/16W
MF
402
NOSTUFF
Q2899
2N3904
SM
C2814
0.1UF
20%
10V
CERM
402
1
2
SMU_QREQ
1
C2815
0.1UF
20%
10V
2
CERM
402
ZT2847
HOLE-VIA-20R10
ZT2848
HOLE-VIA-20R10
ZT2849
HOLE-VIA-20R10
ZT2850
HOLE-VIA-20R10
ZT2851
HOLE-VIA-20R10
ZT2852
HOLE-VIA-20R10
ZT2853
HOLE-VIA-20R10
ZT2854
HOLE-VIA-20R10
ZT2855
HOLE-VIA-20R10
NOSTUFF
C2821
0.001UF
10%
50V
CERM
402
13
4
1
C2816
0.1UF
20%
10V
2
CERM
402
OMIT
1
OMIT
1
OMIT
1
OMIT
1
OMIT
1
OMIT
1
OMIT
1
OMIT
1
OMIT
1
=PP1V2_EI_NB
NOSTUFF
1
R2802
100
1%
1/16W
MF
402
2
NOSTUFF
1
R2801
100
1%
1/16W
MF
402
2
4
1
C2817
0.1UF
20%
10V
2
CERM
402
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
7
18
28
14
EI_APCLK_VREF
VOLTAGE=0.6V
NOSTUFF
1
C2820
0.1UF
20%
10V
2
CERM
402
OMIT
ZT2857
1
OMIT
ZT2858
1
OMIT
ZT2859
1
OMIT
ZT2860
1
OMIT
ZT2861
1
OMIT
ZT2862
1
OMIT
ZT2863
1
OMIT
ZT2864
1
OMIT
ZT2865
1
NOSTUFF
1
R2803
121
1%
1/16W
MF
402
2
OMIT
ZT2867
HOLE-VIA-20R10
1
OMIT
ZT2868
HOLE-VIA-20R10
1
OMIT
ZT2869
HOLE-VIA-20R10
1
OMIT
ZT2800
HOLE-VIA-20R10
1
OMIT
ZT2801
HOLE-VIA-20R10
1
OMIT
ZT2802
HOLE-VIA-20R10
1
OMIT
ZT2803
HOLE-VIA-20R10
1
OMIT
ZT2804
HOLE-VIA-20R10
1
OMIT
ZT2805
HOLE-VIA-20R10
1
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
NOSTUFF
1
R2804
121
1%
1/16W
MF
402
2
EI_NB_CLK_P
EI_NB_CLK_N
3
EI_CPU_TO_NB_CLK_P
6
28
29
14
EI_CPU_TO_NB_CLK_N
6
28
29
14
EI_NB_TO_CPU_CLK_P
6
28
29
14
EI_NB_TO_CPU_CLK_N
6
28
29
14
EI_CPU_TO_NB_AD<0..43>
6
28
29
14
EI_NB_TO_CPU_AD<0..43>
6
28
29
14
EI_CPU_TO_NB_SR_P<0>
6
28
29
14
EI_CPU_TO_NB_SR_N<0>
6
28
29
14
EI_CPU_TO_NB_SR_P<1>
6
28
29
14
EI_CPU_TO_NB_SR_N<1>
6
28
29
14
EI_NB_TO_CPU_SR_P<0>
6
28
29
14
EI_NB_TO_CPU_SR_N<0>
6
28
29
14
EI_NB_TO_CPU_SR_P<1>
6
28
29
14
EI_NB_TO_CPU_SR_N<1>
6
28
29
14
OMIT
ZT2807
HOLE-VIA-20R10
1
OMIT
ZT2808
HOLE-VIA-20R10
1
OMIT
ZT2809
HOLE-VIA-20R10
1
OMIT
ZT2810
HOLE-VIA-20R10
1
OMIT
ZT2811
HOLE-VIA-20R10
1
OMIT
ZT2812
HOLE-VIA-20R10
1
OMIT
ZT2813
HOLE-VIA-20R10
1
OMIT
ZT2814
HOLE-VIA-20R10
1
OMIT
ZT2815
HOLE-VIA-20R10
1
OMIT
ZT2806
HOLE-VIA-20R10
1
ELECTRICAL_CONSTRAINT_SET
EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK
EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK
EI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_CPU_TO_NB_CAD
EI_NB_TO_CPU_CAD
EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR0
EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR0
EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR1
EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR1
EI_NB_TO_CPU_CAD EI_NB_TO_CPU_CLK EI_NB_TO_CPU_SR0
EI_NB_TO_CPU_CAD EI_NB_TO_CPU_SR0
EI_NB_TO_CPU_CAD EI_NB_TO_CPU_CLK EI_NB_TO_CPU_SR1
EI_NB_TO_CPU_CAD EI_NB_TO_CPU_CLK EI_NB_TO_CPU_SR1
OMIT
ZT2817
HOLE-VIA-20R10
1
OMIT
ZT2818
HOLE-VIA-20R10
1
OMIT
ZT2819
HOLE-VIA-20R10
1
OMIT
ZT2820
HOLE-VIA-20R10
1
OMIT
ZT2821
HOLE-VIA-20R10
1
OMIT
ZT2822
HOLE-VIA-20R10
1
OMIT
ZT2823
HOLE-VIA-20R10
1
OMIT
ZT2824
HOLE-VIA-20R10
1
OMIT
ZT2825
HOLE-VIA-20R10
1
OMIT
ZT2816
HOLE-VIA-20R10
1
OMIT
ZT2846
HOLE-VIA-20R10
1
NET_SPACING_TYPE
EI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK
EI_CPU_TO_NB_AD
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_CLK
OMIT
ZT2827
HOLE-VIA-20R10
1
OMIT
ZT2828
HOLE-VIA-20R10
1
OMIT
ZT2829
HOLE-VIA-20R10
1
OMIT
ZT2830
HOLE-VIA-20R10
1
OMIT
ZT2831
HOLE-VIA-20R10
1
OMIT
ZT2832
HOLE-VIA-20R10
1
OMIT
ZT2833
HOLE-VIA-20R10
1
OMIT
ZT2834
HOLE-VIA-20R10
1
OMIT
ZT2835
HOLE-VIA-20R10
1
OMIT
ZT2826
HOLE-VIA-20R10
1
OMIT
ZT2856
HOLE-VIA-20R10
1
1 2
DIFFERENTIAL_PAIR
ZT2837
HOLE-VIA-20R10
1
ZT2838
HOLE-VIA-20R10
1
ZT2839
HOLE-VIA-20R10
1
ZT2840
HOLE-VIA-20R10
1
ZT2841
HOLE-VIA-20R10
1
ZT2842
HOLE-VIA-20R10
1
ZT2843
HOLE-VIA-20R10
1
ZT2844
HOLE-VIA-20R10
1
ZT2845
HOLE-VIA-20R10
1
ZT2836
HOLE-VIA-20R10
1
ZT2866
HOLE-VIA-20R10
1
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
I212
I213
I214
I215
I216
I217
I218
I219
I220
I221
I222
I223
I224
I225
D
C
B
27
27
LAST MODIFIED: JULY 14, 04
MASTER: GILA
U3LITE APPLE PI
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
APPLE COMPUTER INC.
3
2
D
SCALE
NONE
SHT
28
1
REV.
OF
103
A
I
(1 OF 3)
PLLTESTOUT
PLLRANGE1
SPARE
PLLTEST
PLLRANGE0
JTAGMODE
GPUL_DBG
EI_DISABLE
ATTENTION
TMS
TRST*
TCK
TDO
TDI
PLLMULT
BYPASS*
PLLLOCK
BUSCFG0
BUSCFG1
BUSCFG2
EI_SRO1*
EI_SRO0*
CKTERMDIS
APSYNCIN
IIC_SDA
IIC_SCL
I2CGO
INT*
EI_SRO1
EI_SRO0
QREQ*
EI_ADO33
EI_ADO34
EI_ADO39
EI_ADO40
EI_ADO41
EI_ADO42
EI_ADO35
EI_ADO36
EI_ADO37
EI_ADO38
EI_ADO43
EI_ADO32
EI_ADO26
EI_ADO27
EI_ADO31
EI_ADO30
EI_ADO29
EI_ADO28
EI_ADO25
SYSCLK
EI_ADO24
EI_ADO22
EI_ADO23
EI_ADO21
EI_ADO20
EI_ADO19
EI_ADO18
EI_ADO16
EI_ADO17
EI_ADO15
EI_ADO14
EI_ADO13
EI_ADO12
EI_ADO10
EI_ADO11
EI_ADO9
EI_ADO8
EI_ADO7
EI_ADO4
EI_ADO6
EI_ADO5
EI_CLKO*
EI_ADO3
EI_ADO2
EI_ADO1
EI_ADO0
EI_CLKO
PSRO1
PSRO2
RI*
SYNCENABLE*
RAMSTOPENABLE
PULSESEL2
PULSESEL1
PULSESEL0
MCP*
DI2*
AFN
BIMODE*
LSSDSTOPENABLE
LSSDSTOPC2STARENABLE
LSSDSTOPC2ENABLE
LSSDSCANENABLE
LSSDMODE
C2UNDGLOBAL
C1UNDGLOBAL
AVPRESET*
PROCID1
PROCID2
TRIGGER_IN
TRIGGER_OUT
PROCID0
TBEN
QACK*
SRESET*
HRESET*
THERM_INT*
APSYNCOUT
EI_SRI0
EI_SRI1
CHKSTOP*
EI_SRI1*
EI_SRI0*
EI_ADI43
EI_ADI33
EI_ADI36
EI_ADI37
EI_ADI34
EI_ADI40
EI_ADI41
EI_ADI39
EI_ADI35
EI_ADI38
EI_ADI42
EI_ADI32
EI_ADI27
EI_ADI26
EI_ADI25
EI_ADI30
EI_ADI31
EI_ADI29
EI_ADI28
EI_ADI24
EI_ADI23
EI_ADI22
EI_ADI13
EI_ADI14
EI_ADI15
EI_ADI17
EI_ADI16
EI_ADI19
EI_ADI20
EI_ADI18
EI_ADI21
EI_ADI12
EI_ADI5
EI_ADI6
EI_ADI7
EI_ADI9
EI_ADI4
EI_ADI8
EI_ADI10
EI_ADI11
EI_ADI3
EI_ADI2
EI_ADI0
EI_CLKI
EI_ADI1
EI_CLKI*
SYSCLK*
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LAST MODIFIED: APR 09, 04
PLACE AT PROCESSOR PINS.
PROCESSOR IIC ADDRESS:
ON PAGES 31 & 32
MORE PROCESSOR DECOUPLING
PROCESSOR LOGIC I/O
PLACE BY PROCESSOR PIN.
80,84
NEO APPLE PI
MATCH TO SYSCLK
PLACE NEAR PROCESSOR.
MASTER: GILA
1UF
10%
6.3V
CERM
402
2
1
C2900
402
CERM
6.3V
10%
1UF
2
1
C2902
402
CERM
6.3V
10%
1UF
2
1
C2903
402
CERM
6.3V
10%
1UF
2
1
C2904
402
CERM
6.3V
10%
1UF
2
1
C2905
6.3V
402
CERM
10%
1UF
2
1
C2906
402
CERM
6.3V
10%
1UF
2
1
C2907
10%
CERM
402
6.3V
1UF
2
1
C2908
CERM
6.3V
10%
1UF
402
2
1
C2909
402
6.3V
10%
1UF
CERM
2
1
C2910
402
CERM
6.3V
10%
1UF
2
1
C2911
402
MF
1/16W
1%
100
NOSTUFF
2
1
R2909
20%
0.22UF
NOSTUFF
X5R
6.3V
402
2
1
C2901
402
100
1%
1/16W
MF
NOSTUFF
2
1
R2907
402
MF
0
1/16W
5%
2 1
R2910
NEO-10S-REV2
CRITICAL
OMIT
CBGA
1.8GHZ-76C
W20
N19
N21
AD22
V22
AD13
AB21
AD21
AD17
T22
R22
AB24
AB4
AA13
AA5
AB6
AB12
V21
AC10
AB11
AC9
V5
V23
M18
M19
L19
T19
W22
AA9
AB7
AA8
T20
AD18
AD11
AD7
AD8
U19
AB5
W4
AB19
Y21
AA20
N22
V20
AA22
F1
G1
L2
L3
L22
L21
K24
L24
P20
E3
D3
D24
E24
G4
H1
H3
K2
K4
A6
A8
C10
A10
M3
C9
A9
A4
C6
C8
A7
C7
C4
B4
B6
L1
A12
C12
D8
D2
A2
A5
D6
B2
C5
C1
K3
C11
B10
A11
E12
D11
B8
G3
E2
F4
F2
H2
N3
G20
J24
H23
K22
A13
A19
C16
A17
A15
C13
A18
A20
A23
A21
C18
C19
A22
D20
B21
D18
J22
C17
C14
B19
B17
F21
B24
B23
E21
E20
C22
H22
A16
D15
C15
A14
B15
G19
G24
D22
G21
F23
J21
H21
U24
AA14
R20
AC15
AC16
V24
AB16
AC19
AA19
AC24
W23
AD12
AD14 AA10
AA12
U2900
NOSTUFF
46.4
1%
MF
402
1/16W
2 1
R2901
1/16W
46.4
NOSTUFF
402
MF
1%
2 1
R2903
NOSTUFF
1/16W
49.9
1%
402
MF
2 1
R2905
5%
0
1/16W
402
MF
2 1
R2902
NOSTUFF
1/16W
5%
402
MF
0
2 1
R2904
402
1/16W
1K
MF
5%
2
1
R2906
402
1/16W
5%
1K
MF
2
1
R2908
402
MF
0
NOSTUFF
1/16W
5%
2 1
R2911
402
CERM
1UF
10%
6.3V
2
1
C2912
1UF
10%
6.3V
CERM
402
2
1
C2913
1UF
10%
6.3V
CERM
402
2
1
C2914
1UF
10%
6.3V
CERM
402
2
1
C2915
1UF
10%
6.3V
CERM
402
2
1
C2916
1UF
10%
6.3V
CERM
402
2
1
C2917
1UF
10%
6.3V
CERM
402
2
1
C2918
1UF
10%
6.3V
CERM
402
2
1
C2919
1UF
10%
6.3V
CERM
402
2
1
C2920
1UF
10%
6.3V
CERM
402
2
1
C2921
1UF
10%
6.3V
CERM
402
2
1
C2922
1UF
10%
6.3V
CERM
402
2
1
C2923
1UF
10%
6.3V
CERM
402
2
1
C2924
1UF
10%
6.3V
CERM
402
2
1
C2925
1UF
10%
6.3V
CERM
402
2
1
C2926
1UF
10%
6.3V
CERM
402
2
1
C2927
1UF
10%
6.3V
CERM
402
2
1
C2928
1UF
10%
6.3V
CERM
402
2
1
C2929
1UF
10%
6.3V
CERM
402
2
1
C2930
1UF
10%
6.3V
CERM
402
2
1
C2931
1UF
10%
6.3V
CERM
402
2
1
C2932
1UF
10%
6.3V
CERM
402
2
1
C2933
1UF
10%
6.3V
CERM
402
2
1
C2934
1UF
10%
6.3V
CERM
402
2
1
C2935
1UF
10%
6.3V
CERM
402
2
1
C2936
1UF
10%
6.3V
CERM
402
2
1
C2937
1UF
10%
6.3V
CERM
402
2
1
C2938
1UF
10%
6.3V
CERM
402
2
1
C2939
1UF
10%
6.3V
CERM
402
2
1
C2940
1UF
10%
6.3V
CERM
402
2
1
C2941
1UF
10%
6.3V
CERM
402
2
1
C2942
1UF
10%
6.3V
CERM
402
2
1
C2943
1UF
10%
6.3V
CERM
402
2
1
C2944
1UF
10%
6.3V
CERM
402
2
1
C2945
1UF
10%
6.3V
CERM
402
2
1
C2946
1UF
10%
6.3V
CERM
402
2
1
C2947
1UF
10%
6.3V
CERM
402
2
1
C2948
1UF
10%
6.3V
CERM
402
2
1
C2949
10%
1UF
6.3V
CERM
402
2
1
C2950
1UF
10%
6.3V
CERM
402
2
1
C2951
CERM
6.3V
10%
1UF
402
2
1
C2952
1UF
10%
6.3V
CERM
402
2
1
C2953
1UF
10%
6.3V
CERM
402
2
1
C2954
1UF
10%
6.3V
CERM
402
2
1
C2955
1UF
10%
6.3V
CERM
402
2
1
C2956
1UF
10%
6.3V
CERM
402
2
1
C2957
1UF
6.3V
402
CERM
10%
2
1
C2958
402
1UF
10%
6.3V
CERM
2
1
C2959
CERM
1UF
10%
6.3V
402
2
1
C2960
I
051-6482
29
103
=PPVCORE_CPU
EI_NB_TO_CPU_SR_N<1>
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_AD<15>
EI_CPU_TO_NB_AD<0>
EI_CPU_TO_NB_AD<2>
EI_NB_TO_CPU_AD<3>
CPU_HRESET_L
EI_CPU_CLK_N
EI_NB_TO_CPU_CLK_P
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<6>
EI_NB_TO_CPU_AD<5>
EI_NB_TO_CPU_AD<4>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<32>
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_AD<35>
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_SR_P<0>
EI_QACK_L
CHKSTOP_L
CPU_HTBEN
TP_PSYNCOUT
PROC_THERM_INT_L
CPU_SRESET_L
PROCID2
PROCID0
PROCID1
EI_SE
TP_PROC_TRIGGER_OUT
TP_AFN
AVPRESET_L
BIMODE_L
LSSDMODE
C2UNDGLOBAL
DI2_L
C1UNDGLOBAL
LSSDSCANENABLE
LSSDSTOPENABLE
MCP_L
LSSDSTOPC2ENABLE
LSSDSTOPC2STARENABLE
PULSESEL1
TP_PSRO1
TP_PSRO2
PULSESEL0
PULSESEL2
SYNCENABLE
RAMSTOPENABLE
RI_L
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<24>
EI_CPU_CLK_P
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_SR_N<1>
CPU_INT_L
EI_QREQ_L
CPU_APSYNC
I2C_CPU_A_SCL
I2C_CPU_A_SDA
CKTERMDIS_L
I2CGO
EI_DISABLE
BUSCFG1
BUSCFG0
BUSCFG2
TP_ATTENTION
JTAGMODE_SPARE2
GPUL_DBG
JTAG_CPU_TCK
JTAG_CPU_TDO
JTAG_CPU_TMS
JTAG_CPU_TDI
CPU_BYPASS_L
PLLLOCK
PLLMULT
JTAG_CPU_TRST_L
PLLTESTOUT
PLLTEST
PLLRANGE1
PLLRANGE0
CPU_SPARE
EI_CPU_SYNC
EI_SYNC_FROM_NB
=PP1V2_EI_CPU
CPU_HTBEN
=PP1V2_EI_CPU
CPU_CHKSTOP_L
CHKSTOP_L
MCP_L
VOLTAGE=0.6V
SYSCLK_TERM
35
35
31
31
30
30
36
29
30
30
30
29
29
29
32
28
28
28
28
28
28
30
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
30
28
29
30
30
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
25
28
18
30
18
14
29
31
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
8
29
30
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
30
30
30
30
14
29
14
8
14
7
6
6
6
6
6
6
6
27
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
27
6
30
25
30
30
30
6
6
6
30
30
30
30
30
30
30
30
6
30
30
30
6
6
30
30
6
30
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
27
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
18
18
30
30
30
30
30
30
6
30
30
18
18
18
18
30
8
30
30
30
30
30
30
30
27
28
7
27
7
28
6
6
G
D
S
G
D
S
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
MASTER: GILA
SELECT PLL FREQUENCY RANGE.
*
*
SELECT EI BUS DIVIDER. BUS DATA RATE(BPS)= (PROCESSOR CLOCK) / BUSCFG.
AVPRESET OFF
RESERVED
PROC / 2
PROC / 12
PROC / 6
PROC / 4
BYPASS MODE
*
* STUFF THESE ON Q45.
AVPRESET ON
SELECT PROCESSOR CLOCK MULTIPLIER. PROCESSOR CLOCK(MHZ)= SYSTCLOCK * PLLMULT.
PROC / 16
PROC / 8
PROC / 3
SYSCLK * 12
SYSCLK * 8
SYSTEM CONFIGURATION
CPU STRAPS
LAST MODIFIED: APR 27, 04
SELECT ELASTIC MODE OR BYPASS.
>= 1.8 GHZ *
<= 1.6 GHZ *
5%
0
1/16W
MF
402
2 1
R3001
402
MF
1/16W
5%
1K
2 1
R3003
1K
MF
1/16W
5%
402
2 1
R3005
1K
5%
1/16W
MF
402
2 1
R3007
1K
5%
1/16W
MF
402
21
R3009
402
MF
1/16W
5%
1K
2 1
R3002
402
MF
1/16W
5%
1K
2 1
R3004
1K
5%
1/16W
MF
402
2 1
R3006
1K
5%
1/16W
MF
402
OMIT
2
1
R3008
1K
5%
1/16W
MF
402
OMIT
2
1
R3024
1K
5%
1/16W
MF
402
OMIT
2
1
R3026
1K
5%
1/16W
MF
402
OMIT
2
1
R3028
402
1K
5%
1/16W
MF
OMIT
2
1
R3030
402
MF
1/16W
5%
1K
OMIT
2
1
R3032
1K
5%
1/16W
MF
OMIT
402
2
1
R3034
402
MF
1/16W
5%
1K
OMIT
2
1
R3012
402
MF
1/16W
5%
1K
OMIT
2
1
R3018
1K
5%
1/16W
MF
402
OMIT
2
1
R3016
1/16W
402
MF
5%
1K
OMIT
2
1
R3014
402
MF
1/16W
5%
1K
OMIT
2
1
R3010
1K
5%
1/16W
MF
402
OMIT
2
1
R3020
MF
1/16W
5%
1K
402
OMIT
2
1
R3022
1/16W
MF
5%
1K
402
2 1
R3040
NOSTUFF
1/16W
402
1K
5%
MF
2 1
R3042
MF
1/16W
5%
1K
402
OMIT
2
1
R3036
1K
5%
1/16W
MF
402
OMIT
2
1
R3038
402
MF
1/16W
5%
10K
2
1
R3068
2N7002DW
SOT-363
1
2
6
Q3000
1K
1/16W
MF
402
5%
2
1
R3083
SOT-363
2N7002DW
4
5
3
Q3000
MF
1/16W
5%
1K
402
2
1
R3059
MF
1/16W
5%
1K
402
NOSTUFF
2
1
R3057
402
MF
1/16W
5%
1K
2 1
R3031
1K
5%
1/16W
MF
402
2 1
R3033
1K
5%
1/16W
MF
402
2 1
R3035
1K
5%
1/16W
MF
402
2 1
R3037
402
MF
1/16W
5%
0
2 1
R3039
1K
5%
1/16W
MF
402
2 1
R3041
402
MF
5%
1K
1/16W
2 1
R3043
1K
5%
1/16W
MF
402
2 1
R3045
MF
402
1/16W
5%
1K
2 1
R3047
1K
5%
MF
402
1/16W
2 1
R3049
1K
1/16W
MF
5%
402
2 1
R3051
10K
5%
1/16W
MF
402
2 1
R3053
5%
1/16W
MF
402
1K
2 1
R3055
MF
1/16W
5%
1K
402
2 1
R3061
NOSTUFF
MF
1/16W
5%
1K
402
2 1
R3063
1K
5%
1/16W
MF
402
2 1
R3065
1/16W
402
MF
5%
1K
NOSTUFF
2 1
R3067
MF
402
1/16W
5%
1K
2 1
R3069
1/16W
402
1K
5%
MF
NOSTUFF
2 1
R3071
MF
1/16W
5%
1K
402
2 1
R3073
NOSTUFF
MF
1/16W
5%
1K
402
2 1
R3075
402
NOSTUFF
MF
1/16W
5%
1K
2 1
R3077
1/16W
NOSTUFF
402
MF
5%
1K
2 1
R3079
5%
1/16W
MF
402
1K
2 1
R3081
MF
1/16W
5%
1K
402
2 1
R3085
1/16W
5%
1K
MF
402
2 1
R3087
1K
5%
1/16W
MF
402
2 1
R3089
402
1K
5%
1/16W
MF
2 1
R3091
5%
1K
1/16W
MF
402
2 1
R3093
5%
1/16W
MF
402
10K
2 1
R3095
10K
MF
1/16W
5%
402
2 1
R3097
10K
5%
1/16W
MF
402
2 1
R3099
NOSTUFF
1/16W
402
MF
5%
0
2 1
R3000
EI_2TO1
114S1103
RES,1K OHM,1/16W,5%,0402
3
R3024,R3026,R3028
30
103
051-6482
I
RES,1K OHM,1/16W,5%,0402
R3030,R3016
2
114S1103
CPU_PLL_HIGH
EI_3TO1
RES,1K OHM,1/16W,5%,0402
3
114S1103
R3024,R3026,R3012
NOSTUFF
114S1103
3
RES,1K OHM,1/16W,5%,0402
R3008,R3026,R3012
R3036
RES,1K OHM,1/16W,5%,0402
114S1103
1
2
114S1103
R3030,R3032
RES,1K OHM,1/16W,5%,0402
CPU_PLL_LOW
RES,1K OHM,1/16W,5%,0402
R3014,R3032
2
114S1103
CPU_PLL_MEDIUM
NOSTUFF
R3020
114S1103
RES,1K OHM,1/16W,5%,0402
1
NOSTUFF
3
R3008,R3026,R3028
RES,1K OHM,1/16W,5%,0402
114S1103
NOSTUFF
3
114S1103
R3008,R3010,R3028
RES,1K OHM,1/16W,5%,0402
NOSTUFF
R3038
1
RES,1K OHM,1/16W,5%,0402
114S1103
NOSTUFF
114S1103
RES,1K OHM,1/16W,5%,0402
3
R3024,R3010,R3012
R3022
1
RES,1K OHM,1/16W,5%,0402
114S1103
EI_3TO1
114S1103
1
R3034
RES,1K OHM,1/16W,5%,0402
EI_2TO1
R3018
114S1103
1
RES,1K OHM,1/16W,5%,0402
NOSTUFF
114S1103
RES,1K OHM,1/16W,5%,0402
3
R3024,R3010,R3028
NOSTUFF
RES,1K OHM,1/16W,5%,0402
3
114S1103
R3008,R3010,R3012
NOSTUFF
RES,1K OHM,1/16W,5%,0402
R3014,R3016
2
114S1103
CPU_BYPASS_L
CPU_BYPASS
CPU_HRESET
CPU_HRESET_L
=PP1V2_EI_CPU
=PP1V2_EI_CPU
=PP1V2_EI_CPU
CPU_HTBEN
I2CGO
CPU_SRESET_L
PROC_THERM_INT_L
CPU_INT_L
RI_L
DI2_L
BIMODE_L
JTAG_CPU_TDO
JTAG_CPU_TRST_L
GPUL_DBG
CKTERMDIS_L
PLLTEST
C2UNDGLOBAL
C1UNDGLOBAL
EI_SE
JTAG_SEL
PLLTESTOUT
BUSCFG2
PROCID2
PROCID1
PROCID0
PULSESEL2
RAMSTOPENABLE
SYNCENABLE
LSSDSTOPC2ENABLE
LSSDSCANENABLE
JTAGMODE_SPARE2
PULSESEL0
PULSESEL1
JTAG_CPU_TMS
JTAG_CPU_TDI
JTAG_CPU_TCK
LSSDMODE
EI_QREQ_L
LSSDSTOPC2STARENABLE
CPU_SPARE
BUSCFG1
EI_DISABLE
PLLMULT
PLLRANGE1
PLLRANGE0
LSSDSTOPENABLE
AVPRESET_L
BUSCFG0
=PP1V2_EI_CPU
=PP1V2_EI_CPU
=PP1V2_EI_CPU
35
35
35
35
35
35
31
31
31
31
31
31
30
30
30
30
30
30
29
29
29
29
29
29
29
29
29
29
18
18
18
25
29
28
29
28
18
18
18
14
14
14
14
29
29
14
14
29
14
14
29
29
29
14
14
14
14
29
13
13
6
7
7
7
27
29
25
29
6
6
29
29
18
29
29
29
29
29
29
6
29
29
29
29
29
29
29
6
29
29
29
29
29
18
18
18
29
6
29
29
29
29
29
29
29
29
29
29
7
7
7
KPVDD2
(2 OF 3)
KPVDD1
AVDD
GND
X105
VCORE
X105
KPGND2 KPGND1 AGND
GND
X99
VCORE
X100
(3 OF 3)
GND
VOUT
VIN
NOISE
CONT
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
LAST MODIFIED: JULY 9, 04
CPU POWER AND BYPASS
0805
MASTER: GILA
PLACE ALL THESE PARTS VERY CLOSE TO U2900
2.2
603
5%
MF
1/16W
2 1
R3101
X5R
402
20%
6.3V
0.22UF
2
1
C3100
X5R
6.3V
402
0.22UF
20%
NOSTUFF
2
1
C3101
1/16W
NOSTUFF
0
402
MF
5%
2 1
R3103
402
MF
1/16W
5%
0
NOSTUFF
2 1
R3105
10UF
805
CERM
6.3V
20%
2
1
C3102
SM
60-OHM-EMI
2 1
L3101
0
402
1/16W
MF
5%
2 1
R3127
402
1/16W
5%
MF
0
2 1
R3129
402
0
MF
1/16W
5%
2 1
R3131
CERM
6.3V
402
1UF
10%
2
1
C3103
1UF
402
10%
6.3V
CERM
2
1
C3104
1UF
10%
6.3V
CERM
402
2
1
C3105
1UF
10%
6.3V
CERM
402
2
1
C3106
1UF
10%
6.3V
CERM
402
2
1
C3107
1UF
402
10%
6.3V
CERM
2
1
C3108
6.3V
1UF
10%
CERM
402
2
1
C3109
1UF
10%
6.3V
CERM
402
2
1
C3110
1UF
10%
6.3V
CERM
402
2
1
C3111
10%
1UF
6.3V
CERM
402
2
1
C3112
1UF
10%
6.3V
CERM
402
2
1
C3113
10UF
CERM
6.3V
20%
805
2
1
C3114
CERM
805
20%
6.3V
10UF
2
1
C3115
10UF
805
20%
6.3V
CERM
2
1
C3116
10UF
20%
6.3V
CERM
805
2
1
C3117
1UF
10%
6.3V
CERM
402
2
1
C3118
1UF
10%
6.3V
CERM
402
2
1
C3119
1UF
10%
6.3V
CERM
402
2
1
C3120
402
1UF
10%
6.3V
CERM
2
1
C3121
1UF
10%
6.3V
CERM
402
2
1
C3122
1UF
10%
6.3V
CERM
402
2
1
C3123
CERM
1UF
10%
6.3V
402
2
1
C3124
1UF
10%
6.3V
CERM
402
2
1
C3125
1UF
10%
6.3V
CERM
402
2
1
C3126
1UF
10%
6.3V
CERM
402
2
1
C3127
402
CERM
1UF
10%
6.3V
2
1
C3128
1UF
10%
6.3V
CERM
402
2
1
C3129
1UF
10%
6.3V
CERM
402
2
1
C3130
6.3V
1UF
10%
CERM
402
2
1
C3131
1UF
10%
6.3V
CERM
402
2
1
C3132
6.3V
1UF
10%
CERM
402
2
1
C3133
1UF
10%
6.3V
CERM
402
2
1
C3134
CERM
1UF
10%
6.3V
402
2
1
C3135
402
10%
1UF
6.3V
CERM
2
1
C3136
1UF
10%
6.3V
CERM
402
2
1
C3137
1UF
10%
6.3V
CERM
402
2
1
C3138
402
CERM
1UF
10%
6.3V
2
1
C3139
10%
1UF
6.3V
CERM
402
2
1
C3140
1UF
10%
6.3V
CERM
402
2
1
C3141
6.3V
CERM
1UF
10%
402
2
1
C3142
6.3V
1UF
10%
CERM
402
2
1
C3143
6.3V
10%
CERM
402
1UF
2
1
C3144
1UF
10%
6.3V
CERM
402
2
1
C3145
402
CERM
1UF
10%
6.3V
2
1
C3146
CERM
402
1UF
10%
6.3V
2
1
C3147
NOSTUFF
2.2
MF
5%
603
1/16W
2 1
R3132
10UF
805
CERM
6.3V
20%
2
1
C3150
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
1UF
10V
CERM
603
20%
2
1
C3149
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
402
0.01UF
20%
CERM
16V
2
1
C3148
6.3V
402
CERM
10%
1UF
2
1
C3199
OMIT
SM
2
1
XW3100
OMIT
CRITICAL
NEO-10S-REV2
1.8GHZ-76C
CBGA
N18
N16
N14
N12
N10
M9
M7
M5
M23
M21
C2
M17
M15
M13
M11
M1
L8
L6
L4
L20
L18
B7
L16
L14
L12
L10
K9
K7
K5
K23
K21
K19
B3
K17
K15
K13
K11
J8
J6
J4
J20
J2
J18
B20
J16
J14
J12
J10
J1
H9
H7
H5
H24
H19
B16
H17
H15
H13
H11
G8
G6
G22
G18
G16
G14
B13
G12
G10
F9
F7
F5
F3
F19
F17
F15
F13
B11
F11
E8
E6
E4
E22
E18
E16
E14
E10
E1
A24
D9
D7
D5
D23
D21
D19
D17
D13
C24
N8
N6
N4
N24
N20
N2
C20
A1
R2
Y1
T2
AA1
N5
N23
N17
N15
N13
N11
N1
M8
M6
M4
C21
M24
M22
M20
M2
M16
M14
M12
M10
L9
L7
B9
L5
L23
L17
L15
L13
L11
K8
K6
K20
K18
B5
K16
K14
K12
K10
K1
J9
J7
J5
J3
J23
B22
J19
J17
J15
J13
J11
H8
H6
H4
H20
H18
B18
H16
H14
H12
H10
G9
G7
G5
G23
G2
G17
B14
G15
G13
G11
F8
F6
F24
F22
F20
F18
F16
B12
F14
F12
F10
E9
E7
E5
E23
E19
E17
E15
B1
E13
E11
D4
D16
D14
D12
D10
D1
C3
P16
P14
P12
P10
N9
N7
C23
A3
P24
R24
U2900
CRITICAL
OMIT
CBGA
NEO-10S-REV2
1.8GHZ-76C
AD9
AD5
AD3
AD23
AD19
AD15
AD1
AC8
AC6
AC4
AC22
AC20
AC2
AC18
AC14
AC12
AB9
AB3
AB23
AB17
AB15
AB13
AB1
AA6
AA4
AA24
AA2
AA18
AA16
Y9
Y7
Y5
Y3
Y23
Y22
Y19
Y17
Y15
Y13
Y11
W8
W6
W24
W2
W18
W16
W14
W12
W10
V9
V7
V3
V19
V17
V15
V13
V11
V1
U8
U6
U4
U22
U20
U2
U18
U16
U14
U12
U10
T9
T7
T5
T3
T23
T21
T17
T15
T13
T11
T1
R8
R6
R4
R18
R16
R14
R12
R10
P9
P7
P5
P3
P23
P21
P19
P17
P15
P13
P11
P1
AD6
AD4
AD24
AD20
AD2
AD16
AD10
AC7
AC5
AC3
AC23
AC21
AC17
AC13
AC11
AC1
AB8
AB22
AB20
AB2
AB18
AB14
AB10
AA7
AA3
AA23
AA21
AA17
AA15
AA11
Y8
Y6
Y4
Y24
Y20
Y2
Y18
Y16
Y14
Y12
Y10
W9
W7
W5
W3
W21
W19
W17
W15
W13
W11
W1
V8
V6
V4
V2
V18
V16
V14
V12
V10
U9
U7
U5
U3
U23
U21
U17
U15
U13
U11
U1
T8
T6
T4
T24
T18
T16
T14
T12
T10
R9
R7
R5
R3
R23
R21
R19
R17
R15
R13
R11
R1
P8
P6
P4
P22
P2
P18
U2900
OMIT
SOT-25A
MM1572JN
5 1
4
2
3
VR3100
353S0886
CPU_AVDD_2V7
VREG MM1572 2.7V
VR3100
1
CRITICAL
VREG MM1572 2.8V
VR3100
1
353S0807
CPU_AVDD_2V8
CRITICAL
31
103
I
051-6482
VREG MM1572 2.6V
353S0806
1
VR3100
CPU_AVDD_2V6
CRITICAL
MIN_LINE_WIDTH=25MIL
PP2V5_RUN_CPU_AVDD_R
MIN_NECK_WIDTH=10MIL
VOLTAGE=2.5V
GND_Z_OUT
GND_Z_SENSE
GND_SPARE_GND
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=P_KP2
KPVDD2
MIN_NECK_WIDTH=8MIL
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=P_TDD
NET_SPACING_TYPE=PROC_DIFF
TDIODE_POS
GND_SPARE_GND
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=P_KP2
KPGND2
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=8MIL
TDIODE_NEG
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_TDD
GND_CPU_AVDD
GND_Z_OUT
GND_Z_SENSE
VOLTAGE=1.2V
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
=PPVCORE_CPU
=PP2V5_RUN_CPU
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=2.5V
PP2V5_RUN_CPU_AVDD_R_L
=PPVCORE_CPU
=PP5V_RUN_CPU
CPU_AVDD_EN
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PP2V5_RUN_CPU_AVDD
VOLTAGE=2.5V
CPU_AVDD_NOISE
=PP1V2_EI_CPU
35
36
36
30
32
32
8
29
31
31
7
18
36
36
36
29
29
6
14
35
31
31
31
33
36
31
33
6
31
31
7
7
7
3
3
7
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LAST MODIFIED: APR 09, 04
MASTER: GILA
PROC DECOUPLING
6.3V
402
CERM
10%
1UF
2
1
C3200
6.3V
402
CERM
10%
1UF
2
1
C3201
6.3V
402
CERM
10%
1UF
2
1
C3202
6.3V
CERM
10%
1UF
402
2
1
C3203
6.3V
402
CERM
10%
1UF
2
1
C3204
6.3V
402
CERM
10%
1UF
2
1
C3205
6.3V
402
CERM
10%
1UF
2
1
C3206
6.3V
402
CERM
10%
1UF
2
1
C3207
6.3V
402
CERM
10%
1UF
2
1
C3208
6.3V
402
CERM
10%
1UF
2
1
C3209
6.3V
402
CERM
10%
1UF
2
1
C3210
6.3V
402
CERM
10%
1UF
2
1
C3211
6.3V
402
CERM
10%
1UF
2
1
C3212
6.3V
CERM
10%
1UF
402
2
1
C3213
6.3V
CERM
10%
1UF
402
2
1
C3214
6.3V
402
CERM
10%
1UF
2
1
C3215
6.3V
402
CERM
10%
1UF
2
1
C3216
6.3V
402
CERM
10%
1UF
2
1
C3217
6.3V
402
CERM
10%
1UF
2
1
C3218
6.3V
402
CERM
10%
1UF
2
1
C3219
6.3V
402
CERM
10%
1UF
2
1
C3220
6.3V
402
CERM
10%
1UF
2
1
C3221
6.3V
402
CERM
10%
1UF
2
1
C3222
6.3V
402
CERM
10%
1UF
2
1
C3223
6.3V
402
CERM
10%
1UF
2
1
C3224
6.3V
402
CERM
10%
1UF
2
1
C3225
6.3V
402
CERM
10%
1UF
2
1
C3226
6.3V
402
CERM
10%
1UF
2
1
C3227
6.3V
402
CERM
10%
1UF
2
1
C3228
6.3V
402
CERM
10%
1UF
2
1
C3229
6.3V
402
CERM
10%
1UF
2
1
C3230
6.3V
402
CERM
10%
1UF
2
1
C3231
6.3V
402
CERM
10%
1UF
2
1
C3232
6.3V
402
CERM
10%
1UF
2
1
C3233
6.3V
402
CERM
10%
1UF
2
1
C3234
6.3V
402
CERM
10%
1UF
2
1
C3235
6.3V
402
CERM
10%
1UF
2
1
C3236
6.3V
402
CERM
10%
1UF
2
1
C3237
6.3V
402
CERM
10%
1UF
2
1
C3238
6.3V
402
CERM
10%
1UF
2
1
C3239
6.3V
402
CERM
10%
1UF
2
1
C3240
6.3V
402
CERM
10%
1UF
2
1
C3241
6.3V
402
CERM
10%
1UF
2
1
C3242
6.3V
402
CERM
10%
1UF
2
1
C3243
6.3V
402
CERM
10%
1UF
2
1
C3244
6.3V
402
CERM
10%
1UF
2
1
C3245
6.3V
402
CERM
10%
1UF
2
1
C3246
6.3V
402
CERM
10%
1UF
2
1
C3247
6.3V
402
CERM
10%
1UF
2
1
C3248
6.3V
402
CERM
10%
1UF
2
1
C3249
6.3V
402
CERM
10%
1UF
2
1
C3250
6.3V
402
CERM
10%
1UF
2
1
C3251
6.3V
402
CERM
10%
1UF
2
1
C3252
6.3V
402
CERM
10%
1UF
2
1
C3253
6.3V
402
CERM
10%
1UF
2
1
C3254
6.3V
402
CERM
10%
1UF
2
1
C3255
6.3V
402
CERM
10%
1UF
2
1
C3256
6.3V
402
CERM
10%
1UF
2
1
C3257
6.3V
402
CERM
10%
1UF
2
1
C3258
6.3V
402
CERM
10%
1UF
2
1
C3259
6.3V
402
CERM
10%
1UF
2
1
C3260
6.3V
402
CERM
10%
1UF
2
1
C3261
6.3V
402
CERM
10%
1UF
2
1
C3262
6.3V
402
CERM
10%
1UF
2
1
C3263
6.3V
402
CERM
10%
1UF
2
1
C3264
6.3V
402
CERM
10%
1UF
2
1
C3265
6.3V
402
CERM
10%
1UF
2
1
C3266
6.3V
402
CERM
10%
1UF
2
1
C3267
6.3V
402
CERM
10%
1UF
2
1
C3268
6.3V
402
CERM
10%
1UF
2
1
C3269
6.3V
402
CERM
10%
1UF
2
1
C3270
6.3V
402
CERM
10%
1UF
2
1
C3271
6.3V
402
CERM
10%
1UF
2
1
C3272
6.3V
402
CERM
10%
1UF
2
1
C3273
6.3V
402
CERM
10%
1UF
2
1
C3274
6.3V
402
CERM
10%
1UF
2
1
C3275
6.3V
402
CERM
10%
1UF
2
1
C3276
6.3V
402
CERM
10%
1UF
2
1
C3277
6.3V
402
CERM
10%
1UF
2
1
C3278
6.3V
402
CERM
10%
1UF
2
1
C3279
6.3V
402
CERM
10%
1UF
2
1
C3280
6.3V
402
CERM
10%
1UF
2
1
C3281
6.3V
402
CERM
10%
1UF
2
1
C3282
6.3V
402
CERM
10%
1UF
2
1
C3283
6.3V
402
CERM
10%
1UF
2
1
C3284
6.3V
CERM
10%
1UF
402
2
1
C3285
6.3V
CERM
10%
1UF
402
2
1
C3286
6.3V
CERM
10%
1UF
402
2
1
C3287
6.3V
CERM
10%
1UF
402
2
1
C3288
6.3V
402
CERM
10%
1UF
2
1
C3289
6.3V
CERM
10%
1UF
402
2
1
C3290
6.3V
CERM
10%
1UF
402
2
1
C3291
6.3V
CERM
10%
1UF
402
2
1
C3292
6.3V
402
CERM
10%
1UF
2
1
C3293
6.3V
402
CERM
10%
1UF
2
1
C3294
6.3V
402
CERM
10%
1UF
2
1
C3295
6.3V
402
CERM
10%
1UF
2
1
C3296
6.3V
402
CERM
10%
1UF
2
1
C3297
6.3V
402
CERM
10%
1UF
2
1
C3298
6.3V
402
CERM
10%
1UF
2
1
C3299
I
32
103
051-6482
=PPVCORE_CPU
36 31 29
7
AGND
VCC
BGOUT
PGOOD
ERROUT
DACSTEP
GSENSE
FB
OUT4
OUT1
OUT3
OUT2
VID5
VID2
VID3
VID4
VID1
VID0
OUTSEN
OSCREF
OS2
OS3
OS1
OS4
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
G
D
S
GND
OUT
VIN+ VIN-
V+
S
D
G
S
D
G
S
D
G
S
D
G
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
0 TO 2.5V
0 TO 2.5V
ADC IS 10BIT 0 TO 1023
.00675 A/COUNT
CURRENT SENSE
PLACE NEXT TO SMU
KEEP SHORTS NEXT TO U3301
FOR REMOTE SENSE
DIFFERENTIAL PAIR
FAR SIDE
CPU SENSE SIDE
NEAR SIDE
UNDER PROCESSOR
PLACE REGULATOR SENSE POINTS AT DESIGNATED LOCATIONS.
PLACE R3344 AND C3331 BY SMU
CONNECT BETWEEN THE INDUCTOR & BULK CAPS.
CPU VREG
PLACE R3325 CLOSE TO INDUCTOR OUTPUT LEAD.
COUNT SCALE
VOLTAGE SENSE
COUNT SCALE
2.73224 A/V
6 V/V
.01464 V/COUNT
ADC IS 10BIT 0 TO 1023
TSSOP
SC2643VX
15
10
11
12
13
14
9
16
23
22
21
20
19
17
24
1
2
3
6
7
5
8
4
18
U3300
10%
402
CERM
50V
0.0022UF
NOSTUFF
2
1
C3315
MF
5%
1/16W
1.5K
402
2 1
R3300
10%
1UF
6.3V
CERM
402
2
1
C3301
10%
CERM
402
330PF
50V
2
1
C3302
0
5%
1/16W
MF
NOSTUFF
402
2
1
R3302
NOSTUFF
2.7M
MF
5%
1/16W
603
2 1
R3303
SOIC
SC1211
7
5
6
2
9
1
4
3
8
U3320
ELEC
16V
1000UF
20%
TH-KZJ
2
1
C3321
TH1
0.6UH-24A
2 1
L3320
402
MF
1/16W
1
5%
2 1
R3320
402
CERM
50V
10%
0.0022UF
NOSTUFF
2
1
C3325
MF
402
5%
0
1/16W
2 1
R3330
OMIT
SM
2 1
XW3300
1UF
16V
CERM
20%
1206
2
1
C3313
1UF
20%
16V
CERM
1206
2
1
C3329
1206
16V
CERM
1UF
20%
2 1
C3310
CERM
16V
20%
1UF
1206
2
1
C3323
20%
16V
CERM
1UF
1206
2 1
C3320
MF
5%
1/16W
2.2
603
2 1
R3307
10UF
10%
16V
CERM
1210
2
1
C3322
16V
10%
1210
10UF
CRITICAL
CERM
2
1
C3312
1800UF
6.3V
20%
ELEC
TH-KZJ
2
1
C3317
1800UF
TH-KZJ
CRITICAL
20%
6.3V
ELEC
2
1
C3318
NOSTUFF
1800UF
20%
6.3V
TH-KZJ
ELEC
2
1
C3327
ELEC
6.3V
TH-KZJ
20%
1800UF
2
1
C3328
5%
NOSTUFF
402
1/16W
MF
330
2
1
R3324
NOSTUFF
402
5%
1K
MF
1/16W
2 1
R3325
10%
25V
0.0082UF
X7R
402
2
1
C3304
10%
25V
0.0082UF
X7R
402
2
1
C3305
10%
25V
0.0082UF
X7R
402
2
1
C3306
10%
4PHASE
25V
0.0082UF
X7R
402
2
1
C3307
402
MF
1/16W
1%
20.5K
2
1
R3313
402
1%
MF
1/16W
20.5K
2
1
R3316
SOIC
SC1211
7
5
6
2
9
1
4
3
8
U3310
402
MF
1/16W
1%
20.5K
2
1
R3317
4PHASE
402
MF
1/16W
1%
20.5K
2
1
R3323
MF
1/16W
1%
402
301
2 1
R3326
0.068UF
402
CERM
10V
10%
2 1
C3308
BAS16
SOT23
3
1
D3310
BAS16
SOT23
3
1
D3320
232K
402
MF
1/16W
1%
OMIT
2
1
R3328
0.1UF
402
CERM
10V
20%
2
1
C3300
402
25V
0.0047UF
10%
CERM
2
1
C3326
805
FF
1
1/10W
5%
2
1
R3321
FF
1/10W
1
805
5%
2
1
R3311
CERM
10%
25V
402
0.0047UF
2
1
C3316
5%
1/16W
402
MF
30K
2
1
R3301
402
4.99K
1%
1/16W
MF
2 1
R3305
MF
1/16W
261
1%
402
2 1
R3304
0
5%
1/16W
MF
402
2 1
R3335
0
5%
MF
402
1/16W
2 1
R3336
CRITICAL
TH-VERT
1UH-20A-4.5MOHM
2 1
L3300
402
MF
1/16W
5%
0
NOSTUFF
2 1
R3337
0
5%
MF
402
NOSTUFF
1/16W
2 1
R3338
MF
1/16W
5%
0
NOSTUFF
402
2 1
R3339
0
MF
402
NOSTUFF
5%
1/16W
2 1
R3340
0
5%
1/16W
MF
402
NOSTUFF
2 1
R3341
0
5%
1/16W
MF
402
NOSTUFF
2 1
R3342
CERM
16V
1206
20%
1UF
2
1
C3330
CERM
50V
0.001UF
20%
402
2
1
C3314
402
MF
1/16W
5%
100
2
1
R3312
50V
402
CERM
20%
0.001UF
2
1
C3324
402
100
5%
1/16W
MF
2
1
R3322
SM
2N7002
2
1
3
Q3312
INA138
SOT23-5
4 3
51
2
U3301
2512
1%
0.025
1W
MF
2 1
R3343
805
10UF
6.3V
20%
CERM
2
1
C3331
1/16W
MF
1%
73.2K
402
2
1
R3345
NOSTUFF
SOT23
BAS16
3
1
D3300
402
100K
1/16W
5%
MF
2 1
R3344
NOSTUFF
MF
1/16W
20.5K
402
1%
2
1
R3319
NOSTUFF
1%
1/16W
MF
402
20.5K
2
1
R3318
NOSTUFF
MF
1%
20.5K
402
1/16W
2
1
R3315
20.5K
1%
MF
402
NOSTUFF
1/16W
2
1
R3314
402
MF
10K
1/16W
5%
2
1
R3350
5%
1/16W
MF
402
10K
2
1
R3351
OMIT
SM
2 1
XW3301
OMIT
SM
2 1
XW3303
OMIT
SM
2 1
XW3304
MF
NOSTUFF
402
5%
100K
1/16W
2 1
R3308
CERM
20%
6.3V
10UF
805
2
1
C3303
MF
5%
1/16W
2.2
603
2 1
R3306
6.3V
20%
1800UF
TH-KZJ
ELEC
2
1
C3332
1800UF
ELEC
20%
6.3V
TH-KZJ
2
1
C3333
OMIT
SM
2 1
XW3302
V30284
TO-252
CRITICAL
VISHAY
3
1
4
Q3310
TO-252
CRITICAL
VISHAY
V30289
3
1
4
Q3311
TO-252
CRITICAL
V30284
VISHAY
3
1
4
Q3320
TO-252
CRITICAL
V30289
VISHAY
3
1
4
Q3321
3PHASE
MF
1/16W
5%
402
0
2
1
R3390
3PHASE
402
0
5%
1/16W
MF
2
1
R3391
402
10K
MF
1/16W
1%
2
1
R3360
402
2K
1%
1/16W
MF
2
1
R3361
CRITICAL
0.6UH-24A
TH1
2 1
L3310
CRITICAL
16V
ELEC
20%
1000UF
TH-KZJ
2
1
C3311
402 X7R
16V
0.015UF
NOSTUFF
10%
2 1
C3309
MF
1/16W
1%
1.5K
402
2 1
R3327
10
5%
MF
1/16W
402
2
1
R3329
1206
16V
20%
1UF
CERM
2
1
C3319
5%
402
MF
1
1/16W
2 1
R3310
ON SEMI FET
2
Q3311,Q3321
376S0146
ON_SEMI
114S2325
1
RES,232K,1%,402
R3328
4PHASE
376S0130
2
Q3310,Q3320
ON_SEMI
ON SEMI FET
1
R3328
3PHASE
RES,332K,1%,402
114S3325
051-6482
103
33
I
U3310_TG
U3310_DRN
VCORE_SENSE_VOUT
SC2643_OS_HUB
R3325_2
SC2643_OS4
PP12V_CPU
CPU_SENSE_I
PP12V_CPU
SC2643_ERROUT
CPU_VID_R<1>
CPU_VID_R<2>
SC2643_AGND
PP12V_CPU
VOLTAGE=12V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VCORE_SENSE_GND
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=P_SENSE_CORE
VCORE_SENSE_GND
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=P_SENSE_CORE
VCORE_SENSE_VOUT
MIN_LINE_WIDTH=10MIL
VRM_EN
PP12V_CPU
AUX4
SC2643_OSCREF
SC2643_OS3
CPU_VID_R<0>
CPU_VID_R<3>
U3300_BGOUT
SC2643_DACSTEP
SC2643_OUTSEN_R
U3310_BST
U3320_BST
CORE_ISNS_M
C3326_1
OUT2
AUX2
PN2
VPN2
C3316_1
AUX1
PN1
VPN1
CORE_ISNS_P
INA138_OUT
SC2643_AGND
AUX3 AUX2 AUX1
SYS_POWERUP_L
SC2643_VCC
C3302_1
SC2643_VCC
KPVDD2
KPGND2
CPU_SENSE_I_R
GND_SMU_AVSS
OUT1
SYS_SLEWING_L
PP12V_CPU
U3320_TG
U3320_BG
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PN2
PPVCORE_CPU
PPVCORE_CPU
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
PPVCORE_CPU
PPVCORE_CPU
SC2643_VCC
CPU_VID_R<4>
CPU_VID_R<5>
=PP12V_RUN_CPU
=PP12V_RUN_CPU
=PP3V3_RUN_CPU
PPVCORE_CPU
GND_SMU_AVSS
PP12V_CPU
SC2643_OS1
PP12V_CPU_R
SC2643_PGOOD
SC2643_AGND
U3320_BST_R
SC2643_OUTSEN
SC2643_AGND
U3320_DRN
U3320_VREG
OUT1
OUT2
OUT3
OUT4
SC2643_OS2
SC2643_AGND
U3310_BST_R
U3310_VREG
U3310_BG
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PN1
CPU_SENSE_V
13
35
35
35
35
35
11
36
34
34
34
34
34
36
34
34
34
34
10
33
27
34
33
33
33
33
33
33
34
33
33
33
8
8
33
33
33
33
33
8
8
36
36
7
36
36
13
25
33
7
7
7
7
8
8
33
33
7
13
33
6
6
13
6
6
6
33
6
6
6
6
6
34
6
6
6
33
33
33
33
33
6
33
34 33 33
6
33
33
31
31
8
33
13
6
33
6
6
6
6
33
6
6
7
7
7
6
8
6
33
33
33
33
34
34
33
33
13
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
S
D
G
S
D
G
S
D
G
S
D
G
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
CPU VREG
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3400
CERM
6.3V
20%
10UF
1206
2
1
C3401
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3402
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3403
CERM
6.3V
20%
10UF
1206
2
1
C3404
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3405
1206
10UF
20%
6.3V
CERM
2
1
C3406
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3407
CERM
6.3V
20%
10UF
1206
2
1
C3408
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3409
1206
10UF
20%
6.3V
CERM
2
1
C3419
CERM
6.3V
20%
10UF
1206
2
1
C3429
1206
10UF
20%
6.3V
CERM
2
1
C3430
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3431
CERM
6.3V
20%
10UF
1206
2
1
C3432
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3433
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3434
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3435
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3436
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3437
CERM
6.3V
20%
10UF
1206
2
1
C3438
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3439
1206
10UF
20%
6.3V
CERM
2
1
C3440
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3441
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3442
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3443
10UF
1206
20%
6.3V
CERM
EXTRA_C
2
1
C3444
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3445
1206
10UF
20%
6.3V
CERM
2
1
C3446
CERM
6.3V
20%
10UF
1206
2
1
C3447
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3448
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3449
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3450
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3451
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3452
1206
10UF
20%
6.3V
CERM
2
1
C3453
1206
10UF
20%
6.3V
CERM
2
1
C3454
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3455
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3456
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3457
CERM
6.3V
20%
10UF
1206
2
1
C3458
4PHASE
SOIC
SC1211
7
5
6
2
9
1
4
3
8
U3420
1/16W
4PHASE
5%
1
MF
402
2 1
R3420
16V
ELEC
1000UF
20%
TH-KZJ
2
1
C3412
ELEC
1000UF
16V
20%
TH-KZJ
2
1
C3411
TH1
0.6UH-24A
2 1
L3410
402
MF
1
5%
1/16W
2 1
R3410
SC1211
SOIC
7
5
6
2
9
1
4
3
8
U3410
1000UF
20%
ELEC
16V
TH-KZJ
2
1
C3422
NOSTUFF
ELEC
20%
16V
1000UF
TH-KZJ
2
1
C3421
TH1
0.6UH-24A
4PHASE
2 1
L3420
402
CERM
50V
10%
0.0022UF
NOSTUFF
2
1
C3415
NOSTUFF
402
CERM
50V
10%
0.0022UF
2
1
C3425
4PHASE
1206
1UF
20%
16V
CERM
2
1
C3423
16V
20%
1UF
1206
CERM
2
1
C3413
4PHASE
20%
16V
CERM
1206
1UF
2 1
C3420
1UF
CERM
1206
16V
20%
2 1
C3410
10UF
1210
CERM
16V
10%
2
1
C3468
10UF
1210
10%
16V
CERM
4PHASE
2
1
C3469
20%
6.3V
ELEC
1800UF
TH-KZJ
2
1
C3417
1800UF
6.3V
ELEC
20%
TH-KZJ
2
1
C3418
NOSTUFF
TH-KZJ
1800UF
20%
6.3V
ELEC
2
1
C3428
TH-KZJ
1800UF
20%
6.3V
ELEC
2
1
C3427
SOT23
BAS16
3
1
D3410
4PHASE
SOT23
BAS16
3
1
D3420
805
FF
1/10W
5%
1
2
1
R3411
402
10%
25V
CERM
0.0047UF
2
1
C3416
4PHASE
805
1
5%
1/10W
FF
2
1
R3421
4PHASE
0.0047UF
402
10%
25V
CERM
2
1
C3426
1206
1UF
20%
CERM
16V
2
1
C3470
4PHASE
1206
1UF
20%
CERM
16V
2
1
C3471
50V
CERM
402
20%
0.001UF
2
1
C3414
MF
1/16W
5%
100
402
2
1
R3412
4PHASE
1/16W
MF
5%
100
402
2
1
R3422
4PHASE
0.001UF
20%
50V
CERM
402
2
1
C3424
10K
5%
1/16W
MF
402
2
1
R3450
4PHASE
10K
5%
1/16W
MF
402
2
1
R3451
MF
5%
1/16W
2.2
603
2 1
R3423
4PHASE
MF
5%
1/16W
2.2
603
2 1
R3424
1800UF
6.3V
ELEC
20%
TH-KZJ
2
1
C3472
TH-KZJ
20%
ELEC
6.3V
1800UF
2
1
C3473
1800UF
6.3V
ELEC
20%
TH-KZJ
2
1
C3474
1800UF
6.3V
ELEC
20%
TH-KZJ
2
1
C3475
OMIT
V30284
TO-252
CRITICAL
3
1
4
Q3420
OMIT
V30289
TO-252
CRITICAL
3
1
4
Q3421
CRITICAL
TO-252
V30284
VISHAY
3
1
4
Q3410
CRITICAL
TO-252
V30289
VISHAY
3
1
4
Q3411
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3459
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3460
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3461
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3462
1206
10UF
20%
6.3V
CERM
2
1
C3463
1206
10UF
20%
6.3V
CERM
2
1
C3464
CERM
6.3V
20%
10UF
1206
2
1
C3465
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3466
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3467
376S0146
ON SEMI FET
1
Q3421
4PHASE_ON
1
Q3421
4PHASE_VISH
VISHAY FET 376S0207
Q3410
1
ON SEMI FET
376S0130
ON_SEMI
Q3411
1
376S0146
ON SEMI FET
ON_SEMI
1
Q3420
4PHASE_VISH
VISHAY FET 376S0204
ON SEMI FET
376S0130
1
Q3420
4PHASE_ON
I
34
103
051-6482
PPVCORE_CPU
U3420_DRN
PP12V_CPU
PPVCORE_CPU
U3410_DRN
VPN4
U3420_BST_R
OUT3
U3410_VREG
U3410_BG
OUT4
C3426_1
C3416_1
PP12V_CPU
AUX4
AUX3
PP12V_CPU
PN4
PN3
U3410_BST_R
U3410_BST
U3420_BST
PPVCORE_CPU
U3420_TG
PP12V_CPU
U3420_BG
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PN4
U3410_TG
PN3
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
U3420_VREG
VPN3
35
35
35
34
34
34
33
34
33
34
34
33
34
7
33
7
33
33
7
33
6
6
6
33
33
6
33
33
6
34
34
6
6
34
34
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CPU VREG OUTPUT CAPS
EXTRA_C
CRITICAL
10UF
6.3V
CERM
20%
1206
2
1
C3500
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3501
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3502
NOSTUFF
SM
10BQ040
2 1
DS3500
10BQ040
SM
2 1
DS3502
10BQ040
SM
NOSTUFF
21
DS3501
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3503
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3504
EXTRA_C
1206
20%
6.3V
CERM
10UF
2
1
C3505
EXTRA_C
CERM
6.3V
20%
1206
10UF
2
1
C3506
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3507
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3508
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3509
1206
20%
6.3V
CERM
10UF
2
1
C3510
CERM
20%
10UF
1206
6.3V
2
1
C3511
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3512
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3513
CERM
6.3V
1206
20%
10UF
2
1
C3514
EXTRA_C
10UF
6.3V
CERM
1206
20%
2
1
C3515
EXTRA_C
10UF
20%
6.3V
1206
CERM
2
1
C3516
20%
10UF
6.3V
1206
CERM
2
1
C3517
20%
6.3V
CERM
1206
10UF
2
1
C3518
EXTRA_C
10UF
20%
1206
CERM
6.3V
2
1
C3519
EXTRA_C
20%
10UF
6.3V
CERM
1206
2
1
C3520
10UF
20%
6.3V
CERM
1206
2
1
C3521
EXTRA_C
10UF
20%
6.3V
CERM
1206
2
1
C3522
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3523
EXTRA_C
10UF
20%
6.3V
1206
CERM
2
1
C3524
EXTRA_C
CERM
6.3V
10UF
1206
20%
2
1
C3525
10UF
20%
CERM
6.3V
1206
2
1
C3526
10UF
20%
1206
6.3V
CERM
EXTRA_C
2
1
C3527
EXTRA_C
20%
10UF
1206
CERM
6.3V
2
1
C3528
10UF
20%
CERM
1206
6.3V
EXTRA_C
2
1
C3529
EXTRA_C
10UF
20%
1206
6.3V
CERM
2
1
C3530
20%
10UF
CERM
6.3V
1206
2
1
C3531
10UF
20%
CERM
6.3V
1206
EXTRA_C
2
1
C3532
10UF
20%
CERM
6.3V
1206
EXTRA_C
2
1
C3533
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3534
10UF
20%
1206
6.3V
CERM
EXTRA_C
2
1
C3535
EXTRA_C
CERM
6.3V
10UF
1206
20%
2
1
C3536
EXTRA_C
10UF
20%
1206
6.3V
CERM
2
1
C3537
10UF
20%
CERM
6.3V
1206
EXTRA_C
2
1
C3538
10UF
20%
1206
6.3V
CERM
2
1
C3539
10UF
20%
CERM
6.3V
1206
2
1
C3540
10UF
20%
1206
6.3V
CERM
2
1
C3541
10UF
20%
CERM
6.3V
1206
EXTRA_C
2
1
C3542
EXTRA_C
20%
1206
6.3V
CERM
10UF
2
1
C3543
10UF
20%
CERM
6.3V
1206
2
1
C3544
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3545
10UF
20%
6.3V
CERM
1206
2
1
C3546
EXTRA_C
10UF
20%
1206
6.3V
CERM
2
1
C3547
EXTRA_C
10UF
20%
CERM
6.3V
1206
2
1
C3548
EXTRA_C
10UF
20%
1206
6.3V
CERM
2
1
C3549
EXTRA_C
10UF
20%
CERM
6.3V
1206
2
1
C3550
10UF
20%
1206
6.3V
CERM
2
1
C3551
EXTRA_C
10UF
20%
1206
6.3V
CERM
2
1
C3552
10UF
20%
CERM
6.3V
1206
2
1
C3553
EXTRA_C
10UF
20%
1206
6.3V
CERM
2
1
C3554
EXTRA_C
10UF
20%
CERM
6.3V
1206
2
1
C3555
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3556
10UF
20%
1206
6.3V
CERM
2
1
C3557
CERM
6.3V
20%
10UF
1206
2
1
C3558
1206
10UF
20%
6.3V
CERM
2
1
C3559
CERM
6.3V
20%
10UF
1206
2
1
C3560
1206
10UF
20%
6.3V
CERM
2
1
C3561
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3562
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3563
1206
10UF
20%
6.3V
CERM
2
1
C3564
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3565
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3566
1206
10UF
20%
6.3V
CERM
2
1
C3567
CERM
20%
10UF
1206
6.3V
2
1
C3568
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3569
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3570
CERM
6.3V
20%
10UF
1206
2
1
C3571
EXTRA_C
1206
CERM
10UF
20%
6.3V
2
1
C3572
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3573
EXTRA_C
CERM
6.3V
20%
1206
10UF
2
1
C3574
EXTRA_C
1206
10UF
20%
CERM
6.3V
2
1
C3575
CERM
6.3V
20%
10UF
1206
2
1
C3576
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3577
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3578
CERM
20%
10UF
1206
6.3V
2
1
C3579
CERM
6.3V
20%
10UF
1206
2
1
C3580
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3581
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3582
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3583
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3584
CERM
6.3V
20%
1206
10UF
2
1
C3585
1206
20%
6.3V
CERM
10UF
2
1
C3586
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3587
1206
10UF
20%
6.3V
CERM
2
1
C3588
1206
10UF
20%
6.3V
CERM
2
1
C3589
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3590
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3591
1206
10UF
20%
6.3V
CERM
2
1
C3592
CERM
20%
1206
6.3V
10UF
2
1
C3593
1206
10UF
20%
6.3V
CERM
2
1
C3594
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3595
CERM
6.3V
10UF
1206
20%
2
1
C3596
1206
10UF
20%
6.3V
CERM
2
1
C3597
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3598
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3599
I
35
103
051-6482
=PP1V2_EI_CPU
PP2V5_RUN_CPU_AVDD_R
PPVCORE_CPU
PPVCORE_CPU
31 30
35
35
29
34
34
18
33
33
14
7
7
7
31
6
6
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE CLOSE
TO U2900
POWER MONITOR
NEEDED FOR FMAX
CPU DIODE CONDITIONER
THESE SIGNALS HAVE A MIN_LINE_WIDTH=10MIL
AND MIN_NECK_WIDTH=8MIL
PLACE AT BOARD EDGE
NEED TO CONNECT TO P65 OF 80PIN SMU OR PIN 49 OF 64PIN SMU
100UA CURRENT SOURCE
XW3600, R3602, AND DS3602 MUST BE PLACED CLOSE TO SMU
BUFFER
10V
20%
805
CERM
2.2UF
2
1
C3600
805
CERM
10V
20%
2.2UF
2
1
C3601
200
1/16W
MF
1%
603
2
1
R3601
SSOT-23
2.5V
3
1 2
D3600
603
0.47UF
20%
10V
CERM
2
1
C3602
SOT23-5
LMV2011
2
5
1
4
3
U3601
OMIT
SM
2 1
XW3601
MF
603
2
5%
1/16W
2 1
R3602
10V
CERM
20%
805
2.2UF
2
1
C3603
805
20%
CERM
10V
2.2UF
2
1
C3604
10V
CERM
20%
805
2.2UF
2
1
C3605
8MIL
0.1%
1/16W
603
FF
10K
2 1
R3603
0.1%
FF
603
20K
1/16W
2 1
R3604
8MIL
FF
0.1%
1/16W
603
10K
2 1
R3605
0.1%
1/16W
603
FF
10K
2 1
R3606
20K
1/16W
0.1%
603
FF
2 1
R3607
12.7K
MF
603
1%
1/16W
2
1
R3608
LMV2011
SOT23-5
2
5
1
4
3
U3602
LMV2011
SOT23-5
2
5
1
4
3
U3603
0.1%
1/16W
FF
10K
603
2 1
R3609
0.1%
1/16W
603
10K
FF
2 1
R3610
603
100K
0.1%
MF
1/16W
2 1
R3611
603
40.2K
0.1%
1/16W
FF
2 1
R3612
603
40.2K
0.1%
1/16W
FF
TD4
2 1
R3613
603
100K
0.1%
MF
1/16W
2 1
R3614
0.0022UF
CERM
50V
402
10%
2
1
C3606
402
1/16W
MF
5%
0
2
1
R3615
1K
402
MF
1%
1/16W
NOSTUFF
2
1
R3616
CERM
20%
805
10UF
6.3V
2 1
C3607
6.3V
10UF
805
CERM
20%
2 1
C3608
CERM
50V
10%
402
0.0022UF
2
1
C3610
NOSTUFF
FF
805
5%
1/10W
0
2
1
R3619
51
402
5%
MF
1/16W
NOSTUFF
2 1
R3620
1/16W
5%
51
MF
402
NOSTUFF
2 1
R3621
BM12B-SRSS-TB
F-ST-SM
NOSTUFF
9
8
7
6
5
4
3
2
12
11
10
1
13
14
J3600
1/16W
MF
5%
100K
402
2 1
R3628
CERM
6.3V
20%
10UF
805
2
1
C3613
OMIT
SM
2 1
XW3611
SM
OMIT
2 1
XW3612
OMIT
SM
2 1
XW3613
SM
OMIT
2 1
XW3614
MF
0
5%
1/16W
402
2 1
R3690
402
MF
1/16W
0
5%
NOSTUFF
2 1
R3691
SM
MBR0530
NOSTUFF
2 1
DS3602
MBR0530
NOSTUFF
SM
2
1
DS3650
1/16W
MF
5%
0
603
2
1
R3650
103
36
051-6482
I
CPU_TEMP_R
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=15MIL
DAGND
PP3V3_CPU_DIODE
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
=PP3V3_PWRON_CPU
=PP3V3_ALL_CPU
=PP5V_PWRON_CPU
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=15MIL
DAVDD
=PP5V_ALL_CPU
PPVREF_SMU_ADC_REF
ADC_REF
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
DAGND
8MIL
10MIL
TD3
8MIL
10MIL
TD2
10MIL
TD1
10MIL
TD_CURRENT
DAGND
GND_SMU_AVSS
MIN_NECK_WIDTH=8MIL
CPU_TEMP
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
TD_BUFFERED
FMAXT_M
DIFFERENTIAL_PAIR=P_FMAXT
NET_SPACING_TYPE=PROC_DIFF
DAVDD
DAVDD
DAVDD
DAGND
DAGND
ADC_REF
DAGND
ADC_REF
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_FMAXT
FMAXT_P
DAGND
TDIODE_NEG
=PPVCORE_CPU
ADC_REF
KPVDD2
KPGND2
TDIODE_POS
TDIODE_NEG
DAGND
CPU_TEMP
DAGND
GND_SMU_AVSS_DAGND
TDIODE_POS
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=TDIODE
TDIODE_POS_FMAX
NET_SPACING_TYPE=PROC_DIFF
TDIODE_NEG_FMAX
DIFFERENTIAL_PAIR=TDIODE
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
NET_SPACING_TYPE=PROC_DIFF
KPVDD2_FMAX
DIFFERENTIAL_PAIR=KP2_FMAX
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
NET_SPACING_TYPE=PROC_DIFF
KPGND2_FMAX
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=KP2_FMAX
NET_SPACING_TYPE=PROC_DIFF
CORE_ISNS_P
DIFFERENTIAL_PAIR=CORE_ISNS
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
NET_SPACING_TYPE=PROC_DIFF
NET_SPACING_TYPE=PROC_DIFF
CORE_ISNS_M
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=CORE_ISNS
32
33
36
31
36
13
36
31
29
33
33
36
31
36
36
33
33
36
7 7
7
36
7
8
36
36
36
8
13
36
36
36
36
36
36
36
36
36
6
7
36
31
31
31
6
36
13
36
8
31
6
6
6
6
6
6
INTERFACE
DATA
MEMORY
DDR_DQ5
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ26
DDR_DQ25
DDR_DQ24
DDR_DQ23
DDR_DQ22
DDR_DQ21
DDR_DQ20
DDR_DQ19
DDR_DQ18
DDR_DQ17
DDR_DQ36
DDR_DQ35
DDR_DQ34
DDR_DQ33
DDR_DQ32
DDR_DQ31
DDR_DQ30
DDR_DQ29
DDR_DQ28
DDR_DQ27
DDR_DQ46
DDR_DQ45
DDR_DQ44
DDR_DQ43
DDR_DQ42
DDR_DQ41
DDR_DQ40
DDR_DQ39
DDR_DQ38
DDR_DQ37
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
VDD_DDR
(SYM 2 OF 7)
DDR_DQ64
DDR_DQ65
DDR_DQ69
DDR_DQ68
DDR_DQ67
DDR_DQ66
DDR_DQ70
DDR_DQ74
DDR_DQ73
DDR_DQ72
DDR_DQ71
DDR_DQ75
DDR_DQ79
DDR_DQ78
DDR_DQ77
DDR_DQ76
DDR_DQ80
DDR_DQ81
DDR_DQ82
DDR_DQ83
DDR_DQ85
DDR_DQ84
DDR_DQ90
DDR_DQ89
DDR_DQ88
DDR_DQ87
DDR_DQ86
DDR_DQ95
DDR_DQ94
DDR_DQ93
DDR_DQ92
DDR_DQ91
DDR_DQ99
DDR_DQ98
DDR_DQ97
DDR_DQ96
DDR_DQ100
DDR_DQ104
DDR_DQ105
DDR_DQ106
DDR_DQ107
DDR_DQ108
DDR_DQ109
DDR_DQ110
DDR_DQ103
DDR_DQ102
DDR_DQ101
DDR_DQ111
DDR_DQ112
DDR_DQ113
DDR_DQ114
DDR_DQ115
DDR_DQ116
DDR_DQ117
DDR_DQ118
DDR_DQ119
DDR_DQ120
DDR_DQ121
DDR_DQ127
DDR_DQ126
DDR_DQ125
DDR_DQ124
DDR_DQ123
DDR_DQ122
DDR_VREF7
DDR_VREF6
DDR_VREF5
DDR_VREF4
DDR_VREF3
INTERFACE
CONTROL
MEMORY
DDR
CLK_AVDD
VDD_DDR
(SYM 3 OF 7)
DDR_CK_D
DDR_CK_CN
DDR_CK_C
DDR_CK_BN
DDR_CK_B
DDR_CK_AN
DDR_CK_A
DDR_CK_DN
DDR_CK_EN
DDR_CK_FN
DDR_CK_F
DDR_CK_E
DDR_CLKP
DDR_CKE7
DDR_CKE6
DDR_CKE5
DDR_CKE4
DDR_CKE3
DDR_CKE1
DDR_CKE2
DDR_CKE0
DDR_VREF1
DDR_RAS
DDR_CAS
DDR_WE
DDR_BA1
DDR_BA0
DDR_MUXEN0
DDR_MAD5
DDR_MAD4
DDR_MAD3
DDR_MAD2
DDR_MAD1
DDR_MAD0
DDR_MUXEN4
DDR_MAD9
DDR_MAD8
DDR_MAD6
DDR_MAD7
DDR_MAD13
DDR_MAD12
DDR_MAD11
DDR_MAD10
DDR_CS1
DDR_CS0
DDR_CS2
DDR_CS8
DDR_CS3
DDR_CS11
DDR_CS10
DDR_CS9
DDR_DQSP1
DDR_DQSP0
DDR_DQSP2
DDR_DQSP3
DDR_DQSP8
DDR_DQSP7
DDR_DQSP6
DDR_DQSP9
DDR_DQSP10
DDR_DQSP11
DDR_DQSP12
DDR_DQSP4
DDR_DQSP5
DDR_DQSP13
DDR_DQSP15
DDR_DQSP14
DDR_CLK_AVSS
DDR_VREF2
DDR_VREF0
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LAST MODIFIED: APR 12, 04
U3LITE MEMORY
MASTER: GILA
U3TWINS DO NOT HAVE MASKS
CERM
10V
20%
0.1UF
402
2
1
C3713
402
0.1UF
20%
10V
CERM
2
1
C3712
CERM
10V
20%
0.1UF
402
2
1
C3711
402
0.1UF
20%
10V
CERM
2
1
C3710
CERM
10V
20%
0.1UF
402
2
1
C3709
402
0.1UF
20%
10V
CERM
2
1
C3708
CERM
10V
20%
0.1UF
402
2
1
C3707
402
0.1UF
20%
10V
CERM
2
1
C3706
CERM
10V
20%
0.1UF
402
2
1
C3705
402
0.1UF
20%
10V
CERM
2
1
C3704
CERM
10V
20%
0.1UF
402
2
1
C3703
402
0.1UF
20%
10V
CERM
2
1
C3702
CERM
10V
20%
0.1UF
402
2
1
C3701
0.1UF
CERM
402
20%
10V
2
1
C3700
402
0.1UF
20%
10V
CERM
2
1
C3714
402
0.1UF
20%
10V
CERM
2
1
C3729
CERM
10V
20%
0.1UF
402
2
1
C3728
402
0.1UF
20%
10V
CERM
2
1
C3727
CERM
10V
20%
0.1UF
402
2
1
C3726
402
0.1UF
20%
10V
CERM
2
1
C3725
CERM
10V
20%
0.1UF
402
2
1
C3724
CERM
10V
20%
0.1UF
402
2
1
C3722
402
0.1UF
20%
10V
CERM
2
1
C3721
CERM
10V
20%
0.1UF
402
2
1
C3720
402
0.1UF
20%
10V
CERM
2
1
C3719
CERM
10V
20%
0.1UF
402
2
1
C3718
402
0.1UF
20%
10V
CERM
2
1
C3717
CERM
10V
20%
0.1UF
402
2
1
C3716
0.1UF
CERM
402
20%
10V
2
1
C3715
CERM
10V
20%
0.1UF
402
2
1
C3731
402
0.1UF
20%
10V
CERM
2
1
C3732
402
0.1UF
20%
10V
CERM
2
1
C3733
402
0.1UF
20%
10V
CERM
2
1
C3734
402
0.1UF
20%
10V
CERM
2
1
C3735
402
0.1UF
20%
10V
CERM
2
1
C3730
402
0.1UF
20%
10V
CERM
2
1
C3736
402
0.1UF
20%
10V
CERM
2
1
C3737
CERM
10V
20%
0.1UF
402
2
1
C3738
CERM
10V
20%
0.1UF
402
2
1
C3739
CERM
10V
20%
0.1UF
402
2
1
C3740
CERM
10V
20%
0.1UF
402
2
1
C3742
CERM
10V
20%
0.1UF
402
2
1
C3743
2.2
1/16W
MF
603
5%
2 1
R3702
402
CERM
10V
20%
0.1UF
2
1
C3744
1/16W
1K
1%
MF
402
2
1
R3700
402
1UF
10%
6.3V
CERM
2
1
C3745
0.1UF
CERM
10V
20%
402
2
1
C3746
CERM
10V
20%
0.1UF
402
2
1
C3747
CERM
10V
20%
0.1UF
402
2
1
C3748
402
1K
1%
1/16W
MF
2
1
R3701
U3LITE
V1.0-300MM
OMIT
PBGA
AA16
AA13
AB25
AC19
AE27
AE22
AE16
AE13
V20
W27
W23
Y19
Y16
AG25
AG19
P27
R28
R26
R27
U26
T28
V28
U27
W28
V24
AH25
V27
V26
Y24
Y28
Y25
Y26
AA28
AA24
AA26
AA27
AH26
AD27
AC27
AC25
AC26
AF27
AD26
AE28
AF28
AG28
AD25
AD21
AD24
AF26
AG26
AE24
AF24
AG27
H22
G21
H21
J21
AD23
H23
E23
J22
F24
A26
B28
A28
A27
A24
A23
AC21
B23
B24
C23
C24
A25
A22
C27
C26
D24
D23
AB20
J23
L23
L22
M24
P22
P21
M23
M25
P23
P24
AG21
R24
P26
U23
R21
R22
P25
U22
V22
V23
U24
AH21
AA22
Y22
AA23
U25
AH28
AF23
AG24
E24
E25
C28
D28
E26
F26
E27
E28
AH27
H26
F27
H24
H25
G28
J26
J24
J25
L24
J27
AH23
H28
H27
K28
L27
L26
L25
P28
L28
N28
M28
AH24
AH22
AF20
U3
PBGA
U3LITE
V1.0-300MM
OMIT
B25
D27
D22
F19
G25
K27
K23
K19
M19
N25
N21
P20
T25
T21
T19
AC23
J20
V21
M21
AA21
H20
L21
U21
Y21
AE21
AH18
AH16
AF15
AG15
AC12
AD12
AE12
AF12
AH15
AH14
AG17
AH17
AG14
AF14
AH13
AG12
AD28
AE23
F23
B27
B26
M22
R23
Y23
F25
F28
J28
M27
U28
Y27
AG23
AC24
AD18
AC18
AH20
AG20
AH19
AG18
AE18
AF18
AA20
AB21
AC20
AB15
AA15
AC15
AD15
AD14
AC14
AE14
AE15
AA14
AB14
AB12
AA12
AA18
AB18
AA17
AB17
AF17
AE17
AD17
AC17
AD20
AE20
AF21
U3
051-6482
103
37
I
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
PP1V25_PWRON_RAM_VREF_NB
VOLTAGE=1.25V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
RAM_CLK_E_N_R
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.5V
PP1V5_PWRON_RAM_NB_AVDD
RAM_DQ_R<64>
RAM_DQ_R<71>
RAM_DQ_R<75>
RAM_DQS_R<15>
RAM_DQS_R<14>
RAM_DQS_R<13>
RAM_DQS_R<11>
RAM_DQS_R<9>
RAM_DQS_R<10>
RAM_DQS_R<8>
RAM_DQS_R<7>
RAM_DQS_R<6>
RAM_DQS_R<5>
RAM_DQS_R<4>
RAM_DQS_R<3>
RAM_DQS_R<2>
RAM_DQS_R<1>
RAM_DQS_R<0>
RAM_CS_L_R<9>
RAM_CS_L_R<8>
RAM_CS_L_R<1>
RAM_CS_L_R<0>
RAM_A_R<13>
RAM_A_R<12>
RAM_A_R<11>
RAM_A_R<10>
RAM_A_R<9>
RAM_A_R<8>
RAM_A_R<7>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<2>
RAM_A_R<1>
RAM_A_R<0>
RAM_BA_R<0>
RAM_WE_L_R
RAM_CAS_L_R
RAM_RAS_L_R
RAM_DQ_R<127>
RAM_DQ_R<126>
RAM_DQ_R<124>
RAM_DQ_R<125>
RAM_DQ_R<121>
RAM_DQ_R<123>
RAM_DQ_R<122>
RAM_DQ_R<119>
RAM_DQ_R<120>
RAM_DQ_R<117>
RAM_DQ_R<118>
RAM_DQ_R<116>
RAM_DQ_R<114>
RAM_DQ_R<115>
RAM_DQ_R<111>
RAM_DQ_R<113>
RAM_DQ_R<112>
RAM_DQ_R<110>
RAM_DQ_R<109>
RAM_DQ_R<108>
RAM_DQ_R<107>
RAM_DQ_R<106>
RAM_DQ_R<104>
RAM_DQ_R<105>
RAM_DQ_R<103>
RAM_DQ_R<101>
RAM_DQ_R<102>
RAM_DQ_R<99>
RAM_DQ_R<98>
RAM_DQ_R<100>
RAM_DQ_R<96>
RAM_DQ_R<97>
RAM_DQ_R<94>
RAM_DQ_R<95>
RAM_DQ_R<93>
RAM_DQ_R<91>
RAM_DQ_R<92>
RAM_DQ_R<89>
RAM_DQ_R<90>
RAM_DQ_R<88>
RAM_DQ_R<86>
RAM_DQ_R<87>
RAM_DQ_R<85>
RAM_DQ_R<84>
RAM_DQ_R<83>
RAM_DQ_R<81>
RAM_DQ_R<80>
RAM_DQ_R<82>
RAM_DQ_R<79>
RAM_DQ_R<76>
RAM_DQ_R<77>
RAM_DQ_R<74>
RAM_DQ_R<73>
RAM_DQ_R<70>
RAM_DQ_R<72>
RAM_DQ_R<69>
RAM_DQ_R<68>
RAM_DQ_R<65>
RAM_DQ_R<67>
RAM_DQ_R<59>
RAM_DQ_R<0>
RAM_DQ_R<5>
RAM_DQ_R<3>
RAM_DQ_R<2>
RAM_DQ_R<4>
RAM_DQ_R<10>
RAM_DQ_R<6>
RAM_DQ_R<7>
RAM_DQ_R<8>
RAM_DQ_R<9>
RAM_DQ_R<11>
RAM_DQ_R<15>
RAM_DQ_R<12>
RAM_DQ_R<13>
RAM_DQ_R<14>
RAM_DQ_R<16>
RAM_DQ_R<21>
RAM_DQ_R<20>
RAM_DQ_R<19>
RAM_DQ_R<17>
RAM_DQ_R<18>
RAM_DQ_R<26>
RAM_DQ_R<22>
RAM_DQ_R<23>
RAM_DQ_R<24>
RAM_DQ_R<25>
RAM_DQ_R<31>
RAM_DQ_R<27>
RAM_DQ_R<28>
RAM_DQ_R<29>
RAM_DQ_R<30>
RAM_DQ_R<36>
RAM_DQ_R<32>
RAM_DQ_R<33>
RAM_DQ_R<34>
RAM_DQ_R<35>
RAM_DQ_R<41>
RAM_DQ_R<37>
RAM_DQ_R<38>
RAM_DQ_R<39>
RAM_DQ_R<40>
RAM_DQ_R<46>
RAM_DQ_R<45>
RAM_DQ_R<44>
RAM_DQ_R<43>
RAM_DQ_R<42>
RAM_DQ_R<51>
RAM_DQ_R<47>
RAM_DQ_R<48>
RAM_DQ_R<49>
RAM_DQ_R<50>
RAM_DQ_R<52>
RAM_DQ_R<56>
RAM_DQ_R<55>
RAM_DQ_R<54>
RAM_DQ_R<53>
RAM_DQ_R<57>
RAM_DQ_R<60>
RAM_DQ_R<58>
RAM_DQ_R<61>
RAM_DQ_R<62>
RAM_DQ_R<63>
RAM_DQ_R<1>
RAM_DQ_R<66>
RAM_CKE_R<7>
RAM_BA_R<1>
RAM_MUXEN4
RAM_MUXEN0
RAM_CS_L_R<3>
RAM_CS_L_R<2>
RAM_CS_L_R<11>
RAM_CS_L_R<10>
RAM_CKE_R<5>
RAM_CKE_R<1>
RAM_CLK_F_P_R
RAM_CLK_E_P_R
RAM_CKE_R<0>
RAM_CKE_R<4>
RAM_CKE_R<6>
RAM_CKE_R<3>
RAM_CLK_D_N_R
RAM_CLK_C_N_R
RAM_CLK_D_P_R
RAM_CLK_C_P_R
RAM_CLK_A_N_R
RAM_CLK_B_N_R
RAM_CLK_B_P_R
=PP1V5_PWRON_NB_AVDD
RAM_CKE_R<2>
RAM_DQ_R<78>
RAM_A_R<5>
RAM_CLK_A_P_R
RAM_CLK66M_NB
RAM_A_R<6>
RAM_DQS_R<12>
RAM_CLK_F_N_R
40
40
40
40
60
37
37
37
37
48
26
26
26
26
28
7
7
7
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
8
38
8
8
8
8
8
8
38
38
38
38
38
38
8
8
38
38
38
38
38
38
38
7
8
38
38
38
27
38
38
38
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SERIES TERM
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
RAM_CLK LINE-LINE SPACING SET TO 15MIL
TOTAL LENGTH TOLERENCE = 20PS = 2.82MM
RAM_CAD SPACING IS 10MIL
THE FOLLOWING ARE 0402 5% RESISTORS
THE FOLLOWING IS A SWAPPABLE GROUP
THE FOLLOWING IS A SWAPPABLE GROUP
RAM_CLK PRIMARY SPACING SET BASED ON DIFF IMPEDANCE
ALL R PACKS ARE 1/16W 5%
22
7 2
RP3818
22
8 1
RP3818
22
6 3
RP3826
22
5 4
RP3807
22
6 3
RP3807
22
8 1
RP3826
22
8 1
RP3807
22
8 1
RP3811
22
7 2
RP3811
22
5 4
RP3811
22
7 2
RP3814
22
8 1
RP3814
22
6 3
RP3817
22
5 4
RP3814
22
6 3
RP3814
22
6 3
RP3811
22
7 2
RP3830
22
5 4
RP3830
22
6 3
RP3830
22
8 1
RP3830
22
7 2
RP3812
22
5 4
RP3812
22
6 3
RP3812
22
5 4
RP3817
22
8 1
RP3813
22
8 1
RP3812
22
5 4
RP3831
22
7 2
RP3831
22
7 2
RP3813
22
8 1
RP3831
22
6 3
RP3831
22
6 3
RP3813
22
5 4
RP3813
15
6 3
RP3832
22
7 2
RP3802
15
5 4
RP3832
15
7 2
RP3832
15
6 3
RP3833
15
5 4
RP3800
15
7 2
RP3833
15
8 1
RP3833
15
8 1
RP3834
15
7 2
RP3834
15
6 3
RP3800
15
7 2
RP3800
22
8 1
RP3817
15
8 1
RP3832
15
5 4
RP3833
15
8 1
RP3800
15
8 1
RP3804
15
5 4
RP3804
15
6 3
RP3804
15
6 3
RP3834
15
7 2
RP3804
15
5 4
RP3834
22
8 1
RP3802
22
6 3
RP3802
15
6 3
RP3841
15
8 1
RP3841
15
5 4
RP3841
15
7 2
RP3841
15
8 1
RP3842
22
7 2
RP3806
15
7 2
RP3842
15
5 4
RP3842
15
6 3
RP3842
22
8 1
RP3821
15
2 1
R3800
15
2 1
R3801
22
5 4
RP3821
15
2 1
R3802
15
2 1
R3803
15
2 1
R3804
15
2 1
R3805
15
2 1
R3806
15
2 1
R3807
15
2 1
R3808
15
2 1
R3809
15
2 1
R3810
15
2 1
R3811
22
7 2
RP3805
22
7 2
RP3821
15
2 1
R3812
15
2 1
R3813
15
2 1
R3814
15
2 1
R3815
I206
I207
I208
I209
22
8 1
RP3806
I210
I211
I212
I213
I214
I215
I216
I217
I218
I219
22
6 3
RP3806
I220
I221
I222
I223
I224
I225
I226
I227
I228
I229
22
6 3
RP3821
I230
I232
I234
I235
I236
I237
I238
22
5 4
RP3806
I241
I242
I243
I244
I245
I246
I248
22
6 3
RP3819
I251
I252
I253
I254
I255
I256
I257
I258
I259
22
8 1
RP3819
I260
I261
I262
I263
I264
I265
I266
I267
I268
I269
22
5 4
RP3803
I270
I271
I272
I273
I274
I275
I276
I277
I278
I279
22
5 4
RP3819
I280
15
2 1
R3816
15
2 1
R3817
15
2 1
R3818
15
2 1
R3819
15
2 1
R3820
15
2 1
R3821
15
2 1
R3822
15
2 1
R3823
15
2 1
R3824
22
7 2
RP3803
15
2 1
R3825
15
2 1
R3826
15
2 1
R3827
I293
I294
I295
I296
I297
I298
I299
22
5 4
RP3818
22
6 3
RP3803
I300
I301
I302
I303
I304
I305
22
7 2
RP3819
22
8 1
RP3803
22
5 4
RP3820
22
6 3
RP3820
22
7 2
RP3820
22
8 1
RP3820
22
7 2
RP3825
22
6 3
RP3825
22
8 1
RP3825
22
8 1
RP3805
22
5 4
RP3825
22
8 1
RP3809
22
6 3
RP3809
22
7 2
RP3809
22
7 2
RP3829
22
5 4
RP3829
22
6 3
RP3829
22
5 4
RP3809
22
8 1
RP3829
22
5 4
RP3828
22
6 3
RP3818
22
7 2
RP3815
22
8 1
RP3815
22
8 1
RP3828
22
6 3
RP3815
22
6 3
RP3828
22
7 2
RP3828
22
5 4
RP3815
22
6 3
RP3827
22
7 2
RP3827
22
5 4
RP3827
22
5 4
RP3805
22
7 2
RP3810
22
8 1
RP3827
22
5 4
RP3810
22
8 1
RP3810
22
6 3
RP3810
22
5 4
RP3836
22
7 2
RP3836
22
8 1
RP3836
22
6 3
RP3836
22
7 2
RP3816
22
5 4
RP3802
22
8 1
RP3816
22
6 3
RP3816
22
5 4
RP3835
22
5 4
RP3816
22
6 3
RP3801
22
8 1
RP3801
22
5 4
RP3801
22
7 2
RP3801
22
7 2
RP3835
22
6 3
RP3835
22
7 2
RP3817
22
8 1
RP3835
22
8 1
RP3822
22
7 2
RP3822
22
5 4
RP3822
22
6 3
RP3823
22
6 3
RP3822
22
5 4
RP3823
22
8 1
RP3823
22
7 2
RP3823
22
8 1
RP3808
22
6 3
RP3805
22
7 2
RP3824
22
6 3
RP3808
22
5 4
RP3808
22
8 1
RP3824
22
7 2
RP3808
22
6 3
RP3824
22
5 4
RP3824
22
7 2
RP3826
22
5 4
RP3826
22
7 2
RP3807
051-6482
103
38
I
RAM_DQ<68>
RAM_DQ<65>
RAM_DQ<75>
RAM_DQ<66>
RAM_DQ<70>
RAM_DQ<69>
RAM_DQ<71>
RAM_DQ<64>
RAM_DQ<67>
RAM_DQ<74>
RAM_DQ<73>
RAM_DQ<72>
RAM_DQ<79>
RAM_DQ<78>
RAM_DQ<77>
RAM_DQ<76>
RAM_DQ<87>
RAM_DQ<81>
RAM_DQ<86>
RAM_DQ<80>
RAM_DQ<84>
RAM_DQ<85>
RAM_DQ<83>
RAM_DQ<89>
RAM_DQ<82>
RAM_DQ<91>
RAM_DQ<93>
RAM_DQ<88>
RAM_DQ<90>
RAM_DQ<94>
RAM_DQ<92>
RAM_DQ<95>
RAM_DQ<103>
RAM_DQ<96>
RAM_DQ<98>
RAM_DQ<97>
RAM_DQ<100>
RAM_DQ<99>
RAM_DQ<102>
RAM_DQ<101>
RAM_DQ<111>
RAM_DQ<106>
RAM_DQ<105>
RAM_DQ<118>
RAM_DQ<115>
RAM_DQ<107>
RAM_DQ<108>
RAM_DQ<110>
RAM_DQ<104>
RAM_DQ<109>
RAM_DQ<119>
RAM_DQ<112>
RAM_DQ<117>
RAM_DQ<116>
RAM_DQ<113>
RAM_DQ<114>
RAM_DQ<121>
RAM_DQ<124>
RAM_DQ<120>
RAM_DQ<123>
RAM_DQ<125>
RAM_DQ<122>
RAM_DQ<126>
RAM_DQ<127>
RAM_DQ_R<106>
RAM_DQ_R<111>
RAM_DQ_R<68>
RAM_DQ_R<70>
RAM_DQ_R<69>
RAM_DQ_R<71>
RAM_DQ_R<64>
RAM_DQ_R<67>
RAM_DQ_R<74>
RAM_DQ_R<75>
RAM_DQ_R<73>
RAM_DQ_R<72>
RAM_DQ_R<79>
RAM_DQ_R<78>
RAM_DQ_R<77>
RAM_DQ_R<76>
RAM_DQ_R<87>
RAM_DQ_R<81>
RAM_DQ_R<86>
RAM_DQ_R<80>
RAM_DQ_R<84>
RAM_DQ_R<85>
RAM_DQ_R<83>
RAM_DQ_R<93>
RAM_DQ_R<88>
RAM_DQ_R<90>
RAM_DQ_R<94>
RAM_DQ_R<103>
RAM_DQ_R<96>
RAM_DQ_R<98>
RAM_DQ_R<97>
RAM_DQ_R<99>
RAM_DQ_R<102>
RAM_DQ_R<108>
RAM_DQ_R<105>
RAM_DQ_R<110>
RAM_DQ_R<104>
RAM_DQ_R<109>
RAM_DQ_R<119>
RAM_DQ_R<112>
RAM_DQ_R<117>
RAM_DQ_R<118>
RAM_DQ_R<116>
RAM_DQ_R<115>
RAM_DQ_R<113>
RAM_DQ_R<114>
RAM_DQ_R<121>
RAM_DQ_R<124>
RAM_DQ_R<120>
RAM_DQ_R<125>
RAM_DQ_R<122>
RAM_DQ_R<126>
RAM_DQ_R<65>
RAM_DQ_R<66>
RAM_DQ_R<95>
RAM_DQ_R<123>
RAM_DQ_R<127>
RAM_DQ_R<82>
RAM_DQ_R<91>
RAM_DQ_R<89>
RAM_DQ_R<92>
RAM_DQ_R<100>
RAM_DQ_R<101>
RAM_DQ_R<107>
RAM_DQ<2>
RAM_DQ<7>
RAM_DQ<9>
RAM_DQ<10>
RAM_DQ<14>
RAM_DQ<12>
RAM_DQ<22>
RAM_DQ<6>
RAM_DQ<8>
RAM_DQ<17>
RAM_DQ<19>
RAM_DQ<18>
RAM_DQ<20>
RAM_DQ<16>
RAM_DQ<1>
RAM_DQ<11>
RAM_DQ<13>
RAM_DQ<15>
RAM_DQ<21>
RAM_DQ<3>
RAM_DQ<0>
RAM_DQ<4>
RAM_DQ<5>
RAM_DQ_R<7>
RAM_DQ_R<2>
RAM_DQ_R<22>
RAM_DQ_R<18>
RAM_DQ_R<8>
RAM_DQ_R<15>
RAM_DQ_R<17>
RAM_DQ_R<20>
RAM_DQ_R<16>
RAM_DQ_R<21>
RAM_DQ_R<19>
RAM_DQ_R<0>
RAM_DQ_R<12>
RAM_DQ_R<13>
RAM_DQ_R<3>
RAM_DQ_R<4>
RAM_DQ_R<9>
RAM_DQ_R<1>
RAM_DQ_R<6>
RAM_DQ_R<5>
RAM_DQ_R<10>
RAM_DQ_R<11>
RAM_DQ_R<14>
RAM_DQ<27>
RAM_DQ<28>
RAM_DQ<38>
RAM_DQ<35>
RAM_DQ<23>
RAM_DQ<30>
RAM_DQ<24>
RAM_DQ<26>
RAM_DQ<31>
RAM_DQ<32>
RAM_DQ<39>
RAM_DQ<37>
RAM_DQ<34>
RAM_DQ<36>
RAM_DQ<33>
RAM_DQ<46>
RAM_DQ<47>
RAM_DQ<43>
RAM_DQ<25>
RAM_DQ<29>
RAM_DQ<60>
RAM_DQ<61>
RAM_DQ<57>
RAM_DQ<41>
RAM_DQ<45>
RAM_DQ<40>
RAM_DQ<51>
RAM_DQ<50>
RAM_DQ<44>
RAM_DQ<42>
RAM_DQ<48>
RAM_DQ<53>
RAM_DQ<54>
RAM_DQ<52>
RAM_DQ<49>
RAM_DQ<56>
RAM_DQ<55>
RAM_DQ<63>
RAM_DQ<59>
RAM_DQ<58>
RAM_DQ<62>
RAM_DQ_R<24>
RAM_DQ_R<23>
RAM_DQ_R<30>
RAM_DQ_R<26>
RAM_DQ_R<27>
RAM_DQ_R<28>
RAM_DQ_R<31>
RAM_DQ_R<25>
RAM_DQ_R<29>
RAM_DQ_R<38>
RAM_DQ_R<32>
RAM_DQ_R<35>
RAM_DQ_R<39>
RAM_DQ_R<37>
RAM_DQ_R<34>
RAM_DQ_R<36>
RAM_DQ_R<33>
RAM_DQ_R<46>
RAM_DQ_R<47>
RAM_DQ_R<43>
RAM_DQ_R<51>
RAM_DQ_R<53>
RAM_DQ_R<60>
RAM_DQ_R<58>
RAM_DQ_R<61>
RAM_DQ_R<48>
RAM_DQ_R<49>
RAM_DQ_R<57>
RAM_DQ_R<41>
RAM_DQ_R<45>
RAM_DQ_R<40>
RAM_DQ_R<50>
RAM_DQ_R<44>
RAM_DQ_R<42>
RAM_DQ_R<54>
RAM_DQ_R<52>
RAM_DQ_R<56>
RAM_DQ_R<55>
RAM_DQ_R<63>
RAM_DQ_R<59>
RAM_DQ_R<62>
RAM_CLK_F_N_R
RAM_CLK_E_N_R
RAM_CLK_F_P_R
RAM_A<4>
RAM_A<6>
RAM_A<12>
RAM_A<2>
RAM_A_R<2>
RAM_A_R<12>
RAM_A_R<7>
RAM_A_R<9>
RAM_A_R<8>
RAM_A<8>
RAM_A_R<4>
RAM_A_R<10>
RAM_A<1>
RAM_A<10>
RAM_BA_R<0>
RAM_BA_R<1>
RAM_RAS_L_R
RAM_A_R<5>
RAM_A_R<0>
RAM_CS_L_R<0>
RAM_CS_L_R<1>
RAM_CS_L_R<8>
RAM_A_R<1>
RAM_WE_L_R
RAM_A_R<6>
RAM_CKE_R<1>
RAM_CS_L_R<9>
RAM_CS_L<1>
RAM_CLK_C_N_R
RAM_DQS2
RAM_DQ<23..16>
RAM_CAD
RAM_DQS<2>
RAM_DQS2
RAM_CAD
RAM_RAS_L
RAM_A<9>
RAM_BA<1>
RAM_BA<0>
RAM_CAS_L
RAM_CAS_L_R
RAM_A<3>
RAM_A_R<3>
RAM_A<13>
RAM_A_R<13>
RAM_A<5>
RAM_A<0>
RAM_A<7>
RAM_WE_L
RAM_A<11>
RAM_A_R<11>
RAM_CS_L<0>
RAM_CS_L<9>
RAM_CS_L<8>
RAM_CKE<0>
RAM_CKE_R<0>
RAM_CKE<5>
RAM_CKE_R<5>
RAM_CKE<1>
RAM_CKE<4>
RAM_CKE_R<4>
RAM_CAD
RAM_CS_L<8>
RAM_CKECS1
RAM_CAD
RAM_CS_L<9>
RAM_CKECS1
RAM_CAD
RAM_CKECS0
RAM_CS_L<0>
RAM_CAD
RAM_CS_L<1>
RAM_CKECS0
RAM_CAD
RAM_CS_L_R<9..8>
RAM_CAD
RAM_CS_L_R<1..0>
RAM_CAD
RAM_CKE<5>
RAM_CKECS1
RAM_CAD
RAM_CKE<1>
RAM_CKECS0
RAM_CAD
RAM_CKE<4>
RAM_CKECS1
RAM_CAD
RAM_CKE<0>
RAM_CKECS0
RAM_CAD
RAM_CKE_R<5..4>
RAM_CAD
RAM_CKE_R<1..0>
RAM_CLK_F_N
RAM_CLK
RAM_CLK_F
RAM_CLK1
RAM_CLK_F
RAM_CLK
RAM_CLK_F_P
RAM_CLK1
RAM_CLK_E_P
RAM_CLK
RAM_CLK_E
RAM_CLK1
RAM_CLK_E
RAM_CLK
RAM_CLK_E_N
RAM_CLK1
RAM_CLK_C_N
RAM_CLK_C
RAM_CLK
RAM_CLK0
RAM_CLK_D
RAM_CLK
RAM_CLK_D_P
RAM_CLK1
RAM_CLK
RAM_CLK_D_N
RAM_CLK_D
RAM_CLK1
RAM_CLK_C
RAM_CLK
RAM_CLK_C_P
RAM_CLK0
RAM_CLK_B
RAM_CLK
RAM_CLK_B_N
RAM_CLK0
RAM_CLK_B_P
RAM_CLK_B
RAM_CLK
RAM_CLK0
RAM_CLK
RAM_CLK_A
RAM_CLK_A_N
RAM_CLK0
RAM_CLK_A
RAM_CLK
RAM_CLK_A_P
RAM_CLK0
RAM_CLK_F_N_R
RAM_CLK
RAM_CLK_F_R
RAM_CLK
RAM_CLK_F_P_R
RAM_CLK_F_R
RAM_CLK
RAM_CLK_E_N_R
RAM_CLK_E_R
RAM_CLK
RAM_CLK_E_P_R
RAM_CLK_E_R
RAM_CLK
RAM_CLK_D_N_R
RAM_CLK_D_R
RAM_CLK
RAM_CLK_D_P_R
RAM_CLK_D_R
RAM_CLK
RAM_CLK_C_N_R
RAM_CLK_C_R
RAM_CLK_C_P_R
RAM_CLK
RAM_CLK_C_R
RAM_CLK
RAM_CLK_B_N_R
RAM_CLK_B_R
RAM_CLK
RAM_CLK_B_P_R
RAM_CLK_B_R
RAM_CLK
RAM_CLK_A_N_R
RAM_CLK_A_R
RAM_CLK_A_P_R
RAM_CLK
RAM_CLK_A_R
RAM_DQS_R<15..0>
RAM_CAD
RAM_DQ_R<127..0>
RAM_CAD
RAM_DQS<3>
RAM_DQS3
RAM_CAD
RAM_DQS4
RAM_DQ<39..32>
RAM_CAD
RAM_DQS<8>
RAM_DQS8
RAM_CAD
RAM_DQS9
RAM_DQ<79..72>
RAM_CAD
RAM_DQS10
RAM_DQ<87..80>
RAM_CAD
RAM_DQS1
RAM_DQ<15..8>
RAM_CAD
RAM_DQS8
RAM_DQ<71..64>
RAM_CAD
RAM_DQS<7>
RAM_DQS7
RAM_CAD
RAM_DQS6
RAM_DQ<55..48>
RAM_CAD
RAM_DQS0
RAM_DQS<0>
RAM_CAD
RAM_DQS<1>
RAM_DQS1
RAM_CAD
RAM_DQS3
RAM_DQ<31..24>
RAM_CAD
RAM_DQ<127..0>
RAM_CAD
RAM_DQS12
RAM_DQ<103..96>
RAM_CAD
RAM_CAS_L_R
RAM_CAD
RAM_A_CTL
RAM_WE_L
RAM_CAD
RAM_DQS<4>
RAM_DQS4
RAM_CAD
RAM_DQS<0>
RAM_DQS_R<0>
RAM_DQS<1>
RAM_DQS_R<1>
RAM_DQS<2>
RAM_DQS_R<2>
RAM_DQS<3>
RAM_DQS_R<3>
RAM_DQS<5>
RAM_DQS_R<5>
RAM_DQS<4>
RAM_DQS_R<4>
RAM_DQS<6>
RAM_DQS_R<6>
RAM_DQS<8>
RAM_DQS_R<8>
RAM_DQS<7>
RAM_DQS_R<7>
RAM_DQS<10>
RAM_DQS_R<10>
RAM_DQS<9>
RAM_DQS_R<9>
RAM_DQS<11>
RAM_DQS_R<11>
RAM_DQS<12>
RAM_DQS_R<12>
RAM_DQS<13>
RAM_DQS_R<13>
RAM_DQS<14>
RAM_DQS_R<14>
RAM_DQS<15>
RAM_DQS_R<15>
RAM_CLK_B_P_R
RAM_CLK_B_N_R
RAM_CLK_C_P_R
RAM_CLK_D_P_R
RAM_CLK_D_N_R
RAM_CLK_E_P_R
RAM_CLK_A_P_R
RAM_CLK_A_N_R
RAM_CLK_A_P
RAM_CLK_A_N
RAM_CLK_B_P
RAM_CLK_B_N
RAM_CLK_C_P
RAM_CLK_C_N
RAM_CLK_D_P
RAM_CLK_D_N
RAM_CLK_E_P
RAM_CLK_E_N
RAM_CLK_F_P
RAM_CLK_F_N
RAM_DQS<5>
RAM_DQS5
RAM_CAD
RAM_DQS5
RAM_DQ<47..40>
RAM_CAD
RAM_DQS<6>
RAM_DQS6
RAM_CAD
RAM_DQS7
RAM_DQ<63..56>
RAM_CAD
RAM_DQS9
RAM_DQS<9>
RAM_CAD
RAM_DQS10
RAM_DQS<10>
RAM_CAD
RAM_DQS11
RAM_DQS<11>
RAM_CAD
RAM_DQS11
RAM_DQ<95..88>
RAM_CAD
RAM_DQS12
RAM_DQS<12>
RAM_CAD
RAM_DQS13
RAM_DQS<13>
RAM_CAD
RAM_DQS13
RAM_DQ<111..104>
RAM_CAD
RAM_DQS14
RAM_DQS<14>
RAM_CAD
RAM_DQS14
RAM_DQ<119..112>
RAM_CAD
RAM_DQS15
RAM_DQ<127..120>
RAM_CAD
RAM_DQS15
RAM_DQS<15>
RAM_CAD
RAM_A_R<13..0>
RAM_CAD
RAM_BA_R<1..0>
RAM_CAD
RAM_RAS_L_R
RAM_CAD
RAM_WE_L_R
RAM_CAD
RAM_A_CTL
RAM_RAS_L
RAM_CAD
RAM_A_CTL
RAM_BA<1..0>
RAM_CAD
RAM_A_CTL
RAM_A<13..0>
RAM_CAD
RAM_A_CTL
RAM_CAS_L
RAM_CAD
RAM_DQS0
RAM_DQ<7..0>
RAM_CAD
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
45
44
44
44
45
44
45
45
45
44
44
44
44
44
45
44
44
45
45
44
45
44
45
45
45
44
44
45
44
45
44
44
44
45
45
45
44
45
44
44
44
44
44
44
45
45
44
44
44
44
44
44
44
44
45
44
45
45
45
45
45
45
45
44
44
44
44
45
45
45
45
45
45
45
45
45
45
45
45
45
44
45
44
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
40
40
40
40 38
38
38
38
38 40
38
38
40
40
38
38
38
38
38
38
38
38
38
38
38
38
38
40
38
40
40
40
40
40
40
40 38
40 38
40 38
40
40
40
40
40 38
40
40
40
40 38
40 38
40
40 38
40
40
40
40
38
38
40
40
40
40
38
38
40
40
40
40
40
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
40
40
40
40
40
40
40
40
40
40
40
40
40
40
38
40
40
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
40 38
38
38
38
38
38
38
38
38
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
38
38
38
38
40
40
40
40
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
38
38
38 37
37
37
37
37 38
37
37
38
38
37
37
37
37
37
37
37
37
37
37
37
37
37
38
37
38
38
38
38
38
38
38 37
38 37
38 37
38
38
38
38
38 37
38
38
38
38 37
38 37
38
38 37
38
38
38
38
37
37
38
38
38
38
37
37
38
38
38
38
38
38
38
38
38
38
38
38
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
38
38
38
38
38
38
38
38
38
38
38
38
38
37
38
38
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
38 37
37
37
37
37
37
37
37
37
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
37
37
37
37
38
38
38
38
38
VREF
TOP SIDE BOT SIDE
DQ4
DQ5
VSS
VDDQ
DM0/DQS9
DQ7
VSS
DQ6
NC
NC
VSS
DQ1
DQ0
DQS0
NC
NC
DQ3
DQ2
VDD
DM1/DQS10
DQ12
VDDQ
A13
DQ13
VDDQ
CKE1
DQ14
DQ15
VDD
VDDQ
VSS
DQS1
DQ9
DQ8
DQ11
DQ10
CK1*
CK1
VSS
A12
VSS
DQ20
BA2
DQ21
DM2/DQS11
DQ22
VDD
A11
A8
VDDQ
CKE0
DQS2
DQ17
DQ16
VDDQ
A7
A9
DQ18
VSS
A6
DQ28
DQ23
VSS
DQ29
VDDQ
DM3/DQS12
A3
DQ30
VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26
VDD
A2 DQ31
NC
VDDQ
NC
CK0
CKO*
NC
VSS
A10
NC
NC
NC
A1
VSS
VDD
VSS
NC
A0
NC
NC VDDQ
VSS
NC
DQ36
DQ37
VDD
DM4/DQS13
VSS
DQ39
DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0
VSS
DQ40 DQ44
DQ45
VDDQ
RAS*
S0*
S1*
DM5/DQS14
VSS
DQ46
DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDD
DQ43
DQ42
DQS5
NC,S2* NC,S3*
DQ52
DQ53
VDDQ
VDD
NC,FETEN
DQ55
DQ54
DM6/DQS15
VDDQ
NC
DQ49
DQ48
CK2
CK2*
VSS
VSS
DQ50
DQS6
VDDQ
DQ51
VSS
DQ60
DQ61
DQ62
DM7/DQS16
SA0
SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSS
WP
SCL
VVDDSPD
VREF
TOP SIDE BOT SIDE
DQ4
DQ5
VSS
VDDQ
DM0/DQS9
DQ7
VSS
DQ6
NC
NC
VSS
DQ1
DQ0
DQS0
NC
NC
DQ3
DQ2
VDD
DM1/DQS10
DQ12
VDDQ
A13
DQ13
VDDQ
CKE1
DQ14
DQ15
VDD
VDDQ
VSS
DQS1
DQ9
DQ8
DQ11
DQ10
CK1*
CK1
VSS
A12
VSS
DQ20
BA2
DQ21
DM2/DQS11
DQ22
VDD
A11
A8
VDDQ
CKE0
DQS2
DQ17
DQ16
VDDQ
A7
A9
DQ18
VSS
A6
DQ28
DQ23
VSS
DQ29
VDDQ
DM3/DQS12
A3
DQ30
VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26
VDD
A2 DQ31
NC
VDDQ
NC
CK0
CKO*
NC
VSS
A10
NC
NC
NC
A1
VSS
VDD
VSS
NC
A0
NC
NC VDDQ
VSS
NC
DQ36
DQ37
VDD
DM4/DQS13
VSS
DQ39
DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0
VSS
DQ40 DQ44
DQ45
VDDQ
RAS*
S0*
S1*
DM5/DQS14
VSS
DQ46
DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDD
DQ43
DQ42
DQS5
NC,S2* NC,S3*
DQ52
DQ53
VDDQ
VDD
NC,FETEN
DQ55
DQ54
DM6/DQS15
VDDQ
NC
DQ49
DQ48
CK2
CK2*
VSS
VSS
DQ50
DQS6
VDDQ
DQ51
VSS
DQ60
DQ61
DQ62
DM7/DQS16
SA0
SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSS
WP
SCL
VVDDSPD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
FETEN
NC
FETEN
ADDR=1(A2/A3)
ADDR=0(A0/A1)
NC
NC
NC
SA2
NC
NC
NC
NC
NC
NC
NC
NC
NC
V
R
R
V
V
NC
NC
NC
NC
R’S ADJACENT TO V’S OR G’S
V’S ADJACENT TO G’S FORBIDDEN
SA2
SA1
SA0
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SA1
NC
NC
NC
NC
NC
NC
NC
NC
DIMMS
NC
NC
NC: VDD & VDDQ ARE THE SAME
PIN 82:
GND: VDD & VDDQ ARE DIFFERENT
NC
516-0086
0.1UF
402
CERM
10V
20%
2
1
C4001
402
CERM
10V
20%
0.1UF
2
1
C4004
0.1UF
20%
10V
CERM
402
2
1
C4005
402
CERM
10V
20%
0.1UF
2
1
C4009
0.1UF
20%
10V
CERM
402
2
1
C4010
402
CERM
10V
20%
0.1UF
2
1
C4011
402
CERM
10V
20%
0.1UF
2
1
C4012
0.1UF
402
CERM
10V
20%
2
1
C4013
0.1UF
402
10V
20%
CERM
2
1
C4014
0.1UF
20%
10V
402
CERM
2
1
C4015
0.1UF
20%
402
CERM
10V
2
1
C4016
0.1UF
20%
10V
CERM
402
2
1
C4017
402
CERM
10V
20%
0.1UF
2
1
C4018
402
CERM
10V
20%
0.1UF
2
1
C4019
402
CERM
10V
20%
0.1UF
2
1
C4021
10K
402
MF
1/16W
5%
2 1
R4006
402
CERM
10V
20%
0.1UF
2
1
C4023
0.1UF
402
CERM
10V
20%
2
1
C4024
402
CERM
10V
20%
0.1UF
2
1
C4025
0.1UF
402
20%
10V
CERM
2
1
C4026
CERM
0.1UF
402
20%
10V
2
1
C4029
402
CERM
10V
20%
0.1UF
2
1
C4030
0.1UF
402
CERM
10V
20%
2
1
C4032
402
CERM
10V
20%
0.1UF
2
1
C4033
150
1%
1/16W
MF
402
2
1
R4008
402
MF
1/16W
1%
150
2
1
R4010
1UF
10%
6.3V
CERM
603
2
1
C4035
402
CERM
10V
20%
0.1UF
2
1
C4037
0.1UF
402
20%
10V
CERM
2
1
C4038
CERM
10V
20%
0.1UF
402
2
1
C4039
0.1UF
402
CERM
10V
20%
2
1
C4040
20%
0.1UF
402
10V
CERM
2
1
C4041
0.1UF
402
CERM
10V
20%
2
1
C4042
402
CERM
10V
20%
0.1UF
2
1
C4043
0.1UF
402
CERM
10V
20%
2
1
C4044
402
CERM
10V
20%
0.1UF
2
1
C4045
0.1UF
402
CERM
10V
20%
2
1
C4046
0.1UF
20%
10V
CERM
402
2
1
C4047
402
CERM
10V
20%
0.1UF
2
1
C4048
402
CERM
10V
20%
0.1UF
2
1
C4049
402
CERM
10V
20%
0.1UF
2
1
C4050
5%
1/16W
MF
402
10K
2 1
R4014
402
20%
10V
CERM
0.1UF
2
1
C4031
402
CERM
10V
20%
0.1UF
2
1
C4028
402
CERM
10V
20%
0.1UF
2
1
C4022
20%
10V
CERM
402
0.1UF
2
1
C4000
20%
10V
CERM
402
0.1UF
2
1
C4020
402
CERM
10V
20%
0.1UF
2
1
C4027
402
CERM
10V
20%
0.1UF
2
1
C4051
402
CERM
10V
20%
0.1UF
2
1
C4052
402
CERM
10V
20%
0.1UF
2
1
C4002
402
CERM
10V
20%
0.1UF
2
1
C4003
CERM
1206
6.3V
10UF
20%
2
1
C4036
20%
10UF
6.3V
1206
CERM
2
1
C4008
20%
10UF
6.3V
1206
CERM
2
1
C4006
CERM
1206
6.3V
10UF
20%
2
1
C4007
DDR-DIMM-STD
F-28DEG-TH
OMIT
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
91
92
183
182
181
158
157
154
101
71
51
49
47
45
44
10
173
167
163
144
142
140
135
134
102
9
86
78
67
56
36
25
14
5
13
12
99
179
178
175
174
98
88
87
84
83
171
170
166
165
80
79
95
73
72
162
161
155
153
69
68
64
61
94
151
150
147
146
60
57
55
53
133
131
8
127
126
40
39
35
33
123
121
117
114
6
31
28
24
23
110
109
106
105
20
19
4
2
177
169
159
149
129
119
107
97
111
21
75
76
17
16
138
137
65
113
52
59
27
122
29
125
32
37
130
41
103
115
118
141
43
48
J4000
OMIT
F-28DEG-TH
DDR-DIMM-STD
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
91
92
183
182
181
158
157
154
101
71
51
49
47
45
44
10
173
167
163
144
142
140
135
134
102
9
86
78
67
56
36
25
14
5
13
12
99
179
178
175
174
98
88
87
84
83
171
170
166
165
80
79
95
73
72
162
161
155
153
69
68
64
61
94
151
150
147
146
60
57
55
53
133
131
8
127
126
40
39
35
33
123
121
117
114
6
31
28
24
23
110
109
106
105
20
19
4
2
177
169
159
149
129
119
107
97
111
21
75
76
17
16
138
137
65
113
52
59
27
122
29
125
32
37
130
41
103
115
118
141
43
48
J4001
516-0086
CRITICAL
17_INCH_LCD J4000,J4001
CONN,DDR DIMM 30 DEG
2
516-0087
CRITICAL
20_INCH_LCD
CONN,DDR DIMM REVERSE 30 DEG
2
J4000,J4001
I
40
103
051-6482
I2C_DIMM_SCL
I2C_DIMM_SDA
RAM_DQ<127>
RAM_DQ<126>
RAM_DQS<15>
RAM_DQ<125>
=PP2V5_PWRON_RAM
RAM_DQ<124>
=PP2V5_PWRON_RAM
SD_B_SA2
RAM_DQ<123>
RAM_DQ<122>
RAM_DQ<120>
RAM_DQ<121>
RAM_DQ<115>
RAM_DQ<118>
RAM_DQS<14>
RAM_CLK_E_N
RAM_CLK_E_P
RAM_DQ<114>
RAM_DQ<113>
RAM_DQ<110>
RAM_DQS<13>
RAM_DQ<107>
RAM_DQ<111>
RAM_CAS_L
RAM_WE_L
RAM_DQ<106>
RAM_BA<0>
RAM_DQ<102>
RAM_DQS<12>
RAM_DQ<101>
RAM_DQ<103>
RAM_BA<1>
RAM_DQ<98>
RAM_A<0>
RAM_A<1>
RAM_A<2>
RAM_DQ<116>
RAM_DQ<119>
RAM_DQ<117>
RAM_DQ<112>
RAM_DQ<108>
RAM_DQ<109>
RAM_CS_L<9>
RAM_CS_L<8>
RAM_DQ<105>
RAM_RAS_L
RAM_DQ<104>
RAM_DQ<100>
RAM_DQ<99>
RAM_DQ<97>
RAM_DQ<96>
RAM_A<10>
RAM_CLK_D_N
RAM_CLK_D_P
RAM_DQ<95>
RAM_DQ<88>
RAM_DQ<94>
RAM_DQS<11>
RAM_A<4>
RAM_DQ<89>
RAM_DQ<90>
RAM_DQ<87>
RAM_A<5>
RAM_A<7>
RAM_A<9>
RAM_DQ<82>
RAM_DQS<10>
RAM_DQ<80>
RAM_DQ<83>
RAM_CKE<4>
RAM_DQ<71>
RAM_DQ<70>
RAM_CLK_F_P
RAM_CLK_F_N
RAM_DQS<8>
RAM_DQ<67>
RAM_DQ<66>
RAM_DQ<77>
TP_J4001_SJRESET_L
RAM_DQ<73>
RAM_DQS<9>
RAM_DQ<79>
RAM_DQ<75>
RAM_DQ<92>
RAM_A<3>
RAM_DQ<91>
RAM_DQ<93>
RAM_DQ<84>
RAM_A<6>
RAM_DQ<85>
RAM_A<8>
RAM_A<11>
RAM_DQ<86>
RAM_A<12>
RAM_DQ<81>
RAM_DQ<68>
RAM_CKE<5>
RAM_DQ<69>
RAM_DQ<65>
RAM_DQ<64>
RAM_DQ<78>
RAM_DQ<76>
RAM_DQ<72>
RAM_DQ<74>
PP1V25_RAM_VREF_DIMM
I2C_DIMM_SCL
I2C_DIMM_SDA
RAM_DQ<53>
RAM_DQ<52>
RAM_DQS<6>
RAM_DQ<51>
=PP2V5_PWRON_RAM
RAM_DQ<50>
SD_A_SA0
RAM_DQ<55>
RAM_DQ<54>
RAM_DQ<49>
RAM_DQ<48>
RAM_DQ<47>
RAM_DQ<44>
RAM_DQS<5>
RAM_CLK_B_N
RAM_CLK_B_P
RAM_DQ<43>
RAM_DQ<41>
RAM_DQ<56>
RAM_DQS<7>
RAM_DQ<59>
RAM_DQ<57>
RAM_CAS_L
RAM_WE_L
RAM_DQ<61>
RAM_BA<0>
RAM_DQ<32>
RAM_DQS<4>
RAM_DQ<38>
RAM_DQ<37>
RAM_BA<1>
RAM_DQ<34>
RAM_A<0>
RAM_A<1>
RAM_A<2>
RAM_DQ<45>
RAM_DQ<46>
RAM_DQ<42>
RAM_DQ<40>
RAM_DQ<62>
RAM_DQ<58>
RAM_CS_L<1>
RAM_CS_L<0>
RAM_DQ<63>
RAM_RAS_L
RAM_DQ<60>
RAM_DQ<39>
RAM_DQ<36>
RAM_DQ<33>
RAM_DQ<35>
RAM_A<10>
RAM_CLK_C_N
RAM_CLK_C_P
RAM_DQ<30>
RAM_DQ<31>
RAM_DQ<28>
RAM_DQS<3>
RAM_A<4>
RAM_DQ<29>
RAM_DQ<27>
RAM_DQ<16>
RAM_A<5>
RAM_A<7>
RAM_A<9>
RAM_DQ<23>
RAM_DQS<2>
RAM_DQ<18>
RAM_DQ<19>
RAM_CKE<0>
RAM_DQ<6>
RAM_DQ<5>
RAM_CLK_A_P
RAM_CLK_A_N
RAM_DQS<0>
RAM_DQ<0>
RAM_DQ<2>
RAM_DQ<15>
TP_J4000_SJRESET_L
RAM_DQ<9>
RAM_DQS<1>
RAM_DQ<10>
RAM_DQ<14>
RAM_DQ<24>
RAM_A<3>
RAM_DQ<26>
RAM_DQ<25>
RAM_DQ<20>
RAM_A<6>
RAM_DQ<21>
RAM_A<8>
RAM_A<11>
RAM_DQ<22>
RAM_A<12>
RAM_DQ<17>
RAM_DQ<4>
RAM_DQ<3>
RAM_DQ<7>
RAM_DQ<12>
RAM_DQ<8>
RAM_DQ<13>
RAM_DQ<11>
PP1V25_RAM_VREF_DIMM
=PP2V5_PWRON_RAM =PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
PP1V25_RAM_VREF_DIMM
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
RAM_DQ<1>
=PP2V5_PWRON_RAM
RAM_CKE<1>
RAM_A<13>
RAM_A<13>
40 40
40
40 40
40 40
37 37
45
45
45
45
44
44
44
45
45
44
44
44
44
44
44
44
44
44
37
45
45
45
45
44
44
44
45
45
44
44
44
44
44
44
44
44
44
37 37
37 37
44
44
40
40
45
45
45
45
26
45
26
45
45
45
45
45
45
45
45
45
45
45
45
45
40
40
45
40
45
45
45
45
40
45
40
40
40
45
45
45
45
45
45
45
45
45
40
45
45
45
45
45
40
45
45
45
45
40
45
45
45
40
40
40
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
40
45
45
45
40
45
40
40
45
40
45
45
45
45
45
45
45
45
45
45
40
40
44
44
44
44
26
44
44
44
44
44
44
44
44
44
44
44
44
44
44
40
40
44
40
44
44
44
44
40
44
40
40
40
44
44
44
44
44
44
44
44
44
40
44
44
44
44
44
40
44
44
44
44
40
44
44
44
40
40
40
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
40
44
44
44
40
44
40
40
44
40
44
44
44
44
44
44
44
44
26 26
26
44
26
44
40
40
18
18
38
38
38
38
7
38
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
40
18
18
38
38
38
38
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
40
7 7
7
40
38
7
38
38
38
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PARALLEL TERM
RAM_VTT
82
SM1
1/16W
5%
6
3
RP4417
1/16W
SM1
82
RAM_VTT
5%
7
2
RP4428
1/16W
SM1
82
RAM_VTT
5%
8
1
RP4428
SM1
1/16W
82
RAM_VTT
5%
5
4
RP4413
SM1
1/16W
82
RAM_VTT
5%
6
3
RP4413
1/16W
SM1
82
RAM_VTT
5%
7
2
RP4413
SM1
1/16W
82
RAM_VTT
5%
8
1
RP4413
SM1
1/16W
82
RAM_VTT
5%
5
4
RP4412
SM1
82
RAM_VTT
1/16W
5%
6
3
RP4404
SM1
82
RAM_VTT
5%
1/16W
7
2
RP4404
SM1
82
RAM_VTT
1/16W
5%
8
1
RP4404
RAM_VTT
82
SM1
1/16W
5%
6
3
RP4408
RAM_VTT
82
SM1
5%
1/16W
7
2
RP4408
RAM_VTT
82
SM1
1/16W
5%
8
1
RP4408
SM1
1/16W
82
RAM_VTT
5%
6
3
RP4412
SM1
82
RAM_VTT
1/16W
5%
5
4
RP4421
SM1
1/16W
82
RAM_VTT
5%
7
2
RP4412
SM1
1/16W
82
RAM_VTT
5%
8
1
RP4412
SM1
82
RAM_VTT
5%
1/16W
6
3
RP4421
SM1
82
RAM_VTT
1/16W
5%
7
2
RP4421
SM1
82
RAM_VTT
1/16W
5%
8
1
RP4421
SM1
82
RAM_VTT
1/16W
5%
5
4
RP4420
SM1
82
RAM_VTT
5%
1/16W
6
3
RP4420
RAM_VTT
82
SM1
5%
1/16W
5
4
RP4417
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4400
402
10V
20%
CERM
RAM_VTT
0.1UF
2
1
C4401
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4402
402
CERM
10V
20%
RAM_VTT
0.1UF
2
1
C4403
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4404
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4405
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4406
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4407
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4408
402
CERM
10V
20%
0.1UF
2
1
C4409
402
0.1UF
20%
10V
CERM
2
1
C4411
402
RAM_VTT
MF
120
1/16W
5%
2
1
R4400
402
RAM_VTT
MF
120
5%
1/16W
2
1
R4401
402
RAM_VTT
MF
120
1/16W
5%
2
1
R4402
RAM_VTT
402
MF
120
5%
1/16W
2
1
R4403
RAM_VTT
MF
402
120
1/16W
5%
2
1
R4404
RAM_VTT
402
MF
120
5%
1/16W
2
1
R4405
RAM_VTT
MF
402
120
1/16W
5%
2
1
R4406
1/16W
5%
SM1
RAM_VTT
82
5
4
RP4425
402
MF
RAM_VTT
120
5%
1/16W
2
1
R4407
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4412
402
10V
20%
CERM
RAM_VTT
0.1UF
2
1
C4413
RAM_VTT
20%
10V
CERM
402
0.1UF
2
1
C4416
402
CERM
10V
20%
RAM_VTT
0.1UF
2
1
C4417
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4414
CERM
10V
20%
402
0.1UF
RAM_VTT
2
1
C4415
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4419
RAM_VTT
402
CERM
10V
0.1UF
20%
2
1
C4418
RAM_VTT
82
5%
1/16W
SM1
6
3
RP4425
0.1UF
20%
10V
CERM
402
2
1
C4421
0.1UF
20%
10V
402
RAM_VTT
CERM
2
1
C4420
RAM_VTT
82
SM1
5%
1/16W
7
2
RP4425
150
5%
SM1
1/16W
8
1
RP4438
SM1
1/16W
5%
150
7
2
RP4438
150
SM1
1/16W
5%
8
1
RP4439
SM1
1/16W
5%
150
6
3
RP4438
SM1
1/16W
5%
150
5
4
RP4438
1/16W
SM1
150
5%
7
2
RP4439
SM1
1/16W
150
5%
6
3
RP4439
5%
SM1
1/16W
150
5
4
RP4439
SM1
1/16W
5%
150
7
2
RP4437
150
SM1
5%
1/16W
5
4
RP4436
5%
150
SM1
1/16W
6
3
RP4436
150
5%
1/16W
SM1
7
2
RP4436
150
SM1
1/16W
5%
8
1
RP4436
1/16W
SM1
5%
150
5
4
RP4437
SM1
150
5%
1/16W
6
3
RP4437
SM1
150
5%
1/16W
8
1
RP4437
1/16W
5%
150
SM1
7
2
RP4442
402
CERM
10V
20%
0.1UF
2
1
C4422
0.1UF
20%
10V
CERM
402
2
1
C4410
5%
SM1
1/16W
150
5
4
RP4441
1/16W
SM1
150
5%
6
3
RP4441
RAM_VTT
82
SM1
5%
1/16W
7
2
RP4417
RAM_VTT
82
5%
1/16W
SM1
8
1
RP4425
SM1
150
5%
1/16W
5
4
RP4442
SM1
150
1/16W
5%
6
3
RP4442
1/16W
SM1
5%
150
7
2
RP4441
5%
1/16W
150
SM1
8
1
RP4441
150
SM1
1/16W
5%
8
1
RP4442
RAM_VTT
82
1/16W
5%
SM1
5
4
RP4424
5%
150
MF
1/16W
402
2
1
R4416
5%
150
MF
1/16W
402
2
1
R4417
RAM_VTT
82
5%
1/16W
SM1
6
3
RP4424
402
1/16W
MF
150
5%
2
1
R4421
402
1/16W
MF
150
5%
2
1
R4420
402
5%
1/16W
MF
120
2
1
R4408
402
150
5%
MF
1/16W
2
1
R4411
1/16W
MF
5%
150
402
2
1
R4415
5%
MF
1/16W
4.7K
402
2
1
R4412
1/16W
MF
5%
150
402
2
1
R4410
402
MF
1/16W
5%
120
2
1
R4409
402
4.7K
1/16W
MF
5%
2
1
R4413
402
150
5%
MF
1/16W
2
1
R4414
5%
SM1
1/16W
82
RAM_VTT
5
4
RP4429
1/16W
SM1
82
RAM_VTT
5%
6
3
RP4429
1/16W
SM1
82
RAM_VTT
5%
7
2
RP4429
1/16W
SM1
82
RAM_VTT
5%
8
1
RP4429
1/16W
SM1
82
RAM_VTT
5%
5
4
RP4428
1/16W
SM1
82
RAM_VTT
5%
6
3
RP4428
RAM_VTT
82
SM1
5%
1/16W
7
2
RP4416
RAM_VTT
82
SM1
1/16W
5%
8
1
RP4416
RAM_VTT
82
1/16W
5%
SM1
5
4
RP4401
RAM_VTT
82
5%
1/16W
SM1
6
3
RP4401
RAM_VTT
82
1/16W
5%
SM1
7
2
RP4401
RAM_VTT
82
5%
1/16W
SM1
8
1
RP4401
RAM_VTT
82
1/16W
5%
SM1
5
4
RP4400
RAM_VTT
82
5%
1/16W
SM1
6
3
RP4400
RAM_VTT
82
SM1
1/16W
5%
8
1
RP4417
RAM_VTT
82
5%
1/16W
SM1
7
2
RP4400
RAM_VTT
82
SM1
1/16W
5%
8
1
RP4400
SM1
82
RAM_VTT
1/16W
5%
7
2
RP4420
SM1
82
RAM_VTT
5%
1/16W
8
1
RP4420
RAM_VTT
82
SM1
5%
1/16W
5
4
RP4416
RAM_VTT
82
1/16W
5%
SM1
7
2
RP4424
RAM_VTT
82
5%
1/16W
SM1
8
1
RP4424
SM1
82
RAM_VTT
5%
1/16W
5
4
RP4405
SM1
82
RAM_VTT
1/16W
5%
6
3
RP4405
SM1
82
RAM_VTT
5%
1/16W
7
2
RP4405
SM1
82
RAM_VTT
5%
1/16W
8
1
RP4405
SM1
82
RAM_VTT
5%
1/16W
5
4
RP4404
RAM_VTT
82
SM1
1/16W
5%
6
3
RP4416
RAM_VTT
82
SM1
5%
1/16W
5
4
RP4409
RAM_VTT
82
SM1
1/16W
5%
6
3
RP4409
RAM_VTT
82
SM1
5%
1/16W
7
2
RP4409
RAM_VTT
82
SM1
1/16W
5%
8
1
RP4409
RAM_VTT
82
SM1
5%
1/16W
5
4
RP4408
051-6482
44
I
103
RAM_DQ<53>
RAM_DQ<55>
RAM_DQ<52>
RAM_DQ<49>
RAM_DQ<50>
RAM_DQ<48>
RAM_DQ<54>
PP1V25_RAM_VTT
RAM_DQ<51>
RAM_DQ<21>
RAM_DQ<16>
RAM_DQ<20>
RAM_DQ<17>
RAM_DQ<23>
PP1V25_RAM_VTT
RAM_DQ<19>
RAM_DQ<22>
RAM_DQ<18>
RAM_DQ<38>
RAM_DQ<36>
RAM_DQ<32>
RAM_DQ<34>
RAM_DQ<39>
RAM_DQ<35>
RAM_DQ<37>
PP1V25_RAM_VTT
RAM_DQ<33>
RAM_DQ<6>
RAM_DQ<1>
RAM_DQ<5>
RAM_DQ<2>
RAM_DQ<4>
RAM_DQ<3>
RAM_DQ<0>
RAM_DQ<7>
PP1V25_RAM_VTT
RAM_DQ<13>
RAM_DQS<7>
PP1V25_RAM_VTT
=PP2V5_RUN_RAM
RAM_A<5>
RAM_A<7>
RAM_DQ<41>
RAM_CS_L<0>
RAM_CKE<1>
PP1V25_RAM_VTT
=PP2V5_RUN_RAM
RAM_CKE<0>
RAM_CS_L<1>
RAM_A<2>
RAM_DQS<5>
PP1V25_RAM_VTT
RAM_A<1>
RAM_A<3>
RAM_A<4>
RAM_A<0>
RAM_A<6>
RP4441_NC
RAM_A<8>
RAM_A<9>
RAM_A<11>
RAM_A<12>
RAM_A<13>
PP1V25_RAM_VTT
RAM_DQ<57>
RAM_DQ<63>
RAM_DQ<60>
RAM_DQS<6>
RAM_DQ<26>
RAM_DQ<27>
RAM_DQ<43>
RAM_DQS<2>
RAM_DQS<3>
RAM_DQS<4>
RAM_DQ<42>
RAM_DQ<44>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<8>
RAM_DQ<15>
RAM_DQ<31>
RAM_DQ<29>
RAM_DQS<1>
RAM_DQS<0>
RAM_DQ<56>
RAM_DQ<62>
RAM_DQ<58>
RAM_DQ<9>
RAM_DQ<14>
RAM_DQ<25>
RAM_DQ<24>
RAM_DQ<10>
RAM_DQ<30>
RAM_DQ<28>
RAM_DQ<61>
RAM_DQ<59>
RAM_DQ<12>
RAM_DQ<11> RAM_DQ<40>
RAM_DQ<45>
=PP2V5_RUN_RAM
RAM_DQ<46>
RAM_DQ<47>
46 46
46 46
46
46
46
46
46
46 46
46
46
45 45
45 45
45
45
45
45
45
45 45
45
45
40
40
40
40
40
40
40
44
40
40
40
40
40
40
44
40
40
40
40
40
40
40
40
40
40
44
40
40
40
40
40
40
40
40
40
44
40
40
44
44
40
40
40
40
40
44
44
40
40
40
40
44
40
40
40
40
40
40
40
40
40
40
44
40
40
40
40
40
40
40
40
40
40
40
40
44
44
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40 40
40
44
40
40
38
38
38
38
38
38
38
7
38
38
38
38
38
38
7
38
38
38
38
38
38
38
38
38
38
7
38
38
38
38
38
38
38
38
38
7
38
38
7
7
38
38
38
38
38
7
7
38
38
38
38
7
38
38
38
38
38
38
38
38
38
38
7
38
38
38
38
38
38
38
38
38
38
38
38
7
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38 38
38
7
38
38
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PARALLEL TERM
RAM_VTT
82
1/16W
5%
SM1
5
4
RP4517
SM1
1/16W
82
RAM_VTT
5%
6
3
RP4528
SM1
1/16W
82
RAM_VTT
5%
7
2
RP4528
SM1
1/16W
82
RAM_VTT
5%
8
1
RP4528
SM1
82
RAM_VTT
1/16W
5%
5
4
RP4513
SM1
82
RAM_VTT
5%
1/16W
6
3
RP4513
SM1
82
RAM_VTT
1/16W
5%
7
2
RP4513
SM1
82
RAM_VTT
5%
1/16W
8
1
RP4513
SM1
82
RAM_VTT
1/16W
5%
5
4
RP4512
82
RAM_VTT
SM1
5%
1/16W
5
4
RP4521
82
RAM_VTT
5%
1/16W
SM1
6
3
RP4504
82
RAM_VTT
1/16W
5%
SM1
7
2
RP4504
82
RAM_VTT
5%
1/16W
SM1
8
1
RP4504
82
RAM_VTT
5%
1/16W
SM1
6
3
RP4521
82
RAM_VTT
5%
1/16W
SM1
6
3
RP4508
82
RAM_VTT
1/16W
5%
SM1
7
2
RP4508
82
5%
1/16W
SM1
8
1
RP4508
SM1
82
RAM_VTT
5%
1/16W
6
3
RP4512
SM1
82
RAM_VTT
1/16W
5%
7
2
RP4512
82
RAM_VTT
SM1
5%
1/16W
7
2
RP4521
SM1
82
RAM_VTT
5%
1/16W
8
1
RP4512
82
RAM_VTT
SM1
1/16W
5%
8
1
RP4521
82
RAM_VTT
SM1
5%
1/16W
5
4
RP4520
RAM_VTT
402
10V
20%
CERM
0.1UF
2
1
C4500
20%
10V
402
RAM_VTT
0.1UF
CERM
2
1
C4501
402
10V
20%
CERM
0.1UF
RAM_VTT
2
1
C4502
CERM
402
20%
10V
0.1UF
RAM_VTT
2
1
C4503
RAM_VTT
0.1UF
20%
10V
CERM
402
2
1
C4504
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4505
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4506
0.1UF
20%
10V
CERM
402
RAM_VTT
2
1
C4507
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4508
RAM_VTT
82
5%
1/16W
SM1
6
3
RP4517
RAM_VTT
402
120
5%
1/16W
MF
2
1
R4500
RAM_VTT
402
120
1/16W
5%
MF
2
1
R4501
RAM_VTT
402
120
5%
1/16W
MF
2
1
R4502
RAM_VTT
402
120
1/16W
5%
MF
2
1
R4503
RAM_VTT
402
120
5%
1/16W
MF
2
1
R4504
RAM_VTT
402
120
1/16W
5%
MF
2
1
R4505
RAM_VTT
402
120
5%
1/16W
MF
2
1
R4506
RAM_VTT
MF
1/16W
5%
402
120
2
1
R4507
RAM_VTT
CERM
0.1UF
402
10V
20%
2
1
C4510
82
RAM_VTT
SM1
5%
1/16W
5
4
RP4525
20%
10V
402
CERM
0.1UF
RAM_VTT
2
1
C4511
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4514
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4515
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4512
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4513
RAM_VTT
CERM
10V
20%
0.1UF
402
2
1
C4516
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4517
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4518
82
RAM_VTT
SM1
1/16W
5%
6
3
RP4525
82
RAM_VTT
SM1
5%
1/16W
7
2
RP4525
402
CERM
10V
20%
0.1UF
2
1
C4519
402
CERM
10V
20%
0.1UF
2
1
C4509
SM1
150
5%
1/16W
7
2
RP4530
SM1
150
1/16W
5%
8
1
RP4530
1/16W
5%
150
SM1
6
3
RP4530
SM1
150
5%
1/16W
7
2
RP4531
5%
1/16W
150
SM1
5
4
RP4530
SM1
150
1/16W
5%
8
1
RP4531
5%
1/16W
150
SM1
5
4
RP4531
SM1
5%
1/16W
150
8
1
RP4532
SM1
150
1/16W
5%
5
4
RP4532
SM1
5%
1/16W
150
8
1
RP4533
1/16W
5%
150
SM1
6
3
RP4531
SM1
1/16W
5%
150
7
2
RP4532
SM1
150
5%
1/16W
6
3
RP4532
SM1
1/16W
5%
150
7
2
RP4533
82
RAM_VTT
SM1
1/16W
5%
8
1
RP4525
150
5%
1/16W
SM1
6
3
RP4533
SM1
150
1/16W
5%
5
4
RP4533
402
5%
1/16W
MF
RAM_VTT
120
2
1
R4508
RAM_VTT
MF
1/16W
5%
402
120
2
1
R4509
MF
1/16W
5%
4.7K
402
2
1
R4510
402
4.7K
5%
1/16W
MF
2
1
R4511
82
RAM_VTT
SM1
5%
1/16W
5
4
RP4524
RAM_VTT
82
1/16W
5%
SM1
7
2
RP4517
SM1
1/16W
82
RAM_VTT
5%
5
4
RP4529
SM1
1/16W
82
RAM_VTT
5%
6
3
RP4529
SM1
1/16W
82
RAM_VTT
5%
7
2
RP4529
SM1
1/16W
82
RAM_VTT
5%
8
1
RP4529
SM1
1/16W
82
RAM_VTT
5%
5
4
RP4528
RAM_VTT
82
1/16W
SM1
5%
6
3
RP4516
RAM_VTT
82
1/16W
5%
SM1
7
2
RP4516
RAM_VTT
82
1/16W
SM1
5%
8
1
RP4516
RAM_VTT
82
SM1
5%
1/16W
5
4
RP4501
RAM_VTT
82
1/16W
SM1
5%
6
3
RP4501
RAM_VTT
82
SM1
5%
1/16W
7
2
RP4501
RAM_VTT
82
SM1
1/16W
5%
8
1
RP4501
RAM_VTT
82
SM1
5%
1/16W
5
4
RP4500
RAM_VTT
82
SM1
1/16W
5%
6
3
RP4500
RAM_VTT
82
SM1
5%
1/16W
7
2
RP4500
RAM_VTT
82
SM1
5%
1/16W
8
1
RP4500
82
RAM_VTT
SM1
1/16W
5%
6
3
RP4520
82
RAM_VTT
SM1
5%
1/16W
7
2
RP4520
82
RAM_VTT
SM1
1/16W
5%
8
1
RP4520
82
RAM_VTT
SM1
1/16W
5%
6
3
RP4524
82
RAM_VTT
SM1
5%
1/16W
7
2
RP4524
RAM_VTT
82
5%
1/16W
SM1
8
1
RP4517
82
RAM_VTT
SM1
1/16W
5%
8
1
RP4524
82
RAM_VTT
1/16W
5%
SM1
5
4
RP4505
82
RAM_VTT
5%
1/16W
SM1
6
3
RP4505
82
RAM_VTT
1/16W
5%
SM1
7
2
RP4505
82
RAM_VTT
5%
1/16W
SM1
8
1
RP4505
82
RAM_VTT
1/16W
5%
SM1
5
4
RP4504
82
RAM_VTT
1/16W
5%
SM1
5
4
RP4509
RAM_VTT
82
1/16W
5%
SM1
5
4
RP4516
82
RAM_VTT
5%
1/16W
SM1
6
3
RP4509
82
RAM_VTT
1/16W
5%
SM1
7
2
RP4509
82
RAM_VTT
5%
1/16W
SM1
8
1
RP4509
82
RAM_VTT
1/16W
5%
SM1
5
4
RP4508
051-6482
I
45
103
RAM_DQ<100>
RAM_DQ<99>
RAM_DQ<101>
RAM_DQ<102>
RAM_DQ<98>
RAM_DQ<103>
RAM_DQ<96>
RAM_DQ<97>
PP1V25_RAM_VTT
RAM_DQ<107>
RAM_DQ<110>
RAM_DQ<108>
PP1V25_RAM_VTT
RAM_DQ<116>
RAM_DQ<109>
RAM_DQ<104>
RAM_DQ<106>
RAM_DQ<111>
RAM_DQ<105>
RAM_DQ<118>
RAM_DQ<114>
RAM_DQ<113>
RAM_DQ<112>
RAM_DQ<117>
RAM_DQ<119>
RAM_DQ<115>
PP1V25_RAM_VTT
RAM_DQ<71>
RAM_DQ<68>
RAM_DQ<69>
RAM_DQ<70>
RAM_DQ<66>
RAM_DQ<65>
RAM_DQ<64>
RAM_DQ<67>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<76>
RAM_DQ<73>
RAM_DQ<78>
RAM_DQ<77>
RAM_DQ<75>
RAM_DQ<80>
RAM_DQ<83>
RAM_DQ<86>
RAM_DQ<82>
RAM_DQ<81>
PP1V25_RAM_VTT
RAM_DQ<79>
RAM_DQ<74>
RAM_DQ<72>
RAM_DQ<85>
RAM_DQ<84>
RAM_DQ<87>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
=PP2V5_RUN_RAM
RAM_RAS_L
RAM_BA<1>
RAM_A<10>
RAM_CS_L<8>
RAM_CS_L<9>
RAM_WE_L
RAM_CAS_L
RAM_BA<0>
RAM_DQ<120>
RAM_DQ<121>
RAM_DQ<124>
RAM_DQ<126>
RAM_DQ<125>
RAM_DQ<127>
RAM_DQ<122>
RAM_DQ<123>
RAM_DQ<93>
RAM_DQ<88>
RAM_DQ<89>
RAM_DQ<91>
RAM_DQ<90>
RAM_DQ<95>
RAM_DQ<94>
RAM_DQ<92>
RAM_DQS<10>
RAM_DQS<9>
RAM_DQS<8>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQS<12>
RAM_DQS<11>
RAM_DQS<13>
RAM_DQS<15>
RAM_DQS<14>
RAM_CKE<4>
RAM_CKE<5>
46
46
46
46
46
46
46
46
46
46
45
45
45
45
45
45
45
45
46
45
45
40
40
40
40
40
40
40
40
44
40
40
40
44
40
40
40
40
40
40
40
40
40
40
40
40
40
44
40
40
40
40
40
40
40
40
44
44
40
40
40
40
40
40
40
40
40
40
44
40
40
40
40
40
40
44
44
44
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
44
44
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
7
38
38
38
7
38
38
38
38
38
38
38
38
38
38
38
38
38
7
38
38
38
38
38
38
38
38
7
7
38
38
38
38
38
38
38
38
38
38
7
38
38
38
38
38
38
7
7
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
7
38
38
38
38
38
38
38
VSS VSS
SHTDWN
VTT
REFOUT
VDD
G
D
S
DGS
D
G
S
DRVL
DRVH
VCC
GND
FB
REF
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
353S0880
SEMTECH
353S0603
PHILIPS
MEM TERM VREGS
NOTE: U4700 PIN 4 IS LOW ACTIVE.
PLACE 10UF CAPS NEAR DIMMS
ONLY STUFF ONE VTT VREG
NOSTUFF
5%
1/16W
MF
402
10K
2
1
R4603
NOSTUFF
0.1UF
603
16V
10%
X7R
2
1
C4601
NE57811
SPAK-5
RAM_VTT
1
6
3
2
4
5
U4600
603
10%
X7R
16V
0.1UF
RAM_VTT
2
1
C4606
NOSTUFF
SM
2N7002
2
1
3
Q4600
7343
220UF
20%
2V
TANT
2
1
C4609
NOSTUFF
402
0
5%
1/16W
MF
2 1
R4610
1206
6.3V
20%
10UF
CERM
2
1
C4600
1206
6.3V
20%
10UF
CERM
2
1
C4602
VTT_ALT
CASE369
NTD70N03R
3
1
4
Q4651
CERM
10UF
20%
6.3V
1206
2
1
C4608
CASE369
VTT_ALT
NTD70N03R
3
1
4
Q4652
5%
1/16W
MF
402
1K
VTT_ALT
2 1
R4674
VTT_ALT
402
MF
1/16W
5%
1K
2 1
R4673
10%
25V
CERM
402
VTT_ALT
0.0047UF
2
1
C4653
0.0047UF
10%
25V
402
VTT_ALT
CERM
2
1
C4652
SC1116
VTT_ALT
SOT23-6L
1
3
2
54
6
U4650
.5%
603
1/16W
1K
FF
VTT_ALT
2 1
R4671
1/16W
FF
.5%
603
1K
VTT_ALT
2 1
R4672
6.3V
20%
CERM
1206
22uF
VTT_ALT
2
1
C4655
VTT_ALT
0.1UF
20%
10V
CERM
402
2
1
C4650
402
10V
0.1UF
20%
CERM
VTT_ALT
2
1
C4651
6.3V
CERM
10UF
RAM_VTT
805
20%
2
1
C4610
103
46
I
051-6482
=PP2V5_RUN_RAM
=PP5V_RUN_RAM
U4650_3
MIN_NECK_WIDTH=10MIL
U4650_6
MIN_LINE_WIDTH=25MIL
R4673_1
=PP2V5_RUN_RAM
U4700_REFOUT
SYS_SLEEP
TURN_ON_VTT
VR4700_SHTDWN
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
U4650_4
VOLTAGE=1.25V
PP1V25_RAM_VTT
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
R4674_1
50 11
46
46
10
45
45
9
45
44
44
8
44
7
7
7
6
3
7
G
D
S
AGP
REFCLK_AVDD
VDD_AGP
AGP_CBE2
AGP_AD_STBS0
AGP_AD_STBF0
AGP_DBI_LO
AGP_CBE1
AGP_CBE0
AGP_SB_STBS
AGP_SB_STBF
AGP_AD_STBS1
AGP_AD_STBF1
AGP_DBI_HI
AGP_CBE3
AGP_STOP
AGP_REQ
AGP_DEVSEL
AGP_FRAME
AGP_GNT
AGP_IRDY
AGP_TRDY
AGP_PAR
AGP_ST0
AGP_ST1
AGP_ST2
AGP_RBF
AGP_WBF
AGP_GC_AGP8X_DET
AGP_TYPEDET
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD9
AGP_AD8
AGP_AD15
AGP_AD16
AGP_AD12
AGP_AD11
AGP_AD10
AGP_AD13
AGP_AD14
AGP_AD21
AGP_AD20
AGP_AD19
AGP_AD18
AGP_AD17
AGP_AD26
AGP_AD25
AGP_AD24
AGP_AD23
AGP_AD22
AGP_AD27
AGP_SBA2
AGP_SBA3
AGP_AD31
AGP_AD30
AGP_AD29
AGP_AD28
AGP_SBA1
AGP_SBA0
AGP_SBA4
AGP_STP_AGP*
AGP_BUSY*
AGP_REFCLK
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_VREFCG
AGP_PVTREF2
AGP_PVTREF1
AGP_VREFGC
AGP_MB_AGP8X_DET
AGP_REFCLK_AVSS
(SYM 4 OF 7)
AGP
INTERFACE
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LAST MODIFIED: APR 12, 04
U3LITE AGP
DBI_HI IS NOT A STROBE BUT SHARES THE SAME TOPOLOGY AS A STROBE
PVTREF RESISTOR
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL_PAIR
DBIHI AND DBILO
GROUPS WITH STROBE1
FOR CONSTRAINTS
LEVEL SHIFTER FOR U3LITE
AGP BUSY AND STOP ARE NOT USED IN ALL DESIGNS
MASTER: GILA
402
0.1UF
20%
10V
CERM
2
1
C4808
AGP_BUSYSTOP
10K
5%
1/16W
MF
402
2
1
R4811
MF
5%
10K
402
1/16W
2
1
R4812
AGP_BUSYSTOP
402
MF
1/16W
10K
5%
2
1
R4808
1/16W
5%
10K
402
MF
2
1
R4810
AGP_BUSYSTOP
SM
2N3904
2
3
1
Q4802
AGP_BUSYSTOP
SM
2N7002
2
1
3
Q4803
402
1/16W
5%
10K
MF
2
1
R4809
CERM
10V
20%
0.1UF
402
2
1
C4807
AGP_BUSYSTOP
1K
1/16W
MF
402
5%
2 1
R4813
10K
5%
1/16W
MF
402
2
1
R4807
402
0.1UF
20%
10V
CERM
2
1
C4806
CERM
10V
20%
0.1UF
402
2
1
C4805
402
0.1UF
20%
10V
CERM
2
1
C4804
CERM
10V
20%
0.1UF
402
2
1
C4803
402
0.1UF
20%
10V
CERM
2
1
C4802
CERM
10V
20%
0.1UF
402
2
1
C4801
0.1UF
CERM
402
20%
10V
2
1
C4800
MF
1/16W
2.2
5%
603
2 1
R4800
CERM
1UF
10%
6.3V
402
2
1
C4811
20%
CERM
0.1UF
10V
402
2
1
C4816
402
1%
182
MF
1/16W
2 1
R4801
CERM
20%
0.1UF
402
10V
2
1
C4812
10V
402
0.1UF
20%
CERM
2
1
C4813
10V
402
0.1UF
20%
CERM
2
1
C4814
10V
402
0.1UF
20%
CERM
2
1
C4815
CERM
16V
20%
402
0.01UF
2
1
C4817
I46
I48
I49
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
OMIT
U3LITE
PBGA
V1.0-300MM
W10
W6
W2
Y11
AB4
AC10
AE7
AE2V9AG10
AG4
AD6
AA9
AC5
AC9
AH5
AD4
AH4
AB1
AC1
AC4
AE1
AD1
AF1
AG1
AF2
AD2
AG3
AH1
AF3
AG2
AB9
AE5
AE6
AH2
AC6
AF5
AG5
AH7
AA8
AG6
AC3
AB8
AH6
AF6
AA6
AA4
AA5
Y8
AF8
AG8
AC8
AA2
AD8
AA3
AE8
AH9
AH8
AF11
AE11
AD11
AC11
AA7
W1
AH12
V7
V8
V3
V4
V6
V5
Y7
Y1
Y2
AA1
AG11
Y5
Y6
Y3
Y4
AD9
AE9
AF9
AG9
AH11
AH10
AA11
AB11
U3
10V
402
0.1UF
20%
CERM
2
1
C4810
AGP_BUSYSTOP
2N7002DW
SOT-363
4
5
3
Q4801
AGP_BUSYSTOP
2N7002DW
SOT-363
1
2
6
Q4801
051-6482
103
48
I
AGP_DATA
AGP_AD<15..0>
AGP_AD_0
AGP_STROBE
AGP_AD_STBS<1>
AGP_AD_STB1
AGP_AD_STB_1
AGP_AD_STB1
AGP_STROBE
AGP_AD_STBF<1>
AGP_AD_STB_1
AGP_SB_STBS
AGP_SB_STB AGP_STROBE
AGP_SB_STBS
STOP_AGP_L_R
NB_STOP_AGP_L
STOP_AGP_L_F
STOP_AGP_L
AGP_BUSY_L
AGP_BUSY_L_F
=PP3V3_AGP
NB_AGP_BUSY_L
=PP1V5_AGP
AGP_AD<4>
AGP_FRAME
AGP_TYPEDET_L
NB_AGP_GCDET_L
AGP_GNT
AGP_STOP
AGP_ST<0>
AGP_ST<1>
AGP_AD<26>
AGP_AD<22>
AGP_AD<20>
AGP_AD<15>
AGP_AD<14>
AGP_AD<12>
AGP_AD<10>
AGP_AD<9>
AGP_AD<8>
AGP_AD<6>
AGP_AD<5>
AGP_AD_STB0
AGP_AD_STBS<0>
AGP_STROBE
AGP_AD_STB_0
AGP_AD<25>
AGP_AD<30>
NB_STOP_AGP_L
AGP_CLK66M_NB
AGP_SBA_L<6>
AGP_SBA_L<4>
AGP_PAR
AGP_REQ
AGP_AD<13>
AGP_TRDY
AGP_DEVSEL
AGP_RBF
AGP_ST<2>
AGP_AD<1>
AGP_WBF
AGP_AD<17>
AGP_SB_STBS
AGP_SB_STBF
AGP_AD<27>
AGP_AD<28>
AGP_DBI_LO
AGP_AD_STBF<0>
AGP_AD_STBS<0>
AGP_CBE<2>
AGP_CBE<3>
AGP_AD_STBS<1>
AGP_SBA_L<2>
NB_AGP_BUSY_L
AGP_SBA_L<1>
AGP_AD<11>
AGP_AD<31..16>
AGP_DATA AGP_AD_1
AGP_CBE<1..0>
AGP_DATA AGP_AD_0
AGP_SB_STBF
AGP_SB_STB AGP_STROBE
AGP_SB_STBS
AGP_CBE<3..2>
AGP_DATA AGP_AD_1
AGP_AD<16>
AGP_AD<18>
AGP_AD<19>
AGP_AD<0>
AGP_SBA_L<3>
AGP_AD<31>
AGP_AD<29>
AGP_AD<7>
AGP_AD<3>
AGP_AD<2>
AGP_AD<21>
AGP_AD<23>
AGP_AD<24>
TP_AGP_MB_AGP8X_DET_L
AGP_VREF_GC
AGP_DBI_HI
AGP_CBE<1>
AGP_CBE<0>
AGP_PVTREF1
AGP_PVTREF2
AGP_SBA_L<0>
AGP_AD_STBF<1>
TP_VREF_CG
AGP_IRDY
AGP_SBA_L<7>
AGP_SBA_L<5>
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PP1V5_PWRON_AGP_NB_AVDD
VOLTAGE=1.5V
AGP_SBA_L<7..0>
AGP_DATA
AGP_SBA
AGP_AD_STBF<0>
AGP_AD_STB0
AGP_STROBE
AGP_AD_STB_0
AGP_AD_1
AGP_DBI_HI
AGP_DATA
AGP_DBI_LO
AGP_DATA AGP_AD_1
=PP1V5_PWRON_NB_AVDD
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
59
59
59
58
58
58
57
57
57
56
56
56
52
52
52
51
51
51
50
60
50
50
49
49
37
49
49
49
49
49
49
49
49
49
48
48
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
28
48
48
48
48
48
48
48
48
48
48
49
49
7
48
7
48
49
49
49
49
49
49
49
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
27
48
48
49
49
48
49
49
49
49
48
49
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
6
49
48
48
48
48
48
6
49
48
48
48
48
48
48
7
7
7
7
7
7
TRST*
TDO
TDI
TMS
TCLK
AGPCALPU
AGP 2X,4X : AGP 8X
PCIC0/BE0* : C0*/BE0
PCIC1/BE1* : C1*/BE1
PCIC2/BE2* : C2*/BE2
PCIC3/BE3* : C3*/BE3
PCIRST* : RST*
PCICLK : CLK
AGPVDDQ
VD50CLAMP0
VD50CLAMP1
50 OHM
TO VDDQ
50 OHM
10K OHM
TO GND
TESTMODE
AGPVREF : AGPVREF
AGPSTOP* : STOP*
AGPBUSY* : BUSY*
AGPST2 : ST2
AGPST1 : ST1
AGPST0 : ST0
PCIINTA* : INTA
PCITRDY* : TRDY
PCIPAR : PAR
PCISTOP* : STOP
PCIDEVSEL* : DEVSEL
PCIIRDY* : IRDY
PCIFRAME* : FRAME
PCIGNT* : GNT
PCIREQ* : REQ
PCIAD1
PCIAD2
PCIAD3
PCIAD4
PCIAD5
PCIAD0
PCIAD6
PCIAD7
PCIAD8
PCIAD12
PCIAD11
PCIAD10
PCIAD9
PCIAD16
PCIAD17
PCIAD18
PCIAD13
PCIAD14
PCIAD15
PCIAD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD28
PCIAD27
PCIAD24
PCIAD25
PCIAD26
PCIAD31
PCIAD30
PCIAD29
(1 OF 5)
AGPRBF* : RBF
AGPWBF* : WBF
<RESRVD> : DBI_LO
AGPSBA7 : SBA7*
AGPSBA6 : SBA6*
AGPSBA5 : SBA5*
AGPSBA0 : SBA0*
AGPSBA1 : SBA1*
AGPSBA2 : SBA2*
AGPSBA3 : SBA3*
AGPSBA4 : SBA4*
<RESRVD> : MBDET*
TO GND
AGPPIPE* : DBI_HI
NC_PCIINTB*: INTB
AGPADSTBF1 : ADSTBF1
AGPSBSTBF : SBSTBF
AGPSBSTBS* : SBSTBS
AGPADSTBF0 : ADSTBF0
AGPADSTBS0* : ADSTBS0
AGPADSTBS1* : ADSTBS1
NC
VDD
VDD33
AGPCALPD
AGP_PLLVDD
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
U3LITE AGP I/O REFERENCE
(PLACE CLOSE TO GPU AGP BALL)
BOUNDRY SCAN AVAILABLE ONLY ON NV3X SERIES
CORE BYPASS
OUTPUT DRIVER BYPASS
NVIDIA RECOMMENDS A WIDER RANGE OF CAP VALUES, EMC LIKES ONE VALUE
DOES HOOP UP AGP_BUSY_L &
(HIGH = AGP V2.X)
(LOW = AGP V3.X)
AGP VERSION SELECT
STOP_AGP_L TO 3.3V OR 1.5V?
(PLACE CLOSE TO U3LITE AGP BALLS)
GPU AGP I/O REFERENCE
NVIDIA AGP
FROM Q27 PAGE 24
I/O BYPASS
402
1/16W
MF
1%
49.9
2
1
R4900
MF
402
1/16W
5%
10K
2
1
R4901
402
MF
1/16W
1%
49.9
2
1
R4902
10UF
CERM
6.3V
20%
805
2
1
C4900
10UF
20%
6.3V
CERM
805
2
1
C4901
805
6.3V
10UF
20%
CERM
2
1
C4902
10UF
CERM
6.3V
20%
805
2
1
C4903
20%
10V
CERM
402
0.1UF
2
1
C4904
20%
10V
CERM
402
0.1UF
2
1
C4905
0.1UF
20%
10V
CERM
402
2
1
C4906
20%
10V
CERM
402
0.1UF
2
1
C4907
20%
10V
CERM
402
0.1UF
2
1
C4908
20%
10V
0.1UF
CERM
402
2
1
C4909
20%
10V
CERM
402
0.1UF
2
1
C4910
16V
CERM
402
10%
0.01UF
2
1
C4911
16V
CERM
402
10%
0.01UF
2
1
C4912
20%
10V
CERM
402
0.1UF
2
1
C4913
CERM
16V
402
10%
0.01UF
2
1
C4914
402
10%
16V
0.01UF
CERM
2
1
C4915
20%
402
10V
CERM
0.1UF
2
1
C4916
20%
10V
CERM
0.1UF
402
2
1
C4917
10V
20%
CERM
402
0.1UF
2
1
C4918
0.1UF
20%
10V
CERM
402
2
1
C4919
20%
10V
CERM
402
0.1UF
2
1
C4920
20%
10V
CERM
402
0.1UF
2
1
C4921
10V
CERM
402
0.1UF
20%
2
1
C4922
20%
10V
CERM
402
0.1UF
2
1
C4923
20%
10V
CERM
402
0.1UF
2
1
C4924
10%
402
CERM
0.01UF
16V
2
1
C4925
10%
402
CERM
16V
0.01UF
2
1
C4926
0.1UF
402
CERM
10V
20%
2
1
C4927
0.1UF
402
CERM
20%
10V
2
1
C4928
0.1UF
402
CERM
10V
20%
2
1
C4929
20%
10V
CERM
402
0.1UF
2
1
C4930
CERM
20%
10V
402
0.1UF
2
1
C4931
20%
10V
CERM
402
0.1UF
2
1
C4932
10V
CERM
0.1UF
20%
402
2
1
C4933
0.1UF
10V
20%
CERM
402
2
1
C4934
0.1UF
402
CERM
10V
20%
2
1
C4935
16V
10%
402
CERM
0.01UF
2
1
C4936
0.1UF
20%
402
CERM
10V
2
1
C4937
0.1UF
402
20%
10V
CERM
2
1
C4938
0.1UF
402
CERM
10V
20%
2
1
C4939
0.1UF
20%
10V
402
CERM
2
1
C4941
16V
402
CERM
10%
0.01UF
2
1
C4942
805
CERM
20%
6.3V
10UF
2
1
C4943
0.01UF
16V
CERM
402
10%
2
1
C4944
16V
10%
402
CERM
0.01UF
2
1
C4945
20%
10V
CERM
402
0.1UF
2
1
C4946
20%
402
CERM
10V
0.1UF
2
1
C4947
402
CERM
10V
20%
0.1UF
2
1
C4949
402
10V
20%
0.1UF
CERM
2
1
C4950
0.1UF
402
CERM
10V
20%
2
1
C4951
0.1UF
402
CERM
10V
20%
2
1
C4952
0.1UF
402
CERM
20%
10V
2
1
C4953
402
CERM
20%
10V
0.1UF
2
1
C4954
50V
CERM
10%
402
0.001UF
NV34
2
1
C4955
20%
10V
CERM
402
0.1UF
NV34
2
1
C4956
1K
2 1
R4904
1K
2 1
R4905
BGA
NV18B
OMIT
V20
U20
P20
N20
Y13
L13
AD22
AD19
AD16
H7
AD15
U6
G14
U7
P24
AD12
AC7
AC6
H6
Y20
Y18
L18
L20
Y17
L17
Y14
L14
Y11
V11
U11
P11
N11
L11
AA18
AA17
AE9
N4
D2
C1
AE5
E2
D1
C2
AJ17
AH17
AF15
AF13
AK18
AG16
AG15
AE15
AK16
AJ16
AG12
AG22
AF25
AH19
AJ24
AJ23
AH23
AH25
AJ26
AH26
AJ27
AE18
AG18
AK27
AF18
AE19
AF19
AG19
AG20
AE21
AF22
AE22
AG23
AF24
AH27
AG24
AG25
AE24
AG26
AJ20
AH20
AK21
AJ21
AJ22
AH22
AK28
AJ28
AE10
T7
R7
G6
AK30
A1
AE12
AG17
AK29
AD20
AD23
AD14
AD11
AE23
AE20
AE17
AE11
AD17
AE14
AG11
AE13
AE16
AG13
AJ13
AK13
AH15
AJ15
AH14
AJ14
AH12
AJ12
AH11
AJ11
AG14
AJ18
AF16
AJ19
AA14
AA13
AF12
AF21
AJ25
AG21
AK24
U4900
NV34
4.7UF
20%
6.3V
CERM
805
2
1
C4959
1/16W
10K
NV34
402
5%
MF
2
1
R4910
10K
1/16W
NV34
MF
5%
402
2
1
R4911
10UF
805
CERM
6.3V
20%
2
1
C4960
10UF
CERM
20%
6.3V
805
2
1
C4961
1/16W
MF
5%
0
402
2 1
R4912
0
5%
402
1/16W
MF
2
1
R4903
402
1/16W
MF
3.32K
1%
2
1
R4906
402
MF
1%
1/16W
1.02K
2
1
R4907
402
16V
CERM
20%
0.01UF
2
1
C4957
402
1%
1/16W
MF
4.99K
2 1
R4908
NV34
SM
1000-OHM-EMI
2 1
L4901
1/16W
MF
10K
5%
402
2
1
R4909
0
5%
1/16W
MF
402
2
1
R4913
1.02K
402
MF
1/16W
1%
2
1
R4940
402
3.32K
1%
1/16W
MF
2
1
R4914
CERM
16V
20%
0.01UF
402
2
1
C4940
402
10K
5%
1/16W
MF
NOSTUFF
2
1
R4950
10K
5%
1/16W
MF
402
NOSTUFF
2
1
R4951
NV18B U4900
1
IC,NV18B,GRAPHIC CTRL,C1
338S0176
49
I
103
051-6482
NV34
U4900
1
338S0175
IC,NV34,GRAPHIC CTRL,B1
AGP_SBA_L<7>
GPU_BALLR7
GPU_BALLT7
=PP3V3_AGP
NO_TEST
TP_GPU<2>
NO_TEST
TP_GPU<1>
NO_TEST
TP_GPU<0>
AGP_PAR
AGP_STOP
AGP_CBE<0>
AGP_AD<6>
AGP_AD<25>
AGP_AD<24>
AGP_SBA_L<6>
AGP_TYPEDET_L
NB_AGP_GCDET_L
=PP3V3_AGP
=PP1V5_AGP
PPVCORE_GPU
MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
AGP_PLLVDD
=PP3V3_AGP
=PP5V_AGP
MIN_NECK_WIDTH=10MIL
VOLTAGE=0.35V
GPU_AGP_VREF
MIN_LINE_WIDTH=25MIL
TP_NVAGP_TMS
TP_NVAGP_TDI
GPU_AGP_VREF
GPU_MBDET_L
AGP_BUSY_L
STOP_AGP_L
AGP_ST<1>
AGP_TRDY
NV_PCIRST_L
AGP_AD_STBS<0>
AGP_AD_STBF<1>
AGP_AD_STBS<1>
AGP_SB_STBF
AGP_SB_STBS
AGP_SBA_L<1>
AGP_SBA_L<5>
AGP_AD<29>
AGP_AD<23>
AGP_AD<19>
AGP_AD<14>
AGP_AD<1>
=PP1V5_AGP
AGP_INT_L
AGP_ST<0>
AGP_IRDY
AGP_CLK66M_GPU
GPU_TMODE
GPU_50PULLDWN
AGP_SBA_L<0>
AGP_SBA_L<2>
AGP_INT_L
AGP_AD_STBF<0>
AGP_AD<18>
AGP_AD<15>
AGP_AD<16>
AGP_AD<17>
AGP_AD<2>
AGP_AD<11>
AGP_AD<12>
TP_NVAGP_TDO
AGP_SBA_L<3>
AGP_SBA_L<4>
NVAGP_TRST_L
GPU_50PULLUP
NVAGP_TCLK
AGP_AD<0>
AGP_AD<4>
AGP_AD<5>
AGP_AD<7>
AGP_AD<9>
AGP_AD<10>
AGP_DEVSEL
AGP_FRAME
AGP_GNT
AGP_REQ
TP_GPU_INTB_L
AGP_RBF
AGP_WBF
AGP_DBI_HI
AGP_DBI_LO
AGP_ST<2>
AGP_CBE<1>
AGP_CBE<2>
AGP_CBE<3>
AGP_AD<31>
AGP_AD<30>
AGP_AD<28>
AGP_AD<27>
AGP_AD<26>
AGP_AD<21>
AGP_AD<22>
AGP_AD<20>
AGP_AD<13>
AGP_AD<8>
AGP_AD<3>
AGP_VREF_GC
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
=PP3V3_AGP
GPU_RESET_L
59
59
59
59
59
58
58
58
58
58
57
57
57
57
57
56
56
56
56
56
52
52
52
52
52
51
51
51
51
51
50
50
50
50
50
49
49
49
49
59
49
49
49
49
49
48
48
48
58
48
50
48
49
49
48
48
48
48
48
7
48
48
48
48
48
48
48
48
7
7
50
7
7
49
49
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
7
25
48
48
27
48
48
25
48
48
48
48
48
48
48
48
6
48
48
48
48
48
48
48
48
48
48
48
48
6
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
7
7
7
7
8
D
G
S
D
G
S
EN
VIN
ADJ
GND PAD
THM
NC
VO
G
D
S
FB
LD
HD
GND
COMP
SS
VCC
VC
VSS VSS
SHTDWN
VTT REFOUT
VDD
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE 10UF CAP NEAR GPU
GPU VTT VREG
PEAK CURRENT OF TOTAL RAILS
VOUT=VREF*(R5004+R5005)/R5005=1.60(OR 1.40) VDC
SET OUTPUT=1.40V FOR NV34
GPU VCORE VREG
PPVCORE_GPU
1.40VDC
1.60VDC
NOTE:CONNECT VR5001 PIN 9 TO GND PLANE.
NC
NC
NC
0.95A
NOTE:
NOTE:
7.2A WITH NV34
IRU3037CS VREF=1.25VDC
SET OUTPUT=1.60V FOR NV18B
SC4215 VREF=0.8VDC
SET OUTPUT=1.5V
PEAK CURRENT OF TOTAL RAILS
VOUT=VREF*(R5015+R5017)/R5017=1.5 VDC
GRAPHICS VREGS
RDSON=0.012 OHM
@ VGS=3.5 V
U5000_FEEDBACK
AGP 1.5V VREG
390UF
8X11.5-TH
ELEC
6.3V
20%
2
1
C5003
6.3V
ELEC
20%
390UF
8X11.5-TH
2
1
C5002
10UF
20%
6.3V
CERM
1206
2
1
C5001
ELEC
1800UF
20%
TH-KZJ
6.3V
2
1
C5009
20%
6.3V
TH-KZJ
ELEC
1800UF
2
1
C5008
1%
10K
1/16W
MF
402
2
1
R5005
CERM
10%
603
NOSTUFF
50V
3300PF
2
1
C5007
1206
0.51
1/4W
FF
5%
2
1
R5004
1206
0.1UF
50V
20%
CERM
2
1
C5012
CASE369
NTD70N03R
3
1
4
Q5001
CASE369
NTD70N03R
3
1
4
Q5002
0.022UF
50V
10%
CERM
603
NOSTUFF
2
1
C5005
0
5%
1/10W
FF
805
2 1
R5002
805
1UF
20%
25V
CERM
2
1
C5004
PP2V5_PWRON
1/10W
805
FF
5%
0
NOSTUFF
2
1
R5007
1206
CERM
6.3V
20%
10UF
NOSTUFF
2
1
C5020
NOSTUFF
1/10W
FF
805
1%
200
2
1
R5017
NOSTUFF
SC4215
SOIC
6
3
9
5
4
1
8
27
VR5001
NOSTUFF
10UF
20%
6.3V
CERM
1206
2
1
C5000
NOSTUFF
10BQ040
SM
2 1
D5001
PP1V5_PWRON
PP1V5_RUN
NOSTUFF
1%
174
FF
805
1/10W
2
1
R5015
330UF
6.3V
20%
ELEC
SM-2
NOSTUFF
2
1
C5022
TH
1.6UH
2 1
L5001
CERM
25V
1UF
20%
805
2
1
C5016
25V
CERM
402
5%
220PF
2
1
C5006
0.1UF
20%
CERM
16V
603
2
1
C5014
SM
2N7002
2
1
3
Q5007
1/16W
5%
MF
402
100K
21
R5021
PP5V_PWRON
IRU3037CS
SOI
26
8
3
5
4
1
7
U5000
MF
1/16W
1%
2.8K
OMIT
402
2
1
R5003
CERM
3900PF
603
50V
5%
2
1
C5023
603
CERM
50V
5%
68PF
2
1
C5013
402
MF
1/16W
1%
27.4K
2
1
R5001
805
FF
1/10W
5%
4.7
2
1
R5000
20%
805
10UF
CERM
6.3V
NOSTUFF
2
1
C5052
1206
20%
10UF
CERM
6.3V
NOSTUFF
2
1
C5054
10K
402
MF
1/16W
5%
NOSTUFF
2
1
R5050
NOSTUFF
X7R
10%
16V
0.1UF
603
2
1
C5051
SPAK-5
NE57811
NOSTUFF
1
6
3
2
4
5
U5050
0.1UF
16V
X7R
10%
603
NOSTUFF
2
1
C5050
NOSTUFF
20%
ELEC
330UF
SM-1
6.3V
2
1
C5053
SOI
SI4410DY
321
4
8765
Q5006
20%
10V
CERM
0.1UF
402
NOSTUFF
2 1
C5060
NV18B
1
R5003
RES,2.8K OHM,1/16W,1%,0402
114S2803
NV34
1
R5003
RES,1.21K OHM,1/16W,1%,0402
114S1213
50
051-6482
I
103
Q5006G
U5000_FEEDBACK
U5000_GATE_H
=PP3V3_AGP =PP12V_AGP
Q5002_DRAIN
U5000_GATE_L
VR5001_ADJ
=PP5V_AGP
U5000_COMP
R5004_P2
Q5001_GATE
U5000_VC
U5000_SS
R5001_2
U5050_SHTDWN
PPVCORE_GPU
VOLTAGE=1.65V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PP2V5_GPU
VOLTAGE=1.25V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PP1V25_GPU_VTT
U5050_REFOUT
PPVCORE_GPU
SYS_SLEEP
59 58 57
56
46
52
11
51
55
10
49
59
58
54
58
9
48 59
49
50
52
50
8
7 7
7
49
7
52
49
6
PAD
THRML
GND
SDA/DK0
SCL/DK1
AGND
PD*
EDGE/HTPLG
DE
HSYNC
VSYNC
IDCK+
IDCK-
D11
D10
D2
D3
D4
D5
D6
D7
D8
D9
D1
D0
GND
GND
AVCC
PVCC2
PVCC1
VCC
AVCC
VCC
EXT_SWING
VREF
TX1+
TX2-
TX1-
TX2+
TX0+
TX0-
TXC-
TXC+
MSEN
PGND
AGND
PGND
AGND
CTL3/A2
ISEL/RST*
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
6 7
8
1 2
3
4
5
6
7 8
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE TMDS RESISTORS ON OPPOSITE SIDE TO TMDS
IPD
UNDEFINED RESET CONFIGURATION STRAPS
RESISTORS ON PAGE 25
RESISTOR MAY NEED TO BE
330OHM HI SWING
NOTE:
HIGHER
NC
SILICON IMAGE 1162 TMDS
EXTERNAL TMDS TRANSMITTER
PLL NOISE SHOULD BE LESS THAN 100MV PEAK-TO-PEAK
NC IPD
IPD
TMDS_XMIT_SI
402
5%
1/16W
MF
4.7K
2
1
R5100
MF
5%
4.7K
402
1/16W
TMDS_XMIT_SI
2
1
R5101
5%
1/16W
MF
402
4.7K
NOSTUFF
2
1
R5102
FERR-EMI-100-OHM
SM
TMDS_XMIT_SI
2 1
L5100
10UF
20%
TMDS_XMIT_SI
805
6.3V
CERM
2
1
C5100
1/16W
5%
MF
402
4.7K
TMDS_XMIT_SI
2
1
R5103
5%
402
MF
1/16W
4.7K
NOSTUFF
2
1
R5104
1/16W
MF
22
402
5%
TMDS_XMIT_SI
2 1
R5105
22
TMDS_XMIT_SI
2 1
R5106
22
TMDS_XMIT_SI
2 1
R5107
22
TMDS_XMIT_SI
2 1
R5108
22
TMDS_XMIT_SI
2 1
R5109
22
TMDS_XMIT_SI
2 1
R5110
22
TMDS_XMIT_SI
2 1
R5111
22
TMDS_XMIT_SI
2 1
R5112
NOSTUFF
MF
402
1/16W
4.7K
5%
2
1
R5113
1%
MF
1K
NOSTUFF
1/16W
402
2
1
R5117
5%
1/16W
MF
402
10K
2
1
R5118
10K
5%
1/16W
MF
402
2
1
R5124
402
MF
1/16W
5%
10K
2
1
R5123
402
MF
1/16W
5%
10K
2
1
R5121
10K
5%
1/16W
MF
402
2
1
R5122
10K
402
MF
1/16W
5%
2
1
R5126
402
MF
1/16W
5%
10K
2
1
R5120
10K
402
MF
1/16W
5%
2
1
R5119
10K
5%
1/16W
MF
402
2
1
R5125
TMDS_XMIT_SI
0
5%
1/16W
MF
402
2 1
R5130
TMDS_XMIT_SI
0
5%
1/16W
MF
402
2
1
R5116
TMDS_XMIT_SI
5%
MF
330
402
1/16W
2
1
R5127
SIL1162
TSSOP
CRITICAL
TMDS_XMIT_SI
21
2
22
3
32
33
41
42
38
39
35
36
49
26
27
46
28
45
29
47
48
25
11
12
20
1234
30
44
19
7
8
9
10
13
14
15
16
5
6
17
18
24
40
34
314337
U5100
TMDS_XMIT_SI
20%
6.3V
CERM
805
10UF
2
1
C5101
TMDS_XMIT_SI
5%
50V
CERM
402
100PF
2
1
C5102
TMDS_XMIT_SI
5%
50V
402
100PF
CERM
2
1
C5103
TMDS_XMIT_SI
402
CERM
50V
5%
100PF
2
1
C5104
5%
50V
CERM
402
TMDS_XMIT_SI
100PF
2
1
C5105
5%
50V
402
100PF
CERM
TMDS_XMIT_SI
2
1
C5106
TMDS_XMIT_SI
SM
FERR-EMI-100-OHM
2 1
L5101
TMDS_XMIT_SI
805
CERM
6.3V
20%
10UF
2
1
C5107
TMDS_XMIT_SI
FERR-EMI-100-OHM
SM
2 1
L5102
TMDS_XMIT_SI
50V
CERM
402
5%
100PF
2
1
C5108
TMDS_XMIT_SI
20%
6.3V
CERM
805
10UF
2
1
C5109
NOSTUFF
5%
4.7K
1/16W
MF
402
2
1
R5128
NOSTUFF
4.7K
5%
402
MF
1/16W
2
1
R5129
I
051-6482
103
51
DVOD3
SI_I2C_OFF
SI_EDGE
SI_PCI_RESET_L
DVOD5
SI_TMDS_D1M
TMDS_D0P
SI_EXT_SWING_SET
SI_TMDS_D0M
SI_TMDS_D1P
TMDS_D1M
TMDS_CKM
SI_TMDS_CKP
SI_TMDS_D2P
SI_TMDS_D2M
SI_VREF
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIL
SI_TMDS_D0P
DVOD0
DVOD1
DVOD4
DVOD6
SI_SCL
SI_SDA
SI_PCI_RESET_L
PCI_RESET_L
TMDS_D0M
SI_TMDS_CKM
TMDS_D1P
TMDS_CKP
TMDS_D2P
TMDS_D2M
DVOVSYNC
DVOCLKOUT
DVOHSYNC
DVODE
DVOD11
DVOD10
DVOD9
DVOD8
DVOD7
3V_SI_PLLVCC
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
DVOD7
DVOD4
DVOD1
DVOD0
DVOD5
DVOD10
DVOD6
DVOD11
DVOD9
=PP3V3_AGP
PP3V3_SI_AVCC
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
PP3V3_SI_VCC
DVOD2
=PP3V3_AGP
=PP3V3_AGP
PP3V3_SI_VCC
LAST_MODIFIED=Mon Dec 13 20:02:16 2004
59
59
59
58
58
58
57
57
57
56
56
56
52
52
52
51
51
51
74
50
50
50
58
49
49
49
57
57
59
59
59
57
57
57
57
8
59
59
59
59
59
57
57
57
57
57
57
57
57
57
57
57
57
57
57
57
48
57
48
48
56
51
51
58
58
58
51
51
51
51
58
58
51
6
58
58
58
58
58
57
57
56
57
51
51
51
56
51
51
51
51
51
51
51
51
51
51
7
51
56
7
7
51
NC_FBADQS7*
NC_FBADQS6*
NC_FBADQS5*
NC_FBADQS0*
NC_FBADQS1*
NC_FBADQS2*
NC_FBADQS3*
NC_FBADQS4*
FBVDDQ
FBAA12
FBABA0
FBABA1
FBAA11
FBADQM7
FBADQM6
FBADQM5
FBADQM4
FBADQM3
FBADQM2
FBADQM1
FBADQM0
FBAD63
FBAD62
FBAD61
FBAD60
FBAD59
FBAD58
FBAD57
FBAD56
FBAD55
FBAD54
FBAD53
FBAD52
FBAD51
FBAD50
FBAD49
FBAD48
FBAD47
FBAD46
FBAD45
FBAD44
FBAD43
FBAD42
FBAD41
FBAD40
FBAD39
FBAD38
FBAD37
FBAD36
FBAD35
FBAD34
FBAD33
FBAD32
FBAD31
FBAD30
FBAD29
FBAD28
FBAD27
FBAD26
FBAD25
FBAD24
FBAD23
FBAD22
FBAD21
FBAD20
FBAD19
FBAD18
FBAD17
FBAD16
FBAD15
FBAD14
FBAD13
FBAD12
FBAD11
FBAD10
FBAD9
FBAD8
FBAD7
FBAD6
FBAD5
FBAD4
FBAD3
FBAD2
FBAD1
FBAD0
ROMCS*
ROMA15
(3 OF 5)
FBAA6
FBAA0
FBAA2
FBAA4
FBAA1
FBAA5
FBAA3
FBAA7
FBAA10
FBAA8
FBAA9
FBARAS*
FBVREF
FBACS1*
FBACS0*
FBAWE*
FBACAS*
ROMA14
NC_VTT
GND
FB_DLLVDD
FBCAL_CLK_GND
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBACKE
FBACLK1*
FBACLK0
FBACLK0*
FBACLK1
FBADQS4
FBADQS3
FBADQS2
FBADQS1
FBADQS0
FBADQS5
FBADQS6
FBADQS7
FBCDQM7
FBCDQM6
FBCDQM5
FBCDQM4
FBCDQM3
FBCDQM2
FBCDQM1
FBCDQM0
THERMAL GND
(4 OF 5)
FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD63
FBCD61
FBCD24
FBCD62
FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11
FBBCLK1*
FBBCLK0*
FBBCLK0
FBBCLK1
FBCBA0
FBCBA1
FBCA12
FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7
NC_FBCDQS4*
NC_FBCDQS3*
NC_FBCDQS2*
NC_FBCDQS1*
NC_FBCDQS0*
NC_FBCDQS5*
NC_FBCDQS7*
NC_FBCDQS6*
FBCCKE
FBCRAS*
FBCCAS*
FBCWE*
FBCCS0*
FBCCS1*
REV.
DRAWING NUMBER
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
NOTICE OF PROPRIETARY PROPERTY
OF SHT
NONE
SCALE
E
SIZE
APPLE COMPUTER INC.
H
G
1
F
E
2 3 4
D
C
B
A
1 432
5 6 7
H
G
F
E
8
765
D
C
B
A
8
FBBCLK 0 AND 1 SWAPPED FOR ROUTING REASONS
RECOMMENDED BY NVIDIA
NC
NC
NC
NC
NC
NC
NC
NC
WEAK PULL-DOWN
NVIDIA RECOMMENDS WIDER RANGE OF CAP VALUES, EMC LIKE ONE VALUE
NC
NC
NVIDIA FRAME BUFFER
NC
NC
NC
NC
NC
IS FILTER APN 155S0052 PER NVIDIA SPEC
ALTERNATE STUFFING FOR 10 OHM R
NC
RECOMMANDED NY NVIDIA.
WEAK PULL-DOWN
EVENLY DISTRIBUTE 0.01UF & 0.1 UF CAPS
AMONGST FBVDDQ PINS ON NV ASIC
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
402
10V
20%
CERM
0.1UF
2
1
C5200
10K
1%
402
MF
1/16W
2
1
R5200
805
20%
6.3V
CERM
10UF
2
1
C5201
10UF
805
6.3V
CERM
20%
2
1
C5202
10K
1/16W
1%
MF
402
2
1
R5201
NV34
49.9
1/16W
1%
402
MF
2
1
R5202
1%
49.9
NV34
1/16W
MF
402
2
1
R5203
402
0.1UF
20%
10V
CERM
2
1
C5203
402
0.1UF
10V
CERM
20%
2
1
C5204
1%
1/16W
402
MF
1K
2
1
R5204
1%
1/16W
1K
MF
402
2
1
R5205
OMIT
BGA
NV18B
AF2
R1
R2
T24
R24
M24
J24
G22
G19
G16
G15
AB24
W24
G12
G9
W26
Y28
AE27
AG29
D29
F27
L28
M26
AE25
J7
U26
K5
AK22
A22
AK19
A19
AE1
AB1
W1
T1
M1
AH21
J1
F1
Y23
L23
AC20
H20
AC11
H11
N3
AK9
AF11
AE6
AF5
AH7
AK6
AH3
AG4
E5
D4
C3
AK12
AK15
AH10
A12
A6
C24
E23
C21
E20
C13
E11
C10
AH16
A9
E8
C7
D28
E17
AC26
Y26
L26
H26
AE30
AF20
AB30
W30
M30
J30
F30
AA28
V28
N28
K28
G28
AA5
P26
L8
AH13
AF14
AF26
AG27
AH28
AH24
AF23
AF17
AK25
F6
G3
K3
Y8
AF8
E14
C18
F25
AH18
AD28
A25
C27
C28
F23
F20
F14
F11
Y25
L25
F8
G8
AC25
U25
P25
H25
AC24
H24
G23
G20
L24
Y24
G11
F17
D3
E4
F5
E3
R28
P28
W27
AA29
AD26
AG30
D30
G27
K30
M27
Y27
AA30
AD27
AF28
E28
G25
K29
L27
M29
N29
H27
V25
V27
V26
W25
J27
AA26
AA27
AB27
AC27
V29
W29
W28
Y29
AB29
AB28
K27
AC29
AD30
AA25
AB26
AB25
AD25
AE28
AE26
AF27
AG28
K26
AC28
AD29
AE29
AF29
AH30
AH29
AJ30
AJ29
A30
B30
M25
C29
C30
E29
F29
G29
H28
D27
E27
F26
F28
N26
G26
J25
J26
K25
G30
H29
J28
J29
L29
M28
N27
N25
P27
U27
P21
N21
V21
U21
N30
P29
R29
R26
R27
T25
T26
T30
T27
T29
T28
U29
U24
R30
R25
U28
V30
U4900
BGA
NV18B
OMIT
T14
R14
P14
W13
T13
R13
M13
W12
N14
T12
R12
M12
U12
V12
N12
P12
W19
V19
U19
M14
T19
R19
P19
N19
M19
W18
V18
U18
T18
R18
V13
P18
N18
M18
W17
V17
U17
T17
R17
P17
N17
U13
M17
W16
V16
U16
T16
R16
P16
N16
M16
W15
P13
V15
U15
T15
R15
P15
N15
M15
W14
V14
U14
N13
E19
C20
D25
B27
B4
D6
C11
E12
C15
C14
D19
A21
D24
A27
A4
E7
A10
D12
D20
B21
F24
C26
C5
D7
B10
D11
B12
B13
D8
F18
D18
E18
F19
D9
E21
D21
D22
D23
B18
B19
C19
B20
B22
C22
D10
B23
A24
F21
E22
F22
E24
C25
E25
D26
E26
E10
C23
B24
B25
B26
A28
B28
A29
B29
B2
A2
F12
B3
A3
B5
B6
B7
C8
C4
D5
E6
C6
E13
F7
F9
E9
F10
A7
B8
C9
B9
B11
C12
D13
F13
D14
D17
A13
B14
B15
E15
D15
F16
E16
A16
D16
B16
C16
B17
G17
A15
F15
C17
A18
K14
K13
K17
K18
U4900
NV34
CERM
10V
805
N20P80%
4.7UF
2
1
C5205
NV34
402
0.1UF
20%
10V
CERM
2
1
C5206
NV34
402
0.001UF
50V
CERM
10%
2
1
C5207
NV34
805
1/10W
FF
1%
10
2 1
R5206
549
1%
1/16W
MF
402
NOSTUFF
2
1
R5207
NOSTUFF
0
5%
1/16W
MF
402
2
1
R5208
0.01UF
10%
16V
CERM
402
2
1
C5208
0.1UF
20%
10V
CERM
402
NV36
2
1
C5250
NV36
402
CERM
10V
20%
0.1UF
2
1
C5251
NV36
402
CERM
10V
20%
0.1UF
2
1
C5252
NV36
402
CERM
10V
20%
0.1UF
2
1
C5253
NV36
402
CERM
10V
20%
0.1UF
2
1
C5254
NV36
402
CERM
10V
20%
0.1UF
2
1
C5255
NV36
402
CERM
10V
20%
0.1UF
2
1
C5261
NV36
402
CERM
10V
20%
0.1UF
2
1
C5260
NV36
402
CERM
10V
20%
0.1UF
2
1
C5259
NV36
402
CERM
10V
20%
0.1UF
2
1
C5258
NV36
402
CERM
10V
20%
0.1UF
2
1
C5257
0.1UF
20%
10V
CERM
402
NV36
2
1
C5256
I372
I373
I374
I375
I376
I377
I378
I379
402
20%
10V
CERM
0.1UF
2
1
C5209
CERM
402
20%
0.1UF
10V
2
1
C5210
0.1UF
10V
CERM
20%
402
2
1
C5211
10V
0.1UF
20%
402
CERM
2
1
C5212
10V
0.1UF
402
20%
CERM
2
1
C5213
402
20%
10V
CERM
0.1UF
2
1
C5214
0.01UF
16V
CERM
10%
402
2
1
C5215
402
20%
0.1UF
10V
CERM
2
1
C5216
CERM
402
0.1UF
10V
20%
2
1
C5217
0.1UF
402
10V
CERM
20%
2
1
C5218
0.1UF
402
10V
CERM
20%
2
1
C5219
0.01UF
402
10%
16V
CERM
2
1
C5220
16V
CERM
10%
402
0.01UF
2
1
C5221
CERM
20%
0.1UF
402
10V
2
1
C5222
402
16V
CERM
10%
0.01UF
2
1
C5223
402
20%
10V
CERM
0.1UF
2
1
C5224
402
20%
CERM
10V
0.1UF
2
1
C5225
402
10%
CERM
16V
0.01UF
2
1
C5226
402
20%
CERM
10V
0.1UF
2
1
C5227
402
10V
CERM
20%
0.1UF
2
1
C5228
16V
CERM
402
10%
0.01UF
2
1
C5229
051-6482
??
52
103
FBBCLK1_L
FBBCLK1
FBCLK
FBACLK0
FBACLK0
FBCLK
FBBCLK1
FBBCLK1
FBCLK
FBBCLK0
FBBCLK0
FBCLK
FBBCLK0_L
FBBCLK0
FBCLK
FBACLK1
FBACLK1_L
FBCLK
FBACLK0_L
FBACLK0
FBCLK
FBACLK1
FBACLK1
FBCLK
MIN_LINE_WIDTH=25MIL
GPU_FB_VREF
VOLTAGE=1.25V
MIN_NECK_WIDTH=10MIL
TP_FBACS1_L
TESTPOINT
TESTPOINT
ROMA14
TESTPOINT
ROMA15
TP_ROMCS_L
TESTPOINT
FBDQS<0>
FBACLK0
PP2V5_GPU
FBD<43>
FBD<42>
FBD<39>
PP2V5_GPU
FBDQS<7>
FBDQS<6>
FBDQS<1>
FBACLK0_L
FBD<0>
FBD<2>
FBD<1>
FBACKE
FBA<8>
FBDQS<5>
FBACLK1
FBACLK1_L
FBACS0_L
FBARAS_L
FBA<3>
FBA<2>
FBA<1>
FBA<0>
FBA<4>
FBA<9>
FBA<7>
FBA<6>
FBA<5>
FBA<10>
FBD<3>
FBD<4>
FBD<5>
FBD<6>
FBD<7>
FBD<8>
FBD<9>
FBD<10>
FBD<11>
FBD<12>
FBD<13>
FBD<14>
FBD<15>
FBD<16>
FBD<17>
FBD<18>
FBD<19>
FBD<20>
FBD<21>
FBD<22>
FBD<23>
FBD<24>
FBD<25>
FBD<26>
FBD<27>
FBD<28>
FBD<29>
FBD<30>
FBD<31>
FBD<32>
FBD<33>
FBD<34>
FBD<35>
FBD<36>
FBD<37>
FBD<38>
FBD<40>
FBD<41>
FBD<44>
FBD<45>
FBD<46>
FBD<47>
FBD<48>
FBD<49>
FBD<50>
FBD<51>
FBD<52>
FBD<53>
FBD<54>
FBD<55>
FBD<56>
FBD<57>
FBD<58>
FBD<59>
FBD<60>
FBD<61>
FBD<62>
FBD<63>
FBDQM<0>
FBDQM<1>
FBDQM<2>
FBDQM<3>
FBDQM<4>
FBDQM<5>
FBDQM<6>
FBDQM<7>
FBA<11>
FBABA<0>
FBA<12>
FBDQS<2>
FBDQS<3>
FBDQS<4>
PP2V5_GPU
FBCAL_PD_VDDQ
FB_DLLVDD
MIN_LINE_WIDTH=25MIL
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIL
FB_DLLVDD
FBCAL_CLK_GND
FBCAL_TERM_GND
FBCAL_PU_GND
FBAWE_L
FBACAS_L
FBABA<1>
PP2V5_GPU
FBBCKE
FBBCS0_L
FBBWE_L
TESTPOINT
TP_FBBCS1_L
FBBRAS_L
FBBCAS_L
FBDQS<15>
FBDQS<14>
FBDQS<13>
FBDQS<12>
FBDQS<11>
FBDQS<10>
FBDQS<9>
FBDQS<8>
FBBA<12>
FBBCLK0
FBBCLK0_L
FBBCLK1_L
FBBCLK1
FBBBA<1>
FBBBA<0>
FBBA<11>
FBBA<10>
FBBA<9>
FBBA<8>
FBBA<7>
FBBA<6>
FBBA<5>
FBBA<4>
FBBA<3>
FBBA<2>
FBBA<1>
FBBA<0>
FBD<64>
FBD<65>
FBD<66>
FBD<67>
FBD<68>
FBD<69>
FBD<70>
FBD<71>
FBD<127>
FBD<126>
FBD<125>
FBD<124>
FBD<123>
FBD<122>
FBD<121>
FBD<120>
FBD<119>
FBD<118>
FBD<117>
FBD<116>
FBD<115>
FBD<114>
FBD<113>
FBD<112>
FBD<111>
FBD<110>
FBD<109>
FBD<108>
FBD<107>
FBD<106>
FBD<105>
FBD<104>
FBD<103>
FBD<102>
FBD<101>
FBD<100>
FBD<99>
FBD<98>
FBD<97>
FBD<96>
FBD<95>
FBD<94>
FBD<93>
FBD<92>
FBD<91>
FBD<90>
FBD<89>
FBD<88>
FBD<87>
FBD<86>
FBD<85>
FBD<84>
FBD<83>
FBD<82>
FBD<81>
FBD<80>
FBD<79>
FBD<78>
FBD<77>
FBD<76>
FBD<75>
FBD<74>
FBD<73>
FBD<72>
FBDQM<8>
FBDQM<9>
FBDQM<10>
FBDQM<11>
FBDQM<12>
FBDQM<13>
FBDQM<14>
FBDQM<15>
PP1V25_GPU_VTT
=PP3V3_AGP
59 58 57 56
55
55
55
55
51
54
54
54
54
50
55
54
55
55
55
54
54
54
54
52
52
54
54
54
52
52
55
55
55
55
49
53
53
53
53
53
53
53
53
53
50
50
53
53
53
50
50
53
53
53
53
48
52
52
52
52
52
52
52
52
56
56
53
52
7
53
53
53
7
53
53
53
52
53
53
53
54
54
53
52
52
54
54
54
54
54
54
54
54
54
54
54
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
54
54
54
54
54
54
54
54
54
54
53
53
53
7
52 52
54
54
54
7
55
55
55
6
55
55
53
53
53
53
53
53
53
53
55
52
52
52
52
55
55
55
55
55
55
55
55
55
55
55
55
55
55
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
55
55
55
55
55
55
55
55
50
7
7 8
6
5
4
3
1 2
PLACE R’S CLOSE TO MEMORY
RP5320
FBD<31>
52 54
FBD<30>
52
FBD<29>
52
FBD<28>
52
FBD<27>
52
FBD<26>
52
FBD<25>
52
FBD<24>
D
52
FBD<0>
52
FBD<1>
52
FBD<2>
52
FBD<3>
52
FBD<17>
52
FBD<16>
52
FBD<18>
52
FBD<19>
52
FBD<15>
52
FBD<14>
52
FBD<13>
52
FBD<12>
52
FBD<10>
52
FBD<11>
52
FBD<9>
52
FBD<8>
52
FBD<5>
52
FBD<6>
52
FBD<4>
52
FBD<7>
52
FBD<20>
52
FBD<21>
52
FBD<22>
52
FBD<23>
52
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
RP5320
RP5320
RP5320
RP5321
RP5321
RP5321
RP5321
RP5322
RP5322
RP5322
RP5322
RP5323
RP5323
RP5323
RP5323
RP5324
RP5324
RP5324
RP5324
RP5325
RP5325
RP5325
RP5325
RP5326
RP5326
RP5326
RP5326
RP5327
RP5327
RP5327
RP5327
RFBD<31>
RFBD<30>
RFBD<29>
RFBD<28>
RFBD<27>
RFBD<26>
RFBD<25>
RFBD<24>
RFBD<0>
RFBD<1>
RFBD<2>
RFBD<3>
RFBD<17>
RFBD<16>
RFBD<18>
RFBD<19>
RFBD<15>
RFBD<14>
RFBD<13>
RFBD<12>
RFBD<10>
RFBD<11>
RFBD<9>
RFBD<8>
RFBD<5>
RFBD<6>
RFBD<4>
RFBD<7>
RFBD<20>
RFBD<21>
RFBD<22>
RFBD<23>
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
FBD<32>
52
FBD<33>
52
FBD<34>
52
FBD<35>
52
FBD<36>
52
FBD<37>
52
FBD<38>
52
FBD<39>
52
FBD<40>
52
FBD<41>
52
FBD<42>
52
FBD<43>
52
FBD<44>
52
FBD<45>
52
FBD<46>
52
FBD<47>
52
FBD<48>
52
FBD<49>
52
FBD<50>
52
FBD<51>
52
FBD<52>
52
FBD<53>
52
FBD<54>
52
FBD<55>
52
FBD<56>
52
FBD<57>
52
FBD<58>
52
FBD<59>
52
FBD<60>
52
FBD<61>
52
FBD<62>
52
FBD<63>
52
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
6 3
5 4
8 1
7 2
5 4
6 3
7 2
8 1
7 2
8 1
6 3
5 4
8 1
7 2
5 4
6 3
5 4
6 3
8 1
7 2
5 4
6 3
7 2
8 1
8 1
7 2
5 4
6 3
8 1
6 3
7 2
5 4
RP5328
RP5328
RP5328
RP5328
RP5316
RP5316
RP5316
RP5316
RP5329
RP5329
RP5329
RP5329
RP5330
RP5330
RP5330
RP5330
RP5331
RP5331
RP5331
RP5331
RP5300
RP5300
RP5300
RP5300
RP5301
RP5301
RP5301
RP5301
RP5302
RP5302
RP5302
RP5302
RFBD<32>
RFBD<33>
RFBD<34>
RFBD<35>
RFBD<36>
RFBD<37>
RFBD<38>
RFBD<39>
RFBD<40>
RFBD<41>
RFBD<42>
RFBD<43>
RFBD<44>
RFBD<45>
RFBD<46>
RFBD<47>
RFBD<48>
RFBD<49>
RFBD<50>
RFBD<51>
RFBD<52>
RFBD<53>
RFBD<54>
RFBD<55>
RFBD<56>
RFBD<57>
RFBD<58>
RFBD<59>
RFBD<60>
RFBD<61>
RFBD<62>
RFBD<63>
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
PLACE R’S CLOSE TO GPU
FBACLK1
54
52
R5316
FBACLK1_L
54
52
FBACLK0
54
52
R5317
FBACLK0_L
54
52
1/16W
1/16W
100
100
1
1%
MF
402
2
1
1%
MF
402
2
D
PLACE 100OHM TERM AT RAM
PLACE 100OHM TERM AT RAM
C
B
FBD<64>
52
FBD<65>
52
FBD<66>
52
FBD<67>
52
FBD<84>
52
FBD<85>
52
FBD<86>
52
FBD<87>
52
FBD<72>
52
FBD<73>
52
FBD<75>
52
FBD<74>
52
FBD<68>
52
FBD<70>
52
FBD<69>
52
FBD<71>
52
FBD<80>
52
FBD<81>
52
FBD<82>
52
FBD<83>
52
FBD<76>
52
FBD<77>
52
FBD<78>
52
FBD<79>
52
FBD<91>
52
FBD<90>
52
FBD<89>
52
FBD<88>
52
FBD<95>
52
FBD<94>
52
FBD<93>
52 55
FBD<92>
52
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
RP5310
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
5 4
6 3
7 2
8 1
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
5 4
6 3
7 2
8 1
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
RP5310
RP5310
RP5310
RP5309
RP5309
RP5309
RP5309
RP5319
RP5319
RP5319
RP5319
RP5308
RP5308
RP5308
RP5308
RP5307
RP5307
RP5307
RP5307
RP5317
RP5317
RP5317
RP5317
RP5318
RP5318
RP5318
RP5318
RP5303
RP5303
RP5303
RP5303
RFBD<64>
RFBD<65>
RFBD<66>
RFBD<67>
RFBD<84>
RFBD<85>
RFBD<86>
RFBD<87>
RFBD<72>
RFBD<73>
RFBD<75>
RFBD<74>
RFBD<68>
RFBD<70>
RFBD<69>
RFBD<71>
RFBD<80>
RFBD<81>
RFBD<82>
RFBD<83>
RFBD<76>
RFBD<77>
RFBD<78>
RFBD<79>
RFBD<91>
RFBD<90>
RFBD<89>
RFBD<88>
RFBD<95>
RFBD<94>
RFBD<93>
RFBD<92>
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
FBD<96>
52
FBD<97>
52
FBD<98>
52
FBD<99>
52
FBD<100>
52
FBD<101>
52
FBD<102>
52
FBD<103>
52
FBD<104>
52
FBD<105>
52
FBD<106>
52
FBD<107>
52
FBD<108>
52
FBD<109>
52
FBD<110>
52
FBD<111>
52
FBD<112>
52
FBD<113>
52
FBD<114>
52
FBD<115>
52
FBD<116>
52
FBD<117>
52
FBD<118>
52
FBD<119>
52
FBD<120>
52
FBD<121>
52
FBD<122>
52
FBD<123>
52
FBD<124>
52
FBD<125>
52
FBD<126>
52
FBD<127>
52
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
RP5315
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
5 4
6 3
7 2
8 1
5 4
6 3
7 2
8 1
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
5 4
6 3
7 2
8 1
5 4
6 3
7 2
8 1
8 1
7 2
5 4
6 3
8 1
6 3
7 2
5 4
RP5315
RP5315
RP5315
RP5314
RP5314
RP5314
RP5314
RP5312
RP5312
RP5312
RP5312
RP5313
RP5313
RP5313
RP5313
RP5311
RP5311
RP5311
RP5311
RP5306
RP5306
RP5306
RP5306
RP5304
RP5304
RP5304
RP5304
RP5305
RP5305
RP5305
RP5305
RFBD<96>
RFBD<97>
RFBD<98>
RFBD<99>
RFBD<100>
RFBD<101>
RFBD<102>
RFBD<103>
RFBD<104>
RFBD<105>
RFBD<106>
RFBD<107>
RFBD<108>
RFBD<109>
RFBD<110>
RFBD<111>
RFBD<112>
RFBD<113>
RFBD<114>
RFBD<115>
RFBD<116>
RFBD<117>
RFBD<118>
RFBD<119>
RFBD<120>
RFBD<121>
RFBD<122>
RFBD<123>
RFBD<124>
RFBD<125>
RFBD<126>
RFBD<127>
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
52
52
52
52
FBBCLK1
GPU128BIT
FBBCLK1_L
FBBCLK0
GPU128BIT
FBBCLK0_L
R5318
100
1/16W
R5319
100
1/16W
1
1%
MF
402
2
1
1%
MF
402
2
PLACE 100OHM TERM AT RAM
PLACE 100OHM TERM AT RAM
C
B
PLACE THESE R CLOSE TO SGRAM PLACE THESE R CLOSE TO SGRAM
R5301
15
FBDQS<0>
52
FBDQS<1>
52
FBDQS<2>
52
FBDQS<3>
52
FBDQS<4>
52
A
FBDQS<5>
52
FBDQS<6>
52
FBDQS<7>
52
R5302
15
1%
1/16W
MF
402
R5303
15
1%
1/16W
MF
402
R5305
15
1%
1/16W
MF
402
R5304
15
1%
1/16W
MF
402
2 1
1%
1/16W
MF
2 1
402
R5300
15
1%
1/16W
MF
2 1
402
R5307
15
1%
1/16W
MF
2 1
402
R5306
15
1%
1/16W
MF
2 1
402
RFBDQS<0>
RFBDQS<1>
2 1
RFBDQS<2>
RFBDQS<3>
2 1
RFBDQS<4>
RFBDQS<5>
2 1
RFBDQS<6>
RFBDQS<7>
54
54
54
54
54
54
54
54
FBDQS<8>
52
FBDQS<9>
52
FBDQS<10>
52
FBDQS<11>
52 55
FBDQS<12>
52
FBDQS<13>
52
FBDQS<14>
52
FBDQS<15>
52
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
GPU128BIT
R5314
15
1%
1/16W
MF
402
R5315
15
1%
1/16W
MF
402
R5313
15
1%
1/16W
MF
402
R5312
15
1%
1/16W
MF
402
R5308
15
2 1
1%
1/16W
MF
2 1
402
R5309
15
1%
1/16W
MF
2 1
402
R5310
15
1%
1/16W
MF
2 1
402
R5311
15
1%
1/16W
MF
2 1
402
RFBDQS<8>
RFBDQS<9>
2 1
RFBDQS<10>
RFBDQS<11>
2 1
RFBDQS<12>
RFBDQS<13>
2 1
RFBDQS<14>
RFBDQS<15>
55
55
55
FROM Q27 PAGE 26
55
55
55
55
APPLE COMPUTER INC.
FB TERMINATION
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
53
SCALE
A
REV.
I
OF
103
8
6 7
5
4
3
2
1
7 8
PP2V5_GPU
50
52
7
54
55
6
PP2V5_GPU PP2V5_GPU
50 50
52 52
7 7
54 54
55 55
5
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
4
NVIDIA RECOMMENDS WIDER RANGE OF CAP VALUES
1
2
C5424
0.1UF
20%
10V
CERM
402
1
2
C5425
0.1UF
20%
10V
CERM
402
1
2
C5426
0.1UF
20%
10V
CERM
402
1
C5422
0.001UF
10%
50V
2
CERM
402
1
2
C5427
0.1UF
20%
10V
CERM
402
1
2
C5428
0.1UF
20%
10V
CERM
402
1
2
C5429
0.1UF
20%
10V
CERM
402
D
PP2V5_GPU
50
52
54
7
55
D7
D8
E4
E11
L4
L7
L8
L11
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
1
2
C5434
0.1UF
20%
10V
CERM
402
G11
J11
K11
N13
J4
K4
C
SGRAVREF
54
B
SDRAM_DDR_4MX32
VDD
VDDQ
VREF
OMIT
U5400
BGA
(2 OF 2)
VSS_THERM
VSS
VSSQ
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
OMIT
U5400
SDRAM_DDR_4MX32
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
DQS0
DQS1
DQS2
DQS3
DM0
DM1
DM2
DM3
BA0
BA1
CK
CK
CKE
CS
RAS
CAS
WE
NC
BGA
(1 OF 2)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
MCL
RFU1
RFU2
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
M13
L9
M10
RFBD<7>
RFBD<5>
RFBD<6>
RFBD<4>
RFBD<2>
RFBD<3>
RFBD<1>
RFBD<0>
RFBD<31>
RFBD<30>
RFBD<29>
RFBD<28>
RFBD<27>
RFBD<26>
RFBD<25>
RFBD<24>
RFBD<15>
RFBD<14>
RFBD<13>
RFBD<12>
RFBD<10>
RFBD<11>
RFBD<8>
RFBD<9>
RFBD<23>
RFBD<22>
RFBD<21>
RFBD<20>
RFBD<19>
RFBD<16>
RFBD<18>
RFBD<17>
TP_U5400_RFU2
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
FBA<12>
54
54
52
NO_TEST
50
52
54
55
54
52
54
52
52
54
54
52
54
52
54
52
54
52
54
52
54
52
54
52
54
52
54
52
53
53
53
53
52
52
52
52
54
52
54
52
53
52
53
52
54
52
54
52
54
52
52
54
52
54
FBA<0>
FBA<1>
FBA<2>
FBA<3>
FBA<4>
FBA<5>
FBA<6>
FBA<7>
FBA<8>
FBA<9>
FBA<10>
FBA<11>
RFBDQS<0>
RFBDQS<3>
RFBDQS<1>
RFBDQS<2>
FBDQM<0>
FBDQM<3>
FBDQM<1>
FBDQM<2>
FBABA<0>
FBABA<1>
FBACLK0
FBACLK0_L
FBACKE
FBACS0_L
FBARAS_L
FBACAS_L
FBAWE_L
54
55
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
B2
H13
H2
B13
B3
H12
H3
B12
N4
M5
M11
M12
N12
N2
M2
L2
L3
C4
C11
H4
H11
L12
L13
M3
M4
N3
PP2V5_GPU
50
52
7
54
55
SGRAVREF
PP2V5_GPU
7
52
1
2
50
C5423
0.001UF
10%
50V
CERM
402
PP2V5_GPU
7
1
2
C5435
0.1UF
20%
10V
CERM
402
E11
L11
C10
C12
E12
F11
G11
J11
K11
N13
D7
D8
E4
L4
L7
L8
C3
C5
C7
C8
E3
F4
G4
J4
K4
OMIT
U5401
SDRAM_DDR_4MX32
(2 OF 2)
VDD
VDDQ
VREF
BGA
VSS
VSS_THERM
VSSQ
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
3
C5415
1
10UF
20%
6.3V
2
CERM
805
54
52
54
52
54
52
54
52
54
52
54
52
54
52
54
52
54
52
54
52
54
52
54
52
53
53
53
53
52
52
52
52
54
52
54
52
53
52
53
52
54
52
52
54
54
52
54
52
54
52
FBA<0>
FBA<1>
FBA<2>
FBA<3>
FBA<4>
FBA<5>
FBA<6>
FBA<7>
FBA<8>
FBA<9>
FBA<10>
FBA<11>
RFBDQS<6>
RFBDQS<4>
RFBDQS<7>
RFBDQS<5>
FBDQM<6>
FBDQM<4>
FBDQM<7>
FBDQM<5>
FBABA<0>
FBABA<1>
FBACLK1
FBACLK1_L
FBACKE
FBACS0_L
FBARAS_L
FBACAS_L
FBAWE_L
1
2
N10
N11
H13
B13
H12
B12
M11
M12
N12
C11
H11
L12
L13
C5414
10UF
20%
6.3V
CERM
805
N5
N6
M6
N7
N8
M9
N9
M8
L6
M7
B2
H2
B3
H3
N4
M5
N2
M2
L2
L3
C4
H4
M3
M4
N3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
DQS0
DQS1
DQS2
DQS3
DM0
DM1
DM2
DM3
BA0
BA1
CK
CK
CKE
CS
RAS
CAS
WE
NC
C5401
1
10UF
20%
6.3V
2
CERM
805
OMIT
U5401
SDRAM_DDR_4MX32
BGA
(1 OF 2)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
MCL
RFU1
RFU2
1
2
C5400
10UF
20%
6.3V
CERM
805
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
M13
L9
M10
RFBD<48>
RFBD<49>
RFBD<50>
RFBD<51>
RFBD<53>
RFBD<52>
RFBD<54>
RFBD<55>
RFBD<32>
RFBD<33>
RFBD<35>
RFBD<34>
RFBD<37>
RFBD<36>
RFBD<38>
RFBD<39>
RFBD<57>
RFBD<56>
RFBD<58>
RFBD<59>
RFBD<62>
RFBD<60>
RFBD<61>
RFBD<63>
RFBD<41>
RFBD<40>
RFBD<42>
RFBD<43>
RFBD<44>
RFBD<47>
RFBD<45>
RFBD<46>
TP_U5401_RFU2
1 2
FBA<12>
D
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
52
54
NO_TEST
C
B
1
C5418
0.001UF
10%
50V
2
CERM
402
1
2
C5408
0.1UF
20%
10V
CERM
402
1
2
C5409
0.1UF
20%
10V
CERM
402
1
C5419
0.001UF
10%
50V
2
CERM
402
1
2
C5410
0.1UF
20%
10V
CERM
402
1
2
C5411
0.1UF
20%
10V
CERM
402
1
C5420
0.001UF
10%
50V
2
CERM
402
1
2
C5412
0.1UF
20%
10V
CERM
402
1
2
C5413
0.1UF
20%
10V
CERM
402
1
C5421
0.001UF
10%
50V
2
CERM
402
1
C5433
0.001UF
10%
50V
2
CERM
402
1
2
C5402
0.1UF
20%
10V
CERM
402
1
2
C5403
0.1UF
20%
10V
CERM
402
1
2
C5430
0.001UF
10%
50V
CERM
402
1
2
C5404
0.1UF
20%
10V
CERM
402
1
2
C5405
0.1UF
20%
10V
CERM
402
1
C5431
0.001UF
10%
50V
2
CERM
402
1
2
C5406
0.1UF
20%
10V
CERM
402
1
2
C5407
0.1UF
20%
10V
CERM
402
1
2
C5432
0.001UF
10%
50V
CERM
402
EVENLY PLACE 0.1UF CAP & 0.01UF CAPS
DDR SDRAM A VREF
PP2V5_GPU
50
52
54
55
7
1
R5400
1K
1%
A
SGRAM0 & SGRAM1 MEMORY SUPPORT
PART NUMBER
333S0251
333S0252
QTY
2
2
DESCRIPTION
SDRAM,4MX32,DDR,300MHZ
SDRAM,4MX32,DDR,300MHZ
8
REFERENCE DES
U5400,U5401
U5400,U5401
CRITICAL
CRITICAL
CRITICAL
BOM OPTION
SAMSUNG
HYNIX
6 7
5
1/16W
MF
402
2
1
2
R5401
1K
1%
1/16W
MF
402
4
1
2
C5416
0.1UF
20%
10V
CERM
402
1
2
C5417
0.1UF
20%
10V
CERM
402
SGRAVREF
VOLTAGE=1.25V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
GPU DDR SDRAM A
54
APPLE COMPUTER INC.
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
54
SCALE
1
REV.
OF
103
A
I
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
FBBA<12>
1 2
D
C
52
55
NO_TEST
B
3
PP2V5_GPU PP2V5_GPU
55 55
7 7
54 54
52 52
50 50
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
MCL
RFU1
RFU2
1
2
GPU128BIT
C5500
10UF
20%
6.3V
CERM
805
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
M13
L9
M10
RFBD<113>
RFBD<114>
RFBD<112>
RFBD<115>
RFBD<117>
RFBD<116>
RFBD<118>
RFBD<119>
RFBD<97>
RFBD<96>
RFBD<99>
RFBD<98>
RFBD<100>
RFBD<101>
RFBD<102>
RFBD<103>
RFBD<121>
RFBD<120>
NO_TEST
RFBD<122>
RFBD<123>
RFBD<126>
RFBD<124>
RFBD<125>
RFBD<127>
RFBD<104>
RFBD<105>
RFBD<106>
RFBD<107>
RFBD<108>
RFBD<110>
RFBD<109>
RFBD<111>
TP_U5501_RFU2
GPU128BIT
C5501
1
10UF
20%
6.3V
2
CERM
805
U5501
SDRAM_DDR_4MX32
BGA
(1 OF 2)
OMIT
1
2
N10
N11
H13
B13
H12
B12
M11
M12
N12
C11
H11
L12
L13
GPU128BIT
C5514
10UF
20%
6.3V
CERM
805
N5
N6
M6
N7
N8
M9
N9
M8
L6
M7
B2
H2
B3
H3
N4
M5
N2
M2
L2
L3
C4
H4
M3
M4
N3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
DQS0
DQS1
DQS2
DQS3
DM0
DM1
DM2
DM3
BA0
BA1
CK
CK
CKE
CS
RAS
CAS
WE
NC
GPU128BIT
C5515
1
10UF
20%
6.3V
2
CERM
805
FBBA<0>
52
55
55
55
55
55
55
55
55
55
55
55
55
55
55
53
53
55
55
55
55
55
52
52
52
52
52
52
52
52
52
52
52
53
53
53
53
52
52
52
52
52
52
52
52
52
52
52
52
52
FBBA<1>
FBBA<2>
FBBA<3>
FBBA<4>
FBBA<5>
FBBA<6>
FBBA<7>
FBBA<8>
FBBA<9>
FBBA<10>
FBBA<11>
RFBDQS<14>
RFBDQS<12>
RFBDQS<15>
RFBDQS<13>
FBDQM<14>
FBDQM<12>
FBDQM<15>
FBDQM<13>
FBBBA<0>
FBBBA<1>
FBBCLK1
FBBCLK1_L
FBBCKE
FBBCS0_L
FBBRAS_L
FBBCAS_L
FBBWE_L
FBBCKE
6
1
2
U5500
SDRAM_DDR_4MX32
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
DQS0
DQS1
DQS2
DQS3
DM0
DM1
DM2
DM3
BA0
BA1
CK
CK
CKE
CS
RAS
CAS
WE
NC
BGA
(1 OF 2)
OMIT
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
MCL
RFU1
RFU2
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
M13
L9
M10
TP_U5500_RFU2
N10
N11
H13
B13
H12
B12
M11
M12
N12
C11
H11
L12
L13
N5
N6
M6
N7
N8
M9
N9
M8
L6
M7
B2
H2
B3
H3
N4
M5
N2
M2
L2
L3
C4
H4
M3
M4
N3
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
GPU128BIT
C5522
0.1UF
20%
10V
CERM
402
RFBD<71>
RFBD<69>
RFBD<70>
RFBD<68>
RFBD<65>
RFBD<67>
RFBD<66>
RFBD<64>
RFBD<95>
RFBD<94>
RFBD<93>
RFBD<92>
RFBD<91>
RFBD<90>
RFBD<89>
RFBD<88>
RFBD<79>
RFBD<78>
RFBD<77>
RFBD<76>
RFBD<74>
RFBD<75>
RFBD<72>
RFBD<73>
RFBD<87>
RFBD<86>
RFBD<85>
RFBD<84>
RFBD<83>
RFBD<81>
RFBD<82>
RFBD<80>
5
FBBA<12>
1
2
GPU128BIT
C5523
0.1UF
20%
10V
CERM
402
GPU128BIT
1
C5524
0.1UF
20%
10V
2
CERM
402
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
52
55
NO_TEST
55
55
54
SGRBVREF
1
2
52
GPU128BIT
C5525
0.001UF
10%
50V
CERM
402
7
50
PP2V5_GPU
7 8
PP2V5_GPU
55
7
54
52
50
GPU128BIT
1
C5518
0.1UF
20%
10V
2
CERM
402
D
C
55
55
54
SGRBVREF
52
7
50
PP2V5_GPU
GPU128BIT
1
C5534
0.1UF
2
U5500
SDRAM_DDR_4MX32
BGA
D7
D8
E4
E11
L4
L7
L8
L11
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
N13
20%
10V
CERM
402
(2 OF 2)
OMIT
VDD
VDDQ
VSS_THERM
VREF
B
VSS
VSSQ
1
2
GPU128BIT
C5519
0.1UF
20%
10V
CERM
402
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
1
2
GPU128BIT
C5520
0.1UF
20%
10V
CERM
402
GPU128BIT
1
C5521
0.001UF
10%
50V
2
CERM
402
52
55
52
55
52
55
52
55
52
55
52
55
52
55
52
55
52
55
52
55
52
55
52
55
53
53
53
53
52
52
52
52
52
55
55
52
53
52
52
53
52
55
52
55
52
55
52
55
52
55
FBBA<0>
FBBA<1>
FBBA<2>
FBBA<3>
FBBA<4>
FBBA<5>
FBBA<6>
FBBA<7>
FBBA<8>
FBBA<9>
FBBA<10>
FBBA<11>
RFBDQS<8>
RFBDQS<11>
RFBDQS<9>
RFBDQS<10>
FBDQM<8>
FBDQM<11>
FBDQM<9>
FBDQM<10>
FBBBA<0>
FBBBA<1>
FBBCLK0
FBBCLK0_L
FBBCS0_L
FBBRAS_L
FBBCAS_L
FBBWE_L
1
2
GPU128BIT
C5535
0.1UF
20%
10V
CERM
402
E11
L11
C10
C12
E12
F11
G11
J11
K11
N13
4
U5501
SDRAM_DDR_4MX32
BGA
D7
D8
E4
L4
L7
L8
C3
C5
C7
C8
(2 OF 2)
OMIT
VDD
E3
VDDQ
F4
G4
VSS_THERM
J4
K4
VREF
VSS
VSSQ
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
PP2V5_GPU
55
7
54
52
SGRBVREF
VOLTAGE=1.25V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
4
50
GPU128BIT
1
C5530
0.001UF
10%
50V
2
CERM
402
1
2
GPU128BIT
C5502
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5503
0.1UF
20%
10V
CERM
402
GPU128BIT
1
C5531
0.001UF
10%
50V
2
CERM
402
1
2
GPU128BIT
C5504
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5505
0.1UF
20%
10V
CERM
402
GPU128BIT
1
C5532
0.001UF
10%
50V
2
CERM
402
1
2
GPU128BIT
C5506
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5507
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5533
0.001UF
10%
50V
CERM
402
EVENLY PLACE 0.1UF CAP & 0.01 UF CAPS
55
APPLE COMPUTER INC.
3
2
GPU DDR SDRAM B
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
55
1
SCALE
A
REV.
I
OF
103
PP2V5_GPU
7
55
54
52
50
GPU128BIT
1
C5526
0.001UF
10%
50V
2
CERM
402
1
2
GPU128BIT
C5508
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5509
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5527
0.001UF
10%
50V
CERM
402
1
2
GPU128BIT
C5510
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5511
0.1UF
20%
10V
CERM
402
GPU128BIT
1
C5528
0.001UF
10%
50V
2
CERM
402
1
2
GPU128BIT
C5512
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5513
0.1UF
20%
10V
CERM
402
1
2
GPU128BIT
C5529
0.001UF
10%
50V
CERM
402
DDR SDRAM B VREF
PP2V5_GPU
55
7
54
52
50
GPU128BIT
1
R5501
1K
1%
1/16W
MF
402
2
1
2
GPU128BIT
C5516
0.1UF
20%
10V
CERM
402
GPU128BIT
1
C5517
0.1UF
20%
10V
2
CERM
402
GPU128BIT
1
R5500
1K
1%
1/16W
MF
402
A
2
SGRAM0 & SGRAM1 MEMORY SUPPORT
PART NUMBER
333S0251
333S0252
QTY
2
2
DESCRIPTION
SDRAM,4MX32,DDR,300MHZ
SDRAM,4MX32,DDR,300MHZ
8
REFERENCE DES
U5500,U5501
U5500,U5501
CRITICAL
CRITICAL
CRITICAL
BOM OPTION
GPU128BIT_SAMSUNG
GPU128BIT_HYNIX
6 7
5
7 8
6
5
4
3
1 2
=PP3V3_AGP
2
R5616
10K
5%
1/16W
MF
402
D
57
(5) HOST MODE
[0] = [VIPHCTL]
0 = PCI MODE
*
1 = AGP MODE
VIPHCTL
1
NOSTUFF
2
R5617
1K
5%
1/16W
MF
402
1
=PP3V3_AGP
VIPD7
57
(6) AGP SIDEBAND
[0] = [VIPD7]
*
0 = ENABLE AGP SIDEBAND
1 = DISABLE AGP SIDEBAND
1
R5638
10K
1%
1/16W
MF
402
2
2
R5618
1K
5%
1/16W
MF
402
1
NOSTUFF
57
57
57
57
57
57
51
51
NV_HSYNC
NV_VSYNC
GPU_STRAP<3>
GPU_STRAP<2>
DVOD3
DVOD2
=PP3V3_AGP
OMIT
2
R5625
10K
5%
1/16W
MF
402
1
OMIT
2
R5630
1K
5%
1/16W
MF
402
1
2
1
2
1
R5626
10K
5%
1/16W
MF
402
NOSTUFF
R5629
1K
5%
1/16W
MF
402
2
1
2
1
OMIT
R5624
10K
5%
1/16W
MF
402
OMIT
R5628
1K
5%
1/16W
MF
402
2
R5623
10K
5%
1/16W
MF
402
1
2
R5627
1K
5%
1/16W
MF
402
1
OMIT
OMIT
2
1
2
1
OMIT
R5644
10K
5%
1/16W
MF
402
OMIT
R5647
1K
5%
1/16W
MF
402
2
R5643
10K
5%
1/16W
MF
402
1
2
R5648
1K
5%
1/16W
MF
402
1
NOSTUFF
PART NUMBER
110111 = 270MHZ SAMSUNG (NV18B)
116S1104
116S1104
116S1103
110011 = 270MHZ HYNIX (NV18B)
116S1104
116S1103
111101 = 270MHZ SAMSUNG (NV34)
116S1104
116S1104
116S1103
111100 = 270MHZ HYNIX (NV34)
116S1104
116S1103
C
=PP3V3_AGP
=PP3V3_AGP
2
R5663
10K
1%
1/16W
MF
402
1
ROMA15
52
ROMA14
NOSTUFF
2
R5665
1K
5%
1/16W
MF
402
1
2
R5664
10K
1%
1/16W
MF
402
1
NOSTUFF
2
R5666
1K
5%
1/16W
MF
402
1
DVOD8
51 52
57
2
R5653
10K
5%
1/16W
MF
402
1
2
R5658
1K
5%
1/16W
MF
402
1
NOSTUFF
GPU_STRAP<1>
57
=PP3V3_AGP
NOSTUFF
2
R5631
10K
1%
1/16W
MF
402
1
2
R5632
1K
5%
1/16W
MF
402
1
GPU_STRAP<0>
57
=PP3V3_AGP
2
R5633
10K
5%
1/16W
MF
402
1
NOSTUFF
2
R5634
1K
5%
1/16W
MF
402
1
7
48
49
[5..0] = [NV11_HSYNC,NV11_VSYNC,GPU_STRAP<3>,GPU_STRAP<2>,DVOD3,DVOD2]
QTY
2
1
1
2
2
2
1
1
2
2
59 58 57 56 52 51 50
(8) FRAME BUFFER MEMORY SPEED
DESCRIPTION
RES,10K-OHM,1/16W,5%
RES,10K-OHM,1/16W,5%
RES,1K-OHM,1/16W,5%
RES,10K-OHM,1/16W,5%
RES,1K-OHM,1/16W,5%
RES,10K-OHM,1/16W,5%
RES,10K-OHM,1/16W,5%
RES,1K-OHM,1/16W,5%
RES,10K-OHM,1/16W,5%
RES,1K-OHM,1/16W,5%
REFERENCE DES
R5625,R5623
R5644
R5628
R5625,R5644
R5628,R5627
R5625,R5624
R5623
R5647
R5624,R5623
R5630,R5647
CRITICAL
BOM OPTION
270MHZ_SAM_18
270MHZ_SAM_18
270MHZ_SAM_18
270MHZ_HYN_18
270MHZ_HYN_18
270MHZ_SAM_34
270MHZ_SAM_34
270MHZ_SAM_34
270MHZ_HYN_34
270MHZ_HYN_34
D
C
FAST WRITE SUPPORT
(1) ROM TYPE (OVERRIDDEN IF STRAP1 = 0)
[1..0] = [ROMA15,ROMA14]
00 = PARALLEL
01 = SERIAL AT25F
B
57
57
A
(2) CRYSTAL FREQUENCY SELECT
10 = SERIAL SST45VF
*
11 = SERIAL FUTURE
=PP3V3_AGP
2
R5667
10K
5%
1/16W
MF
402
1
VIPD6
VIPD2
NOSTUFF
2
R5601
1K
5%
1/16W
MF
402
1
[1..0] = [VIPD6,VIPD2]
00 = 13.5MHZ
01 = 14.38MHZ
*
10 = 27MHZ
11 = {UNDEFINED}
NOSTUFF
1
R5635
10K
1%
1/16W
MF
402
2
2
R5600
1K
5%
1/16W
MF
402
1
=PP3V3_AGP
NOSTUFF
2
R5612
10K
1%
1/16W
MF
402
1
VIPHAD1
57
VIPHAD0
57
VIPD1
57
VIPD0
57
2
R5615
1K
5%
1/16W
MF
402
1
(4) USER DEFINED STRAPS
[3..0] = [VIPHAD1,VIPHAD0,VIPD1,VIPD0]
THESE BITS ARE UNDEFINED BUT THEY
MUST BE KEPT LOW DURING RESET
0=ENABLE
1=DISABLE
NOSTUFF
2
R5613
10K
5%
1/16W
MF
402
1
2
R5614
1K
5%
1/16W
MF
402
1
NOSTUFF
2
R5608
10K
5%
1/16W
MF
402
1
2
R5611
1K
5%
1/16W
MF
402
1
*
0 = SYSTEM BIOS (VENDOR & SUBSYSTEM ID=0X0000)
1 = ADAPTER CARD VGA BIOS (VENDOR & SUBSYSTEM ID=0X54-0X57)
TMDS_XMIT_SI
2
R5609
10K
5%
1/16W
MF
402
1
DVOHSYNC
51
57
VIPD3
57
VIPD5
57
VIPD4
TMDS_XMIT_GPU
2
R5610
1K
5%
1/16W
MF
402
1
57
(9) SUB-VENDOR (10) PCI ADDRESS BUS
[0] = [GPU_STRAP<1>]
[0] = [GPU_STRAP<0>]
0 = REVERSED
*
1 = NORMAL
=PP3V3_AGP
2
R5602
10K
5%
1/16W
MF
402
1
NOSTUFF
2
R5604
1K
5%
1/16W
MF
402
1
[3..0] = [DVOHSYNC,VIPD3,VIPD5,VIPD4]
(3) PCI DEVICE ID
0010 = 0X112 GEFORCE2 GO
0011 = 0X113 QUADRO2 GO
0100 = 0X114 NV17M
0000 = 0X110 GEFORCE2GO MX (NV11B)
*
1001 = 0X111 NV18B,NV31,NV34
NOSTUFF
1
R5636
10K
1%
1/16W
MF
402
2
2
R5603
1K
5%
1/16W
MF
402
1
NOSTUFF
1
R5637
10K
1%
1/16W
MF
402
2
2
R5607
1K
5%
1/16W
MF
402
1
2
R5605
10K
5%
1/16W
MF
402
1
NOSTUFF
2
R5606
1K
5%
1/16W
MF
402
1
6
59
57
6
59
57
=PP3V3_AGP
NOSTUFF
2
R5619
10K
5%
1/16W
MF
402
1
ANALOG_HSYNC_L
ANALOG_VSYNC_L
NOSTUFF
2
R5622
1K
5%
1/16W
MF
402
1
[1..0] = [ANALOG_HSYNC*,ANALOG_VSYNC*]
(7) TV MODE
00 = SECAM
01 = NTSC
10 = PAL
11 = DISABLED
(THESE RESISTORS ARE ALL NOSTUFF)
NOSTUFF
2
R5620
10K
5%
1/16W
MF
402
1
NOSTUFF
2
R5621
1K
5%
1/16W
MF
402
1
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
NVIDIA STRAPS
NOTICE OF PROPRIETARY PROPERTY
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
56
SCALE
B
A
REV.
I
OF
103
8
6 7
5
4
3
2
1
D
C
B
A
ROUTE THE RGB LINES
AS 37.5 OHM TRACES.
ANALOG_BLU
59
6
ANALOG_GRN
59
6
ANALOG_RED
59
6
NOSTUFF
C5707
27PF
5%
50V
CERM
402
1
R5702
1
75
1%
1/16W
2
MF
402
2
NOSTUFF
C5708
27PF
CERM
PLACE CLOSE TO VGA CONNECTOR
=PP3V3_AGP
1 2
D
49
50
48
51
7
52
56
59
58
57
C
B
NOSTUFF
R5724
49.9
56
56
56
56
56
56
NOTE: KEEP STUB SHORT ->
3
1
R5735
10K
5%
1/16W
MF
402
2
NOSTUFF
R5723
49.9
2 1
1%
1/16W
MF
1%
402
1/16W
MF
402
PP3V3_NV_DACA
1
C5717
0.1UF
20%
10V
2
CERM
402
2 1
1
2
1
2
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
R5725
121
1%
1/16W
MF
402
Y5700
27.000M
CRITICAL
1
C5719
27PF
5%
50V
2
CERM
402
C5716
0.1UF
20%
10V
CERM
402
R5706
5.1M
5%
1/16W
MF
603
SM-3
1
R5733
75
1%
1/16W
MF
402
2
3 1
=PP3V3_AGP
1
C5706
2
NV34
1
2
NOSTUFF
2 1
0.1UF
20%
10V
CERM
402
NOSTUFF
C5712
4.7UF
20%
6.3V
CERM
805
1
R5732
2
1
C5700
27PF
2
75
5%
50V
CERM
402
1%
1/16W
MF
402
48
7
1
2
NOSTUFF
49
NOSTUFF
C5720
0.1UF
20%
10V
CERM
402
R5726
50
1/16W
10K
51
1
R5731
75
1%
1/16W
MF
402
2
5%
MF
402
58
52
57
56
NOSTUFF
1
C5721
0.001UF
10%
50V
2
CERM
402
NOSTUFF
GPU_XTALSSIN
1
2
59
R5727
0
2 1
5%
1/16W
MF
402
1
C5702
2
NOSTUFF
R5728
75
1%
1/16W
MF
402
51
52
59
6
2 1
1
C5710
4.7UF
20%
6.3V
2
CERM
805
0.1UF
20%
10V
CERM
402
NV18B
R5700
121
1%
1/16W
MF
402
56
=PP3V3_AGP
48
7
49
50
58
57
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
C5713
0.01UF
1
2
R5707
10K
1/16W
20%
16V
CERM
402
R5710
5%
MF
402
1
2
C5701
1
2
1
2
1
2
MF
1/16W105% MF
0.001UF
10%
50V
CERM
402
1
C5703
0.01UF
10%
50V
2
X7R
603
NV34
1
R5741
124
1%
1/16W
MF
402
2
C5704
0.1UF
20%
10V
CERM
402
R5709
1/16W
R5701
1/16W
10K
10
5%
1
5%
MF
402
2
1
C5705
0.001UF
10%
50V
2
CERM
402
2 1
402
2 1
402
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
50
51
59
58
R5734
1
10K
2
1/16W
402
1
R5711
10K
2
49
57
1
2
5%
MF
5%
1/16W
MF
402
48
56
C5718
0.1UF
20%
10V
CERM
402
=PP3V3_AGP
7
52
NOSTUFF
1
R5721
49.9
1%
1/16W
MF
402
2
PP3V3_NV_PLL
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V
PP3V3_NV_DACB
DAC2RSET
DAC2VREF
DVOVREF
51
DVODE
DVOCLKOUT
51
TP_DVOCLKOUT_L
DVOCLKIN
DVOHSYNC
56
51
DVOVSYNC
51
DVOCAL_PD_VDDQ
DVOCAL_PU_GND
TP_BUF_RST
6
TESTPOINT
NOSTUFF
1
R5722
49.9
1%
1/16W
MF
402
2
5
GRAPH_DDC_SCL
59
GRAPH_DDC_SDA
59
MON_I2C_SCL
59
MON_I2C_SDA
59
TP_VIPHCLK
6
VIPHCTL
56
VIPHAD0
56
VIPHAD1
56
VSYNC_L
HSYNC_L
(GND)
56
56
56
AG6
I2CC_SCL
AG7
I2CC_SDA
AG5
I2CA_SCL
AF7
I2CA_SDA
TESTPOINT
STRAPS
TESTPOINT
TESTPOINT
TESTPOINT
TESTPOINT
TESTPOINT
M5
VIPHCLK
M4
VIPHCTL
P3
VIPHAD0
P2
VIPHAD1
AK7
PLLVDD
AE3
DACB_VSYNC
AF3
DACB_HSYNC
AB4
DACB_VDD
AC4
DACB_IDUMP
AD1
DACB_BLUE
AD2
DACB_GREEN
AE2
DACB_RED
AD3
DACB_RSET
AB5
DACB_VREF
AF4
DVOVREF
AE4
DVODE
AJ2
DVOCLKOUT
AK2
DVOCLKOUT*
AG1
DVOCLKIN
AD5
DVOHSYNC
AD6
DVOVSYNC
DVOD0
51
DVOD1
51
DVOD2
51
DVOD3
51
DVOD4
51
DVOD5
51
DVOD6
51
DVOD7
51
DVOD8
51
DVOD9
51
DVOD10
51
DVOD11
51
AG2
DVOD0
AH1
DVOD1
AG3
DVOD2
AJ1
DVOD3
AH2
DVOD4
AK1
DVOD5
AJ3
DVOD6
AK3
DVOD7
AH4
DVOD8
AK4
DVOD9
AJ4
DVOD10
AH5
DVOD11
AE8
AD8
DVOVDD
AD9
AB6
DVOCAL_PD_VDDQ
AB7
DVOCAL_PU_GND
B1
BUFRST*
7 8
52
56
59
58
57
6
6
58
1
R5704
75
1%
1/16W
MF
402
2
CVBS_CNT
ANALOG_VSYNC_L
ANALOG_HSYNC_L
59
56
56
59
=PP3V3_AGP
49
50
48
51
52
56
59
58
57
1
R5703
1
75
1%
5%
50V
402
1/16W
2
MF
402
2
NOSTUFF
C5709
27PF
7
1
5%
50V
2
CERM
402
7
L5700
1000-OHM-EMI
SM
NOSTUFF
1
R5730
75
1%
1/16W
MF
402
2
PLACE CLOSE TO GPU
NV34
1
R5740
130
1%
1/16W
MF
402
2
1
R5720
1K
5%
1/16W
MF
402
2
2 1
=PP3V3_AGP
49
50
48
51
1000-OHM-EMI
1
C5711
4.7UF
20%
6.3V
2
CERM
805
NOSTUFF
1
R5729
75
1%
1/16W
MF
402
2
1
2
D
3
1
G
2
S
L5702
NV18B
R5708
95.3
1/16W
CVBS_D
CRITICAL
Q5700
IRLML2502
SOT23
SM
1
2
1%
MF
402
U4900
NV18B
(2 OF 5)
OMIT
TESTPOINT
TESTPOINT
4
BGA
TESTPOINT
TESTPOINT
VIPCAL_PD_VDDQ
VIPCAL_PU_GND
TESTPOINT
DACA_VSYNC
TESTPOINT
DACA_HSYNC
DACA_IDUMP
DACA_GREEN
NC_DACC_BLUE
NC_DACC_GREEN
NC_DACC_RED
NC_DACC_RSET
XTALOUTBUFF
VIPPCLK
VIPD0
VIPD1
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7
VIPVDDQ0
VIPVDDQ1
VIPVDDQ2
DACA_VDD
DACA_BLUE
DACA_RED
DACA_RSET
DACA_VREF
XTALSSIN
XTALIN
XTALOUT
STRAP0
STRAP1
NC_STRAP2
NC_STRAP3
L4
VIPCLK
J3
VIPD0
J2
VIPD1
K2
VIPD2
K1
VIPD3
L3
VIPD4
L2
VIPD5
N2
VIPD6
N1
VIPD7
L6
L7
M7
P6
VIPCAL_PD_VDDQ
P7
VIPCAL_PU_GND
AJ8
NV_VSYNC
AH9
NV_HSYNC
AG9
AG10
AJ9
AJ10
AK10
AG8
AH8
W7
NC
Y7
NC
AA6
NC
AC5
NC
AJ7
AJ6
AH6
AJ5
TP_GPU_XTALOUTBUFF
G1
GPU_STRAP<0>
G2
GPU_STRAP<1>
F2
GPU_STRAP<2>
F3
GPU_STRAP<3>
56
56
56
56
56
56
56
56
(GND)
DACA_BLUE
DACA_GREEN
DACA_RED
DACRSET1
DACVREF1
GPU_CLK27M_XIN
PROPAGATION_DELAY=L:S::16 MM
GPU_CLK27M_XOUT
PROPAGATION_DELAY=L:S::16 MM
DAC & CLOCKS
A
I
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
57
SCALE
REV.
OF
103
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
59
58
57
56
52
59
58
57
56
52
D
R5803
47
2 1
59
59
LCD_PWM
[OUT]
FPD_PWR_ON
[OUT]
5%
1/16W
MF
402
LCD_PWM_U5850
1
R5806
10K
1%
1/16W
MF
402
2
59
58
57
56
52
51
50
49
C
59
58
57
56
52
51
=PP3V3_AGP
50
49
48
7
51
50
49
48
MC74VHC1G08
=PP3V3_AGP
48
7
MC74VHC1G08
SOT23-5
=PP3V3_AGP
7
4
SOT23-5
5
4
U5851
3
L5800
1000-OHM-EMI
SM
5
U5850
3
1
C5851
0.1UF
20%
10V
2
CERM
402
1
2
2 1
1
C5850
0.1UF
20%
10V
2
CERM
402
1
2
PCI_RESET_L
1
R5860
100K
5%
1/16W
MF
402
2
[IN]
LAMP_STS
51
50
49
PPVCORE_GPU
=PP3V3_AGP
48
7
59
MON_DETECT
59
6
CVBS_CNT
57
INV_CUR_HI
59
TMDS_EN
59
=PP3V3_AGP
1
C5810
2
0.1UF
20%
10V
CERM
402
74
51
8
6
1
R5861
100K
5%
1/16W
MF
402
2
59
58
57
56
52
50
49
59
58
57
56
52
51
50
49
48
7
[IN]
[OUT]
[IN]
47
402
47
402
47
402
47
402
47
402
402
10K
402
10K
402
10K
402
10K
402
10K
402
10K
B
NOSTUFF
1
C5800
0.1UF
20%
10V
2
CERM
402
1
2
OMIT
R5807
1K
1%
1/16W
MF
402
1
2
C5811
4.7UF
20%
6.3V
CERM
805
1
2
C5801
0.1UF
20%
10V
CERM
402
1
C5805
0.001UF
10%
50V
2
CERM
402
51
R5845
50
NV34
1
2
49
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
C5803
4.7UF
20%
6.3V
CERM
805
48
2 1
2 1
2 1
7
R5802
R5820
R5809
R5830
R5808
R5817
R5816
R5815
R5846
R5812
=PP3V3_AGP
1
R5805
10K
1%
1/16W
MF
402
2
6
6
NV34
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
C5802
0.1UF
20%
10V
CERM
2
402
1
R5804
10K
1%
1/16W
MF
402
2
NV_GPIOD0
MON_DETECT_R
NV_GPIOD2
NV_GPIOD3
NV_GPIOD4
NV_GPIOD5
NV_GPIOD6
NV_GPIOD7
NV_GPIOD8
NV_GPIOD9
TP_GPU_THERMC
TP_GPU_THERMA
TP_GPU_FPBCLKOUT
TP_GPU_FPBCLKOUT_L
GPU_SWAP_A
GPU_SWAP_B
TP_GPU_STEREO
GPU_TESTMECLK
TP_FRWR_PME_L
TP_FRWRLNKON
TP_FRWRLPS
6
IFP0VREF
IFP0RSET
IFP0PLLVDD
IFP0AVCC
1
C5804
0.1UF
20%
10V
2
CERM
402
G5
GPIOD0
F4
GPIOD1
G4
GPIOD2
H5
GPIOD3
H4
GPIOD4
J4
GPIOD5
J5
GPIOD6
J6
GPIOD7
K4
GPIOD8
K6
GPIOD9
H3
THERMD-
H2
THERMD+
M3
FPBCLKOUT
M2
FPBCLKOUT*
AF9
SWAPRDY_A
AD4
SWAPRDY_B
Y5
STEREO
G24
TESTMEMCLK
AF10
NC_FRWR_PME*
N6
NC_FRWR_VAUXC
M6
NC_FRWR_VAUXP
L5
NC_FRWRLNKON
N5
NC_FRWRLPS
AA4
IFPABVPROVE
V6
IFPABRSET
U10
IFPABPLLVDD
V10
IFPABPLLGND
T5
IFPAIOVDD
T6
IFPAIOGND
Y4
IFPBIOVDD
W5
IFPBIOGND
U4900
NV18B
BGA
(5 OF 5)
OMIT
I2CB_SDA
I2CB_SCL
IFPATXC
IFPATXC*
IFPATXD0
IFPATXD0*
IFPATXD1
IFPATXD1*
IFPATXD2
IFPATXD2*
IFPATXD3
IFPATXD3*
IFPBTXC
IFPBTXC*
IFPBTXD4
IFPBTXD4*
IFPBTXD5
IFPBTXD5*
IFPBTXD6
IFPBTXD6*
IFPBTXD7
IFPBTXD7*
IFPCTXC
IFPCTXC*
IFPCTXD0
IFPCTXD0*
IFPCTXD1
IFPCTXD1*
IFPCTXD2
IFPCTXD2*
IFPCVPROBE
IFPCRSET
IFPCPLLVDD
IFPCPLLGND
IFPCIOVDD
IFPCIOGND
59
58
57
56
AF6
GRAPH_IIC_SDA2
AE7
GRAPH_IIC_SCL2
W2
58
GPU_TMDS_CKP
V1
58
GPU_TMDS_CKM
U4
58
GPU_TMDS_D0P
T4
58
GPU_TMDS_D0M
Y2
58
GPU_TMDS_D1P
AA1
58
GPU_TMDS_D1M
V3
58
GPU_TMDS_D2P
W3
58
GPU_TMDS_D2M
U5
TP_TMDS_TXD3P
V4
TP_TMDS_TXD3M
AA2
TP_EXT_TMDS_CKP
Y3
TP_EXT_TMDS_CKM
W4
TP_EXT_TMDS_D0P
V5
TP_EXT_TMDS_D0M
AB3
TP_EXT_TMDS_D1P
AB2
TP_EXT_TMDS_D1M
Y6
TP_EXT_TMDS_D2P
W6
TP_EXT_TMDS_D2M
AC3
TP_TMDS_TXD7P
AC2
TP_TMDS_TXD7M
P5
TP_DFPCLK
P4
TP_DFPCLK_L
R3
TP_DFPD0
T2
TP_DFPD1
U2
TP_DFPD2
T3
TP_DFPD3
U3
TP_DFPD5
V2
TP_DFPD6
MAKE TP AS SHORT AS POSSIBLE
AA3
TP_IFP1VREF
R4
IFP1RSET
P10
GPU_IFB1IOVDD
N10
R5
GPU_IFP1PLLVDD
R6
52
=PP3V3_AGP
51
50
49
48
7
1
TMDS_XMIT_GPU
R5833
TMDS_XMIT_GPU
R5835
TMDS_XMIT_GPU
R5837
TMDS_XMIT_GPU
R5838
1
R5800
10K
1%
1/16W
MF
402
2
R5818
2K
5%
1/16W
MF
402
2
1/16W
1/16W
1
1/16W
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1
R5819
2K
5%
1/16W
NOSTUFF
MF
402
R5831
2
5%
MF
0
TMDS_XMIT_GPU
2 1
R5834
402
5% MF
0
TMDS_XMIT_GPU
2 1
R5836
402
5%0MF
TMDS_XMIT_GPU
2
R5840
402
MF
0
TMDS_XMIT_GPU
2 1
R5839
4025%1/16W
WHAT IS THE FREQUENCY OF THE Q27 PIXEL CLOCK?
1
R5801
10K
1%
1/16W
MF
402
2
0
0
1/16W
1/16W
MF 5%
MF05%
MF 5%
MF
0
5%0MF
1/16W
1/16W
1/16W
402
BETH: 96.21MHZ
1
2
5%
402
2 1
402
2 1
402
2 1
402
2 1
R5821
1K
5%
1/16W
MF
402
2 1
TMDS_CKP
TMDS_CKM
TMDS_D0P
TMDS_D0M
TMDS_D1P
TMDS_D1M
TMDS_D2P
TMDS_D2M
0
1/16W
MF 5%
59
R5832
2 1
NOSTUFF
402
51
59
59
51
59
51
51
59
59
51
51
59
51
59
59
51
FPD_PWR_SW_G
SI_SDA
SI_SCL
IFP0AVCC
58
NOSTUFF
Q5800
TP0610
GPU_TMDS_CKP
58
GPU_TMDS_CKM
58
GPU_TMDS_D0P
58
GPU_TMDS_D0M
58
GPU_TMDS_D1P
58
GPU_TMDS_D1M
58
GPU_TMDS_D2P
58
GPU_TMDS_D2M
58
1
51
51
2
SM
GS
D
3
PP3V3_TMDSTERM
VOLTAGE=3.3V
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
1
R5869
100
1%
1/16W
MF
402
2
1
R5870
100
1%
1/16W
MF
402
2
1
R5871
100
1%
1/16W
MF
402
2
1
R5872
100
1%
1/16W
MF
402
2
NOSTUFF
R5847
49.9
1%
1/16W
MF
NOSTUFF
R5848
49.9
1%
1/16W
MF
NOSTUFF
R5849
49.9
1%
1/16W
MF
NOSTUFF
R5850
49.9
1%
1/16W
MF
NOSTUFF
R5851
49.9
1%
1/16W
MF
NOSTUFF
R5852
49.9
1%
1/16W
MF
NOSTUFF
R5853
49.9
1%
1/16W
MF
NOSTUFF
R5854
49.9
1%
1/16W
MF
402
D
C
2 1
402
2 1
402
2 1
402
2 1
402
2 1
402
2 1
402
2 1
402
2 1
B
L5801
FERR-EMI-100-OHM
A
2 1
VOLTAGE=3.3V
SM
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
IFP0AVCC
58
PART#
114S1003
114S1503
QTY
DESCRIPTION
1
RES,1K OHM,1%,1/16W,0402
RES,1.5K OHM,1%,1/16W,0402
1
GPU TMDS SWING
REFERENCE DESIGNATOR(S)
R5807
R5807
BOM OPTION
17_INCH_LCD
20_INCH_LCD
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
APPLE COMPUTER INC.
8
6 7
5
4
3
2
DVI AND STRAPS
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
58
1
SCALE
A
REV.
I
OF
103
1 2
0
2 1
5%
1/16W
SYM_VER-1
4
3 2
5% MF
0
2 1
1/16W
0
2 1
5% MF
1/16W
L5908
SYM_VER-1
SYM_VER-1
0
5% MF
2 1
1/16W
0
2 1
5%
1/16W
90-OHM
1
4
3 2
0
5%
2 1
1/16W
2 1
5%
1/16W0402
SYM_VER-1
4
3 2
0
5%
2 1
1/16W
6
PP12V_INV
6
GND_17_INV
6
PP5V_AGP_RL
6
INV_17_LCD_PWM_F
6
LAMP_STS_F
6
INV_17_CUR_HI_F
17_INCH_LCD
1
C5915
0.01UF
20%
50V
2
CERM
603
051-6482
SHT
59
1
MF
402
TD2M
6
59
TD2P
6
59
402
402
SM
TD1M
TD1P
402
MF
402
TD0M
TD0P
MF
402
MF
TCKM
TCKP
MF
402
17_INCH_LCD
CRITICAL
J5900
42375
M-ST-TH
1
2
3
4
5
6
518-0135
D
6
59
6
59
6
59
6
59
6
59
6
59
C
B
A
REV.
OF
I
103
6
59
PPVCC_TMDS
R5906
33
5%
1/16W
MF
402
L5901
FERR-220-OHM
0805
17_INCH_LCD
1
C5921
10UF
20%
16V
2
ELEC
SM
VOLTAGE=0V
MIN_LINE_WIDTH=100MIL
MIN_NECK_WIDTH=10MIL
20_INCH_LCD
1
C5944
0.01UF
20%
50V
2
CERM
603
3
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PP3V3_DDC
6
59
TCKM
6
59
TCKP
6
59
TD1M
6
59
TD1P
6
59
1
C5916
10UF
10%
16V
2
CERM
1210
2 1
TMDS_DDC_DAT
PP3V3_DDC
2 1
C5901
1
0.01UF
10%
16V
2
CERM
6
59
INVERTER INTERFACE
7
402
20" LCD INVERTER NEED +24V.
17" LCD INVERTER NEED +12V.
L5904
FERR-220-OHM
0805
L5905
FERR-220-OHM
0805
L5906
FERR-220-OHM
0805
L5907
FERR-220-OHM
0805
L5911
FERR-220-OHM
0805
L5912
FERR-220-OHM
0805
17_INCH_LCD
1
C5922
10UF
20%
16V
2
ELEC
SM
6
PP24V_INV
6
GND_20_INV
6
INV_20_LCD_PWM_
6
INV_20_CUR_HI_F
NOTE:REMOVED 2 PINS:LAMP_STATUS &
20_INCH_LCD
1
C5945
220PF
5%
25V
2
CERM
603
1
2
20_INCH_LCD
C5946
0.01UF
20%
50V
CERM
603
3
1
C5900
0.01UF
10%
16V
2
CERM
402
6
59
6
59
17_INCH_LCD
2 1
17_INCH_LCD
2 1
17_INCH_LCD
2 1
17_INCH_LCD
2 1
17_INCH_LCD
2 1
17_INCH_LCD
2 1
17_INCH_LCD
1
C5910
0.01UF
20%
50V
2
CERM
603
ON/OFF FOR 20" LCD INVETER.
TMDS_D2M
58
51
TMDS_D2P
58
51
TMDS_D1M
58
51
TMDS_D1P
58
51
TMDS_D0M
58
51
TMDS_D0P
58
51
TMDS_CKM
58
51
TMDS_CKP
51
58
VOLTAGE=12V
MIN_LINE_WIDTH=100MIL
MIN_NECK_WIDTH=10MIL
17_INCH_LCD
1
C5913
0.01UF
20%
50V
2
CERM
603
20_INCH_LCD
CRITICAL
J5901
53048
RT-S-TH
1
2
3
4
5
6
518-0141
GND_CHASSIS_17_INCH_INVERTER
APPLE COMPUTER INC.
2
NOSTUFF
R5926
L5902
17_INCH_LCD
1
C5912
220PF
5%
25V
2
CERM
603
90-OHM
1
SM
NOSTUFF
R5927
NOSTUFF
R5928
4
32
NOSTUFF
R5929
NOSTUFF
R5930
L5909
90-OHM
1
SM
NOSTUFF
R5931
NOSTUFF
R5932
L5910
90-OHM
SM
1
NOSTUFF
R5933
17_INCH_LCD
1
C5914
0.01UF
20%
50V
2
CERM
603
VOLTAGE=5V
MIN_LINE_WIDTH=100MIL
MIN_NECK_WIDTH=10MIL
17_INCH_LCD
1
C5911
0.01UF
20%
50V
2
CERM
603
7
1
R5904
301
1%
1/16W
MF
402
2
1
R5903
301
1%
1/16W
MF
402
2
1
R5902
301
1%
1/16W
MF
402
2
1
R5901
301
1%
1/16W
MF
402
2
VOLTAGE=0V
MIN_LINE_WIDTH=100MIL
MIN_NECK_WIDTH=10MIL
EXT VGA / TMDS
AND INVERTER
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
SCALE
NONE
NOSTUFF
NOSTUFF
47PF
5%
50V
CERM
402
1
C5917
10UF
10%
16V
2
CERM
1210
6
2
1
5
4
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
2
NOSTUFF
1
R5934
0
5%
1/8W
FF
1206
2
6 7
=PP5V_AGP
GND_CHASSIS_VGA
1
C5905
0.01UF
10%
16V
2
CERM
402
D5902
BAV99DW
SOT-363
6
D5902
BAV99DW
3
NOSTUFF
1
C5906
47PF
5%
50V
2
CERM
402
PP12V_RUN PP3V3_RUN
NOSTUFF
1
R5935
0
5%
1/8W
FF
1206
2
1
R5960
10K
5%
1/16W
MF
402
2
LED5900
GREEN
2.0X1.25A
SILKSCREEN: 3
7
59
50
49
7
59
1
C5904
0.01UF
10%
16V
2
CERM
402
2
NOSTUFF
1
SOT-363
5
4
20_INCH_LCD
L5900
FERR-220-OHM
0805
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
OMIT
1
R5912
330
5%
1/16W
MF
603
2
LED5900_P1
1
2
1
C5903
0.01UF
10%
16V
2
CERM
402
=PP5V_AGP
7
GND_CHASSIS_VGA
2 1
PPVCC_TMDS
49
5
59
50
7
59
6
5
L5903
FERR-220-OHM
1
C5902
0.01UF
10%
16V
2
CERM
402
GND_CHASSIS_VGA
59
=PP12V_AGP
7
50
59
2 1
PP5V_USB2
59
58 57 56 52 51
=PP24V_GRAPHICS
7
LCD_PWM
58
59
INV_CUR_HI
58
59
C5947
92
17_INCH_LCD
3
NOSTUFF
D5901
1N914
SOT23
1
17_INCH_LCD
1
C5920
0.1UF
20%
10V
2
CERM
402
NOSTUFF
1UF
CERM
1210
R5920
20%
50V
0805
7
=PP5V_AGP
7
59
50
49
17_INCH_LCD
1
R5919
200K
5%
1/16W
MF
402
2
Q5902_GATE
17_INCH_LCD
1
R5916
100K
5%
1/16W
MF
402
2
7 8
6
3
CHECK RGB RETURN PINS
(RED_RTN)
(GRN_RTN)
6
DDC_VCC_5
6
VGA_IIC_DAT
(BLU_RTN)
7
59
59
2 1
2 1
PPVCC_FPD
D5914
1N914
SOT23
20_INCH_LCD
DZ5900
1N5227B
SOT23
D5900
BAV99DW
SOT-363
D5900
BAV99DW
SOT-363
C5909
EXTERNAL VGA CONNECTOR
ANALOG_HSYNC_L
6
56
57
1
C5907
22PF
5%
50V
2
CERM
402
ANALOG_VSYNC_L
6
57
56
D
ANALOG_RED
6
57
ANALOG_GRN
6
57
ANALOG_BLU
6
C
57
MON_DETECT
6
58
ROUTE THE ANALOG RGB TRACES AT 37.5 OHMS.
MON_I2C_SDA
57
MON_I2C_SCL
57
PP3V3_ALL
7
90
11
B
FPD_PWR_ON
58
A
QTY
PART#
116S1104
116S1105
113S1332
113S1123
376S0225
101S1000
DESCRIPTION
1
RES,10K OHM,1/16W,5%,0402
1
RES,100K OHM,1/16W,5%,0402
RES,330 OHM,1/16W,5%,0603
1
RES,1.2K OHM,1/16W,5%,0603
1
XSTR,MOSFET,P-CH,0.02OHM
1
RES,0 OHM,1/10W,5%,0805
1
1
C5908
22PF
5%
50V
2
CERM
402
FL1702
LCFILTER
SM-100MHZ
FL1701
LCFILTER
SM-100MHZ
FL1700
LCFILTER
SM-100MHZ
PP3V3_RUN PP12V_RUN
17_INCH_LCD
1
R5950
0
5%
1/8W
FF
1206
2
FPD_PWR_SW_S
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
R5915
100K
5%
1/16W
MF
402
2
2 1
43
2 1
43
2 1
43
NOSTUFF
1
R5923
0
5%
1/8W
FF
1206
2
20_INCH_LCD
1
R5922
0
5%
1/8W
FF
1206
2
58
C5919
0.01UF
21
20%
R5925
16V
CERM
402
100K
2 1
5%
1/16W
MF
402
REFERENCE DESIGNATOR(S)
R5913
R5913
R5912
R5912
Q5900
L5900
FILT_ANALOG_RED
FILT_ANALOG_GRN
FILT_ANALOG_BLU
R5911
FPD_PWR_SW_G
D
1
G
S
1
2K
5%
1/16W
MF
402
2
4
OMIT
1
R5913
10K
5%
1/16W
MF
402
2
FPD_PWR_ON_D
3
Q5901
2N7002
SM
2
BOM OPTION
17_INCH_LCD
20_INCH_LCD
17_INCH_LCD
20_INCH_LCD
20_INCH_LCD
17_INCH_LCD
CRITICAL
(514-0201)
GND_CHASSIS_VGA
=PP5V_AGP
1
R5910
2K
5%
1/16W
MF
402
2
D
G
S
C5918
0.022UF
21
20%
16V
CERM
402
TMDS_EN_R
TMDS_EN
58
J5903
DV01793
F-ST-TH
15
16
1
3
5
7
9
11
13
17
18
6
VGA_IIC_CLK
8765
17_INCH_LCD
Q5900
IRF7410
SO-8
376S0082
321
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
7
49
R5908
33
5%
1/16W
MF
402
R5909
33
5%
1/16W
MF
402
2
4
6
8
10
12
14
50
1
3
1
R5914
10K
5%
1/16W
MF
402
2
3
1
8
4
INTERNAL TMDS CONNECTOR
SDF5900
STDOFF-118OD-181H-TH
(516S0241)
TD0M
6
59
TD0P
6
59
TD2M
6
59
TD2P
6
59
TMDS_DDC_DAT TMDS_DDC_CLK
6 6
59 59
GND_CHASSIS_TMDS
6
7
STDOFF-118OD-181H-TH
GRAPH_DDC_SDA
57
=PP3V3_AGP
7
50
49
48
1
R5905
2K
5%
1/16W
MF
402
17_INCH_LCD
Q5903
SI3433DV
TSOP
L5913
FERR-220-OHM
L5914
FERR-220-OHM
L5915
FERR-220-OHM
L5916
FERR-220-OHM
2
0805
0805
0805
0805
100K
5%
1/16W
MF
402
1
2
GRAPH_DDC_SCL
57
Q5903_GATE
2 1
D
1
G
S
20_INCH_LCD
1
C5942
2
36
4
17_INCH_LCD
1
R5921
10K
5%
1/16W
MF
402
2
Q5902_DRAIN
3
17_INCH_LCD
Q5902
2N7002
SM
2
1UF
20%
50V
CERM
1210
J5902
53307-3072
F-ST-SM
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
SDF5901
R5900
33
5%
1/16W
MF
402
1
2
59
5
PP5V_AGP_P_SEQ
MIN_LINE_WIDTH=100MIL
MIN_NECK_WIDTH=10MIL
59
59
20_INCH_LCD
2 1
20_INCH_LCD
2 1
20_INCH_LCD
2 1
20_INCH_LCD
2 1
1
CRITICAL
2
4
6
8
10
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
12
MIN_NECK_WIDTH=10MIL
14
16
18
20
22
24
26
28
30
1
2
R5907
2K
5%
1/16W
MF
402
1
2 1
TMDS_DDC_CLK
=PP12V_AGP
7
50
LCD_PWM
58
LAMP_STS
58
INV_CUR_HI
58
VOLTAGE=24V
MIN_LINE_WIDTH=100MIL
MIN_NECK_WIDTH=10MIL
20_INCH_LCD
1
C5943
0.01UF
20%
50V
2
CERM
603
GND_CHASSIS_20_INCH_INVERTER
4
7 8
6
5
4
3
1 2
ELECTRICAL_CONSTRAINT_SET
HT_NB_TO_SB_CLK_P
62
64
=PP1V5_PWRON_NB_AVDD
37
48
28
7
D
=PP2V5_HT
64
60
7
1
R6005
1K
5%
1/16W
MF
402
C
64
64
64
64
62
60
62
60
62
60
62
60
HT_PWROK
HT_RESET_L
HT_LDTSTOP_L
HT_LDTREQ_L
2
1
R6004
1K
5%
1/16W
MF
402
2
1
R6003
1K
5%
1/16W
MF
402
2
1
R6002
1K
5%
1/16W
MF
402
2
R6000
2.2
5%
1/16W
MF
603
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
64
62
2 1
PP1V5_PWRON_HT_NB_AVDD
VOLTAGE=1.5V
1
C6013
1UF
10%
6.3V
2
CERM
402
HT_CLK66M_NB
27
HT_SB_TO_NB_CLK_P
60
HT_SB_TO_NB_CLK_N
60
HT_SB_TO_NB_CAD_P<0>
60
HT_SB_TO_NB_CAD_N<0>
60
HT_SB_TO_NB_CAD_P<1>
60
HT_SB_TO_NB_CAD_N<1>
60
HT_SB_TO_NB_CAD_P<2>
60
HT_SB_TO_NB_CAD_N<2>
60
HT_SB_TO_NB_CAD_P<3>
60
HT_SB_TO_NB_CAD_N<3>
60
HT_SB_TO_NB_CAD_P<4>
60
HT_SB_TO_NB_CAD_N<4>
60
HT_SB_TO_NB_CAD_P<5>
60
HT_SB_TO_NB_CAD_N<5>
60
HT_SB_TO_NB_CAD_P<6>
60
HT_SB_TO_NB_CAD_N<6>
60
HT_SB_TO_NB_CAD_P<7>
60
HT_SB_TO_NB_CAD_N<7>
60
HT_SB_TO_NB_CTL_P
60
HT_SB_TO_NB_CTL_N
60
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
C6012
0.1UF
20%
10V
2
CERM
402
G9
H7
=PP2V5_HT
J10
F8
HT_CLK VDD_HT VDD_HT
AVDD
H9
HT_CLK
N1
HT_CLK_RXP0
P1
HT_CLK_RXN0
L1
HT_CAD_RXP0
L2
HT_CAD_RXN0
L3
HT_CAD_RXP1
L4
HT_CAD_RXN1
M4
HT_CAD_RXP2
M3
HT_CAD_RXN2
M2
HT_CAD_RXP3
M1
HT_CAD_RXN3
P2
HT_CAD_RXP4
P3
HT_CAD_RXN4
R3
HT_CAD_RXP5
R2
HT_CAD_RXN5
R1
HT_CAD_RXP6
T1
HT_CAD_RXN6
U1
HT_CAD_RXP7
U2
HT_CAD_RXN7
V2
HT_CTL_RXP0
V1
HT_CTL_RXN0
F9
HT_PWROK
HT_RESET*
HT_LDTSTOP*
HT_LDTREQ*
G6
2_5 1_2
U3
U3LITE
V1.0-300MM
PBGA
(SYM 5 OF 7)
HT
INTERFACE
OMIT
HT_CLK_AVSS
G8
64
60
7
N10
N6N2R9T8T4
HT_CLK_TXP0
HT_CLK_TXN0
HT_CAD_TXP0
HT_CAD_TXN0
HT_CAD_TXP1
HT_CAD_TXN1
HT_CAD_TXP2
HT_CAD_TXN2
HT_CAD_TXP3
HT_CAD_TXN3
HT_CAD_TXP4
HT_CAD_TXN4
HT_CAD_TXP5
HT_CAD_TXN5
HT_CAD_TXP6
HT_CAD_TXN6
HT_CAD_TXP7
HT_CAD_TXN7
HT_CTL_TXP0
HT_CTL_TXN0
HT_PVTREF0
HT_PVTREF1
=PP1V2_HT
L9
R7
R8
U8
U7
U6
U5
U4
U3
R5
R6
P8
P7
P6
P5
M5
M6
M7
M8
L6
L5
L7 H8
L8
60
24
7
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CTL_P
HT_NB_TO_SB_CTL_N
HT_NB_PVTREF0
HT_NB_PVTREF1
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
64
62
60
1
R6001
200
1%
1/16W
MF
402
2
60
HT_NB_TO_SB_CLK_N
62
64
60
HT_NB_TO_SB_CTL_P
62
64
60
HT_NB_TO_SB_CTL_N
62
64
60
HT_NB_TO_SB_CAD_P<0>
62
64
60
HT_NB_TO_SB_CAD_N<0>
62
64
60
HT_NB_TO_SB_CAD_P<1>
62
64
60
HT_NB_TO_SB_CAD_N<1>
64
62
60
HT_NB_TO_SB_CAD_P<2>
64
62
60
HT_NB_TO_SB_CAD_N<2>
64
62
60
HT_NB_TO_SB_CAD_P<3>
64
62
60
HT_NB_TO_SB_CAD_N<3>
64
62
60
HT_NB_TO_SB_CAD_P<4>
62
64
60
HT_NB_TO_SB_CAD_N<4>
64
62
60
HT_NB_TO_SB_CAD_P<5>
64
62
60
HT_NB_TO_SB_CAD_N<5>
64
62
60
HT_NB_TO_SB_CAD_P<6>
64
62
60
HT_NB_TO_SB_CAD_N<6>
64
62
60
HT_NB_TO_SB_CAD_P<7>
64
62
60
HT_NB_TO_SB_CAD_N<7>
64
62
60
HT_SB_TO_NB_CLK_P
64
62
60
HT_SB_TO_NB_CLK_N
62
64
60
HT_SB_TO_NB_CTL_P
64
62
60
HT_SB_TO_NB_CTL_N
64
62
60
HT_SB_TO_NB_CAD_P<0>
62
64
60
HT_SB_TO_NB_CAD_N<0>
64
62
60
HT_SB_TO_NB_CAD_P<1>
64
62
60
HT_SB_TO_NB_CAD_N<1>
64
62
60
HT_SB_TO_NB_CAD_P<2>
62
64
60
HT_SB_TO_NB_CAD_N<2>
64
62
60
HT_SB_TO_NB_CAD_P<3>
64
62
60
HT_SB_TO_NB_CAD_N<3>
62
64
60
HT_SB_TO_NB_CAD_P<4>
64
62
60
HT_SB_TO_NB_CAD_N<4>
64
62
60
HT_SB_TO_NB_CAD_P<5>
64
62
60
HT_SB_TO_NB_CAD_N<5>
64
62
60
HT_SB_TO_NB_CAD_P<6>
64
62
60
HT_SB_TO_NB_CAD_N<6>
62
64
60
HT_SB_TO_NB_CAD_P<7>
64
62
60
HT_SB_TO_NB_CAD_N<7>
64
62
60
HT_PWROK
62
64
60
HT_RESET_L
62
64
60
HT_LDTSTOP_L
64
62
60
HT_LDTREQ_L
62
64
60
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_PWROK
HT_CTL
HT_CTL
NET_SPACING_TYPE
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB HT_NB_TO_SB
HT_NB_TO_SB HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_SB_TO_NB HT_SB_TO_NB
HT_2V5
HT_2V5
HT_2V5 HT_CTL
HT_2V5
DIFFERENTIAL_PAIR
HT_NB_TO_SB_CLK
HT_NB_TO_SB_CLK
HT_NB_TO_SB_CTL
HT_NB_TO_SB_CTL
HT_NB_TO_SB_CAD0
HT_NB_TO_SB_CAD0
HT_NB_TO_SB_CAD1
HT_NB_TO_SB_CAD1
HT_NB_TO_SB_CAD2
HT_NB_TO_SB_CAD2
HT_NB_TO_SB_CAD3
HT_NB_TO_SB_CAD3
HT_NB_TO_SB_CAD4
HT_NB_TO_SB_CAD4
HT_NB_TO_SB_CAD5
HT_NB_TO_SB_CAD5
HT_NB_TO_SB_CAD6
HT_NB_TO_SB_CAD6
HT_NB_TO_SB_CAD7
HT_NB_TO_SB_CAD7
HT_SB_TO_NB_CLK
HT_SB_TO_NB_CLK
HT_SB_TO_NB_CTL
HT_SB_TO_NB_CTL
HT_SB_TO_NB_CAD0
HT_SB_TO_NB_CAD0
HT_SB_TO_NB_CAD1
HT_SB_TO_NB_CAD1
HT_SB_TO_NB_CAD2
HT_SB_TO_NB_CAD2
HT_SB_TO_NB_CAD3
HT_SB_TO_NB_CAD3
HT_SB_TO_NB_CAD4
HT_SB_TO_NB_CAD4
HT_SB_TO_NB_CAD5
HT_SB_TO_NB_CAD5
HT_SB_TO_NB_CAD6
HT_SB_TO_NB_CAD6
HT_SB_TO_NB_CAD7
HT_SB_TO_NB_CAD7
I46
I47
I83
I82
I51
I50
I52
I53
I54
I55
I56
I57
I58
I59
I60
I61
I62
I63
I64
I65
I48
I49
I84
I85
I66
I67
I68
I69
I70
I71
I72
I73
I74
I75
I76
I77
I78
I79
I80
I81
I86
I87
I88
I89
D
C
HT_NB_TO_SB
5 MIL SPACING FOR DIFF PAIR
=PP2V5_HT
64
60
7
1
C6010
0.1UF
20%
10V
2
B
CERM
402
1
C6011
0.1UF
20%
10V
2
CERM
402
60
24
7
=PP1V2_HT
1
C6000
0.1UF
20%
10V
2
CERM
402
1
C6001
0.1UF
20%
10V
2
CERM
402
1
C6002
0.1UF
20%
10V
2
CERM
402
1
C6004
0.1UF
20%
10V
2
CERM
402
1
C6005
0.1UF
20%
10V
2
CERM
402
1
C6006
0.1UF
20%
10V
2
CERM
402
1
C6007
0.1UF
20%
10V
2
CERM
402
1
C6008
0.1UF
20%
10V
2
CERM
402
10 MIL SPACING TO ANYTHING ELSE
LENGTH TOLERENCE CAN BE LOOSE
MATCHED GROUP CONSTRAINT IS TIGHT ENOUGH
HT_SB_TO_NB
HT_2V5
4 MIL SPACING IN GROUP
8 MIL SPACING TO ANYTHING ELSE
LAST MODIFIED: APR 12, 04
MASTER: GILA
B
U3LITE HT
A
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
SCALE
051-6482
NONE
SHT
60
REV.
OF
103
A
I
8
6 7
5
4
3
2
1
ELECTRICAL_CONSTRAINT_SET
Page Notes
Power aliases required by this page:
- _PP2V5_PWRON_HT
- _PP1V2_PWRON_HT
Signal aliases required by this page:
(NONE)
D
BOM options provided by this page:
- SB_HT_200M
Stuffs resistor to select 200MHz HT I/F.
C
B
NET_SPACING_TYPE
15 MIL SPACING
7 8
DIFFERENTIAL_PAIR
HT_CLK66M_SB_C
62
=PP1V2_PWRON_HT
7
62
HT_CLK66M_SB
27
=PP1V2_PWRON_HT
62
7
6
R6255
NO STUFF
R6252
4.7K
1/16W
332
1/16W
5%
MF
402
R6200
3.3
1/10W
R6210
3.3
1/10W
1
1%
MF
402
2
1
2
2 1
5%
FF
805
2 1
5%
FF
805
C6255
0.1uF
20%
10V
CERM
402
AC coupled
1.0V pk-pk
R6254
1/16W
G11
G10
B10
A10
D10
C10
B8
A8
E11
F11
D11
C11
A11
B11
C12
D12
E12
F12
A13
B13
C13
D13
E10
F10
4
1
C6230
0.1uF
20%
10V
2
CERM
402
1
C6240
0.1uF
20%
10V
2
CERM
402
HT_SB_TO_NB_CLK_P
HT_SB_TO_NB_CLK_N
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD_N<1>
HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD_P<3>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CAD_P<7>
HT_SB_TO_NB_CAD_N<7>
HT_SB_TO_NB_CTL_N
HT_LDTREQ_L
SB_HT_R100_P
SB_HT_R100_N
C6250
47pF
5
PP1V2_PWRON_HT_PLLDVDD
VOLTAGE=1.2V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
10K
2 1
5%
MF
402
1
C6200
10uF
20%
6.3V
2
CERM
1206
1
C6210
10uF
20%
6.3V
2
CERM
1206
1
2
1
C6201
1uF
10%
6.3V
2
CERM
402
PP1V2_PWRON_HT_PLLAVDD
VOLTAGE=1.2V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
1
C6211
1uF
10%
6.3V
2
CERM
402
HT_NB_TO_SB_CLK_P
60
64
HT_NB_TO_SB_CLK_N
60
64
HT_NB_TO_SB_CAD_P<0>
60
64
HT_NB_TO_SB_CAD_N<0>
60
64
HT_NB_TO_SB_CAD_P<1>
60
64
HT_NB_TO_SB_CAD_N<1>
60
64
HT_NB_TO_SB_CAD_P<2>
60
64
HT_NB_TO_SB_CAD_N<2>
60
64
HT_NB_TO_SB_CAD_P<3>
60
64
HT_NB_TO_SB_CAD_N<3>
60
64
HT_NB_TO_SB_CAD_P<4>
60
64
HT_NB_TO_SB_CAD_N<4>
60
64
HT_NB_TO_SB_CAD_P<5>
60
64
HT_NB_TO_SB_CAD_N<5>
60
64
HT_NB_TO_SB_CAD_P<6>
60
64
HT_NB_TO_SB_CAD_N<6> HT_SB_TO_NB_CAD_N<6>
60 60
64 64
HT_NB_TO_SB_CAD_P<7>
60
64
HT_NB_TO_SB_CAD_N<7>
60
64
HT_NB_TO_SB_CTL_P HT_SB_TO_NB_CTL_P
60 60
64 64
HT_NB_TO_SB_CTL_N
60
64
HT_PWROK
60
64
HT_RESET_L
60
64
HT_LDTSTOP_L
60
64
62
HT_CLK66M_SB_C
SB_HT_S100M66M
SB_SELHT100
D15
HT_CLKIN_P
C15
HT_CLKIN_N
D17
HT_CADIN_0_P
C17
HT_CADIN_0_N
B18
HT_CADIN_1_P
A18
HT_CADIN_1_N
F15
HT_CADIN_2_P
E15
HT_CADIN_2_N
D16
HT_CADIN_3_P
C16
HT_CADIN_3_N
B16
HT_CADIN_4_P
A16
HT_CADIN_4_N
D14
HT_CADIN_5_P
C14
HT_CADIN_5_N
E14
HT_CADIN_6_P
F14
HT_CADIN_6_N
B14
HT_CADIN_7_P
A14
HT_CADIN_7_N
F13
HT_CTLIN_P
E13
HT_CTLIN_N
E16
HT_PWROK_H
C18
HT_RESET_L
E17 A19
HT_LDTSTOP_L
C8
HT_REFCLK
D8
HT_S100M66M
V6
SEL_HT00_H
AGND DGND
HT_PLL
B6A6C7 C6
B19
B17
B15
HT_RXVDD
VDDP DVDD AVDD
HT HT_PLL
OMIT
U2300
SHASTA
V1.0
BGA
(3 OF 8)
HT_CADOUT_0_P
HT_CADOUT_0_N
HT_CADOUT_1_P
HT_CADOUT_1_N
HT_CADOUT_2_P
HT_CADOUT_2_N
HT_CADOUT_3_P
HT_CADOUT_3_N
HT_CADOUT_4_P
HYPERTRANSPORT
HT_CADOUT_4_N
HT_CADOUT_5_P
HT_CADOUT_5_N
HT_CADOUT_6_P
HT_CADOUT_6_N
HT_CADOUT_7_P
HT_CADOUT_7_N
HT_RXGND
G12
A17
A15
B12
G13
B9
HT_TXVDD
HT_CLKOUT_P
HT_CLKOUT_N
HT_CTLOUT_P
HT_CTLOUT_N
HT_LDTREQ_L
HT_R100P
HT_R100N
HT_TXGND
A9
A12
CERM
3
=PP2V5_PWRON_HT
1
C6220
0.1uF
20%
10V
2
CERM
402
=PP1V2_PWRON_HT
1
C6231
0.1uF
20%
10V
2
CERM
402
1
C6241
0.1uF
20%
10V
2
CERM
402
R6250
82.5
1%
1/16W
1
MF
5%
50V
402
402
2
1
C6232
0.1uF
20%
10V
2
CERM
402
=PP1V2_PWRON_HT
1
C6242
0.1uF
20%
10V
2
CERM
402
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
60
64
2 1
1
C6251
47pF
5%
50V
2
CERM
402
7
7
62
7
62
1 2
D
C
B
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:02:27 2004
8
R6253
4.7K
5%
1/16W
MF
402
HT RefClk
1 = 100MHz
0 = 66MHz
6 7
SB_HT_200M
1
R6251
2
HT I/F Speed
1 = 100MHz
0 = 200MHz
1/16W
1
1K
5%
MF
402
2
Shasta HyperTransport
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
APPLE COMPUTER INC.
5
4
3
2
D
SCALE
NONE
Master: Link
DRAWING NUMBER
051-6482
SHT
62
1
A
REV.
I
OF
103
7 8
6
5
4
3
1 2
D
SAME CONNECTORS & PINOUT AS
D
Q37 HYPERTRANSPORT BETWEEN GOLEM AND K2
NOSTUFF
J6400
P6860
ST-SM-DF
SYM_VER1
HT_NB_TO_SB_CLK_N
60
62
HT_NB_TO_SB_CLK_P
60
62
HT_NB_TO_SB_CAD_P<6>
60
62
HT_NB_TO_SB_CAD_N<6>
60
62
C
HT_NB_TO_SB_CAD_N<4>
60
62
HT_NB_TO_SB_CAD_P<4>
60
62
HT_NB_TO_SB_CAD_N<2>
60
62
HT_NB_TO_SB_CAD_P<2>
60
62
HT_NB_TO_SB_CAD_N<0>
60
62
HT_NB_TO_SB_CAD_P<0>
60
62
A15
CLK-
A14
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_N<1>
GND
A13
D15
CLK+
GND
A12
D14
D13
A11
GND
A10
D11
D12
GND
A9
D10
D9
A8
GND
A7
D7
D8
GND
A6
D6
D5
A5
GND
A4
D3
D4
GND
A3
D2
D1
A2
GND
A1
D0
60
62
60
62
60
62
60
62
60
62
60
62
60
62
60
62
HT_SB_TO_NB_CAD_P<0>
60
62
HT_SB_TO_NB_CAD_N<0>
60
62
HT_SB_TO_NB_CAD_N<2>
60
62
HT_SB_TO_NB_CAD_P<2>
60
62
HT_SB_TO_NB_CAD_P<4>
60
62
HT_SB_TO_NB_CAD_N<4>
60
62
HT_SB_TO_NB_CAD_P<6>
60
62
HT_SB_TO_NB_CAD_N<6>
60
62
HT_SB_TO_NB_CTL_P
60
62
HT_SB_TO_NB_CTL_N
60
62
NOSTUFF
J6401
P6860
ST-SM-DF
SYM_VER1
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
NOSTUFF
J6402
P6860
ST-SM-DF
SYM_VER1
NOSTUFF
R6400
=PP2V5_HT
DEVELOPMENT
R6401
10K
5%
1/16W
MF
402
DEVELOPMENT
R6402
10K
5%
1/16W
MF
402
5%
1/10W
MF
603
0
2 1
60
62
C
60
62
60
62
60
62
60
7
HT_SB_TO_NB_CLK_N
60
CLK-
B12
GND
CLK+
D13
GND
D12
D9
GND
D8
D5
GND
D4
D1
GND
D0
HT_SB_TO_NB_CAD_P<1>
D15
B11
GND
B10
HT_SB_TO_NB_CAD_N<1>
D14
B9
HT_SB_TO_NB_CAD_P<3>
D11
B8
GND
B7
HT_SB_TO_NB_CAD_N<3>
D10
B6
HT_SB_TO_NB_CAD_N<5>
D7
B5
GND
B4
HT_SB_TO_NB_CAD_P<5>
D6
B3
HT_SB_TO_NB_CAD_N<7>
D3
B2
GND
B1
HT_SB_TO_NB_CAD_P<7>
D2
60
62
60
62
60
62
60
62
60
62
60
62
60
62
60
62
62
HT_SB_TO_NB_CLK_P
62
60
HT_LDTSTOP_L
60
62
NOSTUFF
R6403
0
5%
1/10W
603
NOSTUFF
R6404
0
5%
1/10W
MF
603
HT_PWROK
60
62
2 1
2 1
TEK_HT_A12
TEK_HT_A10
TEK_HT_A9
TEK_HT_A7
A15
CLK-
A14
B12
GND
A13
D15
B11
CLK+
GND
B10
A12
D14
D13
A11
B9
GND
A10
D11
B8
D12
GND
B7
A9
D10
D9
A8
B6
GND
A7
D7
B5
D8
GND
B4
A6
D6
D5
A5
B3
GND
A4
D3
B2
D4
GND
B1
A3
D2
D1
A2
GND
A1
D0
HT_VREF_DEBUG
VOLTAGE=1.25V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
TEK_HT_B12
TEK_HT_B10
HT_RESET_L
HT_LDTREQ_L
HT_NB_TO_SB_CTL_N
HT_NB_TO_SB_CTL_P
1
2
1
2
B
LAST MODIFIED: APR 12, 04
MASTER: GILA
B
HT DEBUG CONN
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
64
SCALE
1
REV.
OF
103
A
I
7 8
6
5
4
3
1 2
ALL RESISTOR PACKS ARE 47 OHM 1/16W 5%
D
C
B
R PAKS ARE PIN SWAPPABLE ACROSS ALL SIGNALS (EXCEPT IDSELS)
PCI_SB_AD<0>
74
PCI_SB_AD<1>
74
PCI_SB_AD<2>
74
PCI_SB_AD<3>
74
PCI_SB_AD<4>
74
PCI_SB_AD<5>
74
PCI_SB_AD<6>
74
PCI_SB_AD<7>
74
PCI_SB_AD<8>
74
PCI_SB_AD<9>
74
PCI_SB_AD<10>
74
PCI_SB_AD<11>
74
PCI_SB_AD<12>
74
PCI_SB_AD<13>
74
PCI_SB_AD<14>
74
PCI_SB_AD<15>
74
PCI_SB_AD<16>
74
PCI_SB_AD<17>
74
76
PCI_SB_AD<18>
74
PCI_SB_AD<19>
74
PCI_SB_AD<20>
74
PCI_SB_AD<21>
74
PCI_SB_AD<22>
74
PCI_SB_AD<23>
74
PCI_SB_AD<24>
74
PCI_SB_AD<25>
74
PCI_SB_AD<26>
74
PCI_SB_AD<27>
77 74
74
PCI_SB_AD<28>
74
PCI_SB_AD<29>
74
PCI_SB_AD<30>
74
PCI_SB_AD<31>
74
PCI_SB_CBE_L<0>
74
PCI_SB_CBE_L<1>
74
PCI_SB_CBE_L<2>
74
PCI_SB_CBE_L<3>
74
PCI_SB_DEVSEL_L
74
PCI_SB_FRAME_L
74
PCI_SB_IRDY_L
74
PCI_SB_TRDY_L
74
PCI_SB_STOP_L
74
PCI_SB_PAR
74
RP7300
RP7303
RP7303
RP7303
RP7309
RP7300
RP7300
RP7309
RP7300
RP7301
RP7301
RP7301
RP7309
RP7309
RP7301
RP7307
RP7308
RP7307
RP7306
RP7305
RP7305
RP7302
RP7302
RP7304
RP7306
RP7305
RP7302
RP7304
RP7302
RP7304
RP7303
RP7306
RP7305
RP7304
RP7306
RP7307
RP7307
RP7308
RP7308
RP7308
R7300
47
5%
1/16W
MF
402
R7301
47
5%
1/16W
MF
402
7 2
47
8 1
7 2
5 4
7 2
8 1
6 3
5 4
5 4
7 2
8 1
5 4
8 1
6 3
6 3
8 1
8 1
2 1
7 2
6 3
8 1
7 2
8 1
6 3
8 1
5 4
6 3
2 1
7 2
5 4
5 4
7 2
6 3
7 2
5 4
6 3
8 1
5 4
6 3
6 3
5 4
7 2
PCI_AD<0>
47
PCI_AD<1>
47
PCI_AD<2>
47
PCI_AD<3>
47
PCI_AD<4>
47
PCI_AD<5>
47
PCI_AD<6>
47
PCI_AD<7>
47
PCI_AD<8>
47
PCI_AD<9>
47
PCI_AD<10>
47
PCI_AD<11>
47
PCI_AD<12>
47
PCI_AD<13>
47
PCI_AD<14>
47
PCI_AD<15>
47
PCI_AD<16>
PCI_AD<17>
47
PCI_AD<18>
47
PCI_AD<19>
47
PCI_AD<20>
47
PCI_AD<21>
47
PCI_AD<22>
47
PCI_AD<23>
47
PCI_AD<24>
47
PCI_AD<25>
47
PCI_AD<26>
PCI_AD<27>
47
PCI_AD<28>
47
PCI_AD<29>
47
PCI_AD<30>
47
PCI_AD<31>
47
PCI_CBE_L<0>
47
PCI_CBE_L<1>
47
PCI_CBE_L<2>
47
PCI_CBE_L<3>
47
PCI_DEVSEL_L
47
PCI_FRAME_L
47
PCI_IRDY_L
47
PCI_TRDY_L
47
PCI_STOP_L
47
PCI_PAR
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
76
77
74
76
77
74
76
77
74
75
76
77
74
75
76
77
74
75
76
77
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
75
76
77
74
76
77
74
76
77
74
76
77
74
76
77
74
76
77
74
76
77
74
76
77
74
76
77
74
76
77
74
76
77
D
C
B
PLACE CLOSE TO SHASTA
AD<17> IS IDSEL FOR AIRPORT
AD<27> IS IDSEL FOR USB
PCI SERIES TERMINATION
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
73
SCALE
1
REV.
OF
103
A
I
ELECTRICAL_CONSTRAINT_SET
PCI_AD
PCI_AD27
PCI_AD
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD
PCI_AD17
D
PCI_AD
PCI
PCI
PCI_CTL
PCI_CTL
PCI_CTL
PCI_CTL
PCI_CTL
Page Notes
Power aliases required by this page:
- _PP3V3_PCI
- _PP3V3_SB_PCI (can be _PP3V3_PCI)
- _PP3V3_PWRON_SB
- _PP2V5_PWRON_SB
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
PCI Devices implemented on this page:
AD11 - PCI0 (0x106B/0x0053)
AD11 - PCI1 (0x106B/0x0054)
AD11 - PCI2 (0x106B/0x0055)
AD23 - KeyLargo (0x106B/0x004F, PCI1)
C
AD28 - SATA 150 (0x1166/0x0240, PCI0 or 2)
AD29 - UATA 133 (0x106B/0x0050, PCI0 or 2)
AD30 - FireWire (0x106B/0x0052, PCI0 or 2)
AD31 - Ethernet (0x106B/0x0051, PCI0)
=PP3V3_PCI
RP7400
4.7K
5%
1/16W
B
SM1
RP7400
4.7K
5%
1/16W
SM1
RP7401
4.7K
5%
1/16W
SM1
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:02:33 2004
7
25
74
7 2
RP7400
5 4
RP7400
6 3
RP7401
75
4.7K
1/16W
4.7K
1/16W
4.7K
1/16W
76
5%
SM1
5%
SM1
5%
SM1
77
8 1
6 3
5 4
PCI_SLOTA_REQ_L
PCI_SLOTA_GNT_L
PCI_SLOTG_REQ_L
PCI_SLOTG_GNT_L
PCI_SLOTD_REQ_L
PCI_SLOTD_GNT_L
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
6
74
76
6
74
76
74
77
74
77
74
74
1 2
=PP3V3_PCI
7
25
75
74
RP7402
4.7K
1/16W
5 4
5%
1/16W
RP7402
SM1
1/16W
SM1
5%
8 1
RP7401
4.7K
1/16W
4.7K
1/16W
Master: Link
SHT
74 103
D
C
B
6 3
5%
SM1
7 2
5%
SM1
2 7
5%
SM1
A
REV.
I
OF
C7423
0.1uF
20%
10V
CERM
402
=PP3V3_PWRON_SB
1
R7455
4.7K
5%
1/16W
MF
402
2
3
1
2
1
2
U7450
=PP2V5_PWRON_SB
23
7
25
1
C7450
0.1uF
20%
10V
2
CERM
402
5
4
MC74VHC1G08
3
SOT23-5
7
23
25
1
R7450
4.7K
5%
1/16W
MF
402
2
PCI_RESET_L
88
77
76
PCI_DEVSEL_L
77
6
73
76
74
RP7402
PCI_FRAME_L
77
6
73
76
74
PCI_IRDY_L
77
6
73
76
74
PCI_TRDY_L
77
6
73
76
74
PCI_STOP_L
77
6
73
76
74
4.7K
RP7402
4.7K
Shasta PCI Interface
8
6
58
51
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
SCALE
NONE
7 8
PCI_AD<31..28>
PCI_AD<27>
PCI_AD<26..24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<21>
PCI_AD<20>
PCI_AD<19..18>
PCI_AD<17>
PCI_AD<16..0>
PCI_CBE_L<3..0>
PCI_PAR
PCI_DEVSEL_L
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
=PP3V3_SB_PCI
7
NO STUFF
1
C7410
10uF
20%
6.3V
2
CERM
805
NO STUFF
1
C7411
10uF
20%
6.3V
2
CERM
805
6
6
77
73
76
75
6
77
73
76
75
6
77
73
76
75
6
73
77
76
6
73
77
76
6
73
77
76
6
77
73
76
75
6
77
73
76
75
6
77
73
76
75
6
77
73
76
75
6
73
77
76
6
73
77
76
6
77
73
76
74
6
77
73
76
74
6
77
73
76
74
6
77
73
76
74
6
77
73
76
74
1
C7400
0.1uF
20%
10V
2
CERM
402
1
C7405
0.1uF
20%
10V
2
CERM
402
1
C7401
0.1uF
20%
10V
2
CERM
402
1
C7406
0.1uF
20%
10V
2
CERM
402
1
C7402
0.1uF
20%
10V
2
CERM
402
1
C7407
0.1uF
20%
10V
2
CERM
402
1
2
1
2
PCI_CLK66M_SB_INT
27
PCI_CLK33M_SB_EXT
8
27
C7403
0.1uF
20%
10V
CERM
402
C7408
0.1uF
20%
10V
CERM
402
5
1
C7404
0.1uF
20%
10V
2
CERM
402
1
C7409
0.1uF
20%
10V
2
CERM
402
AB9
U19
B22
AA22
PCIBR_CLK_H
PCI1CLK_H
E21
J21
H16
VDDOPC
R20
N21
M16
U2300
SHASTA
V1.0
BGA
(4 OF 8)
U21
V19
PCI
"Slot A" - AD17
PCI_SLOTA_REQ_L
6
74
76
PCI_SLOTA_GNT_L
6
74
76
"Slot G" - AD27
PCI_SLOTG_REQ_L
74
77
PCI_SLOTG_GNT_L
74
77
"Slot D" - AD20
PCI_SLOTD_REQ_L
74
PCI_SLOTD_GNT_L
74
ROM_CS_L
6
75
76
ROM_OE_L
6
75
76
ROM_WE_L
6
75
76
AB18
PCI1REQ_0_L
AA18
PCI1GNT_0_L
AB20
PCI1REQ_1_L
AB19
PCI1GNT_1_L
V17
PCI1REQ_2_L
V18
PCI1GNT_2_L
AB8
ROMCS_L
AA9
ROMOE_L
Y10
ROMRW_L PCI1RST_L
PCI1C_BE_0_L
PCI1C_BE_1_L
PCI1C_BE_2_L
PCI1C_BE_3_L
PCI1DEVSEL_L
U20
N20
J18
B20
PCIVDDP
OMIT
PCI1AD_0_H
PCI1AD_1_H
PCI1AD_2_H
PCI1AD_3_H
PCI1AD_4_H
PCI1AD_5_H
PCI1AD_6_H
PCI1AD_7_H
PCI1AD_8_H
PCI1AD_9_H
PCI1AD_10_H
PCI1AD_11_H
PCI1AD_12_H
PCI1AD_13_H
PCI1AD_14_H
PCI1AD_15_H
PCI1AD_16_H
PCI1AD_17_H
PCI1AD_18_H
PCI1AD_19_H
PCI1AD_20_H
PCI1AD_21_H
PCI1AD_22_H
PCI1AD_23_H
PCI1AD_24_H
PCI1AD_25_H
PCI1AD_26_H
PCI1AD_27_H
PCI1AD_28_H
PCI1AD_29_H
PCI1AD_30_H
PCI1AD_31_H
PCI1FRAME_L
PCI1IRDY_L
PCI1TRDY_L
PCI1STOP_L
PCI1PAR_H
4
0.1uF
20%
10V
CERM
402
SYS_WARM_RESET_L
8
25
77
1
2
1
C7420
0.1uF
L18
K19
L22
M22
M18
L20
M21
N16
M20
P22
M17
N18
M19
N19
P21
R22
P20
V21
P18
T20
R16
R17
W21
Y22
R18
T19
T18
Y21
W20
T16
AA21
T17
C7421
20%
10V
2
CERM
402
PCI_SB_AD<0>
PCI_SB_AD<1>
PCI_SB_AD<2>
PCI_SB_AD<3>
PCI_SB_AD<4>
PCI_SB_AD<5>
PCI_SB_AD<6>
PCI_SB_AD<7>
PCI_SB_AD<8>
PCI_SB_AD<9>
PCI_SB_AD<10>
PCI_SB_AD<11>
PCI_SB_AD<12>
PCI_SB_AD<13>
PCI_SB_AD<14>
PCI_SB_AD<15>
PCI_SB_AD<16>
PCI_SB_AD<17>
PCI_SB_AD<18>
PCI_SB_AD<19>
PCI_SB_AD<20>
PCI_SB_AD<21>
PCI_SB_AD<22>
PCI_SB_AD<23>
PCI_SB_AD<24>
PCI_SB_AD<25>
PCI_SB_AD<26>
PCI_SB_AD<27>
PCI_SB_AD<28>
PCI_SB_AD<29>
PCI_SB_AD<30>
PCI_SB_AD<31>
L19
PCI_SB_CBE_L<0>
P16
PCI_SB_CBE_L<1>
V22
PCI_SB_CBE_L<2>
V20
PCI_SB_CBE_L<3>
T22
PCI_SB_DEVSEL_L
T21
PCI_SB_FRAME_L
R21
PCI_SB_IRDY_L
P19
PCI_SB_TRDY_L
P17
PCI_SB_STOP_L
N17
PCI_SB_PAR
U18
SB_PCI_RESET_L
87
Shasta drives PCI RESET, but its output
may not be valid during power-up, so
it is ANDed with a reset from the SMU.
C7422
0.1uF
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
76
73
73
73
73
73
73
73
73
73
73
77
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
CERM
1
20%
10V
2
402
8
6 7
5
4
3
2
1
Page Notes
Power aliases required by this page:
- _PP3V3_PCI
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
NOTE: This page does not specify a BootROM
part number. Must use a TABLE_x_ITEM
symbol to declare U7500 part number.
D
7 8
6
5
4
3
1 2
D
=PP3V3_PCI
25
74
75
77
76
7
1
C7500
2.2uF
20%
10V
2
CERM
805
C
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
=PP3V3_PCI
25
74
75
76
76
7
74
6
R7500
10K
1/16W
ROM_CS_L
1
5%
MF
402
R7502
2
1/16W
1
R7501
10K
5%
1/16W
MF
402
2
1K
2 1
5%
MF
402
77
B
Allows ROM override module
to intercept ROM chip select
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
73
74
76
77
76
74
76
74
76
1
C7501
0.1uF
20%
10V
2
CERM
402
PCI_AD<0>
6
PCI_AD<1>
6
PCI_AD<2>
6
PCI_AD<3>
6
PCI_AD<4>
6
PCI_AD<5>
6
PCI_AD<6>
6
PCI_AD<7>
6
PCI_AD<8>
6
PCI_AD<9>
6
PCI_AD<10>
6
PCI_AD<11>
6
PCI_AD<12>
6
PCI_AD<13>
6
PCI_AD<14>
6
PCI_AD<15>
6
PCI_AD<16>
6
PCI_AD<17>
6
PCI_AD<18>
6
PCI_AD<19>
6
PCI_AD<20>
6
ROM_ONBOARD_CS_L
6
ROM_OE_L
6
ROM_WE_L
6
ROM_WP_L
6
=PCI_ROM_RESET_L
8
C7502
0.1uF
CERM
1
20%
10V
2
402
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
38
22
24
9
12
10
11 31 30
VPP VCC
U7500
FEPR-1MX8
90.0ns
TSOP
A0
A1
OMIT
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
CE
OE
WE
WP
PWD
GND
C
25
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
PCI_AD<24>
26
PCI_AD<25>
27
PCI_AD<26>
28
PCI_AD<27>
32
PCI_AD<28>
33
PCI_AD<29>
34
PCI_AD<30>
35
PCI_AD<31>
73
74
76
77
6
73
74
76
77
6
73
74
76
77
6
73
74
76
77
6
73
74
76
77
6
73
74
76
77
6
73
74
76
77
6
73
74
76
77
6
B
39 23
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:02:34 2004
8
Master: Link
BootROM
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
APPLE COMPUTER INC.
6 7
5
4
3
2
D
SCALE
NONE
051-6482
SHT
75
1
REV.
OF
103
A
I
ELECTRICAL_CONSTRAINT_SET
PCI_CLK_AIRPORT
Page Notes
Power aliases required by this page:
- _PP3V3_PCI
Signal aliases required by this page:
- _PCI_CLK33M_AIRPORT (33MHz PCI clock)
BOM options provided by this page:
D
(NONE)
PCI Devices implemented on this page:
AD17 (Slot "A") - AirPort (0x????/0x????)
NOTE: This AirPort implementation does
not support PME#.
C
B
A
NET_SPACING_TYPE
CLOCKS
7 8
DIFFERENTIAL_PAIR
_PCI_CLK33M_AIRPORT
8
I2S1_MCLK
94
25
6
I2S1_DEV_TO_SB_DTI
94
25
6
I2S1_SB_TO_DEV_DTO
94
25
6
=PP5V_PWRON_AIRPORT
7
76
SCC_RTS_L
SCC_RXDA
SCC_TXDA
6
5
4
3
1 2
D
=PP3V3_PCI
7
75
77
25
74
R7612
0
5%
1/16W
MF
402
R7610
0
5%
1/16W
MF
402
R7611
0
5%
1/16W
MF
402
R7613
0
5%
1/16W
MF
402
NO STUFF
1
C7600
10UF
20%
6.3V
2
CERM
1206
RCPT-CARD-EDGE
PCI_AIRPORT_RESET_L
8
TP_AIRPORT_RF_DISABLE
6
PCI_SLOTA_REQ_L
6
74
PCI_AD<31>
75
77
74
73
6
PCI_AD<29>
75
77
74
73
6
PCI_AD<27>
77
75
74
73
6
PCI_AD<25>
77
75
74
73
6
PCI_CBE_L<3>
77
74
73
6
PCI_AD<23>
77
74
73
6
PCI_AD<21>
77
74
73
6
PCI_AD<19>
77
75
74
73
6
PCI_AD<17>
77
75
74
73
6
PCI_CBE_L<2>
77
74
73
6
PCI_IRDY_L
77
74
73
6
AIRPORT_CLKRUN_L_PD
6
PCI_CBE_L<1>
77
74
73
6
PCI_AD<14>
77
75
74
73
6
PCI_AD<12>
75
77
74
6
73
PCI_AD<10>
77
75
74
6
73
ROM_WE_L
75
74
6
PCI_AD<8>
77
74
75
73
6
PCI_AD<7>
75
77
74
73
6
PCI_AD<5>
75
77
74
73
6
ROM_ONBOARD_CS_L
75
6
PCI_AD<3>
75
77
74
73
6
PCI_AD<1>
75
77
74
73
6
ROM_CS_L
75
74
6
2 1
I2S1_MCLK_MARTY
I2S1_DEV_TO_SB_DTI_MARTY
I2S1_SB_TO_DEV_DTO_MARTY
2 1
PP5V_PWRON_AIRPORT_MARTY
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
SIDE-A
NC
NC
NC
NC
NC
NC
NC
NC
516-0069
2 1
R7601
2 1
1/16W
402
10K
1
5%
MF
2
CRITICAL
J7600
F-ST-TH1
1
3
5
7
9
19
29
39
49
KEY
59
69
79
89
99
NO STUFF
1
C7601
10UF
20%
6.3V
2
CERM
1206
SIDE-B
2
4
6
8
10
12 11
14 13
16 15
18 17
20
22 21
24 23
26 25
28 27
30
32 31
34 33
36 35
38 37
40
42 41
44 43
46 45
48 47
50
52 51
54 53
56 55
58 57
60
62 61
64 63
66 65
68 67
70
72 71
74 73
76 75
NC
78 77
NC
80
82 81
NC
84 83
NC
86 85
NC
88 87
NC
90
NC
92 91
NC
94 93
NC
96 95
NC
98 97
NC
100
NC
1
C7602
0.1UF
20%
10V
2
CERM
402
1
C7603
0.1UF
20%
10V
2
CERM
402
_PCI_CLK33M_AIRPORT
PCI_SLOTA_GNT_L
TP_AIRPORT_PME_L
PCI_SLOTA_INT_L
PCI_AD<30>
PCI_AD<28>
PCI_AD<26>
PCI_AD<24>
6
PCI_SLOTA_IDSEL
PCI_AD<22>
PCI_AD<20>
PCI_PAR
PCI_AD<18>
PCI_AD<16>
PCI_FRAME_L
PCI_TRDY_L
PCI_STOP_L
PCI_DEVSEL_L
PCI_AD<15>
PCI_AD<13>
PCI_AD<11>
PCI_AD<9>
PCI_CBE_L<0>
ROM_OE_L
PCI_AD<6>
PCI_AD<4>
PCI_AD<2>
PCI_AD<0>
RESERVED FOR USB_DP AND USB_DN
RESERVED FOR RADIO_IO
76
8
74
6
6
25
6
77
75
74
73
6
77
75
74
73
6
77
74
75
73
6
77
75
74
73
6
77
74
73
6
77
75
74
73
6
77
74
73
6
77
75
74
73
6
77
75
74
73
6
74
77
73
6
74
77
73
6
74
77
73
6
74
77
73
6
77
74
75
73
6
77
75
74
73
6
77
75
74
73
6
77
75
74
73
6
77
74
73
6
75
74
6
77
75
74
73
6
77
75
74
73
6
75
77
74
73
6
75
77
74
73
6
R7600
22
5%
1/16W
MF
402
2 1
PCI_SB_AD<17>
73
74
C
B
AirPort Extreme
A
I
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
SIZE
DRAWING NUMBER
D
SCALE
NONE
051-6482
SHT
76
REV.
OF
103
8
6 7
5
4
3
2
1
ELECTRICAL_CONSTRAINT_SET
PCI_CLK_USB2
Page Notes
Power aliases required by this page:
- _PPVIO_PCI (to 3.3V or 5V)
Signal aliases required by this page:
- _PCI_CLK33M_USB2 (33MHz PCI clock)
BOM options provided by this page:
D
(NONE)
PCI Devices implemented on this page:
AD27 (Slot "G") - USB2 (0x1033/0x0035)
NOTE: This USB2 implementation supports
D3cold.
C
B
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:02:35 2004
NET_SPACING_TYPE
CLOCKS
DIFFERENTIAL_PAIR
PCI_SLOTG_INT_L
25
SYS_WARM_RESET_L
25
87
8
74
SYS_PME_L
25
13
=PCI_USB2_RESET_L
8
7 8
=PCI_CLK33M_USB2
6
77
8
5
4
3
1 2
D
=PPVIO_PCI_USB2
7
1
0.1uF
20%
10V
2
CERM
402
C8M4H3
VDD_PCI
CRITICAL
NEC_uPD720101_USB2
OD
OD
OD
OD
(CHIP RESET)
OD
(PCI RESET)
OD
U7700
FBGA
IPD
IPD
IPD
IPD
IPD
NANDTEST
IPD
NTEST1
TEST
SRCLK
SRDTA
SRMOD
SMC
TEB
AMC
M8
M7
N7
P7
L8
M10
M9
N9
P9
TP_NEC_NTEST1
TP_NEC_SMC
TP_NEC_TEB
TP_NEC_AMC
TP_NEC_TEST
TP_NEC_NANDTEST
TP_NEC_SRCLK
TP_NEC_SRDATA
TP_NEC_SRMOD
C
B
6
6
6
6
6
6
6
6
6
Master: Link
USB 2.0 PCI Interface
A
I
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
SIZE
DRAWING NUMBER
D
SCALE
NONE
051-6482
SHT
77
REV.
OF
103
=PP3V3_PCI
76
25
75
7
74
R7716
RP7703
47
5 4
5%
1/16W
RP7703
SM1
RP7703
47
5%
1/16W
SM1
RP7702
47
5%
1/16W
SM1
RP7702 & RP7703 required to
facilitate NAND-tree testing
6 3
RP7702
5 4
RP7702
47
5%
1/16W
SM1
47
5%
1/16W
SM1
47
5%
1/16W
SM1
76
PCI_SB_AD<27>
73
74
10K
5%
1/16W
MF
402
7 2
6 3
7 2
75
74
73
1
2
PCI_AD<27>
6
R7713
10K
1/16W
R7714
1/16W
1
5%
MF
402
2
22
5%
MF
402
1
2
R7715
4.7K
1/16W
C7703
PCI_AD<0>
76
73
6
75
74
PCI_AD<1>
6
75
76
74
73
PCI_AD<2>
6
75
76
74
73
PCI_AD<3>
76
73
75
6
74
PCI_AD<4>
76
73
75
6
74
PCI_AD<5>
6
75
76
74
73
PCI_AD<6>
6
75
76
74
73
PCI_AD<7>
6
75
76
74
73
PCI_AD<8>
6
75
76
74
73
PCI_AD<9>
6
75
76
74
73
PCI_AD<10>
76
73
75
6
74
PCI_AD<11>
75
76
6
74
73
PCI_AD<12>
76
73
75
74
6
PCI_AD<13>
76
73
75
6
74
PCI_AD<14>
76
73
75
6
74
PCI_AD<15>
76
73
75
6
74
PCI_AD<16>
76
73
75
6
74
PCI_AD<17>
76
73
75
6
74
PCI_AD<18>
76
73
75
6
74
PCI_AD<19>
76
73
75
6
74
PCI_AD<20>
76
73
75
6
74
PCI_AD<21>
73
76
6
74
PCI_AD<22>
73
76
6
74
PCI_AD<23>
73
76
6
74
PCI_AD<24>
76
73
75
6
74
PCI_AD<25>
76
73
75
6
74
PCI_AD<26>
76
73
75
6
74
(PCI_AD<27>)
PCI_AD<28>
76
73
75
6
74
PCI_AD<29>
76
73
75
6
74
PCI_AD<30>
76
73
75
6
74
PCI_AD<31>
76
73
75
6
74
PCI_CBE_L<0>
76
6
74
73
PCI_CBE_L<1>
73
76
6
74
PCI_CBE_L<2>
73
76
6
74
PCI_CBE_L<3>
73
76
6
74
PCI_PAR
73
76
6
74
PCI_FRAME_L
73
76
6
74
PCI_IRDY_L
73
76
6
74
PCI_TRDY_L
73
76
6
74
PCI_STOP_L
73
76
6
74
PCI_SLOTG_IDSEL
PCI_DEVSEL_L
73
76
6
74
PCI_SLOTG_REQ_L
74
PCI_SLOTG_GNT_L
74
NEC_PERR_L_PU
NEC_SERR_L_PU
NEC_INTA_L
NEC_INTB_L
NEC_INTC_L
=PCI_CLK33M_USB2
77
8
NEC_VBBRST_L
NEC_CRUN_L_PD
NEC_PME_L
NEC_VCCRST_L
TP_NEC_SMI_L
6
NEC_LEGC_PD
8
1
RP7703
47
5%
5%
1/16W
MF
402
SM1
2
1
M5
AD0
P5
AD1
N5
AD2
P4
AD3
N4
AD4
M3
AD5
N3
AD6
M1
AD7
L2
AD8
L1
AD9
K2
AD10
L3
AD11
K1
AD12
K3
AD13
J2
AD14
J1
AD15
F2
AD16
E3
AD17
E1
AD18
D3
AD19
D1
AD20
D2
AD21
C2
AD22
C1
AD23
B4
AD24
A4
AD25
B5
AD26
C4
AD27
A5
AD28
C5
AD29
B6
AD30
A6
AD31
M2
CBE0
J3
CBE1
F1
CBE2
C3
CBE3
J4
PAR
F3
FRAME
F4
IRDY
G1
TRDY
G3
STOP
B3
IDSEL
G2
DEVSEL
C6
REQ
D6
GNT
H2
PERR
H1
SERR
C7
INTA
B7
INTB
A7
INTC
A8
PCLK
B8
VBBRST
N6
CRUN
D9
PME
C9
VCCRST
L6
SMI
L7
LEGC
8
6 7
5
4
3
2
1
ELECTRICAL_CONSTRAINT_SET
SATA_RXD1
SATA_RXD1
SATA_TXD1
SATA_TXD1 SATA_TXD1
SATA_RXD2
SATA_RXD2
SATA_TXD2 SATA_TXD2
SATA_TXD2
D
UATA_DD
UATA_DD7
UATA_DD
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST_R
UATA_HOST_R
UATA_DEV_R_C
UATA_DEV_R
UATA_DEV_R
Page Notes
Power aliases required by this page:
- _PP1V2_PWRON_DISK
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
Net Spacing Type: SATA
Line To Line: 15 mils
C
Length Tolerance: 50 mils
Primary Max Sep: 10 mils outer
Primary Max Sep: 9 mils inner
Secondary Max Sep: 100 mils
Secondary Length: 500 mils
NOTE: Target differential impedance for
SATA data pairs is 100 ohms.
B
NET_SPACING_TYPE
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
7 8
DIFFERENTIAL_PAIR
SATA_RXD1_C
SATA_RXD1_C
SATA_TXD1
SATA_RXD2_C
SATA_RXD2_C
SATA_TXD2
SATA_RXD_P1_C
SATA_RXD_N1_C
SATA_TXD_P1
SATA_TXD_N1
SATA_RXD_P2_C
SATA_RXD_N2_C
SATA_TXD_P2
SATA_TXD_N2
UATA_DD<15..8>
UATA_DD<7>
UATA_DD<6..0>
UATA_DA<2..0>
UATA_CS0_L
UATA_CS1_L
UATA_HSTROBE
UATA_STOP
UATA_DMACK_L
UATA_RESET_L
UATA_DSTROBE
UATA_DMARQ
UATA_INTRQ
83
80
83
80
83
80
83
80
80
83
83
80
83
80
83
80
80
83
6
80
83
6
80
83
6
80
83
6
80
83
6
80
83
6
80
83
6
80
83
6
80
83
6
80
83
6
83
80
83
80
83
80
=PP1V2_PWRON_DISK_SB
7
6
SATA_VDD x 5
1
C8000
0.1uF
20%
10V
2
CERM
402
5
1
C8001
0.1uF
20%
10V
2
CERM
402
AC coupling required for any SATA pair used.
Recommend 0.1uF cap placed close to Shasta.
(Caps provided by device page)
1
C8002
0.1uF
20%
10V
2
CERM
402
83
83
83
83
83
83
83
UATA_DSTROBE
80
UATA_DMARQ
80
UATA_INTRQ
80
SATA_RXD_P1_C
80
SATA_RXD_N1_C
80
SATA_RXD_P2_C
80
SATA_RXD_N2_C
80
1
C8003
0.1uF
20%
10V
2
CERM
402
1
C8004
0.1uF
20%
10V
2
CERM
402
Y18
W15
T14
AB17
AB14
SATA_VDD
U2300
SHASTA
V1.0
(5 OF 8)
DSTROBE aka:
IORDY/HDMARDY*
HSTROBE aka:
DIOR*
STOP aka:
DIOW*
F9
UD_IDECHRDY_H
D7 E8
UD_IDEDMARQ_H
C5
UD_IDEINTRQ_H
Y17
AB15
AA15
Y16
RXDP1
RXDN1
RXDP2
RXDN2
SATA 0
SATA 1
SATA_GND
AA14
BGA
AA17
UATA
T13
OMIT
UD_IDEDD_0_H
UD_IDEDD_1_H
UD_IDEDD_2_H
UD_IDEDD_3_H
UD_IDEDD_4_H
UD_IDEDD_5_H
UD_IDEDD_6_H
UD_IDEDD_7_H
UD_IDEDD_8_H
UD_IDEDD_9_H
UD_IDEDD_10_H
UD_IDEDD_11_H
UD_IDEDD_12_H
UD_IDEDD_13_H
UD_IDEDD_14_H
UD_IDEDD_15_H
UD_IDEDA0_H
UD_IDEDA1_H
UD_IDEDA2_H
UD_IDECS1FX_L
UD_IDECS3FX_L
UD_IDEDMACK_L
UD_IDERD_L
UD_IDEWR_L
UD_IDERST_L
TXDP1
TXDN1
TXDP2
TXDN2
W16
4
J6
H7
H6
E2
C1
C2
E3
G6
G5
D4
G7
F6
C3
F5
E5
D5
E6
C4
D6
B3
B4
E4
D3
E7
AA16
AB16
Y15
Y14
UATA_DD_R<0>
UATA_DD_R<1>
UATA_DD_R<2>
UATA_DD_R<3>
UATA_DD_R<4>
UATA_DD_R<5>
UATA_DD_R<6>
UATA_DD_R<7>
UATA_DD_R<8>
UATA_DD_R<9>
UATA_DD_R<10>
UATA_DD_R<11>
UATA_DD_R<12>
UATA_DD_R<13>
UATA_DD_R<14>
UATA_DD_R<15>
UATA_DA_R<0>
UATA_DA_R<1>
UATA_DA_R<2>
UATA_CS0_L_R
UATA_CS1_L_R
UATA_DMACK_L_R
UATA_HSTROBE_R
UATA_STOP_R
UATA_RESET_L_R
SATA_TXD_P1
SATA_TXD_N1
SATA_TXD_P2
SATA_TXD_N2
3
1 2
UATA Termination
RP8000
33
UATA_DD_R<0>
80
RP8000
33
UATA_DD_R<1>
80
UATA_DD_R<2>
80
UATA_DD_R<3>
80
UATA_DD_R<4>
80
UATA_DD_R<5>
80
UATA_DD_R<6>
80
80
UATA_DD_R<7>
1
R8005
10K
5%
1/16W
MF
402
2
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
83
80
83
80
83
80
83
80
UATA_DD_R<8>
80
UATA_DD_R<9>
80
UATA_DD_R<10>
80
UATA_DD_R<11>
80
UATA_DD_R<12>
80
UATA_DD_R<13>
80
UATA_DD_R<14>
80
UATA_DD_R<15>
80
UATA_DA_R<0>
80
UATA_DA_R<1>
80
UATA_DA_R<2>
80
UATA_RESET_L_R
80
UATA_CS0_L_R
80
UATA_CS1_L_R
80
UATA_HSTROBE_R
80
UATA_STOP_R
80
UATA_DMACK_L_R
80
5%
1/16W
SM1
RP8003
33
5%
1/16W
SM1
RP8001
33
5%
1/16W
SM1
RP8002
33
5%
1/16W
SM1
RP8003
33
5%
1/16W
SM1
RP8002
33
5%
1/16W
SM1
RP8002
33
5%
1/16W
SM1
RP8003
33
5%
1/16W
SM1
RP8001
33
5%
1/16W
SM1
RP8004
33
5%
1/16W
SM1
R8001
33
5%
1/16W
MF
402
R8003
22
5%
1/16W
MF
402
6 3
5 4
7 2
8 1
7 2
5 4
6 3
8 1
5 4
6 3
2 1
2 1
5%
1/16W
SM1
RP8000
33
5%
1/16W
SM1
RP8001
33
5%
1/16W
SM1
RP8003
33
5%
1/16W
SM1
RP8002
33
5%
1/16W
SM1
RP8000
33
5%
1/16W
SM1
RP8001
33
5%
1/16W
SM1
RP8004
33
5%
1/16W
SM1
RP8004
33
5%
1/16W
SM1
RP8004
33
5%
1/16W
SM1
R8000
33
5%
1/16W
MF
402
R8002
22
5%
1/16W
MF
402
R8004
22
5%
1/16W
MF
402
5 4
7 2
8 1
6 3
7 2
8 1
6 3
8 1
7 2
5 4
2 1
2 1
2 1
UATA_DD<0>
UATA_DD<1>
UATA_DD<2>
UATA_DD<3>
UATA_DD<4>
UATA_DD<5>
UATA_DD<6>
UATA_DD<7>
UATA_DD<8>
UATA_DD<9>
UATA_DD<10>
UATA_DD<11>
UATA_DD<12>
UATA_DD<13>
UATA_DD<14>
UATA_DD<15>
UATA_DA<0>
UATA_DA<1>
UATA_DA<2>
UATA_RESET_L
UATA_CS0_L
UATA_CS1_L
UATA_HSTROBE
UATA_STOP
UATA_DMACK_L
80
6
83
80
83
6
D
80
83
6
80
6
83
80
6
83
80
83
6
80
6
83
80
83
6
80
6
83
80
6
83
80
6
83
C
80
83
6
80
6
83
80
83
6
80
6
83
80
83
6
80
83
6
80
83
6
80
6
83
80
83
6
6
6
6
6
6
B
80
83
80
83
80
83
80
83
80
83
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:02:37 2004
8
Master: Link
Shasta Disk
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
6 7
5
4
3
2
SCALE
NONE
051-6482
SHT
1
REV.
I
OF
103 80
A
1 2
DIFFERENTIAL_PAIR
D
UATA_DD<15..8>
80
6
UATA_DD<7>
6
80
UATA_DD<6..0>
80
6
UATA_DA<2..0>
80
6
UATA_CS0_L
80
6
UATA_CS1_L
80
6
UATA_HSTROBE
80
6
UATA_STOP
6
80
UATA_DMACK_L
80
6
UATA_RESET_L
6
80
UATA_DSTROBE
83
80
UATA_DMARQ
80
83
UATA_INTRQ
80
83
3
ELECTRICAL_CONSTRAINT_SET
UATA_DD
UATA_DD7
UATA_DD
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST_R
UATA_HOST_R
UATA_DEV_R_C
UATA_DEV_R
UATA_DEV_R
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
7 8
6
5
4
83
83
83
83
83
83
83
83
83
83
D
SATA CONNECTORS
PATA CONNECTOR
C8304
0.1UF
J8300
LD18077-S04
M-ST-TH
1
2
3
4
5
6
7
518-0157
SATA_TXD_P1_C
C8305
SATA_TXD_N1_C
SATA_RXD_N1
SATA_RXD_P1
0.1UF
20%
10V
CERM
402
2 1
20%
10V
CERM
2 1
402
C8308
0.1UF
2 1
20%
10V
CERM
402
C
DEVELOPMENT
C8302
0.1UF
NOSTUFF
J8302
LD18077-S04
M-ST-TH
1
2
3
4
5
6
7
SATA_TXD_P2_C
SATA_TXD_N2_C
SATA_RXD_N2
SATA_RXD_P2
DEVELOPMENT
C8303
0.1UF
20%
10V
CERM
402
2 1
518-0157
B
CRITICAL
J8303
S05B-XA
M-RT-TH
HD POWER
=PP5V_DISK
1
2
3
4
5
7
6
=PP12V_DISK
=PP3V3_DISK
7
6
7
518-0144
2 1
20%
10V
CERM
402
DEVELOPMENT
C8306
0.1UF
20%
10V
CERM
402
DEVELOPMENT
C8300
2 1
0.1UF
CERM
C8307
0.1UF
20%
10V
402
2 1
20%
10V
CERM
402
SATA_TXD_P2
SATA_TXD_N2
2 1
SATA_RXD_N2_C
SATA_RXD_P2_C
SATA_TXD_P1
SATA_TXD_N1
SATA_RXD_N1_C
SATA_RXD_P1_C
=PP5V_PATA
7
2 1
2 1
2 1
1
5.6K
5%
1/16W
MF
402
2
Per ATA Spec
83
7
83
80
83
80
83
80
83
80
80
83
83
80
83
80
83
80
80
83
83
80
83
80
80
83
=PP3V3_PATA
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
DEVELOPMENT
LED8301
NO STUFF
R8313
10K
5%
1/16W
MF
402
UATA_RESET_L
UATA_DD<6>
UATA_DD<5>
UATA_DD<4>
UATA_DD<3>
UATA_DD<2>
UATA_DD<1>
UATA_DD<0>
UATA_STOP
UATA_DSTROBE_R
UATA_INTRQ_R
UATA_DA<1>
UATA_DA<0>
UATA_CS0_L
UATA_DASP_L
UATA_CSEL_PD
UATA_DMARQ_R
2 1
GREEN
2.0X1.25A
ATA-6 spec does not call out R8180 or R8182
NO STUFF
1
2
1
R8314
4.7K
5%
1/16W
MF
402
2
Per ATA Spec
R8311
CRITICAL
J8301
804RVS
F-ST-SM
51
1
NC NC
3
5
9
19
29
39
49
NC NC
52
516S0264
1
R8318
0
5%
1/16W
MF
402
2
Per ATA Spec
1
R8317
6.2K
5%
1/16W
MF
402
2
PER ATA7 SPEC
10K
1/16W
2
4
6
8 7
10
12 11
14 13
16 15
18 17
20
22 21
24 23
26 25
28 27
30
32 31
34 33
36 35
38 37
40
42 41
44 43
46 45
48 47
50
1
5%
MF
402
2
1
R8312
1K
5%
1/16W
MF
402
2
NC
NC
Obsolete
UATA_DD<8>
UATA_DD<9> UATA_DD<7>
UATA_DD<10>
UATA_DD<11>
UATA_DD<12>
UATA_DD<13>
UATA_DD<14>
UATA_DD<15>
UATA_HSTROBE
UATA_DMACK_L
UATA_IOCS16_PU
UATA_DA<2>
UATA_CS1_L
6
83
80
83 83
6 6
80 80
6
83
80
6
83
80
6
83
80
83
6
80
6
83
80
83
6
80
6
83
80
80
6
83
6
6
83
80
80
6
83
C
B
80
80
80
80
Sourced by drive
80
80
80
80
UATA_DSTROBE
83
80
UATA_INTRQ
80
83
UATA_DMARQ
80
83
Terminate near connector
R8315
82
5%
1/16W
MF
402
R8316
1
2
82
5%
1/16W
MF
402
R8320
82
5%
1/16W
MF
402
NO STUFF
C8301
10pF
CERM
5%
50V
402
ATA-6 spec does not call out C8177
499
1/16W
R8319
1
1%
MF
402
2
=PP5V_PATA
83
7
DEVELOPMENT
R8321
UATA_DASP_L_DS
"UATA ACTIVE"
DISK CONNECTORS
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
SCALE
NONE
051-6482
SHT
83
1
REV.
OF
103
A
I
ELECTRICAL_CONSTRAINT_SET
ENET_RX_CLK
ENET_RX_CLK
ENET_GBE_REF
ENET_TX_CLK
ENET_RX
ENET_RX_CTL
ENET_RX_CTL
ENET_TX
D
ENET_TX_CTL
ENET_TX_CTL
ENET_RX_CTL
ENET_RX_CTL
ENET_MDC ENET
ENET_MDIO
Page Notes
Power aliases required by this page:
(NONE)
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
C
B
NET_PHYSICAL_TYPE
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
7 8
NET_SPACING_TYPE
10 MIL
10 MIL
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
DIFFERENTIAL_PAIR
6
ENET_CLK25M_TX
ENET_CLK125M_RX
ENET_CLK125M_GBE_REF
ENET_CLK125M_GTX
ENET_CLK125M_GTX_R
ENET_RXD<7..0>
ENET_RX_DV
ENET_RX_ER
ENET_TXD<7..0>
ENET_TX_EN
ENET_TX_ER
ENET_CRS
ENET_COL
ENET_MDC
ENET_MDIO
87
84
87
84
87
84
87
84
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
ENET_CLK25M_TX
87
84
ENET_CLK125M_RX
87
84
ENET_RXD<0>
87
84
ENET_RXD<1>
87
84
ENET_RXD<2>
87
84
ENET_RXD<3>
87
84
ENET_RXD<4>
87
84
ENET_RXD<5>
87
84
ENET_RXD<6>
87
84
ENET_RXD<7>
87
84
ENET_RX_DV
87
84
ENET_RX_ER
87
84
ENET_CLK125M_GBE_REF
87
84
ENET_CRS
87
84
ENET_COL
87
84
H5
ETH_TX_CLK_H
J3
ETH_RX_CLK_H
K1
ETH_RXD_0_H
L3
ETH_RXD_1_H
K2
ETH_RXD_2_H
J1
ETH_RXD_3_H
L4
ETH_RXD_4_H
K3
ETH_RXD_5_H
J2
ETH_RXD_6_H
G1
ETH_RXD_7_H
K4
ETH_RX_DV_H
G2
ETH_RX_ER_H
M5
ETH_REFCLK_H
L6
ETH_CRS_H
L5
ETH_COL_H
5
OMIT
U2300
SHASTA
V1.0
BGA
(6 OF 8)
ETHERNET
ETH_TXD_0_H
ETH_TXD_1_H
ETH_TXD_2_H
ETH_TXD_3_H
ETH_TXD_4_H
ETH_TXD_5_H
ETH_TXD_6_H
ETH_TXD_7_H
ETH_TX_EN_H
ETH_TX_ER_H
ETH_GTX_CLK_H
ETH_MDC_H
ETH_MDIO_H
G4
ENET_TXD_R<0>
E1
ENET_TXD_R<1>
H4
ENET_TXD_R<2>
J5
ENET_TXD_R<3>
G3
ENET_TXD_R<4>
F2
ENET_TXD_R<5>
J4
ENET_TXD_R<6>
K6
ENET_TXD_R<7>
H3
ENET_TX_EN_R
F1
ENET_TX_ER_R
K5
ENET_CLK125M_GTX_R
84
M4
ENET_MDC
M6
ENET_MDIO
4
3
1 2
D
RP8400
0K
7 2
ENET_TXD<0>
5%
5 4
6 3
5 4
6 3
2 1
1/16W
SM1
RP8400
0K
5%
1/16W
SM1
RP8401
0K
5%
1/16W
SM1
RP8401
0K
5%
1/16W
SM1
R8400
0
5%
1/16W
MF
402
R8402
0
5%
1/16W
MF
402
ENET_TXD<1>
8 1
ENET_TXD<2>
ENET_TXD<3>
7 2
ENET_TXD<4>
ENET_TXD<5>
8 1
ENET_TXD<6>
ENET_TXD<7>
2 1
ENET_TX_EN
ENET_TX_ER
2 1
ENET_CLK125M_GTX
RP8400
0K
5%
1/16W
SM1
RP8400
0K
5%
1/16W
SM1
RP8401
0K
5%
1/16W
SM1
RP8401
0K
5%
87
84
87
84
1/16W
SM1
R8401
0
5%
1/16W
MF
402
87
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
87
84
C
B
A
DRAWING
LAST_MODIFIED=Mon Dec 13 18:49:50 2004
8
Master: Link
Shasta Ethernet
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
6 7
5
4
3
2
SCALE
NONE
051-6482
SHT
1
REV.
I
OF
103 84
A
7 8
6
5
4
3
1 2
ELECTRICAL_CONSTRAINT_SET
ENET_MDI_TX
ENET_MDI_RX
ENET_XTAL
NET_SPACING_TYPE
ENET
ENET
ENET
ENET
15 MIL SPACING
15 MIL SPACING
DIFFERENTIAL_PAIR
ENET_MDI_TD
ENET_MDI_TD ENET_MDI_TX
ENET_MDI_RD ENET_MDI_RX
ENET_MDI_RD
ENET_TDP
ENET_TDN
ENET_RDP
ENET_RDN
ENET_CLK25M_XIN
ENET_CLK25M_XOUT
87
87
87
87
87
87
VOLTAGE=2.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
PP2V5_ENET
D
1
C8703
0.1UF
20%
10V
2
PP3V3_PWRON_ENET
87
7
ENET_DVDD
CLK_ENET_LINK_TX
NET_SPACING_TYPE=10 MIL
1/16W
33
RP8701
5
U8750
MC74VHC1G08
3
SOT23-5
ENETFW_RESET_L
NOSTUFF
1
C8723
1UF
20%
10V
2
CERM
603
1
C8708
0.01UF
20%
16V
2
CERM
402
CLK_ENET_LINK_RX
NET_SPACING_TYPE=10 MIL
RP8700
33
5%
1/16W
SM1
RP8701
33
1/16W
1
C8750
2
4
ETHPHYRESET_L_R
8
7
6
5
1 8
5%
0.1uF
20%
10V
CERM
402
3 6
1
2
3
4
C8701
1
C8715
0.1UF
20%
10V
2
CERM
402
R8706
33
5%
1/16W
MF
402
R8707
MF
1/16W
33
5%
87
7
90
84
(PLACE Y8700 CRYSTAL
Y8700
25.0000M
8X4.5MM-SM
1
27PF
5%
50V
2
CERM
603
2 1
NET_SPACING_TYPE=10 MIL
33
2 1
402
5%
R8711
0
5%
1/16W
MF
402
PP3V3_PWRON_ENET
R8708
ENET_MDIO
ENET_CLK25M_XIN
87
CRITICAL
2 1
87
1
C8711
10UF
20%
6.3V
2
CERM
805
ENET_CLK25M_TX
84
C
ENET_CLK125M_RX
84
84
84
ENET_CRS
84
ENET_COL
84
25
77 74
87
B
ENETFW_RESET
25
SHASTA SIGNAL IS ACTIVE HIGH
PP3V3_PWRON_ENET
I237
I238
ENET_RX_DV
ENET_RX_ER
SYS_WARM_RESET_L
8
PP3V3_PWRON_ENET
7
R8719
87
7
1
C8716
0.1UF
20%
10V
2
CERM
402
NOTE: PLACE R3128, R3100, RP 3101 CLOSE TO PHY
MAKE_BASE=TRUE
MAKE_BASE=TRUE
ENET_RXD<0>
84
ENET_RXD<1>
84
ENET_RXD<2>
84
ENET_RXD<3>
84
R8709
33
2 1
5%
1/16W
MF
402
RP8701
1/16W
PP3V3_PWRON_ENET
87
7
1K
5%
1/16W
MF
402
1
G
1
2
3
D
S
2
4 5
1
2
Q8700
2N7002
SM
5%
A
1
C8720
4.7UF
20%
10V
2
CERM
1206
KEEP ALL CAPS CLOSE TO TRANSCEIVER ON THIS PAGE
1
C8719
0.1UF
20%
10V
2
CERM
402
1
C8718
0.1UF
2
1
C8717
0.1UF
20%
10V
CERM
402
20%
10V
2
CERM
402
1
C8713
2
10UF
20%
6.3V
CERM
1206
VOLTAGE=2.5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
C8709
0.01UF
20%
16V
2
CERM
402
CLKENET_PHY_TX
ENET_TXD<0>
84
ENET_TXD<1>
84
ENET_TXD<2>
84
ENET_TXD<3>
84
ENET_TX_EN
84
ENET_TX_ER
84
CLKENET_PHY_RX
NET_SPACING_TYPE=10 MIL
ENET_PHY_RXD<0>
ENET_PHY_RXD<1>
ENET_PHY_RXD<2>
ENET_PHY_RXD<3>
ENET_PHY_RX_DV
ENET_PHY_RX_ER
ENET_PHY_CRS
ENET_PHY_COL
ETHPHYRESET_L
NET_SPACING_TYPE=10 MIL
2 1
1
1.5K
1%
1/16W
MF
603
2
CLOSE TO PHY)
ENET_CLK25M_XOUT
1
C8700
27PF
5%
50V
2
CERM
603
ENET_MDC
84
NC
NC
NC
NC
NC
PHY ADDRESS 00000
3
53
TXC
57
TXD0
58
TXD1
59
TXD2
60
TXD3
56
TXEN
52
TXER
50
RXC
48
RXD0
47
RXD1
44
RXD2
43
RXD3
49
RXDV
51
RXER
62
CRS
61
COL
9
RESET*
42
MDC
41
MDIO
6
XTALI
5
XTALO
10
PHYAD0
11
PHYAD1
12
PHYAD2
13
PHYAD3
14
PHYAD4
OGND3_JTAG_EN
87
20
2
REGDVDD
REGAVDD
55
DVDD1
DVDD2
27
AVDD1
28
AVDD2
1
OVDD1
46
OVDD2
U8700
BCM5231
TQFP
(SYM_VER2)
CRITICAL
F100/JTAG_TCK
ANEN/JTAG_TRST
LNKLED/JTAG_TDI*
SPDLED/JTAG_TMS*
RCVLED/JTAG_TDO*
OGND3/
OGND1
40
JTAG_EN
OGND2
45
64
ENET_RXD<4>
84 84
ENET_RXD<5>
84
ENET_RXD<6>
84
ENET_RXD<7>
84
DGND1
54
NOTE: LINK SUPPORT FOR GIGABIT ETHERNET
I228
I229
I230
I231
DGND2
63
ENET_RXD_PD
MAKE_BASE=TRUE
AGND1
29
R8799
NC
22
4
REFCLK
BIASVDD
TESTEN
OVDD/NC
LOW_PWR
ENERGY_DET
XMTLED*
XTALGND
AGND2
7
32
1
10K
1%
1/16W
MF
402
2
CERM
402
8
(PLACE R3126, R3127
R3117, R3118
CLOSE TO PHY)
OVDD/NC
31
TD+
30
TD-
26
RD+
25
RD-
21
NC
19
NC
NC
39
ENET_5221_FDX
FDX
37
TP_ENET_TCK
38
ANEN
15
ENET_5221_TESTEN
18
MII_EN
16
ENET_5221_LOW_PWR
17
ENET_ENERGYDET
23
RDAC
35
36
34
33
BIASGND
24
R8705
1.27K
1%
1/16W
MF
402
ENET_CLK125M_GBE_REF
R8798
1
C8704
0.01UF
20%
16V
2
CERM
402
PP3V3_PWRON_ENET
87
6
ENET_TDI
ENET_TMS
XMIT_LED
TP_ENET_TDO
ENET_RDAC_PD
1
2
PULLED DOWN OR ALIASED TO TEST POINTS HERE.
1
10K
1%
1/16W
MF
402
2
1
C8702
0.1UF
20%
10V
2
CERM
402
1
C8710
0.1UF
20%
10V
2
CERM
402
87
7
1
1
R8712
R8713
10K
10K
5%
5%
1/16W
1/16W
MF
MF
402
402
2
2
87
87
25
87
87
87
1
2
R8704 PULLDOWN ENABLES
AUTO-MDI/MDIX
ENET_5221_FDX
87
ENET_5221_TESTEN
87
ENET_5221_LOW_PWR
87
OGND3_JTAG_EN
87
ENET_TXD<4>
84
ENET_TXD<5>
84
ENET_TXD<6>
84
ENET_TXD<7>
84
ENET_CLK125M_GTX
84
R8701
R8703
R8704
10K
5%
1/16W
MF
402
1
2
49.9
1%
1/16W
MF
402
49.9
1%
1/16W
MF
402
I232
I233
I234
I235
I236
1
C8705
0.01UF
20%
16V
CERM
402
1
2
1
2
2
3
4
1
C8712
10UF
20%
6.3V
2
CERM
805
1
R8700
49.9
1%
1/16W
MF
402
2
1
R8702
49.9
1%
1/16W
MF
402
2
1
C8706
0.1UF
20%
10V
2
CERM
402
TWO OF THESE CAPS SHOULD BE NEAR
J8700 PINS 2&5
RP8702
10K
5%
1/16W
SM1
TP_ENET_TXD<4>
MAKE_BASE=TRUE
TP_ENET_TXD<5>
MAKE_BASE=TRUE
TP_ENET_TXD<6>
MAKE_BASE=TRUE
TP_ENET_TXD<7>
MAKE_BASE=TRUE
TP_ENET_CLK125M_GTX
MAKE_BASE=TRUE
1
C8707
0.1UF
20%
10V
2
CERM
402
7
6
5
8
1
C8722
0.1UF
20%
10V
2
CERM
402
PRIMARY
9
10
SYM_VER-3
1
ENET_TDP
2
3
ENET_TDN
4
ENET_RDP
5
6
ENET_RDN
7
8
11
12
RJ45
GND_CHASSIS_RJ45
1
C8714
0.1UF
20%
10V
2
CERM
402
6
6
6
6
6
7
1
2
87
87
87
C8721
0.1UF
ENET_TMS
XMIT_LED
ENET_TDI
CHIP SIDE
20%
10V
CERM
402
PP3V3_PWRON_ENET
87
7
1
R8718
4.7K
5%
1/16W
MF
603
2
SHIELD
DEVELOPMENT
1
R8717
330
5%
1/16W
MF
603
2
DS3P1
DEVELOPMENT
1
LED8702
GREEN
2.0X1.25A
2
10/100
APPLE COMPUTER INC.
ETHERNET ROUTING PRIORITY:
1. DECOUPLING CAPS
2. TX TERMINATION - LOCATE NEAR PHY
3. RX TERMINATION - LOCATE NEAR PHY
ROUTE TD OVER 2.5V PLANE (BOTTOM LAYER) ONLY
ROUTE RD OVER GROUND PLANE (TOP LAYER) ONLY
ALL DIFFERENTIAL SIGNALS SHOULD BE CLOSE,
PARALLEL, MATCHED LENGTHS, WITH MINIMUM
VIA COUNT, AND SHORT IF POSSIBLE
CLEAR OUT ALL PLANES BETWEEN MIDDLE
OF TRANSFORMER AND CONNECTOR
(514-0200)
CRITICAL
J8700
RJ45
JFM24V10
F-ST-TH
1CT:1CT
TX-SIDE
1CT:1CT
RX-SIDE
75
OHM75OHM75OHM OHM
1000PF, 2000V
87
7
DEVELOPMENT
1
R8716
330
5%
1/16W
MF
603
2
DS1P1 DS2P1
DEVELOPMENT
1
LED8701
GREEN
2.0X1.25A
2
XMIT
87
7
PP3V3_PWRON_ENET PP3V3_PWRON_ENET
ETHERNET PHY
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Mon Dec 13 20:02:41 2004
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
SCALE
NONE
75
DEVELOPMENT
1
R8715
330
5%
1/16W
MF
603
2
DEVELOPMENT
1
LED8700
GREEN
2.0X1.25A
2
LINK
051-6482
SHT
87
SECONDARY
J1
J2
J3
J4
J5
J6
J7
J8
RJ45
CABLE SIDE
1
R8714
4.7K
5%
1/16W
MF
603
2
OF
103
D
C
B
A
REV.
I
8
6 7
5
4
3
2
1
DRAWING
ELECTRICAL_CONSTRAINT_SET
FW
FW FW
FW_LPS
FW_LREQ
FW_PINT
FW_LCLK
FW_PCLK
NET_PHYSICAL_TYPE
FW
FW
FW
FW
FW
FW
7 8
NET_SPACING_TYPE
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
DIFFERENTIAL_PAIR
FW_DATA<7..0>
FW_CTL<1..0>
FW_LPS
FW_LREQ
FW_PINT
FW_CLK98M_LCLK
FW_CLK98M_PCLK
FW_CLK98M_LCLK_R
6
88
90
88
90
88
90
88
90
88
90
88
90
88
90
88
5
4
3
1 2
D
Page Notes
Power aliases required by this page:
- _PP2V5_PWRON_SB
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
C
74 25
23
=PP2V5_PWRON_SB
7
1
2
P2
P3
C8802
0.1uF
20%
10V
CERM
402
FWVDDP
U2300
SHASTA
V1.0
BGA
(7 OF 8)
FIREWIRE
A4J7N5
OMIT
PHY_DATA_0_H
PHY_DATA_1_H
PHY_DATA_2_H
PHY_DATA_3_H
PHY_DATA_4_H
PHY_DATA_5_H
PHY_DATA_6_H
PHY_DATA_7_H
PHY_CTL_0_H
PHY_CTL_1_H
PHY_LPS_H
PHY_LREQ_H
PHY_LCLK_H PHY_SCLK_H
PHY_LINKON_L PHY_PINT_L
N4
FW_DATA<0>
P5
FW_DATA<1>
N1
FW_DATA<2>
M7
FW_DATA<3>
N6
FW_DATA<4>
L1
FW_DATA<5>
M3
FW_DATA<6>
L2
FW_DATA<7>
N2
FW_CTL<0>
N3
FW_CTL<1>
P6
FW_LPS
P1
FW_LREQ
R1
88
FW_CLK98M_LCLK_R
N7
FW_LINKON
FW_PINT
1
C8801
0.1uF
20%
10V
2
CERM
402
1
C8800
0.1uF
20%
10V
2
CERM
402
88 90
90
D
C
88
90
88
90
88
90
88
90
88
90
88
90
88
90
88
90
88
90
88
90
88
90
88
90
R8800
22
5%
1/16W
MF
402
2 1
FW_CLK98M_LCLK FW_CLK98M_PCLK
88 88
90 90
B
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:02:42 2004
8
B
Master: Link
Shasta FireWire
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
6 7
5
4
3
2
SCALE
NONE
051-6482
SHT
88 103
1
REV.
I
OF
A
90
D
90
FW_TPB2P
90
90
FW_TPB1P
90
90
FW_TPA2N
90
90
C
NOTE: 49M, NOT 98M CLK
NAMING KEPT FROM NEOBORG
B
A
1
C9006
10UF
20%
6.3V
2
CERM
1206
FW_TPA1P
FW_TPA1N
FW_TPB1N
FW_TPA2P
FW_TPB2N
1
R9000
2K
5%
1/16W
MF
402
2
3
3
1
2
D9002
BAV99DW
SOT-363
D9004
BAV99DW
SOT-363
87
FW_LPS
C9035
0.1UF
20%
10V
CERM
402
3
3
D9001
BAV99DW
SOT-363
5
4
D9003
BAV99DW
SOT-363
5
4
5
4
5
4
ENETFW_RESET_L
88
FOR 1394-A
88
88
88
88
88
88
88
88
88
88
88
88
90
88
88
1
C9033
0.1UF
20%
10V
2
CERM
402
D9001
BAV99DW
SOT-363
6
D9002
BAV99DW
SOT-363
6
D9003
BAV99DW
SOT-363
6
D9004
BAV99DW
SOT-363
6
NO STUFF
R9099
FW_LREQ
FW_CLK98M_PCLK
FW_CTL<0>
FW_CTL<1>
FW_DATA<0>
FW_DATA<1>
FW_DATA<2>
FW_DATA<3>
FW_DATA<4>
FW_DATA<5>
FW_DATA<6>
FW_DATA<7>
NOT USED WITH 1394-A PHY
FW_CLK98M_LCLK
FW_PINT
AVDD BYPASS
1
C9032
0.1UF
20%
10V
2
CERM
402
PP3V3_FW
2
1
2
1
2
1
2
1
0
2 1
90
1
2
22
22
22
22
22
22
22
22
22
22
22
22
1
2
C9031
0.001UF
20%
50V
CERM
402
7 8
90
VOLTAGE=3.3V
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
NO STUFF
R9098
FW_PHY_RST_L
FW_LPS
88
8 1
2 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
8 1
7 2
6 3
TP_FW_CLK98M_LCLK
MAKE_BASE=TRUE
R9026
10K
5%
1/16W
MF
402
1
2
PP3V3_PWRON
1
4.7K
5%
1/16W
MF
402
2
RP9000
R9001
RP9000
RP9000
RP9000
RP9001
RP9001
RP9001
RP9001
RP9002
RP9002
RP9002
C9030
0.001UF
20%
50V
CERM
402
DZ9050
1N5248B
R9052
1
C9004
1000pF
5%
25V
2
CERM
603
R9022
6
NOSTUFF
R9050
3.3K
NOSTUFF
SOT23
NOSTUFF
4.7K
5%
1/16W
MF
402
1
10K
5%
1/16W
MF
402
2
1
C9029
0.001UF
20%
50V
2
CERM
402
PP24V_RUN
1
5%
1/8W
FF
1206
2
Q9050_GATE
3
1
Q9051_COLLECTOR
2 1
Q9051_BASE
C9027
27PF
2 1
5%
50V
CERM
603
C9028
27PF
2 1
5%
50V
CERM
603
FW_PHY_ISO_L
FW_LREQ_R
FW_CLK98M_PCLK_R
FW_CTL_R<0>
FW_CTL_R<1>
FW_DATA_R<0>
FW_DATA_R<1>
FW_DATA_R<2>
FW_DATA_R<3>
FW_DATA_R<4>
FW_DATA_R<5>
FW_DATA_R<6>
FW_DATA_R<7>
1
R9025
510K
5%
1/16W
MF
402
2
PP3V3_FW
R9056
3
1
FW_CLK25M_XIN
CRITICAL
1
Y9000
24.576M
SM
2
FW_CLK25M_XOUT_R
C9034
0.1UF
20%
10V
CERM
402
90
1
C9007
10UF
20%
6.3V
2
CERM
1206
6
1.3
2 1
20%
1W
FF
2512
4
D
S
NOSTUFF
Q9050
G
IRF5505
SM
1
PP24V_RUN
NOSTUFF
1
R9051
2K
5%
1/8W
FF
1206
2
NOSTUFF
1
R9053
18K
5%
1/16W
MF
402
2
Q9052_BASE
NOSTUFF
1
3
NOSTUFF
Q9051
2N3904
SM
2
NOSTUFF
R9060
R9061
470
5%
1/16W
MF
402
1
2
1
R9024
1K
5%
1/16W
MF
402
2
LREQ PULL-DOWN
ENSURES SIGNAL
LOW WHEN LUCENT
PHY POWERS UP
PART#
338S0088 CRITICAL
R9054
100K
5%
1/16W
MF
402
2
1
0
5%
1/16W
MF
402
2
2 1
FW_CLK25M_XOUT
FW_LOWPWR
25
NOSTUFF
1
R9023
10K
5%
1/16W
MF
402
2
PW_LOWPWR SHOULD BE
PULLED DOWN ON SB
DESCRIPTION
QTY
FIREWIRE PHY 802A
1
NC
CPS
MIN_LINE_WIDTH=35MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=24V
1
30
AVDD0
31
AVDD1
43
AVDD2
50
AVDD3
51
AVDD4
24
CPS
59
XI
60
XO
19
PD
28
SE
29
SM
61
RESET
23
ISO
16
LPS
1
LREQ
57
PLLVDD
63
SYSCLK
3
CTL0
4
CTL1
5
D0
6
D1
8
D2
9
D3
10
D4
11
D5
12
D6
13
D7
15
CNA
2
DGND0
14
DGND1
25
DGND2
56
DGND3
64
DGND4
NOSTUFF
1
R9055
1K
5%
1/16W
MF
402
2
Q9053_BASE
3
NOSTUFF
Q9052
2N3904
SM
2
U9000
FW803
FLAS
OMIT
5
NOSTUFF
Q9053
NTR4101P
DVDD0
DVDD1
DVDD2
DVDD3
DVDD4
TPBIAS0
TPBIAS1
TPBIAS2
TPA0+
TPA0ÂTPB0+
TPB0ÂTPA1+
TPA1ÂTPB1+
TPB1ÂTPA2+
TPA2ÂTPB2+
TPB2-
PLLVSS
C/LKON
AGND0
AGND1
AGND2
AGND3
REFERENCE DESIGNATOR(S)
SOT-23
R0
R1
PC2
PC1
PC0
1
U9000
2
S
G
D
3
7
17
26
27
62
37
42
48
36
35
34
33
41
40
39
38
47
46
45
44
54
55
22
21
20
58
18
32
49
52
53
DVDD BYPASS
1
C9008
2
1
10UF
20%
6.3V
CERM
1206
C9026
2
0.1UF
20%
10V
CERM
402
1
2
C9025
0.1UF
20%
10V
CERM
402
1
2
C9023
0.1UF
20%
10V
CERM
402
1
C9022
2
0.001UF
20%
50V
CERM
402
PP3V3_ALL
1
R9057
0
5%
1/8W
FF
1206
2
PP3V3_FW
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V
PP3V3_FW
NC
FW_TPA1P
90
90
FW_TPA1N
FW_TPB1P
90
90
FW_TPB1N
90
FW_TPA2P
90
FW_TPA2N
90
FW_TPB2P
90
FW_TPB2N
NC
NC
NC
NC
FW_R0
FW_R1
CRITICAL BOM OPTION
1
C9002
0.001UF
20%
50V
2
CERM
402
59
11
7
90
90
PP1V8_FW_BIAS1
PP1V8_FW_BIAS2
1
R9019
2.49K
1%
1/16W
MF
402
2
FW_LINKON
1
R9020
4.7K
5%
1/16W
MF
402
2
1
C9001
0.001UF
20%
50V
2
CERM
402
4
D9000
MURS320T3
SM
C9009
0.1UF
CERM
1
R9021
390K
5%
1/16W
MF
2
402
VOLTAGE=1.8V
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
VOLTAGE=1.8V
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
88
TABLE_5_HEAD
TABLE_5_ITEM
2 1
20%
50V
805
1
2
NEW PS
FW_CPS
MIN_LINE_WIDTH=35MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=24V
RAMP
CHOICE A
CHOICE B
1
C9015
0.47UF
20%
10V
2
CERM
603
1
R9018
56.2
1%
1/16W
MF
402
2
1
C9021
220PF
5%
25V
2
CERM
402
CRITICAL
R9002
1.3
20%
1W
FF
2512
1
R9015
56.2
1%
1/16W
MF
402
2
1
2
1
2
SLEEP
OFF
SLEEP
OFF
SLEEP
OFF
R9016
56.2
1%
1/16W
MF
402
R9017
4.99K
1%
1/16W
MF
402
2 1
FW_CPS_R PP24V_FW
MIN_LINE_WIDTH=35MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=24V
PORT POWER
OFF
OFF
ON ON
OFF
ON
ON
1
R9014
56.2
1%
1/16W
MF
402
2
1
R9013
56.2
1%
1/16W
MF
402
2
FW_TPB1 FW_TPB2
1
C9019
220PF
5%
25V
2
CERM
402
1
2
R9007
C9016
0.47UF
20%
10V
CERM
603
3
L9001
FERR-160-OHM
0
2 1
5%
1/8W
FF
1206
PHY
ON
ON
ON
ON
ON
1
R9010
56.2
1%
1/16W
MF
402
2
1
R9011
56.2
1%
1/16W
MF
402
2
1
R9012
4.99K
1%
1/16W
MF
402
2
1206
*
6
FW_VGND
FW_VP
2 1
1
R9009
56.2
1%
1/16W
MF
402
2
ELECTRICAL_CONSTRAINT_SET
FW_TPA1
FW_TPA1 FW_TPA1
FW_TPB1
FW_TPB1
FW_TPA1 FW_TPO1
FW_TPA1
FW_TPB1
FW_TPB1
FW_TPA2 FW_TPA2
FW_TPA2
FW_TPB2 FW_TPB2
FW_TPB2 FW_TPB2
FW_TPA2
FW_TPA2
FW_TPB2
FW_TPB2 FW_TPI2
FW_XTAL
VOLTAGE=24V
MIN_LINE_WIDTH=35MIL
MIN_NECK_WIDTH=10MIL
FL9000
165-OHM
SM
SYM_VER-1
165-OHM
SYM_VER-1
165-OHM
SYM_VER-1
165-OHM
SYM_VER-1
4
3 2
SM
4
3 2
SM
4
3 2
SM
4
3 2
1
FL9001
1
FL9002
1
FL9003
1
8 WATTS MAX
24 VOLTS
NET_SPACING_TYPE
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
15 MIL SPACING
15 MIL SPACING
APPLE COMPUTER INC.
1 2
FW_TPO1P
6
90
6
FW_TPO1N
90
6
90
FW_TPI1P
6
90
FW_TPI1N
6
1
F9002
0.5AMP
SM
2
C9010
100PF
50V
CERM
402
F9000
1.5AMP-33V
SM
1
C9000
0.01UF
10%
50V
2
CERM
805
GND_CHASSIS_FIREWIRE
DIFFERENTIAL_PAIR
FW_TPA1
FW_TPB1
FW_TPB1
FW_TPO1
FW_TPI1
FW_TPI1
FW_TPA2
FW_TPO2
FW_TPO2
FW_TPI2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
FW_VP_PORT1
VOLTAGE=24V
MIN_LINE_WIDTH=35MIL
MIN_NECK_WIDTH=10MIL
1
C9024
0.01UF
10%
50V
2
CERM
805
GND_CHASSIS_FIREWIRE
2 1
5%
6
90
6
90
6
90
6
90
2 1
7
90
C9018
0.01UF
10%
16V
CERM
402
FW_TPO2P
FW_TPO2N
FW_TPI2P
FW_TPI2N
FW_VP_PORT2
6
MIN_LINE_WIDTH=35MIL
MIN_NECK_WIDTH=8MIL
1
C9005
0.01UF
10%
16V
2
CERM
402
C9011
100PF
2 1
5%
50V
CERM
402
1
GND_CHASSIS_FIREWIRE
2
MIN_LINE_WIDTH=30MIL
MIN_NECK_WIDTH=25MIL
7
90
6
5
4
3
1
2
GND_CHASSIS_FIREWIRE
FW_TPA1P
FW_TPA1N
FW_TPB1P
FW_TPB1N
FW_TPO1P
FW_TPO1N
FW_TPI1P
FW_TPI1N
FW_TPA2P
FW_TPA2N
FW_TPB2P
FW_TPB2N
FW_TPO2P
FW_TPO2N
FW_TPI2P
FW_TPI2N
X_TAL_IN
X_TAL_OUT
FIREWIRE PHY
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
90
SCALE
VERTICAL
CONNECTORS
PORT 1
514-0202
J9000
FWS22
F-ST-TH
6
5
4
3
1
2
PORT 2
514-0202
CRITICAL
J9001
FWS22
F-ST-TH
OF
103
CRITICAL
7
90
90
90
90
90
6
6
6
6
90
90
90
90
6
6
6
6
TPO
TPO#
TPI
TPI#
VP
VGND
9 8 7
TPO
TPO#
TPI
TPI#
VP
VGND
9 8 7
90
90
90
90
90
90
90
90
REV.
D
10
C
10
7
90
B
A
I
8
6 7
5
4
3
2
1
ELECTRICAL_CONSTRAINT_SET
USB2_1
USB2_2 USB2_2
USB2_2
USB2_3 USB2_3
USB2_3
D
USB2_4
USB2_4 USB2_4
USB2_NEC_XTAL
Page Notes
Power aliases required by this page:
- _PP3V3_PWRON_USB
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
Net Spacing Type: USB2
Line To Line: 19.5 mils
Length Tolerance: 50 mils
Primary Max Sep: 7.5 mils
Secondary Max Sep: 100 mils
Secondary Length: 500 mils
NOTE: Target differential impedance for
USB2 data pairs is 90 ohms.
C
U2300
SHASTA
V1.0
BGA
(8 OF 8)
OMIT
B
A
DRAWING
LAST_MODIFIED=Mon Dec 13 20:02:45 2004
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
P7
P8
R3
R4
R5
R6
R7
R8
T1
T2
T3
T4
T5
T6
T7
T8
U1
U2
U3
U4
U5
U6
V1
V2
V3
V4
W1
W3
Y1
Y3
NET_PHYSICAL_TYPE
TP_SB_NC_P7
TP_SB_NC_P8
TP_SB_NC_R3
TP_SB_NC_R4
TP_SB_NC_R5
TP_SB_NC_R6
TP_SB_NC_R7
TP_SB_NC_R8
TP_SB_NC_T1
TP_SB_NC_T2
TP_SB_NC_T3
TP_SB_NC_T4
TP_SB_NC_T5
TP_SB_NC_T6
TP_SB_NC_T7
TP_SB_NC_T8
TP_SB_NC_U1
TP_SB_NC_U2
TP_SB_NC_U3
TP_SB_NC_U4
TP_SB_NC_U5
TP_SB_NC_U6
TP_SB_NC_V1
TP_SB_NC_V2
TP_SB_NC_V3
TP_SB_NC_V4
TP_SB_NC_W1
TP_SB_NC_W3
TP_SB_NC_Y1
TP_SB_NC_Y3
1 2
Master: Fizzy
REV.
I
SHT
OF
91 103
D
C
B
A
USB_NEC_N<0>
(USB2_N<0>)
(USB2_P<0>)
USB_NEC_P<0>
USB_NEC_N<1>
(USB2_N<1>)
(USB2_P<1>)
USB_NEC_P<1>
USB_NEC_N<2>
(USB2_N<2>)
(USB2_P<2>)
USB_NEC_P<2>
USB_NEC_N<3>
(USB2_N<3>)
(USB2_P<3>)
USB_NEC_P<3>
USB_NEC_N<4>
(USB2_N<4>)
(USB2_P<4>)
USB_NEC_P<4>
NEC_RREF_PD
R9138
9.09K
1/16W
3
R9100
36
2 1
1%
1/16W
MF
402
R9101
36
1%
1/16W
MF
402
R9102
36
1%
1/16W
MF
402
R9103
36
1%
1/16W
MF
402
R9104
36
1%
1/16W
MF
402
R9105
36
1%
1/16W
MF
402
R9106
36
1%
1/16W
MF
402
R9107
36
1%
1/16W
MF
402
R9108
36
1%
1/16W
MF
402
R9109
36
1%
1/16W
MF
402
1
1%
MF
402
2
USB2_N<0>
USB2_P<0>
2 1
2 1
USB2_N<1>
USB2_P<1>
2 1
2 1
USB2_N<2>
USB2_P<2>
2 1
2 1
USB2_N<3>
USB2_P<3>
2 1
2 1
USB2_N<4>
USB2_P<4>
2 1
92
91
92
91
92
91
92
91
92
91
92
91
94
91
94
91
91
92
92
91
USB Host Interfaces
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
SCALE
NONE
051-6482
CERM
CERM
6
91
92
91
92
91
92
91
92
91
92
91
92
91
94
91
94
91
92
91
92
91
91
91
C9122
0.1uF
CERM
C9127
0.1uF
CERM
1
C9123
20%
10V
2
402
1
C9128
20%
10V
2
402
1
20%
10V
2
402
1
20%
10V
2
402
0.1uF
CERM
0.1uF
CERM
1
20%
10V
2
402
1
20%
10V
2
402
91
7
C9124
0.1uF
CERM
C9129
0.1uF
CERM
=PP3V3_PWRON_USB
20%
10V
402
20%
10V
402
1
2
1
2
5
C9125
0.1uF
CERM
C9130
0.1uF
CERM
FERR-EMI-100-OHM
1
20%
10V
2
402
1
20%
10V
2
402
L9135
SM
R9135
4.7
5%
1/16W
MF
603
P2
PP3V3_PWRON_NEC_AVDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=10 mil
2 1
C9135
10uF
20%
VDD
6.3V
CERM
805
N8E2A3
L13
J13
2 1
P3
A12
A13
P12
7 8
NET_SPACING_TYPE
USB2 USB2
USB2 USB2
USB2 USB2
USB2 USB2
USB2 USB2
USB2 USB2
USB2 USB2
USB2 USB2
USB2 USB2
USB2 USB2
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
DIFFERENTIAL_PAIR
USB2_0 USB2_0
USB2_0 USB2_0
USB2_1
USB2_1 USB2_1
USB2_2
USB2_3
USB2_4
C9120
10uF
20%
6.3V
CERM
805
USB2_P<0>
USB2_N<0>
USB2_P<1>
USB2_N<1>
USB2_P<2>
USB2_N<2>
USB2_P<3>
USB2_N<3>
USB2_P<4>
USB2_N<4>
NEC_CLK30M_XT1
NEC_CLK30M_XT2
NEC_CLK30M_XT2_R
1
C9121
2
C9126
0.1uF
0.1uF
NEC_uPD720101_USB2
=PP3V3_PWRON_USB
91
7
5%
MF
402
1
2
2 1
5678
RP9110
10K
5%
1/16W
SM1
4321
(USB2_OC<0>)
(USB2_OC<1>)
(USB2_OC<2>)
(USB2_OC<3>)
(USB2_OC<4>)
USB2_PWREN<0>
92
USB2_PWREN<1>
92
USB2_PWREN<2>
92
USB2_PWREN<3>
92
USB2_PWREN<4>
92
1
R9141
1.5K
5%
1/16W
MF
402
2
NEC_NC1_PU
NEC_NC2_PU
91
NEC_CLK30M_XT1
91
NEC_CLK30M_XT2_R
2
R9145
100
5%
1/16W
MF
402
1
NEC_CLK30M_XT2
1
C9146
22pF
5%
50V
2
CERM
402
B12
OCI1
B11
OCI2
B10
OCI3
A10
OCI4
B9
OCI5
C12
PPON1
A11
PPON2
C11
PPON3
C10
PPON4
A9
PPON5
P6
NC1
M6
NC2
L9
XT1/SCLK
P8
XT2
91
VSS
N1
B1
N14
P10
N2B2A2
B14
H14
N13
2
R9110
10K
5%
1/16W
MF
402
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
USB2_OC<0>
92
USB2_OC<1>
92
USB2_OC<2>
92
USB2_OC<3>
94
USB2_OC<4>
92
91
7
C9145
22pF
1
=PP3V3_PWRON_USB
R9140
1.5K
1/16W
CRITICAL
Y9145
30.0000M
8X4.5MM-SM
1
5%
50V
2
CERM
402
Y9145 LOAD CAPACITANCE IS 16pF
D13
F13
H13
CRITICAL
U7700
L12
M11
B13
4
C9136
0.1uF
CERM
H4
G12
FBGA
D12
H12
0.1uF
20%
10V
CERM
402
R9139
0
5%
1/16W
MF
603
1
2
N12
N10
M14
AVDD
RSDM1
M13
DM1
L14
DP1
K13
RSDP1
K14
RSDM2
K12
DM2
J14
DP2
J12
RSDP2
H11
RSDM3
G11
DM3
G13
DP3
G14
RSDP3
F12
RSDM4
F14
DM4
E12
DP4
E14
RSDP4
E13
RSDM5
D14
DM5
C13
DP5
C14
RSDP5
P11
RREF
AVSS
AVSS(R)
N11
M12
P13
1 2
Tie to GND at ball N11
GND_NEC_AVSS_R
VOLTAGE=0V
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=10 mil
1
C9137
20%
10V
2
402
D7
D8
G4
F11
J11
8
6 7
5
4
3
2
1
ELECTRICAL_CONSTRAINT_SET
PROVIDED
BY
USB
CONTROLLER
I526
I527
D
Page Notes
Power aliases required by this page:
- _PP5V_PWRON_USB
- _PP5V_PWRON_UDASH
- _PP3V3_PWRON_UDASH
- _PP3V3_PWRON_BT
Signal aliases required by this page:
(NONE)
NOTE: This page is expected to contain the
necessary aliases to map the
USB pairs to their appropriate
destinations and/or to properly
terminate unused signals.
BOM options provided by this page:
(NONE)
NOTE: USB pairs are NOT constrained on
this page. It is assumed that the
USB Host Controller page will
provide the appropriate constraints
to apply to entire USB D+/D- XNets.
C
B
A
neoBorg Implementation
NOTE: This design does not provide power
control on USB ports 2-4. Rename
USB controller outputs to indicate
single-pin connections.
USB2_PWREN<0>
91
USB2_PWREN<1>
91
USB2_PWREN<2>
91
USB2_PWREN<3>
91
USB2_PWREN<4>
91
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
USB2_OC<0>
91
USB2_OC<1>
91
USB2_OC<2>
91
TP_USB2_PWREN<0>
TP_USB2_PWREN<1>
TP_USB2_PWREN<2>
TP_USB2_PWREN<3>
TP_USB2_PWREN<4>
NET_SPACING_TYPE
USB2
USB2
USB2 USB2_PORT2_F
USB2
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
6
6
6
6
6
_PP5V_PWRON_USB
7
ALIAS
ALIAS
ALIAS
7 8
DIFFERENTIAL_PAIR
USB2_PORT1_F
USB2_PORT1_F USB2
USB2_PORT2_F
USB2_PORT3_F USB2
USB2_PORT3_F
USB_OC
MAKE_BASE=TRUE
USB2_PORT1_P_F
USB2_PORT1_N_F
USB2_PORT2_P_F
USB2_PORT2_N_F
USB2_PORT3_P_F
USB2_PORT3_N_F
F9200
2AMP-6V
SM-1
6
92
6
92
6
92
6
92
6
92
6
92
6
5
4
3
1 2
External USB Ports
D
L9210
PP5V_USB2
59
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
L9211
FERR-250-OHM
L9212
FERR-250-OHM
1
2
1
1
R9211
15K
5%
1/16W
MF
402
2
L9220
FERR-250-OHM
L9221
FERR-250-OHM
USB2_N<0>
91
USB2_P<0>
91
ALIAS
ALIAS
USB2_PORT1_N
MAKE_BASE=TRUE
USB2_PORT1_P
MAKE_BASE=TRUE
R9210
15K
1/16W
5%
MF
402
L9222
1
2
5%
MF
402
1
2
1
R9221
15K
5%
1/16W
MF
402
2
1
FERR-250-OHM
FERR-250-OHM
1
1
R9231
15K
5%
1/16W
MF
402
2
USB2_N<1>
91
USB2_P<1>
91
2 1
1
R9200
160
5%
1/16W
MF
603
2
1
R9201
300
5%
1/16W
MF
603
2
USB2_P<2>
91
USB2_N<2>
91
ALIAS
ALIAS
ALIAS
ALIAS
USB2_PORT2_N
MAKE_BASE=TRUE
USB2_PORT2_P
MAKE_BASE=TRUE
R9220
USB2_PORT3_P
MAKE_BASE=TRUE
USB2_PORT3_N
MAKE_BASE=TRUE
R9230
15K
1/16W
5%
MF
402
1/16W
15K
2 1
SM
SM
GND_USB2_PORT1
VOLTAGE=0V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=20MIL
165-OHM
SM
SYM_VER-1
SM
SM
GND_USB2_PORT2
VOLTAGE=0V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=20MIL
165-OHM
SM
SYM_VER-1
1
2
2 1
4
3 2
2 1
1
2
2 1
4
3 2
L9230
2 1
SM
L9231
2 1
SM
GND_USB2_PORT3
VOLTAGE=0V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=20MIL
L9232
165-OHM
SM
SYM_VER-1
4
3 2
NOSTUFF
C9210
150uF
20%
6.3V
POLY
SMD
92
6
USB2_PORT1_N_F
92
USB2_PORT1_P_F
6
NOSTUFF
C9220
150uF
20%
6.3V
POLY
SMD
USB2_PORT2_N_F
92
6
92
USB2_PORT2_P_F
6
NOSTUFF
1
C9230
150uF
20%
6.3V
2
POLY
SMD
92
USB2_PORT3_P_F
6
92
USB2_PORT3_N_F
6
1
2
C9212
0.01uF
CERM
1
2
C9222
0.01uF
CERM
C9232
0.01uF
6
NOSTUFF
C9211
10uF
10%
16V
X5R
1210
1
20%
16V
2
402
NO STUFF
C9214
33pF
50V
CERM
402
PP5V_USB2_PORT2_F
6
NOSTUFF
C9221
10uF
10%
16V
X5R
1210
1
20%
16V
2
402
NO STUFF
C9224
33pF
50V
CERM
402
NOSTUFF
1
C9231
10uF
10%
16V
2
X5R
1210
1
20%
16V
2
CERM
402
NO STUFF
C9234
33pF
PP5V_USB2_PORT1_F
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
C9213
5%
C9223
5%
1
0.01uF
20%
16V
2
CERM
402
NO STUFF
1
1
C9215
33pF
5%
50V
2
2
CERM
402
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
1
0.01uF
20%
16V
2
CERM
402
NO STUFF
1
1
C9225
33pF
5%
50V
2
2
CERM
402
6
PP5V_USB2_PORT3_F
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
0.01uF
1
5%
2
CERM
20%
16V
402
1
2
NO STUFF
1
C9235
33pF
5%
50V
2
CERM
402
C9233
50V
CERM
402
VDD
D-
D+
GND
GND_CHASSIS_USB
VDD
D-
D+
GND
GND_CHASSIS_USB
VDD
DÂD+
GND
CRITICAL
J9210
USB-UAS25
F-ST-TH
5
6
1
2
3
4
7
514-0199
MIN_NECK_WIDTH=15MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=0
CRITICAL
J9220
USB-UAS25
F-ST-TH
5
6
1
2
3
4
7
514-0199
CRITICAL
J9230
USB-UAS25
F-ST-TH
5
6
1
2
3
4
7
514-0199
GND_CHASSIS_USB
PORT 1
92
7
PORT 2
92
7
PORT 3
92
7
Q37 BlueTooth Connector
_PP3V3_PWRON_BT
R9240
15K
1/16W
7
1
5%
MF
402
2
APPLE COMPUTER INC.
USB2_OC<4>
91
USB2_N<4>
91
USB2_P<4>
91
ALIAS
ALIAS
ALIAS
USB_BT_N
6
MAKE_BASE=TRUE
USB_BT_P
6
MAKE_BASE=TRUE
C9240
10uF
1
R9241
15K
5%
1/16W
MF
402
2
SDF9200
STDOFF-197OD-283H-TH
1
CRITICAL
J9240
53353
M-ST-SM
1
9
2
4 3
6 5
8 7
10
6.3V
CERM
C9241
0.1uF
CERM
1
20%
10V
2
402
1
20%
2
805
516S0097
SDF9201
STDOFF-197OD-283H-TH
1
USB Device Interfaces
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
SCALE
NONE
051-6482
SHT
C
B
NC
NC
NC
NC
NC
A
REV.
OF
92
I
103
8
6 7
5
4
3
2
1
Page Notes
Power aliases required by this page:
- _PP3V3_PWRON_MODEM
Spec Load: 0.5 A active, 3 mA auxiliary
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)
D
7 8
6
5
4
3
1 2
D
SOFT MODEM IS PLAN OF RECORD
NOSTUFF
SDF9402
STDOFF-4MM-9MMH-TH
1
Q52 Modem Connector
SDF9400
STDOFF-4MM-9MMH-TH
1
MICRODASH MODEM CONNECTOR LEFT ON FOR DEVELOPMENT PURPOSES ONLY
MicroDash Modem Connector
CRITICAL
J9401
C104A-H9.0
F-ST-SM
35
NC
NC
_PP3V3_PWRON_MODEM
7
94
1
C9450
10UF
20%
6.3V
2
CERM
805
1
C9451
0.1UF
20%
10V
2
CERM
402
C
I2S1_SB_TO_DEV_DTO
25
76
6
I2S1_RESET_L
25
94
6
I2S1_MCLK
25
94
76
6
NC
NC
NC
NC
NC
NC
NC
NC
NC
32 31
NC
2
1
3
9
19
29
36
NC
4
NC
6 5
8 7
10
NC
12 11
NC
14 13
16 15
NC
18 17
NC
20
22 21
24 23
26 25
28 27
30
34 33
NC
MODEM_RING2SYS_L
MODEM_FC_RGDT
I2S1_SYNC
I2S1_DEV_TO_SB_DTI
I2S1_BITCLK
_PP3V3_PWRON_MODEM
25
94
6
1
R9451
10K
5%
1/16W
MF
402
2
25
94
6
25
94 94
76
6
25
94
6
94
7
_PP3V3_PWRON_UDASH
7
DEVELOPMENT
C9400
4.7uF
20%
10V
CERM
1206
MODEM_RING2SYS_L SHOULD BE PULLED UP ON SB
516S0116
SDF9401
STDOFF-4MM-9MMH-TH
GND_CHASSIS_MODEM
1
DEVELOPMENT
1
C9401
2
25
25
94
76
25
94
25
94
18
91
0.1uF
6
6
6
6
6
USB2_OC<3>
20%
10V
CERM
402
UDASH_SDOWN
Default to Modem On
I2S1_DEV_TO_SB_DTI
I2S1_SYNC
MODEM_RING2SYS_L
I2C_UDASH_SCL
DEVELOPMENT
1
R9400
2
ALIAS
10K
1/16W
NOSTUFF
2
1
R9401
10K
5%
5%
1/16W
MF
MF
402
402
1
2
(+3.3V)
(GND)
(SDOWN)
(GND)
(RXD)
(GPIO*)
(GND)
(RING*)
(HOOK)
(GND)
(SCL)
(GND)
(A0)
(SNDIN)
(SNDOUT)
DEVELOPMENT
J9400
F-ST-SM
1
3
5
7
9
11
13
15
17
NC
19
21
23
25
27
NC
29
NC
5047
2
(+3.3V)
4
(RST*)
6
(RTS*)
8
(DTR*)
10
(GND)
12
(TXD*)
14
(TRXC)
16
(GND)
18
(D-)
20
(D+)
22
(GND)
24
(SDA)
26
(A1)
28
(+5V)
30
(+5V)
516S0121
DEVELOPMENT
1
R9402
10K
5%
1/16W
MF
402
2
UDASH_RESET_L
I2S1_MCLK
I2S1_RESET_L
I2S1_SB_TO_DEV_DTO
I2S1_BITCLK
USB_UDASH_N
6
MAKE_BASE=TRUE
USB_UDASH_P
6
MAKE_BASE=TRUE
I2C_UDASH_SDA
UDASH_I2C_A1_PU
DEVELOPMENT
1
C9402
0.1uF
20%
10V
2
CERM
402
6
_PP5V_PWRON_UDASH
DEVELOPMENT
1
C9403
10uF
20%
6.3V
2
CERM
1206
25
6
25
94
76
6
25
94
6
25
94
76
6
25
94
6
USB2_N<3>
ALIAS
USB2_P<3>
ALIAS
18
6
R9404
7
15K
1/16W
1
1
R9403
15K
5%
5%
1/16W
MF
MF
402
402
2
2
91
91
C
RJ11 CONNECTOR
STUFFED AT FATP
SYMBOL USED FOR PLACEMENT
B
OMIT
J9402
RJ11-HGT27.5
ST-TH
1
2
B
514-0205
From Intel Mobile Audio/Modem
Daughter Card Specification
Rev 1.0, February 22, 1999
1 - MONO_OUT/PC_BEEP
3 - GND
5 - AUXA_RIGHT
7 - AUXA_LEFT
9 - CD_GND
11 - CD_RIGHT
13 - CD_LEFT
15 - GND
17 - 3.3Vaux
19 - GND
21 - 3.3Vmain
23 - AC97_SDATA_OUT 24 - AC97_SDATA_INB
25 - AC97_RESET#
A
27 - GND
29 - AC97_MSTRCLK
8
2 - AUDIO_PWRON
4 - MONO_PHONE
6 - RESERVED
8 - GND
10 - 5Vmain
12 - RESERVED
14 - RESERVED
16 - PRIMARY_DN
18 - 5Vd
20 - GND
22 - AC97_SYNC
26 - AC97_SDATA_INA
28 - GND
30 - AC97_BITCLK
6 7
Modem Interface
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
APPLE COMPUTER INC.
5
4
3
2
D
SCALE
NONE
051-6482
SHT
94
1
REV.
OF
103
A
I
7 8
6
5
4
3
1 2
D
AUDIO CODEC
APPLE P/N 353S0655
1
2
2 1
33
2 1
5%
MF
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
VOLTAGE=3.3V
PPV_3V3_AUDIO_CODEC
U9500
CRITICAL
AUDI2S0OUT
AUDSPDIFOUT
NC
NC
9
11
10
13
14
12
21
20
19
18
17
1
BCK
LRCK
DOUT
DOUTS
DIN
I2CEN
ADR
SCL
SDA
PDWN*
SCKI
ATEST
16
VDD
PCM3052
15
VQFN
7
8
AGND DGND
VCC
23
22
31
VINL
VINR
VOUTL
VOUTR
VCOM
VREF1
VREF2
VREFS
REFO
MBIAS
MINM
MINP
30
2
6
25
24
26
4
5
3
32
27
28
29
1
2
AUD_PCM_REF1
AUD_PCM_REF2
C9501
1UF
10%
10V
CERM
805
1
C9504
0.1UF
10%
16V
2
X7R
603
C9505
1
C9502
1UF
10%
10V
2
CERM
805
0.1UF
PP4V5_AUDIO_ANALOG
1
C9503
1UF
10%
10V
2
CERM
805
GND_AUDIO_CODEC
1
C9506
10UF
20%
16V
2
ELEC
SM
1
C9507
10%
16V
2
X7R
603
0.1UF
1
2
1
10%
16V
2
X7R
603
C9508
10UF
20%
16V
ELEC
SM
C9509
0.1UF
96
102
98
96
102
95
AUD_CODEC_IN_L
AUD_CODEC_IN_R
AUD_CODEC_OUT_L
AUD_CODEC_OUT_R
AUD_PCM_VCOM
AUD_CODEC_LI_SHDN_L
AUD_PSEUDO_VREF
AUD_PCM_MBIAS
AUD_MICIN_N
AUD_MICIN_P
1
C9510
10UF
20%
16V
2
ELEC
SM
1
C9511
0.1UF
10%
16V
2
X7R
603
10%
16V
X7R
603
1
C9512
10UF
20%
16V
2
ELEC
SM
1
2
96
96
98
100
98
100
100
96
96
102
102
102
L9500
PP3V3_AUDIO
100
103
102
101
7
PLACE AT U9500
1
R9503
1K
1%
1/16W
MF
402
2
I2S0_BITCLK_DELAYED
1000-OHM-200MA
103
102
I2S0_SYNC
25
NET_SPACING_TYPE=AUDIO
0603
2 1
C9500
10UF
6.3V
CERM
20%
805
C
I2S0_SB_TO_DEV_DTO
25
103
103
18
103
18
25
102
103
25
103
101
98
96
102
I2C_AUDIO_SCL
I2C_AUDIO_SDA
I2S0_RESET_L
AUD_CODEC_MCLK
I2S0_DEV_TO_SB_DTI
NOSTUFF
C9513
+/-0.25PF
AUD_SPDIF_OUT
GND_AUDIO_CODEC
95
4.7PF
1
50V
2
C0G
402
NET_SPACING_TYPE=AUDIO
NET_SPACING_TYPE=AUDIO
NET_SPACING_TYPE=AUDIO
1
R9501
47K
5%
1/16W
MF
402
2
NET_SPACING_TYPE=AUDIO
R9500
33
5%
1/16W
MF
402
R9502
1/16W
402
D
C
B
B
AUDIO: CODEC
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
95
SCALE
1
REV.
OF
103
A
I
7 8
6
5
4
3
1 2
LINE IN PSEUDO-DIFFERENTIAL AMP
AV= 0.49
D
PP4V5_AUDIO_ANALOG
102
95
96
C9600
10UF
AUD_LI_L
101
1
R9602
47K
5%
1/16W
MF
402
2
AUD_LI_GND
96
101
1
R9600
165
1%
1/16W
C
AUD_PSEUDO_VREF
95
96
GND_AUDIO_CODEC
95
96
102
98
AUD_CODEC_LI_SHDN_L
95
PP4V5_AUDIO_ANALOG
102
95
96
AUD_LI_R
101
MF
402
2
NOSTUFF
R9601
5%
1/16W
MF
402
0
2 1
B
AUD_LI_GND
101
96
AUD_PSEUDO_VREF
95
96
GND_AUDIO_CODEC
102
98
96
95
21
AUD_LI_L1
20%
16V
ELEC
SM
1
R9603
100K
1%
1/16W
MF
402
2
C9601
10UF
21
AUD_LI_GNDL1
20%
16V
ELEC
SM
AUD_CODEC_LI_SHDN_L1
C9604
10UF
21
AUD_LI_R1
20%
16V
ELEC
SM
1
R9608
100K
1%
1/16W
MF
402
2
C9605
10UF
21
20%
16V
ELEC
SM
AUD_LI_GNDR1
R9604
20.5K
1%
1/16W
MF
402
C9602
0.47UF
R9605
20.5K
1%
1/16W
MF
402
R9609
20.5K
1%
1/16W
MF
402
R9610
20.5K
1/16W
402
2 1
1
20%
10V
2
CERM
603
2 1
2 1
2 1
1%
MF
AUD_LI_L2
D9600
BAV99DW
SOT-363
2
1
AUD_LI_VREFL
R9606
10K
2 1
1%
1/16W
MF
402
AUD_LI_R2
D9600
BAV99DW
SOT-363
5
4
AUD_LI_VREFR
R9611
10K
1%
1/16W
MF
402
10
2
V+
6
3
2 1
3
V-
4
10
8
V+
7
V-
4
NOSTUFF
C9603
47PF
2 1
5%
50V
CERM
402
R9607
10K
2 1
1%
1/16W
MF
CRITICAL
402
U9600
MAX4253
UMAX
1
5
APPLE P/N 353S0642
NOSTUFF
C9606
47PF
2 1
5%
50V
CERM
402
R9612
10K
2 1
1%
1/16W
MF
CRITICAL
U9600
MAX4253
UMAX
6
402
9
APPLE P/N 353S0642
AUD_CODEC_IN_L
AUD_CODEC_IN_R
95
95
D
C
B
AUDIO: LINE INPUT AMP
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
96
SCALE
1
REV.
OF
103
A
I
7 8
6
5
4
3
1 2
LINE OUT LOW-PASS FILTER
FC = 37 KHZ, HO = -1.4
R9801
14K
2 1
1%
1/16W
MF
402
D
AUD_CODEC_OUT_L
100
95
AUD_LO_GND_PRB
101
GND_AUDIO_CODEC
102
98
96
95
C
AUD_CODEC_OUT_R
100
95
C9800
10UF
20%
16V
ELEC
SM-1
C9803
10UF
20%
16V
ELEC
SM-1
2 1
AUDCODECOUTL
2 1
AUDCODECOUTR
R9800
10K
1%
1/16W
MF
402
R9807
10K
1%
1/16W
MF
402
2 1
AUDCODECOUTL1
2 1
AUDCODECOUTR1
R9802
3.92K
CRITICAL
1
C9802
1.5NF
5%
25V
2
CERM
0603
CRITICAL
1
C9804
1.5NF
5%
25V
2
CERM
0603
R9808
3.92K
1%
1/16W
MF
402
1%
1/16W
MF
402
2 1
2 1
R9809
1/16W
14K
1%
MF
402
C9801
270PF
5%
50V
CERM
603
R9803
14K
1/16W
R9806
14K
1/16W
C9805
270PF
50V
CERM
603
2 1
2 1
1%
MF
402
1%
MF
402
2 1
5%
2 1
2 1
AUD_LOAMP_OUT_L
AUD_LOAMP_IN_L_M
AUD_LOAMP_IN_L_P
1
R9804
10K
1%
1/16W
MF
402
2
1
R9805
10K
1%
1/16W
MF
402
2
AUD_LOAMP_IN_R_P
AUD_LOAMP_IN_R_M
AUD_LOAMP_OUT_R
98
98
98
LINE OUT
GROUND NOISE
CANCELLATION
98
98
98
D
C
LINE OUT AMP
APPLE P/N 353S0687
R9810
PP5V_AUDIO_ANALOG
102
4.7
1/10W
603
B
10UF
6.3V
CERM
1
2
1
20%
2
805
14
15
LIN+
8
RIN-
7
RIN+
16
SHDN*
C9810
C9807
GND_AUD_LOAMP_CHGPMP
102
98
AUD_LOAMP_IN_L_M
98
AUD_LOAMP_IN_L_P
98
AUD_LOAMP_IN_R_M
98
AUD_LOAMP_IN_R_P
98
TO SHASTA GPIO
AUDIO_LO_MUTE_L
25
1
R9815
4.7K
GND_AUDIO_CODEC
95
102
98
A
96
GND_AUD_LOAMP_CHGPMP
102
98
GND_AUD_LOAMP
102
1/16W
C9812
100PF
5%
MF
402
2
CERM
R9816
1
5%
50V
2
402
1K
5%
1/16W
MF
402
AUDIO_LO_MUTE_L_F
2 1
C9813
100PF
CERM
5%
50V
402
2 1
5%
MF
1
PVDD
MAX9722
QFN
PGND
SGND
6
3
1UF
10%
10V
CERM
805
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=5V
PP5V_AUDIO_LOAMP
CRITICAL
U9800
9
13
VDDR
VDDL
12
LOUT LIN-
10
ROUT
2
C1P
4
C1N
17
NC
VSS
PVSS
5
11
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_MAX9722_PVSS
1
2
1
C9806
10UF
20%
16V
2
ELEC
SM
R9811
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
AUD_MAX9722_C1P
1
C9808
1UF
10%
10V
2
CERM
805
AUD_MAX9722_C1N
2
C9811
10UF
20%
16V
1
ELEC
SM
1
C9809
1UF
10%
10V
2
CERM
805
1
R9817
1K
1%
1/16W
MF
402
2
1
R9818
1K
1%
1/16W
MF
402
2
R9812
14
1%
1/10W
FF
805
14
1%
1/10W
FF
805
R9813
R9814
2 1
2 1
5%
1/10W
FF
805
5%
1/10W
FF
805
0
0
GND_AUD_LOAMP_CHGPMP
AUD_LOAMP_OUT_L
MIN_LINE_WIDTH=20MIL
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
2 1
2 1
AUD_LO_L
AUD_LO_R
AUD_LOAMP_OUT_R
AUD_LO_GND
B
102
98
98
101
101
98
101
APPLE COMPUTER INC.
AUDIO: LINE OUT AMP
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
NONE
SHT
98
SCALE
A
REV.
I
OF
103
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
MIN_LINE_WIDTH=40MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
PP12V_AUDIO_SPKRAMP
D
7
FA000
1.5A-24V
SM
MIN_LINE_WIDTH=40MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
PP12V_AUDIO_SPKRAMP_F
2 1
XWA000
XWA003
GND_AUDIO_SPKRAMP_PLANE
102
100
AUD_CODEC_OUT_L
95
98
AUD_PCM_VCOM
95
C
AUD_CODEC_OUT_R
98
95
RA015
10K
2 1
AUDIO_SPKR_MUTE_L_INV
1%
1/16W
MF
402
AUDIO_SPKR_MUTE_L_F
2 1
1
5%
50V
2
402
TIE TO SHASTA GPIO
AUDIO_SPKR_MUTE_L
25
RA012
4.7K
1/16W
PP3V3_AUDIO_SPKR
100
1
CA020
5%
MF
402
2
100PF
CERM
RA013
47K
5%
1/16W
MF
402
1
CA021
100PF
5%
50V
2
402
CERM
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=40MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
OMIT
SM
PP12V_AUDIO_SPKRAMP_F2
2 1
OMIT
SM
2 1
LA005
1000-OHM-200MA
0603
LA006
1000-OHM-200MA
0603
LA007
1000-OHM-200MA
0603
LA008
1000-OHM-200MA
0603
2
G
6
D
QA000
2N7002DW
SOT-363
S
1
LA000
FERR-250-OHM
2 1
2 1
2 1
2 1
AUDSAMPINLN
1
CA015
100PF
5%
50V
2
CERM
402
AUDSAMPINLP
AUDSAMPINRP
1
CA016
100PF
5%
50V
2
CERM
402
AUDSAMPINRN
SM-1
CA017
5
G
220UF
ELEC
SM-2
D
S
2 1
20%
16V
CA004
0.47UF
10%
16V
X7R
805
CA005
0.47UF
10%
16V
X7R
805
CA006
0.47UF
10%
16V
X7R
805
CA007
0.47UF
10%
16V
X7R
805
3
QA000
2N7002DW
SOT-363
4
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
PP12V_AUD_SPKRAMP_PLANE
1
CA000
220UF
2
2 1
2 1
2 1
2 1
ELEC
SM-2
1
20%
16V
2
1
RA014
10K
1%
1/16W
MF
402
2
1
CA001
10UF
10%
16V
2
CERM
1210
PP3V3_AUDIO_SPKR
AUD_SAMP_INL_N
AUD_SAMP_INL_P
AUD_SAMP_INR_P
AUD_SAMP_INR_N
AUD_SAMP_G1
100
AUD_SAMP_G2
100
AUD_SAMP_FS1
100
AUD_SAMP_FS2
100
AUD_SAMP_SHDN_L
AUD_MAX9714_VREG
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
1
CA014
0.47UF
10%
16V
2
X7R
805
SPEAKER AMP
APPLE P/N 353S0680
1
CA018
0.1UF
20%
16V
2
CERM
603
100
4
3
9
INL-
10
INL+
16
INR+
15
U9700
INR-
MAX9714
17
G1
18
G2
19
FS1
20
FS2
11
SHDN*
8
NC
NC
14
REG
THM
PAD
AGND
33
13
VDD
QFN
D
1
CA002
1UF
20%
16V
2
CERM
1206
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
22
21
CHOLD
OUTL+
OUTL+
OUTL-
OUTL-
OUTR+
OUTR+
OUTR-
OUTR-
PGND
2
1
23
MIN_LINE_WIDTH=12MIL
7
31
32
29
30
6
C1+
5
C1-
27
28
25
26
12
SS
24
MIN_NECK_WIDTH=8MIL
MIN_NECK_WIDTH=10MIL
AUD_MAX9714_CHOLD
AUDSAMPOUTLP
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
AUDSAMPOUTLN
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUDSAMPCPP
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUDSAMPCPN
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUDSAMPCSS
1
CA019
0.1UF
20%
16V
2
CERM
603
1
CA008
0.1UF
10%
50V
2
X7R
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
AUDSAMPOURTP
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
AUDSAMPOUTRN
1
CA009
0.47UF
10%
16V
2
X7R
805
603
1
CA003
10UF
10%
16V
2
CERM
1210
1
CA023
10UF
10%
16V
2
CERM
1210
NOSTUFF
LA003
180-OHM-1.5A
0603
NOSTUFF
LA004
180-OHM-1.5A
0603
LA012
800-OHM
ACM4532
SYM_VER-1
1
APPLE P/N 155S0194
GND_AUDIO_SPKRAMP_PLANE
180-OHM-1.5A
180-OHM-1.5A
1
2 1
2 1
4
3 2
NOSTUFF
LA001
0603
NOSTUFF
LA002
0603
LA011
800-OHM
ACM4532
SYM_VER-1
1
CA010
1000PF
5%
25V
2
CERM
603
102
100
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
2 1
2 1
4
3 2
1
CA011
1000PF
5%
25V
2
CERM
603
1
CA012
1000PF
5%
25V
2
CERM
603
1
CA013
1000PF
5%
25V
2
CERM
603
AUD_SPKR_OUTL_P
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
AUD_SPKR_OUTL_N
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
AUD_SPKR_OUTR_P
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
AUD_SPKR_OUTR_N
101
101
C
101
101
XCA000
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=40MIL
B
MIN_NECK_WIDTH=10MIL
GND_AUDIO_SPKRAMP
7
102
XWA001
SM
XWA002
SM
OMIT
2 1
OMIT
2 1
MIN_LINE_WIDTH=40MIL
MIN_NECK_WIDTH=10MIL
50R28
1
B
GAIN SETTINGS: +19DB
MODULATION SETTING: LOW EMI
GND_AUDIO_SPKRAMP_PLANE
100
102
103 102 101
A
PP3V3_AUDIO
95
7
AUD_SAMP_G1
100
AUD_SAMP_G2
100
AUD_SAMP_FS1
100
AUD_SAMP_FS2
100
GND_AUDIO_SPKRAMP_PLANE
102
100
GAIN AND SWITCHING FREQUENCY STUFF OPTIONS
LA009
1000-OHM-EMI
SM
MIN_LINE_WIDTH=4MIL
MIN_NECK_WIDTH=4MIL
PP3V3_AUDIO_SPKR_EMI
2 1
1
CA022
100PF
5%
50V
2
CERM
402
LA010
1000-OHM-EMI
SM
MIN_LINE_WIDTH=4MIL
MIN_NECK_WIDTH=4MIL
2 1
1
RA008
0
5%
1/16W
MF
402
2
5678
4321
NOSTUFF
1
RA009
0
5%
1/16W
MF
402
2
PP3V3_AUDIO_SPKR
RPA000
47K
5%
1/16W
SM1
NOSTUFF
1
RA010
0
5%
1/16W
MF
402
2
100
NOSTUFF
1
RA011
0
5%
1/16W
MF
402
2
AUDIO: SPEAKER AMP
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
NOTICE OF PROPRIETARY PROPERTY
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
100 103
SCALE
A
REV.
I
OF
8
6 7
5
4
3
2
1
7 8
6
5
4
LINE IN JACK
APPLE P/N 514-0203
JA100
AJR23
F-ST-TH
5
6
1
3
4
D
2
7
8
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUD_LI_L_JACK
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUD_LI_DET_JACK
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUD_LI_R_JACK
FERR-EMI-100-OHM
AUD_LI_GND_JACK
101
102
7
GND_CHASSIS_AUDIO_EXTERNAL
PP3V3_AUDIO
100
103
102
101
95
7
C
AUD_LI_DET_H
101
FERR-EMI-100-OHM
AUD_SPDIF_OUT
103
95
FERR-EMI-100-OHM
PP5V_AUDIO
7
FERR-EMI-100-OHM
AUD_LO_DET1
B
101
FERR-EMI-100-OHM
AUD_LO_R
98
FERR-EMI-100-OHM
AUD_LO_L
98
FERR-EMI-100-OHM
AUD_LO_DET2
101
FERR-EMI-100-OHM
AUD_LO_GND
98
FERR-EMI-100-OHM
AUD_LO_GND_PRB
98
A
GND_CHASSIS_AUDIO_EXTERNAL
101
102
7
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUD_LI_GND_EMI
101
GND_CHASSIS_AUDIO_EXTERNAL
101
102
7
LINE IN PLUG DETECT
AUDIO_IN_DET0_L = LOW: PLUG INSERTED
AUDIO_IN_DET0_L = HIGH: PLUG NOT INSERTED
1
RA100
100K
5%
1/16W
MF
402
2
RA102
47K
2 1
5%
1/16W
MF
402
AUDLINDETH
1
CA108
0.1UF
20%
10V
2
CERM
402
LA114
2 1
SM
LA115
2 1
SM
LA116
2 1
SM
LA117
2 1
SM
LA118
2 1
SM
LA119
2 1
SM
LA120
2 1
SM
LA121
2 1
SM
AUD_LO_GND_PRB_EMI
1
CA123
100PF
5%
50V
2
CERM
402
LA100
FERR-EMI-100-OHM
SM
LA101
FERR-EMI-100-OHM
SM
LA102
FERR-EMI-100-OHM
SM
LA103
2 1
SM
1
RA101
47K
5%
1/16W
MF
402
2
3
D
QA100
2N7002
1
SM
G
S
2
AUD_SPDIF_OUT_EMI
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
PP5V_AUDIO_SPDIF_EMI
AUD_LO_DET1_EMI
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_LO_R_EMI
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_LO_L_EMI
AUD_LO_DET2_EMI
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_LO_GND_EMI
1
CA124
100PF
5%
50V
2
CERM
402
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
2 1
AUD_LI_L_EMI
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
2 1
AUD_LI_DET_EMI
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
AUD_LI_R_EMI
2 1
1
CA100
100PF
5%
50V
2
CERM
402
1
2
TO SHASTA GPIO
AUDIO_LI_DET_L
1
CA111
100PF
5%
50V
2
CERM
402
CA101
100PF
5%
50V
CERM
402
1
CA112
100PF
5%
50V
2
CERM
402
1
CA102
100PF
5%
50V
2
CERM
402
25
1
2
CA113
100PF
5%
50V
CERM
402
1
CA103
100PF
5%
50V
2
CERM
402
1
CA114
2
100PF
5%
50V
CERM
402
GND_AUDIO_MIC
102
AUD_MIC_IN_P
102
AUD_MIC_IN_N
102
GND_CHASSIS_AUDIO_INTERNAL
101
7
FERR-EMI-100-OHM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
1
CA115
100PF
5%
50V
2
CERM
402
LA104
FERR-EMI-100-OHM
SM
LA105
FERR-EMI-100-OHM
SM
LA106
FERR-EMI-100-OHM
SM
LA107
FERR-EMI-100-OHM
SM
3 1
NOSTUFF
DZA100
14V-15A
0405
4 2
LA108
FERR-EMI-100-OHM
LA109
FERR-EMI-100-OHM
LA110
FERR-EMI-100-OHM
LA122
2 1
SM
LA123
2 1
SM
LA124
2 1
SM
LA125
2 1
SM
LA126
2 1
SM
LA127
2 1
SM
LA128
2 1
SM
LA129
FERR-EMI-100-OHM
SM
1
CA116
0.01UF
10%
16V
2
CERM
402
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
2 1
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
2 1
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
2 1
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
2 1
2 1
SM
2 1
SM
2 1
SM
AUD_SPDIF_OUT_JACK
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
PP5V_AUDIO_SPDIF_JACK
2 1
2
AUD_LI_L
96
AUD_LI_DET_H
GND_AUDIO_MIC_EMI
AUD_MIC_IN_P_EMI
AUD_MIC_IN_N_EMI
1
CA120
1000PF
10%
25V
2
X7R
402
MIN_LINE_WIDTH=12MIL
MIN_LINE_WIDTH=12MIL
MIN_LINE_WIDTH=12MIL
1
3
AUD_LI_R
AUD_LI_GND
AUD_LI_GND_EMI
DZA101
MMBZ15DLT1
15V
SOT23
101
96
1
2
100
100
100
103
102
101
7
95
96
SPEAKER TYPE DETECT
25
TO SHASTA GPIO
101
7
FERR-EMI-100-OHM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
1
CA121
1000PF
10%
25V
2
X7R
402
CA117
0.1UF
20%
10V
CERM
402
MIN_NECK_WIDTH=8MIL
MIN_NECK_WIDTH=8MIL
MIN_NECK_WIDTH=8MIL
101
1
CA118
1UF
10%
10V
2
CERM
805
1
2
AUD_SPKR_OUTR_P
AUD_SPKR_OUTL_N
PP3V3_AUDIO
AUDIO_GPIO_12
GND_CHASSIS_AUDIO_INTERNAL
1
RA113
47K
5%
1/16W
MF
402
2
LA111
2 1
SM
LA112
SM
2 1
GND_AUDIO_MIC_CONN
AUD_MIC_IN_P_CONN
AUD_MIC_IN_N_CONN
LA113
2 1
SM
CA122
1000PF
10%
25V
X7R
402
AUD_LO_GND_JACK
AUD_LO_DET1_JACK
AUD_LO_R_JACK
AUD_LO_L_JACK
AUD_LO_DET2_JACK
RA112
LA130
180-OHM-1.5A
0603
LA131
180-OHM-1.5A
0603
1
CA119
1000PF
5%
25V
2
CERM
603
1
CA125
1000PF
5%
25V
2
CERM
603
JA102
HF28
M-ST-TH
1
2
3
APPLE P/N 518-0034
MIC CABLE CONNECTOR
LINE OUT JACK
APPLE P/N 514-0204
JA103
JFJ8210
F-ST-TH
9
10
1
3
4
2
5
6
7
8
11
12
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_SPDIF_GND
1
0
5%
1/16W
MF
402
2
GND_CHASSIS_AUDIO_INTERNAL
101
7
3
SPEAKER CABLE CONNECTOR
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=12MIL
2 1
AUD_SPKR_OUTR_P_CONN
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=12MIL
2 1
AUD_SPKR_OUTL_N_CONN
LA132
1000-OHM-200MA
0603
NOSTUFF
1
CA104
1000PF
5%
25V
2
CERM
603
103
102
101
103
102
VIN
VDD
LED
GND
APPLE P/N 518-0138
2 1
1
2
PP3V3_AUDIO
100
95
7
AUD_LO_DET1
101
PP3V3_AUDIO
100
101
95
7
AUD_LO_DET2
101
PLACE NEAR
J9801
XCA100
50R28
1
JA101
10-89-7082
M-ST-TH
21
43
87
AUDIO_GPIO_12_CONN
NOSTUFF
CA105
1000PF
5%
25V
CERM
603
LINE OUT PLUG DETECTS
AUDIO_LO_DET_L = LOW: PLUG INSERTED
AUDIO_LO_DET_L = HIGH: PLUG NOT INSERTED
AUDIO_LO_OPTICAL_PLUG_L = LOW: OPTICAL DIGITAL AUDIO PLUG INSERTED
AUDIO_LO_OPTICAL_PLUG_L = HIGH: ANALOG AUDIO PLUG INSERTED
NOSTUFF
1
RA109
100K
5%
1/16W
MF
402
2
5
1
RA103
100K
5%
1/16W
MF
402
2
RA105
47K
5%
1/16W
MF
402
1
RA106
100K
5%
1/16W
MF
402
2
RA108
47K
5%
1/16W
MF
402
PLACE NEAR
J700
XCA101
50R28
1
APPLE COMPUTER INC.
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=12MIL
AUD_SPKR_OUTR_N_CONN
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=12MIL
AUD_SPKR_OUTL_P_CONN
NOSTUFF
1
CA106
1000PF
5%
25V
2
CERM
603
2 1
AUD_LO_DET1_1
1
CA109
0.1UF
20%
10V
2
CERM
402
2 1
AUD_LO_DET2_1
1
CA110
0.1UF
20%
10V
2
CERM
402
LA133
180-OHM-1.5A
0603
LA134
180-OHM-1.5A
0603
NOSTUFF
1
CA107
1000PF
5%
25V
2
CERM
603
1
RA104
47K
5%
1/16W
MF
402
2
QA101
3
2N7002DW
D
SOT-363
5
G
S
4
1
RA107
47K
5%
1/16W
MF
402
2
QA101
6
2N7002DW
D
SOT-363
2
G
S
1
AUDIO: Q45 CONNECTORS
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6482
D
SCALE
NONE
1 2
2 1
AUD_SPKR_OUTR_N
2 1
AUD_SPKR_OUTL_P
1
CA126
1000PF
5%
25V
2
CERM
603
TO SHASTA GPIO
AUDIO_LO_DET_L
TO SHASTA GPIO
AUDIO_LO_OPTICAL_PLUG_L
SHT
1
2
OF
CA127
1000PF
5%
25V
CERM
603
25
6
25
REV.
I
103 101
100
D
100
C
B
A
8
6 7
5
4
3
2
1
7 8
6
5
4
3
1 2
RA226
5V POWER SUPPLY FOR THE HEADPHONES/LINE OUT AMP
I2S0_BITCLK
DIFFERENTIAL_PAIR=AUD_CODEC_PWR
NET_SPACING_TYPE=AUDIO
D
102
MIN_LINE_WIDTH=40MIL
MIN_NECK_WIDTH=12MIL
VOLTAGE=12V
PP12V_AUDIO_CODEC
7
GND_AUDIO_CODEC
95
98
96
LA200
FERR-250-OHM
SM-1
2 1
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=12MIL
VOLTAGE=12V
AUD_12V_CODEC
RA200
10
5%
1W
FF
2512
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=12MIL
VOLTAGE=12V
2 1
AUD_12V_CODEC2
1
CA200
1UF
20%
16V
2
CERM
1206
1
CA201
220UF
20%
16V
2
ELEC
SM-2
APPLE P/N 353S0539
1
CA209
220UF
20%
16V
2
ELEC
SM-2
VRA200
3
CA202
100UF
ELEC
CRITICAL
LM1117
SOT223-4
IN
ADJ/GND
1
1
20%
16V
2
SM
VOUT
OUT
AUD_V5_REF
FC=7HZ
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=5V
4
2
RA201
205
1%
1/16W
MF
402
RA202
634
1%
1/16W
MF
402
PP5V_AUDIO_ANALOG
1
1
2
1
2
CA203
100UF
20%
16V
2
ELEC
SM
103
NET_SPACING_TYPE=AUDIO
102
98
1/16W
402
GND_AUDIO_SPKRAMP_PLANE
100
GND_AUDIO_SPKRAMP
100
7
4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP
NET_SPACING_TYPE=AUDIO
0
2 1
I2S0_BITCLK_8NS_DELAY
ELECTRICAL_CONSTRAINT_SET=8NS
5%
MF
NOSTUFF
RA225
PLACE ACROSS GROUND SPLIT
AT RIGHT SIDE OF CA007
RA216
PLACE NEAR ENTRY TO SPEAKER
AMP GROUND PLANE
RA217
0
5%
1/16W
MF
402
NOSTUFF
0
5%
1/10W
FF
805
NOSTUFF
0
5%
1/10W
FF
805
2 1
2 1
2 1
RA227
1/16W
402
NOSTUFF
1
RA228
0
5%
1/16W
MF
402
2
GND_AUDIO_CODEC
0
2 1
5%
MF
95
I2S0_BITCLK_DELAYED
102
96
98
95 25
APPLE P/N 353S0733
C
PP5V_AUDIO_ANALOG
102
98
1
RA203
100K
CA204
10UF
20%
6.3V
CERM
805
1/16W
1%
MF
402
2
AUD_4V5_SHDN*
1
CA205
0.1UF
10%
16V
2
X7R
603
NOSTUFF
RA204
100K
101
102
100
7
95
96
98
95
PP3V3_AUDIO
GND_AUDIO_CODEC
103
102
1%
1/16W
MF
402
2 1
1
2
CRITICAL
VRA201
MAX8510-4.5V
SC70-5
1
IN
3
SHDN*
5
OUT
4
BP
GND
2
NOT USED: C9906
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=4.5V
AUD_4V5_FB
1
CA206
0.01UF
10%
16V
2
CERM
402
1
CA207
1UF
10%
10V
2
CERM
805
PP4V5_AUDIO_ANALOG
1
CA208
10UF
20%
16V
2
ELEC
SM-1
PLACE ACROSS GROUND SPLIT
AT CODEC U9500
96
95
GND_AUDIO_CODEC
102
96
95
98
RA205
0
5%
1/10W
MF
603
2 1
PLACE AT J5903
RA229
0
GND_CHASSIS_AUDIO_EXTERNAL
101
7
5%
1/10W
FF
805
2 1
B
UNUSED GPIO TERMINATIONS
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
103
102
PP3V3_AUDIO
101
100
95
7
AUDIO_LI_OPTICAL_PLUG_L
25
AUDIO_HP_DET_L
25
AUDIO_SPKR_DET_L
25
I2S2_DEV_TO_SB_DTI
25
AUDIO_GPIO_11
103
25
I2S2_BITCLK
25
I2S2_SYNC
25
AUDIO_HP_MUTE_L
25
AUDIO_EXT_MCLK_SEL
25
I2S2_RESET_L
25
RA206
RA207
RA208
RA209
RA210
RA211
RA212
RA213
RA214
RA215
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
47K
5%
1/16W
MF
402
2 1
2 1
2 1
2 1
2 1
C
2 1
2 1
2 1
2 1
D
2 1
B
SIZE
D
SCALE
I88
I89
I116
DRAWING NUMBER
051-6482
NONE
I2S2_SB_TO_DEV_DTO
I2S2_MCLK
AUD_CODEC_MCLK
SHT
OF
102 103
1
REV.
25
25
103
95
A
I
MICROPHONE IMPEDANCE MATCHING CIRCUIT
3
AUD_PCM_MBIAS
1
CA211
10UF
20%
16V
2
ELEC
SM-1
GND_AUDIO_CODEC
AUD_MICIN_P
AUD_MICIN_N
AUDIO GROUND RETURNS
CA213
0.1UF
10%
16V
X7R
603
CA214
0.1UF
10%
16V
X7R
603
NOSTUFF
1
CA210
10UF
20%
6.3V
2
CERM
805
DIFFERENTIAL_PAIR=AUDIO_MIC_2
NET_SPACING_TYPE=AUDIO
2 1
DIFFERENTIAL_PAIR=AUDIO_MIC_2
NET_SPACING_TYPE=AUDIO
2 1
DIFFERENTIAL_PAIR=AUD_CODEC_PWR
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=40MIL
MIN_NECK_WIDTH=12MIL
GND_AUDIO
7
XWA200
XWA201
XWA202
A
XCA201
50R28
1
XWA203
8
OMIT
SM
2 1
OMIT
SM
2 1
OMIT
SM
2 1
OMIT
SM
2 1
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=4.5V
GND_AUDIO_CODEC
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=6MIL
VOLTAGE=4.5V
GND_AUDIO_MIC
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=4.5V
GND_AUD_LOAMP
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=4.5V
GND_AUD_LOAMP_CHGPMP
102
96
95
98
102
101
98
98
6 7
DIFFERENTIAL_PAIR=AUDIO_MIC
NET_SPACING_TYPE=AUDIO
AUD_MIC_IN_P
101
DIFFERENTIAL_PAIR=AUDIO_MIC
NET_SPACING_TYPE=AUDIO
AUD_MIC_IN_N
101
GND_AUDIO_MIC
102
101
5
CA212
1000PF
NOSTUFF
1
RA218
1K
1%
1/16W
MF
402
2
10%
25V
X7R
402
NOSTUFF
1
RA221
1K
1%
1/16W
MF
402
2
1
RA223
1K
1%
1/16W
MF
402
DIFFERENTIAL_PAIR=AUDIO_MIC_1
RA219
1
2
RA220
NET_SPACING_TYPE=AUDIO
165
2 1
AUD_MIC_P1
1%
1/16W
MF
402
165
2 1
AUD_MIC_M1
1%
1/16W
DIFFERENTIAL_PAIR=AUDIO_MIC_1
MF
NET_SPACING_TYPE=AUDIO
402
RA222
100K
1/16W
1
1%
MF
402
2
2
1
RA224
1K
1%
1/16W
MF
402
2
4
95
95
102
98
96
95
95
MAKE_BASE=TRUE
TP_I2S2_SB_TO_DEV_DTO
MAKE_BASE=TRUE
TP_I2S2_MCLK
MAKE_BASE=TRUE
I2S0_MCLK
25
AUDIO: Q45 POWER SUPPLIES
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
2
NOTICE OF PROPRIETARY PROPERTY
7 8
6
5
4
3
1 2
D
D
S/PDIF TRANSMITTER
I2C ADDRESS = 0010 000X
APPLE P/N 353S0597
NOSTUFF
LA300
10UF
6.3V
CERM
20%
805
1000-OHM-200MA
1
2
0603
102 101 100
PP3V3_AUDIO
95
7
NOSTUFF
CA300
C
AUD_CODEC_MCLK
95
102
I2S0_SYNC
25
95
I2S0_BITCLK
25
102
I2S0_SB_TO_DEV_DTO
25
95
I2C_AUDIO_SCL
18
95
I2C_AUDIO_SDA
18
95
AUDIO_GPIO_11
102
25
B
MIN_LINE_WIDTH=15MIL
MIN_NECK_WIDTH=10MIL
PP3V3_AUDIO_CS8406
2 1
NOSTUFF
UA300
NOSTUFF
1
CA301
1UF
10%
10V
2
CERM
805
23
6
VD VL
21
OMCK
12
ILRCLK
13
ISCLK
CS8406
14
TSSOP
SDIN
28
ORIG
SCL/CCLK
1
COPY/C
SDA/CDOUT
2
TEST2
AD0/CS
27
TEST27
AD1/CDIN
3
EMPH*
AD2
9
RST*
24
H_S*
4
SFMT0
RXP
5
SFMT1
DGND
DGND
18
USER
TEST18
TEST20
20
USER
26
TXP
25
NC
TXN
16
C EN
TEST16
VALIDITY
17
TEST17
AUDIO*
19
INT
10
APMS
TEST10
11
TCBLD
TEST11
15
TCBL
7
TEST7
8
TEST8
22
NOSTUFF
1
CA302
1UF
10%
10V
2
CERM
805
AUD_CS8406_TXP
AUD_CS8406_USERBIT
AUD_CS8406_INT
AUD_CS8406_TCBL
NOSTUFF
1
RA300
47K
5%
1/16W
MF
402
2
I87
NOSTUFF
1
RA302
47K
5%
1/16W
MF
402
2
NOSTUFF
RA301
33
2 1
5%
1/16W
MF
402
TP_AUD_CS8406_INT
NET_SPACING_TYPE=AUDIO NET_SPACING_TYPE=AUDIO
MAKE_BASE=TRUE
AUD_SPDIF_OUT
C
95
101
B
AUDIO: S/PDIF XMITTER
A
APPLE COMPUTER INC.
8
6 7
5
4
3
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6482
NONE
SHT
103
SCALE
1
REV.
OF
103
A
I