Apple A1304 Schematic

APPLE INC.

6

DESIGNER

DESCRIPTION OF CHANGE

REV.

A

D

C

B

A

D

C

B

8 7

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

TITLE

DRAWING NUMBER

SHT

OF

METRIC

DRAFTER

ENG APPD

QA APPD

RELEASE

DESIGN CK

MFG APPD

SCALE

NONE

MATERIAL/FINISH

NOTED AS

APPLICABLE

SIZE

D

THIRD ANGLE PROJECTION

DIMENSIONS ARE IN MILLIMETERS

XX

X.XX

X.XXX

DO NOT SCALE DRAWING

REV

ZONE

ECN

CK APPD

DATE

ENG APPD

DATE

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

ANGLES

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DRAWING

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

08/01/2008

EVT

SCHEM,MLB,M96

Schematic / PCB #’s

LPC+SPI Debug Connector

41

01/24/2008

CHANGZHANG

51

SMC SUPPORT

40

01/09/2007

M70

50

SMC

39

02/21/2008

M97

49

IPD Connector

38

48

USB EXTERNAL CONNECTORS

37

01/09/2007

M70

46

SATA Connectors

36

02/05/2008

CHANGZHANG

45

Hatch and Audio Connectors

35

(MASTER)

42

Wireless M93 Connector

34

01/09/2007

M70

41

Memory Active Termination

33

01/09/2007

M70

37

DDR BYPASSING 2

32

06/20/2005

MEMORY

36

DDR BYPASSING 1

31

06/20/2005

MEMORY

35

DDR3 DRAM Channel B (32-63)

30

34

DDR3 DRAM Channel B (0-31)

29

(MASTER)

33

DDR3 DRAM Channel A (32-63)

28

32

DDR3 DRAM Channel A (0-31)

27

(MASTER)

31

DDR3 Support

26

01/30/2008

T18_MLB

30

FSB/DDR3 Vref Margining

25

01/15/2008

BEN

29

SB Misc

24

02/04/2008

M97

28

MCP Graphics Support

23

02/04/2008

M97

26

MCP Standard Decoupling

22

02/04/2008

M97

25

MCP Power & Ground

21

02/04/2008

M97

22

MCP HDA & MISC

20

02/04/2008

M97

21

MCP SATA & USB

19

02/04/2008

M97

20

MCP PCI & LPC

18

02/04/2008

M97

19

MCP Ethernet & Graphics

17

02/04/2008

M97

18

MCP PCIe Interfaces

16

02/04/2008

M97

17

MCP Memory Misc

15

02/04/2008

M97

16

MCP Memory Interface

14

02/04/2008

M97

15

MCP CPU Interface

13

02/04/2008

M97

14

eXtended Debug Port (XDP)

12

02/04/2008

M97

13

CPU Decoupling & VID

11

04/26/2006

MSARWAR

12

CPU Power & Ground

10

(MASTER)

11

CPU FSB

9

02/04/2008

M97

10

SIGNAL ALIAS /RESET

8

(MASTER)

9

Power Aliases

7

06/15/2006

WFERRY

8

Functional Test and No-Tests

6

(MASTER)

7

Acoustic Cap BOM Config Tables

5

N/A

5

CONFIGURATION OPTIONS

4

(N/A)

4

Power Block Diagram

3

06/30/2005

POWER

3

System Block Diagram

2

05/11/2006

WFERRY-WF

2

M96 RULE DEFINITIONS

109

71

M97

02/04/2008

M96 Power and Ground Nets

108

70

(MASTER)

SMC Constraints

106

69

M97

02/04/2008

MCP Constraints 2

103

68

M97

02/04/2008

MCP Constraints 1

102

67

M97

02/04/2008

Memory Constraints

101

66

M97

02/04/2008

CPU/FSB Constraints

100

65

M97

02/04/2008

Additional CPU/GPU Decoupling

99

64

LCD Backlight Support

98

63

M97

02/04/2008

LED Backlight Driver

97

62

(MASTER)

DisplayPort Connector

94

61

M98_MLB

01/17/2008

DISPLAYPORT SUPPORT

93

60

NMARTIN

12/18/2007

LVDS,Camera Conn. and ALS Conn.

90

59

GPU

06/23/2006

PBUS Supply/Battery Charger

79

58

M70

01/09/2007

POWER FETS

78

57

YUAN.MA

02/04/2008

POWER SEQUENCING

77

56

YUAN.MA

02/04/2008

5V / 3.3V Power Supply

76

55

RXU_K20

05/21/2008

1.5V/0.75V Supplies

75

54

M70

01/09/2007

1V05 S5 Power Supply

74

53

RXU_K20

05/21/2008

1.8V LDO Supply

73

52

MCP CORE REGULATOR

72

51

MINGJING

06/24/2008

IMVP6 CPU VCore Regulator

71

50

POWER

07/13/2005

DC-In & Battery Connectors

69

49

M70

01/09/2007

SPI ROM

61

48

CHANGZHANG

02/15/2008

Sudden Motion Sensor (SMS)

59

47

M76_MLB

01/12/2007

Fan

56

46

M70

01/09/2007

TEMPERATURE SENSORS

55

45

M70

01/09/2007

Current Sensing

54

44

YUNWU

02/04/2008

Voltage Sensors

53

43

M70

01/09/2007

Contents

Sync

Date

Page

(.csa)

SCH

CRITICAL

1

SCHEM,MLB,M96

051-7631

820-2375

1

PCB

CRITICAL

PCBF,MLB,M96

LAST_MODIFIED=Fri Aug 1 09:54:13 2008

TITLE=M96_MLB

ABBREV=DRAWING

Table of Contents

1

N/A

1

SyncPage

Date

(.csa)

Contents

M97 SMBUS CONNECTIONS

52

42

BEN

02/04/2008

1

71

2.3.0

051-7631

SCHEM,MLB,M96

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

1066 MHz

800 MHz

0.75V - 64 Bits

VOLTAGE SENSORS PG 45

PG 40

IPD

J4800

MEM Active

Parallel

Term

USB

J5100

U4900

PG 12

MINI XDP CONN

J1300

CPU

U1000

Pg 10

FSB

64-Bit

FSB

HDMI

J9000

J4200

3

LPC SMB

Ln2

Pg18

PG 38

J4260

J4100

Display Port

2

Controller

LVDS Int Disp

5

U6100

ADC

Prt

DC/Batt

Power

Supplies

Pg 14

Ln0 Ln1

Flash

Ln3

Pg20

SATA DACS

Pg18

LAN

Pg 19

PCI

Pg 21

HDA SPI

Pg 24

1 4

USB

6

Misc

Pg 15/16

Main Memory

U3130

U3120

U3110

U3100

A B 0

BSA

SMC

MGMT

Fan

Ser

Conn

J4200

External

Trackpad/Keyboard

J4800

DIGITAL MIC

CONNECTOR

PG 60

Connector

Audio

M93 AirPort/BT

LVDS

Pg 19

Well Spring

J9050

0

Pg 20

7

Pg 21

SPI

Boot ROM

Pg 21

PG 50

Pg 17

Pg 18

1.6/1.8 GHz

Pg 11

PG 37

Conn

Camera

PG 60

PG 63PG 64

Conn

NAND

U9500U9601

U9600

NAND Flash

HDD SATA

Pg 36

Pg 37

PG 40

J4500

PG 37

PG 41

FrankCard Conn

PG 43

Local TEMP near power supplies

U5550

U5560

Local TEMP near Air Vent

Local TEMP near Front Edge

U5570

PG 47

PG 47U5515

CPU/MCP T-Diode Thermal Sensor

PG 47

SUDDEN MOTION DETECT U5900 PG 49

FAN CONN J5600

PG 48

J9000

TOP ALS

J4100

PG 36

M93

PG 51

PG 52-59

J6900/80

DDR3 RAM

U3210 U3220 U3230 U3240

Pg29/30

U3300 U3310 U3320 U3330 U3410 U3420 U3430 U3440

Pg31/32

Pg 35

PG 60

DDR3 RAM

DDR3 - Dual Channel

FLAT PANEL

PCI-E

Core

MCP79U

U1400

2.3.0

71

SYNC_DATE=05/11/2006

System Block Diagram

2

SYNC_MASTER=WFERRY-WF

051-7631

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

BATTERY ONLY:

U7740

SENSE

MR

PS_PWRGD

PPBUSB_G3H

VO1

MEM_VTT_EN_R

R2870

DDRVTT_EN

TPS51116

(PAGE 55)

PP0V75_S0_REG

S5

MCPDDR_EN

BATTERY

SLP_S3*

CHGR_BGATE

Q5315

D6901

V

(S0)

D6901

01

2S2P

J6980

DC-JACK

U7900

VIN

02

04

MCP79U

U5000

RN5VD30A-F

SMC PWRGD

(PAGE 10)

U1000

RESET*

CPU

FC_RESET_L

PCA9557D_RESET_L

BKLT_PLT_RST_L

PG1

ENA2

VIN

SMC_LRESET_L

PPDCIN_G3H

PPVBATT_G3H_R

ENABLE

VOUT1

PPVIN_G3H_DCIN

A

Q7950

F6900

PP18V5_DCIN

6A FUSE

PP18V5_G3H_CHGR

ENABLES

(PAGE 59)

PBUS Supply/

SMBUS_SMC_BSA_SCL

BATTERY CHARGER

=PPBUSB_G3H

02

VIN

(S0)

VIN

VR_PWRGOOD_DELAY

02

PGOOD1,2

D6901

P1V05_S5_PGOOD

(PAGE 51)

VIN

U6900

LTC3470A

SMC_ONOFF_L

PM_SLP_S3_L

13

RST*

DELAY

C-0.47uF

PM_SLP_S4_L

R-5.1K

09

C-NoStuff

R-100K

PP3V3_S5_PWRCTI

04

VLDOIN

DELAY

SMBUS_SMC_BSA_SDA

P3V3S3_EN

VOUT2

22

Q7710

15

SLP_S5*

MCP79U

DDRREG_EN

WOW_EN

PCI_RESET0*

09

DELAY

(S0)

DELAY

R-0

(S0)

C-0.47uF

R-0

R-33k

C-0.47uF

DELAY

R-22k

C-0.47uF

C-0,47uF

PM_SLP_S3_L

R-5.1k

DELAY

C-0.47uF

P1V05S0_EN

P1V8S0_EN

MCPDDR_EN (S0)

U2850

PP1V05_S0_FET

03

PP3V3_S5

EN2

Q7801

P5VS0_EN

P3V3S0_EN

EN

SMC_RESET_L

26

(30 A MAX CURRENT)

ADJ1

31

33

PBUSA_G3H

R7980

10

34

PPVCORE_S0_CPU_REG

35

R-1K

36

PP1V5_S0_VMON

37

39

40

41

LPC_RESET*

AIRPORT_RST_L

42

43

44

ISL6258

EN1

(S5)

PM_WLAN_EN_L

PP3V3S5_EN_L

Q7621

P5VS0_EN_L

PP5V_S3

VR_ON

(PAGE 52)

ISL6261CRZ

SMC_PM_G2_EN

Q7700

10

PM_G2_P3V3S5_EN_L

DELAY

R-5.1K C-0.47uF

DELAY

C-NoStuff

R-100K

PP3V42_G3H_PWRCTL

03

07

CPUVCORE

VOUT

LTC2909

U7100

IMVP_VR_ON

PGOOD

(S5)

PP3V42_G3H_REG

1.05V

RESET

U4900

VOUT2

PPDCIN_G3H_R

7A FUSE

(200 mA MAX CURRENT)

FSB_CPURST_L

DEBUG_RESET_L

12

PG2

VOUT

S0PGOOD_PWROK

PBUSVSENS_EN

5V

3.3V

CPU_PWRGD

SLP_S3_L(P93)

IMVP_VR_ON

PLT_RST*

SLP_S4_L(P94)

SLP_S5_L(P95)

RSMRST_PWRGD

14

PM_SLP_S5_L

PM_SLP_S4_L

15

24

RSMRST_OUT(P15)

99ms DLY

IMVP_VR_ON(P16)

ENA1

PP1V05_S0_VMON

U7770

ALL_SYS_PWRGD

PPBUSB_G3H

R7930

BATT_POS_F

PWR_BUTTON(P90)

05

P17(BTN_OUT)

06

ADJ2

P5V3V3_PGOOD

MCPCORES0_PGOOD

PP3V3_S3

PP3V3S5_EN_L

P1V05_S5_EN

SMC

U4900

(PAGE 41)

P60

SMC_PM_G2_EN

Q7840

02

3.425V G3HOT

33

(S0)

MCPCORES0_EN

(S5)

ISL6236

U7200

(PAGE 53)

(PAGE 42)

PP3V42_G3H_SMC

M96 POWER SYSTEM ARCHITECTURE

(0.002)

P1V05_S5_EN

MCPCORE

PP1V05_S5_REG

(7 A MAX CURRENT)

PPMCPCORE_S0_REG

(25 A MAX CURRENT)

Q7853

11

MCPCORES0_PGOOD

35

MCP_PS_PWRGD

CPU_RESET*

VR_PWRGOOD_DELAY

SMC_LRESET_L

PM_PWRBTN_L

RSMRST_IN(P13)

SMC

PM_RSMRST_L

37

FSB_CPURST_L

CPU_PWRGD

PCIE_RESET*

PWRBTN*

U1400

PWRGOOD

SMC_RESET_L

PWRGD(P12)

RSMRST*

U7600

19

C-0.47uF

DELAY

16

PPBUSA_G3H

IMVP_VR_ON

17

P5V3V3_PGOOD

TPS51120

CURRENT)

PP5V_S3_REG

(? A MAX

(PAGE 60)

TPS19918

1.8V S0

12

P3V3_S5_PWRCTL

08

Q7810

Q7830

(PAGE 54)

VIN

U7360

VOUT

32

TPS19918

(PAGE 57)

PP1V8_S0_REG

VO2

PP3V3_S5_REG

(? A MAX CURRENT)

VOUT1

0.75V

DDRREG_EN

22

VIN

24

23

(11 A MAX CURRENT)

DDRREG_PGOOD

U7500

PP0V75_S3_VTTREF

1.5V

S3

CPUVTTS0_EN

SMC_ADAPTER_PRESENT

26

25

26

16

PP1V5_S3_P1V5S0FET

PP1V5_S3_REG

28

27

28

P1V05S0_EN

26

27

P5VS3_EN_L

18

38

PPVCORE_S0_CPU

PPVBAT_G3H_CHGR_REG

MCPCORES0_EN

(PAGE 41)

RSMRST_PWRGD

26

27

22

ALL_SYS_PWRGD

P3V3S3_EN_L

20

21

(200 mA MAX)

P3V3S0_EN_L

PPVIN_S0_P1V8S0

P1V8_S0_EN

09

PP1V5_S5_PGOOD

27

PP3V3_S0_FET

=PP1V5_S0_FET

RST*

(PAGE 57)

08

PP5V_S0_FET

26

(S3)

P5VS3_EN_L

PP3V3_S5_PWRCTL

29

30

29

71

2.3.0

SYNC_DATE=06/30/2005

SYNC_MASTER=POWER

3

051-7631

Power Block Diagram

DESCRIPTION

REFERENCE DES

BOM OPTIONQTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

REFERENCE DESIGNATOR(S)

BOM OPTION

DESCRIPTION

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTIONQTY

PART NUMBER

CRITICAL

Module Parts

BOMOPTION Groups

Bar Code Label / EEE #’s

BOMs

Alternate Parts

[EEE:4DA]

EEE_4DA

CRITICAL826-4393

1

LBL,P/N LABEL,PCB,28MM X 6 MM

EEE_2AL

CRITICAL

[EEE:2AL]

826-4393

1

LBL,P/N LABEL,PCB,28MM X 6 MM

EEE_2AN,M96_COMMON,M96_HYNIX,M96_MU_CAP,CPU_1_8GHZ

630-9516

PCBA,MLB,1.8GHZ,HY 2GB,MU CAP,M96

IC,GMCP,MCP79U-B02,27MMX27MM,BGA1588

338S0637

MCP_B02

CRITICAL

1

U1400

U6100

341S2326

1

CRITICAL

BOOTROM_FINAL

IC,EFI,BOOTROM FINAL (LOCKED),M96

IC,EFI,BOOTROM DEVELOPMENT (UNLOCKED),M96

341S2382

CRITICAL

BOOTROM_DEVEL

1

U6100

IND,IHLP4040CZ,0.68uH,18A

152S0861152S0905 ALL

POWER NFET, 30V, 18A

376S0627 376S0723 ALL

152S0684 ALL152S0421

1.0UH,22A,10MOHM

376S0410 ALL376S0466

Si4413 for Si4405

128S0092 ALL128S0093

33UF 20% 16V DCASE

IC,ISL6258,REV2,BAT CHGR, 28P QFN

CRITICALU79001

353S1938

ALTERNATE,COMMON,M96_COMMON1,M96_COMMON2,M96_COMMON3

M96_COMMON

MCP_B02,BOOTROM_DEVEL,SMC_PRGRM,BOOT_MODE_USER,JTAG_ALLDEV,MEMRESET_HW,MEMRESET_MCP,VREFMRGN

M96_COMMON1

104S0018104S0023 ALL

1206 1/4W .002 OHM

[EEE:4DB]

EEE_4DB

CRITICAL826-4393

1

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEE:4DC]

EEE_4DC

826-4393

1

CRITICAL

LBL,P/N LABEL,PCB,28MM X 6 MM

EEE_2AN

[EEE:2AN]

826-4393

1

LBL,P/N LABEL,PCB,28MM X 6 MM

CRITICAL

740S0028740S0067 ALL

0.5A OC FUSE

IC,PRGRM,SMC (NEW),M96

341S2327

1

U4900

SMC_PRGRM

CRITICAL

MICRON,DDR3,128M16,9x11.5

CRITICAL4

DRAM_MICRON

333S0475

U3200,U3210,U3220,U3230

HYNIX,DDR3,128M16,9x11.5

333S0476

U3100,U3110,U3120,U3130

DRAM_HYNIX

CRITICAL4

4

HYNIX,DDR3,128M16,9x11.5

U3300,U3310,U3320,U3330

CRITICAL

DRAM_HYNIX

333S0476 333S0476

HYNIX,DDR3,128M16,9x11.5

DRAM_HYNIX

CRITICAL

U3400,U3410,U3420,U3430

4

DRAM_MICRON

MICRON,DDR3,128M16,9x11.5

4 CRITICAL

U3400,U3410,U3420,U3430

333S0475

MICRON,DDR3,128M16,9x11.5

4

DRAM_MICRON

U3300,U3310,U3320,U3330

CRITICAL

333S0475

4

MICRON,DDR3,128M16,9x11.5

U3100,U3110,U3120,U3130

CRITICAL

DRAM_MICRON

333S0475

338S0563

1

U4900

CRITICAL

SMC_BLANK

IC,SMC,HS8/2117

SS_CAP_2_2UF,SS_CAP_10UF,SS_CAP_1UF

M96_SS_CAP

DRAM_HYNIX

M96_HYNIX

MCP_CS1_NO

M96_COMMON3

DRAM_MICRON,DRAM_SPD_2

M96_MICRON

PCBA,MLB,1.6GHZ,HY 2GB,TY CAP,M96

630-9514

EEE_2AL,M96_COMMON,M96_HYNIX,M96_TY_CAP,CPU_1_6GHZ

PCBA,MLB,1.6GHZ,HY 2GB,MU CAP,M96

630-9735

EEE_4DB,M96_COMMON,M96_HYNIX,M96_MU_CAP,CPU_1_6GHZ

EEE_4DA,M96_COMMON,M96_HYNIX,M96_SS_CAP,CPU_1_6GHZ

PCBA,MLB,1.6GHZ,HY 2GB,SS CAP,M96

630-9734

EEE_4DC,M96_COMMON,M96_HYNIX,M96_SS_CAP,CPU_1_8GHZ

630-9738

PCBA,MLB,1.8GHZ,HY 2GB,SS CAP,M96

EEE_2AP,M96_COMMON,M96_HYNIX,M96_TY_CAP,CPU_1_8GHZ

PCBA,MLB,1.8GHZ,HY 2GB,TY CAP,M96

630-9517

EEE_2AP

[EEE:2AP]

1

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

CRITICAL

4

333S0476

DRAM_HYNIX

U3200,U3210,U3220,U3230

CRITICAL

HYNIX,DDR3,128M16,9x11.5

IC, 32MBIT 8-PIN SERIAL FLASH, WSON8

U6100

CRITICAL

BOOTROM_BLANK_4MB

1

335S0615

338S0601

U1400

1

MCP_B01

CRITICAL

IC,GMCP,MCP79U-B01,27MMX27MM,BGA1588

SYNC_DATE=(N/A)

SYNC_MASTER=(N/A)

051-7631

71

4

2.3.0

PAGE_BORDER=TRUE

CONFIGURATION OPTIONS

LPCPLUS,XDP,XDP_CONN

M96_COMMON2

MU_CAP_2_2UF,MU_CAP_10UF,MU_CAP_1UF

M96_MU_CAP

M96_TY_CAP

TY_CAP_2_2UF,TY_CAP_10UF,TY_CAP_1UF

MCP_A01Q

U1400

CRITICAL

338S0604

1

IC,GMCP,MCP79U-A01Q,27MMX27MM,BGA1588

IC,PDC,QS,1.60GHZ,17W,1066,6M

CPU_1_6GHZ

CRITICAL

U1000

1

337S3658 337S3659

CRITICAL

CPU_1_8GHZ

1

U1000

IC,PDC,QS,1.80GHZ,17W,1066,6M

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

MURATA

SAMSUNG

TAIYO YUDEN

SAMSUNG

1UF 0402 CAPACITOR VENDOR TABLES FOR ACOUSTICS

SAMSUNG

MURATA

2.2UF 0402 CAPACITOR VENDOR TABLES FOR ACOUSTICS

TAIYO YUDEN

10UF 0603 CAPACITOR VENDOR TABLES FOR ACOUSTICS

CAP, 10UF, 6.3V, 20%, 0603

138S0626

C7266,C7267,C7269,C7401,C7605

5

CRITICAL

SS_CAP_10UF

CAP, 10UF, 6.3V, 20%, 0603

CRITICAL

C7266,C7267,C7269,C7401,C7605

5

MU_CAP_10UF

138S0625

CRITICAL

MU_CAP_10UF

C1220,C1221,C1222,C1223,C1224,C1225,C1226,C1227,C1228,C1229

10

CAP, 10UF, 6.3V, 20%, 0603

138S0625

CRITICAL

3

C1230,C1231,C1280

CAP, 10UF, 6.3V, 20%, 0603

MU_CAP_10UF

138S0625

MU_CAP_10UF

CRITICAL

138S0625

CAP, 10UF, 6.3V, 20%, 0603

8

C4109,C4613,C5066,C7502,C7541,C7650,C7690,C9012

CRITICAL

C1210,C1211,C1212,C1213,C1214,C1215,C1216,C1217,C1218,C1219

10

CAP, 10UF, 6.3V, 20%, 0603

MU_CAP_10UF

138S0625

C1200,C1201,C1202,C1203,C1204,C1205,C1206,C1207,C1208,C1209

MU_CAP_10UF

CAP, 10UF, 6.3V, 20%, 0603

CRITICAL

10

138S0625

138S0626

CAP, 10UF, 6.3V, 20%, 0603

CRITICAL

SS_CAP_10UF

8

C4109,C4613,C5066,C7502,C7541,C7650,C7690,C9012

138S0626

3

CRITICAL

CAP, 10UF, 6.3V, 20%, 0603

C1230,C1231,C1280

SS_CAP_10UF

138S0626

10

CRITICAL

CAP, 10UF, 6.3V, 20%, 0603

SS_CAP_10UF

C1200,C1201,C1202,C1203,C1204,C1205,C1206,C1207,C1208,C1209

7

138S0632

SS_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C2530,C2531,C2532,C2533,C2534,C2535,C2536

8

138S0632

SS_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

C3642,C3644,C3645,C3646,C3650,C3651,C3654,C3655

CRITICAL

SS_CAP_2_2UF

138S0632

10

C3620,C3621,C3624,C3625,C3630,C3631,C3634,C3635,C3640,C3641

CAP, 2.2UF, 6.3V, 20%, 0402 CAP, 2.2UF, 6.3V, 20%, 0402

C3620,C3621,C3624,C3625,C3630,C3631,C3634,C3635,C3640,C3641

MU_CAP_2_2UF

CRITICAL

10

138S0633

C3642,C3644,C3645,C3646,C3650,C3651,C3654,C3655

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

8

138S0633

MU_CAP_2_2UF

138S0633

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

8

C2570,C2571,C2572,C2573,C2574,C2575,C2576,C2610

MU_CAP_2_2UF

138S0633

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

3

C4800,C7362,C7511

MU_CAP_2_2UF

9

CRITICAL

CAP, 1UF, 6.3V, 10%, 0402

SS_CAP_1UF

138S0629

C2860,C7296,C7297,C7492,C7500,C7940,C7941,C9760,C7603 C2860,C7296,C7297,C7492,C7500,C7940,C7941,C9760,C7603

9

CRITICAL

CAP, 1UF, 6.3V, 10%, 0402

138S0628

MU_CAP_1UF

CRITICAL

SS_CAP_1UF

138S0629

CAP, 1UF, 6.3V, 10%, 0402

C2506,C2507,C2516,C2517,C7100,C7101,C7103

7

CRITICAL

SS_CAP_1UF

138S0629

CAP, 1UF, 6.3V, 10%, 0402

C7947,C7360,C2504,C2505

4

CAP, 1UF, 6.3V, 10%, 0402

CRITICAL

TY_CAP_1UF

138S0630

7

C2506,C2507,C2516,C2517,C7100,C7101,C7103

CRITICAL

TY_CAP_1UF

CAP, 1UF, 6.3V, 10%, 0402

138S0630

4

C7947,C7360,C2504,C2505

C2550,C2551,C2552,C2553,C2555,C2560,C2562,C2564

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL8MU_CAP_2_2UF

138S0627

10

TY_CAP_10UF

CRITICAL

C1200,C1201,C1202,C1203,C1204,C1205,C1206,C1207,C1208,C1209

CAP, 10UF, 6.3V, 20%, 0603

TY_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C4800,C7362,C7511

3

138S0634

CAP, 2.2UF, 6.3V, 20%, 0402

138S0632

10

CRITICAL

C9900,C9901,C9902,C9903,C9904,C9905,C9906,C9907,C9908,C9909

SS_CAP_2_2UF

CRITICAL

138S0627

TY_CAP_10UF

3

C1230,C1231,C1280

CAP, 10UF, 6.3V, 20%, 0603

TY_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C2550,C2551,C2552,C2553,C2555,C2560,C2562,C2564

8

138S0634

TY_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

C9910,C9911,C9912,C9913,C9914,C9915,C9916,C9917,C9918,C9919

10

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C3542,C3544,C3545,C3546,C3550,C3551,C3554,C3555

TY_CAP_2_2UF

138S0634

8

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C3642,C3644,C3645,C3646,C3650,C3651,C3654,C3655

TY_CAP_2_2UF

138S0634

8

TY_CAP_2_2UF

C1260,C1261,C1262,C1263,C1264,C1265,C1266,C1267

CRITICAL

138S0634

CAP, 2.2UF, 6.3V, 20%, 0402

8

138S0634

TY_CAP_2_2UF

CRITICAL

C9900,C9901,C9902,C9903,C9904,C9905,C9906,C9907,C9908,C9909

CAP, 2.2UF, 6.3V, 20%, 0402

10

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

TY_CAP_2_2UF

C1283,C1284,C1285,C1286,C1287,C1288,C1291,C1292,C1293,C1294,C1295,C1296

12

138S0634

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C3500,C3501,C3504,C3505,C3510,C3511,C3512,C3514,C3515,C3516

TY_CAP_2_2UF

10

138S0634

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C3520,C3521,C3524,C3525,C3530,C3531,C3534,C3535,C3540,C3541

TY_CAP_2_2UF

138S0634

10

CRITICAL

C3600,C3601,C3604,C3605,C3610,C3611,C3612,C3614,C3615,C3616

TY_CAP_2_2UF

10

CAP, 2.2UF, 6.3V, 20%, 0402

138S0634

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C3620,C3621,C3624,C3625,C3630,C3631,C3634,C3635,C3640,C3641

TY_CAP_2_2UF

138S0634

10

TY_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C2570,C2571,C2572,C2573,C2574,C2575,C2576,C2610

138S0634

8

TY_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

C9920,C9921,C9922,C9923,C9924,C9925,C9926,C9927,C9928,C9929

10

138S0634

TY_CAP_2_2UF

CRITICAL

C1240,C1241,C1242,C1243,C1244,C1245,C1246,C1247,C1248,C1249

CAP, 2.2UF, 6.3V, 20%, 0402

10

138S0634

TY_CAP_2_2UF

C1250,C1251,C1252,C1253,C1254,C1255,C1256,C1257,C1258,C1259

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

10

C1240,C1241,C1242,C1243,C1244,C1245,C1246,C1247,C1248,C1249

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL10MU_CAP_2_2UF

138S0633

CRITICAL

C2530,C2531,C2532,C2533,C2534,C2535,C2536

7

MU_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

10

CRITICAL

C9910,C9911,C9912,C9913,C9914,C9915,C9916,C9917,C9918,C9919

MU_CAP_2_2UF

C1250,C1251,C1252,C1253,C1254,C1255,C1256,C1257,C1258,C1259

MU_CAP_2_2UF

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

10

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

8

C1260,C1261,C1262,C1263,C1264,C1265,C1266,C1267

CRITICAL

MU_CAP_2_2UF

TY_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

C2530,C2531,C2532,C2533,C2534,C2535,C2536

7

138S0634

C9900,C9901,C9902,C9903,C9904,C9905,C9906,C9907,C9908,C9909

MU_CAP_2_2UF

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

10

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

8

138S0633

MU_CAP_2_2UF

C3542,C3544,C3545,C3546,C3550,C3551,C3554,C3555

CRITICAL

138S0627

TY_CAP_10UF

10

C1220,C1221,C1222,C1223,C1224,C1225,C1226,C1227,C1228,C1229

CAP, 10UF, 6.3V, 20%, 0603

138S0627

TY_CAP_10UF

CRITICAL

10

C1210,C1211,C1212,C1213,C1214,C1215,C1216,C1217,C1218,C1219

CAP, 10UF, 6.3V, 20%, 0603

CRITICAL

TY_CAP_10UF

CAP, 10UF, 6.3V, 20%, 0603

138S0627

8

C4109,C4613,C5066,C7502,C7541,C7650,C7690,C9012

CAP, 1UF, 6.3V, 10%, 0402

CRITICAL

MU_CAP_1UF

138S0628

4

C7947,C7360,C2504,C2505

138S0632

SS_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

8

C2550,C2551,C2552,C2553,C2555,C2560,C2562,C2564

C3520,C3521,C3524,C3525,C3530,C3531,C3534,C3535,C3540,C3541

CRITICAL

SS_CAP_2_2UF

138S0632

10

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

138S0632

12

CAP, 2.2UF, 6.3V, 20%, 0402

SS_CAP_2_2UF

C1283,C1284,C1285,C1286,C1287,C1288,C1291,C1292,C1293,C1294,C1295,C1296

138S0632

CAP, 2.2UF, 6.3V, 20%, 0402

10

CRITICAL

C9910,C9911,C9912,C9913,C9914,C9915,C9916,C9917,C9918,C9919

SS_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

10

138S0633

MU_CAP_2_2UF

C3600,C3601,C3604,C3605,C3610,C3611,C3612,C3614,C3615,C3616

CRITICAL

10

C3520,C3521,C3524,C3525,C3530,C3531,C3534,C3535,C3540,C3541

138S0633

MU_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

CAP, 1UF, 6.3V, 10%, 0402

CRITICAL

MU_CAP_1UF

138S0628

7

C2506,C2507,C2516,C2517,C7100,C7101,C7103

CRITICAL

C4800,C7362,C7511

3

CAP, 2.2UF, 6.3V, 20%, 0402

138S0632

SS_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

SS_CAP_2_2UF

138S0632

8

C2570,C2571,C2572,C2573,C2574,C2575,C2576,C2610

C3542,C3544,C3545,C3546,C3550,C3551,C3554,C3555

SS_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

138S0632

8

CRITICAL

138S0632

10

SS_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

C3500,C3501,C3504,C3505,C3510,C3511,C3512,C3514,C3515,C3516

CRITICAL

10

CAP, 2.2UF, 6.3V, 20%, 0402

138S0632

C9930,C9931,C9932,C9933,C9934,C9935,C9936,C9937,C9938,C9939

SS_CAP_2_2UF

CRITICAL

138S0632

SS_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

10

C9920,C9921,C9922,C9923,C9924,C9925,C9926,C9927,C9928,C9929

TY_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

C9930,C9931,C9932,C9933,C9934,C9935,C9936,C9937,C9938,C9939

10

138S0634

CRITICAL

SS_CAP_2_2UF

138S0632

10

CAP, 2.2UF, 6.3V, 20%, 0402

C3600,C3601,C3604,C3605,C3610,C3611,C3612,C3614,C3615,C3616

138S0632

CAP, 2.2UF, 6.3V, 20%, 0402

C1250,C1251,C1252,C1253,C1254,C1255,C1256,C1257,C1258,C1259

CRITICAL10SS_CAP_2_2UF

10

SS_CAP_10UF

138S0626

CRITICAL

C1210,C1211,C1212,C1213,C1214,C1215,C1216,C1217,C1218,C1219

CAP, 10UF, 6.3V, 20%, 0603

10

138S0626

C1220,C1221,C1222,C1223,C1224,C1225,C1226,C1227,C1228,C1229

CAP, 10UF, 6.3V, 20%, 0603

CRITICAL

SS_CAP_10UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

10

C3500,C3501,C3504,C3505,C3510,C3511,C3512,C3514,C3515,C3516

138S0633

MU_CAP_2_2UF

CRITICAL

CAP, 2.2UF, 6.3V, 20%, 0402

12

138S0633

MU_CAP_2_2UF

C1283,C1284,C1285,C1286,C1287,C1288,C1291,C1292,C1293,C1294,C1295,C1296

MU_CAP_2_2UF

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

CRITICAL

C9930,C9931,C9932,C9933,C9934,C9935,C9936,C9937,C9938,C9939

10

138S0633

CAP, 2.2UF, 6.3V, 20%, 0402

10

CRITICAL

C9920,C9921,C9922,C9923,C9924,C9925,C9926,C9927,C9928,C9929

MU_CAP_2_2UF

CRITICAL

138S0632

SS_CAP_2_2UF

CAP, 2.2UF, 6.3V, 20%, 0402

8

C1260,C1261,C1262,C1263,C1264,C1265,C1266,C1267

CAP, 2.2UF, 6.3V, 20%, 0402

C1240,C1241,C1242,C1243,C1244,C1245,C1246,C1247,C1248,C1249

10

138S0632

SS_CAP_2_2UF

CRITICAL

71

SYNC_DATE=N/A

SYNC_MASTER=N/A

051-7631

2.3.0

5

Acoustic Cap BOM Config Tables

C2860,C7296,C7297,C7492,C7500,C7940,C7941,C9760,C7603

9

CAP, 1UF, 6.3V, 10%, 0402

CRITICAL

138S0630

TY_CAP_1UF

5

C7266,C7267,C7269,C7401,C7605

CRITICAL

CAP, 10UF, 6.3V, 20%, 0603

138S0627

TY_CAP_10UF

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

FUNC TEST - SATA HDD

FUNC TEST - FAN CONNECTOR

FUNC TEST - DC-IN CONNECTOR

FUNC TEST - M93 WIRELESS CONNECTOR

x10

FUNC TEST - RIO HATCH CONNECTOR

FUNC TEST - CAMERA USB, LVDS, ALS

FUNC TEST - AUDIO CONNECTOR

FUNC TEST - IPD CONNECTOR

FUNC TEST - MIC

FUNC TEST - AIRPORT

NICE2HAVE NETS

FUNC TEST - BATTERY CONNECTOR

FUNC TEST - Power Supplies

NO_TEST

CLOCK NO_TESTS

NO_TEST

LVDS NO_TESTS

NO_TEST

Power Supply NO_TESTs

NO_TEST

NB NO_TESTS

These are normally testpoints but become NC

Functional Test Points

x13

.

x6

x2 x2

REQUIRED NETS

FUNC TEST - XDP/ITP CONNECTOR

x2

I454

I455 I457

I458

I459

I460

I461

I462

I463

I466

I467

I469

I470

I471

I472

I473

I474

I475

I476

I477

I478

I479

I480

I482

I483

I484

I499 I500

I501

I502 I503

I506

I507

I508

I509 I510

I511

I512

I513

I514 I515

I516

I517

I518

I519

I520

I521

I522

I593

I595

I638

I639

I640

I645 I646

I647

I648

I649

I650

I654 I655

I656 I657

I658

I659 I660

I661

I662 I663

I664

I665 I666

I667

I668

I669

I676

I680

I681

I682

I683

I684

I685

I686

I687

I688 I689

I690

I691

I692

I694 I695

I696

I697 I698

I699

I700

I701

I702 I703

I704

I705

I706

I711 I712

I713

I714

I716

I717

I718 I719

I720 I721

I722

I723 I725

I726

I727 I728

I734

I735

I736 I737

I738

I739

I740

I741

I742 I743

I744 I745

I746

I747

I748 I749

I750

I751

I752

I753 I754

I755

I756

I757

I92

Functional Test and No-Tests

2.3.0

6

051-7631

71

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

PP1V5_S3

TRUE

AUD_MIC_DATA HDA_SDOUT

TRUE

HDA_SDIN0

TRUE

SATA_HDD_R2D_N

TRUE

PP3V3_S0_HDD_F

TRUE

=I2C_ALS_SCL

PP3V3_LCDVDD_SW_F

TRUE

PP3V3_S0_LCD_F

LVDS_IG_DDC_CLK

TRUE

LVDS_IG_A_CLK_F_P

TRUE

LVDS_IG_A_CLK_F_N

TRUE

PPVOUT_S0_LCDBKLT

LCDBKLT_RTN<1..6>

TRUE

USB2_CAMERA_F_N

TRUE

USB2_CAMERA_F_P

TRUE

PP5V_S3_CAMERA_F

TRUE

PCIE_E_R2D_C_P_F

TRUE

PCIE_E_R2D_C_N_F

TRUE

PCIE_E_R2D_C_N_F

TRUE

=PP1V05_S0_CPU

TRUE

=PP3V3_S0_XDP

TRUE

XDP_TMS

TRUE

XDP_TDI

TRUE

XDP_TRST_L

TRUE

XDP_DBRESET_L

TRUE

XDP_CPURST_L

TRUE

FSB_CLK_ITP_N

TRUE

FSB_CLK_ITP_P

TRUE

JTAG_MCP_TMS

TRUE

MCP_DEBUG<7..0>

TRUE

JTAG_MCP_TRST_L

TRUE

PP18V5_DCIN

ADAPTER_SENSE

TRUE

SMBUS_SMC_BSA_SCL

TRUE

SMBUS_SMC_BSA_SDA

PP1V05_S5

PP1V5_S0

PP0V75_S0

PPVCORE_S0_CPU

PP5V_S0

BATT_POS

TRUE

PPMCPCORE_S0

PP1V05_S0

PP3V3_S0

DP_ML_C_P<3..0>

TRUE

FAN_RT_PWM

TRUE

=PP5V_S0_FAN

TRUE

FAN_RT_TACH

TRUE

CK505_SRC_CLKREQ6_L

TRUE

PCIE_WAKE_L AIRPORT_RST_L

TRUE

=SMB_AIRPORT_DATA

TRUE

=SMB_AIRPORT_CLK

TRUE

PP3V3_S0_MIC_F

AUD_MIC_CLK_F

TRUE TRUE

GND_MIC_F

TRUE

HDA_SYNC HDA_BIT_CLK

TRUE

AUD_MIC_CLK

TRUE

PM_SLP_S3_L

TRUE

SMC_LID

SMC_SYS_KBDLED

TRUE

SMC_SYS_LED

TRUE

=USB2_TPAD_N

TRUE

SMC_ONOFF_L

TRUE

=USB2_TPAD_P

TRUE

PP5V_S0_KBDLED_F

TRUE

PP5V_S3_TOPCASE_F

TRUE

=I2C_TPAD_SDA

TRUE TRUE

SMC_ONOFF_L =USB2_IR_N

TRUE TRUE

=USB2_IR_P PP5V_S0_KBDLED_F

TRUE

LSOC_PRESS_H_R

TRUE

XDP_TCK

TRUE

JTAG_MCP_TDO_CONN

TRUE

XDP_TDO_CONN

TRUE

LVDS_IG_A_DATA_P<0..2>

TRUE

LVDS_IG_A_DATA_N<0..2>

TRUE

SMBUS_MCP_0_CLK

TRUE

TP_XDP_OBSFN_B0

TRUE

XDP_BPM_L<0..5>

TP_XDP_OBSDATA_B3

TRUE

SMBUS_MCP_0_DATA

TRUE

XDP_OBS20

TRUE

XDP_PWRGD

TRUE

JTAG_MCP_TDI

TRUE

TP_XDP_OBSDATA_B2

TRUE

TP_XDP_OBSDATA_B1

TRUE

TP_XDP_OBSDATA_B0

TRUE

TP_XDP_OBSFN_B1

TRUE

=PPVIN_S0_AUDIO

PP3V3_S3_AP_AUX

TRUE

=SMB_AIRPORT_DATA

TRUE

AIRPORT_RST_L

TRUE

PCIE_E_R2D_C_P_F

TRUE

PCIE_E_D2R_N_F

TRUE

CK505_SRC_CLKREQ6_L

TRUE

PCIE_CLK100M_MINI_P_F

TRUE

PCIE_E_D2R_P_F

TRUE

SATA_HDD_R2D_P

TRUE

SATA_HDD_D2R_C_P

TRUE

DP_AUX_CH_C_N

TRUE

DP_AUX_CH_C_P

TRUE

DP_CA_DET_Q

TRUE

PP3V3_S0_DPPWR

=SMB_AIRPORT_CLK

TRUE

PCIE_CLK100M_MINI_N_F

TRUE

PCIE_WAKE_L

TRUE

AIRPORT_RST_L

TRUE

PP3V42_G3H_IPD_F

TRUE

=USB2_IR_N

TRUE

=USB2_IR_P

=I2C_TPAD_SCL

TRUE

SMC_BS_ALRT_L

TRUE

=I2C_ALS_SDA

LVDS_IG_DDC_DATA

TRUE

GND

TRUE

PP5V_S3_USB2_EXTA_F

TRUE

USB2_EXTA_F_N

TRUE

USB2_EXTA_F_P

TRUE

DP_HPD_Q

HDMI_CEC

TRUE

DP_ML_C_N<3..0>

TRUE

SATA_HDD_D2R_C_N

TRUE

PP3V3_S3 PP5V_S3 PP3V3_S5 PP3V42_G3H PP18V5_G3H PPDCIN_G3H PPBUS_G3H PPBUS_R_G3H PP1V8_S0

AUD_MIC_DATA_F

TRUE

12

56

11

39

40

68

67

68

70

10

65

24

65

68

34

42

68

35

40

39

70

39

38

70

65

67

42

65

42

34

61

70

42

34

38

49

70

59

35

67

70

59

70

59

67

62

70

34

9

12

65

13

20

18

20

70

69

70

67

46

16

24

34

70

35

59

34

39

38

70

42

38

8

38

12

59

20

12

20

35

70

34

24

34

67

60

61

34

16

24

70

8

42

40

59

37

61

67

70

7

35

20

36

42

59

17

59

6

7

9

12

49

42

7

49

7

61

46

7

46

6

59

20

35

20

38

8

6

8

6

38

6

38

9

12

17

12

9

12

7

34

6

34

6

34

36

35

6

34

6

38

6

38

39

42

17

35

61

36

7

59

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

5.027 A

2.046 A

315 mA

57 mA (A01)

"S3" RAILS

13 A

6.207 A

165 mA

4.011 A

7.368 A

12.984 A

11.551 A

27 A

1.075 A

3.134 A

562 mA

19 mA

7.047 A

PEX & SATA AVDD/DVDD aliases

57 mA (A01)

"S5" RAILS"S0" RAILS

"G3H" RAILS

206 mA (A01)

"RMGT" RAILS

7

2.3.0

SYNC_MASTER=WFERRY

71

051-7631

Power Aliases

SYNC_DATE=06/15/2006

=PPVIN_S5_1V05

MIN_LINE_WIDTH=0.5MM

PPBUS_R_G3H

VOLTAGE=12.6V MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25MM

=PPVIN_S5_1V5S30V75S0 =PPVIN_S0_MCPCORES0

=PPVIN_S5_CPU_IMVP

=PP5V_S3_TOPCASE

=PP5V_S3_CAMERA

=PP3V3_S3_SMBUS_SMC_MGMT

=PP5V_S3_P1V05S0FET

=PP3V3_ENET_MCP_RMGT

=PP3V3_S3_VREFMRGN

MIN_LINE_WIDTH=0.2 mm

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mm

PP1V05_S0

VOLTAGE=1.05V

=PP3V3_S3_FET

=PP5V_S3_REG

=PP1V05_S0_MCP_PEX_AVDD0

=PP1V05_S0_MCP_PEX_DVDD0

PP1V05_S0_MCP_PEX_AVDD

MAKE_BASE=TRUE

=PP1V05_RMGT_FET

=PP1V05_ENET_MCP_PLL_MAC

=PP1V05_ENET_MCP_RMGT

=PP1V05_S0_MCP_PEX_DVDD1

=PP1V05_S0_MCP_PEX_AVDD1

=PP3V3_S5_MCP =PP3V3_S5_MCPPWRGD

=PP3V3_S0_DPCONN =PP3V3_S0_FAN

=PP1V05_S0_CPU

=PP1V05_S0_FET

=PP1V05_S0_MCP_AVDD_UF =PP1V05_S0_MCP_FSB =PP1V05_S0_MCP_HDMI_VDD =PP1V05_S0_MCP_PEX_DVDD =PP1V05_S0_MCP_PLL_UF =PP1V05_S0_MCP_SATA_DVDD =PP1V05_S0_SMC_LS =PP1V05_S0_VMON

=PP0V75_S3_VTTREF

=PP3V42_G3H_REG

=PP5V_S0_FET

=PP3V3R1V8_S0_MCP_IFP_VDD

=PPVTT_S3_DDR_BUF

=PP0V75_S0_MEM_VTT_A

PP0V75_S0

MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE

VOLTAGE=0.75V

MIN_LINE_WIDTH=0.25 mm

=PP0V75_S0_MEM_VTT_B

=PPVTT_S0_VTTCLAMP

=PP0V75_S0_REG

MIN_NECK_WIDTH=0.20 MM VOLTAGE=0.9V

PPMCPCORE_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.25 MM

=PP3V3_S3_BT

MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM

PP18V5_G3H

MAKE_BASE=TRUE

VOLTAGE=18.5V

=PP18V5_G3H_CHGR

=PP3V42_G3H_SMC=PPVCORE_S0_CPU

=PPMCPCORE_S0_REG

=PPVCORE_S0_CPU_REG

VOLTAGE=0.9V

MIN_NECK_WIDTH=0.20 MM MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.25 MM

PPVCORE_S0_CPU

=PPVCORE_S0_MCP_VSENSE

VOLTAGE=1.8V MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.25 mm

PP1V8_S0

=PP5V_S0_DP_AUX_MUX =PP5V_S0_FAN =PP5V_S0_KBDLED =PP5V_S0_LPCPLUS

VOLTAGE=1.8V

PP1V5_S3

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.6 mm

=PP1V5_S3_REG

=PP1V5_S3_P1V5S0FET

=PP1V5_S3_MEM_B

=PP1V5_S3_MEMRESET

=PP5V_S0_CPU_IMVP

MAKE_BASE=TRUE

VOLTAGE=5V

MIN_NECK_WIDTH=0.2 mm

PP5V_S0

MIN_LINE_WIDTH=0.25 mm

=PP1V5_S3_MEM_A

=PP3V42_G3H_SMCVREF

=PP3V42_G3H_LPCPLUS

=PP3V42_G3H_CHGR

=PP3V42_G3H_SMCUSBMUX

=PP3V42_G3H_SMBUS_SMC_BSA

MIN_NECK_WIDTH=0.2 mm

PP3V42_G3H

MIN_LINE_WIDTH=0.3 mm VOLTAGE=3.42V

MAKE_BASE=TRUE

=PP3V42_G3H_IPD

=PP1V05_S5_P1V05S0FET =PP1V05_RMGT_P1V05RMGTFET

=PP3V3_S5_LCD

=PP3V3_S5_AIRPORT_AUX

MIN_NECK_WIDTH=0.25MM MAKE_BASE=TRUE

VOLTAGE=18.5V

MIN_LINE_WIDTH=0.5MM

PPDCIN_G3H

=PPVIN_G3H_P3V42G3H

=PP1V5_S0_FET

=PP1V5_S0_CPU

=PP1V05_S0_MCP_PEX_DVDD

=PP3V3_S5_REG

=PP3V3_RMGT_FET

=PP3V3_S0_IMVP

=PP1V5_S0_VMON =PP1V8R1V5_S0_MCP_MEM

MIN_LINE_WIDTH=0.25 mm

MAKE_BASE=TRUE

PP1V5_S0

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 mm

=PP3V3_S5_MCP_GPIO =PP3V3_S5_P1V05FET =PP3V3_S5_P3V3S0FET =PP3V3_S5_P3V3S3FET =PP3V3_S5_PWRCTL =PP3V3_S5_ROM =PP3V3_S5_SMBUS_MCP_1 =PP3V3_S5_MEMRESET

=PP3V3_S5_P1V05RMGTFET

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm

MAKE_BASE=TRUE

PP3V3_S5

VOLTAGE=3.3V

=PP3V3_S0_LCDBKLT

=PPVIN_S3_5VS3

=PPBUSB_G3H

=PPBUS_S0_LCDBKLT

=PPVIN_S0_AUDIO

=PPVIN_S5_3V3S5

=PPBUS_G3HRS5

=PP5V_S3_MCPREG

=PPDCIN_G3H

=PP1V05_S5_REG

=PPVCORE_S0_MCP

=PPBUSA_G3H

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.25 mm

PPBUS_G3H

MAKE_BASE=TRUE

VOLTAGE=12.6V

=PPVIN_G3H_DCIN

PP1V05_RMGT

MIN_LINE_WIDTH=0.2 mm VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE

PP3V3_RMGT

MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.2 mm VOLTAGE=3.3V

=PP5V_S3_P5VS0FET

=PP5V_S3_EXTUSB

=PP5V_S3_1V5S30V75S0

=PP5V_S3_VTTCLAMP

=PP5V_S3_MCPDDRFET

MAKE_BASE=TRUE

VOLTAGE=5V

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.6 mm

PP5V_S3

=PP3V3_S3_SMBUS_SMC_A_S3

=PP3V3_S3_SMS

=PP3V3_S3_SMC

=PP3V3_S3_DDRREG =PP3V3_S3_MCPREG =PP3V3_S3_MCP_GPIO

VOLTAGE=3.3V MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.25 mm

PP3V3_S3

MIN_NECK_WIDTH=0.2 mm

=PP3V3_S5_P3V3RMGTFET

=PP1V05_S5_MCP_VDD_AUXC

VOLTAGE=1.05V

MIN_LINE_WIDTH=0.25 mm

PP1V05_S5

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mm

VOLTAGE=0.75V

PP0V75_S3

MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.25 mm

=PP3V3_S0_MCP

=PP3V3_S0_LCD

=PP3V3_S0_MCP_GPIO =PP3V3_S0_MCP_PLL_UF =PP3V3_S0_MCP_VPLL_UF =PP3V3_S0_PWRCTL =PP3V3_S0_SMBUS_SMC_0_S0 =PP3V3_S0_THRM_SNR

=PPVIN_S0_P1V8S0

=PP3V3_S0_VMON =PP3V3_S0_XDP

MIN_LINE_WIDTH=0.2 mm

MAKE_BASE=TRUE

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 mm

PP3V3_S0

=PP3V3_S0_LPCPLUS =PP3V3_S0_HDD =PP3V3_S0_SMBUS_SMC_B_S0 =PP3V3_S0_SMBUS_MCP_0 =PP3V3R1V5_S0_MCP_HDA =PP3V3_S0_SMC_LS =PP3V3_S0_MIC

=PP3V3_S0_FET

=PP1V8_S0_REG

12 11

22

33

10

21

64

32

31

66

20

22

20

70

22

70

22

9

13

23

22

49

23

70

70 58

40 11

70

46

70

30

70

28

70

11

22

70

19

48

70

58

35

22

58

70

22

70

21

18

56

12

70

22

53

6

54

51

50

38

59

42

57

17

25

6

57

55

16

22

57

22

17

16

21

24

61

46

6

57

22

8

17

7

22

19

40

56

54 24

57

17

25

33

6

33

57

54

6

34

6

49

39 10

51

50

6

43

6

60

6

38

41

6

54

57

29

26

50

6

27

40

41

58

37

42

6

38

57

59

34

6

49

57

10

7

55

57

50

56

15

6

17

57

56

41

42

26

57

6

62

55

44

63

6

55

43

51

49

53

21

44

6

49

70

57

37

54

57

6

42

47

40

54

51

20

6

57

21

6

70

20

59

17

22

23

24

42

45

52

56

6

41

36

42

20

40

59

57

52

OUT

IN

OUT OUT OUT OUT OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

CPU FSB FREQUENCY STRAPS

Extra FSB Pull-ups

Exist in MRB but not Intel designs. Here for CYA.

If found to be necessary, will move to page14.csa

LAN ALIASES

UNUSED ETHERNET RG/MII INTERFACE

USB ALIASES

EXTERNAL PORT A

CAMERA

PLACE CLIPS PER MCO ON TOPSIDE NEAR BATTERY CONNECTOR J6900

UNUSED USB PORTS

HDA PULL-DOWN

LVDS ALIASES

DACS ALIASES

UNUSED CRT & TV-OUT INTERFACE

EMI SPRING CLIPS

AIRPORT CARD AND TURBOMEM PRESENT SIGNAL

UNUSED GPU LANES

PCI-E ALIASES

UNUSED LVDS SIGNALS

UNUSED IPHS SIGNAL(FOR IPHONE JACK)

AUD_I2C_INT_L IS PU ON MCP PAGE

IR

BT (M93)

TRACKPAD(WELLSPRING)

STANDOFFS

BOSSES

SMC ALIASES

NO-CONNECT UNUSED SMC INTERFACE PORTS

DP HOTPLUG PULL-DOWN

FSB MHZ

266 133 200

(166)0 1 1

0 0 1 0 1 0

BSEL<2..0>

0 0 0

(RSVD)

(400)

333 100

1 1 1

1 1 0

1 0 1

1 0 0

MISC NC MCP79 ALIASES

NO_TEST

MEM ALIASES

UNUSED SATA ODD SIGNALS

SATA ALIASES

SC0900

1

PS-25N

CRITICAL

EMI-SPRING

Z0900

1

4.5OD2.0H-M1.6X0.35

Z0902

1

4.5OD2.0H-M1.6X0.35

Z0903

1

4.5OD2.0H-M1.6X0.35

Z0911

1

STDOFF-4.0OD2.4H-0.5-THNP

Z0912

1

STDOFF-4.0OD2.4H-0.5-THNP

Z0910

1

STDOFF-4.0OD2.4H-0.5-THNP

13

9

65

R0920

1

2

201

1/20W MF

5%

100K

R0940

1

2

201

MF

1/20W

5%

20K

RP0930

1 2 3 4

8 7 6 5

1/32W

5% 4X0201-HF

10K

RP0931

1 2 3 4

8 7 6 5

1/32W

10K

5% 4X0201-HF

RP0932

1 2 3 4

8 7 6 5

10K

5% 4X0201-HF

1/32W

R0999

1

2

1/20W

MF

201

5%

150

NO STUFF

R0998

1

2

201

150

5% 1/20W MF

NO STUFF

R0997

1

2

NO STUFF

201

200

5%

MF

1/20W

R0995

1

2

NO STUFF

1/20W

5%

220

201

MF

R0996

1

2

NO STUFF

62

201

MF

1/20W

5%

9

13 50 65

9

13 65

9

12 13 65

9

13 65

9

13 65

Z0901

1

4.5OD2.0H-M1.6X0.35

Z0904

1

4.5OD2.0H-M1.6X0.35

8

71

2.3.0

051-7631

SIGNAL ALIAS /RESET

SYNC_MASTER=(MASTER)

SYNC_DATE=(MASTER)

ENET_RESET_L

MCP_CLK25M_BUF0_R

ENET_PWRDWN_L

ENET_MDC ENET_TX_CTRL ENET_TXD<3..0>

NC_ENET_TXD<3..0>

MAKE_BASE=TRUE

NC_ENET_RESET_L

ENET_CLK125M_RXCLK

SATA_ODD_R2D_C_P SATA_ODD_R2D_C_N

MAKE_BASE=TRUE

TP_SATA_ODD_R2D_C_N

MAKE_BASE=TRUE

TP_SATA_ODD_D2R_N

=PP1V05_S0_MCP_FSB

LVDS_IG_B_DATA_N<3:0>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<15:0>

MAKE_BASE=TRUE

NC_MEM_B_CKE<3>

TRUE

NC_SMC_PA0

MAKE_BASE=TRUE

TRUE

MAKE_BASE=TRUE

TRUE

NC_MEM_A_CLK4P

MAKE_BASE=TRUE

NC_MEM_A_CLK4N

TRUE

MAKE_BASE=TRUE

NC_MEM_A_CLK3P

TRUE

MAKE_BASE=TRUE

NC_MEM_A_CLK3N

TRUE

MAKE_BASE=TRUE

NC_MEM_A_CS_L<2>

TRUE

MAKE_BASE=TRUE

NC_MEM_A_CS_L<3>

TRUE

MAKE_BASE=TRUE

NC_MEM_A_CKE<2>

TRUE

MAKE_BASE=TRUE

NC_MEM_A_CKE<3>

TRUE

MAKE_BASE=TRUE

NC_MEM_B_CLK4P

TRUE

MAKE_BASE=TRUE

NC_MEM_B_CLK4N

TRUE

MAKE_BASE=TRUE

NC_MEM_B_CLK3P

TRUE

MAKE_BASE=TRUE

NC_MEM_B_CLK3N

TRUE

MAKE_BASE=TRUE

NC_MEM_B_CS_L<2>

TRUE

MAKE_BASE=TRUE

NC_MEM_B_CS_L<3>

TRUE

MAKE_BASE=TRUE

NC_MEM_B_ODT<2>

TRUE

MAKE_BASE=TRUE

NC_MEM_B_ODT<3>

TRUE

MAKE_BASE=TRUE

NC_MEM_B_CKE<2>

TRUE

TP_MEM_B_CS_L<2>

TP_MEM_B_ODT<3> TP_MEM_B_CKE<2> TP_MEM_B_CKE<3>

TP_MEM_B_CS_L<3> TP_MEM_B_ODT<2>

TP_MEM_B_CLK4N TP_MEM_B_CLK3P TP_MEM_B_CLK3N

TP_MEM_A_CKE<2> TP_MEM_A_CKE<3> TP_MEM_B_CLK4P

TP_MEM_A_CLK3N TP_MEM_A_CS_L<2> TP_MEM_A_CS_L<3>

TP_MEM_A_CLK3P

TP_MEM_A_CLK4N

TP_MEM_A_CLK4P

TP_ODD_PWR_EN_L

MAKE_BASE=TRUE

TP_FW_PME_L

MAKE_BASE=TRUE

TP_CPU_PECI_MCP

ODD_PWR_EN_L

FW_PME_L

CPU_PECI_MCP

FSB_BREQ0_L

CPU_DPRSTP_L

=MCP_BSEL<0:2>

FSB_CPURST_L CPU_INTR CPU_NMI

TP_SATA_ODD_R2D_C_P

MAKE_BASE=TRUE

TP_USB_EXCARD_P

MAKE_BASE=TRUE

TP_SATA_ODD_D2R_P

MAKE_BASE=TRUE

TP_USB_EXTB_N

SATA_ODD_D2R_P SATA_ODD_D2R_N

HPLUG_DET2

MAKE_BASE=TRUE

=DVI_HPD_GMUX_INT

NC_LVDS_IG_B_CLK_N

NO_TEST=TRUE

MAKE_BASE=TRUE

TRUE

MAKE_BASE=TRUE

NC_ESTARLDO_EN

SMC_P26

SMC_PA1

NC_SMC_PA1

TRUE

MAKE_BASE=TRUE

SMC_PA0

ENET_MDIO

=USB2_EXTA_P

MAKE_BASE=TRUE

USB_EXTA_P =USB2_EXTA_N =EXTAUSB_OC_L USB_EXTA_OC_L

MAKE_BASE=TRUE

=USB2_CAMERA_P

USB_CAMERA_P

MAKE_BASE=TRUE

=USB2_CAMERA_N

USB_CAMERA_N

MAKE_BASE=TRUE

USB_TPAD_P

MAKE_BASE=TRUE

=USB2_TPAD_N

USB_TPAD_N

MAKE_BASE=TRUE

=USB2_IR_P

USB_IR_P

MAKE_BASE=TRUE

USB_IR_N

MAKE_BASE=TRUE

USB_BT_N

MAKE_BASE=TRUE

=USB2_BT_P USB_BT_P

MAKE_BASE=TRUE

AUD_IPHS_SWITCH_EN

NC_ENET_PWRDWN_L

MAKE_BASE=TRUE

NC_ENET_MDC

MAKE_BASE=TRUE

SMC_ADAPTER_EN

MAKE_BASE=TRUE

SMC_ADAPTER_PRESENT

NC_LVDS_IG_A_DATA_P3

MAKE_BASE=TRUE

NO_TEST=TRUE

ENET_RXD<2>

MAKE_BASE=TRUE

NC_MCP_CLK25M_BUF0_R

USB_EXCARD_P

USB_EXTD_N

USB_MINI_P

MAKE_BASE=TRUE

TP_USB_EXTC_N

NC_ENEX_TX_CTRL

MAKE_BASE=TRUE

LVDS_IG_A_DATA_P<3>

TP_PEG_CLK100M_N

MAKE_BASE=TRUE

PEG_CLK100M_N

PEG_CLK100M_P

USB_MINI_N

USB_EXCARD_N

MAKE_BASE=TRUE

TP_USB_EXTD_P

NC_LVDS_IG_A_DATA_N3

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_LVDS_IG_B_DATA_P<3:0>

NO_TEST=TRUE

MAKE_BASE=TRUE

=PEG_D2R_P<15:0>

MAKE_BASE=TRUE

TP_PEG_PRSNT_L

MAKE_BASE=TRUE

TP_PEG_CLKREQ_L

ENET_RXD<3>

ENET_RX_CTRL ENET_CLK125M_TXCLK MCP_MII_VREF

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_CRT_IG_VSYNC

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_CRT_IG_B_COMP_PB

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_CRT_IG_HSYNC

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_CRT_IG_G_Y_Y

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_MCP_CLK27M_XTALOUT

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_CRT_IG_R_C_PR

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_MCP_CLK27M_XTALIN

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_MCP_TV_DAC_VREF

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_MCP_TV_DAC_RSET

MCP_TV_DAC_RSET

LVDS_IG_B_CLK_P

CRT_IG_B_COMP_PB CRT_IG_HSYNC

CRT_IG_G_Y_Y

MCP_CLK27M_XTALOUT CRT_IG_R_C_PR

MCP_CLK27M_XTALIN

MCP_TV_DAC_VREF

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_P<15:0>

MAKE_BASE=TRUE

TP_PEG_CLK100M_P

TP_EXTGPU_PWR_EN

MAKE_BASE=TRUE

TP_EXTGPU_RESET_L

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_P<15:0>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<15:0>

NC_LVDS_IG_B_DATA_N<3:0>

MAKE_BASE=TRUE

NO_TEST=TRUE

LVDS_IG_B_CLK_N

EXTGPU_RESET_L

EXTGPU_PWR_EN

=PEG_R2D_C_N<15:0>

=PEG_D2R_N<15:0>

PEG_PRSNT_L

=PEG_R2D_C_P<15:0>

PEG_CLKREQ_L

LVDS_IG_B_DATA_P<3:0>

USB_EXTC_N USB_EXTD_P

USB_EXTB_N

=USB2_BT_N

=USB2_IR_N

=USB2_TPAD_P

USB_EXTA_N

MAKE_BASE=TRUE

ENET_INTR_L

USB_EXTC_P

MAKE_BASE=TRUE

TP_USB_EXTC_P

PCIE_MINI_PRSNT_L PCIE_FC_PRSNT_L

USB_EXTB_P

MAKE_BASE=TRUE

TP_USB_EXCARD_N

TP_USB_MINI_N

MAKE_BASE=TRUE

TP_USB_MINI_P

MAKE_BASE=TRUE

TP_USB_EXTD_N

TP_USB_EXTB_P

MAKE_BASE=TRUE

CRT_IG_VSYNC

MAKE_BASE=TRUE

CPU_BSEL<0:2>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_B_CLK_P

LVDS_IG_A_DATA_N<3>

ENET_RXD<0> ENET_RXD<1>

MAKE_BASE=TRUE

TRUE

NC_SMC_P41

SMC_P41

ESTARLDO_EN

MAKE_BASE=TRUE

TRUE

NC_SMC_P26

MAKE_BASE=TRUE

TRUE

NC_SMC_P67

SMC_BIL_BUTTON_L

NC_SMC_GFX_OVERTEMP_L

TRUE

MAKE_BASE=TRUE

SMC_GFX_OVERTEMP_L

TRUE

MAKE_BASE=TRUE

NC_EXCARD_OC_L

SMC_EXCARD_OC_L

NC_ALS_RIGHT

TRUE

MAKE_BASE=TRUE

ALS_RIGHT

NC_ALS_GAIN

TRUE

MAKE_BASE=TRUE

ALS_GAIN

TRUE

NC_SMC_FAN_3_CTL

MAKE_BASE=TRUE

SMC_FAN_3_CTL

TRUE

MAKE_BASE=TRUE

NC_SMC_FAN_2_CTL

SMC_FAN_2_CTL

NC_SMC_FAN_1_CTL

TRUE

MAKE_BASE=TRUE

SMC_FAN_1_CTL

TRUE

MAKE_BASE=TRUE

NC_SMC_FAN_2_TACH

SMC_FAN_2_TACH

TRUE

MAKE_BASE=TRUE

NC_SMC_FAN_1_TACH

SMC_FAN_1_TACH

NC_SMC_P24

TRUE

MAKE_BASE=TRUE

SMC_P24

NC_SMC_EXCARD_CP

TRUE

MAKE_BASE=TRUE

SMC_EXCARD_CP

MAKE_BASE=TRUE

TRUE

NC_SMC_PA5

SMC_PA5

MAKE_BASE=TRUE

TRUE

NC_SMC_GPU_ISENSE

SMC_GPU_ISENSE

NC_SMC_P10

MAKE_BASE=TRUE

TRUE

SMC_P10

NC_SMC_NB_DDR_ISENSE

MAKE_BASE=TRUE

TRUE

SMC_NB_DDR_ISENSE

NC_ALS_LEFT

MAKE_BASE=TRUE

TRUE

ALS_LEFT

NC_SMC_FWE

TRUE

MAKE_BASE=TRUE

SMC_FWE

SMC_EXCARD_PWR_EN

TRUE

NC_ISENSE_CAL_EN

MAKE_BASE=TRUE

TRUE

MAKE_BASE=TRUE

NC_SMC_ANALOG_ID

SMC_ANALOG_ID

TRUE

MAKE_BASE=TRUE

NC_SMC_FAN_3_TACH

MAKE_BASE=TRUE

TRUE

NC_SMC_RSTGATE_L

ISENSE_CAL_EN

SMC_FAN_3_TACH

SMC_SMS_INT_L

MAKE_BASE=TRUE

=SMC_SMS_INT

SMC_GFX_THROTTLE_L

MAKE_BASE=TRUE

SMC_IG_THROTTLE_L

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.20 MM MIN_LINE_WIDTH=0.30 MM

VOLTAGE=0V

GND

22 21

40

13

67

68

38 68

68

39

68

67

68

67

68

38

68

67

17

19

7

17

15

20

18

13

19

17

39

17

37 19

37

37 19

59 19

19

6

19

6

19

34 19

18

20

34

17

68

19

17

16

19

68

16

17

16

17

68

19

34

6

19

17

68

19

17

39

40 39

39 20

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

IN IN IN

IN

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT

OUT

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

BI BI BI

BI

BI BI

BI BI BI BI BI

BI

OUT

IN

IN IN IN IN IN

IN IN

OUT

IN

IN IN

IN

OUT

BI BI BI BI

D11*

D7*

D6*

D5*

D4*

D3*

D17*

D16*

DINV0*

DSTBP0*

DSTBN0*

D10*

D2*

SLP*

PWRGOOD

PSI*

GTLREF

DSTBP3*

DSTBP2*

DSTBN3*

DSTBN2*

DSTBN1*

DPWR*

DPSLP*

DPRSTP*

DINV3*

DINV2*

D63*

D62*

D61*

D60*

D59*

D58*

D57*

D56*

D55*

D54*

D53*

D52*

D51*

D50*

D49*

D48*

D47*

D46*

D45*

D44*

D43*

D42*

D40*

D39*

D38*

D37*

D36*

D35*

D34*

D33*

D32*

D31*

D30*

D26*

D25*

D24*

D23*

D22*

D21*

D20*

D13*

D12*

D1*

D0*

COMP3

COMP2

COMP1

COMP0

BSEL2

BSEL1

BSEL0

D27*

D29*

D8*

DINV1*

DSTBP1*

D28*

D14* D15*

D9*

D19*

D18*

D41*

(2 OF 8)

DATA GRP 3

DATA GRP1

MISC

DATA GRP 0

DATA GRP 2

A6*

BR0*

BPM0*

DBR*

DEFER*

DBSY*

A7*

A15*

A14*

REQ2*

A17* A18*

PREQ*

IERR*

BPRI*

BNR*

A4*

TRST*

LINT1

TEST2

TEST4

A16*

A20M*

A3*

A30* A31* A32*

A34* A35*

A5*

A8*

ADSTB0*

ADSTB1*

BCLK1

BPM2* BPM3*

FERR*

HIT*

HITM*

IGNNE*

LINT0

RSVD7

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14

TEST1

TEST3

TEST5 TEST6

PROCHOT*

REQ0* REQ1*

REQ3* REQ4*

SMI*

TCK

TDO

THERMTRIP*

THRMDA THRMDC

TMS

PRDY*

BPM1*

RS2*

RS1*

RS0*

RESET*

DRDY*

ADS*

A19* A20* A21*

A23*

A22*

A24* A25* A26* A27* A28* A29*

A33*

STPCLK*

A13*

A12*

A11*

BCLK0

TDI

TRDY*

LOCK*

INIT*

A10*

A9*

(1 OF 8)

XDP/ITP SIGNALS

ADDR GROUP0ADDR GROUP1

THERMAL

H CLK

ICH

CONTROL

OUT

IN IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

SYNC FROM M97

CPU JTAG Support

PLACEMENT_NOTE (all 4 resistors):

R1000

1

2

MF

1/20W

1%

54.9

201

R1002

1

2

MF

1/20W

5%

68

201

R1005

1

2

1/20W

1%

MF

1K

PLACEMENT_NOTE=Place R1005 within 12.7mm of CPU.

201

R1006

1

2

2K

201

PLACEMENT_NOTE=Place R1006 within 12.7mm of CPU.

1% MF

1/20W

R1023

1

2

201

MF

1/20W

1%

54.9

Place within 12.7mm of CPU

R1022

1

2

201

MF

1/20W

1%

27.4

Place within 12.7mm of CPU

R1021

1

2

54.9

1%

1/20W

MF

201

Place within 12.7mm of CPU

R1020

1

2

201

MF

1/20W

1%

27.4

Place within 12.7mm of CPU

13 65

8

13 50 65

13 65

12 13 65

13 65

8

65

8

65

8

65

13 65

8

13 65

6

12 65

6

12 65

6

12 65

6

12 65

6

12 65

6

12 65

9

12 65

13 40 50 65

45

13 40 65

13 65

8

12 13 65

13 65

6 9

12 65

6 9

12 65

6 9

12 65

6 9

12 65

45

13 65

8

13 65

8

13 65

R1010

1 2

NO STUFF

201

0

1/20W

MF

5%

R1011

1

2

1K

MF

5%

1/20W

NO STUFF

201

R1001

1

2

1/20W

1%

MF

54.9

201

R1090

1 2

201

MF

1/20W

54.9

1%

R1091

1 2

201

54.9

1/20W

MF

1%

R1093

1 2

1/20W

201

54.9

MF

1%

13 65

R1094

1 2

201

649

1/20W

MF

1%

R1012

1

2

NO STUFF

1/20W

5%

1K

MF 201

C1014

1

2

0.1uF

16V

10%

X5R

NO STUFF

PLACEMENT_NOTE=Place C1014 within 12.7mm of CPU.

402

U1000

OMIT

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

BGA

PENRYN-SFF

R1092

1 2

PLACEMENT_NOTE=Place R1092 near ITP connector (if present)

201

1%

MF

1/20W

54.9

U1000

AC5 AD2 AD4 AA5 AE5 AB2 AC1

AN1 AK4 AG1 AT4

C7

AK2 AT2 AH2 AF4 AJ5 AH4 AM4 AP4 AR5

P2

AJ1 AL1 AM2 AU5 AP2 AR1

V4 W1

T4 AA1 AB4

T2

M4

Y4

AN5

A35 C35

J5

AY8 BA7 BA5 AY2

L5

M2

J7

J1

N5 F38

D4

H2 F2

B40

F10

D8

C9

C5

N1

AV10 AV2

D38

R1

R5

U1

P4

W5

G5 K2 H4 K4

H8 V2 Y2 AG5 AL5

J9 F4

E5

F8

AV4 AW7 AU1

E37 D40 C43

AE41 AY10 AC43

B10

BB34 BD34

AW5

L1

AV8

PENRYN-SFF

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

OMIT

BGA

6

12 24

13 65

71

051-7631

2.3.0

9

CPU FSB

SYNC_MASTER=M97

SYNC_DATE=02/04/2008

CPU_GTLREF

FSB_D_L<24>

FSB_D_L<23>

FSB_DSTB_L_N<2>

CPU_DPRSTP_L

CPU_COMP<2>

CPU_COMP<1>

CPU_COMP<0>

FSB_DINV_L<3>

FSB_DSTB_L_P<3>

FSB_D_L<28>

FSB_D_L<27>

FSB_D_L<26>

FSB_D_L<21>

CPU_PROCHOT_L

PM_THRMTRIP_L

FSB_A_L<6>

FSB_BREQ0_L

XDP_BPM_L<0>

XDP_DBRESET_L

FSB_DEFER_L

FSB_DBSY_L

FSB_A_L<7>

FSB_A_L<15>

FSB_A_L<14>

FSB_REQ_L<2>

FSB_A_L<17> FSB_A_L<18>

XDP_BPM_L<5>

CPU_IERR_L

FSB_BPRI_L

FSB_BNR_L

FSB_A_L<4>

XDP_TRST_L

CPU_NMI

CPU_TEST2

CPU_TEST4

FSB_A_L<16>

CPU_A20M_L

FSB_A_L<3>

FSB_A_L<30> FSB_A_L<31> FSB_A_L<32>

FSB_A_L<34> FSB_A_L<35>

FSB_A_L<5>

FSB_A_L<8>

FSB_ADSTB_L<0>

FSB_ADSTB_L<1>

FSB_CLK_CPU_N

XDP_BPM_L<2> XDP_BPM_L<3>

CPU_FERR_L

FSB_HIT_L FSB_HITM_L

CPU_IGNNE_L

CPU_INTR

NC_CPU_RSVD_J9

NC_CPU_RSVD_F4 NC_CPU_RSVD_H8 NC_CPU_RSVD_V2 NC_CPU_RSVD_Y2 NC_CPU_RSVD_AG5

NC_CPU_RSVD_AL5

CPU_TEST1

TP_CPU_TEST3

TP_CPU_TEST5 TP_CPU_TEST6

FSB_REQ_L<0> FSB_REQ_L<1>

FSB_REQ_L<3> FSB_REQ_L<4>

CPU_SMI_L

XDP_TCK

XDP_TDO

CPU_THERMD_P CPU_THERMD_N

XDP_BPM_L<4>

XDP_BPM_L<1>

FSB_RS_L<2>

FSB_RS_L<1>

FSB_RS_L<0>

FSB_CPURST_L

FSB_DRDY_L

FSB_ADS_L

FSB_A_L<19> FSB_A_L<20> FSB_A_L<21>

FSB_A_L<23>

FSB_A_L<22>

FSB_A_L<24> FSB_A_L<25> FSB_A_L<26> FSB_A_L<27> FSB_A_L<28> FSB_A_L<29>

FSB_A_L<33>

CPU_STPCLK_L

FSB_A_L<13>

FSB_A_L<12>

FSB_A_L<11>

FSB_CLK_CPU_P

XDP_TDI

FSB_TRDY_L

FSB_LOCK_L

CPU_INIT_L

FSB_A_L<10>

FSB_A_L<9>

XDP_TMS

XDP_TCK

XDP_TRST_L

XDP_TDI

XDP_TDO

FSB_D_L<41>

FSB_D_L<18> FSB_D_L<19>

FSB_D_L<9>

FSB_D_L<15>

FSB_D_L<14>

FSB_DSTB_L_P<1> FSB_DINV_L<1>

FSB_D_L<8>

FSB_D_L<29>

CPU_BSEL<0> CPU_BSEL<1> CPU_BSEL<2>

CPU_COMP<3>

FSB_D_L<0> FSB_D_L<1>

FSB_D_L<12> FSB_D_L<13>

FSB_D_L<20>

FSB_D_L<22>

FSB_D_L<25>

FSB_D_L<30> FSB_D_L<31>

FSB_D_L<32> FSB_D_L<33> FSB_D_L<34> FSB_D_L<35> FSB_D_L<36> FSB_D_L<37> FSB_D_L<38> FSB_D_L<39> FSB_D_L<40>

FSB_D_L<42> FSB_D_L<43> FSB_D_L<44> FSB_D_L<45> FSB_D_L<46> FSB_D_L<47>

FSB_D_L<48> FSB_D_L<49> FSB_D_L<50> FSB_D_L<51> FSB_D_L<52> FSB_D_L<53> FSB_D_L<54> FSB_D_L<55> FSB_D_L<56> FSB_D_L<57> FSB_D_L<58> FSB_D_L<59> FSB_D_L<60> FSB_D_L<61> FSB_D_L<62> FSB_D_L<63>

FSB_DINV_L<2>

CPU_DPSLP_L FSB_DPWR_L

FSB_DSTB_L_N<1> FSB_DSTB_L_N<3>

FSB_DSTB_L_P<2>

TP_CPU_PSI_L

CPU_PWRGD FSB_CPUSLP_L

FSB_D_L<2>

FSB_D_L<10>

FSB_DSTB_L_N<0> FSB_DSTB_L_P<0> FSB_DINV_L<0>

FSB_D_L<16> FSB_D_L<17>

FSB_D_L<3> FSB_D_L<4> FSB_D_L<5> FSB_D_L<6> FSB_D_L<7>

FSB_D_L<11>

=PP1V05_S0_CPU

XDP_TMS

CPU_TEST4

CPU_TEST1 CPU_TEST2

12

65

11

65

12

65

10

12

65

9

12

7

9

25

65

9

6

9

65

6

9

VSSVSS

(4 OF 8)

VSSVSS

(5 OF 8)

VSS VSS

(6 OF 8)

VCC VCC

(7 OF 8)

VCCP VCCP

(8 OF 8)

OUT

OUT OUT

VCCA

VID

VCC

VCCP

(3 OF 8)

VSSSENSE

VCCSENSE

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

LAYOUT NOTE:

ZO=27.4 OHM DIFFERENTIAL TRACE ROUTING.

CPU_VCCSENSE_P/CPU_VCCSENSE_N USE

VCCA=1.5 ONLY

0.130A

(CPU IO POWER 1.05V)

27A

(CPU CORE POWER)

WITHIN 1 INCH OF CPU W/ NO STUB

LAYOUT NOTE: PLACE R1100 AND R1101

LAYOUT NOTE:

PROVIDE A TEST POINT (WITH NO STUB)

BETWEEN VCCSENSE AND VSSSENSE

TO CONNECT A DIFFERENTIAL PROBE

(CPU INTERNAL PLL POWER 1.5V)

2.5A

U1000

B42 H42

P42

G29 E27 E29 N31 L31 J31 N27 N29 L27 L29

AD42

J27 J29 W31 W27 W29 U31 R31 U27 U29 R27

AB42

R29 AC31 AA31 AC27 AC29 AA27 AA29 AJ31 AG31 AE31

Y42

AJ27 AJ29 AG27 AG29 AE27 AE29 AR31 AR27 AR29 AN31

AK42

AL31 AN27 AN29 AL27 AL29 AW31 AU31 AW27 AW29 AU27

AH42

AU29 BC31 BA31 BC27 BC29 BA27 BA29 C25 C23 C21

AF42

G21 G23 G25

AP42 AM42 AY42

F42

AV42 AT42 AV44 AY44 BB42 BA43

C39 H38 G37 E39

D42

N39 M38 L39 J39 W39 U39 T38

R39 AD38 AC39

D44

AA39

Y38 AJ39 AH38 AG39 AE39 AR37 AR39 AN39 AM38

F44

AL39 AW37 AW39 AU37 AU39 AT38 BD38 BD40 BC41 BA39

M42

B36

D36

H34

M36

M34

K34

T36

V34

T34

P34

K42

AD36

Y36 AD34 AB34

Y34 AK34 AH36 AH34 AF34 AR35

V42

AM36

AP34 AM34 AV36 AT36 AY34 AW33 AW35 AV34 AU35

T42

BD36 BB36 BC33 BA33 C31 C29 C27 G31 E31 G27

OMIT

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

PENRYN-SFF

BGA

U1000

E21 E23 E25 N21 N23 N25 L21 L23 L25 J21 J23 J25 W21 W23 W25 U21 U23 U25 R21 R23

R25 AC21 AC23 AC25 AA21 AA23 AA25 AJ21 AJ23 AJ25 AG21 AG23 AG25 AE21 AE23 AE25 AR21 AR23 AR25 AN21 AN23 AN25 AL21 AL23 AL25 AW21 AW23 AW25 AU21 AU23 AU25 BC21 BC23 BC25 BA21 BA23 BA25

C19

C17

G17

G19

E17

E19

N17

N19

L17

L19

J17

J19

W17

W19

U17

U19

R17

R19 AC17 AC19 AA17 AA19 AJ17 AJ19 AG17 AG19

AE17 AE19 AR17 AR19 AN17 AN19 AL17 AL19 AW17 AW19 AU17 AU19 BC17 BC19 BA17 BA19 C15 C11 H10 G15 E15 M10 N15 L15 J15 M12 T10 W15 U15 R15 T12 AD10 Y10 AC15 AA15 AD12 Y12 AH10 AJ15 AG15 AE15 AH12 AM10 AR15 AN15 AL15 AM12 AT10 AW15 AU15 AY12 AW11 AW13 AV12 AT12 BC15 BA15 BC11

BB12 BA11 BA13 B6 H6 G9 F6 E9 D6 M6 M8 K6 K8 U5 V6 V8 T6 T8 P6 P8 AD6 AD8 AB6 AB8

OMIT

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

PENRYN-SFF

BGA

U1000

Y6

Y8 AK6 AK8 AH6 AH8 AF6 AF8 AP6 AP8 AM6 AM8 AY6 AW9 AU7 AV6 AU9 AT6 AT8 BD6 BC9 BB6 BA9

C3

B4

G3

E3

D2

N3

L3

J3

W3

U3

R3 AC3 AA3

AJ3 AG3 AE3 AR3 AN3 AL3 AW3 AU3 BD4 BC3 BB2 BA3 G1 E1 AW1 BA1 A39 A41 A31 A27 A29 A21 A23 A25 A17 A19 A15 A11 A9 A5 A7

OMIT

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

PENRYN-SFF

BGA

U1000

BD30 BB28 BB30

B24 B22 H22 H24 F22 F24 D24 D22 M22 M24 K22 K24 V22 V24 T22 T24 P22

P24 AD22 AD24 AB22 AB24

Y22

Y24 AK22 AK24 AH22 AH24 AF22 AF24 AP22 AP24 AM22 AM24 AY22 AY24 AV22 AV24 AT22 AT24 BD22 BD24 BB22 BB24

B20

B18

B16

H20

F20

D20

H16

H18

F16

F18

D18

D16

M20

K20 M16 M18 K16 K18 V20 T20 P20 V16 V18 T16 T18 P16 P18 AD20 AB20 Y20 AD16 AD18 AB16 AB18 Y16 Y18 AK20 AK16 AK18 AH20 AF20 AH16 AH18 AF16 AF18 AP20 AM20 AP16 AP18 AM16 AM18 AY20 AV20 AT20 AY16 AY18 AV16 AV18 AT16 AT18 BD20 BB20 BD16 BD18 BB16 BB18 AP14 AM14 AY14 AV14 AT14 BD14 BB14

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

OMIT

PENRYN-SFF

BGA

U1000

AH14 AG11 AG13 AF12 AF14 AE11 AE13 AP10 AR11 AR13 AP12 AN11 AN13 AL11 AL13 AU11 AU13 N7 N9 L7 L9 W7 W9 U7 U9 R7 R9 AC7 AC9 AA7 AA9 AJ7 AJ9 AG7 AG9 AE7 AE9 AR7 AR9 AN7 AN9 AL7 AL9 A33 A13

AE37 AP38 AN37 AL37

C33 B32 H36 F36 G35 F34 E33 E35 D32 K36 N35 L35 J35 W35 V36 P36 U35

R35 AB36 AC35 AA35 AK36 AF36 AJ35 AG35 AE35 AP36 AN35 AL35

C13

B14

B12

H12

H14

G11

G13

F12

F14

E11

E13

D14

D12

K10

N11

N13

M14

L11

L13

K12

K14

J11

J13

V10

P10

W11

W13

V12

V14

U11

U13

T14

R11

R13 P12 P14 AB10 AD14 AC11 AC13 AB12 AB14 AA11 AA13 Y14 AK10 AF10 AK12 AK14 AJ11 AJ13

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

OMIT

PENRYN-SFF

BGA

50 65

R1100

1

2

1% 1/20W

201

MF

100

R1101

1

2

201

MF

1/20W

1%

100

50 65

11 50 65

U1000

H32 G33

U33 T32 R33

P32 AD32 AC33 AB32 AA33

Y32 AK32

F32

AJ33 AH32 AG33 AF32 AE33 AR33 AP32 AN33 AM32 AL33

N33

AY32 AV32 AU33 AT32 AT34 BD32 BB32

B26

B30

B28

M32

H26

F26

D26

H28

H30

F28

F30

D30

D28

M26

L33

K26

M28

M30

K28

K30

V26

T26

P26

V28

V30

K32

T28

T30

P28

P30 AD26 AB26

Y26

AD28 AD30 AB28

J33

AB30 Y28 Y30 AK26 AH26 AF26 AK28 AK30 AH28 AH30

W33

AF28 AF30 AP26 AM26 AP28 AP30 AM28 AM30 AY26 AV26

V32

AT26 AY28 AY30 AV28 AV30 AT28 AT30 BD26 BB26 BD28

B34 D34

N37 L37

AB38 AA37 AK38 AJ37 AG37 AF38

K38 J37 W37 V38 U37 R37 P38 AC37

BD12

BD8 BC7 BB10 BB8 BC5 BB4 AY4

BC13

OMIT

PDC-Q9YM-ES1-1.86-17W-1066-CO-6M

PENRYN-SFF

BGA

11 50 65

CPU Power & Ground

051-7631

7110

2.3.0

SYNC_DATE=(MASTER)

SYNC_MASTER=(MASTER)

=PPVCORE_S0_CPU

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

CPU_VCCSENSE_P

CPU_VID<6>

CPU_VID<5>

CPU_VID<4>

CPU_VID<3>

CPU_VID<2>

CPU_VID<1>

CPU_VID<0>

=PP1V05_S0_CPU

=PP1V5_S0_CPU

CPU_VCCSENSE_N

12

11

64

10

64

10

11

9

11

9

10

7

10

7

11

7

6

7

6

7

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

10UF 0603 = APN:138S0568 = MURATA,TAIYO,TDK,SAMSUNG

3x 330uF. 32x 10uF 0603, 28x 2.2uF 0402 + 40x 2.2uF 0402

1x 10uF, 1x 0.01uF

LAYOUT NOTE: PLACE C1290 CLOSE TO CPU

PLACE C1281 NEAR PIN B34 OF U1000

VCCP (CPU I/O) DECOUPLING

1X 330UF, 12X 2.2UF

PLACE C1291-C1296 CLOSE TO FSB DATA PINS

VCCA (CPU AVdd) DECOUPLING

CPU VCORE HF AND BULK DECOUPLING

PLACE C1283-C1288 CLOSE TO FSB ADDRESS PINS

PLACE ON SAME SIDE AS CPU

PLACE ON OPPOSITE SIDE OF CPU

LAYOUT NOTE:

CPU VCORE VID CONNECTIONS

LAYOUT NOTE:

LAYOUT NOTE: PLACE ON SAME SIDE AS CPU

Intel recommends 3x220UF @ 9mOHM

C1210

X5R

6.3V 603

10UF

CRITICAL

20%

OMIT

C1216

X5R

6.3V 603

CRITICAL

10UF

20%

OMIT

C1201

X5R

6.3V

10UF

603

20%

CRITICAL

OMIT

C1202

X5R

6.3V

CRITICAL

603

10UF

20%

OMIT

C1203

X5R

6.3V

CRITICAL

603

10UF

20%

OMIT

C1204

X5R

6.3V 603

10UF

20%

CRITICAL

OMIT

C1205

X5R

6.3V 603

CRITICAL

10UF

20%

OMIT

C1206

X5R

6.3V

CRITICAL

603

10UF

20%

OMIT

C1207

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1208

X5R

6.3V

CRITICAL

603

10UF

20%

OMIT

C1209

X5R

6.3V

CRITICAL

603

20%

10UF

OMIT

C1229

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1228

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1227

X5R

CRITICAL

6.3V

10UF

20%

603

OMIT

C1226

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1225

X5R

6.3V 603

CRITICAL

10UF

20%

OMIT

C1224

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1223

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1214

X5R

6.3V

10UF

CRITICAL

20%

603

OMIT

C1222

X5R

CRITICAL

6.3V

10UF

603

20%

OMIT

C1221

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1220

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1231

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1230

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1249

402-LF

6.3V

2.2UF

20% CERM

CRITICAL

OMIT

C1259

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1248

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1258

CRITICAL

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C1247

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1246

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1257

2.2UF

6.3V

20%

402-LF

CERM

CRITICAL

OMIT

C1256

402-LF

6.3V

2.2UF

20% CERM

CRITICAL

OMIT

C1245

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1244

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1255

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1254

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1243

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1253

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1242

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1241

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1252

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1251

6.3V

2.2UF

20% CERM

CRITICAL

402-LF

OMIT

C1240

6.3V CERM

CRITICAL

2.2UF

402-LF

20%

OMIT

C1250

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1267

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1266

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1265

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1264

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1263

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1262

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1261

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1260

6.3V

2.2UF

20%

402-LF

CERM

CRITICAL

OMIT

C1291

1

2

6.3V CERM

2.2UF

20%

402-LF

OMIT

C1292

1

2

6.3V CERM

2.2UF

20%

402-LF

OMIT

C1293

1

2

6.3V CERM

2.2UF

402-LF

20%

OMIT

C1294

1

2

6.3V CERM

2.2UF

402-LF

20%

OMIT

C1295

1

2

6.3V CERM

2.2UF

402-LF

20%

OMIT

C1296

1

2

6.3V CERM

2.2UF

402-LF

20%

OMIT

C1283

1

2

6.3V CERM

20%

2.2UF

402-LF

OMIT

C1288

1

2

6.3V CERM 402-LF

2.2UF

20%

OMIT

C1287

1

2

6.3V CERM 402-LF

2.2UF

20%

OMIT

C1286

1

2

6.3V CERM 402-LF

2.2UF

20%

OMIT

C1285

1

2

6.3V CERM

2.2UF

402-LF

20%

OMIT

C1284

1

2

6.3V CERM 402-LF

2.2UF

20%

OMIT

C1290

1

2

CASE-C2-SM

POLY-TANT

2.5V

330UF

20%

CRITICAL

C1213

X5R

6.3V 603

10UF

CRITICAL

20%

OMIT

C1212

X5R

6.3V

10UF

CRITICAL

20%

603

OMIT

C1211

X5R

6.3V

10UF

CRITICAL

603

20%

OMIT

C1219

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1200

X5R

6.3V 603

CRITICAL

10UF

20%

OMIT

C1215

X5R

6.3V

20%

10UF

603

CRITICAL

OMIT

C1217

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1218

X5R

6.3V

10UF

603

CRITICAL

20%

OMIT

C1281

1

2

10%

X5R

10V

0.01UF

201

C1280

1

2

X5R

6.3V

603

20%

10uF

OMIT

C1270

1

23

D2T-SM1

POLY-TANT

330UF

20%

CRITICAL

2.0V

C1271

1

23

D2T-SM1

20%

POLY-TANT

2.0V

CRITICAL

330UF

C1272

1

23

D2T-SM1

POLY-TANT

CRITICAL

2.0V

20%

330UF

CPU Decoupling & VID

71

2.3.0

SYNC_DATE=04/26/2006

SYNC_MASTER=MSARWAR

11

051-7631

IMVP6_VID<0..6>

MAKE_BASE=TRUE

CPU_VID<0..6>

=PP1V5_S0_CPU

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

12 10

65

9

64

50

10

7

10

65

10

7

6

7

IN

BI

BI BI

OUT

IN

BI

IN

IN IN

OUT

OUT OUT

BI BI

OUT

IN

IN IN

IN OUT OUT OUT

OUT

NC

IN

B1

OE*

VCCB

B2 B3 B4

GND

A4

A3

A2

A1

VCCA

OUT

IN IN IN IN

OUT

IN

IN IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

To XDP connector and/or level translator

OBSDATA_A3

OBSFN_B0 OBSFN_B1

ITPCLK/HOOK4

OBSDATA_B0

OBSDATA_A2

MCP

U1400

U1000

CPU

TCK0

VCC_OBS_AB

HOOK3

SCL

SDA

HOOK2

HOOK1

TCK1

PWRGD/HOOK0

OBSDATA_B3

OBSDATA_B2

OBSDATA_A0

OBSFN_A1

OBSFN_A0

OBSDATA_B1

OBSDATA_A1

TMS

TDI

TRSTn

TDO

VCC_OBS_CD

OBSDATA_D3

ITPCLK#/HOOK5

RESET#/HOOK6 DBR#/HOOK7

OBSDATA_D2

XDP_PRESENT#

OBSDATA_C0

OBSFN_C0

OBSFN_D0

OBSDATA_D0

OBSDATA_C2

OBSFN_C1

OBSDATA_C3

OBSDATA_C1

OBSDATA_D1

OBSFN_D1

NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.

MCP79-specific pinout

XDP connector

From XDP connector

998-1571

9

13 65

R1399

1 2

201

MF

1/20W

5%

XDP

1K

6

20 42 68

6

20 42 68

R1305

1

2

201

MF

1/20W

54.9

1%

XDP

C1300

1

2

10%

0.1uF

X5R

XDP

6.3V

201

J1300

1

10

1112 1314 1516 1718 19

2

20

2122 2324 2526 2728 29

3

30

3132 3334 3536 3738 39

4

40

4142 4344 4546 4748 49

5

50

5152 5354 5556 5758 59

6

60

78 9

F-ST-SM

LTH-030-01-G-D-NOPEGS

CRITICAL

XDP_CONN

C1301

1

2

10%

X5R

XDP

0.1UF

6.3V

201

6 9

65

6 9

65

6 9

12 65

8 9

13 65

R1303

1 2

201

MF

1/20W

PLACEMENT_NOTE=Place close to CPU to minimize stub.

1K

5%

XDP

6 9

65

6 9

65

6 9

65

6 9

65

6

12 20

6

12 20

6

12 20

6

18 68

6

18 68

6

18 68

6

18 68

6

18 68

6

18 68

6

18 68

6

18 68

12 20

6

12

6

13 65

6

13 65

6

12

6 9

12 65

6 9

12 65

6 9

12 65

6 9

24

C1316

1

2

201

X5R

6.3V

JTAG_ALLDEV

10%

0.1UF

U1310

2 3 4 5

10 9 8 7

6

12

1

11

JTAG_ALLDEV

UQFN

NLSV4T244

C1311

1

2

201

X5R

6.3V

10%

JTAG_ALLDEV

0.1UF

R1311

1

2

5% MF

1/20W

201

10K

JTAG_ALLDEV

R1312

1

2

1/20W

201

MF

5%

0

NO STUFF

6

12

R1313

1 2

MF

0

5%

1/20W

201

XDP

6 9

12 65

6 9

12 65

6 9

12 65

6 9

12 65

6

12

R1314

1 2

201

MF

1/20W

0

5%

XDP

6 9

12 65

6 9 12 65

eXtended Debug Port (XDP)

71

2.3.0

12

SYNC_MASTER=M97

051-7631

SYNC_DATE=02/04/2008

XDP_TDO_CONN

XDP_TDO

JTAG_MCP_TDO

XDP_TRST_L

=PP1V05_S0_CPU

JTAG_MCP_TDO_CONN

JTAG_MCP_TDI

FSB_CPURST_L

CPU_PWRGD

XDP_TMS

XDP_TCK XDP_TDI

=PP3V3_S0_XDP

XDP_TCK

XDP_TMS XDP_TRST_L

JTAG_LVL_TRANS_EN_L

JTAG_MCP_TMS JTAG_MCP_TRST_L

JTAG_MCP_TCK

JTAG_MCP_TDO_CONN JTAG_MCP_TRST_L

MCP_DEBUG<0> MCP_DEBUG<1>

MCP_DEBUG<2> MCP_DEBUG<3>

JTAG_MCP_TMS

JTAG_MCP_TDI

MCP_DEBUG<5>

MCP_DEBUG<4>

MCP_DEBUG<6>

FSB_CLK_ITP_P

MCP_DEBUG<7>

=PP3V3_S0_XDP

FSB_CLK_ITP_N

XDP_CPURST_L

XDP_DBRESET_L

XDP_TDI

XDP_TRST_L

XDP_TDO_CONN

XDP_TMS

XDP_BPM_L<5> XDP_BPM_L<4>

XDP_BPM_L<3> XDP_BPM_L<2>

XDP_BPM_L<1> XDP_BPM_L<0>

TP_XDP_OBSFN_B0 TP_XDP_OBSFN_B1

TP_XDP_OBSDATA_B1

TP_XDP_OBSDATA_B0

TP_XDP_OBSDATA_B2

XDP_PWRGD

TP_XDP_OBSDATA_B3

XDP_OBS20

=PP1V05_S0_CPU

PM_LATRIGGER_L JTAG_MCP_TCK

SMBUS_MCP_0_CLK

SMBUS_MCP_0_DATA

XDP_TCK

12

11

10

9

20

12

20

12

9

65

7

12

7

12

20

7

65

7

9

20

6

12

6

IN IN IN

IN

OUT

BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI

BI BI

BI

BI BI BI

BI

IN

BI

OUT

OUT OUT OUT

OUT OUT

OUT OUT OUT OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT

IN

BI BI

CPU_A12#

V1P1_PLL_CPU

V1P1_PLL_FSB

V1P1_PLL_MCLK

V1P1_DLLDLCELL_AVDD

CPU_BR0#

CPU_BNR#

BCLK_OUT_NB_N

CPU_REQ4#

CPU_ADS#

CPU_A27#

CPU_A26#

CPU_A25#

CPU_A34#

CPU_D62#

CPU_D61#

CPU_D60#

CPU_A28# CPU_A29# CPU_A30# CPU_A31# CPU_A32#

CPU_A22# CPU_A23#

CPU_REQ3#

CPU_REQ2#

CPU_DBI3#

CPU_D14#

CPU_D13#

CPU_D12#

CPU_D11#

CPU_D10#

CPU_DPWR#

CPU_RS1#

BCLK_VML_COMP_GND

CPU_COMP_VCC

CPU_TRDY#

CPU_PROCHOT#

CPU_BSEL0

CPU_RS2#

CPU_BSEL1

BCLK_IN_P

BCLK_OUT_CPU_N

CPU_PWRGD

CPU_DSTBP0#

CPU_DSTBP1#

CPU_DBI1#

CPU_DBI0#

CPU_DSTBN1#

CPU_DSTBN0#

CPU_DBI2#

CPU_DSTBP2# CPU_DSTBN2#

CPU_DSTBP3# CPU_DSTBN3#

CPU_A3#

CPU_A5#

CPU_A9#

CPU_A8#

CPU_A6# CPU_A7#

CPU_A14#

CPU_A13#

CPU_A11#

CPU_A15# CPU_A16#

CPU_A19#

CPU_A17# CPU_A18#

CPU_A20# CPU_A21#

CPU_A35#

CPU_A33#

CPU_ADSTB0#

CPU_REQ0#

CPU_LOCK#

CPU_HIT# CPU_HITM#

CPU_FERR#

CPU_THERMTRIP#

CPU_PECI

CPU_COMP_GND

CPU_D0# CPU_D1#

CPU_D3#

CPU_D2#

CPU_D4# CPU_D5# CPU_D6#

CPU_D8#

CPU_D7#

CPU_D9#

CPU_D15#

CPU_D17# CPU_D18#

CPU_D16#

CPU_D19# CPU_D20# CPU_D21#

CPU_D23#

CPU_D22#

CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31# CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36#

CPU_D38#

CPU_D37#

CPU_D39# CPU_D40# CPU_D41#

CPU_D43#

CPU_D42#

CPU_D44# CPU_D45# CPU_D46# CPU_D47#

CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59#

CPU_D63#

CPU_BPRI#

CPU_DEFER#

BCLK_OUT_CPU_P

BCLK_OUT_ITP_P BCLK_OUT_ITP_N

BCLK_OUT_NB_P

BCLK_IN_N

CPU_A20M#

CPU_NMI

CPU_INTR

CPU_SMI#

CPU_RESET#

CPU_SLP#

CPU_DPSLP#

CPU_STPCLK# CPU_DPRSTP#

CPU_D51#

CPU_D50#

CPU_D49#

CPU_D48#

CPU_ADSTB1#

CPU_IGNNE#

CPU_INIT#

BCLK_VML_COMP_VDD

CPU_RS0#

CPU_A10#

CPU_BSEL2

CPU_DBSY# CPU_DRDY#

CPU_A24#

CPU_A4#

CPU_REQ1#

CPU_BR1#

FSB

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Loop-back clock for delay matching.

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

270 mA (A01)

206 mA

15 mA

29 mA

20 mA

(MCP_BSEL<0>)

(MCP_BSEL<1>)

(MCP_BSEL<2>)

8

9

65

8 9

12 65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

8 9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

9

65

6

12 65

6

12 65

9

65

9

65

9

65

9

65

9

65

8 9

65

8 9

65

9

65

9

12 65

9

65

9

65

9

65

9

65

8 9

50 65

9

40 50 65

9

40 65

9

65

9

65

R1436

1

2

MF 201

1% 1/20W

49.9

R1431

1

2

49.9

MF

201

1%

1/20W

R1430

1

2

1/20W

1%

201

MF

49.9

R1435

1

2

MF 201

1% 1/20W

49.9

R1422

1

2

201

MF

NO STUFF

1/20W

5%

1K

R1421

1

2

201

MF

1/20W

5%

NO STUFF

1K

R1420

1

2

201

MF

1/20W

NO STUFF

5%

1K

R1415

1

2

201

1/20W

MF

5%

62

R1410

1

2

201

1/20W

MF

1%

54.9

R1440

1

2

NO STUFF

5%

MF 201

1/20W

150

R1416

1

2

1/20W MF 201

5%

62

U1400

BV60 BW61

BN59

BP58

BU59

BT58

BP60

BN61

BM56

BN57

AV60 AV58 AW61 AR61 AW59 AT58 AU59 AU57 AP56 AM54 AY56

BG61

AP54 AY54 AM56 AK56 AN55 AL57 AR55 AV54 AW55

AH60

AN57 AR57 AT56 BA57 AV56 AW57

AM60 AN59 AL59 AR59 AT60 AK60

AH56

AP60 AT54

AH54

AY60

BB60 AV52

C59

C61

E59

BL59

BU61

AG59 AD58

V58 U59 V60 AD60 W59 Y60 AF56 AC57 AB54 V56

AE59

AD54 AA55 AG57 AD56 V54 U55 T56 U57 W57 Y54

AA61

Y56 AC55 R55 R57 G57 L57 H56 J57 K56 E57

AF58

M54 P56 N57 J55 L55 T54 P54 M56 M60 P58

AC59

R59 P60 M58 R61 H60 H58 F60 T60 F58 J59

AG61

L61 J61 E61 N59

AF60 Y58 AA59

U61

AE57

F56

G59

AK54

AF54

BH58

BT60 BM60

AJ57

AB60

AB56

H54

L59

AC61

AA57

J53

K60

BH60

AG55 AJ55

BC59 BK60 BF60

BG59

BB58

B60

BJ59

BR59

AJ61 AK58 AM58 AJ59 AN61

D60

BA59 BA61 BE61

BK58

BE59

BD58

BL61

BD60

AR37

AR43

AR41

AR39

BGA

MCP79U

(1 OF 12)

OMIT

8

SYNC_MASTER=M97

13 71

051-7631

MCP CPU Interface

SYNC_DATE=02/04/2008

2.3.0

CPU_PECI_MCP

FSB_LOCK_L

CPU_PROCHOT_L

PM_THRMTRIP_L CPU_FERR_L

FSB_CLK_ITP_N

FSB_CLK_CPU_N

FSB_BPRI_L

FSB_D_L<54> FSB_D_L<55>

FSB_ADS_L FSB_BNR_L

=PP1V05_S0_MCP_FSB

FSB_BREQ1_L

FSB_D_L<63>

FSB_A_L<12>

PP1V05_S0_MCP_PLL_FSB

FSB_BREQ0_L

FSB_CLK_MCP_N

FSB_REQ_L<4>

FSB_A_L<27>

FSB_A_L<26>

FSB_A_L<25>

FSB_A_L<34>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_A_L<28> FSB_A_L<29> FSB_A_L<30> FSB_A_L<31> FSB_A_L<32>

FSB_A_L<22> FSB_A_L<23>

FSB_REQ_L<3>

FSB_REQ_L<2>

FSB_DINV_L<3>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<10>

FSB_DPWR_L

FSB_RS_L<1>

MCP_BCLK_VML_COMP_GND

MCP_CPU_COMP_VCC

FSB_TRDY_L

=MCP_BSEL<0>

FSB_RS_L<2>

=MCP_BSEL<1>

FSB_CLK_MCP_P

CPU_PWRGD

FSB_DSTB_L_P<0>

FSB_DSTB_L_P<1>

FSB_DINV_L<1>

FSB_DINV_L<0>

FSB_DSTB_L_N<1>

FSB_DSTB_L_N<0>

FSB_DINV_L<2>

FSB_DSTB_L_P<2> FSB_DSTB_L_N<2>

FSB_DSTB_L_P<3> FSB_DSTB_L_N<3>

FSB_A_L<3>

FSB_A_L<5>

FSB_A_L<9>

FSB_A_L<8>

FSB_A_L<6> FSB_A_L<7>

FSB_A_L<14>

FSB_A_L<13>

FSB_A_L<11>

FSB_A_L<15> FSB_A_L<16>

FSB_A_L<19>

FSB_A_L<17> FSB_A_L<18>

FSB_A_L<20> FSB_A_L<21>

FSB_A_L<35>

FSB_A_L<33>

FSB_ADSTB_L<0>

FSB_REQ_L<0>

FSB_HIT_L FSB_HITM_L

MCP_CPU_COMP_GND

FSB_D_L<0> FSB_D_L<1>

FSB_D_L<3>

FSB_D_L<2>

FSB_D_L<4> FSB_D_L<5> FSB_D_L<6>

FSB_D_L<8>

FSB_D_L<7>

FSB_D_L<9>

FSB_D_L<15>

FSB_D_L<17> FSB_D_L<18>

FSB_D_L<16>

FSB_D_L<19> FSB_D_L<20> FSB_D_L<21>

FSB_D_L<23>

FSB_D_L<22>

FSB_D_L<24> FSB_D_L<25> FSB_D_L<26> FSB_D_L<27> FSB_D_L<28> FSB_D_L<29> FSB_D_L<30> FSB_D_L<31> FSB_D_L<32> FSB_D_L<33> FSB_D_L<34> FSB_D_L<35> FSB_D_L<36>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<39> FSB_D_L<40> FSB_D_L<41>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<44> FSB_D_L<45> FSB_D_L<46> FSB_D_L<47>

FSB_D_L<52> FSB_D_L<53>

FSB_D_L<56> FSB_D_L<57> FSB_D_L<58> FSB_D_L<59>

FSB_DEFER_L

FSB_CLK_CPU_P

FSB_CLK_ITP_P

CPU_A20M_L

CPU_NMI

CPU_INTR

CPU_SMI_L

FSB_CPURST_L

FSB_CPUSLP_L CPU_DPSLP_L

CPU_STPCLK_L CPU_DPRSTP_L

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_ADSTB_L<1>

CPU_IGNNE_L CPU_INIT_L

MCP_BCLK_VML_COMP_VDD

FSB_RS_L<0>

FSB_A_L<10>

=MCP_BSEL<2>

FSB_DBSY_L FSB_DRDY_L

FSB_A_L<24>

FSB_A_L<4>

FSB_REQ_L<1>

=PP1V05_S0_MCP_FSB

22

21

13

8

70

8

7

65

22

65

7

OUT

OUT OUT OUT OUT OUT OUT

BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT OUT

OUT OUT

BI BI

BI

BI BI

BI

BI BI BI BI

BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

OUT

BI

OUT OUT OUT OUT OUT OUT OUT

NC

MCLK0A_0_P MCLK0A_0_N

MCKE0A_1 MCKE0A_0

MODT0A_1 MODT0A_0

MCS0A_0#

MCS0A_1#

MCLK0A_1_N

MCLK0A_1_P

MA0_0

MA0_1

MA0_2

MA0_3

MA0_4

MA0_5

MA0_6

MA0_8 MA0_7

MA0_9

MA0_10

MA0_11

MA0_13 MA0_12

MA0_14

MBA0_2

MBA0_0

MBA0_1

MWE0#

MDQS0_0_P MDQS0_0_N

MDQS0_1_P

MDQS0_2_N

MDQS0_1_N

MDQS0_2_P

MDQS0_3_N

MDQS0_4_P

MDQS0_3_P

MDQS0_4_N

MDQS0_5_N

MDQS0_5_P

MDQS0_6_N

MDQS0_6_P

MDQS0_7_N

MDQM0_2 MDQM0_1 MDQM0_0

MDQM0_3

MDQM0_4

MDQ0_0

MDQM0_7

MDQM0_5

MDQM0_6

MDQ0_4 MDQ0_3 MDQ0_2

MDQ0_5

MDQ0_6

MDQ0_9 MDQ0_8 MDQ0_7

MDQ0_10

MDQ0_11

MDQ0_15 MDQ0_14 MDQ0_13 MDQ0_12

MDQ0_16

MDQ0_21 MDQ0_20

MDQ0_18

MDQ0_19

MDQ0_17

MDQ0_25 MDQ0_24 MDQ0_23 MDQ0_22

MDQ0_26

MDQ0_29 MDQ0_28 MDQ0_27

MDQ0_30

MDQ0_31

MDQ0_35 MDQ0_34

MDQ0_32

MDQ0_36

MDQ0_33

MDQ0_41

MDQ0_37

MDQ0_38

MDQ0_40 MDQ0_39

MDQ0_42

MDQ0_47 MDQ0_46

MDQ0_43

MDQ0_45 MDQ0_44

MDQ0_51 MDQ0_50 MDQ0_49

MDQ0_52

MDQ0_48

MDQ0_55 MDQ0_54 MDQ0_53

MDQ0_56

MDQ0_57

MDQ0_61 MDQ0_60

MDQ0_58

MDQ0_59

MDQ0_62

MDQ0_63

MCAS0#

MRAS0#

MDQS0_7_P

MDQ0_1

MEMORY PARTITION 0

0A

MEMORY

CONTROL

NC

MCLK1A_1_N

MCLK1A_1_P

MCLK1A_0_P MCLK1A_0_N

MDQ1_18

MA1_8

MA1_5

MDQ1_6

MDQ1_7

MDQ1_24

MA1_0

MDQ1_21

MDQ1_63

MDQ1_60 MDQ1_59

MDQ1_62

MDQ1_58

MDQ1_61

MDQ1_57

MDQ1_53

MDQ1_56 MDQ1_55 MDQ1_54

MDQ1_52

MDQ1_49

MDQ1_51 MDQ1_50

MDQ1_48 MDQ1_47 MDQ1_46

MDQ1_43

MDQ1_44

MDQ1_45

MDQ1_42 MDQ1_41

MDQ1_37

MDQ1_38

MDQ1_39

MDQ1_36 MDQ1_35

MDQ1_32

MDQ1_33

MDQ1_34

MDQ1_31 MDQ1_30

MDQ1_27

MDQ1_28

MDQ1_29

MDQ1_22

MDQ1_26 MDQ1_25

MDQ1_23

MDQ1_17

MDQ1_19

MDQ1_20

MDQ1_16

MDQ1_12

MDQ1_13

MDQ1_14

MDQ1_15

MDQ1_11 MDQ1_10

MDQ1_8

MDQ1_9

MDQ1_3 MDQ1_2

MDQ1_4

MDQ1_5

MDQ1_1

MDQM1_6 MDQM1_5

MDQ1_0

MDQM1_7

MDQM1_4 MDQM1_3

MDQM1_0

MDQM1_1

MDQM1_2

MDQ1_40

MDQS1_7_P

MDQS1_6_N

MDQS1_6_P

MDQS1_7_N

MDQS1_5_N

MDQS1_5_P

MDQS1_4_P

MDQS1_3_P

MDQS1_4_N

MDQS1_2_P

MDQS1_3_N

MDQS1_1_P

MDQS1_2_N

MDQS1_1_N MDQS1_0_P MDQS1_0_N

MRAS1# MCAS1#

MWE1#

MBA1_2 MBA1_1 MBA1_0

MA1_14 MA1_13 MA1_12 MA1_11 MA1_10

MA1_9

MA1_7 MA1_6

MA1_4 MA1_3 MA1_2 MA1_1

MCS1A_1# MCS1A_0#

MODT1A_1 MODT1A_0

MCKE1A_0

MCKE1A_1

1A

CONTROL

MEMORY

MEMORY PARTITION 1

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

28 66

27 66

28 66

27 66

27 28 33 66

33

27 28 33 66

28 66

27 66

30 66

29 66

30 66

29 66

30 66

29 30 33 66

33

29 30 33 66

30 66

29 66

30 66

29 66

30 66

29 66

U1400

BV26

BT24

BR23

BH28

BK24

BK26

BP28

BV24

BU25

BU23

BU27

BT26

BK28

BP26

BR27

BN27

BP24

BM26

BP22

BT22

BR21

BH32

BJ33

BJ29

BH30

BN23

BT20

BU57

BU55

BV44

BU43

BT48

BV48

BU49

BT44

BP48

BN45

BP40

BP42

BU51

BP46

BN47

BM42

BN41

BU41

BU39

BV38

BU35

BT42

BV42

BT52

BV36

BT40

BV20

BU19

BT14

BU13

BT18

BU21

BT16

BU15

BT56

BP16

BM14

BP10

BN11

BL13

BN17

BN15

BM12

BT10

BU11

BV56

BT6

BU5

BT12

BV12

BU7

BV6

BM8

BL7

BL5

BP4

BU53

BN9

BL9

BM6

BN5

BR51

BV50

BT50

BR53

BU45

BN43

BT38

BV14

BP12

BV8

BP6

BT54

BV54

BT46

BU47

BP44

BM44

BU37

BT36

BV18

BU17

BP14

BN13

BU9

BT8

BP8

BN7

BN21

BP20

BN25

BM24

AC41 AC43

OMIT

MCP79U

(2 OF 12)

BGA

U1400

BV30

BT32

BV32

BN33

BP36

BU31

BK36

BK32

BR33

BP34

BT34

BM36

BN35

BR35

BU33

BM32

BP32

BK34

BK30

BP38

BK38

BJ21

BH20

BH18

BJ17

BM38

BN37

BW57

CA57

CA45

BY46

BY52

BW51

BW47

BW45

BY42

CA41

BW37

BW43

BY54

BY44

BW41

BY38

BY36

CA33

BW35

BY28

CA29

CA35

BY34

CA53

BW33

BW31

BW23

BY26

CA23

BY20

BW25

BW27

CA21

BY24

BW59

BW17

BW15

CA15

BW11

BY18

BW19

BY12

BY16

BW9

BY6

BY58

CA3

BW5

CA11

BY10

BY4

CA5

BV2

BY2

BN1

BU1

BW53

BW3

BP2

BN3

BW1

CA59

CA47

CA51

BY60

BY48

CA39

BY32

CA27

CA17

CA9

BU3

BY56

BW55

BY50

BW49

BW39

BY40

BW29

BY30

BW21

BY22

BW13

BY14

BW7

BY8

BT2

BR3

BH34

BN39

BM30

BN31

AD42 AD44

BGA

MCP79U

(3 OF 12)

OMIT

71

051-7631

2.3.0

14

SYNC_MASTER=M97

SYNC_DATE=02/04/2008

MCP Memory Interface

MEM_A_CLK_P<0> MEM_A_CLK_N<0>

MEM_A_CKE<1> MEM_A_CKE<0>

MEM_A_ODT<1> MEM_A_ODT<0>

MEM_A_CS_L<0>

MEM_A_CS_L<1>

MEM_A_CLK_N<1>

MEM_A_CLK_P<1>

MEM_A_A<0>

MEM_A_A<1>

MEM_A_A<2>

MEM_A_A<3>

MEM_A_A<4>

MEM_A_A<5>

MEM_A_A<6>

MEM_A_A<8> MEM_A_A<7>

MEM_A_A<9>

MEM_A_A<10>

MEM_A_A<11>

MEM_A_A<13> MEM_A_A<12>

MEM_A_A<14>

MEM_A_BA<2>

MEM_A_BA<0>

MEM_A_BA<1>

MEM_A_WE_L

MEM_A_DQS_P<0> MEM_A_DQS_N<0>

MEM_A_DQS_P<1>

MEM_A_DQS_N<2>

MEM_A_DQS_N<1>

MEM_A_DQS_P<2>

MEM_A_DQS_N<3>

MEM_A_DQS_P<4>

MEM_A_DQS_P<3>

MEM_A_DQS_N<4>

MEM_A_DQS_N<5>

MEM_A_DQS_P<5>

MEM_A_DQS_N<6>

MEM_A_DQS_P<6>

MEM_A_DQS_N<7>

MEM_A_DM<2> MEM_A_DM<1> MEM_A_DM<0>

MEM_A_DM<3>

MEM_A_DM<4>

MEM_A_DQ<0>

MEM_A_DM<7>

MEM_A_DM<5>

MEM_A_DM<6>

MEM_A_DQ<4> MEM_A_DQ<3> MEM_A_DQ<2>

MEM_A_DQ<5>

MEM_A_DQ<6>

MEM_A_DQ<9> MEM_A_DQ<8> MEM_A_DQ<7>

MEM_A_DQ<10>

MEM_A_DQ<11>

MEM_A_DQ<15> MEM_A_DQ<14> MEM_A_DQ<13> MEM_A_DQ<12>

MEM_A_DQ<16>

MEM_A_DQ<21> MEM_A_DQ<20>

MEM_A_DQ<18>

MEM_A_DQ<19>

MEM_A_DQ<17>

MEM_A_DQ<25> MEM_A_DQ<24> MEM_A_DQ<23> MEM_A_DQ<22>

MEM_A_DQ<26>

MEM_A_DQ<29> MEM_A_DQ<28> MEM_A_DQ<27>

MEM_A_DQ<30>

MEM_A_DQ<31>

MEM_A_DQ<35> MEM_A_DQ<34>

MEM_A_DQ<32>

MEM_A_DQ<36>

MEM_A_DQ<33>

MEM_A_DQ<41>

MEM_A_DQ<37>

MEM_A_DQ<38>

MEM_A_DQ<40> MEM_A_DQ<39>

MEM_A_DQ<42>

MEM_A_DQ<47> MEM_A_DQ<46>

MEM_A_DQ<43>

MEM_A_DQ<45> MEM_A_DQ<44>

MEM_A_DQ<51> MEM_A_DQ<50> MEM_A_DQ<49>

MEM_A_DQ<52>

MEM_A_DQ<48>

MEM_A_DQ<55> MEM_A_DQ<54> MEM_A_DQ<53>

MEM_A_DQ<56>

MEM_A_DQ<57>

MEM_A_DQ<61> MEM_A_DQ<60>

MEM_A_DQ<58>

MEM_A_DQ<59>

MEM_A_DQ<62>

MEM_A_DQ<63>

MEM_A_CAS_L

MEM_A_RAS_L

MEM_A_DQS_P<7>

MEM_A_DQ<1>

MEM_B_DQ<3>

MEM_B_CKE<1> MEM_B_CKE<0>

MEM_B_ODT<0>

MEM_B_ODT<1>

MEM_B_CS_L<0>

MEM_B_CS_L<1>

MEM_B_A<1>

MEM_B_A<2>

MEM_B_A<3>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<9>

MEM_B_A<10>

MEM_B_A<11>

MEM_B_A<12>

MEM_B_A<13>

MEM_B_A<14>

MEM_B_BA<0>

MEM_B_BA<1>

MEM_B_BA<2>

MEM_B_WE_L

MEM_B_CAS_L

MEM_B_RAS_L

MEM_B_DQS_N<0>

MEM_B_DQS_P<0>

MEM_B_DQS_N<1>

MEM_B_DQS_N<2> MEM_B_DQS_P<1>

MEM_B_DQS_N<3> MEM_B_DQS_P<2>

MEM_B_DQS_N<4> MEM_B_DQS_P<3>

MEM_B_DQS_P<4>

MEM_B_DQS_P<5> MEM_B_DQS_N<5>

MEM_B_DQS_N<7> MEM_B_DQS_P<6> MEM_B_DQS_N<6>

MEM_B_DQS_P<7>

MEM_B_DQ<40>

MEM_B_DM<2> MEM_B_DM<1> MEM_B_DM<0>

MEM_B_DM<3>

MEM_B_DM<4>

MEM_B_DM<7>

MEM_B_DQ<0>

MEM_B_DM<5>

MEM_B_DM<6>

MEM_B_DQ<1>

MEM_B_DQ<5> MEM_B_DQ<4>

MEM_B_DQ<2>

MEM_B_DQ<9> MEM_B_DQ<8>

MEM_B_DQ<10>

MEM_B_DQ<11>

MEM_B_DQ<15> MEM_B_DQ<14> MEM_B_DQ<13> MEM_B_DQ<12>

MEM_B_DQ<16>

MEM_B_DQ<20> MEM_B_DQ<19>

MEM_B_DQ<17>

MEM_B_DQ<23>

MEM_B_DQ<25>

MEM_B_DQ<26>

MEM_B_DQ<22>

MEM_B_DQ<29> MEM_B_DQ<28> MEM_B_DQ<27>

MEM_B_DQ<30>

MEM_B_DQ<31>

MEM_B_DQ<34> MEM_B_DQ<33> MEM_B_DQ<32>

MEM_B_DQ<35>

MEM_B_DQ<36>

MEM_B_DQ<39> MEM_B_DQ<38> MEM_B_DQ<37>

MEM_B_DQ<41>

MEM_B_DQ<42>

MEM_B_DQ<45> MEM_B_DQ<44> MEM_B_DQ<43>

MEM_B_DQ<46>

MEM_B_DQ<47>

MEM_B_DQ<48>

MEM_B_DQ<50>

MEM_B_DQ<51>

MEM_B_DQ<49>

MEM_B_DQ<52>

MEM_B_DQ<54>

MEM_B_DQ<55>

MEM_B_DQ<56>

MEM_B_DQ<53>

MEM_B_DQ<57>

MEM_B_DQ<61>

MEM_B_DQ<58>

MEM_B_DQ<62>

MEM_B_DQ<59>

MEM_B_DQ<60>

MEM_B_DQ<63>

MEM_B_DQ<21>

MEM_B_A<0>

MEM_B_DQ<24>

MEM_B_DQ<7> MEM_B_DQ<6>

MEM_B_A<5>

MEM_B_A<8>

MEM_B_DQ<18>

MEM_B_CLK_N<0>

MEM_B_CLK_P<0>

MEM_B_CLK_P<1> MEM_B_CLK_N<1>

NC NC

MRESET0#

MODT1B_1

MCKE1B_0 MCKE1B_1

MODT1B_0

MCLK1B_0_N

MCS1B_0# MCS1B_1#

MCLK1B_0_P

MCLK1B_1_N

NC NC

GND56

GND58 GND59

MCLK0B_1_P

MCLK0B_0_P MCLK0B_0_N

MODT0B_0 MODT0B_1

MCKE0B_1

MCKE0B_0

MCS0B_1#

MEM_COMP_GND

MEM_COMP_1P8V

GND2 GND3 GND4

GND1

GND8 GND9

GND7

GND6

GND5

GND13 GND14

GND10

GND12

GND11

GND17

GND16

GND15

GND22 GND23

GND25

GND28 GND29

GND27

GND26

GND30

GND35

GND34

GND39 GND40

GND38

GND37

GND36

GND43

GND45

GND44

GND42

GND41

GND46 GND47

GND50

GND49

GND51

GND54

GND53

GND52

MCS0B_0#

V1P1_PLL_CORE

V1P1_PLL_DP

V1P1_PLL_XREF_XS

V1P1_PLL_V

MCLK0B_1_N

MCLK1B_1_P

GND48

GND64

GND55

GND57

GND60 GND61

GND63

GND62

V1P8_MEM_VDDP

GND33

GND32

GND31

GND20

GND19

GND18

GND24

GND21

NC

MEMORY CONTROL 1B

MEMORY CONTROL 0B

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

17 mA

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

87 mA (A01)

4771 mA (A01, DDR3)

TP or NC for DDR2.

39 mA

19 mA

12 mA

U1400

A13

A7

AB10

AB4 AB52 AB58 AC19 AC21 AC23 AC25 AC27

A19

AC29 AC31 AC33 AC35 AC37 AC39 AD16 AD48

AE1 AE13

A25

AE19 AE21 AE23 AE25 AE27 AE29 AE31 AE33 AE35 AE37

A31

AE39 AE43 AE49 AE55 AE61

AE7 AF16 AF48 AG13 AG19

A37

AG21 AG23 AG25 AG27 AG29

AG31 AG33 AG35 AG37 AG39

A43

AH10 AH12 AH16 AH4 AH46

A49

A55

A61

BK20 BP18

BU29 BR29

BH36

BJ35

BH38

BJ39

BJ23

BH24

BH26

BJ27

BM20 BN19

BT30 BN29

BP56 BR57

BK18 BM18

BP30 BT28

J27

AF42 AF44

AR23 AR25 AR27 AR29 AR31 AR33 AR35 AR53 AT10 AT16 AT18 AT20 AT24 AT26 AT28 AT32 AT34 AT42

AD46 AE41

W39

W41

V42

Y38

BD12 BD14

BD34 BD36 BD38 BD42 BD44 BF12 BF14 BF18 BF20 BF24

BD16

BF26 BF30 BF32 BF36 BF38 BF42 BF44

BD18 BD20 BD24 BD26 BD28 BD30 BD32

OMIT

(4 OF 12)

MCP79U

BGA

R1610

1

2

201

MF

1/20W

40.2

1%

R1611

1

2

201

40.2

1/20W

1%

MF

26

SYNC_MASTER=M97

SYNC_DATE=02/04/2008

051-7631

2.3.0

7115

MCP Memory Misc

TP_MEM_A_CLK4P

TP_MEM_A_CS_L<2> TP_MEM_A_CS_L<3>

TP_MEM_B_CLK4P TP_MEM_B_CLK4N

TP_MEM_B_CLK3P

TP_MEM_B_CKE<2> TP_MEM_B_CKE<3>

TP_MEM_B_ODT<3>

TP_MEM_B_ODT<2>

TP_MEM_B_CS_L<3>

TP_MEM_B_CLK3N

TP_MEM_A_CKE<3>

TP_MEM_A_CKE<2>

TP_MEM_A_ODT<3>

TP_MEM_A_ODT<2>

TP_MEM_A_CLK3N

TP_MEM_A_CLK4N

=PP1V8R1V5_S0_MCP_MEM

PP1V05_S0_MCP_PLL_CORE

MCP_MEM_COMP_VDD MCP_MEM_COMP_GND

TP_MEM_A_CLK3P

TP_MEM_B_CS_L<2>

MCP_MEM_RESET_L

66

22

15

70

8

7

22

66

8

PE0_RX1_N

PE0_RX1_P

PE0_RX4_N

PE0_RX3_N

PE0_RX5_P

PE0_RX3_P

PE0_RX7_N

PE0_RX6_N PE0_RX7_P

PE0_RX5_N

PE0_RX9_N

PE0_RX8_N

PE0_RX10_P

PE0_RX8_P

PE0_RX10_N

PE0_RX13_P

PE0_RX15_N

PE0_RX15_P

PE0_RX13_N

PE0_PRSNT_16#

PE_WAKE#

PE1_RX2_N

PE1_RX3_P PE1_RX3_N

PEX_CLK_COMP

PE0_TX0_P

PE0_TX1_P PE0_TX1_N

PE0_TX0_N

PE0_TX2_P PE0_TX2_N

PE0_TX4_P

PE0_TX3_P PE0_TX3_N

PE0_TX5_P

PE0_TX4_N

PE0_TX6_P

PE0_TX5_N

PE0_TX6_N PE0_TX7_P PE0_TX7_N

PE0_TX9_P

PE0_TX8_P PE0_TX8_N

PE0_TX10_P

PE0_TX9_N

PE0_TX10_N PE0_TX11_P PE0_TX11_N

PE0_TX13_P

PE0_TX12_P PE0_TX12_N

PE0_TX14_P

PE0_TX13_N

PE0_TX15_P

PE0_TX14_N

PE0_TX15_N

PE0_REFCLK_P PE0_REFCLK_N

PE2_REFCLK_P

PE1_REFCLK_N

PE2_REFCLK_N

PE4_REFCLK_P PE4_REFCLK_N

PE1_TX0_P

PEX_RST0#

PE1_TX1_P

PE1_TX0_N

PE1_TX2_P

PE1_TX1_N

PE1_TX2_N

PE0_RX6_P

PE0_RX4_P

PE0_RX2_P

PE0_RX0_N

PE0_RX2_N

PE0_RX0_P

PE0_RX11_P

PE0_RX14_N

PE0_RX9_P

PE0_RX12_P

PE1_RX1_N

PE1_RX2_P

PE1_RX1_P

PE1_RX0_N

PE0_RX11_N

PE0_RX14_P

PE0_RX12_N

PE3_REFCLK_N

PE3_REFCLK_P

PE1_REFCLK_P

PE1_RX0_P

PEB_CLKREQ#

PEF_CLKREQ# PEF_PRSNT#

PEG_CLKREQ# PEG_PRSNT#

PEC_CLKREQ#

PED_CLKREQ#

PED_PRSNT#

PEE_CLKREQ# PEE_PRSNT#

PE1_TX3_N

PE1_TX3_P

V1P1_PEX_DVDD0

V1P1_PEX_DVDD1

V1P1_PLL_PEX

V1P1_PEX_AVDD1

V1P1_PEX_DVDD1

V1P1_PEX_AVDD0

NC

NC NC

PCI EXPRESS

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

OUT

OUT OUT

OUT

IN IN

IN

OUT

IN

OUT

IN

OUT

OUT OUT

IN IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Int PU (S5)

Int PU

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

206 mA (A01)

57 mA (A01)

Int PU

84 mA (A01)

If PE0 interface is not used, ground DVDD0_PEX and AVDD0_PEX If PE1 interface is not used, ground DVDD1_PEX and AVDD1_PEX

U1400

AW19

AW21

AW23 AW25

AW27 AW29

M12 E1

E3

AB2

AA3

AM6

AP6

AN3

AP2

AW3

AY2

AT4

AR5

AW5

AV6

BD2

BE1

U1

U3

AC3

AC1

P4

R5

AN1

AM2

AJ3

AJ1

AL3

AK2

AB6

AA5

AT2

AU3

AK6

AJ5

Y2

AA1

AV2

AW1

AL5

AK4

AT6

AR7

BA3

BA1

AV4

AU5

BB2

BC3

W3

V2

Y4

V4

T2

R3

AD4

AF4

AE3

AD2

AG3

AH2

AF2

AG1

AN5

AM4

AR3

AR1

F4

H4

N5

M4

K2

J3

R1

P2

F2

G3

N3

M2

L3

L1

P6

M6

H2

J1

H6

J5

G5

F6

C1

D2

J19

C5

J9

H8

D6

E7 E5

A3 B2

B4 A5

C3

J17

AA9 AB8

AF8 AG9

AC13 AC9 AD10 AD12 AD8 AE9 AF10 AF12

N11 N9 P10

AA13

AA7 AD14 AF14

W9 Y10 Y12

Y8

T6

U7

V14

BGA

MCP79U

OMIT

(5 OF 12)

8

67

8

67

8

34 67

6

34

34 67

8

R1710

1

2

201

MF

1/20W

2.37K

1%

NO STUFF

PLACEMENT_NOTE=Place within 12.7mm of U1400

24

8

SYNC_MASTER=M97

MCP PCIe Interfaces

16 71

2.3.0

051-7631

SYNC_DATE=02/04/2008

TP_MCP_GPIO_17

PCIE_WAKE_L

=PP1V05_S0_MCP_PEX_AVDD0

TP_PCIE_CLK100M_FC_N

TP_PCIE_FC_R2D_C_P

TP_PCIE_FW_R2D_C_N

TP_PCIE_FW_R2D_C_P

=PP1V05_S0_MCP_PEX_AVDD1

=PP1V05_S0_MCP_PEX_DVDD1

=PP1V05_S0_MCP_PEX_DVDD0

MCP_PEX_CLK_COMP

TP_PCIE_FC_D2R_N

TP_PCIE_EXCARD_R2D_C_P TP_PCIE_EXCARD_R2D_C_N

PP1V05_S0_MCP_PLL_PEX

=PEG_D2R_N<1>

=PEG_D2R_P<1>

=PEG_D2R_N<4>

=PEG_D2R_N<3>

=PEG_D2R_P<5>

=PEG_D2R_P<3>

=PEG_D2R_N<7>

=PEG_D2R_N<6> =PEG_D2R_P<7>

=PEG_D2R_N<5>

=PEG_D2R_N<9>

=PEG_D2R_N<8>

=PEG_D2R_P<10>

=PEG_D2R_P<8>

=PEG_D2R_N<10>

=PEG_D2R_P<13>

=PEG_D2R_N<15>

=PEG_D2R_P<15>

=PEG_D2R_N<13>

PEG_PRSNT_L

TP_PCIE_EXCARD_D2R_N

=PEG_R2D_C_P<0>

=PEG_R2D_C_P<1> =PEG_R2D_C_N<1>

=PEG_R2D_C_N<0>

=PEG_R2D_C_P<2> =PEG_R2D_C_N<2>

=PEG_R2D_C_P<4>

=PEG_R2D_C_P<3> =PEG_R2D_C_N<3>

=PEG_R2D_C_P<5>

=PEG_R2D_C_N<4>

=PEG_R2D_C_P<6>

=PEG_R2D_C_N<5>

=PEG_R2D_C_N<6> =PEG_R2D_C_P<7> =PEG_R2D_C_N<7>

=PEG_R2D_C_P<9>

=PEG_R2D_C_P<8> =PEG_R2D_C_N<8>

=PEG_R2D_C_P<10>

=PEG_R2D_C_N<9>

=PEG_R2D_C_N<10> =PEG_R2D_C_P<11> =PEG_R2D_C_N<11>

=PEG_R2D_C_P<13>

=PEG_R2D_C_P<12> =PEG_R2D_C_N<12>

=PEG_R2D_C_N<13>

=PEG_R2D_C_P<15> =PEG_R2D_C_N<15>

PEG_CLK100M_N

TP_PCIE_CLK100M_FW_P

PCIE_CLK100M_MINI_N

TP_PCIE_CLK100M_FW_N

TP_PCIE_CLK100M_FC_P

PCIE_MINI_R2D_C_N

=PEG_D2R_P<6>

=PEG_D2R_P<4>

=PEG_D2R_P<2>

=PEG_D2R_N<0>

=PEG_D2R_N<2>

=PEG_D2R_P<0>

=PEG_D2R_P<11>

=PEG_D2R_N<14>

=PEG_D2R_P<9>

=PEG_D2R_P<12>

=PEG_D2R_N<11>

=PEG_D2R_P<14>

=PEG_D2R_N<12>

TP_PCIE_CLK100M_EXCARD_N

PCIE_CLK100M_MINI_P

MINI_CLKREQ_L

TP_FW_CLKREQ_L

TP_PCIE_FC_R2D_C_N

TP_PCIE_CLK100M_EXCARD_P

PEG_CLK100M_P

=PEG_R2D_C_N<14>

=PEG_R2D_C_P<14>

TP_EXCARD_CLKREQ_L

TP_PCIE_FC_D2R_P

TP_PCIE_FW_D2R_N

TP_PCIE_EXCARD_PRSNT_L

PCIE_MINI_R2D_C_P

PCIE_RESET_L

PEG_CLKREQ_L

EXTGPU_PWR_EN

TP_PCIE_FC_PRSNT_L

TP_FC_CLKREQ_L

EXTGPU_RESET_L

TP_PCIE_EXCARD_D2R_P

TP_PCIE_FW_D2R_P

PCIE_MINI_D2R_N

PCIE_MINI_D2R_P

70

7

67

22

IN

BI

IN IN IN IN

IN IN

IN

OUT OUT

OUT

OUT OUT OUT OUT OUT OUT

OUT OUT

IN IN

OUT OUT

OUT OUT OUT

OUT OUT

IN

OUT

HPLUG_DET3

HPLUG_DET2

VAP8_IFPA_VDD_0 V1P8_IFPB_VDD_1

V1P1_HDMI_VDD

V3P3_PLL_HDMI

V3P3_PLL_IFPAB

HDMI_TXD0_N

HDMI_TXC_P

XTALIN_TV

GPIO_6 GPIO_7

TV_DAC_GREEN

TV_DAC_HSYNC TV_DAC_VSYNC

TV_DAC_BLUE

NC NC

NC NC NC

NC

MII_RXD3

MII_RXDV

NC

V1P1_DUAL_MACPLL

V1P0_DUAL_RMGT

MII_TXD0 MII_TXD1

V3P3_DUAL_RMGT

V1P0_DUAL_RMGT

NC

RGMII_INTR

MII_TXCLK

MII_TXEN

MII_RXCLK

DDC_DATA2

DDC_CLK2

HDMI_TXD2_P HDMI_TXD2_N

HDMI_TXD1_P HDMI_TXD1_N

HDMI_TXD0_P

LCD_PANEL_PWR

LCD_BKL_ON

LCD_BKL_CTL

HDMI_TXC_N

RGMII_PWRDWN

MII_MDIO

MII_MDC

MII_TXD3

MII_TXD2

MII_RXD2

MII_RXD1

MII_RXD0

IFPA_TXD3_N

MII_VREF

MII_RESET#

TV_DAC_RSET

IFPAB_VPROBE

IFPAB_RSET

DDC_CLK3

DDC_DATA3

IFPB_TXD7_N

IFPB_TXD7_P

IFPB_TXD6_N

IFPB_TXD5_N IFPB_TXD6_P

IFPB_TXD4_N

IFPB_TXD4_P

IFPB_TXD5_P

IFPB_TXC_N

IFPB_TXC_P

IFPA_TXD2_N IFPA_TXD3_P

IFPA_TXD1_N

IFPA_TXD1_P

IFPA_TXD2_P

IFPA_TXD0_N

IFPA_TXD0_P

IFPA_TXC_P

TV_DAC_RED

DDC_CLK0

DDC_DATA0

BUF_25MHZ

HDMI_VPROBE

HDMI_RSET

DP_AUX_CH0_N

DP_AUX_CH0_P

TV_DAC_VREF

IFPA_TXC_N

XTALOUT_TV

MII_COMP_VDD MII_COMP_GND

NC

NC NC

DACS

LAN

FLAT PANEL

BI

OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT

OUT

BI

OUT

BI

OUT OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

C / Pr Y / Y Comp / Pb

RGB ONLY

131 mA (A01)

Okay to float all RGB_DAC signals.

DDC_CLK0/DDC_DATA0 pull-ups still required.

5 mA (A01)

95 mA (A01)

WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliases

8 mA

DP_IG_ML_P/N<2> DP_IG_ML_P/N<1>

NOTE: 20K pull-down required on DP_HOTPLUG_DET.

MCP79 requires a S5 pull-up.

190 mA (A01, 1.8V)

16 mA (A01)

83 mA (A01)

Okay to float XTALIN_TV and XTALOUT_TV.

DDC_CLK0/DDC_DATA0 pull-ups still required.

TV DAC Disable:

Okay to float all TV_DAC signals.

ENET_TXD<0>

1

0MII

RGMII

Interface

Network Interface Select

NOTE: All Apple products set strap to

feature via software. This avoids a leakage issue since

DisplayPort

DP_IG_ML_P/N<3>

DP_IG_ML_P/N<0> DP_IG_DDC_CLK DP_IG_DDC_DATA DP_IG_HPD DP_IG_AUX_CH_P/N

TP_DP_IG_AUX_CHP/N

TMDS_IG_DDC_DATA

TMDS_IG_TXD_P/N<2>

TMDS_IG_TXD_P/N<0>

TMDS_IG_TXC_P/N

Interface Mode

TMDS/HDMI

=MCP_HDMI_TXC_P/N =MCP_HDMI_TXD_P/N<0>

MCP Signal

=MCP_HDMI_DDC_CLK

=MCP_HDMI_TXD_P/N<1> =MCP_HDMI_TXD_P/N<2>

=MCP_HDMI_DDC_DATA

level-shifters.

TMDS_IG_HPD

=MCP_HDMI_HPD DP_IG_AUX_CH_P/N

8 mA

TV / Component

RGB DAC Disable:

MII, RGMII products will enable

Dual-channel TMDS: Power +VDD_IFPx at 3.3V

LVDS: Power +VDD_IFPx at 1.8V

be used to provide HDMI or dual-channel TMDS without

NOTE: HDMI port requires level-shifting. IFP interface can

NOTE: 1M pull-down required on DP_IG_CA_DET if DP not used.

TMDS_IG_DDC_CLK

TMDS_IG_TXD_P/N<1>

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

63

59

62 63

60

60 67

8

60

23 67

8

R1810

1

2

49.9

1/20W

1%

201

MF

R1811

1

2

1%

201

49.9

MF

1/20W

60

8

U1400

B30

C43

G39

B44

F40

H38

A45

H50

J49

H18 F16

A59

E51

F50

F52

E53

B54

C53

H48

J47

A57

D42 B46

F48

E49

H44

J43

F46

E47

B52

C51

H46

J45

A51 B50

E43

F42

H42

J41

F44

E45

B48

C47

H40

J39

J37 C45 D44

H32

E33

H28

F28 E29

C35

B32

G29

A33 J29 A35 C31

D30

F32

E31 D32 J31 B34

C33

B36

BA19

BA23

BA25

BA27

BA29

BA31

BA33

BA35

AW31 AW33 AW35

AW39 AW41

D56

E55

A47

F54

H52 J51

E41

V28 W29

V30

T42

N41 P38

P28

T44

T38

F26 E27

OMIT

MCP79U

BGA

(6 OF 12)

R1861

1

2

100K

5%

201

MF

1/20W

R1860

1

2

100K

5%

MF

201

1/20W

41

R1820

1

2

1/20W

MF

201

47K

5%

59 67

6

59 67

6

59 67

6

59 67

6

59 67

6

59 67

6

59 67

8

67

8

67

8

67

8

67

8

67

8

67

8

67

8

67

8

67

8

67

8

67

8

67

6

59

6

59

60

23 67

8

17 71

2.3.0

051-7631

SYNC_DATE=02/04/2008

SYNC_MASTER=M97

MCP Ethernet & Graphics

LVDS_IG_A_DATA_N<1>

ENET_MDC ENET_MDIO

ENET_RESET_L

ENET_CLK125M_TXCLK ENET_TX_CTRL

ENET_PWRDWN_L

MCP_DDC_CLK0

MCP_MII_COMP_GND

MCP_TV_DAC_RSET MCP_TV_DAC_VREF

MCP_CLK27M_XTALIN MCP_CLK27M_XTALOUT

LPCPLUS_GPIO DP_IG_CA_DET

LVDS_IG_BKL_PWM LVDS_IG_BKL_ON LVDS_IG_PANEL_PWR

=MCP_HDMI_TXC_P =MCP_HDMI_TXC_N

=DVI_HPD_GMUX_INT

=MCP_HDMI_TXD_N<2>

=MCP_HDMI_TXD_P<2>

=MCP_HDMI_TXD_P<1>

=MCP_HDMI_TXD_P<0>

DP_IG_AUX_CH_P DP_IG_AUX_CH_N

=PP3V3R1V8_S0_MCP_IFP_VDD

LVDS_IG_B_CLK_P

=PP3V3_S5_MCP_GPIO

=PP3V3_ENET_MCP_RMGT

=PP3V3_S0_MCP_GPIO

MCP_MII_COMP_VDD

LVDS_IG_A_CLK_N

MCP_HDMI_RSET MCP_HDMI_VPROBE

MCP_CLK25M_BUF0_R

CRT_IG_R_C_PR

LVDS_IG_A_CLK_P

LVDS_IG_A_DATA_P<0> LVDS_IG_A_DATA_N<0>

LVDS_IG_B_CLK_N

LVDS_IG_B_DATA_P<1>

LVDS_IG_B_DATA_P<0> LVDS_IG_B_DATA_N<0>

LVDS_IG_B_DATA_P<2>

LVDS_IG_B_DATA_N<1>

LVDS_IG_B_DATA_N<2> LVDS_IG_B_DATA_P<3> LVDS_IG_B_DATA_N<3>

=MCP_HDMI_DDC_DATA

=MCP_HDMI_DDC_CLK

MCP_IFPAB_RSET MCP_IFPAB_VPROBE

MCP_MII_VREF

ENET_RXD<0> ENET_RXD<1> ENET_RXD<2>

ENET_TXD<2>

=MCP_HDMI_TXD_N<1>

LVDS_IG_DDC_CLK LVDS_IG_DDC_DATA

ENET_CLK125M_RXCLK

ENET_INTR_L

=PP3V3_ENET_MCP_RMGT

ENET_TXD<1>

=PP1V05_ENET_MCP_RMGT

PP1V05_ENET_MCP_PLL_MAC

ENET_RX_CTRL

ENET_RXD<3>

CRT_IG_B_COMP_PB

CRT_IG_VSYNC

CRT_IG_HSYNC

CRT_IG_G_Y_Y

=MCP_HDMI_TXD_N<0>

PP3V3_S0_MCP_VPLL

=PP1V05_S0_MCP_HDMI_VDD

=MCP_HDMI_HPD

LVDS_IG_A_DATA_N<3>

LVDS_IG_A_DATA_P<3>

LVDS_IG_A_DATA_N<2>

LVDS_IG_A_DATA_P<2>

LVDS_IG_A_DATA_P<1>

MCP_DDC_DATA0

ENET_TXD<3>

ENET_TXD<0>

20

22

20

22

23

19

17

18

17

22

70

23

8

7

7 8

8

7

8

7

22

23

7

8

OUT

BI BI BI BI

NC

LPC_DRQ0#

PCI_REQ1#

PCI_GNT4#

PCI_GNT3#

PCI_GNT2#

LPC_PWRDWN#

LPC_DRQ1#

PCI_CLKRUN#

PCI_REQ4#

PCI_REQ3#

PCI_REQ2#

PCI_REQ0#

GND129 GND130

GND128

GND127

GND126

GND124 GND125

GND123

GND122

GND121

GND118 GND119 GND120

GND117

GND116

GND113 GND114 GND115

GND112

GND111

GND110

GND108 GND109

GND107

GND106

GND105

GND103 GND104

GND101 GND102

GND100

GND98 GND99

LPC_AD2 LPC_AD3

LPC_CLK0

LPC_RESET0#

LPC_AD0 LPC_AD1

LPC_FRAME#

PCI_CLKIN

PCI_CLK0

PCI_CLK2

PCI_RESET1#

PCI_RESET0#

GND97

GND96

GND95

GND93 GND94

GND92

GND91

GND90

GND88 GND89

GND87

GND86

GND85

GND82 GND83 GND84

GND81

GND80

GND78 GND79

GND77

GND76

GND75

GND73 GND74

GND72

GND71

GND70

GND68 GND69

GND67

GND66

PCI_AD7

PCI_AD6

PCI_AD5

PCI_AD1 PCI_AD2 PCI_AD3

PCI_AD0

PCI_AD4

LPC_SERIRQ

GND65

NC

NCNC

GND LPC PCI

IN

BI

OUT

IN

OUT

BI BI BI BI BI BI BI BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

FIXME: ADJUST PINOUT PER LAYOUT

Int PU (S5)

Int PU

FIXME: USED TO BE PM_LATRIGGER_L

Strap for Boot ROM Selection (See HDA_SDOUT)

39 41 68

24 68

39 41 68

U1400

AM48 AN13 AN19 AN21 AN23 AN25 AN27 AN29 AN31 AN33 AN35 AN37 AN39 AN53 AP10 AP12 AP16 AP4 AP42 AP44 AP46 AP48 AP52 AP58 AT14 AT30 AT36 AT38 AT48 AU1 AU13

AH48 AH52 AH58 AJ19 AJ21 AJ23 AJ25 AJ27 AJ29 AJ31 AJ33 AJ35 AJ37 AJ39 AK16 AK48

AL1 AL13 AL19 AL21 AL23 AL25 AL27 AL29 AL31 AL33 AL35 AL37 AL39 AL43 AL49 AL55 AL61

AL7 AM16

AM8 AK8 AK10 AR9

BB4

AN7

AN9

AJ7 AL9

E17

AT8

BA39

BA41

BA43

BA49

BA53

BA55

BA7

BA9

BB10

BB20

BB24

BB26

BB28

BB30

BB32

BB34

BB36

BB38

BB42

BB44

BB46

BB48

BB50

BB52

BB54

BB56

BB6

BB8

BC53

BC57 BC9

BD48

BD50

BD52

BD54

BD56

BD6

BD8

BE49

BE53

BE55

BE57

BE7

BE9

BC5

BK4

BE5

BH4

BE3

BA5

BJ3

BJ5

AM10

AG5

AG7

AH8

AE5 AC7 AF6

AJ9

AD6

AH6

AP8

AC5

G17 G21

BGA

MCP79U

OMIT

(7 OF 12)

39 41

39 41 24 68

39 41

R1910

1

2

201

22

5% 1/20W MF

PLACEMENT_NOTE=Place close to pin R8

18

R1965

1

2

1/20W MF 201

5%

10K

R1960

1 2

1/20W

201

5%

22

MF

24

18

8

18

6

12 68

6

12 68

6

12 68

6

12 68

6

12 68

6

12 68

6

12 68

6

12 68

RP1901

4 5

4X0201-HF

1/32W

5%

8.2K

RP1901

2 7

4X0201-HF

1/32W

5%

8.2K

RP1901

1 8

4X0201-HF

1/32W

5%

8.2K

RP1900

4 5

8.2K

4X0201-HF

1/32W

5%

RP1900

3 6

4X0201-HF

8.2K

5%

1/32W

R1961

1 2

201

MF

22

1/20W

5%

R1962

1 2

MF

22

1/20W

201

5%

R1963

1 2

22

1/20W

201

MF5%

R1964

1 2

5%

22

MF

201

1/20W

SYNC_MASTER=M97

SYNC_DATE=02/04/2008

MCP PCI & LPC

18 71

2.3.0

051-7631

LPC_RESET_L

LPC_FRAME_L

=PP3V3_S0_MCP_GPIO

MCP_RS232_SIN_L

MCP_DEBUG<1> MCP_DEBUG<2>

MCP_DEBUG<4>

AUD_IPHS_SWITCH_EN

CRTMUX_SEL_TV_L

MCP_RS232_SOUT_L

PCI_REQ1_L

PCI_REQ0_L

LPC_CLK33M_SMC_R

LPC_AD_R<1>

LPC_FRAME_R_L

PCI_CLK33M_MCP

LPC_AD<1>

LPC_AD<0>

LPC_PWRDWN_L

LPC_AD_R<0>

PM_CLKRUN_L

TP_LPC_DRQ0_L

FW_PME_L

PCI_REQ1_L

TP_DPMUX_SEL_IG_L

TP_LVDSMUX_SEL_IG_L

MCP_RS232_SIN_L

PCI_REQ0_L

TP_PCI_CLK0

PCI_CLK33M_MCP_R

TP_PCI_RESET1_L

MEM_VTT_EN_R

MCP_DEBUG<7>

MCP_DEBUG<6>

MCP_DEBUG<5>

MCP_DEBUG<3>

MCP_DEBUG<0>

LPC_SERIRQ

LPC_AD<2> LPC_AD<3>

LPC_AD_R<3>

LPC_AD_R<2>

20 17

68

7

18

41

68

8

18

68

BI BI

IN IN IN IN

NC

V3P3_PLL_USB

V1P1_SATA_AVDD1

V1P1_SATA_DVDD1 V1P1_SATA_DVDD1

NC

V1P1_PLL_SATA

GND131 GND132

NC

SATA_A1_RX_N

NC

NC NC

NC

USB6_N

USB_OC3#/GPIO_28/MGPIO

USB_OC2#/GPIO_27/MGPIO

USB_OC1#/GPIO_26

USB_OC0#/GPIO_25

SATA_A0_TX_N

SATA_A0_RX_N

USB3_N

USB3_P

GND135

GND137 GND138

SATA_A0_TX_P

SATA_A1_TX_N

SATA_A1_RX_P

SATA_TERMP

USB0_P

USB1_P USB1_N

USB0_N

USB2_P USB2_N

USB4_P USB4_N

USB5_N

USB6_P

USB7_P USB7_N

USB_RBIAS_GND

GND134

GND133

GND136

GND139 GND140 GND141 GND142

GND144

GND143

GND145 GND146 GND147

GND149

GND148

GND150 GND151 GND152

GND154

GND153

GND155 GND156 GND157

GND159

GND158

GND160

SATA_A1_TX_P

SATA_A0_RX_P

SATA_LED#

NC

USB5_P

SATA

USB

OUT OUT

IN

OUT OUT

IN IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Wellspring Trackpad/Keyboard

127 mA (A01)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

AirPort (PCIe Mini-Card)

External D

External A

Camera

Bluetooth

IR

External B

84 mA (A01)

43 mA (A01)

19 mA (A01)

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

68

8

R2010

1

2

MF

1% 1/20W

201

2.49K

R2060

1

2

806

MF

1%

1/20W

201

R2053

1

2

5%

8.2K

MF

1/20W

201

R2052

1

2

201

1/20W

MF

5%

8.2K

R2051

1

2

201

MF

1/20W

5%

8.2K

R2050

1

2

201

1/20W

MF

5%

8.2K

U1400

AU19 AU25 AU31 AU37 AU43 AU49 AU55 AU61 AU7 AU9 AV14 AV8 AY10 AY4 AY52 AY58 BB12 BB14 BB16 BB18 BC1 BC13 BC19 BC21 BC23 BC25 BC27 BC29 BC31 BC33

BF48

BF50

BF54

BF56

BF6

BF8

BG5

BG53

BG7

BG9

BH10

BH16

BH46

BH48

BH50

BH52

BH54

BH56

BH6

BH8

BJ11

BJ41

BJ45

BJ53

BJ9

BK12

BK16

BK44

BK46

BK48 BK50

BK52

BK54

BK56

BK6

BK8

BL49

BG1 BF2

BG3

BH2

BL3 BM2

BK2

BL1

E9

AW7

E37

F36

F34

E35

C37

B38

B42

C41

E39

F38

H36

J35

C39

B40

J33

H34

F24 H24 E25 J23

A41

AP14

AR13 AT12 AV10

AW9

AV12 AW13

V36

MCP79U

OMIT

(8 OF 12)

BGA

36 67

8

SYNC_MASTER=M97

MCP SATA & USB

051-7631

2.3.0

7119

SYNC_DATE=02/04/2008

SATA_ODD_R2D_C_N

SATA_ODD_D2R_P

=PP3V3_S5_MCP_GPIO

USB_TPAD_P

SATA_HDD_D2R_P

MCP_USB_RBIAS_GND

USB_EXTB_N

USB_EXTB_P

USB_BT_P

USB_TPAD_N

USB_IR_N

USB_IR_P

USB_EXTD_N

USB_EXTD_P

USB_EXTA_N

USB_MINI_N

USB_MINI_P

USB_EXTA_P

MCP_SATA_TERMP

SATA_HDD_R2D_C_P

USB_CAMERA_P USB_CAMERA_N

SATA_HDD_D2R_N

SATA_HDD_R2D_C_N

USB_EXTA_OC_L USB_EXTB_OC_L USB_EXTC_OC_L EXCARD_OC_L

USB_BT_N

SATA_ODD_D2R_N

PP1V05_S0_MCP_PLL_SATA

=PP1V05_S0_MCP_SATA_DVDD

PP1V05_S0_MCP_SATA_AVDD

PP3V3_S0_MCP_PLL_USB

SATA_ODD_R2D_C_P

20 17

70

22

70

7

68

67

22

7

22

OUT

BI

OUT

OUT OUT

OUT

IN

OUT

IN

OUT

IN IN

OUT

IN

IN IN IN

OUT

V3P3_DUAL_HDA V3P3_DUAL_HDA

GPIO_10 GPIO_11

GPIO_8 GPIO_9

CPUVDD_EN

FANCTL1/GPIO_62

FANRPM1/GPIO_63

FANRPM0/GPIO_60

SMB_DATA1/MSMB_DATA

SMB_DATA0

SMB_CLK0

GPIO_15

THERM_DIODE_N

THERM_DIODE_P

SLP_RMGT#

SLP_S5#

GPIO_12

GPIO_1

V1P1_PLL_SP_SPREF

V1P1_PLL_NV_H

HDA_RESET#

GPIO_5

GPIO_4

GPIO_3

GPIO_2

SUS_CLK/GPIO_34

EXT_SMI/GPIO_32#

FANCTL0/GPIO_61

SMB_ALERT#/GPIO_64

SMB_CLK1/MSMB_CLK

HDA_PULLDN_COMP

HDA_SDATA_IN0

A20GATE

SLP_S3#

CPU_DPRSLPVR

RSTBTN#

PWRBTN#

LLB#

LID#

INTRUDER#

PWRGD_SB PS_PWRGD

RTC_RST#

JTAG_TDO

JTAG_TDI

CPU_VLD

JTAG_TMS

JTAG_TCK

XTALIN

JTAG_TRST#

XTALOUT_RTC

XTALOUT

XTALIN_RTC

HDA_BITCLK

HDA_SYNC

SPKR

BUF_SIO_CLK

TEST_MODE_EN

PKG_TEST

KBRDRSTIN# SIO_PME#

HDA_SDATA_OUT

GPIO_13 GPIO_14

HDA

MISC

IN

OUT

IN

OUT

IN

IN IN

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

SPI0

Int PD

42 MHz

31 MHz

BUF_SIO_CLK Frequency

HDA_SYNC

Int PD

Int PU (S5) Int PU (S5)

Int PU (S5) Int PU

14.31818 MHz

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

17 mA

20 mA

7 mA (A01)

HDA Output Caps

For EMI Reduction on HDA interface

PCI

not use LPC for BootROM override.

LPC_FRAME# high for SPI1 ROM override.

SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_L

Int PU

Int PU (S5)

Int PU

25 MHz

0

SPI1 option.

LPC ROMs. So Apple designs will

0

124 MHz

0

1

0

SPI_CLKSPI_DO

0

1

NOTE: Straps not provided on this page.

1 MHz

SPI Frequency Select

Frequency

NOTE: MCP79 does not support FWH, only

LPC

SPI1

I/F

HDA_SDOUT

BIOS Boot Select

R1961 and R2160 selects SPI0 ROM by default, LPC+ debug card pulls

1

0

LPC_FRAME#

0

1

0

1

Int PU

Int PD

37 mA (A01)

Int PU (S5)

NOTE: MCP79 rev A01 does not support

Frequency

MCP_SAFE_MODE SIGNAL TO SUPPORT ROM FAILURE OVERRIDE

41 68

6

34 35 39 56

34 39 40 56

6

12 42 68

42 68

6

12 42 68

42 68

20 51

45

20

20 51

20 34

45

57

50 65

39

6

35 68

6

35 68

6

35 68

6

35 68

R2121

1

2

49.9K

201

1% 1/20W MF

R2120

1

2

201

MF

49.9K

1%

1/20W

R2190

1

2

1K

MF

1% 1/20W

201

24 68

39

R2170

1 2

22

5%

201

1/20W

MF

R2171

1 2

22

201

1/20W

5%

MF

R2173

1 2

201

1/20W

22

5%

MF

R2163

1

2

10K

MF 201

5% 1/20W

R2160

1

2

201

MF

8.2K

1/20W

5%

R2180

1

2

5%

10K

MF

BOOT_MODE_SAFE

1/20W

201

R2181

1

2

1/20W MF 201

10K

5%

BOOT_MODE_USER

R2172

1 2

MF

1/20W

22

5%

201

41

R2110

1

2

201

1% 1/20W MF

49.9

R2150

1

2

10K

5%

MF

1/20W

201

6

12

6

12

6

12

C2171

1

2

33PF

NP0-C0G

5% 25V

201

C2173

1

2

201

25V NPO

5%

10PF

C2170

1

2

33PF

NP0-C0G

5%

25V

201

C2172

1

2

201

NPO

25V

10PF

5%

U1400

B6

BD4

D12

D20 E19

F20

B10

C9

A9

D8

C21

E15 G15

J25

B8 F12 C11

J15

B14

B16 D14

A15 C15

C13

B12

A11

F14 H14

E13

C29

H22

J21 B22 F22 E21

C7

A27 B20

H26

A23

F18

G27

D18

A29

C23

H16

C19

C17

B24

A17

E23

B18

G23

H12

H20

A21

G11

E11

AP20 AP18

P20 T20

B26

B28

C25

C27

BGA

MCP79U

OMIT

(9 OF 12)

20

24 24

20 39

R2147

1

2

100K

5%

MF

1/20W

201

R2142

1

2

201

MF

5%

10K

1/20W

R2141

1

2

201

1/20W MF

5%

10K

R2157

1

2

201

1/20W MF

5%

22K

R2156

1

2

22K

5%

MF

1/20W

201

R2155

1

2

201

1/20W MF

5%

22K

R2195

1

2

201

1K

DRAM_4GB

1/20W MF

5%

20

R2197

1

2

201

1K

1/20W MF

5%

DRAM_SPD_2

R2151

1

2

5%

MF

1/20W

201

100K

R2158

1

2

MF

100K

201

1/20W

5%

R2143

1

2

10K

5%

MF

1/20W

201

R2182

1 2

201

MF

1/20W

5%

0

39

8

39 40

R2140

1

2

201

1/20W MF

5%

10K

24

39

24

41 68

051-7631

2.3.0

7120

SYNC_MASTER=M97

SYNC_DATE=02/04/2008

MCP HDA & MISC

HDA_SDOUT_R HDA_BIT_CLK_R

=PP3V3_S0_MCP_GPIO

HDA_SYNC_R

ARB_DETECT

MLB_RAM_VENDOR_0

=PP3V3_S5_MCP_GPIO

AP_PWR_EN

MLB_RAM_SIZE_0

HDA_BIT_CLK

HDA_RST_L

MCP_VID<0> MCP_VID<1> MCP_VID<2>

=PP3V3R1V5_S0_MCP_HDA

PP3V3_G3_RTC

HDA_SDOUT

HDA_SYNC

HDA_RST_R_L HDA_SYNC_R

MEM_EVENT_L

AUD_I2C_INT_L

=PP3V3_S3_MCP_GPIO

=PP3V3_S0_MCP

MCP_SAFE_MODE

MCP_VID<1>

MCP_VID<0>

HDA_SDOUT_R

MCP_TEST_MODE_EN

TP_MCP_BUF_SIO_CLK

MCP_SPKR

HDA_BIT_CLK_R

RTC_CLK32K_XTALIN

MCP_CLK25M_XTALOUT

RTC_CLK32K_XTALOUT

JTAG_MCP_TRST_L

MCP_CLK25M_XTALIN

JTAG_MCP_TCK

JTAG_MCP_TMS

MCP_CPU_VLD

JTAG_MCP_TDI JTAG_MCP_TDO

RTC_RST_L

MCP_PS_PWRGD

PM_RSMRST_L

PM_BATLOW_L

PM_PWRBTN_L PM_SYSRST_DEBOUNCE_L

PM_DPRSLPVR

TP_SB_A20GATE

HDA_SDIN0

MCP_HDA_PULLDN_COMP

SMBUS_MCP_1_CLK

AP_PWR_EN

PM_CLK32K_SUSCLK_R

MLB_RAM_SIZE_0

MLB_RAM_VENDOR_0

AUD_I2C_INT_L

HDA_RST_R_L

PP1V05_S0_MCP_PLL_NV

=SPI_CS1_R_L_USE_MLB

PM_SLP_S4_L

MCP_THMDIODE_P MCP_THMDIODE_N

MCP_VID<2>

SMBUS_MCP_0_CLK SMBUS_MCP_0_DATA

SMBUS_MCP_1_DATA

MCP_CPUVDD_EN

=PP3V3R1V5_S0_MCP_HDA

TP_MCP_LID_L

SM_INTRUDER_L

SMC_RUNTIME_SCI_L

SMC_WAKE_SCI_L

TP_MCP_KBDRSTIN_L

SMC_ADAPTER_EN

MEM_EVENT_L ODD_PWR_EN_L

SPI_MOSI_R

SPI_MISO

SPI_CLK_R

SPI_CS0_R_L

ARB_DETECT

SMC_IG_THROTTLE_L

MCP_GPIO_4

PM_SLP_S3_L PM_SLP_RMGT_L

MCP_GPIO_4 SMC_IG_THROTTLE_L

18

19

22

68

17

68

17

34

51

20

24

68

39

21

68

70

20

7

20

7

20

7

21

20

7

20

68

20

22

7

8

20

8

20

8

GND

V1P2_CPUCLK_VTT

V3P3

V3P3_DUAL

V3P3_TVDAC_VDD

V3P3_VBAT

V3P3_DUAL_USB

V1P0_VDD_AUXC

VDD

V1P2_CPU_VTT

NC

POWER

NC

(12 OF 12)

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

80 uA (S0)

16996 mA (A01, 1.0V)

23065 mA (A01, 1.2V)

250 mA

16 mA

266 mA (A01)

1139 mA

1182 mA (A01)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

105 mA (A01)

10 uA (G3)

450 mA (A01)

43 mA

U1400

BC35 BC37 BC39 BC41 BC43 BC49 BC55 BC61

BC7 BD10 BD46 BE13 BF10 BF16 BF28 BF34

BF4 BF46 BF52 BF58 BH12 BH14 BH42 BH44

BJ1 BJ13 BJ19 BJ25 BJ31 BJ37 BJ43 BJ49 BJ55 BJ61

BJ7 BM10 BM16 BM22 BM28 BM34

BM4 BM40 BM46 BM52 BM58

BR1 BR13 BR19 BR25 BR31 BR37 BR43 BR49 BR55 BR61

BR7 BV10 BV16 BV22 BV28 BV34

BV4 BV40 BV46 BV52 BV58

CA1 CA13 CA19 CA25 CA31 CA37 CA43 CA49 CA55 CA61

CA7

D10

D16

D22

D28

D34

D4 D40 D46

D52 D58 G1 G13 G19 G25 G31 G37 G43 G49 G55 G61 G7 K10 K16 K22 K28 K34 K4 K40 K46 K52 K58 M10 M20 M24 N1 N13 N17 N19 N25 N27 N29 N31 N33 N35 N37 N43 N49 N55 N61 N7 P42 P50 P8 R7 R9 T10 T16 T18 T28 T34 T36 T4 T46 T48 T52 T58 T8 U13 V10 V24 V34 V38 V48 V52 V8 W1 W13 W19 W25 W27 W31 W37 W43 W49 W53 W55 W61 W7 Y14 Y28 Y42 Y48 Y6

BGA

MCP79U

(11 OF 12)

OMIT

U1400

AH42 AH44 AJ13 AJ41 AJ43 AK12 AK42 AK44 AK46 AL41 AM12 AM14 AM42 AM44 AM46 AN41 AN43 AP24 AP26 AP28 AP30 AP32 AP34 AP36 AP38 AR19 AR21

T26 V26

AA49 AA53

AG53 AH50 AJ49 AJ53 AK50 AK52 AL53 AM50 AM52 AN49

AC49

AP50 AR49 AT50 T50 U49 V50 Y50 Y52

AC53 AD50 AD52 AE53 AF50 AF52 AG49

BL57

AK14 AU29 P18 P36

N21 N23 P24 T24

P32 P34 T30 T32

V44

P26

AA19 AA21

AA39 AD18 AD20 AD24 AD26 AD28 AD30 AD32 AD34 AD36

AA23

AD38 AF18 AF20 AF24 AF26 AF28 AF30 AF32 AF34 AF36

AA25

AF38 AH18 AH20 AH24 AH26 AH28 AH30 AH32 AH34 AH36

AA27

AH38 AK18 AK20 AK24 AK26 AK28 AK30 AK32 AK34 AK36

AA29

AK38 AM18 AM20 AM24 AM26 AM28 AM30 AM32 AM34 AM36

AA31

AM38

AA33 AA35 AA37

BGA

MCP79U

OMIT

(10 OF 12)

U1400

A39 A53

AW43 AW49 AW53

AY6 AY8 B56

B58 BA13 BA21 BA37

AF46 AG41 AG43 AH14

BG55 BG57 BJ51 BJ57 BK10 BK14 BK42

AA41

BL11 BL51 BL53 BL55 BM48 BM50 BM54 BN49 BN51 BN53 BN55 BP50 BP52 BP54 BR11 BR15 BR17 BR39 BR41 BR45 BR47

BR5

BR9

BT4

C49

C55

C57

D24

D26

D36

D38

D48

D50

D54

F10

F30

F8 G33 G35 G41

G45 G47 G51 G53 G9 H10 H30 J11 J13 J7 K12 K14 K18 K20 K24 K26 K30 K32 K36 K38 K42 K44 K48 K50 K54 K6 K8 L11 L13 L49 L5 L51 L53 L7 L9 M14 M16 M18 M26 M28 M30 M32 M34 M36 M38 M42 M44 M46 M48 M50 M52 M8 N39 N45

AA43

N51 N53 P12 P14 P16 P30 P44 P46 P48 P52 R53 T12 T14 U5 U53 U9 V12 V16 V18 V20 V32 V46 V6 W21 W23 W33 W35 W5 Y16 Y18 Y20 Y24 Y26 Y30 Y32 Y34 Y36 Y44 Y46

AT44 AT46 AT52 AU21 AU23 AU27 AU33 AU35 AU39 AU41 AU53 AV16 AV18 AV20 AV24 AV26 AV28 AV30 AV32 AV34 AV36 AV38 AV42 AV44 AV46 AV48 AV50 AW37

BGA

MCP79U

OMIT

SYNC_DATE=02/04/2008

SYNC_MASTER=M97

051-7631

2.3.0

7121

MCP Power & Ground

=PP3V3_S0_MCP

=PP3V3_S5_MCP

=PP1V05_S0_MCP_FSB

=PPVCORE_S0_MCP

PP3V3_G3_RTC

PP3V3_S0_MCP_DAC

=PP1V05_S5_MCP_VDD_AUXC

22

13

20

22

8

22

24

70

22

7

7 7

20

23

7

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

MCP SATA (DVDD) Power

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF) Apple: 1x 2.2uF 0402 (2.2 uF)

Apple: 1x 2.2uF 0402 (2.2 uF)

19 mA (A01)

206 mA (A01)

5 mA (A01)

NV: 1x 4.7uF 0603, 4x 0.1uF 0402 (5.1 uF) Apple: 4x 2.2uF 0402 (8.8 uF)

1182 mA (A01)

7 mA (A01)

333 mA (A01)

4771 mA (A01, DDR3)

MCP Core Power

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

MCP 3.3V Power

MCP Memory Power

MCP FSB (VTT) Power

Apple: 1x 2.2uF 0402 (2.2 uF)

Apple: 2x 2.2uF 0402 (4.4 uF)

Apple: 5x 2.2uF 0402 (11 uF)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 1uF 0402, 2x 0.1uF 0402 (16.9 uF)

MCP 1.05V AUX Power

MCP 3.3V/1.5V HDA Power

266 mA (A01)

MCP 3.3V AUX/USB Power

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

MCP 3.3V Ethernet Power

270 mA (A01)

(No IG vs. EG data)

23065 mA (A01, 1.2V) 16996 mA (A01, 1.0V)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

MCP PCIE (DVDD) Power

105 mA (A01)

83 mA (A01)

84 mA (A01)

87 mA (A01)

37 mA (A01)

562 mA (A01)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)

127 mA (A01)

57 mA (A01)

450 mA (A01)

19 mA (A01)

43 mA (A01)

Apple: 4x 4.7uF 0402, 4x 1uF 0402, 6x 0.1uF 0402 (23.4 uF)

NV: 1x 10uF 0805, 2x 4.7uF 0402, 3x 1uF 0402, 9x 0.1uF 0402 (23.3 uF)

5 mA (A01)

131 mA (A01)

MCP 1.05V RMGT Power

Apple: 7x 2.2uF 0402 (15.4 uF)

C2582

1

2

4V

4.7UF

20% X5R

402

C2588

1

2

20%

4.7UF

4V X5R 402

C2584

1

2

4.7UF

20%

4V X5R 402

C2586

1

2

4V

4.7UF

20% X5R

402

C2555

1

2

CERM 402-LF

20%

2.2UF

6.3V

OMIT

C2502

1

2

4.7UF

4V

20% X5R

402

C2507

1

2

X5R 402-1

1UF

10%

6.3V

OMIT

C2506

1

2

X5R 402-1

1UF

10%

6.3V

OMIT

C2505

1

2

X5R 402-1

1UF

10%

6.3V

OMIT

C2504

1

2

X5R 402-1

1UF

10%

6.3V

OMIT

C2511

1

2

0.1UF

201

6.3V X5R

10%

C2510

1

2

0.1UF

201

6.3V X5R

10%

C2509

1

2

0.1UF

201

6.3V X5R

10%

C2508

1

2

0.1UF

201

6.3V X5R

10%

C2513

1

2

0.1UF

201

6.3V X5R

10%

C2512

1

2

0.1UF

201

6.3V X5R

10%

C2536

1

2

2.2UF

6.3V

20% CERM

402-LF

OMIT

C2535

1

2

2.2UF

20%

402-LF

CERM

OMIT

6.3V

C2534

1

2

6.3V

20% CERM

402-LF

2.2UF

OMIT

C2533

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2532

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2531

1

2

CERM 402-LF

6.3V

2.2UF

20%

OMIT

C2530

1

2

20%

402-LF

2.2UF

6.3V CERM

OMIT

C2517

1

2

X5R 402-1

1UF

10%

6.3V

OMIT

C2516

1

2

X5R 402-1

1UF

10%

6.3V

OMIT

C2515

1

2

4.7UF

4V

20% X5R

402

C2572

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2571

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2520

1

2

4V

4.7UF

20% X5R

402

C2570

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2574

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2573

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2576

1

2

CERM 402-LF

20%

2.2UF

6.3V

OMIT

C2575

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2553

1

2

2.2UF

6.3V

20%

402-LF

CERM

OMIT

C2552

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2551

1

2

2.2UF

6.3V

20%

402-LF

CERM

OMIT

C2550

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2549

201

6.3V

0.1UF

X5R

10%

C2548

0.1UF

6.3V

201

X5R

10%

C2547

201

6.3V

0.1UF

X5R

10%

C2546

0.1UF

6.3V

201

X5R

10%

C2545

201

6.3V

0.1UF

X5R

10%

C2544

0.1UF

6.3V

201

X5R

10%

C2543

201

6.3V

0.1UF

X5R

10%

C2542

0.1UF

6.3V

201

X5R

10%

C2541

0.1UF

6.3V

201

X5R

10%

C2540

1

2

20%

4.7UF

4V X5R 402

C2562

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2564

1

2

CERM 402-LF

20%

2.2UF

6.3V

OMIT

C2580

1

2

4.7UF

20%

4V X5R 402

L2570

1 2

0603

30-OHM-5A

L2575

1 2

30-OHM-5A

0603

L2582

1 2

30-OHM-1.7A

0402

L2584

1 2

30-OHM-1.7A

0402

L2588

1 2

30-OHM-1.7A

0402

L2586

1 2

0402

30-OHM-1.7A

L2555

1 2

0402

30-OHM-1.7A

C2500

1

2

4.7UF

4V

20% X5R

402

C2501

1

2

4.7UF

4V

20% X5R

402

L2580

1 2

30-OHM-1.7A

0402

C2560

1

2

6.3V

2.2UF

20%

402-LF

CERM

OMIT

C2589

0.1UF

6.3V

201

X5R

10%

C2590

201

6.3V

0.1UF

X5R

10%

C2595

1

2

20%

4.7UF

4V X5R 402

L2595

1 2

30-OHM-1.7A

0402

C2521

201

6.3V

0.1UF

X5R

10%

C2518

0.1UF

6.3V

201

X5R

10%

C2519

201

6.3V

0.1UF

X5R

10%

C2581

0.1UF

6.3V

201

X5R

10%

C2583

0.1UF

6.3V

201

X5R

10%

C2585

0.1UF

6.3V

201

X5R

10%

C2587

0.1UF

6.3V

201

X5R

10%

C2529

201

6.3V

0.1UF

X5R

10%

C2528

1

2

X5R

20%

4V

4.7uF

402

C2526

1

2

6.3V

10%

0.1UF

X5R 201

C2525

1

2

0.1UF

6.3V

201

X5R

10%

C2596

1

2

0.1UF

6.3V

201

X5R

10%

C2503

1

2

4.7UF

4V

20% X5R

402

SYNC_DATE=02/04/2008

SYNC_MASTER=M97

MCP Standard Decoupling

22

2.3.0

051-7631

71

MIN_LINE_WIDTH=0.4 MM

PP1V05_ENET_MCP_PLL_MAC

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MM

=PP1V05_S0_MCP_PLL_UF

=PP1V05_S0_MCP_SATA_DVDD

=PP3V3_ENET_MCP_RMGT

=PP3V3_S0_MCP_PLL_UF

=PP1V05_S0_MCP_AVDD_UF

=PP3V3_S5_MCP

=PP3V3R1V5_S0_MCP_HDA

=PP3V3_S0_MCP

=PP1V05_ENET_MCP_PLL_MAC

VOLTAGE=1.05V

PP1V05_S0_MCP_PEX_AVDD

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.05V

PP1V05_S0_MCP_SATA_AVDD

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

=PP1V05_ENET_MCP_RMGT

=PP1V05_S0_MCP_PEX_DVDD

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

PP1V05_S0_MCP_PLL_FSB

PP1V05_S0_MCP_PLL_PEX

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.05V

PP1V05_S0_MCP_PLL_SATA

PP1V05_S0_MCP_PLL_CORE

VOLTAGE=1.05V

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM

PP1V05_S0_MCP_PLL_NV

VOLTAGE=1.05V

PP3V3_S0_MCP_PLL_USB

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

=PP1V05_S0_MCP_FSB

=PP1V05_S5_MCP_VDD_AUXC

=PP1V8R1V5_S0_MCP_MEM

=PPVCORE_S0_MCP

21

13

66

70

19

17 21

20

70

70 17

70

8

21

15

21

17

7

19

7

13

16

19

15

20

19

7