ANPEC APA2121RI-TY, APA2121RI-TU, APA2121RI-TR, APA2120RI-TY, APA2120RI-TR Datasheet

APA2120/2121

Stereo 2-W Audio Power Amplifier (with DC_Volume Control)

Features

General Description

•Low operating current with 14mA

•Improved depop circuitry to eliminate turn-on and turn off transients in outputs

•High PSRR

•32 steps volume adjustable by DC voltage with hysteresis

• 2W per channel output power into 4Ω load at 5V, BTL mode

•Two output modes allowable with BTL and SE modes selected by SE/BTL pin

•Low current consumption in shutdown mode (50µ A)

•Short Circuit Protection

•Power off depop circuit integration

•TSSOP-24 with or without thermal pad package

Applications

•NoteBook PC

•LCD Monitor or TV

APA2120/1 is a monolithic integrated circuit, which provides precise DC volume control, and a stereo bridged audio power amplifiers capable of producing 2.7W(2.0W) into 3Ω with less than 10% (1.0%) THD+N. The attenuator range of the volume control in APA2120/1 is from 20dB (DC_Vol=0V) to -80dB

(DC_Vol=3.54V) with 32 steps. The advantage of internal gain setting can be less components and PCB area. Both of the depop circuitry and the thermal shutdown protection circuitry are integrated in APA2120/1, that reduce pops and clicks noise during power up or shutdown mode operation. It also improves the power off pop noise and protects the chip from being destroyed by over temperature and short current failure. To simplify the audio system design, APA2120/1 combines a stereo bridge-tied loads (BTL) mode for speaker drive and a stereo single-end (SE) mode for headphone drive into a single chip, where both modes are easily switched by the SE/BTL input control pin signal. Besides, the multiple input selection is used for portable audio system.

Ordering and Marking Information

A P A 2 1 2 0 /1

H a n d lin g C o d e

T e m p . R a n g e

P a c k a g e C o d e

P a c k a g e C o d e
R : T S S O P -P *
T e m p . R a n g e
I : - 4 0 to 8 5 ° C
H a n d lin g C o d e
T U : T u b e	T R : T a p e & R e e l
T Y : T ra y

	A P A 2 1 2 0 /1 R :	A P A 2 1 2 0 /1	X X X X X - D a te C o d e
		X X X X X

* TSSOP-P is a standard TSSOP package with a thermal pad exposure on the bottom of the package.

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.

Copyright ANPEC Electronics Corp.	1	www.anpec.com.tw
Rev. A.1 - Mar., 2003

APA2120/2121

Block Diagram

LLINEIN		LOUT+
LHPIN	M U X
	Volum e	LOUT-
RLINEIN	C ontrol
RHPIN	M U X	LBYPASS
VOLUME		BYPASS
		B YPA SS
		ROUT+
HP/LINE	H P/LIN E
SE/BTL	SE/B TL	ROUT-
		RBYPASS
SHUTDOWN	Shutdow n
	ckt
PCBEEP	PC -B EEP	CLK
		Clock G en
	ckt

For APA2121

Absolute Maximum Ratings

(Over operating free-air temperature range unless otherwise noted.)

Symbol	Parameter					Rating	Unit
VDD	Supply Voltage Range					-0.3 to 6	V
VIN
	Input Voltage Range, SE/BTL,		HP/LINE,			-0.3 to VDD+0.3	V
	SHUTDOWN, PCBEN
TA	Operating Ambient Temperature Range					-40 to 85	° C
TJ	Maximum Junction Temperature					Intermal Limited*1	° C
TSTG	Storage Temperature Range					-65 to +150	° C
TS	Soldering Temperature,10 seconds					260	° C
VESD	Electrostatic Discharge					-3000 to 3000*2	V
						-200 to 200*3
PD	Power Dissipation					Intermal Limited

Note:

1.APA2120/1 integrated internal thermal shutdown protection when junction temperature ramp up to 150°C 2.Human body model: C=100pF, R=1500Ω , 3 positives pulse plus 3 negative pulses

3.Machine model: C=200pF, L=0.5µ F, 3 positive pulses plus 3 negative pulses

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Rev. A.1 - Mar., 2003

APA2120/2121

Recommended Operating Conditions

Min.

Max.

Unit

Supply Voltage, VDD

4.5

5.5

V

High level threshold voltage, VIH

SHUTDOWN,

PCBEN

2

V

SE/BTL , HP/LINE

4

PCBEN

1.0

Low level threshold voltage, VIL

SHUTDOWN,

V

SE/BTL , HP/LINE

3

Common mode input voltage, VICM

VDD-1.0

V

Thermal Characteristics

Symbol	Parameter	Value	Unit
RTHJA	Thermal Resistance from Junction to Ambient in Free Air
	TSSOP-P*	45	K/W

* 5 in2 printed circuit board with 2oz trace and copper pad through 9 25mil diameter vias. The thermal pad on the TSSOP_P package with solder on the printed circuit board.

Electrical Characteristics

VDD=5V, -20°C<TA<85°C (unless otherwise noted)

Symbol	Parameter					Test Condition		APA2120/1			Unit
								Min.	Typ.	Max.
VDD	Supply Voltage							4.5		5.5	V
									14	25
IDD	Supply Current	SE/BTL=0V									mA
		SE/BTL=5V							8.0	15
ISD	Supply Current in Shutdown	SE/BTL=5V							50		A
	Mode
		SHUTDOWN=0V
IIH	High input Current								900		nA
IIL	Low Input Current								900		nA
VOS	Output Differential Voltage								5		mV

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APA2120/2121

Electrical Characteristics (Cont.)

Operating Characteristics, BTL mode

VDD=5V,TA=25°C,RL=4Ω , Gain=2V/V (unless otherwise noted)

Symbol	Parameter	Test Condition				APA2120/1			Unit
						Min.	Typ.	Max.
		THD=10%, RL=3Ω , Fin=1kHz					2.7
		THD=10%, RL=4Ω , Fin=1kHz					2.3
PO	Maximum Output Power	THD=10%, RL=8Ω , Fin=1kHz					1.5		W
		THD=1%, RL=3		, Fin=1kHz			2.0
			Ω
		THD=1%, RL=4		, Fin=1kHz			1.9
			Ω
		THD=0.5%, RL=8Ω , Fin=1kHz				1	1.1
		PO=1.5W, RL=4		, Fin=1kHz			0.05
THD+N	Total Harmonic Distortion Plus		Ω						%
	Noise	PO=1W, RL=8	, Fin=1kHz				0.07
		Ω
				Ω	µ
PSRR	Power Ripple Rejection Ratio	VIN=0.1Vrms, RL=8			, CB=1 F,		60		dB
		Fin=120Hz
Xtalk	Channel Separation	CB=1 F, RL=8	, Fin=1kHz				90		dB
		µ	Ω
S/N	Signal to Noise Ratio	PO=1.1W, RL=8Ω		, A_wieght			95		dB

Operating Characteristics, SE mode

VDD=5V,TA=25°C,RL=4Ω , Gain=1V/V (unless otherwise noted)

Symbol	Parameter	Test Condition					APA2120/1			Unit
							Min.	Typ.	Max.
		THD=10%, RL=8			, Fin=1kHz			400
			Ω
		THD=10%, RL=32				, Fin=1kHz		110
PO	Maximum Output Power			Ω						mW
		THD=1%, RL=8		, Fin=1kHz				320
			Ω
			Ω					90
		THD=1%, RL=32			, Fin=1kHz
		PO=250mW, RL=8				, Fin=1kHz		0.08
THD+N	Total Harmonic Distortion Plus			Ω						%
	Noise	PO=75mW, RL=32				, Fin=1kHz		0.08
				Ω
					Ω	µ
PSRR	Power Ripple Rejection Ratio	VIN=0.1Vrms, RL=8				, CB=1 F,		48		dB
		Fin=120Hz
Xtalk	Channel Separation	CB=1 F, RL=32	Ω	, Fin=1kHz				100		dB
		µ
S/N	Signal to Noise Ratio	PO=75mW, SE, RL=32 , A_wieght						100		dB
						Ω

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Rev. A.1 - Mar., 2003

APA2120/2121

Pin Description

GND					1		24				GND						GND						1		24				GND
PCBEN					2		23				RLINEIN												2		23				RLINEIN
																HP/LINE
VOLUME					3		22				SHUTDOW N					VOLUME							3		22				SHUTDOWN
LOUT+					4		21				ROUT+												4		21				ROUT+
																LOUT+
LLINEIN					5		20				RHPIN					LLINEIN							5		20				RHPIN
LHPIN					6	APA2120	19				VDD					LHPIN							6	APA2121	19				VDD
PVDD					7	TOP View	18				PVDD					PVDD							7	TOP View	18				PVDD
RBYPASS					8		17				CLK					RBYPASS							8		17				CLK
LOUT-					9		16				ROUT-					LOUT-							9		16				ROUT-
LBYPASS					10		15				SE/BTL					LBYPASS							10		15				SE/BTL
BYPASS											PC-BEEP					BYPASS													PC-BEEP
					11		14																11		14
GND					12		13				GND						GND						12		13				GND

Thermal

Pad

APA2120/1

Bottom View

	Multiple Input Selection	PCBEEP Control Input
APA2120	SE/BTL	PCBEN
APA2121	HP/LINE	-

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Rev. A.1 - Mar., 2003

APA2120/2121

Pin Function Description

Pin

Config.

Description

Name

No

GND

1,12,

Ground connection, Connected to thermal pad.

13,24

PCBEN

2

I/P

BEEP mode control input, active H, for APA2120 only

Multi-input selection input, headphone mode when held high, line-in

HP/LINE

2

I/P

mode when held low for APA2121 only.

VOLUME

3

Input signal for internal volume gain setting.

LOUT+

4

O/P

Left channel positive output in BTL mode and SE mode.

LLINEIN

5

I/P

is held low.

Left channel line input terminal, selected when HP/LINE

is

LHPIN

6

O/P

Left channel headphone input terminal, selected when HP/LINE

held high.

PVDD

7,18

Supply voltage only for power amplifier.

RBYPASS

8

I/P

Right channel bypass voltage.

LOUT-

9

O/P

Left channel negative output in BTL mode and high impedance in

SE mode.

LBYPASS

10

I/P

Left channel bias voltage generator.

BYPASS

11

Bias voltage generator

PC_BEEP

14

I/P

PCBEP signal input

Output mode control input, high for SE output mode and low for

SE/BTL

15

I/P

BTL mode.

ROUT-

16

O/P

Right channel negative output in BTL mode and high impedance in

SE mode.

CLK

17

Clock signal generator

VDD

19

Supply voltage for internal circuit excepting power amplifier.

is

RHPIN

20

I/P

Right channel headphone input terminal, selected when HP/LINE

held high.

ROUT+

21

O/P

Right channel positive output in BTL mode and SE mode.

22

I/P

It will be into shutdown mode when pull low.

SHUTDOWN

is held

RLINEIN

23

I/P

Right channel line input terminal, selected when HP/LINE

low.

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Rev. A.1 - Mar., 2003

APA2120/2121

Control Input Table

For APA2120

SE/BTL

SHUTDOWN

PC-BEEP

Operating mode

X

L

Disable

Shutdown mode

L

H

Disable

Line input, BTL out

H

H

Disable

HP input, SE out

X

X

Enable

PCBEEP input, BTL out

For APA2121

SE/BTL

HP/LINE

SHUTDOWN

PC-BEEP

Operating mode

X

X

L

Disable

Shutdown mode

L

L

H

Disable

Line input, BTL out

L

H

H

Disable

HP input, BTL out

H

L

H

Disable

Line input, SE out

H

H

H

Disable

HP input, BTL out

X

X

X

Enable

PCBEEP input, BTL out

Copyright ANPEC Electronics Corp.	7	www.anpec.com.tw
Rev. A.1 - Mar., 2003

APA2120/2121
Typical Application Circuit
APA2120
					VDD	0Ω
					0.1µ F	100µ F
				VDD	GND	PVDD
	1µ	F	LLINEIN			LOUT+
L-LINE
			LHPIN	MUX		220µ	F
	1µ F						1kΩ
L-HP
						4Ω	Control
				Volume		LOUT-
	1µ	F					Pin	Ring
			RLINEIN	Control
R-LINE
			RHPIN	MUX		LBYPASS	SE/BTL
	1µ F		VDD			2.2µ F
R-HP						BYPASS		TipSleeve
						BYPASS
			VOLUME				Headphone Jack
	50kΩ					ROUT+
						220µ F
							1kΩ
			VDD
	100kΩ		SE/BTL			4Ω
				SE/BTL		ROUT-
						RBYPASS
	Shutdown		SHUTDOWN	Shutdown
	Signal			ckt
	BEEP	0.47µ F PCBEEP				CLK
	Signal			PC-BEEP		Clock Gen
			PCBEN			47nF
	PCBEN			ckt
	Signal

Copyright ANPEC Electronics Corp.	8	www.anpec.com.tw
Rev. A.1 - Mar., 2003

APA2120/2121

Typical Application Circuit

APA2121

					VDD		0Ω
					0.1µ	F	100µ F
				VDD	GND		PVDD
	1µ	F	LLINEIN				LOUT+
L-LINE
			LHPIN	MUX			220µ	F
	1µ F							1kΩ
L-HP
							4Ω	Control
				Volume			LOUT-
	1µ	F						Pin	Ring
			RLINEIN	Control
R-LINE
			RHPIN	MUX			LBYPASS	SE/BTL
	1µ F		VDD				2.2µ F
R-HP							BYPASS		TipSleeve
							BYPASS
			VOLUME					Headphone Jack
	50kΩ						ROUT+
							220µ F
	HP/LINE		HP/LINE					1kΩ
				HP/LINE
	Signal		VDD
	100kΩ		SE/BTL				4Ω
				SE/BTL			ROUT-
							RBYPASS
	Shutdown		SHUTDOWN	Shutdown
	Signal			ckt
	BEEP		PCBEEP	PC-BEEP			CLK
							Clock Gen
	Signal			ckt
		0.47µ F					47nF

Copyright ANPEC Electronics Corp.	9	www.anpec.com.tw
Rev. A.1 - Mar., 2003