APL5331
3A Bus Termination Regulator
Features |
General Description (Cont.) |
•Provide Bi-direction Current
-Sourcing or Sinking Current up to 3A
•1.25V/0.9V Output for DDR I/II Applications
•Fast Transient Response
•High Output Accuracy
-±20mV over Load, VOUT Offset and Temperature
•Adjustable Output Voltage by External Resistors
•Current-Limit Protection
•On-Chip Thermal Shutdown
•Shutdown for Standby or Suspend Mode
•Simple SOP-8, SOP-8-P with thermal pad, TO-252- 5 and TO-263-5 Packages
On-chip thermal shutdown provides protection against any combination of overload that would create excessive junction temperature. The output voltage of APL5331 track the voltage at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to provide a half voltage of VIN to VREF pin. In addition, an external ceramic capacitor and an opendrain transistor connected to VREF pin provides softstart and shutdown control respectively. Pulling and holding the VREF to GND shuts off the output. The output of APL5331 will be high impedance after being shut down by VREF or thermal shutdown function.
Pin Configuration
Applications
•DDR I/II SDRAM Termination
•SSTL-2/3 Termination Voltage
•Applications Requiring the Regulator with Bi-direction 3A Current Capability
General Description
The APL5331 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. The APL5331 integrates two power transistors to source or sink current up to 3A. It also incorporate current-limit, thermal shutdown and shutdown control functions into a single chip. Current-limit circuit limits the short-circuit current.
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5 |
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VOUT |
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VIN |
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VCNTL |
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VREF |
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GND |
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VCNTL |
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VCNTL |
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VREF |
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VCNTLTAB is VCNTL |
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GND |
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VOUT |
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VCNTL |
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VIN |
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SOP-8 (Top View) |
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TO-252-5 (Top View) |
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VOUT |
VIN |
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NC |
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VREF |
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GND |
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NC |
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VCNTL |
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VREF |
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TAB is VCNTL |
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VCNTL |
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GND |
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VOUT |
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NC |
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1 |
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VIN |
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SOP-8-P (Top View) |
TO-263-5 (Top View) |
NC = No internal connection
= Thermal Pad
(connected to GND plane for better heat dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp. |
1 |
www.anpec.com.tw |
Rev. A.8 - Oct., 2003 |
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APL5331
Ordering and Marking Information
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P a ckage C od e |
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A P L 53 31 |
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K : S O P -8 |
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K A : S O P -8 -P |
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U 5 : T O -252 -5 |
G 5 : T O -263 -5 |
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Lead F ree C ode |
T em p . R ang e |
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H andling C od e |
C : 0 to 7 0 oC |
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H andling C od e |
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T em p . R ang e |
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T R : T ape & R e el |
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P a ckage C od e |
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Lead F ree C ode |
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L : Lead F ree D evice B lank : O rginal D evice |
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A P L 5331K C -T R : |
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A P L5331 |
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XX XXX |
- |
D ate C od e |
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A P L5331 K A C -T R : |
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XX XXX |
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A P L5331 U 5C -T R : |
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A P L5331 |
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XX XXX |
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D ate C od e |
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A P L5331 G 5C -T R : |
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XX XXX |
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Pin Description |
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PIN NAME |
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I/O |
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DESCRIPTION |
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Main power input pin. Connect this pin to a voltage source and an input |
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VIN |
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I |
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capacitor. The APL5331 sources current to VOUT pin by controlling the upper |
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NPN pass transistor, providing a current path from VIN pin. |
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Power and signal ground. Connect this pin to system ground plane with shortest |
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GND |
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O |
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traces. The APL5331 sinks current from VOUT pin by controlling the lower NPN |
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pass transistor, providing a current path to GND pin. This pin is also the ground |
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path for internal control circuitry. |
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Power input pin for internal control circuitry. Connect this pin to a voltage source, |
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VCNTL |
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I |
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providing a bias for the internal control circuitry. A bypass capacitor is usually |
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connected near this pin. |
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Reference voltage input and active-low shutdown control pin. Apply a voltage to |
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this pin as a reference voltage for the APL5331. Connect this pin to a resistor |
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VREF |
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I |
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divider, between VIN and GND, and a capacitor for soft-start and filtering noise |
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purposes. Applying and holding this pin low by an open-drain transistor to shut |
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down the output. |
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Output pin of the regulator. Connect this pin to load. Output capacitors |
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VOUT |
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O |
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connected this pin improves stability and transient response. The output voltage |
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tracks the reference voltage and is capable of sourcing or sinking current up to |
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3A. |
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Block Diagram
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V C NTL |
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V IN |
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V o lta g e |
The rm a l |
C u rren t |
V OUT |
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V RE F |
R e gu la t io n |
L im it |
L im it |
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S h ut d ow n |
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GND |
Copyright ANPEC Electronics Corp. |
2 |
www.anpec.com.tw |
Rev. A.8 - Oct., 2003 |
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APL5331
Absolute Maximum Ratings
Symbol |
Parameter |
Rating |
Unit |
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VCNTL |
VCNTL Supply Voltage, VCNTL to GND |
-0.2 ~ 7 |
V |
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VIN |
VIN Supply Voltage, VIN to GND |
-0.2 ~ 3.9 |
V |
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PD |
Power Dissipation |
Internally Limited |
W |
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TJ |
Junction Temperature |
150 |
oC |
TSTG |
Storage Temperature |
-65 ~ 150 |
oC |
TSDR |
Soldering Temperature, 10 Seconds |
300 |
oC |
VESD |
Minimum ESD Rating (Human Body Mode) |
± 3 |
kV |
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Thermal Characteristics
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Symbol |
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Parameter |
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Rating |
Unit |
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θ JA |
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Thermal Resistance in Free Air |
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SOP-8 |
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160 |
°C/W |
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SOP-8-P |
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80 |
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TO-252-5 |
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80 |
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TO-263-5 |
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50 |
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Recommended Operating Conditions |
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Parameter |
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Range |
Unit |
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VCNTL |
VCNTL Supply Voltage |
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3.1 ~ 6V |
V |
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VIN |
VIN Supply Voltage |
1.6 ~ 3.5 |
V |
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VREF |
VREF Input Voltage |
0.8 ~ 1.75 |
V |
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IOUT |
VOUT Output Current (Note1, 2) |
-3 ~ +3 |
A |
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TJ |
Junction Temperature |
0 ~ 125 |
oC |
Note1 : The symbol “+” means the VOUT sources current to load; the symbol “-“ means the VOUT sinks current to GND.
Note2 : The max. IOUT varies with the TJ. Please refer to the typical characteristics.
Copyright ANPEC Electronics Corp. |
3 |
www.anpec.com.tw |
Rev. A.8 - Oct., 2003 |
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APL5331
Electrical Characteristics
Refer to the typical application circuit. These specifications apply over, VCNTL=3.3V, VIN=2.5V/1.8V, VREF=0.5VIN and TJ= 0 to 125°C, unless otherwise specified. Typical values refer to TJ =25°C.
Symbol |
Parameter |
Test Conditions |
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APL5331 |
Unit |
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Min |
Typ |
Max |
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Output Voltage |
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VOUT |
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VOUT Output Voltage |
IOUT=0A |
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VREF |
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V |
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System Accuracy |
Over temperature, VOUT offset, and |
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20 |
mV |
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load regulation |
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VOS |
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VOUT Offset Voltage |
IOUT=+10mA |
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-9 |
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mV |
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(VOUT–VREF) |
IOUT=-10mA |
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8 |
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Load Regulation |
IOUT=+10mA to +3A |
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-3 |
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IOUT = -10mA to -3A |
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Protection |
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Sourcing Current |
TJ=25°C |
+3.3 |
+3.6 |
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(VIN=2.5V) |
TJ=125°C |
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+3.1 |
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Sinking Current |
TJ=25°C |
-3.3 |
-3.6 |
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ILIM |
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Current Limit |
(VIN=2.5V) |
TJ=125°C |
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-3.1 |
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Sourcing Current |
TJ=25°C |
+2.9 |
+3.2 |
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(VIN=1.8V) |
TJ=125°C |
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+2.6 |
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Sinking Current |
TJ=25°C |
-2.9 |
-3.2 |
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(VIN=1.8V) |
TJ=125°C |
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-2.6 |
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TSD |
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Thermal Shutdown |
Rising TJ |
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150 |
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oC |
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Temperature |
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Thermal Shutdown Hysteresis |
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40 |
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oC |
Input Current |
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IOUT=0A |
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4.5 |
6 |
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ICNTL |
VCNTL Supply Current |
IOUT=± 3A (Normal Operation), |
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110 |
mA |
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VCNTL=5V |
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VREF=GND (Shutdown) |
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2.6 |
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IVREF |
VREF Bias Current |
VREF=1.25V/0.9V (Normal Operation) |
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150 |
500 |
nA |
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(The current flows out of VREF) |
VREF=GND (Shutdown) |
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20 |
40 |
A |
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Shutdown Control |
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Shutdown Threshold Voltage |
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0.2 |
0.35 |
0.65 |
V |
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Copyright ANPEC Electronics Corp. |
4 |
www.anpec.com.tw |
Rev. A.8 - Oct., 2003 |
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APL5331
Typical Application Circuit
1. VOUT=1.25V/0.9V Application
VCN TL
+3.3V
VIN |
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VIN |
VC N TL |
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+2.5V/1.8V |
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R 1 |
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CIN |
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1k |
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VR EF GN D VOU T |
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VREF |
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470uF |
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CCN TL |
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Shutdown |
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R2 |
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GND |
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Q1 |
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1k |
0.1uF |
47uF |
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COUT : 470µ F, ESR=25mΩ R1, R2 : 1kΩ , 1% Q1 : APM2300 AC
Note : Since R1 and R2 are very small, the voltage offset caused by the bias current of VREF can be ignore.
2. VOUT=1.4V Application
VCNT L
+5V
VIN |
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VIN |
VC N TL |
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R1 |
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CIN |
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VRE F |
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1k |
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47 F |
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GND |
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VOU T
+1.25V/0.9V
-3~+3A
COU T
470uF
GND
VO UT
+1.4V/ -3~+3A
CO UT
470 F
GND
Copyright ANPEC Electronics Corp. |
5 |
www.anpec.com.tw |
Rev. A.8 - Oct., 2003 |
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APL5331
Typical Characteristics
Sourcing Current-Limit vs Junction Temperature
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5.0 |
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VCNTL=5V,VIN=2.5V |
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(A) |
4.5 |
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VCNTL=3.3V,VIN=2.5V |
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ILIM |
4.0 |
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-Limit, |
3.5 |
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Current |
3.0 |
VCNTL=5V,VIN=1.8V |
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2.5 |
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VCNTL=3.3V,VIN=1.8V |
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2.0 |
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-50 |
-25 |
0 |
25 |
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Sinking Current-Limit vs Junction Temperature
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-2.0 |
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(A) |
-2.5 |
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VCNTL=5V,VIN=1.8V |
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VCNTL=3.3V,VIN=1.8V |
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ILIM |
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-3.0 |
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-3.5 |
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Current |
-4.0 |
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VCNTL=3.3V,VIN=2.5V |
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VCNTL=5V,VIN=2.5V |
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-4.5 |
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-5.0 |
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-50 |
-25 |
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75 |
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125 |
Junction Temperature (°C) |
Junction Temperature (°C) |
VREF Bias Current |
VREF Shutdown Threshold |
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0.40 |
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0.6 |
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VREF Bias Current, IVREF ( A) |
VREF=1.25V/0.9V |
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0.35 |
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0.30 |
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0.5 |
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VCNTL=5V |
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0.25 |
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0.4 |
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0.20 |
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0.15 |
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0.3 |
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0.10 |
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VCNTL=3.3V |
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0.05 |
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0.2 |
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ThresholdShutdownVREF(V) |
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0.00 |
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0.1 |
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-50 |
-25 |
0 |
25 |
50 |
75 |
100 |
125 |
-50 |
-25 |
0 |
25 |
50 |
75 |
100 |
125 |
Junction Temperature (°C) |
Junction Temperature (°C) |
Copyright ANPEC Electronics Corp. |
6 |
www.anpec.com.tw |
Rev. A.8 - Oct., 2003 |
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