January 1988
MM54HC242/MM74HC242
Inverting Quad TRI-STATEÉ Transceiver
MM54HC243/MM74HC243 Quad TRI-STATE Transceiver
General Description
These TRI-STATE bidirectional inverting and non-inverting buffers utilize advanced silicon-gate CMOS technology and are intended for two-way asynchronous communication between data buses. They have high drive current outputs which enable high speed operation when driving large bus capacitances. These circuits possess the low power dissipation and high noise immunity associated with CMOS circuits, but speeds comparable to low power Schottky TTL circuits. They can also drive 15 LS-TTL loads.
The MM54HC243/MM74HC243 is a non-inverting buffer and the MM54HC242/MM74HC242 is an inverting buffer. Each device has one active high enable (GBA), and one
active low enable (GAB). GBA enables the A outputs and
GAB enables the B outputs. This device does not have Schmitt trigger inputs.
All inputs are protected from damage due to static discharge by diodes to VCC and ground.
Features
YTypical propagation delay: 12 ns
YTRI-STATE outputs
YTwo way asynchronous communication
YHigh output current: 6 mA (74HC)
YWide power supply range: 2 ± 6V
YLow quiescent supply current: 80 mA (74HC)
Connection Diagrams
Dual-In-Line Package |
Dual-In-Line Package |
TL/L/5019 ± 1 |
TL/L/5019 ± 2 |
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Top View |
Top View |
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Order Number MM54HC242 or MM74HC242 |
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Order Number MM54HC243 or MM74HC243 |
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Truth Tables
'HC242
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Control Inputs |
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Data Port Status |
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GAB |
GBA |
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A |
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B |
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H |
H |
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OUTPUT |
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Input |
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L |
H |
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Isolated |
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Isolated |
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H |
L |
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Isolated |
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Isolated |
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L |
L |
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Input |
OUTPUT |
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'HC243
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Control Inputs |
Data Port Status |
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GAB |
GBA |
A |
B |
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H |
H |
OUTPUT |
Input |
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L |
H |
Isolated |
Isolated |
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H |
L |
Isolated |
Isolated |
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L |
L |
Input |
OUTPUT |
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TRI-STATEÉ is a registered trademark of National Semiconductor Corp.
C1995 National Semiconductor Corporation |
TL/L/5019 |
RRD-B30M115/Printed in U. S. A. |
TRI Quad MM54HC243/MM74HC243 |
Inverting MM54HC242/MM74HC242 |
Transceiver STATE- |
Transceiver STATE-TRI Quad |
Absolute Maximum Ratings (Notes 1 & 2)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (VCC) |
b0.5 to a7.0V |
DC Input Voltage (VIN) |
b1.5 to VCCa1.5V |
DC Output Voltage (VOUT) |
b0.5 to VCCa0.5V |
Clamp Diode Current (IIK, IOK) |
g20 mA |
DC Output Current, per pin (IOUT) |
g35 mA |
DC VCC or GND Current, per pin (ICC) |
g70 mA |
Storage Temperature Range (TSTG) |
b65§C to a150§C |
Power Dissipation (PD) |
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(Note 3) |
600 mW |
S.O. Package only |
500 mW |
Lead Temp. (TL) (Soldering 10 seconds) |
260§C |
DC Electrical Characteristics (Note 4)
Operating Conditions
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Min |
Max |
Units |
Supply Voltage (VCC) |
2 |
6 |
V |
DC Input or Output Voltage |
0 |
VCC |
V |
(VIN, VOUT) |
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Operating Temp. Range (TA) |
b40 |
a85 |
§C |
MM74HC |
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MM54HC |
b55 |
a125 |
§C |
Input Rise or Fall Times |
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(tr, tf) VCCe2.0V |
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1000 |
ns |
VCCe4.5V |
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500 |
ns |
VCCe6.0V |
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400 |
ns |
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TAe25§C |
74HC |
54HC |
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Symbol |
Parameter |
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Conditions |
VCC |
TAeb40 to 85§C |
TAeb55 to 125§C |
Units |
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Typ |
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Guaranteed Limits |
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VIH |
Minimum High Level |
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2.0V |
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1.5 |
1.5 |
1.5 |
V |
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Input Voltage |
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4.5V |
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3.15 |
3.15 |
3.15 |
V |
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6.0V |
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4.2 |
4.2 |
4.2 |
V |
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VIL |
Maximum Low Level |
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2.0V |
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0.5 |
0.5 |
0.5 |
V |
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Input Voltage** |
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4.5V |
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1.35 |
1.35 |
1.35 |
V |
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6.0V |
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1.8 |
1.8 |
1.8 |
V |
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VOH |
Minimum High Level |
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VINeVIH or VIL |
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Output Voltage |
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lIOUTls20 mA |
2.0V |
2.0 |
1.9 |
1.9 |
1.9 |
V |
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4.5V |
4.5 |
4.4 |
4.4 |
4.4 |
V |
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6.0V |
6.0 |
5.9 |
5.9 |
5.9 |
V |
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VINeVIH or VIL |
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lIOUTls6.0 mA |
4.5V |
4.2 |
3.98 |
3.84 |
3.7 |
V |
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lIOUTls7.8 mA |
6.0V |
5.7 |
5.48 |
5.34 |
5.2 |
V |
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VOL |
Maximum Low Level |
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VINeVIH or VIL |
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Output Voltage |
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lIOUTls20 mA |
2.0V |
0 |
0.1 |
0.1 |
0.1 |
V |
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4.5V |
0 |
0.1 |
0.1 |
0.1 |
V |
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6.0V |
0 |
0.1 |
0.1 |
0.1 |
V |
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VINeVIH or VIL |
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lIOUTls6.0 mA |
4.5V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
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lIOUTls7.8 mA |
6.0V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
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IIN |
Maximum Input |
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VINeVCC or GND |
6.0V |
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g0.1 |
g1.0 |
g1.0 |
mA |
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Current |
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IOZ |
Maximum TRI-STATE |
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VOUTeVCC or GND |
6.0V |
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g0.5 |
g5.0 |
g10 |
mA |
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Output Leakage Current |
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GABeVIH, GBAe VIL |
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ICC |
Maximum Quiescent |
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VINeVCC or GND |
6.0V |
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8.0 |
80 |
160 |
mA |
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Supply Current |
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IOUTe0 mA |
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Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ``N'' package: b12 mW/§C from 65§C to 85§C; ceramic ``J'' package: b12 mW/§C from 100§C to 125§C.
Note 4: For a power supply of 5V g10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCCe5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
**VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY'89.
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