March 1988
CD4001BM/CD4001BC Quad 2-Input
NOR Buffered B Series Gate
CD4011BM/CD4011BC Quad 2-Input
NAND Buffered B Series Gate
General Description
These quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-chan- nel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outputs which improve transfer characteristics by providing very high gain.
All inputs are protected against static discharge with diodes to VDD and VSS.
Features
Y Low power TTL |
Fan out of 2 driving 74L |
compatibility |
or 1 driving 74LS |
Y5V ± 10V ± 15V parametric ratings
YSymmetrical output characteristics
YMaximum input leakage 1 mA at 15V over full temperature range
Schematic Diagrams
CD4001BC/BM
(/4 of device shown
J e A a B
Logical ``1'' e High
Logical ``0'' e Low
TL/F/5939 ± 2
*All inputs protected by standard CMOS protection circuit.
TL/F/5939 ± 1
CD4011BC/BM
(/4 of device shown
J e A # B
Logical ``1'' e High
Logical ``0'' e Low
TL/F/5939 ± 6
*All inputs protected by standard CMOS protection circuit.
TL/F/5939 ± 5
Gate Series B Buffered NOR Input-2 Quad CD4001BM/CD4001BC
Gate Series B Buffered NAND Input-2 Quad CD4011BM/CD4011BC
C1995 National Semiconductor Corporation |
TL/F/5939 |
RRD-B30M105/Printed in U. S. A. |
Absolute Maximum Ratings (Notes 1 and 2) |
Operating Conditions |
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If Military/Aerospace specified devices are required, |
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Operating Range (VDD) |
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3 VDC to 15 VDC |
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please |
contact the National Semiconductor Sales |
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Operating Temperature Range |
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Office/Distributors for availability and specifications. |
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b55§C to a125§C |
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CD4001BM, CD4011BM |
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Voltage at any Pin |
b0.5V to VDD a0.5V |
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CD4001BC, CD4011BC |
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b40§C to a85§C |
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Power Dissipation (PD) |
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Dual-In-Line |
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700 mW |
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Small Outline |
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500 mW |
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VDD Range |
b0.5 VDC to a18 VDC |
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Storage Temperature (TS) |
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b65§C to a150§C |
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Lead Temperature (TL) |
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260§C |
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(Soldering, 10 seconds) |
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DC Electrical Characteristics CD4001BM, CD4011BM (Note 2) |
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Symbol |
Parameter |
Conditions |
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b55§C |
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a25§C |
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a125§C |
Units |
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Min |
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Max |
Min |
Typ |
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Max |
Min |
Max |
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IDD |
Quiescent Device |
VDD e 5V, VIN e VDD or VSS |
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0.25 |
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0.004 |
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0.25 |
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7.5 |
mA |
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Current |
VDD e 10V, VIN e VDD or VSS |
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0.50 |
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0.005 |
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0.50 |
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15 |
mA |
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VDD e 15V, VIN e VDD or VSS |
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1.0 |
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0.006 |
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1.0 |
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30 |
mA |
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VOL |
Low Level |
VDD e 5V |
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lIOl k 1 mA |
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0.05 |
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0 |
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0.05 |
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0.05 |
V |
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Output Voltage |
VDD e 10V |
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0.05 |
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0 |
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0.05 |
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0.05 |
V |
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VDD e 15V |
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0.05 |
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0 |
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0.05 |
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0.05 |
V |
VOH |
High Level |
VDD e 5V |
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lIOl k |
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4.95 |
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4.95 |
5 |
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4.95 |
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V |
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Output Voltage |
VDD e 10V |
1 mA |
9.95 |
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9.95 |
10 |
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9.95 |
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V |
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VDD e 15V |
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14.95 |
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14.95 |
15 |
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14.95 |
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V |
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VIL |
Low Level |
VDD e 5V, VO e 4.5V |
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1.5 |
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2 |
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1.5 |
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1.5 |
V |
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Input Voltage |
VDD e 10V, VO e 9.0V |
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3.0 |
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4 |
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3.0 |
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3.0 |
V |
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VDD e 15V, VO e 13.5V |
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4.0 |
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6 |
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4.0 |
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4.0 |
V |
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VIH |
High Level |
VDD e 5V, VO e 0.5V |
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3.5 |
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3.5 |
3 |
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3.5 |
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V |
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Input Voltage |
VDD e 10V, VO e 1.0V |
7.0 |
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7.0 |
6 |
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7.0 |
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V |
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VDD e 15V, VO e 1.5V |
11.0 |
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11.0 |
9 |
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11.0 |
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V |
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IOL |
Low Level Output |
VDD e 5V, VO e 0.4V |
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0.64 |
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0.51 |
0.88 |
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0.36 |
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mA |
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Current |
VDD e 10V, VO e 0.5V |
1.6 |
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1.3 |
2.25 |
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0.9 |
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mA |
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(Note 3) |
VDD e 15V, VO e 1.5V |
4.2 |
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3.4 |
8.8 |
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2.4 |
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mA |
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IOH |
High Level Output |
VDD e 5V, VO e 4.6V |
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b0.64 |
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b0.51 |
b0.88 |
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b0.36 |
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mA |
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Current |
VDD e 10V, VO e 9.5V |
b1.6 |
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b1.3 |
b2.25 |
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b0.9 |
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mA |
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(Note 3) |
VDD e 15V, VO e 13.5V |
b4.2 |
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b3.4 |
b8.8 |
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b2.4 |
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mA |
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IIN |
Input Current |
VDD e 15V, VIN e 0V |
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b0.10 |
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b10b5 |
b0.10 |
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b1.0 |
mA |
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VDD e 15V, VIN e 15V |
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0.10 |
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10b5 |
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0.10 |
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1.0 |
mA |
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Connection Diagrams |
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CD4001BC/CD4001BM |
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CD4011BC/CD4011BM |
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Dual-In-Line Package |
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Dual-In-Line Package |
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TL/F/5939 ± 4
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Top View |
TL/F/5939 ± 3 |
Order Number CD4001B or CD4011B |
Top View
2
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