January 1988
MM54HC521/MM74HC521
8-Bit Magnitude Comparator (Equality Detector)
General Description
This equality detector utilizes advanced silicon-gate CMOS technology to compare bit for bit two 8-bit words and indi-
cates whether or not they are equal. The PeQ output indicates equality when it is low. A single active low enable is provided to facilitate cascading of several packages and enable comparison of words greater than 8 bits.
This device is useful in memory block decoding applications, where memory block enable signals must be generated from computer address information.
The comparator's output can drive 10 low power Schottky equivalent loads. This comparator is functionally and pin
compatible to the 54LS688/74LS688 and the 54HC688/ 74HC688. All inputs are protected from damage due to static discharge by diodes to VCC and ground.
Features
YTypical propagation delay: 20 ns
YWide power supply range: 2 ± 6V
YLow quiescent current: 80 mA (74 Series)
YLarge output current: 4 mA (74 Series)
YIdentical to 'HC688
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/6128 ± 1
Top View
Order Number MM54HC521 or MM74HC521
Truth Table
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Inputs |
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Data |
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Enable |
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P,Q |
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G |
PeQ |
TL/F/6128 ± 2 |
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P e Q |
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L |
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L |
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P l Q |
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L |
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H |
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P k Q |
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L |
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H |
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X |
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H |
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H |
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Detector) (Equality Comparator Magnitude Bit-8 MM54HC521/MM74HC521
C1995 National Semiconductor Corporation |
TL/F/6128 |
RRD-B30M105/Printed in U. S. A. |
Absolute Maximum Ratings (Notes 1 and 2)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (VCC) |
b0.5 to a7.0V |
DC Input Voltage (VIN) |
b1.5 to VCCa1.5V |
DC Output Voltage (VOUT) |
b0.5 to VCCa0.5V |
Clamp Diode Current (IIK, IOK) |
g20 mA |
DC Output Current, per pin (IOUT) |
g25 mA |
DC VCC or GND Current, per pin (ICC) |
g50 mA |
Storage Temperature Range (TSTG) |
b65§C to a150§C |
Power Dissipation (PD) |
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(Note 3) |
600 mW |
S.O. Package only |
500 mW |
Lead Temperature (TL) |
260§C |
(Soldering 10 seconds) |
DC Electrical Characteristics (Note 4)
Operating Conditions
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Min |
Max |
Units |
Supply Voltage (VCC) |
2 |
6 |
V |
DC Input or Output Voltage |
0 |
VCC |
V |
(VIN, VOUT) |
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Operating Temp. Range (TA) |
b40 |
a85 |
§C |
MM74HC |
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MM54HC |
b55 |
a125 |
§C |
Input Rise or Fall Times |
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(tr, tf) VCCe2.0V |
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1000 |
ns |
VCCe4.5V |
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500 |
ns |
VCCe6.0V |
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400 |
ns |
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TAe25§C |
74HC |
54HC |
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Symbol |
Parameter |
Conditions |
VCC |
TAeb40 to 85§C |
TAeb55 to 125§C |
Units |
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Typ |
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Guaranteed Limits |
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VIH |
Minimum High Level |
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2.0V |
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1.5 |
1.5 |
1.5 |
V |
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Input Voltage |
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4.5V |
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3.15 |
3.15 |
3.15 |
V |
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6.0V |
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4.2 |
4.2 |
4.2 |
V |
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VIL |
Maximum Low Level |
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2.0V |
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0.5 |
0.5 |
0.5 |
V |
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Input Voltage** |
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4.5V |
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1.35 |
1.35 |
1.35 |
V |
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6.0V |
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1.8 |
1.8 |
1.8 |
V |
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VOH |
Minimum High Level |
VINeVIH or VIL |
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Output Voltage |
lIOUTls20 mA |
2.0V |
2.0 |
1.9 |
1.9 |
1.9 |
V |
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4.5V |
4.5 |
4.4 |
4.4 |
4.4 |
V |
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6.0V |
6.0 |
5.9 |
5.9 |
5.9 |
V |
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VINeVIH or VIL |
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lIOUTls4.0 mA |
4.5V |
4.2 |
3.98 |
3.84 |
3.7 |
V |
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lIOUTls5.2 mA |
6.0V |
5.7 |
5.48 |
5.34 |
5.2 |
V |
VOL |
Maximum Low Level |
VINeVIH or VIL |
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Output Voltage |
lIOUTls20 mA |
2.0V |
0 |
0.1 |
0.1 |
0.1 |
V |
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4.5V |
0 |
0.1 |
0.1 |
0.1 |
V |
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6.0V |
0 |
0.1 |
0.1 |
0.1 |
V |
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VINeVIH or VIL |
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lIOUTls4.0 mA |
4.5V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
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lIOUTls5.2 mA |
6.0V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
IIN |
Maximum Input |
VINeVCC or GND |
6.0V |
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g0.1 |
g1.0 |
g1.0 |
mA |
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Current |
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ICC |
Maximum Quiescent |
VINeVCC or GND |
6.0V |
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8.0 |
80 |
160 |
mA |
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Supply Current |
IOUTe0 mA |
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Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ``N'' package: b12 mW/§C from 65§C to 85§C; ceramic ``J'' package: b12 mW/§C from 100§C to 125§C.
Note 4: For a power supply of 5V g10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCCe5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
**VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY'89.
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