COP680C
August 1996
COP680C/COP681C/COP682C/COP880C/COP881C/
COP882C/COP980C/COP981C/COP982C Microcontrollers
General Description
The COP680C/COP681C/COP682C/COP880C/COP881C /COP882C/COP980C/COP981C and COP982C are members of the COPSTM microcontroller family. They are fully static parts, fabricated using double-metal silicon gate microCMOS technology. This low cost microcontroller is a complete microcomputer containing all system timing, interrupt logic, ROM, RAM, and I/O necessary to implement dedicated control functions in a variety of applications. Features include an 8-bit memory mapped architecture, MICROWIRE/PLUSTM serial I/O, a 16-bit timer/counter with capture register and a multi-sourced interrupt. Each I/O pin has software selectable options to adapt the device to the specific application. The part operates over a voltage range of 2.5 to 6.0V. High throughput is achieved with an efficient, regular instruction set operating at a 1 microsecond per instruction rate.
Key Features
Y16-bit multi-function timer supporting
ÐPWM mode
ÐExternal event counter mode
ÐInput capture mode
Y4 kbytes of ROM
Y128 bytes of RAM
YSchmitt trigger inputs on Port G
YMICROWIRE PLUS serial I/O
YPackages:
Ð20 DIP/SO with 16 I/O pins
Ð28 DIP/SO with 24 I/O pins
Ð40 DIP, 36 I/O pins
Ð44 PLCC, 36 I/O pins
CPU/Instruction Set Features
Y1 ms instruction cycle time
YThree multi-source interrupts servicing
ÐExternal interrupt with selectable edge
ÐTimer interrupt
ÐSoftware interrupt
YVersatile and easy to use instruction set
Y8-bit Stack Pointer (SP)Ðstack in RAM
YTwo 8-bit Register Indirect Data Memory Pointers (B and X)
Fully Static CMOS
YLow current drain (typically k 1 mA)
YSingle supply operation: 2.5V to 6.0V
YTemperature ranges: 0§C to 70§C, b40§C to a85§C, b55§C to a125§C.
I/O Features |
Development Support |
|
Y Emulation and OTP devices |
||
Y Memory mapped I/O |
Y Real time emulation and full program debug offered by |
|
Y Software selectable I/O options (TRI-STATEÉ, Push- |
||
MetaLink's development system |
||
Pull, Weak Pull-Up Input, High Impedance Input) |
||
|
||
Y High current outputs (8 pins) |
|
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
COPSTM, HPCTM, MICROWIRETM and MICROWIRE/PLUSTM are trademarks of National Semiconductor Corporation. iceMASTERTM is a trademark of MetaLink Corporation.
PC-XTÉ and PC-ATÉ are registered trademarks of International Business Machines Corporation.
C1996 National Semiconductor Corporation |
TL/DD10802 |
RRD-B30M106/Printed in U. S. A. |
http://www.national.com |
Microcontrollers |
COP680C/COP681C/COP682C/COP880C/COP881C/COP882C/COP980C/COP981C/COP982C |
Block Diagram
TL/DD/10802 ± 1
FIGURE 1
http://www.national.com |
2 |
Connection Diagrams
Dual-In-Line Package |
Dual-In-Line Package (N) |
|
and 28 Wide SO (WM) |
TL/DD/10802 ± 23
Top View
Order Number COP882C-XXX/N, COP982C-XXX/N,
COP882C-XXX/WM, COP982C-XXX/WM,
COP982C-XXX/N or COP982CH-XXX/WM
TL/DD/10802 ± 5
Top View
Order Number COP881C-XXX/N, COP981C-XXX/N,
COP881C-XXX/WM, COP981C-XXX/WM,
COP981CH-XXX/N or COP981CH-XXX/WM
Dual-In-Line Package |
Plastic Chip Carrier |
TL/DD/10802 ± 3
Top View
Order Number COP680C-XXX/V, COP880C-XXX/V,
COP980C-XXX/V or COP980CH-XXX/V
TL/DD/10802 ± 4
Top View
Order Number COP680C-XXX/N, COP880C-XXX/N,
COP980C-XXX/N or COP980CH-XXX/N
FIGURE 3. Connection Diagrams
3 |
http://www.national.com |
COP980C/COP981C/COP982C
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (VCC) |
7V |
Voltage at any Pin |
b0.3V to VCC a 0.3V |
Total Current into VCC Pin (Source) |
50 mA |
Total Current out of GND Pin (Sink) |
60 mA |
Storage Temperature Range |
b65§C to a140§C |
Note: Absolute maximum ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings.
DC Electrical Characteristics COP98xC; 0§C s TA s a70§C unless otherwise specified
|
|
Parameter |
Condition |
Min |
Typ |
Max |
Units |
|
|
|
|
|
|
|
|
Operating Voltage |
|
|
|
|
|
||
|
98XC |
|
2.3 |
|
4.0 |
V |
|
|
98XCH |
|
4.0 |
|
6.0 |
V |
|
Power Supply Ripple (Note 1) |
Peak to Peak |
|
|
0.1 VCC |
V |
||
Supply Current |
|
|
|
|
|
||
|
CKI e 10 MHz |
VCC e 6V, tc e 1 ms |
|
|
6.0 |
mA |
|
|
CKI e 4 MHz |
VCC e 6V, tc e 2.5 ms |
|
|
4.4 |
mA |
|
CKI e 4 MHz |
VCC e 4.0V, tc e 2.5 ms |
|
|
2.2 |
mA |
||
CKI e 1 MHz |
VCC e 4.0V, tc e 10 ms |
|
|
1.4 |
mA |
||
(Note 2) |
|
|
|
|
|
||
HALT Current |
VCC e 6V, CKI e 0 MHz |
|
k0.7 |
8 |
mA |
||
(Note 3) |
VCC e 4.0V, CKI e 0 MHz |
|
k0.4 |
5 |
mA |
||
Input Levels |
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||
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|
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|
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RESET, CKI |
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|
|
|
|
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Logic High |
|
0.9 VCC |
|
|
V |
|
Logic Low |
|
|
|
0.1 VCC |
V |
||
All Other Inputs |
|
|
|
|
|
||
Logic High |
|
0.7 VCC |
|
|
V |
||
Logic Low |
|
|
|
0.2 VCC |
V |
||
Hi-Z Input Leakage |
VCC e 6.0V |
b1.0 |
|
a1.0 |
mA |
||
Input Pullup Current |
VCC e 6.0V, VIN e 0V |
b40 |
|
b250 |
mA |
||
G Port Input Hysteresis |
|
|
|
0.35 VCC |
V |
||
Output Current Levels |
|
|
|
|
|
||
D Outputs |
|
|
|
|
|
||
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Source |
VCC e 4.5V, VOH e 3.8V |
b0.4 |
|
|
mA |
|
|
|
|
VCC e 2.3V, VOH e 1.6V |
b0.2 |
|
|
mA |
Sink |
VCC e 4.5V, VOL e 1.0V |
10 |
|
|
mA |
||
|
|
|
VCC e 2.3V, VOL e 0.4V |
2 |
|
|
mA |
All Others |
|
|
|
|
|
||
Source (Weak Pull-Up) |
VCC e 4.5V, VOH e 3.2V |
b10 |
|
b110 |
mA |
||
|
|
|
VCC e 2.3V, VOH e 1.6V |
b2.5 |
|
b33 |
mA |
Source (Push-Pull Mode) |
VCC e 4.5V, VOH e 3.8V |
b0.4 |
|
|
mA |
||
|
|
|
VCC e 2.3V, VOH e 1.6V |
b0.2 |
|
|
|
Sink (Push-Pull Mode) |
VCC e 4.5V, VOL e 0.4V |
1.6 |
|
|
mA |
||
|
|
|
VCC e 2.3V, VOL e 0.4V |
0.7 |
|
|
|
TRI-STATE Leakage |
VCC e 6.0V |
b1.0 |
|
a1.0 |
mA |
||
Allowable Sink/Source |
|
|
|
|
|
||
Current Per Pin |
|
|
|
|
|
||
|
D Outputs (Sink) |
|
|
|
15 |
mA |
|
|
All Others |
|
|
|
3 |
mA |
|
|
|
|
|
|
|
||
Maximum Input Current (Note 4) |
|
|
|
|
|
||
Without Latchup (Room Temp) |
Room Temp |
|
|
g100 |
mA |
||
RAM Retention Voltage, Vr |
500 ns Rise and |
|
|
|
|
||
(Note 5) |
Fall Time (Min) |
2.0 |
|
|
V |
||
|
|
|
|
|
|
||
Input Capacitance |
|
|
|
7 |
pF |
||
|
|
|
|
|
|
||
Load Capacitance on D2 |
|
|
|
1000 |
pF |
||
|
|
|
|
|
|
|
|
http://www.national.com |
4 |
COP980C/COP981C/COP982C
DC Electrical Characteristics (Continued)
Note 1: Rate of voltage change must be less than 0.5V/ms.
Note 2: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 3: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to VCC, L, C and G ports TRI-STATE and tied to ground, all outputs low and tied to ground.
Note 4: Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than VCC and the pins will have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750X (typ). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
Note 5: To maintain RAM integrity, the voltage must not be dropped or raised instantaneously.
AC Electrical Characteristics 0§C s TA s a70§C unless otherwise specified
Parameter |
Condition |
Min |
Typ |
Max |
Units |
|
|
|
|
|
|
Instruction Cycle Time (tc) |
|
|
|
|
|
Crystal/Resonator or External |
VCC t 4.0V |
1 |
|
DC |
ms |
(Div-by 10) |
2.3V s VCC s 4.0V |
2.5 |
|
DC |
ms |
R/C Oscillator Mode |
VCC t 4.0V |
3 |
|
DC |
ms |
(Div-by 10) |
2.3V s VCC s 4.0V |
7.5 |
|
DC |
ms |
CKI Clock Duty Cycle (Note 6) |
fr e Max |
40 |
|
60 |
% |
Rise Time (Note 6) |
fr e 10 MHz Ext Clock |
|
|
12 |
ns |
Fall Time (Note 6) |
fr e 10 MHz Ext Clock |
|
|
8 |
ns |
Inputs |
|
|
|
|
|
tSETUP |
VCC t 4.0V |
200 |
|
|
ns |
|
2.3V s VCC s 4.0V |
500 |
|
|
ns |
tHOLD |
VCC t 4.0V |
60 |
|
|
ns |
|
2.3V s VCC s 4.0V |
150 |
|
|
ns |
Output Propagation Delay |
CL e 100 pF, RL e 2.2 kX |
|
|
|
|
tPD1, tPD0 |
|
|
|
|
|
SO, SK |
VCC t 4.0V |
|
|
0.7 |
ms |
|
2.3V s VCC s 4.0V |
|
|
1.75 |
ms |
All Others |
VCC t 4.0V |
|
|
1 |
ms |
|
2.3V s VCC s 4.0V |
|
|
2.5 |
ms |
MICROWIRETM Setup Time (t |
|
20 |
|
|
ns |
UWS) |
|
|
|
|
|
MICROWIRE Hold Time (tUWH) |
|
56 |
|
|
ns |
MICROWIRE Output |
|
|
|
|
|
Propagation Delay (tUPD) |
|
|
|
220 |
ns |
Input Pulse Width |
|
|
|
|
|
Interrupt Input High Time |
|
tC |
|
|
|
Interrupt Input Low Time |
|
tC |
|
|
|
Timer Input High Time |
|
tC |
|
|
|
Timer Input Low Time |
|
tC |
|
|
|
Reset Pulse Width |
|
1.0 |
|
|
ms |
Note 6: Parameter characterized but not production tested.
5 |
http://www.national.com |
COP880C/COP881C/COP882C
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (VCC) |
7V |
Voltage at any Pin |
b0.3V to VCC a 0.3V |
Total Current into VCC Pin (Source) |
50 mA |
Total Current out of GND Pin (Sink) |
60 mA |
Storage Temperature Range |
b65§C to a140§C |
Note: Absolute maximum ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings.
DC Electrical Characteristics COP88xC; b40§C s TA s a85§C unless otherwise specified
|
|
Parameter |
Condition |
Min |
Typ |
Max |
Units |
|
|
|
|
|
|
|
|
Operating Voltage |
|
2.5 |
|
6.0 |
V |
||
Power Supply Ripple (Note 1) |
Peak to Peak |
|
|
0.1 VCC |
V |
||
Supply Current |
|
|
|
|
|
||
|
CKI e 10 MHz |
VCC e 6V, tc e 1 ms |
|
|
6.0 |
mA |
|
CKI e 4 MHz |
VCC e 6V, tc e 2.5 ms |
|
|
4.4 |
mA |
||
CKI e 4 MHz |
VCC e 4.0V, tc e 2.5 ms |
|
|
2.2 |
mA |
||
|
CKI e 1 MHz |
VCC e 4.0V, tc e 10 ms |
|
|
1.4 |
mA |
|
(Note 2) |
|
|
|
|
|
||
HALT Current |
VCC e 6V, CKI e 0 MHz |
|
k1 |
10 |
mA |
||
(Note 3) |
VCC e 3.5V, CKI e 0 MHz |
|
k0.5 |
6 |
mA |
||
Input Levels |
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
RESET, CKI |
|
|
|
|
|
|
|
Logic High |
|
0.9 VCC |
|
|
V |
|
Logic Low |
|
|
|
0.1 VCC |
V |
||
All Other Inputs |
|
|
|
|
|
||
|
Logic High |
|
0.7 VCC |
|
|
V |
|
Logic Low |
|
|
|
0.2 VCC |
V |
||
Hi-Z Input Leakage |
VCC e 6.0V |
b2 |
|
a2 |
mA |
||
Input Pullup Current |
VCC e 6.0V, VIN e 0V |
b40 |
|
b250 |
mA |
||
G Port Input Hysteresis |
|
|
|
0.35 VCC |
V |
||
Output Current Levels |
|
|
|
|
|
||
D Outputs |
|
|
|
|
|
||
|
Source |
VCC e 4.5V, VOH e 3.8V |
b0.4 |
|
|
mA |
|
|
|
|
VCC e 2.5V, VOH e 1.8V |
b0.2 |
|
|
mA |
Sink |
VCC e 4.5V, VOL e 1.0V |
10 |
|
|
mA |
||
|
|
|
VCC e 2.5V, VOL e 0.4V |
2 |
|
|
mA |
All Others |
|
|
|
|
|
||
Source (Weak Pull-Up) |
VCC e 4.5V, VOH e 3.2V |
b10 |
|
b110 |
mA |
||
|
|
|
VCC e 2.5V, VOH e 1.8V |
b2.5 |
|
b33 |
mA |
Source (Push-Pull Mode) |
VCC e 4.5V, VOH e 3.8V |
b0.4 |
|
|
mA |
||
|
|
|
VCC e 2.5V, VOH e 1.8V |
b0.2 |
|
|
|
Sink (Push-Pull Mode) |
VCC e 4.5V, VOL e 0.4V |
1.6 |
|
|
mA |
||
|
|
|
VCC e 2.5V, VOL e 0.4V |
0.7 |
|
|
|
TRI-STATE Leakage |
VCC e 6.0V |
b2.0 |
|
a2.0 |
mA |
||
Allowable Sink/Source |
|
|
|
|
|
||
Current Per Pin |
|
|
|
|
|
||
|
D Outputs (Sink) |
|
|
|
15 |
mA |
|
|
All Others |
|
|
|
3 |
mA |
|
|
|
|
|
|
|
||
Maximum Input Current (Note 4) |
|
|
|
|
|
||
Without Latchup (Room Temp) |
Room Temp |
|
|
g100 |
mA |
||
RAM Retention Voltage, Vr |
500 ns Rise and |
|
|
|
|
||
(Note 5) |
Fall Time (Min) |
2.0 |
|
|
V |
||
|
|
|
|
|
|
||
Input Capacitance |
|
|
|
7 |
pF |
||
|
|
|
|
|
|
||
Load Capacitance on D2 |
|
|
|
1000 |
pF |
||
|
|
|
|
|
|
|
|
http://www.national.com |
6 |
COP880C/COP881C/COP882C
DC Electrical Characteristics (Continued)
Note 1: Rate of voltage change must be less than 0.5V/ms.
Note 2: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 3: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to VCC, L, C and G ports TRI-STATE and tied to ground, all outputs low and tied to ground.
Note 4: Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than VCC and the pins will have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750X (typ). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
Note 5: To maintain RAM integrity, the voltage must not be dropped or raised instantaneously.
AC Electrical Characteristics b40§C s TA s a85§C unless otherwise specified
Parameter |
Condition |
Min |
Typ |
Max |
Units |
|
|
|
|
|
|
Instruction Cycle Time (tc) |
|
|
|
|
|
Crystal/Resonator or External |
VCC t 4.5V |
1 |
|
DC |
ms |
(Div-by 10) |
2.5V s VCC k 4.5V |
2.5 |
|
DC |
ms |
R/C Oscillator Mode |
VCC t 4.5V |
3 |
|
DC |
ms |
(Div-by 10) |
2.5V s VCC k 4.5V |
7.5 |
|
DC |
ms |
CKI Clock Duty Cycle (Note 6) |
fr e Max |
40 |
|
60 |
% |
Rise Time (Note 6) |
fr e 10 MHz Ext Clock |
|
|
12 |
ns |
Fall Time (Note 6) |
fr e 10 MHz Ext Clock |
|
|
8 |
ns |
Inputs |
|
|
|
|
|
tSETUP |
VCC t 4.5V |
200 |
|
|
ns |
|
2.5V s VCC k 4.5V |
500 |
|
|
ns |
tHOLD |
VCC t 4.5V |
60 |
|
|
ns |
|
2.5V s VCC k 4.5V |
150 |
|
|
ns |
Output Propagation Delay |
CL e 100 pF, RL e 2.2 kX |
|
|
|
|
tPD1, tPD0 |
|
|
|
|
|
SO, SK |
VCC t 4.5V |
|
|
0.7 |
ms |
|
2.5V s VCC k 4.5V |
|
|
1.75 |
ms |
All Others |
VCC t 4.5V |
|
|
1 |
ms |
|
2.5V s VCC k 4.5V |
|
|
2.5 |
ms |
MICROWIRETM Setup Time (t |
|
20 |
|
|
ns |
UWS) |
|
|
|
|
|
MICROWIRE Hold Time (tUWH) |
|
56 |
|
|
ns |
MICROWIRE Output |
|
|
|
|
|
Propagation Delay (tUPD) |
|
|
|
220 |
ns |
Input Pulse Width |
|
|
|
|
|
Interrupt Input High Time |
|
tC |
|
|
|
Interrupt Input Low Time |
|
tC |
|
|
|
Timer Input High Time |
|
tC |
|
|
|
Timer Input Low Time |
|
tC |
|
|
|
Reset Pulse Width |
|
1.0 |
|
|
ms |
Note 6: Parameter characterized but not production tested.
Timing Diagram
TL/DD/10802 ± 2
FIGURE 2. MICROWIRE/PLUS Timing
7 |
http://www.national.com |
COP680C/COP681C/COP682C
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (VCC) |
6V |
Voltage at Any Pin |
b0.3V to VCC a 0.3V |
Total Current into VCC Pin (Source) |
40 mA |
Total Current Out of GND Pin (Sink) |
48 mA |
Storage Temperature Range |
b65§C to a140§C |
Note: Absolute maximum ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings.
DC Electrical Characteristics COP68xC: b55§C s TA s a125§C unless otherwise specified
|
|
Parameter |
Condition |
Min |
Typ |
Max |
Units |
|
|
|
|
|
|
|
|
Operating Voltage |
|
4.5 |
|
5.5 |
V |
||
Power Supply Ripple (Note 1) |
Peak to Peak |
|
|
0.1 VCC |
V |
||
Supply Current (Note 2) |
|
|
|
|
|
||
|
CKI e 10 MHz |
VCC e 5.5V, tc e 1 ms |
|
|
8.0 |
mA |
|
|
CKI e 4 MHz |
VCC e 5.5V, tc e 2.5 ms |
|
|
4.4 |
mA |
|
HALT Current (Note 3) |
VCC e 5.5V, CKI e 0 MHz |
|
k10 |
30 |
mA |
||
Input Levels |
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
RESET, CKI |
|
|
|
|
|
|
|
Logic High |
|
0.9 VCC |
|
|
V |
|
|
Logic Low |
|
|
|
0.1 VCC |
V |
|
All Other Inputs |
|
|
|
|
|
||
|
Logic High |
|
0.7 VCC |
|
|
V |
|
|
Logic Low |
|
|
|
0.2 VCC |
V |
|
Hi-Z Input Leakage |
VCC e 5.5V |
b5 |
|
a5 |
mA |
||
Input Pullup Current |
VCC e 5.5V, VIN e 0V |
b35 |
|
b300 |
mA |
||
G Port Input Hysteresis |
|
|
|
0.35 VCC |
V |
||
Output Current Levels |
|
|
|
|
|
||
|
D Outputs |
|
|
|
|
|
|
|
Source |
VCC e 4.5V, VOH e 3.8V |
b0.35 |
|
|
mA |
|
|
Sink |
VCC e 4.5V, VOL e 1.0V |
9 |
|
|
mA |
|
|
All Others |
|
|
|
|
|
|
|
Source (Weak Pull-Up) |
VCC e 4.5V, VOH e 3.2V |
b9 |
|
b120 |
mA |
|
|
Source (Push-Pull Mode) |
VCC e 4.5V, VOH e 3.2V |
b0.35 |
|
|
mA |
|
|
Sink (Push-Pull Mode) |
VCC e 4.5V, VOL e 0.4V |
1.4 |
|
|
mA |
|
|
TRI-STATE Leakage |
VCC e 5.5V |
b5.0 |
|
a5.0 |
mA |
|
Allowable Sink/Source Current per Pin |
|
|
|
|
|
||
|
D Outputs (Sink) |
|
|
|
12 |
mA |
|
|
All Others |
|
|
|
2.5 |
mA |
|
|
|
|
|
|
|
||
Maximum Input Current (Room Temp) |
|
|
|
|
|
||
|
without Latchup (Note 4) |
Room Temp |
|
|
g100 |
mA |
|
RAM Retention Voltage, Vr (Note 5) |
500 ns Rise and Fall Time (Min) |
2.5 |
|
|
V |
||
|
|
|
|
|
|
||
Input Capacitance |
|
|
|
7 |
pF |
||
|
|
|
|
|
|
||
Load Capacitance on D2 |
|
|
|
1000 |
pF |
||
|
|
|
|
|
|
|
|
Note 1: Rate of voltage change must be less than 0.5V/ms.
Note 2: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 3: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to VCC, L and G ports TRI-STATE and tied to ground, all outputs low and tied to ground.
Note 4: Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than VCC and the pins will have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750X (typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
Note 5: To maintain RAM integrity, the voltage must not be dropped or raised instantaneously.
http://www.national.com |
8 |
COP680C/COP681C/COP682C
AC Electrical Characteristics b55§C s TA s a125§C unless otherwise specified
Parameter |
Condition |
Min |
Typ |
Max |
Units |
|
|
|
|
|
|
Instruction Cycle Time (tc) |
|
|
|
|
|
Ext. or Crystal/Resonant |
VCC t 4.5V |
1 |
|
DC |
ms |
(Div-by 10) |
|
|
|
|
|
|
|
|
|
|
|
CKI Clock Duty Cycle |
fr e Max |
40 |
|
60 |
% |
(Note 6) |
|
|
|
|
|
Rise Time (Note 6) |
fr e 10 MHz Ext Clock |
|
|
12 |
ns |
Fall Time (Note 6) |
fr e 10 MHz Ext Clock |
|
|
8 |
ns |
MICROWIRE Setup Time (tUWS) |
|
20 |
|
|
ns |
MICROWIRE Hold Time (tUWH) |
|
56 |
|
|
ns |
MICROWIRE Output Valid |
|
|
|
220 |
ns |
Time (tUPD) |
|
|
|
||
|
|
|
|
|
|
Input Pulse Width |
|
|
|
|
|
Interrupt Input High Time |
|
tC |
|
|
|
Interrupt Input Low Time |
|
tC |
|
|
|
Timer Input High Time |
|
tC |
|
|
|
Timer Input Low Time |
|
tC |
|
|
|
Reset Pulse Width |
|
1 |
|
|
ms |
Note 6: Parameter characterized but not production tested.
9 |
http://www.national.com |
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