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The 7534 Group is the 8-bit microcomputer based on the 740 family core technology.
The 7534 Group has a USB, 8-bit timers, and an A-D converter, and is useful for an input device for personal computer peripherals.
• Basic machine-language instructions ....................................... |
69 |
• The minimum instruction execution time .......................... |
0.34 μs |
(at 6 MHz oscillation frequency for the shortest instruction) |
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• Memory size |
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ROM ............................................... |
8K to 16K bytes |
RAM .............................................. |
256 to 384 bytes |
• Programmable I/O ports ...................................... |
28 (36-pin type) |
............................................................................ |
24 (32-pin type) |
• Interrupts............................................................................ |
33 (42-pin type) |
14 sources, 8 vectors |
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• Timers ............................................................................ |
8-bit 3 |
PIN CONFIGURATION (TOP VIEW)
P12/SCLK |
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P14/CNTR0 |
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P20/AN0 |
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M37534E8FP |
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P21/AN1 |
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P22/AN2 |
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P23/AN3 |
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P24/AN4 |
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P25/AN5 |
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P26/AN6 |
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P27/AN7 |
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11 |
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VREF |
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RESET |
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13 |
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CNVSS |
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Vcc |
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XIN |
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XOUT |
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VSS |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Serial I/O1 ................................ |
used only for Low Speed in USB |
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(based on USBSpec. Rev.1.1) |
• Serial I/O2 |
(USB/UART) |
8-bit 1 |
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• A-D converter |
(Clock-synchronized) |
10-bit 8 channels |
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• Clock generating circuit ............................................. |
Built-in type |
(connect to external ceramic resonator or quartz-crystal oscillator )
• Watchdog timer ............................................................ 16-bit 1
•Power source voltage
At 6 MHz XIN oscillation frequency at ceramic resonator
................................ 4.1 to 5.5 V(4.4 to 5.25 V at USB operation)
• Power dissipation ............................................ |
30 mW (standard) |
• Operating temperature range ................................... |
–20 to 85 °C |
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(0 to 70 °C at USB operation) |
•Built-in USB 3.3 V Regulator + transceiver based on USB Spec. Rev.1.1
Input device for personal computer peripherals
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P11/TXD/D+ |
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36 |
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P10/RXD/D- |
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P07 |
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P06 |
M37534M4 |
33 |
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P00 |
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P05 |
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P04 |
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P03 |
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P02 |
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P01 |
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XXXFP |
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USBVREFOUT |
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P37/INT0 |
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P35(LED5) |
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P34(LED4) |
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P33(LED3) |
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P32(LED2) |
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P31(LED1) |
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P30(LED0) |
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Package type: 36P2R-A
Fig. 1 Pin configuration of M37534M4-XXXFP, M37534E8FP
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PRELIMINAR |
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specification |
change |
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to |
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final |
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Notice:parametric |
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Some |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PIN CONFIGURATION (TOP VIEW)
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P06 |
P05 |
P04 |
P03 |
P02 |
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P01 |
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P00 |
USBVREFOUT |
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24 |
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P07 |
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P34(LED4) |
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16 |
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P10/RXD/D- |
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15 |
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P33(LED3) |
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P11/TXD/D+ |
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P32(LED2) |
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P12/SCLK |
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M37534M4-XXXGP |
13 |
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P31(LED1) |
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P13/SDATA |
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P14/CNTR0 |
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VSS |
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P20/AN0 |
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XOUT |
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P21/AN1 |
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XIN |
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VCC |
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P22/AN2 |
P23/AN3 |
P24/AN4 |
P25/AN5 |
VREF |
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Outline 32P6U-A
Fig. 2 Pin configuration of M37534M4-XXXGP
2
PRELIMINARY |
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. . |
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specification |
change |
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to |
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a |
final |
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subject |
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limits |
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This |
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Notice:parametric |
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Some |
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PIN CONFIGURATION (TOP VIEW)
MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
P14/CNTR0 1
P15 2
P16 3
P20/AN0 4
P21/AN1 5 NC 6 P22/AN2 7 P23/AN3 8 P24/AN4 9 P25/AN5 10 P26/AN6 11 P27/AN7 12
P40 13
P41 14
VREF 15
RESET 16
CNVSS 17
Vcc 18
XIN 19
XOUT 20
VSS 21
M37534RSS XXXSP-M37534M4 M37534E8SP
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P13/SDATA |
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42 |
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P12/SCLK |
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41 |
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P11/TXD/D+ |
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40 |
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P10/RXD/D- |
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P07 |
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P06 |
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P05 |
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P04 |
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35 |
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P03 |
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34 |
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P02 |
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33 |
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P01 |
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32 |
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P00 |
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USBVREFOUT |
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P37/INT0 |
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P36(LED6)/INT1 |
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P35(LED5) |
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26 |
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P34(LED4) |
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P33(LED3) |
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P32(LED2) |
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24 |
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P31(LED1) |
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23 |
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P30(LED0) |
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22 |
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Outline 42S1M, 42P4B
Fig. 3 Pin configuration of M37534RSS, M37534M4-XXXSP, M37534E8SP
3
PRELIMINARY |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
FUNCTIONAL BLOCK DIAGRAM (Package: 36P2R)
|
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|
(8) |
(8) |
(8) |
|
Key-onwakeup |
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Timer 1 |
Timer 2 |
Timer X |
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27 |
I/O port P0 |
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12 (8) |
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P0(8) |
32 31 30 29 28 |
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X (8) |
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34 33 |
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CNVSS |
14 |
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Prescaler |
Prescaler |
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Reset input |
RESET |
13 |
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P1(5) |
3 2 1 36 35 |
I/O port P1 |
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SI/O2(8) |
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VCC |
15 |
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SI/O1(8) USB(LS) |
USBVREFOUT |
4 |
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26 |
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P2(8) |
6 5 |
P2 |
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VSS |
18 |
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10 9 8 7 |
I/O port |
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11 |
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INT0 |
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P3(7) |
24 23 22 21 20 19 |
I/O port P3 |
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25 |
|
Clock input Clock output |
XIN XOUT |
16 17 |
Clock generating circuit |
|
Watchdog timer Reset |
A-D converter (10) |
|
12 |
VREF |
Fig. 4 Functional block diagram (36P2R package type)
4
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Y |
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PRELIMINAR |
. . |
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specification |
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final |
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are |
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limits |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
|
|
Timer1(8) |
Timer2(8) |
TimerX(8) |
|
CNVSS |
7 |
Prescaler12(8) |
PrescalerX(8) |
Resetinput |
RESET |
6 |
|
|
VCC |
8 |
32P6U-A) |
|
VSS |
11 |
|
|
FUNCTIONALBLOCKDIAGRAM(Package: |
Clockinput Clockoutput |
XXINOUT |
9 10 |
Clockgeneratingcircuit |
Watchdogtimer Reset |
Fig. 5 Functional block diagram (32P6U-A package type)
Key-onwakeup |
|
|
P0(8) |
232221201918 |
I/OportP0 |
|
2524 |
|
P1(5) |
282726 |
portP1 |
|
3029 |
I/O |
SI/O2(8)
SI/O1(8) |
USB(LS) |
USBVREFOUT
P2(6)
17 |
|
3231 |
P2 |
2 1 |
port |
4 3 |
I/O |
P3(5) |
1615141312 |
I/OportP3 |
A-D converter (10) |
5 |
VREF |
5
PRELIMINARY |
|||||||
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. . |
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specification |
change |
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to |
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a |
final |
|
subject |
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is |
not |
are |
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limits |
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This |
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Notice:parametric |
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Some |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
|
CNVSS |
17 |
Reset input |
RESET |
16 |
VCC |
18 |
VSS |
21 |
wakeup on-Key |
|
|
P0(8) |
35 34 33 32 31 |
port P0 |
|
37 36 |
I/O |
|
38 |
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|
39 |
|
P1(7) |
2 1 42 41 40 |
I/O port P1 |
|
3 |
|
SI/O2(8) |
|
|
SI/O1(8) USB(LS) |
30 |
USBVREFOUT |
|
4 |
|
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5 |
I/O port P2 |
P2(8) |
11 10 9 8 7 |
|
|
12 |
|
INT1 |
|
|
INT0 |
|
|
P3(8) |
28 27 26 25 24 23 22 |
I/O port P3 |
|
29 |
|
Clock input Clock output X IN X OUT |
19 20 |
Clock generating circuit |
Watchdog timer Reset |
A-D converter (10) |
P4(2) |
13 14 15 |
VREF |
I/O port P4 |
Fig. 6 Functional block diagram (42P4B package type)
6
PRELIMINARY |
|||||||
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. . |
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specification |
change |
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to |
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a |
final |
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subject |
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is |
not |
are |
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limits |
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This |
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Notice:parametric |
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Some |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 1 Pin description
|
Pin |
Name |
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|
|
Function |
|
|
||
|
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Function expect a port function |
|||||
|
Vcc, Vss |
Power source |
•Apply voltage of 4.1 to 5.5 V to Vcc, and 0 V to Vss. |
|
||||||
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|
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VREF |
Analog reference |
•Reference voltage input pin for A-D converter |
|
||||||
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voltage |
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|
USBVREFOUT |
USB reference |
•Output pin for pulling up a D- line with 1.5 kΩ external resistor |
|
||||||
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voltage output |
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CNVss |
CNVss |
•Chip operating mode control pin, which is always connected to Vss. |
|
||||||
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Reset input |
•Reset input pin for active “L” |
|
|||||
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RESET |
|
||||||||
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|
XIN |
Clock input |
•Input and output pins for main clock generating circuit |
|
||||||
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|
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•Connect a ceramic resonator or quartz crystal oscillator between the XIN and XOUT pins. |
||||||
|
XOUT |
Clock output |
||||||||
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•If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open. |
|||||||||
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|||||||
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P00–P07 |
I/O port P0 |
•8-bit I/O port. |
|
•Key-input (key-on wake up |
|||||
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|
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•I/O direction register allows each pin to be individually pro- |
|
interrupt input) pins |
||||
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|||||
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grammed as either input or output. |
|
|
||||
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•CMOS compatible input level |
|
|
||||
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•CMOS 3-state output structure |
|
|
||||
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|
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•Whether a built-in pull-up resistor is to be used or not can be |
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||||
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determined by program. |
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||||
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||||
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P10/RxD/D- |
I/O port P1 |
•7-bit I/O port |
|
•Serial I/O1 function pin |
|||||
|
P11/TxD/D+ |
|
•I/O direction register allows each pin to be individually pro- |
|
|
|||||
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|
|
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grammed as either input or output. |
|
|
||||
|
P12/SCLK |
|
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•Serial I/O2 function pin |
||||||
|
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•CMOS compatible input level |
|
|||||||
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P13/SDATA |
|
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||
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•CMOS 3-state output structure |
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|
||||
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P14/CNTR0 |
|
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•Timer X function pin |
||||||
|
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•CMOS/TTL level can be switched for P10, P12, P13. |
|
|||||||
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|||||
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|
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•When using the USB function, input level of ports P10 and |
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|
||||
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|
|
P11 becomes USB input level, and output level of them |
|
|
||||
|
P15, P16 |
|
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|
||||||
|
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becomes USB output level. |
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P20/AN0– |
I/O port P2 |
•8-bit I/O port having almost the same function as P0 |
|
•Input pins for A-D converter |
|||||
|
P27/AN7 |
|
•CMOS compatible input level |
|
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|||||
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|||||
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•CMOS 3-state output structure |
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||||
|
P30–P35 |
I/O port P3 |
•8-bit I/O port |
|
||||||
|
|
|
|
•I/O direction register allows each pin to be individually programmed as either input or output. |
||||||
|
|
|
|
•CMOS compatible input level (CMOS/TTL level can be switched for P36, P37). |
||||||
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|
|
•CMOS 3-state output structure |
|
|||||
|
|
|
|
•P30 to P36 can output a large current for driving LED. |
|
|||||
|
|
|
•Whether a built-in pull-up resistor is to be used or not can be |
|
|
|
||||
|
P36/INT1 |
|
|
•Interrupt input pins |
||||||
|
P37/INT0 |
|
determined by program. |
|
|
|||||
|
|
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|
|||||||
|
P40, P41 |
I/O port P4 |
•2-bit I/O port |
|
||||||
|
|
|
|
•I/O direction register allows each pin to be individually programmed as either input or output. |
||||||
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7
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|
Y |
||
PRELIMINAR |
. . |
|||||||
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specification |
change |
||
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to |
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a |
final |
|
subject |
|
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|
is |
not |
are |
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||
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||||
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limits |
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This |
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Notice:parametric |
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||
Some |
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|
|
|
|
|
MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Mitsubishi plans to expand the 7534 group as follow:
Support for Mask ROM version, One Time PROM version, and Emulator MCU .
Memory size |
|
ROM/PROM size .................................................. |
8 K to 16 K bytes |
RAM size ................................................................ |
256 to 384 bytes |
Package |
|
36P2R-A |
..................................... 0.8 mm-pitch plastic molded SOP |
32P6U-A ................................... |
0.8 mm-pitch plastic molded LQFP |
42P4B ................................................... |
42 pin plastic molded SDIP |
42SIM ...................................... |
42 pin shrink ceramic PIGGY BACK |
ROM size (Byte)
16K |
M37534E8 |
8K |
M37534M4 |
0 |
128 |
256 |
384 RAM size |
|
|
|
(Byte) |
Fig. 7 Memory expansion plan
Currently supported products are listed below.
Table 2 List of supported products
Product |
(P) ROM size (bytes) |
RAM size |
|
Package |
Remarks |
|||||
ROM size for User () |
(bytes) |
|
||||||||
M37534M4-XXXFP |
8192 |
(8062) |
256 |
|
36P2R-A |
Mask ROM version |
||||
M37534M4-XXXGP |
8192 |
(8062) |
256 |
|
32P6U-A |
Mask ROM version |
||||
|
|
|
|
|
|
|
|
|
|
|
M37534M4-XXXSP |
8192 |
(8062) |
256 |
|
|
42P4B |
Mask ROM version |
|||
|
|
|
|
|
|
|
|
|
||
M37534E8FP |
16384 |
(16254) |
384 |
|
36P2R-A |
One Time PROM version (blank) |
||||
|
|
|
|
|
|
|
|
|||
M37534E8SP |
16384 |
(16254) |
384 |
|
|
42P4B |
One Time PROM version (blank) |
|||
|
|
|
|
|
|
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|
|
|
M37534RSS |
|
|
|
|
384 |
|
|
42S1M |
Emulator MCU |
|
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|||||
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8
PRELIMINARY |
|||||||
|
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|
. . |
|
|
|
|
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|
specification |
change |
|
|
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|
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|
to |
|
|
|
|
a |
final |
|
subject |
|
|
is |
not |
are |
|
|
||
|
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|
||||
|
limits |
|
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|
|||
This |
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|||
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|
|||
|
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|
|
Notice:parametric |
|
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|
||
Some |
|
|
|
|
|
|
|
MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
FUNCTIONAL DESCRIPTION |
[CPU Mode Register] CPUM |
The 7534 Group uses the standard 740 family instruction set. Refer to the table of 740 family addressing modes and machine-language instructions or the 740 Family Software Manual for details on each instruction set.
Machine-resident 740 family instructions are as follows:
1.The FST and SLW instructions cannot be used.
2.The MUL and DIV instructions cannot be used.
3.The WIT instruction can be used.
4.The STP instruction can be used.
The CPU mode register contains the stack page selection bit. This register is allocated at address 003B16.
b7 |
b0 |
CPU mode register (CPUM: address 003B 16)
Processor mode bits
b1 |
b0 |
|
|
0 |
0 |
Single-chip mode |
|
0 |
1 |
|
|
|
|
||
1 |
0 |
|
Not available |
1 |
1 |
|
|
|
|
||
Stack page selection bit |
|||
0 |
: 0 page |
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1 |
: 1 page |
Not used (returns “0” when read) (Do not write “1” to these bits )
Main clock division ratio selection bits
b7 |
b6 |
: f(φ) = f(XIN)/2 (High-speed mode) |
0 |
0 |
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0 |
1 |
: f(φ) = f(XIN)/8 (Middle-speed mode) |
1 |
0 |
: applied from ring oscillator |
1 |
1 |
: f(φ) = f(XIN) (Double-speed mode) |
Fig. 8 Structure of CPU mode register
Switch the CPU mode register (CPUM) at the head of program after releasing Reset in the following method.
After releasing reset
Wait until establish ceramic oscillator clock.
Switch the clock division ratio selection bits (bits 6 and 7 of CPUM)
Start with a built-in ring oscillator (Note)
Switch to other mode except a ring oscillator (Select one of 1/1, 1/2, and 1/8)
Main routine
Note. After releasing reset the operation starts by starting a ring oscillator automatically.
Do not use a ring oscillator at ordinary operation.
Fig. 9 Switching method of CPU mode register
9
PRELIMINARY |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
The SFR area in the zero page contains control registers such as I/O ports and timers.
RAM
RAM is used for data storage and for a stack area of subroutine calls and interrupts.
The 256 bytes from addresses 000016 to 00FF16 are called the zero page area. The internal RAM and the special function registers (SFR) are allocated to this area.
The zero page addressing mode can be used to specify memory and register addresses in the zero page area. Access to this area with only 2 bytes is possible in the zero page addressing mode.
ROM
The first 128 bytes and the last 2 bytes of ROM are reserved for device testing and the rest is a user area for storing programs.
The interrupt vector area contains reset and interrupt vectors.
The 256 bytes from addresses FF0016 to FFFF16 are called the special page area. The special page addressing mode can be used to specify memory addresses in the special page area. Access to this area with only 2 bytes is possible in the special page addressing mode.
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000016 |
SFR area |
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Zero page |
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004016 |
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RAM |
010016 |
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RAM area |
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RAM capacity |
address |
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XXXX16 |
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(bytes) |
XXXX16 |
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256 |
013F16 |
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Reserved area |
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384 |
01BF16 |
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044016 |
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Not used |
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YYYY16 |
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Reserved ROM area |
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(128 bytes) |
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ROM |
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ZZZZ16 |
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ROM area |
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FF0016 |
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ROM capacity |
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address |
address |
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(bytes) |
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YYYY16 |
ZZZZ16 |
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FFEC16 |
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Special page |
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8192 |
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E00016 |
E08016 |
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Interrupt vector area |
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16384 |
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C00016 |
C08016 |
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FFFE16 |
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Reserved ROM area |
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FFFF16 |
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Fig. 10 Memory map diagram
10
PRELIMINARY |
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Notice:parametric |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
000016
000116
000216
000316
000416
000516
000616
000716
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
001016
001116
001216
001316
001416
001516
001616
001716
001816
001916
001A16
001B16
001C16
001D16
001E16
001F16
Port P0 (P0) |
002016 |
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Port P0 direction register (P0D) |
002116 |
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Port P1 (P1) |
002216 |
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Port P1 direction register (P1D) |
002316 |
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Port P2 (P2) |
002416 |
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Port P2 direction register (P2D) |
002516 |
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Port P3 (P3) |
002616 |
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Port P3 direction register (P3D) |
002716 |
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Port P4 (P4) |
002816 |
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Port P4 direction register (P4D) |
002916 |
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002A16 |
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002B16 |
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002C16 |
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002D16 |
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002E16 |
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002F16 |
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003016 |
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003116 |
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003216 |
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003316 |
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003416 |
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003516 |
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Pull-up control register (PULL) |
003616 |
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Port P1P3 control register (P1P3C) |
003716 |
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Transmit/Receive buffer register (TB/RB) |
003816 |
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USB status register (USBSTS)/UART status register (UARTSTS) |
003916 |
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Serial I/O1 control register (SIO1CON) |
003A16 |
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UART control register (UARTCON) |
003B16 |
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Baud rate generator (BRG) |
003C16 |
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USB data toggle synchronization register ( TRSYNC) |
003D16 |
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USB interrupt source discrimination register 1 (USBIR1) |
003E16 |
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USB interrupt source discrimination register 2 (USBIR2) |
003F16 |
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USB interrupt control register (USBICON)
USB transmit data byte number set register 0 (EP0BYTE)
USB transmit data byte number set register 1 (EP1BYTE)
USBPID control register 0 (EP0PID)
USBPID control register 1 (EP1PID)
USB address register (USBA)
USB sequence bit initialization register (INISQ1)
USB control register (USBCON)
Prescaler 12 (PRE12)
Timer 1 (T1)
Timer 2 (T2)
Timer X mode register (TM)
Prescaler X (PREX)
Timer X (TX)
Timer count source set register (TCSS)
Serial I/O2 control register (SIO2CON)
Serial I/O2 register (SIO2)
A-D control register (ADCON)
A-D conversion register (low-order) (ADL)
A-D conversion register (high-order) (ADH)
MISRG
Watchdog timer control register (WDTCON)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt control register 1 (ICON1)
Fig. 11 Memory map of special function register (SFR)
11
PRELIMINARY |
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specification |
change |
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to |
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final |
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Notice:parametric |
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Some |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
The I/O ports have direction registers which determine the input/output direction of each pin. Each bit in a direction register corresponds to one pin, and each pin can be set to be input or output.
When “1” is set to the bit corresponding to a pin, this pin becomes an output port. When “0” is set to the bit, the pin becomes an input port. When data is read from a pin set to output, not the value of the pin itself but the value of port latch is read. Pins set to input are floating, and permit reading pin values.
If a pin set to input is written to, only the port latch is written to and the pin remains floating.
By setting the pull-up control register (address 001616), ports P0 and P3 can exert pull-up control by program. However, pins set to output are disconnected from this control and cannot exert pull-up control.
By setting the port P1P3 control register (address 001716), a CMOS input level or a TTL input level can be selected for ports P10, P12,
P13, P36 and P37 by program.
Then, as for the 36-pin version, set “1” to each bit 6 of the port P3 direction register and port P3 register.
As for the 32-pin version, set “1” to respective bits 5, 6, 7 of the port P3 direction register and port P3 register.
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b0 |
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Pull-up control register |
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(PULL: address 0016 16) |
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P00 pull-up control bit |
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P01 pull-up control bit |
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P02, P03 pull-up control bit |
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P04 – P07 pull-up control bit |
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P30 – P33 pull-up control bit |
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P34 pull-up control bit |
0: Pull-up off |
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P35, P36 pull-up control bit |
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1: Pull-up on |
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P37 pull-up control bit |
Initial value: FF16 |
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Note : Pins set to output ports are disconnected from pull-up control. |
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Fig. 12 |
Structure of pull-up control register |
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b7 |
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Port P1P3 control register |
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(P1P3C: address 0017 16) |
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P37/INT0 input level selection bit |
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0 |
: CMOS level |
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1 |
: TTL level |
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P36/INT1 input level selection bit |
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0 |
: CMOS level |
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1 |
: TTL leve |
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P10,P12,P13 input level selection bit |
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0 |
: CMOS level |
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1 |
: TTL level |
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Fig. 13 |
Structure of port P1P3 control register |
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12
PRELIMINARY |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 3 I/O port function table
Pin |
Name |
Input/output |
I/O format |
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Non-port function |
Related SFRs |
Diagram No. |
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P00–P07 |
I/O port P0 |
I/O individual |
•CMOS compatible input level |
Key input interrupt |
Pull-up control register |
(1) |
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bits |
•CMOS 3-state output |
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0 |
I/O port P1 |
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•USB input/output level when |
Serial I/O1 function |
Serial I/O1 control |
(2) |
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P1 /RxD/D- |
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P11/TxD/D+ |
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selecting USB function |
input/output |
register |
(3) |
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P12/SCLK |
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•CMOS compatible input level |
Serial I/O2 function |
Serial I/O2 control |
(4) |
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P13/SDATA |
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•CMOS 3-state output |
input/output |
register |
(5) |
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P14/CNTR0 |
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(Note) |
Timer X function input/output |
Timer X mode register |
(6) |
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P15, P16 |
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(10) |
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P20/AN0– |
I/O port P2 |
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A-D conversion input |
A-D control register |
(7) |
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P27/AN7 |
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P30–P35 |
I/O port P3 |
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(8) |
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P36/INT1 |
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External interrupt input |
Interrupt edge selection |
(9) |
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P37/INT0 |
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P40, P41 |
I/O port P4 |
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(10) |
Note: Port P10, P12, P13, P36, P37 is CMOS/TTL level. |
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13
PRELIMINARY |
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Notice:parametric |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
(1) Port P0
Pull-up control |
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Direction |
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register |
Data bus |
Port latch |
To key input interrupt generating circuit
(3) Port P11
P-channel output disable bit
Serial I/O1 mode selection bit (b7)
Serial I/O1 mode selection bit (b6)
Serial I/O1 mode selection bit (b7)
Serial I/O1 mode selection bit (b6)
Transmit enable bit
Direction register
Data bus |
Port latch |
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Serial I/O1 output
D+ input
D+ output
USB output enable (internal signal)
(2) Port P10
Serial I/O1 mode selection bit (b7)
Serial I/O1 mode selection bit (b6)
Receive enable bit
Serial I/O1 mode selection bit (b7)
Serial I/O1 mode selection bit (b6)
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Direction |
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register |
Data bus |
Port latch |
Serial I/O1 input
D- input
D- output
USB output enable (internal signal)
P10,P12,P13 input level selection bit
*
- |
USB differential input |
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+ |
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(4) Port P12
SCLK pin selection bit
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Direction |
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register |
Data bus |
Port latch |
Serial I/O2 clock output
P10,P12,P13 input level selection bit
Serial I/O2 clock input
*
(5) Port P13 |
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Signals during the |
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SDATA output action |
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SDATA pin selection bit |
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Direction |
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register |
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SDATA pin |
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selection bit |
Data bus |
Port latch |
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P10,P12,P13 input |
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level selection bit |
Serial I/O2 clock output
Serial I/O2 clock input
*
*: P10, P12, P13, P36, P37 input levels are switched to the CMOS/TTL level by the port P1P3 control register. When the TTL level is selected, there is no hysteresis characteristics.
Fig. 14 Block diagram of ports (1)
14
PRELIMINARY |
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specification |
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final |
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Notice:parametric |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
(6) Port P14
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Direction |
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register |
Data bus |
Port latch |
Pulse output mode
Timer output
CNTR0 interrupt input
(7) Ports P20 – P27 |
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Direction |
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register |
Data bus |
Port latch |
A-D conversion input
Analog input pin selection bit
(8) Ports P30 – P35
Pull-up control |
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Direction |
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register |
Data bus |
Port latch |
(10) Ports P15, P16, P40, P41
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Direction |
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register |
Data bus |
Port latch |
(9) Port P36, P37
Pull-up control
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Direction |
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register |
Data bus |
Port latch |
INT interrupt input
P37/INT0 input level selection bit
*
*: P10, P12, P13, P36, P37 input levels are switched to the CMOS/TTL level by the port P1P3 control register. When the TTL level is selected, there is no hysteresis characteristics.
Fig. 15 Block diagram of ports (2)
15
PRELIMINARY |
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specification |
change |
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final |
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Notice:parametric |
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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Interrupts occur by 14 different sources : 4 external sources, 9 internal sources and 1 software source.
All interrupts except the BRK instruction interrupt have an interrupt request bit and an interrupt enable bit, and they are controlled by the interrupt disable flag. When the interrupt enable bit and the interrupt request bit are set to “1” and the interrupt disable flag is set to “0”, an interrupt is accepted.
The interrupt request bit can be cleared by program but not be set. The interrupt enable bit can be set and cleared by program.
It becomes usable by switching CNTR0 and A-D interrupt sources with bit 7 of the interrupt edge selection register, timer 2 and serial I/ O2 interrupt sources with bit 6, timer X and key-on wake-up interrupt sources with bit 5, and serial I/O transmit and INT1 interrupt sources with bit 4.
The reset and BRK instruction interrupt can never be disabled with any flag or bit. All interrupts except these are disabled when the interrupt disable flag is set.
When several interrupts occur at the same time, the interrupts are received according to priority.
Upon acceptance of an interrupt the following operations are automatically performed:
1.The processing being executed is stopped.
2.The contents of the program counter and processor status register are automatically pushed onto the stack.
3.The interrupt disable flag is set and the corresponding interrupt request bit is cleared.
4.Concurrently with the push operation, the interrupt destination address is read from the vector table into the program counter.
When the active edge of an external interrupt (INT0, INT1, CNTR0) is set, the interrupt request bit may be set.
Therefore, please take following sequence:
1.Disable the external interrupt which is selected.
2.Change the active edge in interrupt edge selection register. (in case of CNTR0: Timer X mode register)
3.Clear the set interrupt request bit to “0”.
4.Enable the external interrupt which is selected.
Table 6 Interrupt vector address and priority
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Interrupt source |
Priority |
Vector addresses (Note 1) |
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Interrupt request generating conditions |
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Remarks |
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High-order |
Low-order |
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Reset (Note 2) |
1 |
FFFD16 |
FFFC16 |
At reset input |
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Non-maskable |
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UART receive |
2 |
FFFB16 |
FFFA16 |
At completion of UART data receive |
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USB IN token |
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At detection of IN token |
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Valid in USB mode |
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UART transmit |
3 |
FFF916 |
FFF816 |
At completion of UART transmit shift or |
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Valid in UART mode |
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when transmit buffer is empty |
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USB SETUP/OUT token |
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At detection of SETUP/OUT token or |
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Valid in USB mode |
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Reset/Suspend/Resume |
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At detection of Reset/ Suspend/ Resume |
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INT1 |
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At detection of either rising or falling edge |
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External interrupt |
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of INT1 input |
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(active edge selectable) |
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INT0 |
4 |
FFF716 |
FFF616 |
At detection of either rising or falling edge |
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External interrupt |
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of INT0 input |
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(active edge selectable) |
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Timer X |
5 |
FFF516 |
FFF416 |
At timer X underflow |
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Key-on wake-up |
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At falling of conjunction of input logical |
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External interrupt (valid at falling) |
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level for port P0 (at input) |
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Timer 1 |
6 |
FFF316 |
FFF216 |
At timer 1 underflow |
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STP release timer underflow |
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Timer 2 |
7 |
FFF116 |
FFF016 |
At timer 2 underflow |
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Serial I/O2 |
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At completion of transmit/receive shift |
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CNTR0 |
8 |
FFEF16 |
FFEE16 |
At detection of either rising or falling edge |
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External interrupt (active edge |
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of CNTR0 input |
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selectable) |
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A-D conversion |
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At completion of A-D conversion |
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BRK instruction |
9 |
FFED16 |
FFEC16 |
At BRK instruction execution |
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Non-maskable software interrupt |
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Note 1: Vector addressed contain internal jump destination addresses.
2: Reset function in the same way as an interrupt with the highest priority.
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