CTK-601
100 RHYTHMS |
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200 TONES |
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REVERB |
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DEMO |
RHYTHM |
TONE |
ENVELOPE |
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REVERB |
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AMP |
PITCH |
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HALL |
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GM |
TRANSPOSE/ |
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ENVELOPE |
ENVELOPE |
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SYNTH |
STAGE |
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FREE |
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ROOM |
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SESSION |
TUNE/MIDI |
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000-048 DECAY |
00 FLAT |
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SYNTH |
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LAYER |
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MIXER |
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SPLIT |
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PITCH BEND |
MODE |
VOLUME |
INTRO |
SYNCHRO/ENDING |
MIXER |
MEMORY |
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TOUCH |
FREE |
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CURSOR |
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STEP |
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SESSION |
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RESPONSE |
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049-137 SUSTAIN 01-19 VIBRATO |
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TEMPO |
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START |
MEMORY |
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MEMORY TRACK/DRUM PAD |
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LAYER |
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FULL RANGE |
MAX |
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20-49 OTHERS |
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CHORD/1 |
2 |
3 |
4 |
5 |
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CHORD |
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POWER |
FINGERED |
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STEP |
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SPLIT |
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CASIO CHORD |
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NORMAL |
STOP |
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MIN |
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ACCOMP |
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TOUCH |
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DIGITAL REVERB SYSTEM |
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2WAY MULTI-TRACK MEMORY |
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VOLUME |
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RESPONSE |
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NORMAL/FILL-IN |
VAR/FILL-IN |
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ENTER |
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CTK-601
ELECTRONIC KEYBOARD
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CONTENTS |
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Page |
Specifications ............................................................................................................................................ |
1 |
Block Diagram ........................................................................................................................................... |
3 |
Circuit Description ..................................................................................................................................... |
4 |
Adjustment .............................................................................................................................................. |
11 |
Major Waveforms .................................................................................................................................... |
13 |
Printed Circuit Boards ............................................................................................................................. |
14 |
Schematic Diagrams ............................................................................................................................... |
15 |
Exploded View ........................................................................................................................................ |
20 |
Parts List ................................................................................................................................................. |
21 |
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SPECIFICATIONS |
GENERAL |
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Keyboard: |
61 standard-size keys, 5 octaves (with touch response on/off) |
Drum pads: |
6 |
Tones: |
200 (128 General MIDI, 32 synthesized, 8 drum, 32 user); with layer and |
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split |
Rhythm instrument tones: |
51 |
Polyphony: |
24 notes maximum (12 for certain tones) |
Digital effects: |
3 reverb types (HALL, STAGE, ROOM) |
Auto accompaniment |
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Rhythm patterns: |
100 |
Tempo: |
Variable (216 steps, = 40 to 255) |
Chords: |
3 fingering methods (CASIO CHORD, FINGERED, FULL RANGE |
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CHORD) |
Rhythm controller: |
START/STOP, INTRO, NORMA/FILL-IN, VAR/FILL-IN, SYNCHRO/END- |
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ING |
Accomp volume: |
0 to 127 (128 steps) |
Free session |
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Number of patterns |
100 (auto-accompaniment in accordance with selected chord progres- |
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sion) |
Memory function |
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Songs: |
2 |
Recording tracks: |
6 (2 through 6 are melody tracks) |
Recording methods: |
Real-time, step |
Memory capacity: |
Approximately 5,200 notes (total for two songs) |
Edit function: |
Equipped |
Demo tunes: |
2 |
Synthesizer function |
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Parameters: |
PCM set, amp envelope set, attack rate, release rate, pitch envelope set, |
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pitch, level, touch sense, pan |
Mixer function |
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Channels: |
16 |
Parameters: |
Program change number, volume, expression, pan, coarse tuning, fine |
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tuning, on/off/solo |
MIDI: |
16 multi-timbre receive, GM Level 1 standard |
Other functions |
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Pitch bend range: |
12 semitones upwards and downwards |
Transpose: |
25 steps (–12 semitones to +12 semitones) |
Tuning: |
Variable (A4 = approximately 440 Hz ± 50 cents) |
— 1 —
Terminals |
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MIDI terminals: |
IN, OUT |
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Assignable terminal: |
Standard jack (sustain, sostenuto, soft, rhythm start/stop) |
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Headphone/Output terminal: |
Stereo standard jack |
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Output Impedance: 120 Ω |
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Output Voltage: 4.5 V (RMS) MAX |
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Power supply terminal: |
9 V DC |
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Power supply |
Dual power supply system |
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Batteries: |
Six D-size batteries |
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Battery life: |
Approximately 5 hours continuous operation on manganese batteries |
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AC adaptor: |
AD-5 |
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Auto power off: |
Turns power off approximately six minutes after last key operation. En- |
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abled under battery power only, can be disabled manually. |
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Power consumption: |
9 V |
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7.7 W |
Speaker output: |
2.5 W + 2.5 W |
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Dimensions (HWD): |
93.1 × 37.3 × 12.0 cm (36 11/16 × 14 11/16 × 4 3/4 inches) |
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Weight: |
Approximately 5.0 kg (11.0 lbs) (without batteries) |
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ELECTRICAL
Current drain with 9 V DC: |
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No sound output |
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200 mA ± 20 % |
Maximum volume |
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810 mA ± 20 % |
with 12 keys from C3 to B3 pressed in Square wave tone |
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Volume: maximum, Touch response: maximum |
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Reverb: Hall |
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Phone output level (Vrms with 8 Ω load each channel): |
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100 mV ± 20 % |
with key C6 pressed in Bassoon tone |
R-ch |
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Speaker output level (Vrms with 4 Ω load each channel): |
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1000 mV ± 20 % |
with key F5 pressed in Bassoon tone |
R-ch |
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Minimum operating voltage: |
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6.3 V |
About General MIDI
General MIDI standardizes MIDI data for all sound source types, regardless of manufacturer. General MIDI specifies such factors as tone numbering, drum sounds, and available MIDI channels for all sound sources. This standard makes it possible for all MIDI equipment to reproduce the same nuances when playing General MIDI data, regardless of the manufacturer of the sound source.
This keyboard supports General MIDI, so it can be used to play commercially available pre-recorded General MIDI data and General MIDI data send to it from a personal computer.
— 2 —
BLOCK DIAGRAM
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Working Storage |
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RAM (256K-bit) |
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MIDI |
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LSI4 |
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P10, P13 |
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OUT IN |
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TC55257DFL-70L(EL) |
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P14, P17 |
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P23 |
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Reset IC |
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RESET |
MA0 |
MD0 |
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IC1 |
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~ |
~ |
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RN5VD40AA |
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MA14 |
MD7 |
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CPU |
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Sound Source ROM |
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MD0 ~ MD15 |
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LSI1 |
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(16M-bit) |
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LSI3 |
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UPD913GF-3BA |
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UPD23C16000WGX- |
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MA0 ~ MA19 |
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C51 |
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MA0, MA1 |
LRCK, SO |
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BCK, SINK |
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EA0 ~ |
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NMI |
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Effect RAM |
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EA14 |
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DSP |
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(256K-bit) |
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LSI5 |
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LSI2 |
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PA0 ~ PA5 |
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TC55257DFL- |
EIO0 ~ |
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70L(EL) |
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EIO7 |
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HG51B277FB-1 |
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PB0 ~ PB3 |
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PB4 |
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LRCK |
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SO |
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BCK |
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D/A Converter |
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LSI6 |
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UPD6379GR |
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Filter
Q107 ~ Q110
Output
APO
Speakers |
Main |
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Volume |
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Power Amplifier
IC101
TA8248K
SEG1 ~ SEG40
LCD Driver
LSI401 |
LCD |
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SED1278F0A
COM1 ~ COM16
FI0 ~ FI9
SI0 ~ SI9
Keyboard
KC0 ~ KC7
KI0 ~ KI2
PB0 ~ PB3
FI10
VDD
Power Switch @
Buttons
Assingnable Jack
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LVDD |
DVDD |
VC |
VCC |
AVDD |
VDD |
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Power Supply Circuit
Q101 ~ Q105,
D106/107, D190
— 3 —
CIRCUIT DESCRIPTION
KEY MATRIX
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KC0 |
KC1 |
KC2 |
KC3 |
KC4 |
KC5 |
KC6 |
KC7 |
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FI0 |
C2 (1) |
C#2 (1) |
D2 (1) |
D#2 (1) |
E2 |
(1) |
F2 (1) |
F#2 (1) |
G2 (1) |
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SI0 |
C2 (2) |
C#2 (2) |
D2 (2) |
D#2 (2( |
E2 |
(2) |
F2 (2) |
F#2 (2) |
G2 (2) |
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FI1 |
G#2 (1) |
A2 (1) |
A#2 (1) |
B2 (1) |
C3 |
(1) |
C#3 (1) |
D3 (1) |
D#3 (1) |
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SI1 |
G#2 (2) |
A2 (2) |
A#2 (2) |
B2 (2) |
C3 |
(2) |
C#3 (2) |
D3 (2) |
D#3 (2) |
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FI2 |
E3 (1) |
F3 (1) |
F#3 (1) |
G3 (1) |
G#3 (1) |
A3 (1) |
A#3 (1) |
B3 (1) |
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SI2 |
E3 (2) |
F3 (2) |
F#3 (2) |
G3 (2) |
G#3 (2) |
A3 (2) |
A#3 (2) |
B3 (2) |
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FI3 |
C4 (1) |
C#4 (1) |
D4 (1) |
D#4 (1) |
E4 |
(1) |
F4 (1) |
F#4 (1) |
G4 (1) |
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SI3 |
C4 (2) |
C#4 (2) |
D4 (2) |
D#4 (2) |
E4 |
(2) |
F4 (2) |
F#4 (2) |
G4 (2) |
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FI4 |
G#4 (1) |
A4 (1) |
A#4 (1) |
B4 (1) |
C5 |
(1) |
C#5 (1) |
D5 (1) |
D#5 (1) |
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SI4 |
G#4 (2) |
A4 (2) |
A#4 (2) |
B4 (2) |
C5 |
(2) |
C#5 (2) |
D5 (2) |
D#5 (2) |
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FI5 |
E5 (1) |
F5 (1) |
F#5 (1) |
G5 (1) |
G#5 (1) |
A5 (1) |
A#5 (1) |
B5 (1) |
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SI5 |
E5 (2) |
F5 (2) |
F#5 (2) |
G5 (2) |
G#5 (2) |
A5 (2) |
A#5 (2) |
B5 (2) |
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FI6 |
C6 (1) |
C#6 (1) |
D6 (1) |
D#6 (1) |
E6 |
(1) |
F6 (1) |
F#6 (1) |
G6 (1) |
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SI6 |
C6 (2) |
C6# (2) |
D6 (2) |
D#6 (2) |
E6 |
(2) |
F6 (2) |
F#6 (2) |
G6 (1) |
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FI7 |
G#6 (1) |
A6 (1) |
A#6 (1) |
B6 (1) |
C7 |
(1) |
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SI7 |
G#6 (2) |
A6 (2) |
A#6 (2) |
B6 (2) |
C7 |
(2) |
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BUTTON MATRIX
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KC0 |
KC1 |
KC2 |
KC3 |
KC4 |
KC5 |
KC6 |
KC7 |
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FI10 |
Drum Pad |
Drum Pad |
Pitch Bend |
H |
9 |
6 |
+ |
Tone |
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3 |
1 |
H |
Enter |
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KI0 |
Drum Pad |
Drum Pad |
Pitch Bend |
Start/ |
8 |
3 |
— |
Rhythm |
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4 |
2 |
G |
Stop |
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KI1 |
Drum Pad |
Step |
Tempo |
E |
7 |
2 |
0 |
Demo |
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5 |
H |
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KI2 |
Drum Pad |
Memory |
Tempo |
F |
4 |
5 |
1 |
Transpose/ |
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6 |
G |
Tune/MIDI |
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PA0 |
PA1 |
PA2 |
PA3 |
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PB0 |
Full Range |
Intro |
Touch |
Reverb |
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Chord |
Response |
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PB1 |
Fingered |
Normal/ |
Free Session |
Accomp |
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Fill-In |
Volume |
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PB2 |
Casio Chord |
Synchro/ |
Layer |
Synth |
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Ending |
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PB3 |
Normal |
Variation/ |
Split |
Mixer |
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Fill-In |
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— 4 —
Key
Note: Each key has two contacts,
the first conatct (1) and second contact (2).
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FI |
Second contact (2) |
First contact (1) |
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KC |
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SI |
NOMENCLATURE OF KEYS
C#2 D#2 |
F#2 G#2 A#2 |
C#3 D#3 |
F#3 G#3 A#3 |
C#4 D#4 |
F#4 G#4 A#4 |
C#5 D#5 |
F#5 G#5 A#5 |
C#6 D#6 |
F#6 G#6 A#6 |
C2 |
D2 |
E2 |
F2 |
G2 |
A2 |
B2 |
C3 |
D3 |
E3 |
F3 |
G3 |
A3 |
B3 |
C4 |
D4 |
E4 |
F4 |
G4 |
A4 |
B4 |
C5 |
D5 |
E5 |
F5 |
G5 |
A5 |
B5 |
C6 |
D6 |
E6 |
F6 |
G6 |
A6 |
B6 |
C7 |
POWER SUPPLY CIRCUIT
The power supply circuit generates five voltages as shown in the following table. VDD voltage is always generated. The others are controlled by APO signal from the CPU.
Name |
Voltage |
For operation of |
|
|
|
VDD |
+5 V |
CPU, Reset IC, DSP, Sound source ROM, Working storage RAM, Effect RAM |
|
|
|
DVDD |
+5 V |
LCD driver, Power jack, Sustain jack, MIDI jack |
|
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AVDD |
+5 V |
DAC, Filter |
|
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LVDD |
+5.6 V |
LCD dirver |
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VCC |
+9 V |
Power amplifier, Pilot lamp |
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|
RESET CIRCUIT
When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU. The CPU then initializes its internal circuit, and clears the working storage RAM.
When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU sends APO signal to the power supply circuit, also sends a reset signal to the DSP.
Battery set |
|
VDD |
|
VDD |
VDD |
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|
Reset signal |
DSP |
RESET |
|
PLE |
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|
LSI2 |
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CPU |
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|
Reset IC |
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HG51B277FB-1 |
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LSI1 |
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IC1 |
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UPD913GF-3BA |
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RN5VD40AA |
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APO |
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SCKO |
|
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POWER |
NMI |
To power supply circuit |
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From power switch |
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— 5 — |
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CPU (LSI1: UPD913GF-3BA)
The 16-bit CPU contains a 1k-byte RAM, three 8-bit I/O ports, two timers, a key controller and serial interfaces. The CPU detects key velocity by counting the time between first-key input signal FI and second-key SI from the keyboard. The CPU reads sound data and velocity data from the sound source ROM in accordance with the selected tone; the CPU can read rhythm data simultaneously when a rhythm pattern is selected. Then the CPU provides 16-bit serial sound data to the DSP. The CPU also controls MIDI input/output and stores sequencer data into the working storage RAM.
The following table shows the pin functions of LSI1.
Pin No. |
Terminal |
In/Out |
Function |
|
1 |
TXD0 |
Out |
MIDI signal output |
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|
|
|
|
|
2 |
RXD0 |
In |
MIDI signal input |
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|
|
|
|
|
3 |
SCK0 |
Out |
APO (Auto Power Off) signal output |
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|
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|
|
|
4, 5 |
TXD1, RXD2 |
In/Out |
Data bus for the LCD driver |
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|
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6 |
SCK1 |
Out |
1 MHZ synchronizing pulse output |
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|
|
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|
|
7 |
AVCC |
In |
DVDD (+5 V) source |
|
|
|
|
|
|
|
|
|
AC adaptor detection terminal. |
|
8 |
AN0 |
In |
+5 V when the keyboard is powered by batteries and becomes 0 V |
|
|
|
|
to cancel the APO function when AC adaptor is connected. |
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|
|
|
|
9 |
AN1 |
— |
Not used. Connected to ground. |
|
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|
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10 |
AGND |
In |
Ground (0 V) source |
|
|
|
|
|
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11 |
BCK |
Out |
Bit clock output |
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|
|
|
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12 |
SO |
Out |
Serial sound data output |
|
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|
|
|
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13 |
LRCK |
Out |
Word clock output |
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|
|
|
|
|
14 |
GND |
In |
Ground (0 V) source |
|
|
|
|
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|
15, 16 |
XLT0, XLT1 |
In/Out |
20 MHz clock input/output |
|
|
|
|
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17 |
VCC |
In |
+5 V source |
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|
|
|
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|
18, 19 |
MD0, MD1 |
In |
Mode selection terminal |
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|
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20 |
RSTB |
In |
Reset signal input |
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21 |
NMI |
In |
Power ON signal input |
|
|
|
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22 |
INT/P10 |
In/Out |
Data bus for the LCD driver |
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|
23 ~ 30 |
FI0 ~ FI3 |
In |
Terminal for key input signal |
|
SI0 ~ SI3 |
||||
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||
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31 ~ 38 |
KC0 ~ KC7 |
Out |
Terminal for key scan signal |
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39 ~ 46 |
FI4 ~ FI7 |
In |
Terminal for key input signal |
|
SI4 ~ SI7 |
||||
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47 ~ 50 |
FI8, FI9 |
— |
Not used |
|
SI8, SI9 |
||||
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||
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51 |
FI10 |
In |
Terminal for button input signal |
|
|
|
|
|
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52 |
SI10/P23 |
Out |
Chip enable signal for the LCD driver |
|
|
|
|
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|
53 ~ 55 |
KI0 ~ KI2 |
In |
Terminal for button input signal |
|
|
|
|
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56 |
MWNB |
Out |
Write enable signal for the DSP |
|
|
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|
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57 ~ 76 |
MA0 ~ MA17 |
Out |
Address bus |
|
|
|
|
|
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77 |
MCSB0 |
Out |
Chip enable signal output for the sound source ROM |
|
|
|
|
|
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78 |
MCSB1 |
Out |
Not used |
|
|
|
|
|
|
79 |
MCSB2 |
Out |
Chip enable signal output for the DSP |
|
|
|
|
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— 6 —
Pin No. |
Terminal |
In/Out |
Function |
|
|
|
|
80 |
VCC |
In |
+5 V source |
|
|
|
|
81 |
GND |
In |
Ground (0 V) source |
|
|
|
|
82 |
MRDB |
Out |
Read enable signal output for the sound source ROM |
|
|
|
|
83 ~ 98 |
MD0 ~ MD15 |
In/Out |
Data bus |
|
|
|
|
99 |
PLE |
Out |
Reset signal output for the DSP |
|
|
|
|
100 |
P17 |
In/Out |
Data bus for the LCD driver |
|
|
|
|
DIGITAL SIGNAL PROCESSOR (LSI2: HG51B227FB-1)
The DSP receives 16-bit serial sound data output from the CPU and adds the selected effect to the sound data using the effect RAM. Then the DSP provides the sound data to the DAC. The DSP also controls button input/ output.
The following table shows the pin functions of LSI2.
Pin No. |
Terminal |
In/Out |
Function |
|
|
|
|
|
|
1 ~ 3, 80 |
PB0 ~ PB3 |
In |
Button input terminals |
|
|
|
|
|
|
4 |
PB4 |
In |
ASSIGNABLE Jack input |
|
|
|
|
|
|
5 |
SO |
Out |
Serial sound data output for the DAC |
|
|
|
|
|
|
6 |
WCKO |
Out |
Word clock output for the DAC |
|
|
|
|
|
|
7 |
VDD3 |
In |
+5 V source |
|
|
|
|
|
|
8 |
TEST |
— |
Not used |
|
|
|
|
|
|
9 |
RESB |
In |
Reset signal input |
|
|
|
|
|
|
10 |
VSS2 |
In |
Ground (0 V) source |
|
|
|
|
|
|
11, 12 |
XIN, XOUT |
In/Out |
20 MHz clock input/output |
|
|
|
|
|
|
13 |
WCKI |
In |
Word clock input from the CPU |
|
|
|
|
|
|
14 |
SI |
In |
Serial sound data input from the CPU |
|
|
|
|
|
|
15 |
BCKI |
In |
Bit clock input from the CPU |
|
|
|
|
|
|
16 |
SINC |
In |
1 MHz synchronizing pulse input |
|
|
|
|
|
|
17 |
VDD2 |
In |
+5 V source |
|
|
|
|
|
|
18 ~ 25 |
IO0 ~ IO7 |
In/Out |
Data bus |
|
|
|
|
|
|
26 |
RCEB |
Out |
Chip enable signal output for the working storage RAM |
|
|
|
|
|
|
27 |
VSS3 |
In |
Ground (0 V) source |
|
|
|
|
|
|
28 |
AD1 |
In |
Address bus |
|
|
|
|
|
|
29 |
OEB |
Out |
Output enable signal for working storage RAM |
|
|
|
|
|
|
30 |
WEB |
In |
Write enable signal |
|
|
|
|
|
|
31 |
VDD3 |
In |
+5 V source |
|
|
|
|
|
|
32 |
CE2 |
In |
Chip enable signal input. High active. |
|
|
|
|
|
|
33 |
AD0 |
In |
Address bus |
|
|
|
|
|
|
34 |
CE1B |
In |
Chip enable signal input. Low active. |
|
|
|
|
|
|
35 ~ 41, 43 |
EIO0 ~ EIO7 |
In/Out |
Data bus for the effect RAM |
|
|
|
|
|
|
42 , 44, 46 ~ 48, |
EA0 ~ EA12 |
Out |
Address bus for the effect RAM |
|
51 ~ 59, 61 |
||||
|
|
|
||
|
|
|
|
|
45 |
ECEB |
Out |
Chip enable signal output for the effect RAM |
|
|
|
|
|
— 7 —
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