Apple Q41B Schematic RevB

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

PMU (POWER MANAGEMENT UNIT)

12/21/2004

SCHEM,MLB,PB17"

SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)

LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON

DUAL-CHANNEL LVDS

GPU_SS

MARVELL GIGABIT ETHERNET PHY

STUFF

3.3V / 5V SYSTEM POWER SUPPLIES

CPU CORE VOLTAGE POWER SUPPLY

INTERNAL CONNECTORS - DVD,

SYSTEM BLOCK DIAGRAM

23

MPC7450 MAXBUS INTERFACE

200PIN DDR MEMORY SODIMM CONNECTORS

22

SCHEMATIC CREF AND NETLIST REPORTS

REVISION HISTORY (1 OF 1)

42-45

41

FIREWIRE A/B CONNECTORS, PORT POWER LIMITER

SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK

5V_HD_LOGIC

INT_CLK

9

MPC7450 DATA

CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH

6

8

10

TITLE PAGE AND CONTENTS

24

28

NO_SSCG

SSCG

ATI_MEMIO_HI

BBANG

NEC_USB

EXT_TMDS INT_TMDS

21

20

19

18

17

16

15

14

13

11

7

5

4

3

1

INTREPID AGP 4X/PCI

26

29 30 31 32 33 34 35 36 37 38

2

CPU PLL AND CONFIGURATION STRAPS

INTREPID MAXBUS AND BOOT STRAPS

M11 ANALOG, POWER, GND

SIL178 DUAL TMDS TRANSMITTER

M11 LVDS/TMDS/VGA/GPIO & GPU VCORE

M11 AGP & CLOCKS

INTREPID POWER RAILS

INTREPID DECOUPLING

CARDBUS CONTROLLER (PCI1510)

SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF

FIREWIRE A/B PHY

1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES

40

SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS

FUNCTIONAL TEST POINTS

39

INTREPID ENET/FW/UATA/EIDE INTERFACES

D3_HOT D3_COLD

USB 2.0

27

POWER BLOCK DIAGRAM

VCORE_OFFSET

ATI_MEMIO_LO

1_8V_MAXBUS

3V_HD_LOGIC

MMM

GPU_SWITCH

DDR MEMORY MUXES

12

MMM, BATTERY CURRENT SENSE

PCB NOTES AND HOLES

PAGEPAGE CONTENTSCONTENTS

NO STUFF

BOM OPTIONS

25

FAN CONTROLLER, MODEM, SOUND

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO

12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY

BATTERY CHARGER AND CONNECTOR

NO_BBANG

INTREPID_USB

SERIAL_DEBUG

1_5V_MAXBUS

EXT_CLK

INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG

INTREPID MEMORY INTERFACE / BOOT ROM

051-6694

1

SCH1

SCHEM,MLB,PB17

820-1688 PCB1

1

PCBF,MLB,PB17

SCHEM,MLB,PB17"

?

B

451

051-6694

B

PRODUCTION RELEASED

357142

12/21/04

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SYSTEM BLOCK DIAGRAM

J16

P.22

LVDS

(INTERNAL MEM)

COMPOSITE

S-VIDEO

EDID (I2C)

U43

66MHZ

32BITS

AGP BUS

1.5V/3.3V

P.28

EIDE

P.14

UATA 100

ULTRA ATA/100

J17

J7

Connector

LCD Panel S-Video

Connector

DVI-I

Connector

Inverter

Connector

J20/J23

U11/U12/U13/U14

P.14

USB PORT A

P.15

USB PORT B

P.15

USB PORT C

P.15

USB PORT D

P.15

USB PORT E

P.15

USB PORT F

P.15

MAXBUS

P.9

U42

PMU

64BIT DATA

32BIT ADDRESS

167MHZ

1.8V

MAXBUS

I2C

INTRPEID

J9

J3 (SHARE WITH LEFT USB)

J12

J3 (SHARE WITH BLUETOOTH)

ETHERNET

125MHZ

8BIT RX

8BIT TX

10/100/1000

3.3V

G/MII

4 DATA PAIRS

2 DATA PAIRS @ 200MHz

100MHZ

8BIT TX/RX

3.3V

J13

Connector

P.14

CARDSLOT

P.14

FIREWIRE

P.14

800 MB/S

10/100/1000

NOT USED

LMU

P.26

I2C

I2S I2C

P.26

U52

P.27

CONTROLLER

USB 2.0

LIGHT SENSOR

KB LED

Keyboard

ConnectorConnector

TRACKPAD

J15

5V

SERIAL

U39

3.3V

SMBUS

J19

Connector

SUTRO (PWR)

U26

3.3V/5V

16/32 BITS

33MHZ

3.3V

33MHZ

32BITS

PCI BUS

TI PCI1510

CardBus

Controller

U48/J2/J4

(DDC TOO)

RGB

TMDS

2 DATA PAIRS @ 400MHZ

P.15

P.14

(INTERNAL MEM)(INTERNAL MEM)

(INTERNAL MEM)

NOT USED

USB 2.0

P.26

J8

USB 2.0

MEMORY CH. A

MEMORY

CH. C

MEMORY CH. D

MEMORY CH. B

P.15

SCCA

P.15

I2S I2C

Serial Debug

Connector

J5

U17

BOOT ROM

1M X 8

Fan

Circuit

Connector

TUBA (SOUND)

J14

Connector

OPTICAL DRIVE

J11

FireWire

PHY

U28

Connector

FW - B

J22

Connector

FW - A

J24

Connector

Ethernet

J18

U49

Ethernet

PHY

P.28

P.30

P.29

P.30

1394 OHCI

P.25

EIDE

P.32

Connector

Battery

J25

LED

SLEEP

Power Supply

& Charger

P.32-36

LMU

U36

PMU

P.31

P.24

I2C

P.32

CARDBUS

Connector

P.18

J10

P.24

P.10

P.18

Connector

AIRPOPT

J21

ATI M11

64MB

P.18-21

P.22

P.22 P.22

4X AGP

P.13

33MHZ

32BITS

PCI

P.14

BOOTROM

P.15

VIA/PMU

MEMORY BUS

2.5V

167MHZ 64BITS

2:1 DDR MUXES

P.10

DDR MEMORY

P.11

DDR SDRAM DIMM 0

DDR SDRAM DIMM 1

SO-DIMM Connector

P.12

P.7

Config

CPU PLL

APOLLO

CPU

(MPC7457)

P.5-6

P.26

Connector

Modem Board

P.25

BlueTooth

P.33

BACKUP BATTERY

RIGHT USB

P.25

LEFT USB

U44

P.25

INTREPID

UIDE

P.25

051-6694

2

B

45

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BACKLIGHT

TURNS ON OUTPUT @ 2.4V

DCDC_EN_L WILL PULL ON1/ON2

BECOMES ’1’; MUCH LESS THAN THE

SLEEP

D3_HOT

1_5V_2_5V_OK

D3_COLD

AC

ADAPTER

IN

PG 31

+BATT

MAIN 3V/5V

DC/DC

RC AT 1M*0.1UF @ 24V

NO INRUSH PROTECTION

+PBUS

PG 31

FEED-IN PATH

BATTERY VOLTAGE

3S 3P PRISMATIC CELLS

+BATT

PG 31

(MAX1772)

CHARGER

BATTERY

PG 32

& BOOST OUTPUT

BATTERY

BACKUP

+PBUS

SEQUENCING

MAXBUS

DCDC_EN

EXT_VCC

+1.2V/+1.0V

GPU_VCORE

RUN: RUNNING

SLEEP: STOPPED

SHUTDOWN: STOPPED

VCC

SHDN

DC/DC

(MAX1717)

PG 34

CPU_VCORE

(+1.4V/+1.5V)

SHUT-DOWNRUN

RUN

SHUT-DOWN

+1_8V_MAIN

(D3COLD)

GPU_VCORE

(D3HOT)

GPU_VCORE

(AT LTC1778 RUN/SS)

1_5V_2_5V_OK

(MAX1715 OUTPUT)

+1_5V_SLEEP

+1_5V_MAIN

+2_5V_SLEEP

+2_5V_MAIN

3V_5V_OK

+3V_SLEEP

+3V_MAIN

+5V_SLEEP

+5V_MAIN

DCDC_EN_L

DCDC_EN

SLEEP_L_LS5

SLEEP

+3.3V_MAIN

RUN/SS - 3V

INTERNAL ZENER CLAMP TO 6V

RUN: RUNNING

SLEEP: RUNNING

SHUTDOWN: STOPPED

VCC

RUN/SS - 5V

TURNS ON AT >1V <100UA ALLOWED

INTERNAL ZENER CLAMP TO 6V

PG 33

STBYMD

+4_6V_BU

+3V_PMU

+5V_MAIN

14V_PBUS

PG 30

LIMITER

RUN: RUNNING

SLEEP: RUNNING

SHUTDOWN: RUNNING

1625 NOT RUNNING

AC: 12.8V

PG 32

(LTC1625)

REGULATOR

BACKUP BATTERY

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

+PBUS (12.8V)

PG 31

AFTER PMU IS UP AND RUNNING

RC CHARGING AT INT_VCC (5V)

2.4V - ??? MS

DCDC_EN_L D3_HOT

1_5V_2_5V_OK WILL NOT PULL LOW UNTIL +5V_MAIN TURNS ON

DCDC_EN_L OR PMU_POWERUP_L

+5V_MAIN

(UNTIL DRAINED)

-

24V IS OUTPUT ONLY FROM

VCC

+5V_MAIN

LOW IN SHUTDOWN

DCDC_EN_L

TURNS ON AT >1V

<100UA ALLOWED

~13.5MS

2.6 MS

~11MS

~???MS

2.6 MS

1.9 MS

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

+

U21

+PBUS

12.8V CHARGES BACKUP BATTERY

WHEN ONLY BATTERY IS CONNECTED

PGOOD

RC AT 1M*0.047UF @ 24V

PGOOD

+5V_MAIN

VCC

+24V_PBUS

PG 32

LDO

+3V_PMU

INRUSH

1V20_REF

>~13.44V TURNS-ON <~13.44V SHUTS-OFF

INVERTER

MAIN 2.5V/1.5V

DC/DC

(MAX1715)

PG 35

SHUTDOWN: STOPPED

SLEEP: RUNNING

RUN: RUNNING

ON1/ON2

+1.5V_MAIN

1_5V_2_5V_OK

+2.5V_MAIN

DDR POWER

MAP31 DDR CORE

INTREPID CORE AGP I/O

+5V_MAIN

RUN/SS

INTERNAL 1.2UA CURRENT SOURCE

TURNS ON AS LOW AS 0.8V/TYP 1.5V

RUN: RUNNING

SLEEP: D3HOT/D3COLD

SHUTDOWN: STOPPED

PG 20

(LTC1778)

DC/DC

VCC

+PBUS (12.8V)

SLEEP

SHUTDOWN: STOPPED

SLEEP: STOPPED

RUN: RUNNING

PG 35

(LTC3411)

DC/DC

+1.8V_MAIN

MAXBUS BROADCOM

+24V_PBUS

WHEN ONLY BATTERY IS CONNECTED

NO INRUSH PROTECTION

STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

SLEEP

~5.88MS TO START SWITCHER

1M & 0.1UF @14V, IT TAKES

SEQUENCING

GPU_VCORE

DCDC_EN

WHEN IT’S OPEN

WHEN IT’S CONNECTED TO GND

HOLDS BOTH RUN/SS AT GND

3V_5V_OK

+5V_MAIN

TURNS CONTROL TO RUN/SS

POWER BLOCK DIAGRAM

BUCK

NO AC: BATTERY VOLTAGE

RUN/SS

POWER SYSTEM ARCHITECTURE

MAP31 DDR I/O

(LTC3707)

CHARGER INPUT

3

B

45

051-6694

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BOARD INFORMATION

PCB SPECS

THICKNESS : 1.2 MM / 0.047 IN

1/2 OZ CU THICKNESS: 0.7 MILS

1.0 OZ CU THICKNESS: 1.4 MILS

IMPEDANCE : 50 OHMS +/- 10% DIELECTRIC: FR-4

PREPREG (3MIL) LAMINATE (4MIL)

PREPREG (2MIL) LAMINATE (3MIL)

PREPREG (2MIL) LAMINATE (4MIL)

PREPREG (3MIL) LAMINATE (4MIL)

PREPREG (3MIL)

SIGNAL (1/3 OZ + COPPER PLATING)

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

CUT POWER PLANE(1 OZ)

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

SIGNAL (1/3 OZ + COPPER PLATING)

BOARD STACK-UP AND CONSTRUCTION

SEE PCB CAD FILES FOR MORE SPECIFIC INFO.

PREPREG THICKNESS: 2-3 MILS

SIGNAL TRACE SPACING: 4 MILS

SIGNAL TRACE WIDTH: 4 MILS

LAYER COUNT: 12

20R10 TH VIA OR VIA IN PAD

12

11

9

10

8

7

6

5

4

3

2

1

GROUND VIAS

CONDUCTIVE MOUNTS

ASICS HEATSINK MOUNTS

I/O AREA INVERTER

CHASSIS MOUNTS

BOARD HOLES

SPEAKER CLIPS

ZT11

1

255R158

OMIT

ZT75

1

HOLE-VIA-20R10

ZT61

1

HOLE-VIA-20R10

ZT63

1

HOLE-VIA-20R10

ZT51

1

HOLE-VIA-20R10

ZT54

1

HOLE-VIA-20R10

ZT42

1

HOLE-VIA-20R10

ZT64

1

HOLE-VIA-20R10

ZT76

1

HOLE-VIA-20R10

ZT59

1

HOLE-VIA-20R10

ZT62

1

HOLE-VIA-20R10

ZT22

1

HOLE-VIA-20R10

ZT3

1

HOLE-VIA-20R10

ZT25

1

HOLE-VIA-20R10

ZT32

1

HOLE-VIA-20R10

ZT31

1

HOLE-VIA-20R10

ZT26

1

HOLE-VIA-20R10

ZT23

1

HOLE-VIA-20R10

ZT19

1

HOLE-VIA-20R10

ZT15

1

HOLE-VIA-20R10

ZT17

1

HOLE-VIA-20R10

ZT13

1

HOLE-VIA-20R10

ZT12

1

HOLE-VIA-20R10

ZT21

1

HOLE-VIA-20R10

ZT14

1

HOLE-VIA-20R10

ZT18

1

HOLE-VIA-20R10

ZT20

1

HOLE-VIA-20R10

ZT4

1

235R126

OMIT

ZT83

1

146R126

OMIT

ZT5

1

146R126

OMIT

SH1

1

2

3

SHLD-SM

OG-503040

CHGND1

SP6

1

SPKR_CLIP_P84

SP1

1

SPKR_CLIP_P84

SP3

1

SPKR_CLIP_P84

SP5

1

SPKR_CLIP_P84

SP2

1

SPKR_CLIP_P84

BS1

1

STDOFF-217ODX150IDX35H-TH

SP4

1

SPKR_CLIP_P84

ZT6

1

235R126

OMIT

ZT16

1

235R126

OMIT

CHGND6

CHGND2

ZT10

1

255R158

OMIT

CHGND5

ZT77

1

HOLE-VIA-20R10

ZT30

1

HOLE-VIA-20R10

ZT28

1

HOLE-VIA-20R10

ZT37

1

HOLE-VIA-20R10

ZT39

1

HOLE-VIA-20R10

ZT40

1

HOLE-VIA-20R10

ZT27

1

HOLE-VIA-20R10

ZT36

1

HOLE-VIA-20R10

ZT38

1

HOLE-VIA-20R10

ZT2

1

255R158

OMIT

ZT24

1

HOLE-VIA-20R10

ZT81

1

HOLE-VIA-20R10

ZT34

1

HOLE-VIA-20R10

ZT33

1

HOLE-VIA-20R10

ZT43

1

HOLE-VIA-20R10

ZT46

1

HOLE-VIA-20R10

ZT50

1

HOLE-VIA-20R10

ZT35

1

HOLE-VIA-20R10

ZT44

1

HOLE-VIA-20R10

ZT66

1

HOLE-VIA-20R10

ZT67

1

HOLE-VIA-20R10

ZT53

1

HOLE-VIA-20R10

ZT52

1

HOLE-VIA-20R10

ZT70

1

HOLE-VIA-20R10

ZT71

1

HOLE-VIA-20R10

ZT78

1

HOLE-VIA-20R10

ZT69

1

HOLE-VIA-20R10

ZT65

1

HOLE-VIA-20R10

ZT45

1

HOLE-VIA-20R10

ZT47

1

HOLE-VIA-20R10

ZT49

1

HOLE-VIA-20R10

ZT56

1

HOLE-VIA-20R10

ZT48

1

HOLE-VIA-20R10

ZT72

1

HOLE-VIA-20R10

ZT55

1

HOLE-VIA-20R10

ZT29

1

HOLE-VIA-20R10

ZT82

1

HOLE-VIA-20R10

ZT74

1

HOLE-VIA-20R10

ZT79

1

HOLE-VIA-20R10

ZT68

1

HOLE-VIA-20R10

ZT60

1

HOLE-VIA-20R10

ZT58

1

HOLE-VIA-20R10

ZT41

1

HOLE-VIA-20R10

ZT7

1

HOLE-VIA-20R10

ZT9

1

HOLE-VIA-20R10

ZT8

1

HOLE-VIA-20R10

ZT1

1

HOLE-VIA-20R10

ZT57

1

HOLE-VIA-20R10

ZT80

1

HOLE-VIA-20R10

ZT73

1

HOLE-VIA-20R10

45

4

051-6694

B

QACK*

TEA*

A10

MCP*

A23

A28 A29

TRST*

PMON_OUT*

A7

SHD1* HIT*

SHD0*

ARTRY*

AACK*

CI*

WT*

GBL*

TBST*

TS*

BG*

BR*

GND

VDD

A1 A2

A11

A5

A4

A3

A6

A8 A9

A12

A22

A21

A20

A19

A18

A17

A16

A15

A14

A13

A32

A31

A30

A27

A24 A25

AP1

AP4

AP2 AP3

AP0

A35

A34

A33

TT0

TT4

TSIZ1 TSIZ2

TSIZ0

TT1 TT2 TT3

DTI3

DTI2

TDI TDO TMS TCK

A26

BMODE0*

PMON_IN*

BMODE1*

DTI1

A0

DTI0

LSSD_MODE*

TA*

L2_TSTCLK

L1_TSTCLK

EXT_QUAL

CHKS*

DX*

SRW0*

IARTRY0*

SRW1*

(1 OF 3)

HRESET*

SRESET*

TBEN

QREQ*

CKSTP_IN*

CKSTP_OUT*

SYSCLK

INT* SMI*

PLL_CFG1

CLK_OUT

OVDD

PLL_CFG0

PLL_CFG3

DRDY*

DBG*

PLL_CFG2

PLL_CFG4

BVSEL

AVDD

OVDDSENSE

PG EN

VIN

ADJ

VOUT

GND

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

CPU_VCORE DECOUPLING NETWORK

CPU_OVDD DECOUPLING NETWORK

MPC7447 MAXBUS

R2

PLCAE SHORT CLOSE TO CENTER OF CPU

POWER SUPPLY PAGE (PG 33)

MORE 0805 10UF CAPS ON VCORE

NC

NC NC

PLACE BELOW CPU IN FORMER L3 AREA

MPC7447 PULL-UPS

R1

VOUT = 0.59*(1+R1/R2) PLACE RXXX AND RXXX CLOSE TO UXX PIN 5 AND 6

470OHM FOR BOOT BANGER

R87

1 2

10K

5%

1/16W

MF

402

R139

1 2

10K

5%

1/16W

MF

402

R107

1 2

10K

5%

1/16W

MF

402

R59

1 2

470

5%

1/16W

MF

402

R97

1 2

10K

5%

1/16W

MF

402

R160

1 2

10K

5%

1/16W

MF

402

R57

1 2

1K

5%

1/16W

MF

402

R58

1 2

10K

5%

1/16W

MF

402

R129

1 2

10K

5%

1/16W

MF

402

C39

1

2

10V

0.1uF

20% CERM

402

C203

1

2

0.1uF

CERM

402

10V

20%

C73

1

2

10V 402

20%

0.1uF

CERM

C74

1

2

402

CERM

10V

20%

0.1uF

C194

1

2

0.1uF

20% CERM

402

10V

C40

1

2

CERM

10V

20%

0.1uF

402

C191

1

2

402

CERM

10V

20%

0.1uF

C152

1

2

402

CERM

10V

20%

0.1uF

C138

1

2

0.1uF

20% 10V CERM 402

C113

1

2

0.1uF

20% 10V CERM 402

C104

1

2

0.1uF

20% 10V CERM 402

C115

1

2

402

CERM

10V

20%

0.1uF

C38

1

2

0.1uF

20% 10V CERM 402

C224

1

2

CERM

0.1uF

20% 10V

402

C48

1

2

CERM 402

10V

20%

0.1uF

C90

1

2

10V CERM 402

20%

0.1uF

C72

1

2

0.1uF

20% CERM

402

10V

C107

1

2

402

CERM

10V

20%

0.1uF

R206

1

2

1/16W

5% MF

402

470

C114

1

2

402

CERM

10V

20%

0.1uF

C154

1

2

0.1uF

20% 10V CERM 402

C91

1

2

0.1uF

20%

10V CERM 402

C168

1

2

402

CERM

10V

20%

0.1uF

C223

1

2

402

CERM

10V

20%

0.1uF

C112

1

2

0.1uF

20% 10V CERM 402

R241

1

2

470

5%

1/16W

MF

402

R60

1 2

10K

5%

1/16W

MF

402

R61

1 2

470

5%

1/16W

MF

402

R148

1 2

10K

5%

1/16W

402

MF

R98

1 2

1K

5%

1/16W

MF

402

C25

10uF

20%

6.3V CERM 805

C346

1

2

10uF

20%

6.3V CERM 805

C342

805

CERM

6.3V

20%

10uF

C8

1

2

805

CERM

6.3V

20%

10uF

R120

1 2

10K

5%

1/16W

MF

402

R109

1 2

10K

5%

1/16W

MF

402

R106

1 2

402

NO STUFF

10

MF

1/16W

1%

C340

1

2

805

10V

20%

2.2uF

CERM

C12

1

2

2.2uF

20% 10V CERM 805

R73

1 2

10K

5%

1/16W

MF

402

R72

1 2

10K

5%

1/16W

MF

402

R702

1 2

5%

1/16W

MF

603

1_5V_MAXBUS

0

R693

1 2

1_8V_MAXBUS

5%

1/16W

MF

603

0

+1_5V_SLEEP

+1_8V_SLEEP

R128

1 2

470

5%

1/16W

MF

402

C103

1

2

402

CERM

20%

0.1uF

10V

C149

1

2

0.1uF

20% 10V CERM 402

C151

1

2

0.1uF

10V CERM 402

20%

C202

1

2

402

CERM

10V

20%

0.1uF

C111

1

2

0.1uF

20% 10V CERM 402

C110

1

2

0.1uF

20%

10V CERM 402

C275

1

2

10V 402

CERM

20%

0.1uF

C257

1

2

402

CERM

10V

20%

0.1uF

C273

1

2

20%

0.1uF

10V CERM 402

C41

1

2

0.1uF

20% 10V CERM 402

C272

1

2

20%

402

10V CERM

0.1uF

C46

1

2

0.1uF

20% 10V CERM 402

R65

1 2

10K

5%

1/16W

MF

402

R130

1 2

10K

5%

1/16W

MF

402

R79

1 2

10K

5%

1/16W

MF

402

R108

1 2

10K

5%

1/16W

MF

402

C190

1

2

402

CERM

10V

20%

0.1uF

C150

1

2

CERM

10V 402

20%

0.1uF

C201

1

2

10V 402

CERM

20%

0.1uF

C193

1

2

0.1uF

20% 10V CERM 402

C153

1

2

0.1uF

20% 10V CERM 402

C344

1

2

20%

6.3V CERM

10uF

805

C189

1

2

0.1uF

20%

10V

402

CERM

C105

1

2

402

CERM

10V

20%

0.1uF

C192

1

2

CERM

0.1uF

20%

10V

402

C47

1

2

402

CERM

10V

20%

0.1UF

C188

1

2

0.1UF

20% 10V CERM 402

C169

1

2

402

CERM

10V

20%

0.1UF

C170

1

2

0.1UF

20% 10V CERM 402

C155

1

2

402

CERM

10V

20%

0.1UF

C139

1

2

0.1UF

10V

20% CERM

402

C92

1

2

402

CERM

10V

0.1UF

20%

C106

1

2

0.1UF

402

CERM

10V

20%

C195

1

2

10UF

20%

6.3V

CERM

805

C347

1

2

805

CERM

6.3V

20%

10UF

C258

1

2

10UF

20%

6.3V CERM 805

C345

1

2

805

CERM

6.3V

20%

10UF

C156

1

2

805

CERM

6.3V

20%

10UF

C341

1

2

10UF

20%

6.3V CERM 805

C225

1

2

805

CERM

6.3V

20%

10UF

C343

1

2

10UF

20%

6.3V CERM 805

XW31

1 2

OMIT

SM

U43

E11

H1

D12

L3 G4 T2 F4 V1 J4 R2 K5 W2

C11

J2 K4 N4 J3 M5 P5 N3 T1 V2 U1

G3

N5 W1

B12

C4 G10 B11

F10

L2 D11

D1 C10

G2

R1

C1

E3

H6

F5

G7

N2

A8

M1

G9 F8

D2 B7

A12

J1

A3 B1

H2

M2

R3 G1 K1 P1 N1

D10

A11

E2

B5

H9

H11

H13

J6

J8

J10

J12

K7K3K9

C3

K11

K13

L6

L8

L10

L12

M4M7M9

M11D6M13

N7P3P9

P12R5R14

R17T7T10

D13

U3

U13

U17

V5

V8

V11

V15

E17F3G17

H4

H7

B2

D8

B6

D4

G8 B3

E8

C9

B4

M3N6P2P8P11R4R13

R16T6T9C2U2

U12

U16V4V7

V10

V14

C12D5F2H3J5K2L5

E18

G18

B8 C8 C7 D7 A7

D9

A9

G5

P4

E4 H5

F9

A2

B10

E10

A10

K6

E1

F11

C6

B9 A4

L1

F1

A5

L4

G6 F7 E7

E5 E6 F6 E9 C5

H8

K12

K14L7L9

L11

L13M8M10

M12

H10

H12J7J9

J11

J13K8K10

D3

BGA

OMIT

APOLL7_PM-R1.1

1.50GHZ-1.28V

CRITICAL

U6

53

2

4

1 6

CRITICAL

SOT23-6

FAN2558

C283

1

2

2.2UF

CERM1

20%

6.3V

603

C909

1

2

6.3V CERM 402

10%

1UF

R280

1 2

402

MF

1/16W

1%

10

R276

1

2

0

1/10W

603

5% MF

R282

1

2

118K

1/16W

1% MF

402

R283

1

2

100K

1% MF

402

1/16W

+3V_SLEEP

D35

12

NO STUFF

MBR0530

SM

R275

1 2

1/16W

MF

0

5%

402

C945

1

2

NO STUFF

0.1UF

CERM

20% 10V

402

C946

1

2

50V

10% CERM

0.001UF

402

C137

1

2

0.1uF

20% 10V

402

CERM

C136

1

2

CERM

6.3V

20%

4.7UF

805

U431

CRITICAL337S3029

IC,A7PM,R1.3,1.67GHZ,1.28V

NO STUFF

45

B

5

051-6694

CRITICAL

1 U43

337S2955

IC,A7PM,R1.2.3,1.67GHZ,1.28V

?

CPU_PULLDOWN

CPU_SMI_L

CPU_HRESET_L

CPU_DTI<2>

JTAG_CPU_TCK

JTAG_CPU_TMS

CPU_VCORE_SLEEP

MPIC_CPU_INT_L

MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL

CPU_AVDD_VIN

CPU_AVDD_SHDN_L

CPU_SRESET_L

CPU_L1TSTCLK

VCORE_SHDN_L

JTAG_CPU_TCK

CPU_L2TSTCLK

CPU_SRWX_L

CPU_CHKSTP_OUT_L

JTAG_CPU_TDI

CPU_SMI_L

CPU_HRESET_L

CPU_PULLDOWN

CPU_EDTI

CPU_PULLUP

CPU_PMONIN_L

CPU_LSSD_MODE

CPU_SHD0_L

CPU_TBEN

CPU_SHD1_L

CPU_CHKS_L

MAXBUS_SLEEP

CPU_EMODE1_L

CPU_MCP_L

ADT7467_VCORE_MON

CPU_ADDR<1>

CPU_PLL_CFG<4>

CPU_PLL_CFG<1>

CPU_DBG_L

CPU_PLL_CFG<3>

CPU_DRDY_L CPU_EDTI

CPU_DTI<1>

JTAG_CPU_TDI

JTAG_CPU_TMS

CPU_TBEN

CPU_MCP_L

CPU_CHKSTP_OUT_L

CPU_ADDR<18>

CPU_PLL_CFG<2>

CPU_ADDR<2>

CPU_ADDR<0>

CPU_CHKS_L

CPU_PULLDOWN

CPU_ADDR<16>

CPU_ADDR<21>

CPU_PMONIN_L

CPU_EMODE0_L

JTAG_CPU_TDO_TP

CPU_ARTRY_L CPU_SHD0_L

CPU_HIT_L

CPU_SHD1_L

CPU_BR_L CPU_BG_L

CPU_TS_L

CPU_ADDR<3> CPU_ADDR<4>

CPU_ADDR<6>

CPU_ADDR<5>

CPU_ADDR<9>

CPU_ADDR<8>

CPU_ADDR<11>

CPU_ADDR<10>

CPU_ADDR<12>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<15>

CPU_ADDR<17>

CPU_ADDR<19> CPU_ADDR<20>

CPU_ADDR<22>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27> CPU_ADDR<28> CPU_ADDR<29>

CPU_ADDR<31>

CPU_ADDR<30>

CPU_TT<0> CPU_TT<1>

CPU_TT<3>

CPU_TT<2>

CPU_TBST_L

CPU_TT<4>

CPU_TSIZ<0>

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_WT_L

CPU_GBL_L

CPU_CI_L CPU_AACK_L

CPU_ADDR<7>

CPU_QACK_L

CPU_TA_L

SYSCLK_CPU

CPU_PULLDOWN

CPU_EMODE1_L

CPU_CLKOUT_SPN

CPU_LSSD_MODE

JTAG_CPU_TRST_L

CPU_L2TSTCLK

CPU_L1TSTCLK

CPU_PULLUP CPU_SRWX_L

CPU_PULLUP

CPU_TEA_L

CPU_SRESET_L

CPU_AVDD

MPIC_CPU_INT_L

CPU_QREQ_L

CPU_PLL_CFG<0>

CPU_BUS_VSEL

CPU_DTI<0>

CPU_AVDD_ADJ

CPU_AVDD_VOUT

CPU_VCORE_SLEEP

MAXBUS_SLEEP

39

35

16

40

15

40

39

40

8

7

40

35

40

7

40

7

31

6

37

6

14

40

6

40

6

31

6

8

6

37

6

8

40

37

40

37

40

14

37

6

5

8

5

35

5

26

8

7

8

7

8

5

8

5

8

7

8

5

8

5

7

40

8

5

8

5

8

5

6

5

8

5

39

5

8

7

8

5

D22

D3

D2

D1

D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21

D28

D27

D23 D24 D25 D26

D29

D32

D31

D30

D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44

D48

D47

D45 D46

D49

D51

D50

D52 D53 D54 D55

D58

D57

D56

D59

DP6

DP5

DP4

DP3

DP2

DP1

DP0

DP7

D63

D62

D61

D60

D0

(2 OF 3)

VDD

N/C_1

N/C_4

N/C_8

N/C_13

N/C_17

N/C_20

N/C_22 N/C_23

N/C_31

N/C_39

N/C_30

N/C_33

N/C_35 N/C_36

N/C_38

N/C_29

N/C_28

N/C_27

N/C_25

N/C_24

N/C_21

N/C_19

N/C_18

N/C_16

N/C_15

N/C_14

N/C_12

N/C_11

N/C_10

N/C_9

N/C_7

N/C_6

N/C_5

N/C_3

N/C_2

(3 OF 3)

N/C_26

N/C_32

N/C_34

N/C_37

SENSEVDD

GND

TEMP_CATHODE

TEMP_ANODE

SENSEGND

HPR*

Y

B

A

Y

B

A

SYM_VER2

WC*

VCC

VSS

SDA SCL

NC1 NC2 NC3

VCC

RESET* XTAL1 XTAL2 PB0

PD6

PD5

PD4

PD3

PD2

PD1

PD0

GND

PB1 PB2 PB3 PB4 PB5 PB6 PB7

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

INPUTS ARE 3V TOLERANT

BOOT BANGER E2PROM

NC

WILL DISABLE THE CONTROLLER

UNSTUFFING RA AND STUFFING RB

MPC7447/BBANG

NC

BOOT BANGER

470OHM FOR BOOT BANGER

NC

RB

RA

NC

NC NC

NC

NC NC NC NC

NC

NC NC NC

NC

BOOT BANGING SIGNAL DEFINITION

2/ PMU_HRESET_L (3V INPUT INTO LMU)

5/ JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB) 6/ JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)

4/ JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)

1/ BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)

3/ BBANG_JTAG_TCK (REGULAR OUTPUT)

NC

CRITICAL

1.50GHZ-1.28V

OMIT

BGA

APOLL7_PM-R1.1

U43

R15 W15

T13 P13 U14 W14 R12 T12 W12 V12 N11 N10

T14

R11 U11 W11 T11 R10

N9 P10 U10

R9 W10

V16

U9

V9

W5

U6

T5

U5

W7

R6

P7

V6

W16

P17 R19 V18 R18 V19 T19 U19 W19 U18 W17

T15

W18 T16 T18 T17

W3 V17

U4

U8

U7

R7

U15

P6

R8

W8

T8

P14 V13 W13

T3

W4

T4

W9

M6

V3

N8

W6

402

10K

1% MF

1/16W

BBANG

R884

1

2

+3V_MAIN

CERM

20% 10V

BBANG

0.1UF

402

C638

1

2

402

BBANG

10K

5% 1/16W MF

R532

1

2

MF

BBANG

5%

10K

1/16W

402

R533

1

2

CRITICAL

OMIT

APOLL7_PM-R1.1

BGA

1.50GHZ-1.28V

U43

A17 A19 B13 B16 B18 E12 E19 F13 F16 F18 G19 H18 J14 L14 M15 M17 M19 N14 N16 P15 P19

A6

A14

C15 D15 E15 F15 G15 H15 J15 K15 L15 C16

B14

D16 C17 D17 C18 D18 C19 D19 H16 J16 K16

C14

L16 J17 K17 L17 J18 K18 L18 J19 K19 L19

D14 E14 F14 G14 A15 B15

N13 G12

N12 G13

N18 N19

A13 A16 A18 B17 B19 C13 E13 E16 F12 F17 F19 G11 G16 H14 H17 H19 M14 M16 M18 N15 N17 P16 P18

SN74AUC1G08

SC70-5

BBANG

U4

1

2

3

5

4

SN74AUC1G08

BBANG

SC70-5

U2

1

2

3

5

4

BBANG

10K

5% MF

1/16W

402

R62

1

2

NO_BBANG

0

5%

1/16W

MF

402

R6

1 2

BBANG

10K

5%

1/16W

MF

402

R40

1

2

+3V_MAIN

MF

BBANG

1/16W

5%

10K

402

R39

1

2

OMIT

SOI

32KX8_M24256B

U32

1 2 3

6

5

8

4

7

5% MF

402

1/16W

10K

BBANG

R906

1

2

10K

5%

402

MF

1/16W

BBANG

R904

1

2

NO STUFF

1/16W MF

10K

5%

402

R903

1

2

NO STUFF

5%

10K

1/16W MF

402

R905

1

2

NO STUFF

1/16W MF

10K

5%

402

R907

1

2

OMIT

ATTINY2313

SOI

U61

10

12 13 14 15 16 17 18 19

2 3 6 7 8 9 11

1

20

5

4

402

MF

1/16W

5%

470

BBANG

R86

1

2

200

NO_BBANG

5% 402

1/16W MF

R85

1

2

SM

1/32W

25V

10K

5%

BBANG

RP6

5 10

1 2 3 4 6 7 8 9

402

CERM

0.1UF

BBANG

20% 10V

C938

1

2

402

5%

BBANG

10K

1/16W MF

R885

1

2

10K

NO STUFF

402

1/16W

MF

5%

R886

1

2

10K

MF

1%

BBANG

1/16W

402

R882

1

2

U32

341S1661

BBANG

1

I2C EEPROM,PROGRAMMED W/ BANGER

MCU,PROGRAMMED W/ BANGER

341S1660

U61

BBANG

1

051-6694

45

6

B

CPU_DATA<18>

CPU_DATA<4>

CPU_DATA<6>

BB_EEPR_ADDR2

BB_EEPR_ADDR1

BB_EEPR_ADDR0

INT_I2C_CLK0

INT_I2C_DATA0

JTAG_CPU_TCK

BBANG_JTAG_TCK

BBANG_TCK_EN

MAXBUS_SLEEP

BBANG_HRESET_L

CPU_DATA<15> CPU_DATA<16>

CPU_DATA<19> CPU_DATA<20> CPU_DATA<21> CPU_DATA<22> CPU_DATA<23> CPU_DATA<24> CPU_DATA<25> CPU_DATA<26> CPU_DATA<27> CPU_DATA<28> CPU_DATA<29> CPU_DATA<30> CPU_DATA<31> CPU_DATA<32>

CPU_DATA<34> CPU_DATA<35>

CPU_DATA<37> CPU_DATA<38> CPU_DATA<39>

CPU_DATA<41> CPU_DATA<42> CPU_DATA<43> CPU_DATA<44> CPU_DATA<45> CPU_DATA<46> CPU_DATA<47> CPU_DATA<48> CPU_DATA<49> CPU_DATA<50> CPU_DATA<51> CPU_DATA<52> CPU_DATA<53>

CPU_DATA<59> CPU_DATA<60> CPU_DATA<61>

CPU_DATA<63>

CPU_DATA<54> CPU_DATA<55> CPU_DATA<56> CPU_DATA<57> CPU_DATA<58>

CPU_DATA<3>

CPU_DATA<2>

CPU_DATA<1>

CPU_DATA<9> CPU_DATA<10> CPU_DATA<11>

CPU_DATA<13> CPU_DATA<14>

CPU_DATA<33>

CPU_DATA<36>

CPU_DATA<62>

CPU_DATA<5>

CPU_DATA<7>

CPU_DATA<12>

CPU_DATA<17>

CPU_DATA<40>

CPU_THERM_DP

CPU_THERM_DM

EEPROM_WP_PD

BB_SCK

BB_MISO

BB_MOSI

INT_I2C_DATA0

INT_I2C_CLK0

BBANG_HRESET_L

PMU_CPU_HRESET_L

JTAG_CPU_TDI

JTAG_CPU_TRST_L

JTAG_CPU_TMS

ICT_TRST_L

ESP_EN_L

BFR_TDO

TP_BB_XTAL

CPU_VCORE_SLEEP

BB_RESET_L

BB_SCK

BB_MISO

BB_MOSI

BBANG_JTAG_TCK

ESP_EN_L BFR_TDO ICT_TRST_L

MAXBUS_SLEEP

JTAG_CPU_TRST_L

CPU_DATA<8>

CPU_DATA<0>

BBANG_JTAG_TCK

RESET_VREF

CPU_HRESET_L

MAXBUS_SLEEP

PMU_CPU_HRESET_L

5

6

7

6

8

6

8

11

15

11

5

15

13

16

13

5

35

16

5

16

8

37

23

5

35

6

8

37

8

23

6

5

6

5

39

35

6

8

7

35

6

37

8

40

6

39

40

37

8

37

26

6

40

31

40

6

40

6

39

40

37

6

40

39

31

G

D

S

G

D

S

04

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

12.5X

13.0X

13.5X

CPU PLL CONFIG CIRCUITRY

R00ER10ER01ER10DR00D

R01D

R10CR00CR01CR10BR00BR01BR10AR00AR01A

+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L PULLUP TO ENSURE THAT Vgs OF PASS

STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC

SIGNAL

CPU_EMODE0_L (PROCESSOR)

CPU_BUS_VSEL

(PROCESSOR)

CPU_HRESET_INV

LOW

CPU_HRESET_L

HIGH

TIED

APPLICATION

60X BUS MODE MAX BUS MODE

2.5V INTERFACE

1.8V INTERFACE

1.5V INTERFACE

(AT BUS FREQUENCY)

(MHZ)

PLL OFF

PLL BYPASS

267333

500 400

533667

833 667

733917

1000

800 867

1083 1167

933

10001250

1333 1067

11331417 1500 1200 1583 1267 1667 1333 1750 1400 1833 1467 1917 1533 2000 2083 2167 2250 2333 2500 2667 2833 3000 3333 3500 4000 4667

1600

1667

1733

1800

1867

2000

2133

2267

2400

2667

2800

3200

3733

1 1110 1E

1 0110 16

1 0100 14

1 0011 13

1 0010 12

1 0000 10

1 1101 1D

1 0001 11

1 1100 1C

0 1110 0E

1 0101 15

1 1111 1F

1 1011 1B

0 0000 00

1 1001 19

1 1000 18

1 1010 1A

0 0111 07

1 0111 17

0 0110 06

0 1100 0C

0 0001 01

0 0010 02

0 0101 05

0 1101 0D

0 1001 09

0 1011 0B

0 1010 0A

0 1000 08

0 0100 04

0 0011 03

0 1111 0F

E ABCD HEX

4 0123

CPU_PLL_CFG

STUFF PASS TRANSISTOR ONLY IF R10E, R01E, OR PULLUP STUFFED

NEED TO CHARACTERIZE

INVERTER TO INVERT HRESET_L

DESKTOP HAD PROBLEM USING

INVERTED HRESET_L

MAXBUS VSEL

1.5V INTERFACE

1.8V INTERFACE

CPU CONFIGURATION

BUSTYPE SELECT

APOLLO ONLY SUPPORTS MAXBUS

(Bus-to-Core)

MULTIPLIER

133MHZ167MHZ

CORE FREQUENCY

APOLLO 7

CPU FREQUENCY CONFIGURATION

PLL DISABLE 1 X

HIGH SPEED 0 1

LOW SPEED 0 0

0.0X

1.0X

2.0X

3.0X

4.0X

5.0X

5.5X

6.0X

6.5X

7.0X

7.5X

8.0X

8.5X

9.0X

9.5X

10.0X

10.5X

11.0X

11.5X

12.0X

14.0X

15.0X

16.0X

17.0X

20.0X

21.0X

24.0X

28.0X

18.0X

CPU CONFIGURATION

TRANSISTOR ON CPU_PLL_CFG<4> IS MET.

402

MF

1/16W

5%

0

R23

1

2

0

5% 1/16W MF 402

NO STUFF

R16

1

2

10K

5% 1/16W MF 402

R9

1

2

10K

5% 1/16W MF 402

R10

1

2

10K

5% 1/16W MF 402

R11

1

2

5% 1/16W MF 402

10K

R12

1

2

47K

5%

402

1/16W

MF

R3

1

2

10K

5% 1/16W MF 402

R48

1

2

82K

5%

1/16W

MF

402

R33

1

2

0

5% 1/16W MF 402

NO STUFF

R18

1

2

0

5% 1/16W

402

NO STUFF

MF

R17

1

2

10K

5% 1/16W MF 402

R2

1

2

2N7002DW

SOT-363

Q2

3

5

4

SOT-363

2N7002DW

Q2

6

2

1

SC70-5

1_5V_MAXBUS

CRITICAL

SN74AUC1G04

U1

2

3

5

4

402

MF

1/16W

5%

0

NO STUFF

R27

1

2

2N7002DW

SOT-363

Q1

6

2

1

2N7002DW

SOT-363

Q1

3

5

4

+5V_SLEEP

1_5V_MAXBUS

22

5%

1/16W

MF

402

R4

21

402

MF

1/16W

5%

22

R149

21

1_8V_MAXBUS

10

5%

1/16W

MF

402

R5

1

2

2N7002

SM

Q3

3

1

2

2N3904

SM

Q4

1

3

2

249K

1%

1/16W

MF

402

R47

1 2

0

5% 1/16W MF 402

NO STUFF

R19

1

2

+3V_SLEEP

402

MF

1/16W

5%

0

NO STUFF

R20

1

2

0

1/16W

5% MF

402

NO STUFF

R21

1

2

0

5% 1/16W MF 402

NO STUFF

R22

1

2

0

5% 1/16W MF 402

NO STUFF

R24

1

2

0

5% 1/16W MF 402

NO STUFF

R25

1

2

402

MF

1/16W

5%

0

NO STUFF

R26

1

2

0

5% 1/16W MF 402

NO STUFF

R14

1

2

0

1/16W

5% MF

402

NO STUFF

R13

1

2

402

MF

1/16W

5%

0

R15

1

2

051-6694

B

7

45

CPU_PLL_CFG<4>

CPU_PLL_CFG<2>

CPU_PLL_FS00

PLL_STOP_L

CPU_EMODE0_LCPU_HRESET_L

CPU_HRESET_L

CPU_HRESET_INV

MAXBUS_SLEEP

CPU_BUS_VSEL

CPU_PLL_STOP_OC

CPU_PLL_STOP_BASE

CPU_VCORE_HI_OC

PLL_STOP_L

CPU_PLL_CFG<0>

MAXBUS_SLEEP

CPU_PLL_FS10

CPU_PLL_CFG<1>

CPU_PLL_CFG<3>

CPU_PLL_FS01

CPU_PLL_CFGEXT

5 5 6 6 7 7 8

8

5

15

6

16

7

35

7

31

35

5

7

5

40

39

5

31

35

7

5

39

5

(PLL6)

VSSA_7

(PLL6)

VDD15A_7

D_42

D_41

D_40

D_39

D_38

D_44

D_43

D_45 D_46 D_47 D_48

D_52

D_51

D_50

D_49

D_53

D_55

D_54

D_56 D_57 D_58

D_60

D_59

D_62

D_61

D_63

DBG

DRDY

DTI_0

TEA

TA

DTI_2

DTI_1

D_1

D_0

D_2

D_6

D_5

D_4

D_3

D_7

D_11

D_10

D_9

D_8

D_12

D_14

D_13

D_15 D_16 D_17

D_22

D_21

D_20

D_19

D_18

D_23 D_24 D_25 D_26 D_27

D_32

D_31

D_30

D_29

D_28

D_34

D_33

D_35 D_36 D_37

BR

(1 OF 9)

MAXBUS

INTERFACE

TS

BG

A_0 A_1 A_2 A_3 A_4 A_5

A_9

A_6 A_7 A_8

A_10

A_14

A_13

A_12

A_11

A_20

A_16 A_17 A_18 A_19

A_15

A_27

A_22

A_21

A_30

A_29

A_28

A_26

A_25

A_24

A_23

TT_2

TT_1

TT_0

A_31

TBST TSIZ_0 TSIZ_1 TSIZ_2

CI GBL

TT_4

AACK

QREQ

ARTRY

TT_3

WT

HIT

ANALYZER_CLK

SUSPENDACK

SUSPENDREQ

QACK

STOPCPUCLK

CPU_FB_OUT

CPU_FB_IN

CPU_CLK

TBEN

ACS_REF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

IT CANNOT BE CHANGED BY SOFTWARE

Intrepid MaxBus

THE FOLLOWING STRAP BITS CAN BE

3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED

011: 33.3 ohm

TI 1394b workaround

0: Normal 1394b

1: TI PHY workaround

SelPLL4ExtSrc

0: PLL5

1: External source

INTREPID OUTPUTS HIGH BY DEFAULT

0: Max Bus (G4)

Processor Bus Mode

1: 60x bus (G3)

FireWire PHY interface

0: Legacy interface

1: B-mode interface

PCI1_REQ0_L / PCI1_GNT0_L

0: REQ/GNT

1: GPIOs

PCI1_REQ2_L / PCI1_GNT2_L

0: REQ/GNT

1: GPIOs

PCI1_REQ1_L / PCI1_GNT1_L

0: REQ/GNT

Spare

BIT 56 TO 63

INTREPID BOOT STRAPS

MAXBUS PULL-UPS

IF A STRAP IS NOT LISTED, THEN

6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT

5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED

4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED

2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED

1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED

CHANGED BY SOFTWARE:

INPUT NO BUS KEEPER

NO BUS KEEPER - PU NO BUS KEEPER - PU INPUT - PU

INPUT - PD

NO BUS KEEPER - ?

Vin = Intrepid Vcore (1.5V) Vout = MaxBus rail (1.8V)

NO BUS KEEPER - PU

INPUT - PU

NO BUS KEEPER - PU

NO BUS KEEPER - ?

NO BUS KEEPER - PU

FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE

NO BUS KEEPER - PU

SHORT = 1" SHORTER THAN MATCHED LENGTH

BUF_REF_CLK_OUTEnable_h

1: Active

0: Inactive

Spare

000: 200 ohm

100: 200 ohm

010: 100 ohm

110: 66.6 ohm

001: 50 ohm

101: 40 ohm

111: 28.6 ohm

MaxBus output impedance

BIT2 BIT1 BIT0

Spare

BIT 48 TO 55

MODE C (2.0X) IS FOR CLOCK SLEW OPERATION

MODE A (2.5X) IS FOR STATIC OPERATION

PCI0 Source Clock

1: PLL4

0: PLL5 (NO SPREAD)

PCI1 Source Clock

1: PLL4

0: PLL5 (NO SPREAD)

InternalSpreadEn

0: Inactive

1: Active

Spare

100: 83.20MHZ

011: 99.84MHZ (1.5X)

010: 133.12MHZ (2.0X)

001: 149.76MHZ

000: 166.4MHZ (2.5X)

PLL4MODESEL_NXT[2:0]

BIT0BIT2 BIT1

BIT 40 TO 47

Spare

ExtPLL_SDwn_Pol

0: Active high

1: Active low

DDR_TPDEn_Pol

0: Active high

1: Active low

AnalyzerClk_En_h

0: Inactive

1: Active

DDR_TPDModeEnable_h

0: TDI input (JTAG)

1: TDI output

INTREPID BOOT STRAPS

LONG = 1" LONGER THAN MATCHED LENGTH

BIT 32 TO 39

NO BUS KEEPER

R137

1

2

402

MF

1/16W

1%

1K

C308

1

2

CERM

6.3V

20%

0.22UF

402

R227

1 2

5% MF

402

1/16W

4.7

R144

1 2

0

5%

1/16W

MF

402

RP24

2 7

SM1

1/16W

5%

10K

R167

12

402

1/16W

MF

5%

0

R197

1

2

402

MF

1%

1/16W

511

R178

1

2

NO STUFF

402

MF

1/16W

10K

5%

R179

1

2

NO STUFF

402

MF

1/16W

5%

10K

R651

1

2

NO STUFF

402

MF

1/16W

5%

10K

R166

1

2

NO STUFF

402

MF

1/16W

5%

10K

R153

1

2

402

MF

1/16W

5%

10K

R123

1

2

NO STUFF

402

MF

1/16W

10K

5%

R135

1

2

NO STUFF

402

MF

1/16W

5%

10K

R674

1

2

402

MF

1/16W

5%

10K

R143

1

2

10K

5%

1/16W

MF

402

R673

1

2

MF

402

1/16W

5%

10K

R664

1

2

10K

5%

1/16W

MF

402

R657

1

2

NO STUFF

402

MF

1/16W

5%

10K

R639

1

2

402

1/16W

MF

5%

10K

R643

1

2

10K

5%

1/16W

MF

402

R642

1

2

NO STUFF

402

MF

1/16W

5%

10K

R136

1

2

402

1/16W

MF

5%

10K

R165

1

2

INT_CLK

402

MF

1/16W

5%

10K

R177

1

2

INT_CLK

402

MF

5%

1/16W

10K

R152

1

2

INT_CLK

402

MF

1/16W

5%

10K

R184

1

2

NO STUFF

402

MF

1/16W

5%

10K

R134

1

2

EXT_CLK

10K

5%

1/16W

MF

402

R164

1

2

NO STUFF

402

MF

1/16W

5%

10K

R142

1

2

NO STUFF

402

MF

1/16W

5%

10K

R122

1

2

NO STUFF

402

MF

1/16W

5%

10K

R666

1

2

EXT_CLK

10K

5%

1/16W

MF

402

R658

1

2

EXT_CLK

402

MF

1/16W

5%

10K

R675

1

2

EXT_CLK

10K

5%

1/16W

MF

402

R683

1

2

402

MF

1/16W

5%

10K

R644

1

2

INT_CLK

10K

5%

1/16W

MF

402

R665

1

2

402

MF

1/16W

5%

10K

R652

1

2

10K

5%

1/16W

MF

402

R640

1

2

402

MF

5%

1/16W

10K

R176

1

2

NO STUFF

402

MF

1/16W

5%

10K

R141

1

2

NO STUFF

402

MF

1/16W

5%

10K

R183

1

2

10K

5%

1/16W

MF

402

R162

1

2

NO STUFF

402

MF

1/16W

5%

10K

R151

1

2

NO STUFF

402

MF

1/16W

5%

10K

R163

1

2

402

MF

5%

1/16W

10K

R121

1

2

EXT_CLK

402

MF

1/16W

5%

10K

R676

1

2

10K

5%

1/16W

MF

402

R684

1

2

NO STUFF

402

MF

1/16W

5%

10K

R653

1

2

402

MF

1/16W

5%

10K

R667

1

2

10K

5%

1/16W

MF

402

R659

1

2

402

1/16W

MF

5%

10K

R668

1

2

NO STUFF

10K

5%

1/16W

MF

402

R641

1

2

INT_CLK

402

MF

1/16W

5%

10K

R133

1

2

EXT_CLK

MF

402

1/16W

5%

10K

R645

1

2

INT_CLK

402

MF

1/16W

5%

10K

R182

1

2

NO STUFF

10K

5%

1/16W

MF

402

R174

1

2

402

MF

5%

1/16W

10K

R150

1

2

NO STUFF

402

MF

5%

1/16W

10K

R131

1

2

NO STUFF

10K

5%

1/16W

MF

402

R132

1

2

NO STUFF

402

MF

1/16W

5%

10K

R175

1

2

NO STUFF

10K

5%

1/16W

MF

402

R161

1

2

NO STUFF

402

MF

1/16W

5%

10K

R140

1

2

NO STUFF

402

MF

1/16W

5%

10K

R685

1

2

402

MF

1/16W

5%

10K

R660

1

2

402

MF

1/16W

5%

10K

R678

1

2

NO STUFF

10K

5%

1/16W

MF

402

R647

1

2

1/16W

10K

5% MF

402

R646

1

2

402

MF

1/16W

5%

10K

R677

1

2

402

MF

1/16W

5%

10K

R669

1

2

402

MF

1/16W

5%

10K

R654

1

2

402

MF

1/16W

5%

10K

U45

B29

H13

G8

H23

D24 D25

J22 B25 H22 G22 D22 B24 B23 E22 J21 G21

A27

E21 A24 D21 A23 H20 B22 H21 A22 E20 B21

E24

D20 A21

G23 B26 A26 D23 A25 E23

E26

E29

G26

J15

J24 H16 A30

G28 K25

D29 B30

D10 G12

B10 J13 A10 D12 E13 G13 B11 D13 A11 G14

E11

H14 E14 B12 G15 B13 H15 D14 B14 A12 G16

H11

E15 J16 D15 A14 A13 D16 E16 G17 B15 H17

B9

A15 B16 E17 A16 J18 H18 D17 G18 A17 B17

B8

E18 B18 D18 A18 A19 H19 B19 J19 A20 D19

A9

E19 G19 B20 G20

A8 E12 D11

A29

B31

G27

A32

AH9

AM8

AK9

E27

A31

A28

E28

B27

G24 H24 D26 E25 G25 B28 D27 J25

H26

H25

D28

CRITICAL

BGA

INTREPID-REV2.1

OMIT

R225

1

2

0

5%

1/16W

MF

402

NO STUFF

R215

1 2

402

MF

1/16W

5%

0

R208

1

2

0

5%

1/16W

MF

402

R207

1 2

402

MF

1/16W

5%

0

NO STUFF

R226

1 2

402

MF

1/16W

5%

0

R196

1 2

402

MF

1/16W

5%

0

NO STUFF

RP24

3 6

SM1

1/16W

5%

10K

RP23

1 8

SM1

1/16W

5%

10K

RP23

4 5

SM1

1/16W

5%

10K

RP23

2 7

SM1

5%

1/16W

10K

RP21

2 7

SM1

1/16W

5%

10K

RP21

1 8

SM1

1/16W

5%

10K

RP21

3 6

SM1

1/16W

5%

10K

RP21

4 5

SM1

1/16W

5%

10K

RP24

4 5

SM1

1/16W

5%

10K

RP23

3 6

SM1

1/16W

5%

10K

458

051-6694

B

CPU_ADDR<2>

CPU_DATA<36>

CPU_DATA<62> CPU_DATA<63>

CPU_DATA<27>

CPU_DATA<24>

CPU_DATA<43>

CPU_ADDR<26> CPU_ADDR<27>

CPU_DATA<47>

CPU_DATA<46>

MAXBUS_SLEEP

CPU_DATA<54>

CPU_DATA<52>

MAXBUS_SLEEP

CPU_CI_L

CPU_ADDR<31>

CPU_ADDR<29>

CPU_DATA<42>

CPU_DATA<44>

CPU_GBL_L

+1_5V_INTREPID_PLL7

INTREPID_ACS_REF

CPU_TBEN

CPU_CLK_EN

SYSCLK_LA_TP

INT_CPUFB_OUT

INT_SUSPEND_ACK_L

INT_SUSPEND_REQ_L

CPU_QACK_L

CPU_QREQ_L

CPU_ARTRY_L CPU_HIT_L

CPU_AACK_L

CPU_WT_L

CPU_TT<3> CPU_TT<4>

CPU_TT<2>

CPU_TT<0> CPU_TT<1>

CPU_TBST_L

CPU_ADDR<30>

CPU_ADDR<28>

CPU_ADDR<25>

CPU_ADDR<23> CPU_ADDR<24>

CPU_ADDR<21> CPU_ADDR<22>

CPU_ADDR<20>

CPU_ADDR<18> CPU_ADDR<19>

CPU_ADDR<17>

CPU_ADDR<13> CPU_ADDR<14>

CPU_ADDR<11>

CPU_ADDR<9>

CPU_ADDR<7>

CPU_ADDR<5>

CPU_ADDR<4>

CPU_ADDR<3>

CPU_ADDR<0> CPU_ADDR<1>

CPU_TS_L

CPU_BG_L

CPU_BR_L

CPU_DATA<1>

CPU_DATA<0>

CPU_DATA<3> CPU_DATA<4>

CPU_DATA<2>

CPU_DATA<5> CPU_DATA<6>

CPU_DATA<8> CPU_DATA<9>

CPU_DATA<7>

CPU_DATA<10> CPU_DATA<11>

CPU_DATA<13>

CPU_DATA<12>

CPU_DATA<14> CPU_DATA<15> CPU_DATA<16>

CPU_DATA<18>

CPU_DATA<17>

CPU_DATA<19>

CPU_DATA<21>

CPU_DATA<20>

CPU_DATA<22> CPU_DATA<23>

CPU_DATA<26>

CPU_DATA<25>

CPU_DATA<28> CPU_DATA<29>

CPU_DATA<31>

CPU_DATA<30>

CPU_DATA<32> CPU_DATA<33> CPU_DATA<34> CPU_DATA<35> CPU_DATA<36> CPU_DATA<37>

CPU_DATA<39> CPU_DATA<40>

CPU_DATA<42>

CPU_DATA<41>

CPU_DATA<43>

CPU_DATA<45>

CPU_DATA<44>

CPU_DATA<46> CPU_DATA<47>

CPU_DATA<49> CPU_DATA<50>

CPU_DATA<48>

CPU_DATA<51> CPU_DATA<52>

CPU_DATA<54>

CPU_DATA<53>

CPU_DATA<55> CPU_DATA<56> CPU_DATA<57>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<60>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<63>

CPU_DBG_L

CPU_DRDY_L

CPU_DTI<0> CPU_DTI<1> CPU_DTI<2>

CPU_TA_L CPU_TEA_L

+1_5V_INTREPID_PLL

CPU_DATA<55>

CPU_DATA<41>

CPU_DATA<40>

CPU_DATA<53>

CPU_DATA<51>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<48>

INT_CPUFB_IN

INT_CPUFB_OUT_NORM

INT_CPUFB_IN_NORM

INT_CPUFB_LONG

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<59>

MAXBUS_SLEEP

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<56>

CPU_BR_L

CPU_ARTRY_L

CPU_DRDY_L

CPU_HIT_L

CPU_AACK_L

CPU_TEA_L

CPU_DBG_L

CPU_BG_L

MAXBUS_SLEEP

INT_CPUFB_IN

SYSCLK_CPU_UF

SYSCLK_CPU

INT_CPUFB_OUT

INT_CPUFB_OUT_SHORT

CPU_ADDR<8>

CPU_ADDR<10>

CPU_ADDR<16>

CPU_ADDR<15>

CPU_TS_L

CPU_TA_L

CPU_QREQ_L

CPU_DATA<38>

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_TSIZ<0>

CPU_DATA<39>

MAXBUS_SLEEP

CPU_DATA<45>

CPU_DATA<35>

CPU_DATA<37> CPU_DATA<38>

CPU_DATA<34>

CPU_DATA<33>

CPU_DATA<32>

CPU_ADDR<6>

CPU_ADDR<12>

39

35

16

15

8

37

7

37

7

37

39

37

7

37

7

37

7

37

8

37

8

37

8

6

8

6

37

8

37

8

37

8

37

8

37

8

14

8

37

8

6

8

6

37

8

37

8

6

8

37

5

6

5

6

5

6

5

6

5

39

5

31

8

31

5

6

5

12

6

8

37

6

5

6

5

8

37

5

8

37

5

6

5

6

5

6

5

A0 A1

A6

A2 A3 A4 A5

A9

A8

A7

A10 A11 A12 A13 A14 A15 A16

A20

A17 A18 A19

CE OE WE WP PWD

GND

DQ0 DQ1

DQ6

DQ5

DQ2 DQ3 DQ4

DQ7

VPP VCC

FEPR-1MX8

(2 OF 9)

DDR_VREF_1

DDR_VREF_0

DDR_DATA_0 DDR_DATA_1 DDR_DATA_2 DDR_DATA_3 DDR_DATA_4 DDR_DATA_5 DDR_DATA_6 DDR_DATA_7 DDR_DATA_8 DDR_DATA_9 DDR_DATA_10 DDR_DATA_11 DDR_DATA_12 DDR_DATA_13 DDR_DATA_14 DDR_DATA_15 DDR_DATA_16 DDR_DATA_17 DDR_DATA_18 DDR_DATA_19 DDR_DATA_20 DDR_DATA_21

DDR_DATA_25 DDR_DATA_26 DDR_DATA_27 DDR_DATA_28 DDR_DATA_29 DDR_DATA_30

DDR_DATA_33 DDR_DATA_34 DDR_DATA_35 DDR_DATA_36 DDR_DATA_37 DDR_DATA_38 DDR_DATA_39 DDR_DATA_40 DDR_DATA_41 DDR_DATA_42 DDR_DATA_43 DDR_DATA_44 DDR_DATA_45 DDR_DATA_46 DDR_DATA_47 DDR_DATA_48 DDR_DATA_49 DDR_DATA_50 DDR_DATA_51 DDR_DATA_52 DDR_DATA_53 DDR_DATA_54 DDR_DATA_55 DDR_DATA_56 DDR_DATA_57 DDR_DATA_58 DDR_DATA_59 DDR_DATA_60 DDR_DATA_61 DDR_DATA_62 DDR_DATA_63

DDR_DATA_22 DDR_DATA_23 DDR_DATA_24

DDR_DATA_31 DDR_DATA_32

DDR_BA_0 DDR_BA_1

DDRCS_3

DDRCS_2

DDRCS_1

DDRCS_0

DDR_DQS_7

DDR_DQS_6

DDR_DQS_5

DDR_DQS_4

DDR_DQS_3

DDR_DQS_2

DDR_DQS_1

DDR_DQS_0

DDR_DM_7

DDR_DM_6

DDR_DM_5

DDR_DM_4

DDR_DM_3

DDR_DM_2

DDR_DM_1

DDR_DM_0

DDRRAS DDRCAS

DDRWE DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3

DDR_MCLK_0_P DDR_MCLK_0_N DDR_MCLK_1_P DDR_MCLK_1_N DDR_MCLK_2_P DDR_MCLK_2_N DDR_MCLK_3_P DDR_MCLK_3_N DDR_MCLK_4_P DDR_MCLK_4_N DDR_MCLK_5_P DDR_MCLK_5_N

DDR_REF

DDR_SELHI_0 DDR_SELHI_1 DDR_SELLO_0 DDR_SELLO_1

MEMORY

DDR

INTERFACE

DDR_A_10 DDR_A_11 DDR_A_12

DDR_A_9

DDR_A_8

DDR_A_7

DDR_A_6

DDR_A_5

DDR_A_4

DDR_A_3

DDR_A_2

DDR_A_1

DDR_A_0

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS

PINS ARE SWAPABLE FOR RPAKS

’0’ & ’1’ GO TO SLOT A

CKE

INT - DDR/BOOTROM

INTERCEPTS ROM CHIP SELECT

MEM_VREF

CNTL

BA

ADDR

CS

CLOCKS

’0’ & ’1’ GO TO SLOT A

1MB BOOT ROM

2.5V I/O SHUTS OFF

PULL-DOWN RESISTORS TO ENSURE CKE STAYS LOW AFTER INTREPID

’2’ & ’3’ GO TO SLOT B

’1’S ARE SAME POLARITY (ACTIVE-HI)

’0’S ARE SAME POLARITY (ACTIVE-LO)

’2’ & ’3’ GO TO SLOT B

OVERRIDE ROM MODULE

R387

1

2

10K

5%

1/16W

MF

402

R238

1 2

22

5%

402

MF

1/16W

R199

1

2

402

MF

1/16W

1%

1K

R198

1

2

10K

1%

1/16W

MF

402

C245

1

2

402

CERM

10V

20%

0.1UF

R191

1

2

10K

1%

1/16W

MF

402

U17

21 20

36

6 5 4 3 2

1 40 13 37

19

38

18 17 16 15 14

8

7

22

25 26 27 28 32 33 34 35

23 39

24

10

30 3111

9 12

3.3V

TSOP OMIT

C460

1

2

20% 10V CERM 805

2.2UF

C470

1

2

402

CERM

10V

20%

0.1UF

C479

1

2

0.1UF

20%

10V CERM 402

R386

1

2

402

MF

1/16W

5%

10K

+3V_MAIN

U45

H32

AN35 AM35 AM36 AL36

AN34 AN36 AL35 AL33

L29

K30

H35 G35

G33 H33 D35

G36 F36 F35 E35 E36 G32 D36 H36

L30 M29

AK32 AK33

AH35 AG36 AH36 AH32 AG32 AG31 AE32 AF35 AF36 AE36

AK31

AE35 AE33 AD36 AD35 AA36 AA35 AA33 AB36 AB35 AC36

AK35

AA32 AB33

V36 U33 U32 V35 T30 U36 U35 T36

AK36

P33 R30 P35 P36 R36 R35 R33 R32 N35 M36

AJ32

L35 M35 M33 L36 N33 M30 J32 J33 J35 K32

AJ35

K33 J36 K36 K35

AJ36 AG33 AG35

AJ33 AH33 AD33 AC35 T35 T33 N32 L33

AJ31 AH31 AD32 AB30 V30 P32 N29 L32

Y33

Y32

Y36

Y35

W30

Y30

W33

W32

V32

V33

W36

W35

AA22

AB32 AE29 N30 T32

Y22 T22

BGA

CRITICAL

INTREPID-REV2.1

OMIT

R338

1

2

10K

5%

1/16W

MF

402

R357

1 2

1K

5%

402

MF

1/16W

RP33

4 5

22

5%

1/16W

SM1

RP33

3 6

22

5%

1/16W

SM1

RP34

1 8

22

5%

1/16W

SM1

RP34

2 7

22

5%

1/16W

SM1

RP33

2 7

22

5%

1/16W

SM1

RP34

3 6

SM1

22

5%

1/16W

R250

1 2

22

5%

1/16W

MF

402

RP33

1 8

22

5%

1/16W

SM1

RP34

4 5

22

5%

1/16W

SM1

RP36

1 8

22

5%

1/16W

SM1

RP35

4 5

22

5%

SM1

1/16W

RP36

3 6

22

5%

1/16W

SM1

RP36

2 7

22

5%

1/16W

SM1

RP36

4 5

22

5%

1/16W

SM1

RP35

2 7

22

5%

1/16W

SM1

RP35

1 8

22

5%

1/16W

SM1

RP35

3 6

22

5%

1/16W

SM1

RP31

1 8

22

5%

1/16W

SM1

RP25

1 8

22

5%

1/16W

SM1

RP25

2 7

22

5%

1/16W

SM1

RP25

3 6

22

5%

1/16W

SM1

RP25

4 5

22

5%

1/16W

SM1

RP30

1 8

5%

1/16W

SM1

22

RP30

2 7

22

5%

1/16W

SM1

RP31

3 6

22

5%

1/16W

SM1

RP30

4 5

22

5%

1/16W

SM1

RP31

4 5

22

5%

1/16W

SM1

RP31

2 7

22

5%

SM1

1/16W

RP26

4 5

22

5%

1/16W

SM1

RP30

3 6

22

5%

1/16W

SM1

RP26

1 8

22

5%

1/16W

SM1

RP26

2 7

22

5%

1/16W

SM1

RP26

3 6

22

5%

1/16W

SM1

+3V_MAIN

R500

1

2

10K

5%

1/16W

MF

402

R439

1

2

10K

5%

1/16W

MF

402

R409

1

2

10K

5%

1/16W

MF

402

?

341S1556

U17

CRITICAL

IC,BOOTROM,Q41B

1

B

9

45

051-6694

SYSCLK_DDRCLK_B1_L

SYSCLK_DDRCLK_A0_UF

PCI_AD<14> PCI_AD<15> PCI_AD<16>

PCI_AD<25> PCI_AD<26> PCI_AD<27> PCI_AD<28> PCI_AD<29>

PCI_AD<31>

RAM_CKE<0>

ROM_WP_L

ROM_ONBOARD_CS_L

ROM_CS_L

INT_RESET_L

ROM_RW_L

ROM_OE_L

PCI_AD<0> PCI_AD<1>

PCI_AD<10> PCI_AD<11> PCI_AD<12> PCI_AD<13>

PCI_AD<17> PCI_AD<18> PCI_AD<19>

PCI_AD<2>

PCI_AD<20>

PCI_AD<3> PCI_AD<4> PCI_AD<5> PCI_AD<6> PCI_AD<7> PCI_AD<8> PCI_AD<9>

PCI_AD<24>

PCI_AD<30>

INT_MEM_REF_H

INT_MEM_VREF

INT_DDRCLK2_N_TP

INT_DDRCLK2_P_TP

INT_DDRCLK5_P_TP

SYSCLK_DDRCLK_B0_UF SYSCLK_DDRCLK_B0_L_UF SYSCLK_DDRCLK_B1_UF SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_A0_UF

SYSCLK_DDRCLK_A1_UF SYSCLK_DDRCLK_A1_L_UF

INT_DDRCLK5_N_TP

MEM_MUXSEL_L<0>

MEM_DATA<0> MEM_DATA<1> MEM_DATA<2> MEM_DATA<3> MEM_DATA<4> MEM_DATA<5> MEM_DATA<6>

MEM_DATA<8> MEM_DATA<9>

MEM_DATA<11>

MEM_DATA<13> MEM_DATA<14>

MEM_DATA<16> MEM_DATA<17> MEM_DATA<18> MEM_DATA<19> MEM_DATA<20> MEM_DATA<21> MEM_DATA<22> MEM_DATA<23>

MEM_DATA<26>

MEM_DATA<28>

MEM_DATA<30>

MEM_DATA<32> MEM_DATA<33> MEM_DATA<34> MEM_DATA<35> MEM_DATA<36> MEM_DATA<37> MEM_DATA<38> MEM_DATA<39> MEM_DATA<40> MEM_DATA<41> MEM_DATA<42> MEM_DATA<43> MEM_DATA<44> MEM_DATA<45> MEM_DATA<46> MEM_DATA<47> MEM_DATA<48> MEM_DATA<49> MEM_DATA<50> MEM_DATA<51> MEM_DATA<52> MEM_DATA<53>

MEM_DATA<55> MEM_DATA<56> MEM_DATA<57> MEM_DATA<58> MEM_DATA<59> MEM_DATA<60> MEM_DATA<61> MEM_DATA<62> MEM_DATA<63>

MEM_DATA<15>

MEM_DATA<24> MEM_DATA<25>

MEM_DATA<29>

MEM_DATA<31>

MEM_DATA<54>

MEM_BA<0>

MEM_CS_L<1> MEM_CS_L<2>

MEM_DQS<0> MEM_DQS<1>

MEM_DQS<7>

MEM_DQM<2>

MEM_DQM<0> MEM_DQM<1>

MEM_DQM<3> MEM_DQM<4> MEM_DQM<5> MEM_DQM<6> MEM_DQM<7>

MEM_RAS_L MEM_CAS_L

MEM_WE_L MEM_CKE<0> MEM_CKE<1> MEM_CKE<2> MEM_CKE<3>

MEM_MUXSEL_H<0> MEM_MUXSEL_H<1>

MEM_MUXSEL_L<1>

MEM_ADDR<0>

MEM_ADDR<2> MEM_ADDR<3> MEM_ADDR<4> MEM_ADDR<5>

MEM_ADDR<7>

MEM_ADDR<9> MEM_ADDR<10> MEM_ADDR<11> MEM_ADDR<12>

INT_MEM_VREF

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A0

SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A1_L

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B0

RAM_CS_L<0>

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_B0_L_UF

SYSCLK_DDRCLK_B0_L

MEM_CS_L<1> RAM_CS_L<1>

MEM_CS_L<2> RAM_CS_L<2>

MEM_CKE<0>

MEM_CKE<2> RAM_CKE<2>

MEM_CS_L<3> RAM_CS_L<3>

MEM_CKE<1> RAM_CKE<1>

MEM_CKE<3> RAM_CKE<3>

MEM_ADDR<0> RAM_ADDR<0>

MEM_ADDR<2> RAM_ADDR<2>

MEM_ADDR<4> RAM_ADDR<4>

MEM_ADDR<6>

MEM_ADDR<1> RAM_ADDR<1>

MEM_ADDR<3> RAM_ADDR<3>

MEM_ADDR<5> RAM_ADDR<5>

MEM_ADDR<7> RAM_ADDR<7>

MEM_ADDR<8> RAM_ADDR<8>

MEM_ADDR<10> RAM_ADDR<10>

MEM_ADDR<12> RAM_ADDR<12>

MEM_ADDR<9> RAM_ADDR<9>

MEM_ADDR<11> RAM_ADDR<11>

MEM_BA<0> RAM_BA<0>

MEM_BA<1> RAM_BA<1>

RAM_CAS_LMEM_CAS_L

MEM_WE_L RAM_WE_L

RAM_RAS_LMEM_RAS_L

+2_5V_INTREPID

RAM_CKE<3>

RAM_CKE<2>

RAM_CKE<1>

SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_A0_L_UF

MEM_ADDR<1>

MEM_CS_L<3>

MEM_DQS<2> MEM_DQS<3> MEM_DQS<4> MEM_DQS<5> MEM_DQS<6>

MEM_BA<1>

MEM_ADDR<8>

MEM_DATA<7>

MEM_DATA<12>

MEM_ADDR<6>

MEM_CS_L<0>

SYSCLK_DDRCLK_B0_UF

RAM_ADDR<6>

MEM_CS_L<0>

SYSCLK_DDRCLK_A1_UF

RAM_CKE<0>

MEM_DATA<27>

MEM_DATA<10>

40

38

27

39

25

37

40

25

37

16

37

17

11

40

25

31

25

17

39

37

39

37

37 37

37

37 37

37

37 11

37 37

37 11

37 37

37

37 37

15

11

37

11

37

11

9

12

9

25

12

13

12

39

9

10

9

10

9

10

9

11

9

11

9

11

9

11

9

11

9

9 9

9

11

9 9

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

10

9

10

9

10

9

11

9

10

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG

MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH

MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW

SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND

SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND

BIT 32..47

BIT 16..31

BIT 0..15

BIT 48..63

16BIT 2:1 DDR MUXES

C742

1

2

0.1UF

20% 10V CERM 402

C748

1

2

0.1UF

20% 10V CERM 402

C753

1

2

0.1UF

20% 10V CERM 402

C737

1

2

0.1UF

20% 10V CERM 402

C738

1

2

402

CERM

10V

20%

0.1UF

C736

1

2

0.1UF

20% 10V CERM 402

C752

1

2

402

CERM

10V

20%

0.1UF

C747

1

2

0.1UF

20% 10V CERM 402

C741

1

2

0.1UF

20% 10V CERM 402

C743

1

2

0.1UF

20% 10V CERM 402

C727

1

2

402

CERM

10V

20%

0.1UF

C735

1

2

0.1UF

20% 10V CERM 402

U13

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7 K8

K10 H10 F10 D10 B10

A9 B7 A6 A4 A3 A1 C1 E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

CRITICAL

CBTV4020

BGA

U12

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7

K8 K10 H10 F10 D10 B10

A9

B7

A6

A4

A3

A1

C1

E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

CRITICAL

CBTV4020

BGA

U10

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7

K8 K10 H10 F10 D10 B10

A9

B7

A6

A4

A3

A1

C1

E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

CRITICAL

CBTV4020

BGA

U9

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7 K8

K10 H10 F10 D10 B10

A9 B7 A6 A4 A3 A1 C1 E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

CRITICAL

BGA

CBTV4020

R242

1 2

NO STUFF

0

5%

1/16W

MF

402

R252

1 2

NO STUFF

0

5% MF

1/16W

402

R243

1 2

0

5%

1/16W

MF

402

R239

1 2

0

5%

1/16W

MF

402

B

051-6694

10 45

RAM_DATA_B<25>

MEM_DATA<44>

MEM_DATA<47>

MEM_DQS<5>

MEM_DATA<46>

RAM_DATA_B<43>

MEM_DQM<4>

RAM_DATA_B<4>

RAM_DATA_B<13>

RAM_DQS_B<1>

+2_5V_INTREPID

MEM_DQM<5>

RAM_DQM_B<7>

RAM_DQS_B<7>

RAM_DATA_B<59>

RAM_DATA_A<45>

+2_5V_INTREPID

RAM_DATA_A<57>

MEM_DQM<7>

RAM_DATA_A<56>

RAM_DATA_A<48>

RAM_DATA_A<50> RAM_DATA_A<51>

RAM_DATA_A<49>

RAM_DATA_A<53>

RAM_DATA_A<52>

RAM_DATA_A<54> RAM_DATA_A<55> RAM_DQS_A<6> RAM_DQM_A<6>

RAM_MUXSEL_H

MEM_DATA<63>

MEM_DQS<7>

MEM_DATA<62>

MEM_DATA<60> MEM_DATA<61>

MEM_DATA<57> MEM_DATA<58> MEM_DATA<59>

MEM_DATA<56>

MEM_DQM<6>

MEM_DATA<55>

MEM_DATA<54>

MEM_DQS<6>

MEM_DATA<52> MEM_DATA<53>

MEM_DATA<50>

MEM_DATA<49>

MEM_DATA<51>

RAM_DQM_A<7>

MEM_DATA<48>

RAM_DQS_A<7>

RAM_DATA_A<62> RAM_DATA_A<63>

RAM_DATA_A<60> RAM_DATA_A<61>

RAM_DATA_A<59>

RAM_DATA_A<58>

RAM_DATA_B<60> RAM_DATA_B<61> RAM_DATA_B<62> RAM_DATA_B<63>

RAM_DATA_B<53> RAM_DATA_B<54> RAM_DATA_B<55>

RAM_DATA_B<51> RAM_DATA_B<52>

RAM_DQS_B<6> RAM_DQM_B<6> RAM_DATA_B<56> RAM_DATA_B<57> RAM_DATA_B<58>

RAM_DATA_B<50>

RAM_DATA_B<49>

RAM_DATA_B<48>RAM_DATA_A<41>

RAM_DATA_A<40>

RAM_DATA_A<32>

RAM_DATA_A<34> RAM_DATA_A<35>

RAM_DATA_A<33>

RAM_DATA_A<37>

RAM_DATA_A<36>

RAM_DATA_A<38> RAM_DATA_A<39> RAM_DQS_A<4> RAM_DQM_A<4>

RAM_MUXSEL_H

MEM_DATA<45>

MEM_DATA<41> MEM_DATA<42> MEM_DATA<43>

MEM_DATA<40>

MEM_DATA<39>

MEM_DATA<38>

MEM_DQS<4>

MEM_DATA<36> MEM_DATA<37>

MEM_DATA<34>

MEM_DATA<33>

MEM_DATA<35>

RAM_DQM_A<5>

MEM_DATA<32>

RAM_DQS_A<5>

RAM_DATA_A<46> RAM_DATA_A<47>

RAM_DATA_A<44>

RAM_DATA_A<43>

RAM_DATA_A<42>

RAM_DATA_B<44> RAM_DATA_B<45> RAM_DATA_B<46> RAM_DATA_B<47> RAM_DQS_B<5> RAM_DQM_B<5>

RAM_DATA_B<37> RAM_DATA_B<38> RAM_DATA_B<39>

RAM_DATA_B<35> RAM_DATA_B<36>

RAM_DQS_B<4> RAM_DQM_B<4> RAM_DATA_B<40> RAM_DATA_B<41> RAM_DATA_B<42>

RAM_DATA_B<34>

RAM_DATA_B<33>

RAM_DATA_B<32>

RAM_DATA_A<25>

MEM_DQM<3>

RAM_DATA_A<24>

RAM_DATA_A<16>

RAM_DATA_A<18> RAM_DATA_A<19>

RAM_DATA_A<17>

RAM_DATA_A<21>

RAM_DATA_A<20>

RAM_DATA_A<22> RAM_DATA_A<23> RAM_DQS_A<2> RAM_DQM_A<2>

RAM_MUXSEL_L

MEM_DATA<31>

MEM_DQS<3>

MEM_DATA<30>

MEM_DATA<28> MEM_DATA<29>

MEM_DATA<25> MEM_DATA<26> MEM_DATA<27>

MEM_DATA<24>

MEM_DQM<2>

MEM_DATA<23>

MEM_DATA<22>

MEM_DQS<2>

MEM_DATA<20> MEM_DATA<21>

MEM_DATA<18>

MEM_DATA<17>

MEM_DATA<19>

RAM_DQM_A<3>

MEM_DATA<16>

RAM_DQS_A<3>

RAM_DATA_A<31>

RAM_DATA_A<28>

RAM_DATA_A<27>

RAM_DATA_A<26>

RAM_DATA_B<27> RAM_DATA_B<28> RAM_DATA_B<29> RAM_DATA_B<30> RAM_DATA_B<31> RAM_DQS_B<3> RAM_DQM_B<3>

RAM_DATA_B<21> RAM_DATA_B<22> RAM_DATA_B<23>

RAM_DATA_B<19> RAM_DATA_B<20>

RAM_DQS_B<2> RAM_DQM_B<2> RAM_DATA_B<24>

RAM_DATA_B<26>

RAM_DATA_B<18>

RAM_DATA_B<17>

RAM_DATA_B<16>

RAM_DATA_A<9>

MEM_DQM<1>

RAM_DATA_A<8>

RAM_DATA_A<0>

RAM_DATA_A<2> RAM_DATA_A<3>

RAM_DATA_A<1>

RAM_DATA_A<5>

RAM_DATA_A<4>

RAM_DATA_A<6> RAM_DATA_A<7> RAM_DQS_A<0> RAM_DQM_A<0>

RAM_MUXSEL_L

MEM_DATA<15>

MEM_DQS<1>

MEM_DATA<14>

MEM_DATA<12> MEM_DATA<13>

MEM_DATA<9> MEM_DATA<10> MEM_DATA<11>

MEM_DATA<8>

MEM_DQM<0>

MEM_DATA<7>

MEM_DATA<6>

MEM_DQS<0>

MEM_DATA<4>

MEM_DATA<5>

MEM_DATA<2>

MEM_DATA<1>

MEM_DATA<3>

RAM_DQM_A<1>

MEM_DATA<0>

RAM_DQS_A<1>

RAM_DATA_A<14> RAM_DATA_A<15>

RAM_DATA_A<12> RAM_DATA_A<13>

RAM_DATA_A<11>

RAM_DATA_A<10>

RAM_DATA_B<11> RAM_DATA_B<12>

RAM_DATA_B<14> RAM_DATA_B<15>

RAM_DQM_B<1>

RAM_DATA_B<5> RAM_DATA_B<6> RAM_DATA_B<7>

RAM_DATA_B<3>

RAM_DQS_B<0> RAM_DQM_B<0> RAM_DATA_B<8> RAM_DATA_B<9> RAM_DATA_B<10>

RAM_DATA_B<2>

RAM_DATA_B<1>

RAM_DATA_B<0>

RAM_MUXSEL_L

MEM_MUXSEL_L<1>

RAM_MUXSEL_H

MEM_MUXSEL_H<1>

RAM_MUXSEL_L

MEM_MUXSEL_L<0>

RAM_MUXSEL_H

MEM_MUXSEL_H<0>

+2_5V_INTREPID

RAM_DATA_A<29> RAM_DATA_A<30>

+2_5V_INTREPID

39 39

39

16 16

16

15 15

15

37

10

37

10

37

37 37

37

37 37

10

37

10

11

9

11

9

11

9

11

9

11

9

11

10

9

11

9

11

11 11

11

10

9

11

9

11

9

11

10

9

11

9

11

9

11

10

9

11

9

11

10

9

10

9

10

9

10

9

11

9

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

DQ58

RFU18

KEY

VREF0

VDD0

DQ0 DQ1

VSS0

DQS0

VSS2

DQ3 DQ8

DQ2

VDD2

VSS4

DQS1

DQ10

DQ9

DQ11

CK0 CK0* VSS7

VDD4

DQ16

DQ18

VDD7

DQ17

DQS2

VSS9

DQ25

VDD9

DQ24

DQ19

DQS3

VDD11

DQ27

DQ26

VSS11

RFU0

VDD13

RFU4

VSS13

RFU2

RFU6

RFU13

RFU12

RFU8

RFU10 VSS15

A9

CKE1

RFU14

VDD16

A1

A5

A7

VSS18

A3

BA0

VDD18

S0*

WE*

A10_AP

DQ33

VSS20

DQ32

VDD20

RFU16

DQS4 DQ34

VSS22

DQ35 DQ40

VDD22

DQ41 DQS5

VSS24

DQ42 DQ43

DQ48

VSS26

VDD26

VDD24

VSS27

VSS29

DQ50

DQ49

DQS6

VDD27

DQS7

DQ51

VDD29

DQ56

DQ57

SDA

VDD31

VSS31

DQ59

VDDSPD

SCL

RFU19

VDD32

VSS28

CK1

DQ52

VDD28 DM6 DQ54 VSS30

DM7

DQ55 DQ60 VDD30 DQ61

DQ53

SA1 SA2

SA0

DQ63

DQ62

VSS32

VSS25

DM5

DQ45

VDD23

VDD21

VSS21 DQ36

RFU17

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RAS* CAS* S1*

DQ46 DQ47

CK1*

VDD25

RFU7

RFU5

VDD14

VSS17 VDD15

CKE0 RFU15

VDD17

A11 A8

RFU11 VSS16

RFU9

VSS19

A0

A2

A4

A6

BA1

VDD19

VDD12

VSS12

DQ31

DQ30

DM3

DQ22

DQ21 VDD8

DQ20

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

VSS6 VSS8

RFU1

VSS14

RFU3

VREF1

DQ5

DQ4

DM0 DQ6

DQ12

DQ7

VSS3

VSS1

VDD1

VDD3

DM1 VSS5 DQ14

DQ13

DQ15 VDD5 VDD6

A12

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

NC NC

NC

NC NC

NC

REVERSED SLOT "B" CUSTOMER SLOT

NC NC

DDR VREF

ONE 0.1UF PER SLOT

DDR BYPASS CAPS

SLOT "A"

FOR RETURN CURRENT

SLOT "B"

NC

STANDARD SLOT "A"

FACTORY SLOT

ADDR=0XA0(WR)/0XA1(RD)

ADDR=0XA2(WR)/0XA3(RD)

NC

DDR SODIMM CONNS

J19

112111

115

10099

110109

108107

106105

102101

117

116

120

35 37

160

158

9695

12

26

48

62

134

148

170

184

5 7

29 31

20

24

30 32

41 43

49

53

13

42 44

50

54

55

59

65 67

56

60

17

66 68

127 129

135

139

128 130

136

140

6

141

145

151 153

142

146

152 154

163 165

8

171

175

164 166

172

176

177

181

187 189

14

178

182

188 190

18

19

23

11

25

47

61

133

147

169

183

201

202

118

71 72

85 86

89 91

97 98

123 124

199 200

73 74

77 78 79 80

83 84

121 122

194 196 198

195

193

9 10

58

69 70

81 82

92

93 94

113 114

21

131 132

143 144

155 156 157

167 168

179

22

180

191 192

33 34

36

45 46

57

197

1 2 3 4

52

63 64

75 76

87 88

90

103 104

15

125 126

137 138

149 150

159 161 162

173

16

174

185 186

27 28

38

39 40

51

119

AS0A42-D2S

F-RT-SM

CRITICAL

C602

1

2

10UF

6.3V

20% CERM

805

C601

1

2

10UF

20%

6.3V CERM 805

J22

112 111

115

100 99

110 109

108 107

106 105

102 101

117

116

120

35 37

160

158

96 95

12

26

48

62

134

148

170

184

5 7

29 31

20

24

30 32

41 43

49

53

13

42 44

50

54

55

59

65 67

56

60

17

66 68

127 129

135

139

128 130

136

140

6

141

145

151 153

142

146

152 154

163 165

8

171

175

164 166

172

176

177

181

187 189

14

178

182

188 190

18

19

23

11

25

47

61

133

147

169

183

201

202

118

7172

8586

89 91

9798

123124

199200

7374

7778 7980

8384

121122

194 196 198

195

193

910

58

6970

8182

92

9394

113114

21

131132

143144

155156 157

167168

179

22

180

191192

3334

36

4546

57

197

12 34

52

6364

7576

8788

90

103104

15

125126

137138

149150

159 161162

173

16

174

185186

2728

38

3940

51

119

AS0A42-D2R

F-RT-SM

CRITICAL

C530

1

2

10UF

20%

6.3V CERM 805

C589

1

2

10UF

20%

6.3V CERM 805

R449

1

2

1K

1% 1/16W MF 402

R440

1

2

1K

1% 1/16W MF 402

C542

1

2

402

CERM

10V

20%

0.1UF

C482

1

2

0.1UF

20% 10V CERM 402

+2_5V_MAIN+2_5V_MAIN

+2_5V_MAIN +2_5V_MAIN

+2_5V_MAIN

+3V_MAIN

C573

1

2

0.1UF

20% 10V

CERM

402

C526

1

2

402

CERM

10V

20%

0.1UF

C525

1

2

0.1UF

20% 10V CERM 402

+3V_MAIN

C490

1

2

0.1UF

20% 10V CERM 402

C527

1

2

0.1UF

20% 10V CERM 402

C481

1

2

0.1UF

20% 10V CERM 402

C523

1

2

402

CERM

10V

20%

0.1UF

C549

1

2

0.1UF

20% 10V

402

CERM

C524

1

2

0.1UF

20% 10V CERM 402

C595

1

2

402

CERM

10V

20%

0.1UF

C522

1

2

0.1UF

20% 10V CERM 402

C597

1

2

0.1UF

20% 10V CERM 402

C489

1

2

0.1UF

20%

CERM

10V 402

+3V_MAIN

C594

1

2

0.1UF

20% 10V CERM 402

C596

1

2

0.1UF

10V

20% CERM

402

C548

1

2

0.1UF

20% 10V CERM 402

C565

1

2

0.1UF

20%

10V

CERM 402

C550

1

2

0.1UF

20% 10V CERM 402

C551

1

2

0.1UF

10V

20% CERM

402

C761

1

2

402

CERM

10V

20%

0.1UF

B

11 45

051-6694

RAM_CS_L<0>

RAM_DATA_A<20>

RAM_DATA_B<2>

RAM_DQM_B<2>

RAM_DATA_B<21>

RAM_DATA_B<20>

RAM_CS_L<2>

RAM_DATA_B<1>

RAM_DQS_B<0>

RAM_DATA_A<21>

RAM_DATA_B<19> RAM_DATA_B<24>

RAM_DATA_B<18>

RAM_DQS_B<2>

RAM_DATA_B<17>

RAM_DATA_B<16>

SYSCLK_DDRCLK_B0_L

SYSCLK_DDRCLK_B0

RAM_DATA_B<11>

RAM_DATA_B<10>

RAM_ADDR<12>

RAM_DATA_B<35>

RAM_DATA_B<34>

RAM_DQS_B<4>

RAM_DATA_B<33>

RAM_DATA_B<32>

RAM_WE_L

RAM_BA<0>

RAM_ADDR<10>

RAM_ADDR<1>

RAM_ADDR<3>

RAM_ADDR<5>

RAM_ADDR<7>

RAM_ADDR<9>

RAM_CKE<3>

RAM_DATA_B<27>

RAM_DATA_B<26>

RAM_DQS_B<3>

RAM_DATA_B<25>

RAM_DQS_B<5>

RAM_DATA_B<41>

RAM_DATA_B<40>

DDR_VREF

RAM_DATA_A<61>

RAM_DATA_A<62>

RAM_DQM_A<7>

RAM_DATA_A<60>

RAM_DATA_A<55>

RAM_DQM_A<6> RAM_DATA_A<54>

RAM_DATA_A<53>

RAM_DATA_A<52>

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A1_L

RAM_DATA_A<47>

RAM_DATA_A<46>

RAM_DQM_A<5>

RAM_DATA_A<45>

RAM_DATA_A<39> RAM_DATA_A<44>

RAM_DATA_A<38>

RAM_DQM_A<4>

RAM_DATA_A<36> RAM_DATA_A<37>

RAM_CS_L<1>

RAM_RAS_L RAM_CAS_L

RAM_BA<1>

RAM_ADDR<0>

RAM_ADDR<4> RAM_ADDR<2>

RAM_ADDR<6>

RAM_ADDR<8>

RAM_ADDR<11>

RAM_CKE<0>

RAM_DATA_A<30>

RAM_DQM_A<3>

RAM_DATA_A<29>

RAM_DATA_A<28>

RAM_DATA_A<23>

RAM_DATA_A<22>

RAM_DATA_A<15>

RAM_DATA_A<14>

RAM_DQM_A<1>

RAM_DATA_A<13>

RAM_DATA_A<7>

RAM_DATA_A<12>

RAM_DATA_A<6>

RAM_DQM_A<0>

RAM_DATA_A<5>

RAM_DATA_A<4>

DDR_VREF

INT_I2C_CLK0

INT_I2C_DATA0

RAM_DATA_A<59>

RAM_DATA_A<58>

RAM_DQS_A<7>

RAM_DATA_A<57>

RAM_DATA_A<56>

RAM_DATA_A<51>

RAM_DQS_A<6> RAM_DATA_A<50>

RAM_DATA_A<49>

RAM_DATA_A<48>

RAM_DATA_A<43>

RAM_DQS_A<5>

RAM_DATA_A<42>

RAM_DATA_A<41>

RAM_DATA_A<35> RAM_DATA_A<40>

RAM_DQS_A<4> RAM_DATA_A<34>

RAM_DATA_A<32> RAM_DATA_A<33>

RAM_BA<0> RAM_WE_L

RAM_ADDR<10>

RAM_ADDR<1>

RAM_ADDR<5> RAM_ADDR<3>

RAM_ADDR<7>

RAM_ADDR<9>

RAM_ADDR<12>

RAM_CKE<1>

RAM_DATA_A<27>

RAM_DATA_A<26>

RAM_DQS_A<3>

RAM_DATA_A<24>

RAM_DATA_A<25>

RAM_DATA_A<19>

RAM_DATA_A<18>

RAM_DQS_A<2>

RAM_DATA_A<17>

RAM_DATA_A<16>

SYSCLK_DDRCLK_A0 SYSCLK_DDRCLK_A0_L

RAM_DATA_A<11>

RAM_DQS_A<1>

RAM_DATA_A<10>

RAM_DATA_A<9>

RAM_DATA_A<3> RAM_DATA_A<8>

RAM_DATA_A<2>

RAM_DQS_A<0>

RAM_DATA_A<1>

RAM_DATA_A<0>

DDR_VREF

RAM_DATA_A<63>

RAM_DQM_A<2>

RAM_DATA_A<31>

DDR_VREF

RAM_DATA_B<0>

RAM_DATA_B<3> RAM_DATA_B<8>

RAM_DATA_B<9>

RAM_DQS_B<1>

RAM_DATA_B<42> RAM_DATA_B<43>

RAM_DATA_B<48> RAM_DATA_B<49>

RAM_DATA_B<50>

RAM_DQS_B<6>

RAM_DATA_B<56>

RAM_DATA_B<51>

RAM_DQS_B<7>

RAM_DATA_B<57>

RAM_DATA_B<58> RAM_DATA_B<59>

INT_I2C_DATA0

INT_I2C_CLK0

RAM_DATA_B<62>

RAM_DQM_B<7>

RAM_DATA_B<61>

RAM_DATA_B<63>

RAM_DATA_B<60>

RAM_DATA_B<55>

RAM_DQM_B<6> RAM_DATA_B<54>

RAM_DATA_B<53>

RAM_DATA_B<52>

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B1_L

RAM_DATA_B<45> RAM_DQM_B<5>

RAM_DATA_B<44>

RAM_DATA_B<39>

RAM_DATA_B<46> RAM_DATA_B<47>

RAM_DATA_B<38>

RAM_DQM_B<4>

RAM_DATA_B<37>

RAM_DATA_B<36>

RAM_CAS_L

RAM_RAS_L

RAM_CS_L<3>

RAM_ADDR<4>

RAM_ADDR<0>

RAM_ADDR<6>

RAM_ADDR<8>

RAM_ADDR<11>

RAM_ADDR<2>

RAM_BA<1>

RAM_CKE<2>

RAM_DATA_B<31>

RAM_DQM_B<3>

RAM_DATA_B<30>

RAM_DATA_B<29>

RAM_DATA_B<28>

RAM_DATA_B<23>

RAM_DATA_B<15>

RAM_DATA_B<14>

RAM_DATA_B<13> RAM_DQM_B<1>

RAM_DATA_B<12>

RAM_DATA_B<7>

RAM_DATA_B<6>

RAM_DQM_B<0>

RAM_DATA_B<5>

RAM_DATA_B<4>

DDR_VREF

RAM_DATA_B<22>

40

23

37

13

37

13

37

11

37

11

37

39

37

11

37

39

11

37

11

37

39

37

39

37

11

37

11

37

11

37

39

37

9

10

9

10

9

10

9

10

9

10

11

10

9

10

9

10

11

6

10

9

10

9

10

11

10

11

10

6

10

9

10

9

10

11

10

(PLL4)

VDD15A_6

(PLL4) VSSA_6

ROM_WE

ROM_OE

PCI_STOP PCI_DEVSEL

PCI_CBE_3

PCI_CBE_2

PCI_CBE_1

PCI_CBE_0

ROM_CS

PCI_CLK_IN

PCI_CLK_OUT

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_FRAME

PCI_PAR

PCI_TRDY PCI_IRDY

PCI_REQ_2

PCI_REQ_1

PCI_REQ_0

PCI_GNT_0 PCI_GNT_1 PCI_GNT_2

PCI/ROM

INTERFACE

PCIAD_31

PCIAD_30

PCIAD_28

PCIAD_27

PCIAD_26

PCIAD_25

PCIAD_29

PCIAD_19

PCIAD_18

PCIAD_17

PCIAD_16

PCIAD_15

PCIAD_23 PCIAD_24

PCIAD_20 PCIAD_21 PCIAD_22

PCIAD_14

(7 OF 9)

PCIAD_11

PCIAD_10

PCIAD_12 PCIAD_13

PCIAD_9

PCIAD_6

PCIAD_5

PCIAD_7 PCIAD_8

PCIAD_4

PCIAD_3

PCIAD_1 PCIAD_2

PCIAD_0

ROM_OVRLY_EN

VSSA_5 (PLL5)

(PLL5)

VDD15A_5

STP_AGP AGPPVT AGPVREF0 AGPVREF1

AGP_BUSY AGP_CLK AGP_FB_IN AGP_FB_OUT

AGPAD0

AGPREQ AGPGNT

AGP_SBA3

AGP_SBA2

AGP_SBA1

AGP_SBA0

AGPCBE_3

AGPFRAME

AGPTRDY AGPIRDY AGPSTOP

AGPDEVSEL

AGPPAR

AGPAD31

AGPAD30

AGPCBE_0 AGPCBE_1 AGPCBE_2

AGP_ST2

AGP_AD_STB0_P AGP_AD_STB0_N AGP_AD_STB1_P AGP_AD_STB1_N

AGPPIPE

AGPRBF

AGP_ST1

AGP_SBA7

AGP_SB_STB_P AGP_SB_STB_N

AGP_ST0

AGP_WBF

AGP

INTERFACES

AGP_SBA6

AGP_SBA5

AGP_SBA4

AGPAD29

AGPAD28

AGPAD27

AGPAD26

AGPAD25

AGPAD24

AGPAD23

AGPAD22

AGPAD21

AGPAD20

AGPAD19

AGPAD18

AGPAD17

AGPAD16

AGPAD15

AGPAD14

AGPAD13

AGPAD12

AGPAD11

AGPAD10

AGPAD9

AGPAD8

AGPAD7

AGPAD6

AGPAD5

AGPAD4

AGPAD3

AGPAD2

AGPAD1

(3 OF 9)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SIMPLY PROVIDING REFERENCE TO CHIP BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS

VOUT = 3.3V

VIN = 1.5V (CORE)

OUTPUT IMPEDANCE IS ABOUT 20OHM

PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE

PCI PULL-UPS

USB2 AND CBUS REQ REMAINS ON +3V_MAIN BECAUSE THESE CHIPS ARE POWERED IN SLEEP

PLACE CLOSE TO INTREPID SIDE

SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS

(PLACE CLOSE TO INTREPID AGP BALLS)

AGP I/O REFERENCE

Vin = Vcore (1.5V) Vout = AGPIO (1.5V)

AGP PULL-UPS/PULL DOWNS

Need divider for 3.3V slot!

AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP

use 52-ohm a resistor here.

NOTE: Designs using AGP slot should

INTREPID AGP/PCI

402

1/16W

MF

5%

4.7

R146

1 2

0

5%

1/16W

MF

402

R217

1 2

402

MF

1/16W

1%

60.4

R209

1

2

SM1

1/16W

5%

10K

RP22

1 8

SM1

1/16W

5%

10K

RP20

1 8

SM1

1/16W

5%

10K

RP19

1 8

SM1

1/16W

5%

10K

RP19

2 7

402

MF

1/16W

5%

4.7

R112

1 2

402

CERM

6.3V

20%

0.22UF

C83

1

2

CRITICAL

BGA

INTREPID-REV2.1

OMIT

U45

AM10 AR8

AR10 AT9 AR11 AM12 AN12 AK11 AT11 AT10 AN13 AM13

AK12

AR12 AJ11 AT12 AM11 AR13 AK15 AH15 AN14 AT13 AK14

AJ8

AN15 AM15

AN10 AT8 AN11 AH13 AK13 AR9

AR14 AK16 AM16 AJ15

AR18 AH18 AT18

AJ19

AM18

AM17

AN16

AT16 AN18 AN17

AH16

AT14

AR17 AR16 AT17

AR15

AT15

AM9 AR7

AK17

AN9

J11

J10

402

MF

1/16W

5%

33

R192

1 2

402

MF

1/16W

5%

33

R147

1 2

402

MF

1/16W

5%

33

R171

1 2

MF

402

1/16W

5%

47

R186

1

2

+3V_SLEEP

SM1

1/16W

5%

10K

RP18

1 8

SM1

1/16W

5%

10K

RP17

3 6

SM1

1/16W

5%

10K

RP17

1 8

SM1

1/16W

5%

10K

RP17

2 7

SM1

1/16W

5%

10K

RP18

3 6

SM1

1/16W

5%

10K

RP17

4 5

SM1

1/16W

5%

10K

RP18

4 5

SM1

1/16W

5%

10K

RP18

2 7

22

5%

1/16W

MF

402

R77

1 2

22

5%

1/16W

MF

402

R82

1 2

402

MF

1/16W

5%

22

R103

1 2

402

MF

1/16W

5%

33

R169

1 2

402

MF

1/16W

5%

22

NEC_USB

R157

1 2

+3V_MAIN

402

MF

1/16W

5%

10K

R187

1 2

402

MF

1/16W

5%

10K

R230

1 2

402

MF

1/16W

5%

10K

R193

1 2

402

MF

1/16W

5%

10K

R170

1 2

402

MF

1/16W

5%

10K

R194

1 2

1/16W

402

MF

5%

10K

R216

1 2

402

MF

1/16W

1%

4.99K

R185

1

2

402

MF

1/16W

1%

4.99K

R180

1

2

402

CERM

6.3V

20%

0.22UF

C247

1

2

SM1

1/16W

5%

10K

RP20

4 5

SM1

1/16W

5%

10K

RP22

2 7

SM1

1/16W

5%

10K

RP20

2 7

SM1

1/16W

5%

10K

RP19

3 6

SM1

1/16W

5%

10K

RP19

4 5

SM1

1/16W

5%

10K

RP20

3 6

1/16W

SM1

5%

10K

RP22

4 5

SM1

1/16W

5%

10K

RP22

3 6

INTREPID-REV2.1

CRITICAL

BGA

OMIT

U45

AR19 AM19

AR22 AN22 AM22 AN23 AR23 AT24 AM23 AR24 AT25 AR25

AT20

AM24 AN25 AL24 AR26 AT26 AM25 AN26 AM26 AR27 AT27

AR20

AR28 AN27

AT21 AN20 AR21 AN21 AM21 AT22

AM20 AT23 AN24 AL25

AM27

AN28

AM29

AT28

AT29

AJ29

AJ24

AK24

AT33

AM28

AR29

AB20 AB21

AK19

AK20

AK22

AK21

AT19

AK28 AK27 AK25

AT32 AR32 AM31 AN31 AR31 AT31 AM30 AN30

AG25

AH25

AN29 AT30 AR30

AK30

AN19

V14

V13

402

CERM

6.3V

20%

0.22UF

C160

1

2

051-6694

45

12

B

AGP_CBE<3>

AGP_IRDY_L

AGP_SBA<0>

AGP_TRDY_L

AGP_CBE<2>

AGP_CBE<0>

STOP_AGP_L

PCI_AD<21> PCI_AD<22>

CLK33M_USB2_UF

INT_PCI_FB_IN

PCI_AD<3> PCI_AD<4>

PCI_AD<30> PCI_AD<31>

PCI_AD<29>

PCI_AD<28>

AGP_AD<4>

AGP_AD<6> AGP_AD<7>

AGP_RBF_L

AGP_AD<24>

CBUS_PCI_REQ_L

USB2_PCI_REQ_L

AIRPORT_PCI_REQ_L

INT_ROM_RW_L ROM_RW_L

INT_ROM_OE_L ROM_OE_L

INT_ROM_CS_L ROM_CS_L

INT_AGP_VREF

+1_5V_AGP

INT_AGP_FB_OUT

INT_AGP_FB_IN

CLK66M_AGP_15V_TP

AGP_SB_STB_L

AGP_AD_STB_L<1>

AGP_SB_STB

+1_5V_AGP

AGP_AD_STB<0>

AGP_STOP_L

AGP_WBF_L

AGP_IRDY_L

AGP_AD_STB_L<0>

AGP_AD_STB<1>

AGP_PIPE_L

AGP_TRDY_L

AGP_DEVSEL_L

AGP_REQ_L

AGP_FRAME_L

+3V_GPU

STOP_AGP_L

AGP_GNT_L

AGP_BUSY_L

+1_5V_INTREPID_PLL

AGP_WBF_L

AGP_RBF_L

AGP_PIPE_L

AGP_AD_STB_L<0>

AGP_AD_STB<0>

AGP_AD_STB_L<1>

AGP_AD_STB<1>

AGP_ST<1> AGP_ST<2>

AGP_ST<0>

AGP_SB_STB_L

AGP_SB_STB

AGP_SBA<7>

AGP_SBA<6>

AGP_SBA<5>

AGP_SBA<4>

AGP_SBA<3>

AGP_SBA<2>

AGP_DEVSEL_L

AGP_STOP_L

AGP_FRAME_L

AGP_PAR

AGP_CBE<1>

AGP_AD<31>

AGP_AD<30>

AGP_AD<29>

AGP_AD<28>

AGP_AD<27>

AGP_AD<26>

AGP_AD<25>

AGP_AD<23>

AGP_AD<22>

AGP_AD<21>

AGP_AD<20>

AGP_AD<19>

AGP_AD<18>

AGP_AD<17>

AGP_AD<16>

AGP_AD<15>

AGP_AD<14>

AGP_AD<13>

AGP_AD<12>

AGP_AD<11>

AGP_AD<10>

AGP_AD<9>

AGP_AD<8>

AGP_AD<5>

AGP_AD<3>

AGP_AD<2>

AGP_AD<1>

AGP_AD<0>

INT_AGP_VREF

AGP_BUSY_L

AGP_GNT_L

AGP_REQ_L

AGP_SBA<1>

+1_5V_INTREPID_PLL5

INT_AGPPVT

+1_5V_AGP

PCI_FRAME_L

PCI_DEVSEL_L

PCI_IRDY_L

PCI_TRDY_L

PCI_STOP_L

+1_5V_INTREPID_PLL

PCI_AD<0> PCI_AD<1> PCI_AD<2>

PCI_AD<5> PCI_AD<6>

PCI_AD<8>

PCI_AD<7>

PCI_AD<10> PCI_AD<11>

PCI_AD<9>

PCI_AD<13>

PCI_AD<12>

PCI_AD<16>

PCI_AD<14> PCI_AD<15>

PCI_AD<18>

PCI_AD<17>

PCI_AD<20>

PCI_AD<19>

PCI_AD<23> PCI_AD<24> PCI_AD<25> PCI_AD<26> PCI_AD<27>

+1_5V_INTREPID_PLL6

AIRPORT_PCI_REQ_L CBUS_PCI_REQ_L USB2_PCI_REQ_L

USB2_PCI_GNT_L

AIRPORT_PCI_GNT_L CBUS_PCI_GNT_L

PCI_PAR

PCI_IRDY_L

PCI_FRAME_L PCI_TRDY_L

PCI_STOP_L PCI_DEVSEL_L

PCI_CBE<0> PCI_CBE<1> PCI_CBE<2> PCI_CBE<3>

INT_ROM_OE_L

INT_ROM_CS_L

INT_ROM_RW_L

CLK33M_AIRPORT_UF

CLK33M_AIRPORT

INT_PCI_FB_OUT

CLK33M_USB2

CLK66M_GPU_AGP_UF

CLK66M_GPU_AGP

CLK33M_CBUS_UF

CLK33M_CBUS

39

40

21

40

38

19

38

40

38

40

38

40

38

27

18

39

18

27

39

27

38

27

38

27

38

27

25

38

40

39

16

38

16

38

21

38

14

38

39

38

16

25

14

25

17

25

27

25

40

27

25

27

40

38

18

38

18

38

25

9

17

38

18

38

17

27

25

18

15

18

15

18

19

18

12

18

38

18

38

18

38

15

17

12

17

9

17

25

17

25

17

27

40

25

17

25

37

18

12

18

12

18

12

17

37

17

9

18

12

18

12

9

12

9

12

9

12

37

12

18

12

8

12

18

12

18

12

18

12

18

39

12

8

9

25

9

17

9

39

12

27

25

17

12

17

12

37

25

37

27

37

18

37

17

CS_CE2

CS_CE1

CS_IORD CS_IOWR

ATA_CS1

ATA_CS0

IDE

IDEINTRQ

IDECHRDY

IDECS0 IDECS1

IDEDMACK IDEDMARQ

IDERD

IDEWR

IDERST

IDEA9

IDEA8

IDEA7

IDEA6

IDEA5

IDEA4

IDEA3

IDEA2

IDEA1

IDEA0

IDEDD15

IDEDD14

IDEDD13

IDEDD12

IDEDD11

IDEDD10

IDEDD9

IDEDD8

IDEDD7

IDEDD6

IDEDD5

IDEDD4

IDEDD3

IDEDD2

IDEDD1

IDEDD0

CARDSLOT

CS_WAIT

CS_OE CS_WE

ATA_INTRQ

ATA_DMARQ

ATA_CHRDY

ATA_DMACK

ATA_RD

ATA_WR

ATA_RST

ATA_VREF

UATA100

ATA_A1 ATA_A2

ATA_A0

ATA_D12

ATA_D11

ATA_D15

ATA_D14

ATA_D13

ATA_D10

ATA_D9

ATA_D3

ATA_D2

ATA_D1

ATA_D0

ATA_D4

ATA_D8

ATA_D7

ATA_D6

ATA_D5

(5 OF 9)

IICDATA_1

IICCLK_1

IICCLK_0 IICDATA_0

TST_PLLEN

TST_MONOUT

TST_MONIN

TEI

TRSTN

TMS

TCK

TDO

TDI

TEST

MDC

GBE_REFCLK

MDIO

COL

CRS

GTX_CLK

RXD_6

RXD_4 RXD_5

RXD_3

RXD_7

RXD_2

RXD_1

RX_ER

RX_DV

RX_CLK

RXD_0

FW_PINT

FW_LINKON

FWR_LCLK

TX_ER

TX_EN

TX_CLK

TXD_0

RESET

PURESET

PHY_LPS PHY_CTL0 PHY_CTL1 PHY_LREQ FWR_PCLK

(4 OF 9)

MISC

TXD_3

TXD_2

TXD_1

TXD_4 TXD_5 TXD_6 TXD_7

GB ETHERNET

FIREWIRE

PHY_DATA0 PHY_DATA1 PHY_DATA2 PHY_DATA3

PHY_DATA5

PHY_DATA7

PHY_DATA4

PHY_DATA6

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

INT - ENET/FW/UATA

EXTPLL

58-WR

ENET_TXD SERIES TERMINATION

EIDE/I2C

CS_WAIT IS AN INPUT

B1-RD

MMM

6B-RD

6A-WR

NOT USING CARDSLOT INTERFACE

DESCRIPTION

JTAG MODE

NORMAL OPERATION VIEW PLLS (SOFTWARE)

VIEW PLLS (HARDWARE) ATPG NORMAL

ATPG IDDQ TEST TRI-STATE

FUNCTIONAL TEST WITHOUT POSTSCALAR BYPASS

FUNCTIONAL TEST WITH POSTSCALAR BYPASS

FUNCTIONAL TEST IDDQ

X(I)

BYPASS

SYNC/MEM DATA

PLL OUTPUTS

SELECTED

PLL OUTPUTS

SELECTED

(OUTPUT)

X

ANALYZER_CLK

TST_PLLEN_H

X

0 1 1

0

MEMWE

1 0 1 X

1(I)

0(I)

1(I)

0(I)

1(I)

0(I)

(OUTPUT)

TPDENABLE

DDR_

X

(I/O)

JTG_TDI_H

(I/O)

JTG_TDO_H

TST_TEI_H

X X

(OUTPUT)

SHUTDOWN

(INPUT)

TESTSEL5

HWPLL_

(OUTPUT)

0 0

0(I) 0(I) 0(I) 1(I) 1(I) 1(I)

0 1

1 1 1 1 10

0

1

JTG_RSTN_L

ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES

PMU

I2C-2

I2C-1I2C-0

BUS

ADDR

A0-WR A1-RD A2-WR A3-RD AC-WR AD-RD AE-WR AF-RD 84-WR 85-RD

59-RD

D0-WR D1-RD B0-WR

N/A

N/A N/AN/A

N/A

U56 - PG 15

CLOCK SLEW SSCG

N/AN/A

N/A

U36 - PG 23

LMU

U37 - PG 23

BOOTBANG E2PROM

N/A

J23 - PG 12

RAM - REVERSED

U3 - PG 24

FAN CONTROLLER

N/A

J20 - PG 12

RAM - STANDARD

(MAIN) (MAIN)

J12 - PG 24

SNAPPER SOUND

N/A

N/AN/A

J9 - PG 25

DASH MODEM

N/A

N/AN/A

N/A N/A

(SLEEP)

I2C PULL-UPS

TEST PULL-UPS/DOWNS

UDMA - STOP UDMA - HOSTDMARDY/HSTROBE UDMA - DEVICEDMARDY/DSTROBE

R629

1 2

402

MF

1/16W

5%

1K

RP16

1 8

SM1

1/16W

5%

10K

R621

1 2

402

MF

1/16W

5%

10K

R52

1

2

402

MF

1/16W

5%

10K

RP15

2 7

SM1

1/16W

5%

22

RP14

4 5

SM1

1/16W

5%

22

RP14

3 6

SM1

1/16W

5%

22

RP14

1 8

SM1

1/16W

5%

22

RP14

2 7

SM1

1/16W

5%

22

RP15

3 6

SM1

1/16W

5%

22

RP15

1 8

SM1

1/16W

5%

22

RP15

4 5

SM1

1/16W

5%

22

+3V_MAIN

R117

2 1

402

MF

1/16W

5%

10K

+3V_MAIN

R626

1 2

402

MF

1/16W

5%

1K

RP12

2 7

SM1

1/16W

5%

2.2K

RP12

1 8

SM1

1/16W

5%

2.2K

RP12

4 5

SM1

1/16W

5%

2.2K

RP12

3 6

SM1

1/16W

5%

2.2K

RP16

3 6

SM1

1/16W

5%

10K

RP16

2 7

SM1

1/16W

5%

10K

RP16

4 5

SM1

1/16W

5%

10K

R154

1

2

1K

1% 1/16W

MF 402

U45

Y5 AB1 Y7

AA5

AA4 AB2

V5 T1

W4 W5 Y2 Y1 W7 Y8

U1 U2 V4 V2 W1 V1 W2 W8

AC1 AC2 AA8

AA2

Y4

Y15

AA1

AD1

AB4

AB5

AD2

AC4

AE2

AE1

AF5 AE7 AK1 AG5 AH4 AL1 AK2 AH5 AF7 AG7

AK4

AB7

AM1

AC5 AD4

AF4 AH2 AD7 AG4 AJ1 AJ2

AF1 AG1 AF2 AH1 AD5 AG2 AE4 AE5

AG8 AH7 AA7

AL2

AJ4

AM2

OMIT

CRITICAL

BGA

INTREPID-REV2.1

R51

1 2

82

5%

1/16W

MF

402

R92

1 2

82

5%

1/16W

MF

402

U45

C5

E6

U14

T7

N2 N1

L13 H12

AN2

AK5

AN1

AM3

B6

B5

P5 L1

L4 M4 P7 N5 K1 K2 L2 N4

M1

M2

T2

U5

D3 E7 D6 B4 A4 D7 G9 E8

J12

C4 D2

AP5

AK8 AT5

AH10

AR5

AN6

AM7

AK10

AR6

H10

E9 D8 A6 B7

G10

D9

E10

H9 A7 A5

OMIT

BGA

INTREPID-REV2.1

CRITICAL

R145

1 2

402

MF

1/16W

5%

22

R34

1 2

402

1/16W

MF

5%

22

R624

1 2

402

MF

1/16W

5%

10

R630

1 2

1/16W

402

MF

5%

10

R124

1 2

402

MF

1/16W

5%

10

13

45

B

051-6694

ENET_LINK_TXD<1>

ENET_LINK_TXD<2>

INT_TST_MONOUT_TP

JTAG_ASIC_TRST_L

JTAG_ASIC_TDO

ENET_LINK_RXD<3>

ENET_LINK_RXD<2>

ENET_LINK_TXD<2>

EIDE_CS0_L EIDE_CS1_L

EIDE_RST_L

EIDE_RD_L EIDE_DMACK_L EIDE_DMARQ EIDE_INT

CLKENET_LINK_GTX

ENET_LINK_RXD<7>

ENET_LINK_RXD<6>

CSLOT_CE2_L_SPN

UIDE_DMARQ

UIDE_CS1_L

UIDE_CS0_L

UIDE_DATA<9>

UIDE_DATA<11> UIDE_DATA<12>

UIDE_DATA<14>

UIDE_ADDR<0> UIDE_ADDR<1>

UIDE_RST_L UIDE_DIOW_L UIDE_DIOR_L

UIDE_INTRQ

ENET_LINK_TXD<0>

ENET_LINK_TX_ER

ENET_LINK_TXD<3>

ENET_LINK_TXD<7>

ENET_LINK_TXD<5>

CLKENET_LINK_TX

FW_LINK_DATA<5>

FW_LINK_DATA<4>

FW_LINK_DATA<3>

FW_LINK_DATA<7>

JTAG_ASIC_TCK

JTAG_ASIC_TMS

JTAG_ENET_TDO

JTAG_ASIC_TDO

INT_TST_PLLEN_PD

INT_TST_MONIN_PD

JTAG_ASIC_TRST_L

INT_JTAG_TEI

INT_I2C_CLK1

INT_I2C_DATA1

INT_I2C_CLK0

INT_I2C_DATA0

ENET_PHY_TXD<7>

ENET_PHY_TXD<5>

ENET_PHY_TXD<2>

ENET_LINK_TXD<4>

ENET_PHY_TXD<4>

ENET_PHY_TXD<3>

ENET_PHY_TXD<0>

ENET_PHY_TXD<1>

INT_RESET_L

JTAG_ENET_TDO

JTAG_ASIC_TCK JTAG_ASIC_TMS

INT_JTAG_TEI

INT_I2C_CLK1 INT_I2C_DATA1

INT_I2C_DATA0

INT_I2C_CLK0

INT_TST_MONIN_PD

ENET_MDC

ENET_MDIO

ENET_CRS

ENET_LINK_RXD<0>

ENET_RX_DV

CLKENET_LINK_RX

CLKFW_LINK_LCLK

FW_PINT

FW_LKON

ENET_LINK_TX_EN

ENET_LINK_TXD<4>

FW_LINK_DATA<0>

FW_LINK_DATA<2>

FW_LINK_DATA<6>

FW_PHY_LPS FW_LINK_CNTL<0>

CLKFW_PHY_LCLK

FW_PHY_LREQ

UIDE_IOCHRDY

UIDE_DMACK_L

UIDE_ADDR<2>

UIDE_DATA<5>

UIDE_DATA<15>

UIDE_DATA<13>

UIDE_DATA<10>

UIDE_DATA<8>

UIDE_DATA<6>

UIDE_DATA<4>

UIDE_DATA<1>

EIDE_DATA<11>

EIDE_DATA<13>

EIDE_DATA<15>

EIDE_DATA<14>

EIDE_ADDR<0> EIDE_ADDR<1>

EIDE_IOCHRDY

EIDE_ADDR<2>

EIDE_DATA<12>

EIDE_DATA<9> EIDE_DATA<10>

EIDE_DATA<8>

EIDE_DATA<6>

EIDE_DATA<4> EIDE_DATA<5>

EIDE_DATA<3>

EIDE_DATA<2>

EIDE_DATA<1>

HD_DMARQ

HD_INTRQ

CSLOT_IOWAIT_L_PU

CSLOT_WE_L_SPN

CSLOT_OE_L_SPN

CSLOT_IOWR_L_SPN

CSLOT_IORD_L_SPN

CSLOT_ADDR9_SPN

CSLOT_ADDR8_SPN

CSLOT_ADDR7_SPN

CSLOT_ADDR6_SPN

CSLOT_ADDR5_SPN

CSLOT_ADDR4_SPN

CSLOT_ADDR3_SPN

EIDE_DATA<0>

UIDE_DATA<7>

UIDE_DATA<3>

UIDE_DATA<2>

UIDE_DATA<0>

ENET_PHY_TX_ER

ENET_LINK_TXD<5>

ENET_LINK_TXD<7>

ENET_LINK_RXD<1>

ENET_LINK_RXD<5>

CLKENET_LINK_GBE_REF

EIDE_DATA<7>

UIDE_REF

CSLOT_CE1_L_SPN

ENET_LINK_TXD<3>

ENET_RX_ER

ENET_LINK_TXD<6>

ENET_PHY_TXD<6>

EIDE_WR_L

ENET_LINK_TXD<6>

FW_LINK_DATA<1>

INT_PU_RESET_L

ENET_COL

ENET_LINK_TXD<0>

CLKENET_PHY_GTX

FW_LINK_LREQ CLKFW_LINK_PCLK

ENET_LINK_TXD<1>

INT_TST_PLLEN_PD

FW_LINK_CNTL<1>

ENET_PHY_TX_EN

ENET_LINK_RXD<4>

13

14

6

14

6

23

11

23

11

11 13

13

24

13

24

13

28

14

28

13

25

28

25

13

28

29

28

13

14

28

26

23

28

13 28

28

9

13

28

26

23

28

29

13

29

25

28

13

28

25

13

28

13 28

25

13

29

26

28

13

28

29

13

29

28

38

40

38

37

38

37

38

40

28

40

13

40

13

40

38

38 38

38

31

28

40

13

40

13

38

37

38

29

38

29

38

37

38

37

38

39

38

38 38

38

31

38

37

38

37

38

13

38

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VSSA_8

VSSA4

VSSA3

VSSA2

VSSA1

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VDD15A_8

VDD15A_4

VDD15A_3

VDD15A_2

VDD15A_1

CPU_INT PCIPME

EXTINT12 EXTINT13 EXTINT14 EXTINT15 EXTINT16 EXTINT17

GPIO16

GPIO15

GPIO12

GPIO11

GPIO9

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

VSSU_2

VDDU33_2

VDDU33_1

(6 OF 9)

SCCRTSA

SCCTXDA

SCCDTRA

SCCRXDA SCCGPIOA SCCTRXCA

SCCTXDB

SCCGPIOB SCCTRXCB

SCCRXDB

SCCRTSB

PURPOSE

GENERAL

I/O’S

EXTINT8

EXTINT7

EXTINT6

EXTINT0

INTERRUPTS

EXTINT11

EXTINT4 EXTINT5

EXTINT10

EXTINT9

EXTINT3

EXTINT2

EXTINT1

AUD_DTO

AUD_DTI AUD_SYNC

MOD_DTO

AUD_BITCLK AUD_CLKOUT

IICCLK_2

MOD_SYNC

MOD_DTI

MOD_CLKOUT

IICDATA_2

MOD_BITCLK

IIC

AUDIO/I2S

CLOCKS

XTAL_OUT

PROCSLEEPREQ PENDPROCINT

XTAL_IN

SS_REF_CLK_IN

BUF_REF_CLK_OUT

STOPXTAL

WATCHDOG

PCI_

VSSU_1

PCI_

USB_VD0_P USB_VD0_N

USB_VD1_P USB_VD1_N

USB_VD2_N

USB_VD2_P

USB_PWRFLT0

USB_PRTPWR0

USB_VD3_N

USB_VD3_P

USB

USB_PRTPWR1 USB_PWRFLT1

USB_VD4_N

USB_VD4_P

USB_VD5_N

USB_VD5_P

USB_PRTPWR2 USB_PWRFLT2

ADJ

BYP GND

OUT

NC

SHDN

IN

CPU0

VDDA

VDD0

VDD1

VDDC

VDDQ

VSS1

VSS0

VSSA

VSSC

VSSQ

LOCK ODSEL

PD*

SDATA

SCLK

FSEL

CLKIN

RESET*

ADDRSEL

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_5_ITEM

TABLE_ALT_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

USB POWER FAULT SIGNALS

OUTPUT IMPEDANCE ~18-20OHM

INTERNAL 250K PULL-DOWN

SCK

ACK*

VCORE_A/B SEL

PLACE R68 CLOSE TO INTREPID SIDE

VGATE/LOCK INTERRUPT

OPEN-DRAIN OUTPUT

PORT F - TPAD

R89,R80 NEED PLACE NEAR TPAD CONNECTOR

PORT E - BLUETOOTH

PORT D - MODEM

PORT C - LEFT USB

INTERNAL 250K PULL-UP

INT - USB/GPIOS/I2S

USB PORT ASSIGNMENTS

PORT A - RIGHT USB 1

CRYSTAL LOAD CAPACITANCE IS 16PF

SIGNAL NAME

MOD_BITCLK_B_H MOD_CLKOUT_B_H

PORT B - UNUSE

MOSI

REQ*

MISO

POWERBOOK SPARE

CONTRAST PWM

FAN PWM

CBUS_IREQ_L

HWPLL_

TESTMUXSEL

5 4 3 2 1 0

JTG_TDO_H

MOD_DTI_B_H

MOD_SYNC_B_H

MOD_DTO_B_H

NC

NCNCNC

NC

BRIGHTNESS PWM

OTHERWISE A LOT OF OVERSHOOT/UNDERSHOOT

VIA

+3V_MAIN

10UF

6.3V CERM 805

20%

C97

1

2

5%

1/16W

MF

402

100K

R111

1 2

+3V_MAIN

402

CERM

0.1UF

20% 10V

C85

1

2

20% 16V

0.01UF

CERM 402

C84

1

2

22

5%

MF

1/16W

402

R50

1 2

22

5%

1/16W

MF

402

R67

1 2

22

5%

1/16W

MF

402

R91

1 2

47

5%

1/16W

SM1

RP8

2 7

47

5%

1/16W

SM1

RP8

3 6

47

5%

1/16W

SM1

RP8

4 5

47

5%

1/16W

SM1

RP8

1 8

22

5% MF

402

1/16W

R90

1 2

INTREPID-REV2.1

OMIT

BGA

CRITICAL

U45

P2 R5

R7

R4

T5

U15

D30

F33 E34

B32 E30

J9 F4 D1 E2 H7 G4

C33 D34 B33 A33 E31 G30 D31 C32

G5 E1

J5 K8 F1 K7

J7 F2 J8 H5 L9 H4

AL4 AH8

V8 P1

T4

R2

R1

AJ7

AA16

AJ12

AJ17

AJ18

AN8

AT6

AF10

AG9

AP4

AN3

AL5

AG11

AG10

AT4

AM5

AF9

AR4

K9

AN7

J4

J2

M5

K4

J1

N7

L7

L8

G1

G2

H1

H2

M8

M7

L5

K5

N8

P8

AG29

T8

U8

AA15

AJ13

AJ16

AK18

AH29

R9

R8

AT7

U4

V15

+3V_SLEEP

5%

1/16W

24

MF

402

INTREPID_USB

R614

1 2

15K

5% 1/16W

MF 402

R115

1

2

24

5%

1/16W

MF

402

INTREPID_USB

R609

1 2

402

0.22UF

CERM

6.3V

20%

C198

1

2

4.7

5% MF

402

1/16W

R155

1 2

CERM

402

20%

6.3V

0.22UF

C148

1

2

MF

5%

402

1/16W

4.7

R125

1 2

402

CERM

6.3V

20%

0.22UF

C182

1

2

1/16W

MF

402

5%

4.7

R156

1 2

0.22UF

20%

6.3V

CERM

402

C353

1

2

15K

5%

1/16W

MF

402

R114

1

2

0.22UF

20%

6.3V CERM

402

C200

1

2

4.7

5%

402

MF

1/16W

R244

1 2

4.7

5% MF

402

1/16W

R168

1 2

CRITICAL

OMIT

8X4.5MM-SM

18.432M

Y1

1 2

5%

10M

MF

402

1/16W

NO STUFF

R622

12

5% 50V

402

CERM

22PF

C140

1

2

22PF

CERM

50V

5%

402

C15

1

2

402

MF

5%

0

NO STUFF

1/16W

R49

1 2

CRITICAL

U.FL-R_SMT

F-ST-SM

NO STUFF

J1

3

2

1

1/16W MF 402

5%

51

NO STUFF

R28

1

2

402

MF

0

1/16W

5%

R632

1

2

CERM

603

10V

20%

1UF

C433

1

2

1/16W

68.1K

1%

402

MF

R277

1

2

1/16W

402

MF

1%

15.8K

R278

1

2

6.3V

20%

10UF

CERM 805

C419

1

2

603

1/16W

0

5% MF

NO STUFF

R291

1 2

5%

1/16W

MF

603

0

R264

1 2

+2_5V_MAIN

+1_8V_MAIN

MSOP

CRITICAL

LT1962-ADJ

U7

2

3 4

8

6

7

1

5

16V

0.01UF CERM

402

20%

C424

1

2

5% MF

1/16W

402

10K

R7

2 1

10K

5%

1/16W

MF

402

R113

2 1

1K

5%

1/16W

MF 402

R29

2

1

402

MF

1/16W

5%

1K

R102

2

1

402

1/16W

15K

5% MF

R89

1 2

15K

5%

1/16W

MF

402

R80

1 2

10K

5%

1/16W

SM1

RP47

8 1

10K

5%

1/16W

SM1

RP47

6 3

10K

5%

1/16W

SM1

RP7

1 8

10K

SM1

1/16W

5%

RP47

7 2

10K

5%

1/16W

SM1

RP48

1 8

10K

5%

1/16W

SM1

RP29

2 7

10K

5%

1/16W

SM1

RP29

4 5

10K

5%

1/16W

SM1

RP51

2 7

10K

5%

1/16W

SM1

RP29

1 8

5%

10K

1/16W

SM1

RP48

2 7

5%

SM1

1/16W

10K

RP29

3 6

5%

1/16W

SM1

10K

RP24

1 8

10K

5%

1/16W

SM1

RP7

3 6

75

5% 1/16W MF 402

SSCG

R100

2

1

10K

5%

1/16W

SM1

NO STUFF

RP1

4 5

5%

SM1

1/16W

10K

NO STUFF

RP1

3 6

NO STUFF

10K

5%

SM1

1/16W

RP1

2 7

1/16W

MF

402

5%

0

SSCG

R636

1 2

10K

5% 1/16W MF 402

R638

1

2

SSCG

CERM

10V 402

20%

0.1UF

C691

1

2

20%

10V

1UF

CERM

603

SSCG

C692

1

2

SSCG

20%

10V

CERM

402

0.1UF

C698

1

2

400-OHM-EMI

SM-1

SSCG

L22

1

2

+3V_MAIN

SM-1

SSCG

400-OHM-EMI

L18

1

2

10V

20%

0.1UF

CERM

SSCG

402

C686

1

2

+2_5V_MAIN

1/16W

402

5%

MF

0

SSCG

R281

1 2

402

MF

1/16W

10K

NO STUFF

5%

R656

1

2

NO STUFF

1/16W

10K

5% MF

402

R682

1

2

CRITICAL

SSCG

TSSOP

CY28512-2

U42

14

20

16

3

2

4

13

17

9

8

11012

5

18

7

19

11

6

15

SSCG

5%

1/16W

MF

402

33

R634

1 2

10K

SSCG

5%

1/16W

MF

402

R625

1

2

0

5%

1/16W

MF

402

NO STUFF

R631

1

2

+3V_SLEEP

47

5%

1/16W

SM1

RP56

2 7

5%

1/16W

SM1

47

RP56

3 6

1/16W

SM1

47

5%

MOD_BITCLK

RP56

1 8

47

5%

1/16W

SM1

RP56

4 5

MF

402

5%

1/16W

10K

NEC_USB

R701

1

2

NEC_USB

10K

402

5% MF

1/16W

R708

1

2

NEC_USB

1/16W

10K

5%

MF 402

R699

1

2

NEC_USB

402

MF

1/16W

5%

10K

R707

1

2

5%

1/16W

MF

402

0

R698

1 2

5% MF

402

10K

1/16W

R720

1 2

402

MF

1/16W

0

5%

NO STUFF

R285

1 2

0

1/16W

MF

402

5%

R604

1 2

5%

0

MF

402

1/16W

INT_GPIO0

R608

1 2

10K

1/16W

5%

SM1

RP48

3 6

10K

1/16W

SM1

5%

RP7

4 5

MF

402

5%

1/16W

22

R66

1 2

5%

22

1/16W

402

MF

R41

1 2

5%

1/16W

MF

402

10K

R204

1 2

10K

5%

1/16W

MF

402

R219

1 2

5%

1/16W

MF

10K

402

R220

402

0

MF

1/16W

5%

NO STUFF

R530

1 2

10K

5%

1/16W

SM1

RP51

1 8

10K

5%

1/16W

SM1

RP51

3 6

10K

5%

1/16W

MF

402

R819

1 2

1/16W

5% MF

402

10K

R820

NO STUFF

5%

402

MF

1/16W

100K

R825

1 2

0

5%

1/16W

MF

402

NO STUFF

R780

1 2

10K

5%

1/16W

MF

402

R770

0

5%

1/16W

MF

402

NO STUFF

R554

1 2

NO STUFF

402

MF

1/16W

5%

10K

R863

1 2

NO STUFF

10K

5%

1/16W

MF

402

R864

1 2

NO STUFF

402

MF

0

5%

1/16W

R897

1 2

5%

1/16W

MF

402

0

R896

1 2

NO STUFF

MF

402

10K

5%

1/16W

R895

1 2

2N7002DW

SOT-363

Q36

6

2

1

SOT-363

2N7002DW

Q36

3

5

4

1%

1/16W

MF

10K

402

R912

1

2

100K

1/16W

1%

MF

402

R913

1

2

+3V_SLEEP

AUDIO_SPDIF_RESET_L

402

1/16W

5%

0

NO STUFF

MF

R916

1 2

402

MF

1%

1/16W

10K

NO STUFF

R914

1

2

+3V_SLEEP

FERR-EMI-100-OHM

SM

L1

2

1

4514

B

051-6694

?

197S0090

1

XTAL,CER,LOW PROF,18,432MHZ,8X4.5MM,SMD

Y1

CRITICAL

NO_SSCG

RES,METAL FILM,10 K OHM,5,1/16W,0402,SM

1

R100

116S1104

ALT FOR NEW SCREEN

U42

?

359S0086359S0074

COMM_RTS_L

CLK18M_INT_EXT

AUDIO_SPDIF_GPO0

+1_5V_INTREPID_PLL3

CLK18M_INT_XOUT

CLK18M_INT_XIN

CG_ADDRSEL

CG_FSEL

USB_TPAD_P

+3V_INTREPID_USB

MPIC_CPU_INT_L

PMU_PME_L

INT_PEND_PROC_INT

INT_I2C_CLK1

INT_MOD_DTI INT_MOD_SYNC_UF

MOD_DTO

SND_CLKOUT

INT_AUDIO_TO_SND

INT_MOD_DTO_UF

CG_FSEL

USB_OC_CD_L

COMM_RXD COMM_GPIO_L

COMM_DTR_L

COMM_TXD_L

AUDIO_MCLK_SEL

PMU_INT_NMI

AUDIO_LI_SPDIF_PLUG_L

MMM_SIRQ_L

PMU_INT_NMI

INT_EXTINT13_PU

JTAG_ASIC_TDO

FW_PHY_PD_INT

SND_HW_RESET_L

MODEM_USB_DP

USB_DCM

USB_DEM

USB_DBM

USB_DAM

PMU_CLK

PMU_TO_INT

USB_DFM

USB_D1P

INT_WATCHDOG_L

USB_DBP

SND_SYNC

USB_DBM

USB_DEP

USB_PWREN_CD_L

USB_DBP

USB_DCP

USB_PWREN_AB_L

INT_I2C_CLK2

INT_I2C_DATA2

PMU_FROM_INT

INT_REF_CLK_OUT INT_REF_CLK_IN

USB_OC_EF_L

INT_MOD_CLKOUT_UF

INT_MOD_BITCLK_UF

COMM_TRXC

USB_DFP USB_DFM

USB_PWREN_EF_L

USB_DDM

USB_DDP

USB_OC_AB_L

USB_DAP

PMU_ACK_L

USB_DDP

USB2_PCI_INT_L

INT_MOD_SYNC_UF

INT_MOD_DTI_UF

INT_EXTINT8_PU

SYSTEM_CLK_EN

INT_PROC_SLEEP_REQ_L

INT_EXTINT13_PU

CG_SYSCLK_EN

USB2_PCI_INT_L

AUDIO_LO_DET_L

USB_DFP

FW_PHY_PD

AUDIO_SPDIF_GPO0

INT_EXTINT10_PU

AUDIO_LO_SPDIF_PLUG_L

+1_5V_INTREPID_PLL8

USB_DDM

SND_SCLK

INT_SND_SCLK

INT_MOD_BITCLK_UF

LTC1962_INT_VIN

CG_SYSCLK_EN

CG_CLKOUT

VCORE_VGATE

+1_5V_INTREPID_PLL1

+1_5V_INTREPID_PLL2

USB_TPAD_N

BT_USB_DM

BT_USB_DP

MODEM_USB_DM

USB_DAM

USB_DAP

INT_SND_TO_AUDIO

INT_SND_SYNC

INT_SND_CLKOUT

MOD_CLKOUT

USB_DEM

MOD_SYNC

INT_EXTINT8_PU

CBUS_INT_L

ENET_ENERGY_DET

AUDIO_LI_DET_L

CLK18M_XTAL_IN

+1_5V_INTREPID_PLL4

USB_D1M

USB_DEP

SND_TO_AUDIO

USB_DCP

USB_DCM

SYSTEM_CLK_EN

MMM_FFIRQ_L

INT_GPIO9_PU

MMM_SIRQ_L

INT_EXTINT10_PU

PMU_REQ_L

SND_HP_MUTE_L

+2_5V_CG_MAIN

AGP_INT_L

COMM_RING_DET_L

SND_HW_RESET_L

AUDIO_MCLK_SEL

INT_GPIO9_PU

SND_AMP_MUTE_L

INT_ENET_RST_L

AUDIO_SPDIF_RESET_L

USB_PWREN_AB_L

USB_PWREN_CD_L

AIRPORT_PCI_INT_L

USB_OC_EF_L

USB_PWREN_EF_L

AUDIO_SPDIF_RESET_C

LT1962_INT_BYP

LT1962_INT_ADJ

MAIN_RESET_L

PMU_INT_L

INT_MOD_CLKOUT_UF

INT_GPIO1_PU

AUDIO_LO_SPDIF_PLUG_L

USB_OC_AB_L

+3V_CG_PLL_MAIN

COMM_RESET_L

FW_PHY_PD_INT

INT_GPIO1_PU COMM_SHUTDOWN

PMU_INT_L

MMM_FFIRQ_L

AIRPORT_PCI_INT_L

INT_REF_CLK_IN

CG_RESET_L

INT_REF_CLK_OUT

USB_OC_CD_L

COMM_RING_DET_L

CBUS_INT_L

CG_LOCK

INT_MOD_DTO_UF

AUDIO_SPDIF_RESET_L

AUDIO_LI_SPDIF_PLUG_L

PMU_REQ_L

INT_I2C_DATA1

SOUND_SPDIF_GPO0

+1_5V_INTREPID_PLL

AUDIO_SPDIF_RESET

AUDIO_SPDIF_RESET_C

AUDIO_SPDIF_RESET_L

17 18

13

20

13

23

14

25

14

23

24

26

14

26

14

25

26

14

27

14

26

24

8

26

27

26

37

26

14

13

26

38

14

38

14

26

14

26

14

26

14

37

35

38

14

26

14

26

14

26

14

31

26

14

25

14

31

14

26

14

26

14

25

14

31

14

26

12

14

40

37

14

39

37

14

23

39

5

31

40

14

40

14

40

26

31

26

24

31

14

40

14

40

27

14

27

31

38

27

31

14

40

14

38

14

27

14

40

31

37

14

40

38

14

27

31

14

27

14

31

14

27

26

38

29

14

26

39

14

40

14

39

14

39

23

40

27

40

38

40

14

17

28

26

37

39

27

38

40

27

31

24

14

24

14

31

26

39

18

40

26

14

26

28

14

40

14

26

40

31

14

35

26

14

39

40

14

35

40

31

24

40

37

14

40

17

14

26

31

40

39

26

14

Apple Q41B Schematic RevB

Specifications and Main Features

Frequently Asked Questions

User Manual