Apple MacBook 12'' Retina A1534 Schematics

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TABLE_TABLEOFCONTENTS_ITEM

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

II NOT TO REPRODUCE OR COPY IT

3

B

7

BRANCH

DRAWING NUMBER

SIZE

D

SHEET

R

DATE

D

A

C

PAGE

A

C

3456

D

B

87 6 5

4 21

12

APPD

CK

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

DRAWING TITLE

DESCRIPTION OF REVISION

REV ECN

REVISION

PROPRIETARY PROPERTY OF APPLE INC.

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

11/21/2014

PCB TO BE SILK-SCREENED WITH UL/CUL RECOGNITION MARK, MANUFACTURER’S UL FILE NUMBER, UL PCB MATERIAL DESIGNATION, 130-C TEMP. RATING AND V-0 FLAME RATING.

PCB, UL RECOGNIZED, MIN. 130-C TEMP. RATING AND V-0 FLAME RATING PER UL 796 & UL 94.

PRODUCT SAFETY REQUIREMENTS:

Schematic / PCB #’s

J92 MLB NEWARK - DVT

ALIASES RESOLVED

1 OF 75

<PART_DESCRIPTION>

<SCH_NUM>

<ECO_DESCRIPTION>

1 OF 130

SPI+SWD Debug Connector

J92_DEVMLB

61

37

07/23/2013

Temperature Sensing

J92_DEVMLB

55

36

09/12/2013

Voltage & Current Sensing

J92_DEVMLB

54

35

02/07/2014

SMBus Connections

J43_MLB

53

34

10/24/2012

SMC Project Support

J43_MLB

52

33

10/24/2012

SMC Shared Support

J92_DEVMLB

51

32

10/11/2013

SMC

J92_DEVMLB

50

31

10/11/2013

Keyboard & Trackpad Conn

J92_DEVMLB

48

30

03/26/2014

E85 FLEX CONNECTOR

DEV_MLB

47

29

04/17/2014

Host Port Micro

DEV_LIO

46

28

04/30/2014

High Speed MUXing

DEV_MLB

45

27

04/17/2014

Low Speed MUXing

J92_DEVMLB

44

26

07/08/2014

Camera 2 of 2

J92_DEVMLB

40

25

10/10/2013

Camera 1 of 2

J92_DEVMLB

39

24

07/24/2013

SSD Support

J92_DEVMLB

37

23

09/11/2013

WIFI/BT: MODULE

J72_MLB

35

22

11/13/2012

LPDDR3 DRAM Channel B (0-63)

(MASTER)

25

21

(MASTER)

LPDDR3 DRAM Channel A (0-63)

(MASTER)

23

20

(MASTER)

LPDDR3 VREF MARGINING

J92_DEVMLB

22

19

06/28/2013

Project Chipset Support

J92_DEVMLB

20

18

08/01/2013

Chipset Support

J92_DEVMLB

19

17

06/28/2013

CPU/PCH Merged XDP

J92_DEVMLB

18

16

09/16/2013

PCH GPIO/MISC/LPIO

J92_DEVMLB

16

15

08/14/2013

PCH PCIe/USB/LPC/SPI/SMBus

J92_DEVMLB

15

14

06/28/2013

PCH PM/PCI/GFX

J92_WILL

14

13

04/10/2013

PCH Audio/JTAG/SATA/CLK

J92_WILL

13

12

04/10/2013

PCH Decoupling

J92_DEVMLB

12

11

09/23/2013

CPU Decoupling

J92_DEVMLB

10

10/01/2013

CPU/PCH GROUNDS

J92_WILL

9

04/10/2013

CPU/PCH POWER

J92_DEVMLB

8

10/01/2013

CPU DDR3/LPDDR3 Interfaces

J92_LS_MLB

7

07/17/2013

CPU Misc/JTAG/CFG/RSVD

J92_WILL

6

04/10/2013

CPU GFX/DC_TEST

J92_WILL

5

04/10/2013

PD PARTS

J43_MLB

4

10/24/2012

J92 BOM Variants

J43_MLB

3

10/24/2012

BOM Configuration

J43_MLB

2

10/24/2012

MASTER

130

MASTER

75

Debug Support

07/15/2013

120

J92_DEVMLB

74

Reference

04/08/2014

118

J92_DEVMLB

73

Project Specific Constraints

09/11/2013

117

J92_DEVMLB

72

SMC Constraints

08/01/2013

116

J92_DEVMLB

71

Camera Constraints

11/16/2011

115

MASTER

70

NAND CONSTRAINTS

05/07/2013

114

J92_LS_MLB

69

Memory Constraints

04/17/2014

113

DEV_MLB

68

PCH Constraints 2

04/17/2014

112

DEV_MLB

67

PCH Constraints 1

07/08/2014

111

J92_DEVMLB

66

CPU Constraints

10/24/2012

110

J43_MLB

65

PCB Rule Definitions

10/24/2012

105

J41_MLB

64

Project FCT/NC/Aliases

07/08/2014

104

J92_DEVMLB

63

Func Test / No Test

07/08/2014

103

J92_DEVMLB

62

J92 Signal Aliases

(MASTER)

102

(MASTER)

61

Memory Signal Swaps

10/24/2012

100

J43_MLB

60

Power Aliases

02/12/2014

89

J92_DEVMLB

59

SSD SR, Power, & Debug

10/07/2013

88

J92_SSD

58

SSD NAND Flash & ROM

10/10/2013

87

J92_DEVMLB

57

SSD Controller (4 of 4)

02/11/2014

86

J92_SSD

56

SSD Controller (3 of 4)

10/10/2013

85

J92_DEVMLB

55

SSD Controller (2 of 4)

02/11/2014

84

J92_SSD

54

SSD Controller (1 of 4)

09/25/2013

83

J92_DEVMLB

53

eDP Display Connector

09/20/2013

81

J92_DEVMLB

52

Power Control

07/24/2013

80

J92_DEVMLB

51

Power FETs

04/04/2014

78

J92_DEVMLB

50

Misc Power Supplies

10/01/2013

77

J92_DEVMLB

49

LCD Backlight Driver

04/04/2014

76

J92_DEVMLB

48

1.05V S0 Power Supply

04/17/2014

75

DEV_MLB

47

5V & 3.3V Power Supplies

04/04/2014

74

J92_DEVMLB

46

LPDDR3 Supply

04/17/2014

73

DEV_MLB

45

CPU VR12.5 VCC Power Stage

10/09/2012

72

J43_MLB

44

CPU VR12.6 VCC Regulator IC

04/04/2014

71

J92_DEVMLB

43

PBus Supply & Battery Charger

02/04/2013

70

J92_WILL

42

3.3V G3Hot Regulator

10/24/2012

69

J43_MLB

41

Battery Connector

04/17/2014

67

CARA_J92

40

AUDIO: CONNECTORS

09/19/2013

64

J92_DEVMLB

39

Audio:Right Speaker Amps

820-00045

PCBF,MLB-NEWARK,J92

PCB1 CRITICAL

1

SCHEM,MLB-NEWARK,J92

SCH

051-00107

CRITICAL

09/19/2013

63

J92_DEVMLB

38

Audio:Left Speaker Amps

Contents

(.csa)

Date

SyncPage

Table of Contents

MASTER

1

MASTER

Contents

Date

(.csa)

Page Sync

WWW.AliSaler.Com

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

CPU DRAM SPD Straps

Programmable Parts

BOM Groups

CFG 2

8GB

HYNIX

Module Parts

1

MICRON

Alternate Parts

00

SAMSUNG

1

2GB

0 1

0

CFG 0

1

10

1

CFG 3

4GB QDP

1

4GB DDP

DRAM Parts

CFG 1

VENDOR

CPU DRAM CFG Chart

0

ELPIDA

0

SIZE

SSD POP Parts

0

RAMCFG0:H,RAMCFG1:H,RAMCFG2:H,RAMCFG3:H,DRAM_TYPE:ELPIDA_8GB

DRAM:ELP_8GB

DRAM:HYN_8GB

RAMCFG0:L,RAMCFG1:L,RAMCFG2:H,RAMCFG3:H,DRAM_TYPE:HYNIX_8GB

DRAM:ELP_2GB

RAMCFG0:H,RAMCFG1:H,RAMCFG2:L,RAMCFG3:L,DRAM_TYPE:ELPIDA_2GB

NXP alt for Diodes dual

376S1129

ALL

376S0855

338S00055

CRITICALSSD_CTRL

S1X:A2

1

IC,S1-X,CONTROLLER,A2,841(312)B,FCBGA

CRITICAL

S1X:A1

SSD_CTRL

1338S1288

IC,S1-X,CONTROLLER,A1,841(312)B,FCCSP

DRAM_TYPE:ELPIDA_4GB

CRITICAL

IC,SDRAM,LPDDR-1600,16GBIT,253B FBGA

333S0740 2

U2300,U2500

IC,SDRAM,LPDDR-1600,32GBIT,253B FBGA

333S0731 2

U2300,U2500

DRAM_TYPE:HYNIX_8GB

CRITICAL

IC,SDRAM,LPDDR-1600,16GBIT,253B FBGA

U2300,U2500

998-6454 2

DRAM_TYPE:ELPIDA_4GB_QDP

CRITICAL

IC,SDRAM,LPDDR-1600,8GBIT,253B FBGA

998-6453

U2300,U2500

2

DRAM_TYPE:ELPIDA_2GB

CRITICAL

2998-6486

U2300,U2500

DRAM_TYPE:HYNIX_2GB

CRITICAL

IC,SDRAM,LPDDR-1600,8GBIT,253B FBGA

IC,SDRAM,LPDDR-1600,16GBIT,253B FBGA

DRAM_TYPE:HYNIX_4GB_QDP

2

U2300,U2500

CRITICAL

333S00028

IC,SDRAM,LPDDR-1600,16GBIT,253B FBGA

DRAM_TYPE:HYNIX_4GB

2

U2300,U2500

CRITICAL

333S0730

Toshiba alt for Diodes dual

ALL

376S0855

376S00074

NXP alt for Diodes single

ALL

376S1089 376S1128

CRITICAL

2333S0741

IC,SDRAM,LPDDR-1600,32GBIT,253B FBGA

DRAM_TYPE:ELPIDA_8GB

U2300,U2500

J11/J13 MLB DYMAX ADHESIVE 29993-SC 0.4G

1 GLUE946-3892 CRITICAL

IC,CPU,BW,QGKZ,QS,E0,2/2,0.8,4.5W,.8,B1234

337S00054

CPU:0.8GHZ

1 U0500 CRITICAL

CRITICALU05001

CPU:1.1GHZ

337S00099

IC,CPU,BW,QH2Z,PRQ,F0,2/2,1.1,5W,.85,B1234

CRITICALU05001

CPU:1.2GHZ

337S00098

IC,CPU,BW,QH2V,PRQ,F0,2/2,1.2,5W,.9,B1234

RAMCFG0:H,RAMCFG1:H,RAMCFG2:L,RAMCFG3:H,DRAM_TYPE:ELPIDA_4GB

DRAM:ELP_4GB

DRAM:HYN_4GB_QDP

RAMCFG0:L,RAMCFG1:L,RAMCFG2:H,RAMCFG3:L,DRAM_TYPE:HYNIX_4GB_QDP

128S0334

Kemet alt to Sanyo

ALL

128S0393

ALL

138S0648138S0703

Murata alt to Taiyo Yuden

372S0186

NXP alt to Diodes

ALL

372S0185

376S1053

Diodes alt to Fairchild

376S0604

ALL

IC,SMC12-B1,40MHZ/50DMIPS MCU,7X7,168BGA

U5000 CRITICAL338S1231

SMC:BLANK

1

DRAM:ELP_4GB_QDP

RAMCFG0:H,RAMCFG1:H,RAMCFG2:H,RAMCFG3:L,DRAM_TYPE:ELPIDA_4GB_QDP

DRAM:HYN_4GB

RAMCFG0:L,RAMCFG1:L,RAMCFG2:L,RAMCFG3:H,DRAM_TYPE:HYNIX_4GB

DRAM:HYN_2GB

RAMCFG0:L,RAMCFG1:L,RAMCFG2:L,RAMCFG3:L,DRAM_TYPE:HYNIX_2GB

XDP

MLB_DEBUG:PROD

XDP_CONN,XDP,HPMBB:SSP0,HPMVBUS:VDET

MLB_DEBUG:PVT

333S0733

CRITICAL

1

S1X_DRAM:ELPIDA

SSD_DRAM

IC,LPDDR2,128MX32,1.2V,ELPIDA 28NM,312B

685-00004

SSDRAM:A1_HYN

U8400

1

CRITICAL

POP,MLB,S1X-A1,HYN-4GBIT,X261

685-00003

SSDRAM:A1_ELP

CRITICAL

1

U8400

POP,MLB,S1X-A1,ELP-4GBIT,X261

SSDRAM:A0_HYN

339S0244

U8400

CRITICAL

1

POP,S1-X CONTROLLER+4GBITS HYN,841B,FCBGA

SSDRAM:A0_ELP

339S0243

CRITICAL

U8400

1

POP,S1-X CONTROLLER+4GBITS ELP,841B,FCBGA

1 U0500 CRITICAL

CPU:1.3GHZ

337S00097

IC,CPU,BW,QH2R,PRQ,F0,2/2,1.3,5W,.9,B1234

SSD_DRAM

IC,LPDDR2,128MX32,1.2V,HYNIX 29NM,312B

S1X_DRAM:HYNIX

333S0694 1

CRITICAL CRITICAL

1

870-00878

TAPE,CONDUCTIVE,SSD,REEL,X261

SSD_TAPE

IC,MCU,LPC11U37,128KB/12KB,TFBGA48

1 CRITICALU4600337S4638

HPM:BLANK

U6100

BOOTROM_MAC:BLANK

335S1010 CRITICAL1

64 MBIT SPI QUAD I/O FLASH,CSP,3.3V,QUAD IO

SSDROM_MAC:BLANK

CRITICALU88001335S0966

IC,SPI SERIAL FLASH,64M BITS,1.8V,WLCSP

LABEL,BARCODE,2D,1D,CONFIG,MLB,X261

825-7995

LABEL

1

138S0941

ALL

Samsung alt to Murata

138S0789

TFT alt to Cyntec

ALL

107S0251107S0249

ALL

NDK alt to TXC

197S0588197S0591

197S0588

ALL

Epson alt to TXC

197S0590

333S0700

Hynix CAM DRAM alt to Elpida

ALL

333S0704

339S0243 339S0244

Elpida SSD DRAM alt to Hynix

ALL

128S0631

NEC alt to Sanyo

ALL

128S0351

335S0948 335S0966

Winbond alt to Macronix

ALL

128S00008

ALL

128S0380

NEC alt to Sanyo

ALL

Sanyo alt to NEC

311S0426

311S00007

311S0271

Samsung alt to Murata

ALL

311S00008 311S00018

311S0409

Diodes alt to NXP

ALL

740S00004

740S0134

ALL

Kemet alt to Sanyo

Polytronics alt to Wayon

740S00005

740S0190

ALL ALL

Sanyo alt to NEC

128S0296 128S0487

128S0487

ROHM alt to NEC

ALL

128S00012

AOS alt to Vishay

ALL

376S00007

376S1179

Kemet alt to Sanyo

ALL

128S0469

128S00025

376S1080

Diodes alt to OnSemi

ALL

376S0820 376S1194

Vishay alt to OnSemi

376S00036

ALL

333S0704

333S00016

Elpida new die CAM DRAM alt

333S0704

ALL

333S00030

Hynix new die CAM DRAM alt

XDP_CONN,XDP,HPMBB:SSP0,HPMVBUS:VDET

MLB_DEBUG:ENG

ALL

2.4G turbo CPU alt to 2.0G

337S00054337S00061

CPU:0.8GHZ

376S00037

Vishay alt to OnSemi

376S1193

ALL

128S0469

ALL

128S0374

NEC alt to Sanyo

SSDRAM:A1_ELP

ALL

Hynix SSD DRAM alt to Elpida

685-00003685-00004

U5000 CRITICAL

341S00031

SMC:PROG1

IC,SMC-B1,EXTERNAL (VXXXX) PROTO2A, J92

U61001

BOOTROM_WIN:BLANK

CRITICAL335S1009

64 MBIT SPI QUAD I/O FLASH,CSP,3.3V,QUAD IO

SSDROM:PROG

341S00091

U8800 CRITICAL1

S1-X SSD BOOTROM, UI64

SSDROM_WIN:BLANK

CRITICALU88001335S0948

IC,SPI SERIAL FLASH,64M BITS,1.8V,WLBGA

CRITICALU6100

BOOTROM:PROG

1

341S00191

EFI ROM,MLB (VXXX) DVT,X261

U61001335S1029 CRITICAL

BOOTROM_MIC:BLANK

64 MBIT SPI QUAD I/O FLASH,CSP,3.3V,QUAD IO

HPM:PROGU4600 CRITICAL1

341S00190

IC,HPM (VXXX) DVT,X261

CAM_FREQ:24M,CAM_XTAL:NO,EDP,RSMRST:SMC,PGOOD8:SLP_S4,SSD_LPSR:S3

MLB_MISC

ALTERNATE,COMMON,CCSAK,MLB_MISC,MLB_DEBUG:ENG,MLB_PROGPARTS,EQ:4CH

MLB_COMMON

SYNC_DATE=10/24/2012

SYNC_MASTER=J43_MLB

BOM Configuration

<SCH_NUM>

2 OF 130

2 OF 75

www.qdzbwx.com

WWW.AliSaler.Com

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

Partial & development BOMs

Common BOM

Top level BOM Variants

Programmable Parts

BOM Groups

ALTERNATE,CMN,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,NO CPU,EL 8GB,TOSH 256G,WIFI FCC,X261

939-00043

341S00198

WIFI ROM (PXXXX) DVT,WW2,X261

WIFI:ETSI

1 CRITICALU3580

BOOTROM:PROG,BT:PROG,SMC:PROG,SSDROM:PROG,HPM:PROG

MLB_PROGPARTS

341S00196

BT ROM (VXX) DVT,2MBIT,X261

CRITICALU35701 BT:PROG

341S00197

WIFI ROM (PXXXX) DVT,WW1,X261

WIFI:FCCU35801 CRITICAL

341S00199

WIFI ROM (PXXXX) DVT,WW3,X261

WIFI:APAC

U35801 CRITICAL

341S00200

WIFI ROM (PXXXX) DVT,IND,X261

WIFI:INDU35801 CRITICAL

685-00003

S1X:A2,S1X_DRAM:ELPIDA

POP,MLB,S1X-A2,ELP-4GBIT,X261

CMNPTS

CRITICAL

CMN1

685-00014

CMN PTS,PCBA,MLB-NEWARK,J92

685-00004

S1X:A2,S1X_DRAM:HYNIX

POP,MLB,S1X-A2,HYN-4GBIT,X261

685-00014

MLB_COMMON

CMN PTS,PCBA,MLB-NEWARK,J92

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 256G,WIFI IND,J92

639-6614

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 512G,WIFI IND,J92

639-6615

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 512G,WIFI IND,J92

639-6613

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 256G,WIFI IND,J92

639-6612

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 512G,WIFI IND,J92

639-6611

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 256G,WIFI IND,J92

639-6610

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 512G,WIFI IND,J92

639-6609

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 512G,WIFI IND,J92

639-6607

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 256G,WIFI IND,J92

639-6606

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 256G,WIFI IND,J92

639-6608

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 512G,WIFI IND,J92

639-6605

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 512G,WIFI APAC,J92

639-6603

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:IND,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 256G,WIFI IND,J92

639-6604

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 256G,WIFI APAC,J92

639-6602

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 512G,WIFI APAC,J92

639-6601

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 256G,WIFI APAC,J92

639-6600

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 512G,WIFI APAC,J92

639-6599

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 512G,WIFI APAC,J92

639-6597

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 256G,WIFI APAC,J92

639-6596

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 256G,WIFI APAC,J92

639-6598

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 512G,WIFI APAC,J92

639-6595

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 256G,WIFI APAC,J92

639-6594

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 512G,WIFI APAC,J92

639-6593

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:APAC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 256G,WIFI APAC,J92

639-6592

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 512G,WIFI ETSI,J92

639-6591

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 256G,WIFI ETSI,J92

639-6590

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 512G,WIFI ETSI,J92

639-6589

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 256G,WIFI ETSI,J92

639-6588

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 512G,WIFI ETSI,J92

639-6587

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 256G,WIFI ETSI,J92

639-6586

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 512G,WIFI ETSI,J92

639-6585

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 256G,WIFI ETSI,J92

639-6584

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 512G,WIFI ETSI,J92

639-6583

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 256G,WIFI ETSI,J92

639-6582

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 512G,WIFI FCC,J92

639-6579

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 512G,WIFI ETSI,J92

639-6581

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:ETSI,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 256G,WIFI ETSI,J92

639-6580

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,TOSH 256G,WIFI FCC,J92

639-6578

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 256G,WIFI FCC,J92

639-6576

ALTERNATE,CMN,CPU:1.3GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.3GHZ,EL 8GB,SAND 512G,WIFI FCC,J92

639-6577

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 512G,WIFI FCC,J92

639-6575

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 512G,WIFI FCC,J92

639-6573

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,TOSH 256G,WIFI FCC,J92

639-6574

ALTERNATE,CMN,CPU:1.2GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.2GHZ,EL 8GB,SAND 256G,WIFI FCC,J92

639-6572

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_512GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 512G,WIFI FCC,J92

639-6571

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_512GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 512G,WIFI FCC,J92

639-6569

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:TOSH_256GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,TOSH 256G,WIFI FCC,J92

639-6570

ALTERNATE,CMN,CPU:1.1GHZ,DRAM:ELP_8GB,NAND:SAND_256GB_1Y_128GBIT,WIFI:FCC,SSDRAM:A1_ELP

PCBA,MLB,1.1GHZ,EL 8GB,SAND 256G,WIFI FCC,J92

639-6568

SYNC_MASTER=J43_MLB

J92 BOM Variants

SYNC_DATE=10/24/2012

<SCH_NUM>

3 OF 130

3 OF 75

WWW.AliSaler.Com

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

CPU EMI CAN

860-00060

SSD EMI FENCE & CAN

860-00889

860-00864

860-2930

WIFI EMI CAN

CPU Heat Spreader Bosses

DRAM EMI CAN & SLOTs

E85 BTB Connector Boss

4.5OD1.85ID-1.5H

Z0403

1

4.5OD1.85ID-1.5H

Z0404

1

4.5OD1.85ID-1.5H

Z0405

1

OMIT_TABLE

SM

SHLD-J92-EMI-CAN-WIFI

SH0400

1

OMIT_TABLE

SM

SHLD-J92-EMI-CAN-CPU

SH0401

1

OMIT_TABLE

SM

SHLD-CAN-EMI-DRAM-X261

SH0402

1

TH-NSP

SL-1.1X0.4-1.6X0.9-NSP

SL0400

1

TH-NSP

SL-1.1X0.4-1.6X0.9-NSP

SL0401

1

STDOFF-3.3X1.8R0.859H-SM

Z0406

1

SHLD-FENCE-SSD-TOP-X261

SM

SH0403

1

SHLD-CAN-EMI-SSD-BTM-X261

SM

SH0404

1

SH04001 CRITICAL806-7064

CAN,EMI,WIFI,X261

CRITICAL1

806-00400

CAN,EMI,DRAM,TALL,X261

SH0402

CRITICAL1 SH0401

CAN,EMI,CPU,X261

806-00112

PD PARTS

SYNC_DATE=10/24/2012

SYNC_MASTER=J43_MLB

<SCH_NUM>

4 OF 130

4 OF 75

WWW.AliSaler.Com

OUT

OUT OUT OUT OUT OUT OUT OUT OUT

BI BI

DDI1_TXN[0]

DDI1_TXN[1]

DDI1_TXN[2]

DDI1_TXN[3]

DDI1_TXP[0]

DDI1_TXP[1]

DDI1_TXP[2]

DDI1_TXP[3]

DDI2_TXN[0]

DDI2_TXN[1]

DDI2_TXN[2]

DDI2_TXN[3]

DDI2_TXP[0]

DDI2_TXP[1]

DDI2_TXP[2]

DDI2_TXP[3]

EDP_AUXN EDP_AUXP

EDP_DISP_UTIL

EDP_RCOMP

EDP_TXN0

EDP_TXN1

EDP_TXN2

EDP_TXN3

EDP_TXP0

EDP_TXP1

EDP_TXP2

EDP_TXP3

DDI

(1 OF 20)

EDP

(18 OF 20)

DAISY_CHAIN_NCTF_A44 DAISY_CHAIN_NCTF_C43 DAISY_CHAIN_NCTF_C45

DAISY_CHAIN_NCTF_D2

DAISY_CHAIN_NCTF_D44

DAISY_CHAIN_NCTF_F1

DAISY_CHAIN_NCTF_F3 DAISY_CHAIN_NCTF_F43

DAISY_CHAIN_NCTF_F45

DAISY_CHAIN_NCTF_H2 DAISY_CHAIN_NCTF_H44

RSVD_CB11 RSVD_H15

OUT

OUT OUT OUT

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(MUXed with HDMI

NO_TEST

Internal panel

eDP Port Assignment:

TBT Sink 0

TBT Sink 1

if necessary)

DDI Port Assignments:

NO_TEST

exist between both TP’s on each corner.

Other corner test signals connected in

Each corner of CPU has two testpoints.

MCP Daisy-Chain Strategy:

daisy-chain fashion. Continuity should

63

53 66

53

66

53 66

BGA

OMIT_TABLE

CRITICAL

BROADWELL-MOBILE-Y-B

U0500

AD25

AD26

AG25

AG26

AC25

AC26

AE25

AE26

AD22

AG22

AD21

AG21

AC22

AE22

AC21

AE21

AG16 AE17

Y21

AP41

AD17

AG18

AD18

AA17

AC17

AE18

AC18

W17

BROADWELL-MOBILE-Y-B

BGA

CRITICAL

OMIT_TABLE

U0500

A44 C43 C45

D2 D44 F1

F3

F43

F45

H2

H44

CB11

H15

1/20W MF

1%

24.9

201

R0530

1

2

29 68

29

68

29 68

63

CPU GFX/DC_TEST

SYNC_DATE=04/10/2013SYNC_MASTER=J92_WILL

TP_MCP_DC_A44

TP_MCP_DC_H44

TP_ULX_SPARE1

DP_TBTSNK0_ML_C_N<1>

DP_TBTSNK0_ML_C_P<0>

TP_ULX_SSP_SPARE

DP_INT_ML_C_P<3>

DP_INT_ML_C_P<2>

DP_INT_ML_C_P<1>

DP_INT_ML_C_P<0>

DP_INT_ML_C_N<3>

DP_INT_ML_C_N<2>

DP_INT_ML_C_N<1>

DP_INT_ML_C_N<0>

MCP_EDP_RCOMP TP_EDP_DISP_UTIL

DP_INT_AUXCH_C_P

DP_INT_AUXCH_C_N

NC_DP_TBTSNK1_ML_CP<3>

NC_DP_TBTSNK1_ML_CP<2>

NC_DP_TBTSNK1_ML_CP<1>

NC_DP_TBTSNK1_ML_CP<0>

NC_DP_TBTSNK1_ML_CN<3>

NC_DP_TBTSNK1_ML_CN<2>

NC_DP_TBTSNK1_ML_CN<1>

NC_DP_TBTSNK1_ML_CN<0>

DP_TBTSNK0_ML_C_P<3>

DP_TBTSNK0_ML_C_P<2>

DP_TBTSNK0_ML_C_P<1>

DP_TBTSNK0_ML_C_N<3>

DP_TBTSNK0_ML_C_N<2>

DP_TBTSNK0_ML_C_N<0>

PPVCOMP_S0_CPU

TRUE

MCP_DC_H2_F3

TRUE

MCP_DC_F43_F45

TP_MCP_DC_F1

TP_MCP_DC_D2

TP_MCP_DC_C45

MCP_DC_C43_D44

TRUE

<SCH_NUM>

5 OF 130

5 OF 75

62

8

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(2 OF 20)

MISC

JTAG

THERMAL

PWR

DDR3

PROC_TRST*

PROC_TDO

PROC_TDI

PROC_TCK

PROCPWRGD

PROCHOT*

PREQ*

PRDY*

PECI

BPM7*

BPM6*

BPM5*

BPM4*

BPM3*

BPM2*

BPM1*

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PROC_TMS

BPM0*

CATERR*

PROC_DETECT*

SM_PG_CNTL1

SM_DRAMRST*

BI BI

BI

BI BI

NC NC

NC

NC NC

NC

NC NC

BI

OUT

NC

BI

OUT

IN

OUT

CFG[9]

CFG[8]

CFG[7]

CFG[5]

CFG[4]

CFG[3]

VSS

TD_IREF

RSVD_TP

RSVD

PROC_OPI_RCOMP

CFG[19]

CFG[15]

CFG[14]

CFG[13]

CFG[12]

CFG[10]

CFG[6]

CFG[16] CFG[17] CFG[18]

CFG[11]

CFG[0] CFG[1] CFG[2]

CFG_RCOMP

(19 OF 20)

RESERVED

NC NC NC NC

NC NC

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

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PAGE TITLE

SHEET

R

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DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

These can be placed close to J1800

CFG<4> :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED

TBD: Confirm w/ Intel which still apply for BDW-Y

and are only for debug access

CFG<0> :RESET SEQUENCE STALL 1 = NORMAL OPERATION 0 = STALL AFTER PCU PLL LOCK

CFG<10>:SAFE MODE BOOT 1 = NORMAL OPERATION 0 = POWER FEATURES NOT ACTIVE

(IPU)

(IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU)

(IPD) (IPU)

(IPU)

(IPU) (IPU)

(IPU)

CFG<9> :NO SVID-CAPABLE VR 1 = VR SUPPORTS SVID 0 = VR DOES NOT SUPPORT SVID

CFG<1> :PCH-LESS MODE 1 = NORMAL OPERATION 0 = PCH-LESS MODE

CFG<8> :ALLOW NOA ON LOCKED UNITS 1 = NORMAL OPERATION 0 = NOA ALWAYS UNLOCKED

.

(IPU)

(IPU) (IPU) (IPU) (IPU)

CRITICAL

OMIT_TABLE

BROADWELL-MOBILE-Y-B

BGA

U0500

CM39 CN38 CK36 CM37 CN36 CR35 CN34 CR34

CH39

CK42

CU40 CR41

CF41

CM41

CU36 CU38

CN40 CR39

CH41

CG42

AB2

BL14

CV7 CP7 CT7

NOSTUFF

1K

5%

201

1/20W

MF

R0640

1

2

NOSTUFF

1K

5%

201

1/20W MF

R0639

1

2

NOSTUFF

MF

1/20W

201

5%

1K

R0638

1

2

MF

1/20W 201

5%

1K

NOSTUFF

R0631

1

2

NOSTUFF

1K

5%

201

1/20W MF

R0630

1

2

6

16 66

6

16 66

16

66

16 66

6

16 66

16

66

6

16 66

6

16 66

6

16 66

16

66

16 66

MF

1/20W

49.9

201

1%

R0681

1

2

31 32 44

66

62

5%

1/20W

MF

201

R0610

1

2

201

5% MF

56

1/20W

R0611

12

32 66

31 64

66

PLACE_NEAR=U0500.CG42:12.7mm

10K

5%

1/20W

MF

201

R0620

1

2

16 66

16

66

16 66

12 16 66

16 66

PLACE_NEAR=U0500.CT7:12.7mm

100

1%

201

1/20W

MF

R0652

1

2

PLACE_NEAR=U0500.CP7:12.7mm

121

1%

201

1/20W

MF

R0651

1

2

PLACE_NEAR=U0500.CV7:12.7mm

MF

1/20W

201

200

1%

R0650

1

2

18

61

1%

49.9

1/20W

201

MF

R0680

1

2

OMIT_TABLE

BROADWELL-MOBILE-Y-B

CRITICAL

BGA

U0500

CV27 CT27

CP31 CN32 CV33 CU34 CT33 CP33 CR28 CN28 CR32 CU32

CP27 CU28 CV29 CT29 CM29 CU30 CN30 CV31

CR30

AB6

AJ22

AJ34

AK25

AL20

AL24

AP3 BJ40 BJ42

BT41 BT43

CK6

CL28

CL34

CL8

N18

P33

AA18

AL32

AL34

BJ14

BT15

CK13

Y18

W21

W33

Y33

Y34L40

AL26

AL28

1% 1/20W

201

MF

8.2K

R0685

1

2

1K

5%

201

1/20W MF

EDP

R0634

1

2

SYNC_DATE=04/10/2013SYNC_MASTER=J92_WILL

CPU Misc/JTAG/CFG/RSVD

CPU_SM_RCOMP<0>

CPU_PWRGD

CPU_PROCHOT_R_L

CPU_SM_RCOMP<1> CPU_SM_RCOMP<2>

CPU_CFG<1>

CPU_CFG<8>

CPU_CFG<10>

CPU_CFG<0>

CPU_CFG<4>

CPU_CFG_RCOMP

CPU_CFG<1>

CPU_CFG<0>

CPU_CFG<11>

CPU_CFG<18>

CPU_CFG<17>

CPU_CFG<16>

CPU_CFG<6>

CPU_CFG<10>

CPU_CFG<12> CPU_CFG<13> CPU_CFG<14> CPU_CFG<15>

CPU_CFG<19>

CPU_CFG<4> CPU_CFG<5>

CPU_CFG<7>

CPU_CFG<9>

PP1V05_S0

XDP_CPUPCH_TRST_L

XDP_CPU_TDO

XDP_CPU_TDI

XDP_CPU_TCK

XDP_CPU_PREQ_L

XDP_CPU_PRDY_L

XDP_BPM_L<7>

XDP_BPM_L<6>

XDP_BPM_L<5>

XDP_BPM_L<4>

XDP_BPM_L<3>

XDP_BPM_L<2>

XDP_BPM_L<1>

XDP_CPU_TMS

XDP_BPM_L<0>

CPU_PECI

CPU_CATERR_L

CPU_PROCHOT_L

TP_CPU_MEMVTT_PWR_EN_LSVDDQ

TP_CPU_MEM_RESET_L

TP_MCP_RSVD_Y18

TP_MCP_RSVD_AL32

TP_MCP_RSVD_BJ14 TP_MCP_RSVD_BT15

TP_MCP_RSVD_AA18

TP_MCP_RSVD_AL34

CPU_CFG<3>

MCP_RSVD_CK13

PCH_TD_IREF

CPU_OPI_RCOMP

CPU_CFG<8>

CPU_CFG<2>

CPU_CFG<9>

6 OF 75

6 OF 130

<SCH_NUM>

66

6

16 66

6

16 66

6

16 66

6

16 66

6

16 66

8

11 15 16

17 32 44 46 51 60

64

6

16 66

WWW.AliSaler.Com

BI

BI BI BI

BI

BI BI

BI

BI BI

BI

BI BI

BI

BI BI

OUT

OUT OUT

OUT

OUT OUT

OUT

OUT OUT OUT

OUT

OUT OUT OUT

OUT

OUT OUT OUT

BI

BI BI BI

BI

OUT OUT

OUT

OUT OUT

OUT OUT OUT OUT

OUT OUT

OUT

OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT

OUT

OUT OUT OUT OUT OUT OUT

BI

BI BI

BI

BI BI BI BI BI

BI

BI BI BI BI BI BI BI BI

(3 OF 20)

MEMORY CHANNEL A

SA_CAA5

SA_CAA0

NOTUSED

SA_CAB5

SA_CAB8

SA_CAB9

SA_DQSN1

SA_DQSN0

SA_DQ5 SA_DQ6

SA_CAB3

SA_DQ9

SM_VREF_DQ1

SM_VCCDDQG

SA_ODT0

SA_CAB0

SA_CAA6

SA_CAA7

SA_CAA1

SA_DQSP7

SA_DQSP6

SA_DQSP5

SA_DQSP4

SA_DQSP3

SA_DQSP2

SA_DQSP1

SA_DQSP0

SA_DQSN7

SA_DQSN6

SA_DQSN5

SA_DQSN4

SA_DQSN3

SA_DQSN2

SA_DQ63

SA_DQ62

SA_DQ61

SA_DQ60

SA_DQ59

SA_DQ58

SA_DQ57

SA_DQ56

SA_DQ55

SA_DQ54

SA_DQ53

SA_DQ52

SA_DQ51

SA_DQ50

SA_DQ49

SA_DQ48

SA_DQ47

SA_DQ46

SA_DQ45

SA_DQ44

SA_DQ43

SA_DQ42

SA_DQ41

SA_DQ40

SA_DQ39

SA_DQ38

SA_DQ37

SA_DQ36

SA_DQ35

SA_DQ34

SA_DQ33

SA_DQ32

SA_DQ31

SA_DQ30

SA_DQ29

SA_DQ28

SA_DQ27

SA_DQ26

SA_DQ25

SA_DQ24

SA_DQ23

SA_DQ22

SA_DQ21

SA_DQ18

SA_DQ17

SA_DQ16

SA_DQ8

SA_DQ7

SA_CS1*

SA_CS0*

SA_CLK1

SA_CKE1

SA_CAA9

SA_CAB6

SA_CAA8

SA_DQ20

SA_DQ19 SA_CAB4

SM_VREF_DQ0

SM_VREF_CA

SA_CKE3

SA_CKE2

SA_CKE0

SA_CLK1*

SA_CAB2

SA_CAB7

SA_CAB1

SA_CLK0

SA_CLK0*

SA_DQ1

SA_DQ4

SA_DQ3

SA_DQ2

SA_DQ0

SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15

SA_CAA3

SA_CAA4

SA_CAA2

(4 OF 20)

MEMORY CHANNEL B

SB_CAA2

SB_CAB5

SB_CAB7

SB_CAA1

SB_CAA3

SB_CAA4

SB_CAB1

SB_CAB2

SB_DQ2

SB_DQ1

SB_ODT0

SB_CAB0

SB_CAA6

SB_CAA7

SB_CAB8

SB_CAB9

SB_DQSP7

SB_DQSP6

SB_DQSP5

SB_DQSP4

SB_DQSP3

SB_DQSP2

SB_DQSP1

SB_DQSP0

SB_DQSN7

SB_DQSN6

SB_DQSN5

SB_DQSN4

SB_DQSN3

SB_DQSN2

SB_DQSN1

SB_DQSN0

SB_DQ63

SB_DQ62

SB_DQ61

SB_DQ60

SB_DQ59

SB_DQ58

SB_DQ57

SB_DQ56

SB_DQ55

SB_DQ54

SB_DQ53

SB_DQ52

SB_DQ51

SB_DQ50

SB_DQ49

SB_DQ48

SB_DQ47

SB_DQ46

SB_DQ45

SB_DQ44

SB_DQ43

SB_DQ42

SB_DQ41

SB_DQ40

SB_DQ39

SB_DQ38

SB_DQ37

SB_DQ36

SB_DQ35

SB_DQ34

SB_DQ33

SB_DQ32

SB_DQ31

SB_DQ28

SB_DQ27

SB_DQ26

SB_DQ25

SB_DQ24

SB_DQ21

SB_DQ20

SB_DQ19

SB_DQ18

SB_DQ17

SB_DQ15

SB_DQ14

SB_DQ13

SB_DQ12

SB_DQ11

SB_DQ10

SB_DQ9

SB_DQ8

SB_DQ4

SB_CS1*

SB_CS0*

SB_CK1*

SB_CK1

SB_CK0*

SB_CK0

SB_CAA9

SB_CAA5

SB_CAB6

SB_CAB4

SB_CAA8

SB_CKE3

SB_CKE2

SB_DQ16

SB_DQ30

SB_DQ29

SB_CKE0 SB_CKE1

SB_CAB3

SB_DQ6

SB_DQ22 SB_DQ23

SB_DQ3

SB_DQ0

SB_DQ5

SB_DQ7

SB_CAA0

NOTUSED

OUT

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

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4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

61 69

61

69

61 69

20 61 69

61 69

61

20 61 69

20 69

61

20 61 69

61

20 61 69

61

61 69

20 61 69

61 69

20 69

21 64 69

21 69

21 64 69

21 69

21 64 69

21 61 69

61

21 61 69

61

21 61 69

61

61 64 69

61 69

21 61 69

61 69

61 64 69

61 69

21 61 69

61 69

BROADWELL-MOBILE-Y-B

CRITICAL

OMIT_TABLE

BGA

U0500

CE10 CG8 CG6

CC12

CH3

CB9

CE6

CF11

CH5

CG12

CG10

CF9

CB3

CC8

CE4

CE2

CB5

CF5

CC2

CF3

CE12

CE8

CH11 CH9 CA12 CA10

CG2

CG4

CC6

CC4

CA4 CA2

CT17 CV17

CP10 CM10 CN12 CV13 CV10 CT10 CT25 CP25 CN22 CP23

CN14

CN24 CV25 CV23 CT23 CN20 CN18 CT21 CT19 CP19 CP21

CP15

CV19 CV21

BU2 BW2 BW6 BU4 BW4 BT3 BU6 BT5

CN16

BN2 BR2 BN6 BN4 BR6 BR4 BM5

BM3 BT11 BU10

CR16

BW12 BW10

BW8

BU8 BU12

BT9

BN8

BR8 BN12 BN10

CM13

BR12 BR10 BM11

BM9

CV15 CT13 CP13

CU16 CR12 CR24 CR20 BV3 BP3 BV9 BP9

CT15 CU12 CU24 CU20 BV5 BP5 BV11 BP11

CA6

CC14

AP13

AU14

AT13

BGA

BROADWELL-MOBILE-Y-B

OMIT_TABLE

CRITICAL

U0500

AR6 AT5 AT3

AY5

BA8

AW2

AY3

AU2

AU6

AU4

AR2

BA6

AW8

AW10

AW12

BA10

AY11

AU8

BA12

AY9

AR4

AT9

AW4

AW6

AP9

AP11

BA2 BA4 AR8 AP5

AR10 AT11

BK3 BK5

BC6 BE2 BE4 BE6 BC2

BC4 BE10 BC10

BE8

BC8

BG6

BF11 BC12 BE12

BF9 BJ12 BG12

BJ8 BJ10

BG8 BG10

BJ2

BK9 BK11

AM1

AH2

AJ3

AM5

AM3

AJ1

AJ5

AH4

BJ4

AG3

AG1

AD2

AE3

AE1

AG5

AD4

AE5

AM9

AM7

BJ6

AH8

AJ9 AM11

AJ7 AJ11 AH10 AE11

AG7

AE7

AE9

BG2

AG11

AG9

AD8 AD10

BG4

BF3

BF5

BH5 BD5 BD11 BH11 AK2 AF2 AK8 AF8

BH3 BD3 BD9 BH9 AK4 AF4 AK10 AF10

AU10

19

61 64 69

61

69

61 69

20 61 69

61 69

21 61 69

61 69

SYNC_DATE=07/17/2013

SYNC_MASTER=J92_LS_MLB

CPU DDR3/LPDDR3 Interfaces

MEM_A_DQ<10> MEM_A_DQ<11> MEM_A_DQ<12>

MEM_A_DQ<15>

MEM_A_CAB<6>

MEM_B_DQ<6>

MEM_A_DQS_N<4>

MEM_A_DQS_P<6>

MEM_B_DQ<38> MEM_B_DQ<39>

=MEM_A_BA<0>

MEM_B_DQ<40>

MEM_B_DQ<44>

MEM_B_DQ<36> MEM_B_DQ<37>

MEM_A_CKE<1>

=MEM_B_A<8>

MEM_A_CLK_P<0>

MEM_B_DQ<10>

MEM_B_DQ<14>

MEM_B_DQ<12>

=MEM_A_A<5>

TP_LPDDR3_RSVD1 TP_LPDDR3_RSVD2

=MEM_A_A<2>

=MEM_A_A<1>

=MEM_A_A<0>

MEM_A_DQS_N<1>

MEM_A_DQS_N<0>

MEM_A_DQ<5> MEM_A_DQ<6>

=MEM_A_RAS_L

MEM_A_DQ<9>

CPU_DIMMB_VREFDQ TP_ULX_DDR_VCCDDQG

MEM_A_ODT<0>

=MEM_A_A<13>

MEM_A_CAA<6>

=MEM_A_A<11>

=MEM_A_A<9>

MEM_A_DQS_P<7>

MEM_A_DQS_P<5>

MEM_A_DQS_P<4>

MEM_A_DQS_P<3>

MEM_A_DQS_P<2>

MEM_A_DQS_P<1>

MEM_A_DQS_P<0>

MEM_A_DQS_N<7>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<3>

MEM_A_DQS_N<2>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<8>

MEM_A_DQ<7>

MEM_A_CS_L<1>

MEM_A_CS_L<0>

MEM_A_CLK_P<1>

=MEM_A_A<14> =MEM_A_A<15>

MEM_A_DQ<19>

CPU_DIMMA_VREFDQ

CPU_DIMM_VREFCA

MEM_A_CKE<3>

MEM_A_CKE<2>

MEM_A_CKE<0>

MEM_A_CLK_N<1>

=MEM_A_WE_L

=MEM_A_A<10>

=MEM_A_CAS_L

MEM_A_CLK_N<0>

MEM_A_DQ<1>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<0>

MEM_A_DQ<13> MEM_A_DQ<14>

=MEM_A_A<8>

=MEM_A_A<7>

=MEM_A_A<6>

MEM_A_DQ<20> MEM_A_DQ<21> MEM_A_DQ<22> MEM_A_DQ<23> MEM_A_DQ<24> MEM_A_DQ<25> MEM_A_DQ<26> MEM_A_DQ<27> MEM_A_DQ<28> MEM_A_DQ<29> MEM_A_DQ<30> MEM_A_DQ<31> MEM_A_DQ<32> MEM_A_DQ<33> MEM_A_DQ<34> MEM_A_DQ<35> MEM_A_DQ<36> MEM_A_DQ<37> MEM_A_DQ<38> MEM_A_DQ<39> MEM_A_DQ<40> MEM_A_DQ<41> MEM_A_DQ<42> MEM_A_DQ<43> MEM_A_DQ<44> MEM_A_DQ<45> MEM_A_DQ<46> MEM_A_DQ<47> MEM_A_DQ<48> MEM_A_DQ<49> MEM_A_DQ<50> MEM_A_DQ<51> MEM_A_DQ<52> MEM_A_DQ<53> MEM_A_DQ<54> MEM_A_DQ<55> MEM_A_DQ<56> MEM_A_DQ<57> MEM_A_DQ<58> MEM_A_DQ<59> MEM_A_DQ<60> MEM_A_DQ<61> MEM_A_DQ<62> MEM_A_DQ<63>

=MEM_B_A<6>

=MEM_B_A<2>

=MEM_B_A<10>

=MEM_B_A<9>

=MEM_B_CAS_L

=MEM_B_WE_L

MEM_B_DQ<1>

MEM_B_ODT<0>

=MEM_B_A<13>

MEM_B_CAA<6>

=MEM_B_A<11>

=MEM_B_A<1>

=MEM_B_A<0>

MEM_B_DQS_P<7>

MEM_B_DQS_P<6>

MEM_B_DQS_P<5>

MEM_B_DQS_P<4>

MEM_B_DQS_P<3>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<0>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<5>

MEM_B_DQS_N<4>

MEM_B_DQS_N<3>

MEM_B_DQS_N<2>

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_B_DQ<9>

MEM_B_CS_L<1>

MEM_B_CS_L<0>

MEM_B_CLK_N<1> MEM_B_CLK_P<1>

MEM_B_CLK_N<0> MEM_B_CLK_P<0>

=MEM_B_A<14>

=MEM_B_BA<2>

MEM_B_CAB<6>

=MEM_B_BA<0>

=MEM_B_A<15>

MEM_B_CKE<3>

MEM_B_CKE<2>

MEM_B_CKE<0>

=MEM_B_RAS_L

MEM_B_DQ<3>

MEM_B_DQ<0>

MEM_B_DQ<7>

=MEM_B_A<5>

TP_LPDDR3_RSVD4

TP_LPDDR3_RSVD3

MEM_B_DQ<24>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DQ<25>

MEM_B_DQ<30>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_B_DQ<31>

MEM_B_DQ<45>

MEM_B_DQ<41>

MEM_B_DQ<47>

MEM_B_DQ<46>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_CKE<1>

MEM_B_DQ<18>

MEM_B_DQ<15>

=MEM_A_BA<2>

MEM_B_DQ<13>

MEM_B_DQ<11>

MEM_B_DQ<8>

=MEM_B_A<7>

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<19>

MEM_B_DQ<2>

MEM_B_DQ<4> MEM_B_DQ<5>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<43>

MEM_B_DQ<42>

MEM_B_DQ<49>

MEM_B_DQ<48>

<SCH_NUM>

7 OF 130

7 OF 75

64

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OUT

IN

OUT

IN

OUT

BI

DCPSUS4

VCCOPIPLL VCCHDAPLL

DCPSUS3

DCPRTC

VCC1_05

VCCUSB2PLL

VCCTS1_5

VCCSUS3_3_RTC

VCCSUS3_3

VCCSPI

VCCSDIO

VCCRTC

VCCHDA

VCCCLK7 VCCCLK5 VCCCLK3

VCCCLK2

VCCCLK1

VCC3_3

VCC1_05_USB

DCPSUSBYP

DCPSUS1

VCCACLKPLL

VCCCLK4

VCCTS3_3

VCCASW

DCPSUS2

VCCDSW3_3

VCCUSB3PHY

VCCUSB3PLL

VCCSUS3_3

VCCCLK6

VCCSATA3PLL

VCC1_05_PHY

VCCPCIEPHY

VCCSATAPHY

OPIICC

USB2

GPIO/LCC USB3MISC

CORE

RTC

(13 OF 20)

SERIAL IO

SPI

HSIO

AZALIA/HDA

VRM/USB2/AZALIA

WPT LP POWER

SUS OSCILLATOR

THERMAL SENSOR

BRW ULX POWER

(12 OF 20)

RSVD

VCC RSVD

VSS

IST_TRIGGER

RSVD

VCCST

VCC

VDDQ

VIDSCLK

VR_EN VR_READY

RSVD

VIDALERT*

VIDSOUT VCCST_PWRGD

IVR_ERROR

RSVD_TP

PWR_DEBUG*

VSS

VCC_SENSE

VCCIO_OUT

RSVD

VCOMP_OUT

NC NC

NC

NC NC NC

NC NC

NC

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

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4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

LPT-LP current estimates from Lynx Point-LP PCH EDS, doc #503118, v1.0.

Max load: 300mA

???mA Max

R0800.2:

R0810.2:

R0802.2:

Max load: 300mA

32A Max

1.1A Max (LPDDR3: 1.2V)

1.4A Max (DDR3: 1.5-1.35V)

to avoid any extraneous connections.

NOTE: Aliases not used on CPU supply outputs

Note [1] current numbers from clarification email, from Srini, dated 9/10/2012 2:11pm.

HSW-ULT current estimates from Haswell Mobile ULT Processor EDS vol 1, doc #502406, v0.9.

6.3V

10%

0.47UF

CERM-X5R 0201

C0897

1

2

PLACE_NEAR=U0500.AG13:6.35mm

0

0201

MF

1/20W

5%

R0896

12

BYPASS=U0500.V15::6.35mm

0201

10V X5R-CERM

10%

0.1UF

C0895

1

2

10V

X5R-CERM

0201

10%

0.1UF

BYPASS=U0500.AA15::6.35mm

C0892

1

2

X5R-CERM

BYPASS=U0500.AA15::6.35mm

10%

0.1UF

0201

10V

C0891

1

2

BYPASS=U0500.AA15::6.35mm

X5R

6.3V 0201

20%

1UF

C0890

1

2

201

5%

1/20W

MF

PLACE_NEAR=U0500.CH45:50.8mm

100

R0860

1

2

44 66

16 17

46

44

201

1/20W MF

PLACE_NEAR=U0500.CE40:2.54mm

130

1%

R0802

1

2

201

1/20W

MF

PLACE_NEAR=R0810.1:2.54mm

75

1%

R0800

1

2

201

5%

1/20W

MF

PLACE_NEAR=U0500.CD43:38.1mm

43

R0810

12

5%

0

0201

1/20W

MF

R0811

12

0201

5%

0

1/20W

MF

R0812

12

44 66

44

66

CRITICAL

OMIT_TABLE

BGA

BROADWELL-MOBILE-Y-B

U0500

V15

U16

AG14

U30

T21

AG13

AJ45

AG45

AH36

AJ16

T31

T17

AE13

W22

Y22

T27

A26

A28

A30

AK35

AE15

N1 T1 W14

AK23

AK31

AJ28

AL37

AL39

AL30

AJ26

AA1

AB14

AA13

W1

AK29

AK19

AA45

AB38

W45

AA15

T33

N45 T45

A32

A24 T25

U18

AL14

AC15

AJ32

AB36

AK17

AE45

AC45 AD36

T35

OMIT_TABLE

CRITICAL

BROADWELL-MOBILE-Y-B

BGA

U0500

CL26

CK27

CK40

CK25

AK33

AL16

AL22

CJ16

CJ28

CJ32

CK19

CK21

CK31

CL14

CL22

CM27

CM33

CK23

CJ22

AV45

AY45 BB45 BD45 BF45 BH45

BK45

BM45 BP45

BT45

BV41 BV43

BV45

BW40

BW42

BW44

BY41

BY43

BY45

CA40

CA42

CA44

CB41

CB43

CB45 CD45 CF45 CM45 CN44 CR43 CR45 CU44 CV43 CV45

CY13 CY15

CY17

CY19 CY21 CY23 CY25 CY27 CY29 CY31 CY33 CY36 CY38

CY40

CY42 CY44

CH45

BM43

AJ20

BU14

AR40

AP1 AV1

BA14

BB1 BC14 BE14

BF1

BK1

BP1

BV1

CB1

CF1

CL1

CM3

CR1

CT3

CW1

CY3

CD43 CD41 CE40

CE42 CF43

CF39

CJ20

16

BYPASS=U0500.AG13::6.35mm

0201

X5R

6.3V

20%

1UF

C0896

1

2

201

5%

1/20W

MF

10K

R0850

1

2

44 62

CPU/PCH POWER

SYNC_DATE=10/01/2013

SYNC_MASTER=J92_DEVMLB

CPU_VIDSCLK_R CPU_VIDSOUT_R

PPVOUT_S0_PCH_DCPRTC

MIN_LINE_WIDTH=0.2 mm VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 mm

PPVRTC_G3H

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.2 mm

PP1V05_S5_PCH_VCCDSW

MIN_NECK_WIDTH=0.1 mm VOLTAGE=1.05V

MIN_LINE_WIDTH=0.2 mm

PP1V05_S5_PCH_VCCDSW_R

PP3V3_S5

PP3V3_S0

VOLTAGE=1.05V

PPVCOMP_S0_CPU

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.4 mm

TP_PPVCCIO_S0_CPU

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 mm

TP_MCP_DC_CY3

PP1V2_S3

TP_MCP_DC_CY44

MCP_DC_CV45

PPVCC_S0_CPU

CPU_VCCST_PWRGD

CPU_VIDALERT_R_L

PPVCC_S0_CPU

TP_MCP_DC_CW1

PP1V05_S0SW_PCH_USB3

PP1V05_S0SW_PCH_SATA

PP1V05_S0SW_PCH_PCIE

PP1V05_S0

CPU_VIDSOUT

PPVCC_S0_CPU

CPU_VIDALERT_L

CPU_PWR_DEBUG_L

PP1V05_S0

CPU_VCCSENSE_P

PP1V05_S0

PP1V05_S0SW_PCH_VCCSATA3PLL

PP3V3_SUS

PP1V05_S0SW_PCH_VCCUSB3PLL

PP1V05_SUS

PP1V05_S0

PP1V05_S0_PCH_VCC_ICC PP1V05_S0_PCH_VCCACLKPLL

PP1V05_SUS

PP1V05_S0

PP3V3_S0

PP1V05_S0

PP1V5_S0

PP3V3_S0

PP3V3_SUS

PP1V5_S0

PP1V05_S0_PCH_VCCAPLL_OPI

PP1V05_SUS

PP1V05_S0_PCH_VCCAPLL_OPI

TP_MCP_RSVD_CJ22 TP_MCP_RSVD_CK23

TP_IST_TRIGGER

TP_IVR_ERROR

CPU_VR_EN CPU_VR_READY

CPU_VIDSCLK

PP3V3_SUS

PP3V3_S5

PP3V3_SUS

PP1V05_S0

PP1V05_SUS_PCH_VCCAOSCSUS

<SCH_NUM>

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VSS

VSS_SENSE

VSS

OUT

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THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BGA

OMIT_TABLE

CRITICAL

BROADWELL-MOBILE-Y-B

U0500

AH29

AH30

AH31

AH32

AH33

AH34 AH44

AH6

AJ18

AJ24

AJ30 AJ37

AJ39

AK12 AK21 AK27

AK6

AM13

AM17

AM19

AM21 AM23 AM25 AM27 AM29 AM31 AM35

AM45

AN10 AN12 AN14

AN2 AN4

AN40 AN42 AN44

AN6

AN8

AP15

AP39

AP43

AP7

AR42

AT1

AT15 AT39 AT45

AT7

AU44 AV13 AV15 AV39 AW44

AY1

AY13 AY15 AY39

AY7

BA44

BB11 BB13 BB15

BB3

BB39

BB5 BB7 BB9

BC44 BD1

BD13 BD15 BD39

BD7

BE40 BE42

BE44

BF13 BF15 BF39

BF7

BG14 BG44 BH1

BH13 BH15 BH39 BH41 BH43

BH7

BJ44

BK13 BK15 BK39

BK7

BL10 BL12

BL2 BL4

BL40 BL42 BL44

BL6

BL8

BM1

BM13 BM39

BM7

BN44 BP13 CH1 CH15

CJ18 CJ24

CJ30

CL24

CL5

CN1

CU1

CV3

CV39 CV41 CW12 CW14 CW16 CW18

CRITICAL

OMIT_TABLE

BGA

BROADWELL-MOBILE-Y-B

U0500

AC32

AJ13

AK15

AK44

AM33

AV7

CA14

CH7

E16E20

E24

E28

E32 E36

F5 G16

G20

G24 N16

N20

N24 N28 N32 P35

R10

R16

R18

R2

R20

R22

R24 R26 R28

R30

R4

R44

R6 R8

CH43

T15

U22

U24

U26

U28 U32

U34

V17

V2

V40

44 66

PLACE_NEAR=U0500.CH43:50.8mm

201

MF

1/20W

100

5%

R0960

1

2

BGA

CRITICAL

OMIT_TABLE

BROADWELL-MOBILE-Y-B

U0500

A42

A6

AA11

AF36

BN14

BR14

BW14

CE14

CG14

CJ34

CK29

CK33

CL30

CL32

D4

D42

H42

J1

J3

J43

J45

L38

T13

W30

W32

W34

W35

Y12 Y14 Y16

Y19

Y2

Y24 Y28 Y32 Y40

Y42

Y44

BGA

OMIT_TABLE

CRITICAL

BROADWELL-MOBILE-Y-B

U0500

AG39

AM39

AR14

AW14

BP39

BP7

BR44

BT1

BT13

BT39

BT7

BU40 BU42

BU44

BV13 BV15 BV39

BV7

BY1

BY11 BY13 BY15

BY3

BY39

BY5 BY7 BY9

C16 C20 C24 C28 C32 C36

CA8

CB13 CB15 CB39

CB7

CC10

CC40 CC42 CC44

CD1

CD11

CD13 CD15

CD3

CD39

CD5

CD7

CD9

CE44

CF13 CF15

CF7

CG44 CH13 CJ26

CK10

CK3

CK38 CK44 CL12 CM15 CM17 CM19 CM21 CM23 CM25 CM31 CM35 CM43

CN26

CN42

CN8

CP17 CP29

CP3

CR14 CR18 CR22 CR26 CR37

CR8

CT31

CU14 CU18 CU22 CU26 CU42

CU8

CV35 CV37

CW20

CW22 CW24 CW26 CW28

CW30

CW32 CW34

CW5 CW8

CY10

CY7

D10 G28

G32

H10 H36

J16

J20

J24 J28

J32

L16

L2 L20

L24

L28

L32

OMIT_TABLE

CRITICAL

BGA

BROADWELL-MOBILE-Y-B

U0500

A10

A16

A20

A36

A40

AA19

AA21

AA22

AA24

AA25

AA26

AA28

AA29

AA3

AA30

AA32

AA33

AA34

AA35

AA37

AA39

AA5

AA7

AB12

AB15

AB16

AB40

AB44

AB8

AC1

AC11

AC13

AC19

AC24

AC28

AC3

AC35

AC37

AC41

AC43

AC5

AC7

AC9

AD12

AD14

AD16

AD19

AD24

AD28

AD32

AD44

AD6

AE16

AE19

AE24

AE28

AE32

AE35

AE37

AF12

AF14

AF16

AF44

AF6

AG19

AG24

AG28

AG32

AG35

AG37

AH12

AH14

AH15

AH16

AH17

AH19

AH20

AH21

AH22

AH23

AH25

AH26

AH27

AH28

AR12 AU12

AV11

AV3 AV5 AV9

BM15 BP15

CN5 CR5 CU5

H4

T19

T23

T29

U14

U20

V44

W16

W18

W19

W24

W28

CPU/PCH GROUNDS

SYNC_DATE=04/10/2013SYNC_MASTER=J92_WILL

CPU_VCCSENSE_N

<SCH_NUM>

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THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

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THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

All Intel recommendations from Intel doc #503160 Shark Bay Ultrabook Platform Power Delivery Design Guide Rev 0.9 unless stated otherwise

Intel recommendation (Table 5-4): 2x 2.2uF 0402, 6x 10uF 0603

Apple implementation : 16x 10uF 0402 stuff, 12x 10uF 0402 nostuff

CPU VCC Decoupling

Intel recommendation (Table 5-1): 23x 22uF 0805 stuff, 7x 22uF 0805 nostuff

Apple implementation : 2x 2.2uF 0402, 6x 10uF 0402

CPU VDDQ DECOUPLING

Added 2 extra 2.2uF per Harris Beach v0.9 schematic

20% 4V

0402-1

X6S

10UF

NO STUFF

C1000

1

2

20%

6.3V CERM-X5R 0402-1

10UF

C1050

1

2

0402-1

20%

6.3V CERM-X5R

10UF

C1051

1

2

20%

6.3V

10UF

0402-1

CERM-X5R

C1052

1

2

20%

6.3V CERM-X5R 0402-1

10UF

C1053

1

2

20%

6.3V CERM-X5R 0402-1

10UF

C1054

1

2

20%

6.3V CERM-X5R 0402-1

10UF

C1055

1

2

20%

2.2UF

CERM

6.3V 402-LF

C1040

1

2

20%

2.2UF

CERM

6.3V 402-LF

C1041

1

2

20%

402-LF

CERM

6.3V

2.2UF

C1042

1

2

CERM 402-LF

2.2UF

20%

6.3V

C1043

1

2

0402-1

X6S

4V

20%

10UF

CRITICAL

C1001

1

2

20% X6S

4V

10UF

0402-1

CRITICAL

C1002

1

2

20% X6S

4V 0402-1

10UF

CRITICAL

C1003

1

2

X6S 0402-1

4V

20%

10UF

CRITICAL

C1004

1

2

0402-1

20% 4V X6S

10UF

NO STUFF

C1005

1

2

X6S

4V

20%

0402-1

10UF

NO STUFF

C1006

1

2

20% 4V X6S 0402-1

10UF

CRITICAL

C1007

1

2

20% 4V

10UF

X6S 0402-1

NO STUFF

C1008

1

2

0402-1

X6S

20% 4V

10UF

CRITICAL

C1009

1

2

4V

10UF

20% X6S

0402-1

C1011

1

2

10UF

20%

0402-1

4V X6S

C1012

1

2

10UF

20% 4V X6S

NO STUFF

0402-1

C1013

1

2

20%

0402-1

4V X6S

10UF

C1014

1

2

NO STUFF

10UF

20% 4V X6S 0402-1

C1015

1

2

20% 4V

10UF

0402-1

X6S

CRITICAL

C1016

1

2

0402-1

4V X6S

20%

10UF

NO STUFF

C1017

1

2

X6S

4V 0402-1

CRITICAL

20%

10UF

C1018

1

2

0402-1

4V

20% X6S

10UF

CRITICAL

C1019

1

2

10UF

4V X6S 0402-1

20%

CRITICAL

C1020

1

2

20%

0402-1

X6S

4V

10UF

NO STUFF

C1021

1

2

4V

20% X6S

0402-1

10UF

CRITICAL

C1022

1

2

X6S

20% 4V

0402-1

10UF

NO STUFF

C1025

1

2

4V

20% X6S

0402-1

10UF

C1026

1

2

0402-1

X6S

20% 4V

10UF

NO STUFF

C1027

1

2

20%

10UF

X6S

4V 0402-1

NO STUFF

C1028

1

2

20% X6S

4V 0402-1

NO STUFF

10UF

C1029

1

2

0402-1

20% X6S

4V

10UF

CRITICAL

C1023

1

2

CASE-B2S

CRITICAL

210UF

20%

2.5V POLY-TANT

C1031

1

2

CASE-B2S

CRITICAL

POLY-TANT

2.5V

20%

210UF

C1032

1

2

25V

12PF

CERM

5%

0201

C1030

1

2

CPU Decoupling

SYNC_DATE=10/01/2013

SYNC_MASTER=J92_DEVMLB

PP1V2_S3

PPVCC_S0_CPU

10 OF 130

<SCH_NUM>

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I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

PCH VCCSDIO BYPASS

(PCH 1.05V OPI PLL PWR)

PCH OPI VCCAPLL FILTER/BYPASS

(PCH 1.05V ACLK PLL PWR)

PCH VCCACLKPLL FILTER/BYPASS

PCH VCCSUS3_3 BYPASS

(PCH 3.3V SUSPEND RTC PWR)

(PCH 3.3V SUSPEND PWR)

PCH VCC3_3 BYPASS

PCH VCCA OSC FILTER/BYPASS (PCH 1.05V SUS VCCA OSC)

??mA Max

41mA Max

PCH VCCUSB3PLL FILTER/BYPASS

??mA Max

57mA Max

PCH VCCSUSHDA BYPASS (PCH 3.3V/1.5V HDA PWR)

(PCH 1.05V VCCCLK PWR)

PCH VCCCLK FILTER/BYPASS

??mA Max

(PCH 1.05V SATA PWR)

31mA Max

PCH VCCCLK BYPASS

PCH VCCSPI BYPASS

LPT-LP current estimates from Lynx Point-LP PCH EDS, doc #503118, v1.0 as well as from clarification email, from Srini, dated 9/10/2012 2:11pm.

(PCH 3.3V/1.8V SDIO PWR)

PCH VCC BYPASS

(PCH 1.05V SUS USB3 PWR)

(PCH 1.05V SUS PWR)

PCH VCCSUS3_3 BYPASS

42mA Max

??mA Max

PCH VCCIO BYPASS

PCH VCC BYPASS

(PCH 1.05V CLK PWR)

(PCH 1.05V SUS PWR)

PCH VCCAIDLE BYPASS

(PCH 1.05V USB2 PWR)

(PCH 1.05V USB3 PWR)

PCH VCCHSIO BYPASS

PCH VCC3_3 BYPASS (PCH 3.3V GPIO/LPC PWR)

PCH VCCHSIO BYPASS

(PCH 3.3V SPI PWR)

(PCH 1.05V PCIe PWR)

(PCH 1.05V USB3 PLL PWR)

PCH VCC BYPASS

(PCH 3.3V THERMAL PWR)

(PCH 1.05V CORE PWR)

PCH VCCASW BYPASS

PCH VCCSATA3PLL FILTER/BYPASS

PCH VCC BYPASS

PCH VCCHSIO BYPASS

(PCH 1.05V ME CORE PWR)

??mA Max

(PCH 1.05V SATA3 PLL PWR)

(PCH 3.3V DSW PWR)

PCH VCCDSW3_3 BYPASS

20%

20UF

0402

X5R-CERM

4V

BYPASS=U0500.AK35::12.7mm

C1270

1

2

X5R

1UF

0201

6.3V

20%

BYPASS=U0500.AL30::6.35mm

C1220

1

2

X5R

1UF

0201

6.3V

20%

BYPASS=U0500.AK31::6.35mm

C1222

1

2

1UF

X5R

0201

BYPASS=U0500.AK23::6.35mm

6.3V

20%

C1224

1

2

BYPASS=U0500.AJ28::6.35mm

0201

1UF

X5R

6.3V

20%

C1225

1

2

X5R

1UF

0201

6.3V

20%

BYPASS=U0500.AL39::6.35mm

C1223

1

2

1UF

6.3V 0201

X5R

20%

BYPASS=U0500.AJ26::6.35mm

C1221

1

2

1UF

CERM-X6S 0201

4V

20%

BYPASS=U0500.U30::6.35mm

C1227

1

2

CERM-X6S

10UF

6.3V 0402

20%

BYPASS=U0500.U30::12.7mm

C1226

1

2

1UF

CERM-X6S 0201

BYPASS=U0500.U16::6.35mm

4V

20%

C1228

1

2

4V

CERM-X6S

20%

0201

1UF

BYPASS=U0500.AC45::6.35mm

C1262

1

2

20%

0201

CERM-X6S

1UF

BYPASS=U0500.AK35::6.35mm

4V

C1272

1

2

X5R-CERM

BYPASS=U0500.AK35::12.7mm

20%

20UF

0402

4V

C1271

1

2

NOSTUFF

X5R-CERM

20%

4V

BYPASS=U0500.T1::12.7mm

20UF

0402

C1250

1

2

6.3V

10%

BYPASS=U0500.W14::6.35mm

0.1UF

X6S 0201

C1251

1

2

1UF

0201

CERM-X6S

4V

20%

BYPASS=U0500.AL37::6.35mm

C1277

1

2

20%

0402

X5R-CERM

4V

20UF

BYPASS=U0500.AL37::12.7mm

C1276

1

2

X5R-CERM

0402

20UF

20%

4V

BYPASS=U0500.AL37::12.7mm

C1275

1

2

6.3V

BYPASS=U0500.A32::6.35mm

0.1UF

X6S

10%

0201

C1208

1

2

CERM-X6S

BYPASS=U0500.AK19::6.35mm

0201

4V

20%

1UF

C1282

1

2

NO STUFF

20%

X5R-CERM

0402

20UF

BYPASS=U0500.AK19::12.7mm

4V

C1281

1

2

NO STUFF

20%

0402

X5R-CERM

4V

20UF

BYPASS=U0500.AK19::12.7mm

C1280

1

2

BYPASS=U0500.AK29::6.35mm

CERM-X6S 0201

1UF

4V

20%

C1283

1

2

0201

CERM-X6S

1UF

20%

BYPASS=U0500.AK17::6.35mm

4V

C1284

1

2

NOSTUFF

20% 4V

0201

1UF

CERM-X6S

BYPASS=U0500.T35::6.35mm

C1297

1

2

BYPASS=U0500.T35::12.7mm

20%

20UF

0402

X5R-CERM

4V

C1296

1

2

20%

20UF

0402

X5R-CERM

4V

BYPASS=U0500.T35::12.7mm

C1295

1

2

BYPASS=U0500.U18::12.7mm

20%

20UF

6.3V 0402

CERM-X5R

C1204

1

2

20% 4V

0201

1UF

CERM-X6S

BYPASS=U0500.T33::6.35mm

NOSTUFF

C1292

1

2

20%

20UF

0402

X5R-CERM

4V

BYPASS=U0500.T33::12.7mm

NOSTUFF

C1291

1

2

20%

20UF

0402

X5R-CERM

4V

BYPASS=U0500.T33::12.7mm

NOSTUFF

C1290

1

2

20% 4V

0201

CERM-X6S

1UF

BYPASS=U0500.AG14::6.35mm

C1229

1

2

0201

CERM-X6S

1UF

4V

20%

BYPASS=U0500.AE13::6.35mm

C1264

1

2

10%

0.1UF

BYPASS=U0500.AA1::6.35mm

0201

X6S

6.3V

C1200

1

2

10% X6S

0.1UF

0201

6.3V

BYPASS=U0500.A24::6.35mm

C1202

1

2

1UF

BYPASS=U0500.N45::6.35mm

CERM-X6S

0201

4V

20%

C1261

1

2

20%

4V

0201

CERM-X6S

1UF

BYPASS=U0500.AB38::6.35mm

C1260

1

2

0201

20%

1UF

CERM-X6S

4V

BYPASS=U0500.T21::6.21mm

C1287

1

2

NO STUFF

BYPASS=U0500.T21::12.7mm

20%

0402

X5R-CERM

4V

20UF

C1286

1

2

NO STUFF

20%

0402

X5R-CERM

4V

20UF

BYPASS=U0500.T21::12.7mm

C1285

1

2

1UF

CERM-X6S

4V

20%

BYPASS=U0500.T31::6.35mm

0201

C1265

1

2

BYPASS=U0500.N1::6.35mm

0201

X6S

0.1UF

10%

6.3V

C1252

1

2

0201

6.3V

10% X6S

0.1UF

BYPASS=U0500.AB38::6.35mm

C1266

1

2

X6S 0201

6.3V

10%

0.1UF

BYPASS=U0500.AB38::6.35mm

C1267

1

2

0.1UF

0201

6.3V

10% X6S

BYPASS=U0500.N45::6.35mm

C1263

1

2

BYPASS=U0500.AC45::6.35mm

0201

6.3V

10% X6S

0.1UF

C1268

1

2

0201

6.3V

10% X6S

0.1UF

BYPASS=U0500.T27::6.35mm

C1216

1

2

0201

10%

0.1UF

X6S

6.3V

BYPASS=U0500.A28::6.35mm

C1215

1

2

X6S

0.1UF

10%

0201

6.3V

BYPASS=U0500.A30::12.7mm

C1212

1

2

0402

BYPASS=U0500.AK19::12.7mm

4V

X5R-CERM

20%

NO STUFF

20UF

C1289

1

2

NO STUFF

BYPASS=U0500.AK19::12.7mm

20UF

4V

X5R-CERM

0402

20%

C1288

1

2

BYPASS=U0500.AK35::12.7mm

4V

X5R-CERM

0402

20UF

20%

C1273

1

2

4V

0402

20UF

20%

BYPASS=U0500.AK35::12.7mm

X5R-CERM

C1274

1

2

20%

20UF

0402

X5R-CERM

4V

BYPASS=U0500.AL37::12.7mm

C1279

1

2

20%

20UF

0402

X5R-CERM

BYPASS=U0500.AL37::12.7mm

4V

C1278

1

2

NO STUFF

20UF

4V

X5R-CERM

0402

20%

BYPASS=U0500.T21::12.7mm

C1294

1

2

NO STUFF

BYPASS=U0500.T21::12.7mm

20UF

4V

X5R-CERM

0402

20%

C1293

1

2

603

0

5%

MF-LF

1/10W

R1280

12

603

1/10W MF-LF

5%

0

R1285

12

1/10W MF-LF

5%

0

603

R1290

12

BYPASS=U0500.W1::6.35mm

0201

CERM-X5R

10%

0.1UF

6.3V

C1210

1

2

20%

CERM

10V 402

0.1UF

BYPASS=U0500.AB36::6.35mm

C1214

1

2

1UF

0201

6.3V

20% X5R

BYPASS=U0500.AC15::6.35mm

C1206

1

2

BYPASS=U0500.Y22::12.7mm

CERM-X6S

10UF

6.3V

20%

0402

C1255

1

2

BYPASS=U0500.Y22::6.35mm

X6S

10%

6.3V 0201

0.1UF

C1257

1

2

2.2UH-240MA-0.221OHM

CRITICAL

0603

L1275

12

2.2UH-240MA-0.221OHM

CRITICAL

0603

L1295

12

1/16W

0

MF-LF

5%

402

R1275

12

0603

CRITICAL

2.2UH-240MA-0.221OHM

L1270

12

402

MF-LF

1/16W

5%

0

R1270

12

PCH Decoupling

SYNC_MASTER=J92_DEVMLB

SYNC_DATE=09/23/2013

PP1V05_S0SW_PCH_VCCSATA3PLL

MIN_LINE_WIDTH=0.2 MM MIN_NECK_WIDTH=0.075 MM VOLTAGE=1.05V

PP1V05_S0SW_PCH_SATA

PP1V05_S0

PP3V3_SUS

PP1V05_S0_PCH_VCCACLKPLL_R

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.2 MM

PP1V05_S0SW_PCH_PCIE

PP1V05_S0

PP3V3_SUS

PP3V3_S0

PP1V05_S0

PP1V05_S0SW_PCH_USB3

PP1V05_SUS

PP1V05_S0

PP1V05_S0SW_PCH_USB3

MIN_LINE_WIDTH=0.2 MM

PP1V05_S0_PCH_VCCACLKPLL

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.075 MM

PP1V05_S0SW_PCH_SATA

PP1V5_S0

MIN_LINE_WIDTH=0.2 MM VOLTAGE=1.05V

MIN_NECK_WIDTH=0.075 MM

PP1V05_S0SW_PCH_VCCUSB3PLL

MIN_LINE_WIDTH=0.2 MM VOLTAGE=1.05V

MIN_NECK_WIDTH=0.075 MM

PP1V05_S0_PCH_VCC_ICC

PP3V3_S0

PP3V3_S5

PP1V05_SUS

PP1V05_SUS_PCH_VCCAOSCSUS

MIN_NECK_WIDTH=0.075 MM VOLTAGE=1.05V

MIN_LINE_WIDTH=0.2 MM

MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

MIN_LINE_WIDTH=0.2 MM

PP1V05_S0_PCH_VCC_ICC_R

PP3V3_SUS

PP1V05_SUS

MIN_LINE_WIDTH=0.2 MM VOLTAGE=1.05V

PP1V05_S0_PCH_VCCAPLL_OPI

MIN_NECK_WIDTH=0.075 MM

PP3V3_S0

11 OF 75

12 OF 130

<SCH_NUM>

8

12

8

11 51 60

6 8

11 15 16

17 32 44 46 51

60

8

11 14 15

18 27 28 29 46 51

60

8

51 60

6 8

11 15 16

17 32 44 46 51

60

6 8

11 15 16

17 32 44 46 51

60

8

11 14 15

18 27 28 29 46 51

60

8

11 12 13

15 17 18 23 24 29

32 33 34 35 36 40 46 47 53 60

73 75

6 8

11 15 16

17 32 44 46 51

60

6 8

11 15 16

17 32 44 46 51

60

8

11 51 60

8

11 12 16

46 48 51 60

8

11 12 16

46 48 51 60

6 8

11 15 16

17 32 44 46 51

60

8

11 51 60

8

12

8

11 51 60

8

17 40 46

60

8

14

8

11 12 13

15 17 18 23 24 29

32 33 34 35 36 40 46 47 53 60

73 75

8

13 15 16

17 22 33 37 46 47

51 59 60 73 75

8

11 12 16

46 48 51 60

8

11 14 15

18 27 28 29 46 51

60

8

11 12 16

46 48 51 60

8

11 12 13

15 17 18 23 24 29

32 33 34 35 36 40 46 47 53 60

73 75

WWW.AliSaler.Com

IN IN

OUT

IN

OUT

BI

NC

IN

OUT

OUT OUT

IN

OUT

IN

OUT

IN

(5 OF 20)

RTC

JTAG

AUDIO

SATA

HDA_SDI0/I2S0_RXD

INTVRMEN

RTCX2

PCH_TRST*

HDA_DOCK_EN*/I2S1_TXD HDA_DOCK_RST*/I2S1_SFRM

HDA_SDI1/I2S1_RXD

HDA_SDO/I2S0_TXD

HDA_SYNC/I2S0_SFRM

I2S1_SCLK

JTAGX

RSVD

SATA_IREF

SATA_RN0/PERN6_L3

SATA_RN1/PERN6_L2

SATA_RN2/PERN6_L1

SATA_RN3/PERN6_L0

SATA_RP0/PERP6_L3

SATA_RP1/PERP6_L2

SATA_RP2/PERP6_L1

SATA_RP3/PERP6_L0

SATA_TN0/PETN6_L3

SATA_TN1/PETN6_L2

SATA_TP0/PETP6_L3

SATA_TP1/PETP6_L2

SRTCRST*

RTCX1

PCH_TDI

PCH_TCK

RTCRST*

SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0

SATA3GP/GPIO37

SATA2GP/GPIO36

SATA1GP/SATAPHY_PC/GPIO35

SATA0GP/GPIO34

SATA_TN2/PETN6_L1 SATA_TP2/PETP6_L1

RSVD

SATA_RCOMP

SATALED*

HDA_RST*/I2S_MCLK

HDA_BCLK/I2S0_SCLK

INTRUDER*

RSVD

PCH_TDO

PMTEST_RST

PCH_TMS

NC NC

CLKOUT_PCIE_N1 CLKOUT_PCIE_P1

PCIECLKRQ1*/GPIO19

CLKOUT_PCIE_P3

PCIECLKRQ3*/GPIO21

CLKOUT_PCIE_P2

CLKOUT_PCIE_N2

CLKOUT_PCIE_N0

TESTLOW_AC33

DIFFCLK_BIASREF

CLKOUT_LPC_1

RSVD

XTAL24_OUT

XTAL24_IN

PCIECLKRQ5*/GPIO23

PCIECLKRQ4*/GPIO22

PCIECLKRQ2*/GPIO20

CLKOUT_PCIE_P5

CLKOUT_PCIE_P4

CLKOUT_PCIE_N5

CLKOUT_PCIE_N4

CLKOUT_PCIE_N3

CLKOUT_LPC_0

TESTLOW_M15

TESTLOW_N14

TESTLOW_AD33

PCIECLKRQ0*/GPIO18

CLKOUT_PCIE_P0

CLKOUT_ITPXDP_P CLKOUT_ITPXDP_N

CLOCK SIGNALS

(6 OF 20)

IN

OUT OUT

OUT

OUT OUT

IN

NC NC

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(IPU)

(IPD)

(IPD-PLTRST#)

(IPD-PWROK)

1.5V -> 1.1V

(IPU)

(IPU - Flex IO strap only)

SATA Port assignments:

Unused

(IPD-PLTRST#)

16 68

01005

MF

1/32W

5%

100K

R1345

12

5% MF

100K

010051/32W

R1375

12

16

12 16

5% MF

1/32W 01005

100K

R1343

12

16 68

16

68

16

20K

1/20W 201

MF

5%

R1303

1

2

1UF

X5R

10% 10V

402

C1303

1

2

1%

1K

MF

1/20W

201

R1373

1

2

1/16W

1%

402

MF-LF

340

R1372

12

17

16 64

5% MF

100K

010051/32W

R1346

12

1/32W 01005

100K

MF5%

R1347

12

MF

5%

10K

NO STUFF

1/32W 01005

R1304

1

2

10V X5R

1UF

NO STUFF

0201-1

20%

C1304

1

2

29 62 64

68

29 62 64 68

12 29 62

25 68

12 24

40 68

PLACE_NEAR=U0500.J9:1.27mm

201

1/20W33MF5%

R1312

12

33

5% MF

1/32W 01005

PLACE_NEAR=U0500.L4:1.27mm

R1311

12

40 64 68

PLACE_NEAR=U0500.L6:1.27mm

MF

33

5%

1/32W 01005

R1310

12

46

330K

MF

1/20W

201

5%

R1302

1

2

1M

MF

1/20W 201

5%

R1301

1

2

1UF

X5R 402

10% 10V

C1300

1

2

5%

201

1/20W

MF

20K

R1300

1

2

6

16 66

PLACE_NEAR=U0500.L44:2.54mm

1%

3.01K

MF

1/20W 201

R1370

1

2

OMIT_TABLE

CRITICAL

BROADWELL-MOBILE-Y-B

BGA

U0500

L6

N5 N7

J9

L10

L8

N3

L4

N9

J5

H6

CL16

CK17

CL20

CL18

CK15

CM7

G26

C5

P17 R32

R34

A8

C9 C7

F29 H29 D33 L26

L42

L44

V36

T37

Y38

W37

V38

T39

W39

Y36

W43

T43

T41

AB42

AA43

V42

W41

AA41

C30

D6

CRITICAL

BGA

BROADWELL-MOBILE-Y-B

OMIT_TABLE

U0500

AG34

AE34

K15

L14

AD29

AD30

AE30

AC34

AE29

AG33

AC29

AC30

AG30

AD34

AG29

AE33

A38

B33

H25

P25

P27

D35

G30

BK41 BK43

AC33 AD33

M15

N14

AR44 AP45

12 22

22 68

22

68

40 68

54 64 66

12 54

1%

3.01K

MF

1/20W 201

PLACE_NEAR=U0500.A38:2.54mm

R1380

1

2

17 68

62 68

1/32W 01005

10K

MF5%

R1390

12

1/32W 01005

10K

MF5%

R1391

12

1/32W 01005

10K

MF5%

R1392

12

1/32W 01005

10K

MF5%

R1393

12

PLACE_NEAR=U0500.N3:1.27mm

MF 201

1/20W

33

5%

R1313

12

5% MF

1/32W 01005

100K

R1341

12

5% MF

100K

010051/32W

R1344

12

5% MF

100K

010051/32W

R1340

12

5% MF

100K

010051/32W

R1342

12

PCH Audio/JTAG/SATA/CLK

SYNC_DATE=04/10/2013SYNC_MASTER=J92_WILL

AP_CLKREQ_L

PP1V05_SUS

HDA_SDOUT

XDP_FW_PME_L

SSD_CLKREQ_L

PCH_UART_SSD_L_BT_H

PCIE_CLK100M_AP_N

PCH_SATALED_L

TBT_CLKREQ_L

FW_CLKREQ_L

CAMERA_CLKREQ_L

SD_CLKREQ_L

PCIE_CLK100M_AP_P

SYSCLK_CLK24M_SB

SYSCLK_CLK24M_SB_R

PP1V05_S0_PCH_VCCACLKPLL

HDA_SYNC

NC_PCIE_CLK100M_FWN NC_PCIE_CLK100M_FWP

FW_CLKREQ_L

PCH_TESTLOW1 PCH_TESTLOW2 PCH_TESTLOW3

PCH_DIFFCLK_BIASREF

TP_ITPXDP_CLK100MN

LPC_CLK24M_SMC_R TP_LPC_CLK24M_LPCPLUS_R

PCH_TESTLOW4

SD_CLKREQ_L

SSD_CLKREQ_L

PCIE_CLK100M_SSD_P

NC_PCIE_CLK100M_SDN

TP_ITPXDP_CLK100MP

NC_PCIE_CLK100M_SDP

PCIE_CLK100M_TBT_N PCIE_CLK100M_TBT_P

TBT_CLKREQ_L

PCIE_CLK100M_CAMERA_P

PCIE_CLK100M_CAMERA_N

CAMERA_CLKREQ_L

HDA_RST_L

HDA_BIT_CLK

PPVRTC_G3H

PCIE_CLK100M_SSD_N

PP3V3_S0

AP_CLKREQ_L

XDP_PCH_TMS

PCH_PMTEST_RST

XDP_PCH_TDO

PCH_INTRUDER_L

HDA_BIT_CLK_R

HDA_RST_R_L

PCH_SATALED_L

PCH_SATA_RCOMP

NO_TEST=TRUE

NC_SATA2_R2DP

NO_TEST=TRUE

NC_SATA2_R2DN

XDP_FW_PME_L XDP_PCH_SATAPHY_PC XDP_PCH_UART_SSD_L_BT_H XDP_SSD_PCIE0_SEL_L

NO_TEST=TRUE

NC_SATA3_R2DP

NO_TEST=TRUE

NC_SATA3_R2DN

PCH_RTCRST_L

XDP_PCH_TCK XDP_PCH_TDI

PCH_CLK32K_PMIC

PCH_SRTCRST_L

NO_TEST=TRUE

NC_SATA1_R2DP

NO_TEST=TRUE

NC_SATA0_R2DP

NO_TEST=TRUE

NC_SATA1_R2DN

NO_TEST=TRUE

NC_SATA0_R2DN

NO_TEST=TRUE

NC_SATA3_D2RP

NO_TEST=TRUE

NC_SATA2_D2RP

NO_TEST=TRUE

NC_SATA1_D2RP

NO_TEST=TRUE

NC_SATA0_D2RP

NO_TEST=TRUE

NC_SATA3_D2RN

NO_TEST=TRUE

NC_SATA2_D2RN

NO_TEST=TRUE

NC_SATA1_D2RN

NO_TEST=TRUE

NC_SATA0_D2RN

PP1V05_S0SW_PCH_VCCSATA3PLL

PCH_JTAGX

TP_PCH_I2S1_SCLK

HDA_SYNC_R

HDA_SDOUT_R

NC_HDA_SDIN1

TP_PCH_I2S1_SFRM

TP_PCH_I2S1_TXD

XDP_CPUPCH_TRST_L

PCH_INTVRMEN

HDA_SDIN0

12 OF 75

<SCH_NUM>

13 OF 130

12 22

8

11 16 46

48 51 60

12 16

12 54

16 23

12

12 29 62

12

12 24

12

8

11

64

12

63

8

13 46 60

8

11 13 15 17

18 23 24 29 32 33

34 35 36 40 46 47 53 60 73 75

68

12

8

11

68

17 68

63

WWW.AliSaler.Com

IN

OUT

IN

OUT

SYSTEM POWER MANAGEMENT

(8 OF 20)

WAKE*

SUS_STAT*/GPIO61

SUSWARN*/SUSPWRDNACK/GPIO30

SUSCLK/GPIO62

SLP_WLAN*/GPIO29

SLP_SUS*

SLP_S5*/GPIO63

SLP_S4*

SLP_S3*

SLP_S0*

SLP_LAN*

SLP_A*

PWRBTN*

PLTRST*

DSWVRMEN

DPWROK

CLKRUN*/GPIO32

BATLOW*/GPIO72

ACPRESENT/GPIO31

SYS_PWROK

PCH_PWROK

RSMRST*

APWROK

SUSACK*

SYS_RESET*

OUT

BI

IN

OUT

PCI

DISPLAY

EDP

SIDEBAND

(9 OF 20)

GPIO55

GPIO54

GPIO53

GPIO52

GPIO51

EDP_HPD

DDPC_HPD

DDPC_CTRLDATA

DDPC_CTRLCLK

DDPC_AUXP

DDPC_AUXN

DDPB_HPD

DDPB_CTRLDATA

DDPB_CTRLCLK

DDPB_AUXP

DDPB_AUXN

PME*

PIRQD*/GPIO80

EDP_BKLEN

PIRQC*/GPIO79

PIRQB*/GPIO78

PIRQA*/GPIO77

EDP_VDDEN

EDP_BKLCTL

OUT

BI BI

BI

OUT

IN

IN IN IN IN

OUT OUT OUT

OUT

IN

OUT

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(IPU)

(IPD-PLTRST#)

(IPU)

(IPD-DeepSx)

(IPD-PLTRST#)

32

13 46

1/32W 01005

100K

MF5%

R1465

12

13 31 33

46 75

5% MF

10K

1/32W 01005

R1447

12

NO STUFF

010051/32W

10K

MF5%

R1444

12

15 16 18

46

16

31 46

17 31

13 46 51 52

13 31 46 52

BROADWELL-MOBILE-Y-B

BGA

OMIT_TABLE

CRITICAL

U0500

M17

J22

H17

B35

J7

G14

F9

M23

M21

F7

G18

K19G22

N22

H19

A18

D27

J18

D25

D19

B27

D8

A22

E26

F19

13 15 31 46

52

13 31 51 52

32 68

31

13 31

13 22

NO STUFF

100K

MF

1/32W 01005

5%

R1451

1

2

33 46

01005

1/32W

5% MF

330K

R1450

1

2

13 49

53 64

BROADWELL-MOBILE-Y-B

OMIT_TABLE

BGA

CRITICAL

U0500

Y26

W26

BP43 BN42

Y30

Y25

W25

BP41 BR40

Y29

BM41

BR42

W29

BN40

H33

L30

C39

F35

M29

K35 F31 J34 D38

B25

13 53

29 66

63

29

66

18

63

18

63

53

5%

1/32W 01005

100K

MF

R1446

12

1/32W 01005

MF5%

100K

R1445

12

1/32W

100K

MF5%

01005

R1442

12

01005

100K

5% MF

1/32W

R1443

12

1/32W 01005

100K

MF5%

R1441

12

0%

0.00

01005

1/32W

MF

NO STUFF

R1400

1

2

01005

100K

MF5%

1/32W

R1440

12

13 28 62

64

13 31

13 63

13 23 64

13 63

13 22

13 22 64

13 31

1/32W

10K

MF5%

01005

R1455

12

5% MF

10K

010051/32W

R1410

12

100K

1/32W 01005

MF5%

R1448

12

100K

1/32W 01005

MF5%

R1449

12

1/32W 01005

100K

MF5%

R1431

12

1/32W 01005

100K

MF5%

R1430

12

31 32

13 40

64

1/32W 01005

1.00K

MF5%

R1405

12

1/32W 01005

10K

MF5%

R1452

12

MF

100K

1/32W 01005

5%

R1460

12

01005

100K

MF5%

1/32W

R1461

12

1/32W

100K

5% MF

01005

R1462

12

1/32W 01005

100K

MF5%

R1464

12

1/32W

01005

100K

MF5%

R1463

12

13 16 31

SYNC_MASTER=J92_WILL SYNC_DATE=04/10/2013

PCH PM/PCI/GFX

PP3V3_S0

PM_SLP_S3_L

EDP_BKLT_EN EDP_PANEL_PWR

PCH_DSWVRMEN

PM_SLP_A_L

SMC_RUNTIME_SCI_L

SSD_BOOT

HDMITBTMUX_FLAG

HPM_I2C_INT_L

PM_SLP_A_L

PM_SLP_S5_L PM_SLP_S4_L

PM_SLP_SUS_L

PM_SLP_S0_L

PM_CLKRUN_L

PM_BATLOW_L PCIE_WAKE_L

PM_PWRBTN_L

PP3V3_S5

BT_LOW_PWR_L

EDP_BKLT_EN

ODD_PWR_EN_L

PM_SLP_S0_L

SMC_PCH_SUSACK_L

AP_PCIE_DEV_WAKE

DP_TBTSNK0_AUXCH_C_N

PLT_RESET_L PM_RSMRST_L

PM_PCH_SYS_PWROK

PM_BATLOW_L

PM_PWRBTN_L

PM_SYSRST_L

PM_CLKRUN_L

PM_DSW_PWRGD

TP_PCH_SLP_LAN_L

PM_SLP_S3_L

PM_SLP_S4_L

PM_SLP_S5_L

PM_SLP_SUS_L

TP_PCH_SLP_WLAN_L

PM_CLK32K_SUSCLK_R

LPC_PWRDWN_L

PCIE_WAKE_L

BT_LOW_PWR_L

AP_PCIE_DEV_WAKE

AUD_PWR_EN

DP_INT_HPD

NC_DP_TBTSNK1_HPD

NC_DP_TBTSNK1_DDC_DATA

NC_DP_TBTSNK1_DDC_CLK

NC_DP_TBTSNK1_AUXCH_CP

NC_DP_TBTSNK1_AUXCH_CN

DP_TBTSNK0_HPD

DP_TBTSNK0_DDC_DATA

DP_TBTSNK0_DDC_CLK

NC_PCI_PME_L

SSD_BOOT

HDMITBTMUX_FLAG

SMC_RUNTIME_SCI_L

HPM_I2C_INT_L

EDP_PANEL_PWR

EDP_BKLT_PWM

PPVRTC_G3H

HDMITBTMUX_LATCH

AUD_PWR_EN

SMC_ADAPTER_EN

PM_PCH_APWROK

PM_PCH_PWROK

SMC_PCH_SUSWARN_L

ODD_PWR_EN_L HDMITBTMUX_LATCH

DP_TBTSNK0_AUXCH_C_P

14 OF 130

<SCH_NUM>

13 OF 75

8

11 12 15 17

18 23 24 29 32 33

34 35 36 40 46 47 53 60 73 75

13 31 46 52

13 49

13 53

13 31

13 23 64

13 63

13 28 62 64

13 46

13 31 51 52

13 15 31 46 52

13 46 51 52

13 31 33 46 75

13 31

13 22

13 16 31

8

11 15 16 17

22 33 37 46 47 51

59 60 73 75

13 22

13 63

31 62

13 22 64

63

8

12 46 60

13 63

13 40

64

31 62

WWW.AliSaler.Com

(7 OF 20)

LPC

SMBUS

SPI

C-LINK

LAD3

SPI_MOSI

LFRAME*

SPI_CLK

SPI_CS0*

SML0DATA

SPI_CS1*

CL_CLK

CL_DATA

CL_RST*

SMBALERT*/GPIO11

SMBCLK

SMBDATA

SML0ALERT*/GPIO60

SML0CLK

SML1ALERT*/PCHHOT*/GPIO73

SML1CLK/GPIO75

SML1DATA/GPIO74

SPI_CS2*

SPI_IO2

SPI_IO3

SPI_MISO

LAD0 LAD1 LAD2

OUT

IN IN IN IN

NC NC

OUT

IN

OUT

IN

OUT

IN

IN IN

OUT OUT

OUT

IN

OUT OUT

IN IN

OUT OUT

OUT

PCI-E

USB

(11 OF 20)

USB2P6

USB3RN1 USB3RP1

USB3TN1

PERP5_L2

PERN5_L2

PETP5_L1

PETN5_L1

PERP5_L1

PERN5_L1

USBRBIAS

USBRBIAS*

OC0*/GPIO40 OC1*/GPIO41 OC2*/GPIO42 OC3*/GPIO43

RSVD

USB3TP2

USB3TN2

USB3TP1

USB3RP2

USB3RN2

USB2P5

USB2P4

USB2P3

USB2P2

USB2P1

USB2P0

USB2N5

USB2N4

USB2N3

USB2N2

USB2N1

USB2N0

PETP5_L3

PETP5_L2

PETP5_L0

PETP4

PETP3

PETP2/USB3TP4

PETN5_L2

PETN4

PETN3

PETN1/USB3TN3

PERP5_L3

PERP5_L0

PERP3

PERP1/USB3RP3

PERN5_L3

PERN5_L0

PERN4

PERN3

PERN1/USB3RN3

PCIE_IREF

PERP4

PCIE_RCOMP

RSVD

PETN2/USB3TN4

PERP2/USB3RP4

PERN2/USB3RN4

PETP1/USB3TP3

PETN5_L0

USB2N6

USB2N7 USB2P7

USB2N8 USB2P8

USB2N9 USB2P9

PETN5_L3

IN

NC NC

IN

BI

IN

BI

OUT

BI

OUT

BI BI

BI

OUT

IN

BI

OUT

BI

OUT

BI

IN

BI

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

Thunderbolt lane 1

Unused

Reserved: Camera

SSD lane 2

(IPU/IPD)

(IPU)

(IPU/IPD)

(IPU)

SML1ALERT# pull-up not provided on this

Otherwise, 100k pull-up to 3.3V SUS required.

page, may be wire-ORed into other signals.

AirPort

(IPD)

Unused

Trackpad

IR

BT

Unused

Ext A (LS/FS/HS)

USB Port Assignments:

PCIe Port Assignments:

Unused

USB3 Port Assignments:

Ext B (LS/FS/HS)

SSD lane 3

Camera

SSD lane 1

SSD lane 0

Reserved: SD (HS)

Ext A (SS)

Thunderbolt lane 0

OMIT_TABLE

CRITICAL

BROADWELL-MOBILE-Y-B

BGA

U0500

D23

H23

K23

P13 M13 R14 K13

P15

K21

P21 B21

F21

P19 B19

H8

C14 A14

C26

H27

M27

K27

F27

J26

B23

D31

23 66

1/32W 01005

100K

MF5%

R1580

12

1/32W 01005

100K

MF5%

R1581

12

18 33

23 66

14

16 28 62 63 64

14 16 64

14 16

29 67

64 66

29 64 67

64 67

25 64 68

25 68

64 66

62 68

29 67

27 67

23 66

64 66

23 66

22 68

CRITICAL

OMIT_TABLE

BROADWELL-MOBILE-Y-B

BGA

U0500

E18 E22 H21 D21C41

F41

AF38

AH42

AD38

AH38

AF40

AD40

AE43

AF42

AE39

AJ43

AC39

AH40

AG41

AE41

AD42

AG43

BD41

BC40

AY41

AV41

AU40

AW40

BA42

BB41

BD43

BC42

AY43

AV43

AU42

AW42

BA40

BB43

AT41 AT43

F13

H13

W12

T9

Y10

AB10

W9

V8

V6

Y6

V4

Y4

V12

V10

Y8

AA9

W7

T7

T5

W5

T3

W3

AJ41

AM43

AM41

AK42

BG42

BF41

BG40

BF43

D13

B13

22 68

3.01K

1% MF

1/20W

201

PLACE_NEAR=U0500.F41:2.54mm

R1500

1

2

64 66

22.6

1% MF

1/20W 201

PLACE_NEAR=U0500.B13:2.54mm

R1570

1

2

64 67

64

66

64

22 67

64 67

23 66

26 64 67

31 68

010051/32W

5% MF

33

R1543

12

010051/32W

5% MF

33

R1542

12

23 66

010051/32W

5% MF

33

R1544

12

01005

MF

33

5%

1/32W

R1540

12

33

MF5%

1/20W

201

R1541

12

37 68

31

34 36 53 68 72

64 66

31 34 36 53 68 72

34 68

16 34 68

37 68

64 66

14 37

1/32W 01005

100K

MF5%

R1591

12

MF

1/32W 01005

1.00K

5%

R1549

12

1/32W 01005

100K

MF5%

R1590

12

MF

1/32W 01005

1.00K

5%

R1548

12

1/32W 01005

100K

MF5%

R1582

12

1/32W 01005

100K

MF5%

R1583

12

CPU

PCH PCIe/USB/LPC/SPI/SMBus

SYNC_MASTER=J92_DEVMLB

SYNC_DATE=06/28/2013

USB3_EXTA_D2R_P

TP_USB_9P

USB3_EXTD_D2R_N

USB3_EXTD_R2D_C_P

USB3_EXTD_D2R_P USB3_EXTD_R2D_C_N

PCIE_TBT_D2R_P<0>

PCIE_SSD_R2D_C_N<1> PCIE_SSD_R2D_C_P<1>

PCIE_AP_D2R_P

PCIE_SSD_D2R_P<3>

PCIE_TBT_R2D_C_N<0> PCIE_TBT_R2D_C_P<0>

PCIE_TBT_D2R_N<0>

PCIE_SSD_D2R_N<0> PCIE_SSD_D2R_P<0>

PCIE_SSD_R2D_C_N<0>

PCIE_SSD_D2R_P<1>

PCIE_SSD_D2R_N<1>

PCIE_CAMERA_R2D_C_N PCIE_CAMERA_R2D_C_P

PCIE_CAMERA_D2R_P

PCIE_CAMERA_D2R_N

PCIE_SSD_R2D_C_P<2>

TP_USB_8P

PCIE_SSD_R2D_C_N<3>

TP_USB_8N

XDP_USB_EXTA_OC_L XDP_USB_EXTB_OC_L XDP_USB_EXTC_OC_L

WOL_EN

SPI_IO<3> PCH_SMBALERT_L

SPI_IO<2>

XDP_USB_EXTD_OC_L

PP3V3_SUS PP3V3_SUS

PCH_USB_RBIAS

TP_USB_5N

NC_USB_CAMERAN

TP_USB_5P

NC_USB3_EXTB_R2D_CN NC_USB3_EXTB_R2D_CP

XDP_USB_EXTD_OC_L

XDP_USB_EXTC_OC_L

XDP_USB_EXTB_OC_L

XDP_USB_EXTA_OC_L

TP_USB_9N

NC_USB_SDP

NC_USB_CAMERAP

NC_USB_SDN

NC_USB_EXTBN NC_USB_EXTBP

USB_EXTA_N USB_EXTA_P

NC_USB_IRN

USB_BT_P

USB_BT_N

NC_USB_TPADP

NC_USB_TPADN

NC_USB_IRP

USB3_EXTA_D2R_N

USB3_EXTA_R2D_C_P

USB3_EXTA_R2D_C_N

PCIE_SSD_D2R_N<2> PCIE_SSD_D2R_P<2>

PCIE_SSD_R2D_C_N<2>

PCIE_SSD_D2R_N<3>

PCIE_AP_D2R_N

PCIE_AP_R2D_C_N

SML_PCH_0_DATA

TP_SPI_CS1_L

NC_CLINK_CLK NC_CLINK_DATA NC_CLINK_RESET_L

PCH_SMBALERT_L SMBUS_PCH_CLK

SMBUS_PCH_DATA

SML_PCH_0_CLK

PCH_SML1ALERT_L SMBUS_SMC_1_S0_SCL

SMBUS_SMC_1_S0_SDATP_SPI_CS2_L

LPC_AD<0>

SPI_CLK_R SPI_CS0_R_L

SPI_MOSI_R SPI_MISO SPI_IO<2> SPI_IO<3>

LPC_AD_R<2> LPC_AD_R<3>

LPC_FRAME_R_L

LPC_AD<2>

LPC_AD<1>

LPC_AD<3>

WOL_EN

LPC_FRAME_L

PP1V05_S0SW_PCH_VCCUSB3PLL

PCH_PCIE_RCOMP

LPC_AD_R<1>

LPC_AD_R<0>

PCIE_SSD_R2D_C_P<3>

PCIE_AP_R2D_C_P

NC_USB3_EXTB_D2RP

NC_USB3_EXTB_D2RN

PCIE_SSD_R2D_C_P<0>

14 OF 75

15 OF 130

<SCH_NUM>

14 16 28 62

63 64

14 16 64

14 16

14

14 37

14

14 37

14 16

8

11 14 15 18

27 28 29 46 51 60

8

11 14 15 18

27 28 29 46 51 60

67

63

14

8

11

WWW.AliSaler.Com

IN

OUT

BI

NC NC

(10 OF 20)

GPIO

LPIO CPU/MISC

RSVD

PCH_OPI_RCOMP

UART0_CTS*/GPIO94

UART1_RXD/GPIO0

UART1_TXD/GPIO1

UART1_RST*/GPIO2

GSPI0_MOSI/GPIO86

I2C1_SCL/GPIO7

I2C1_SDA/GPIO6

I2C0_SCL/GPIO5

I2C0_SDA/GPIO4

UART1_CTS*/GPIO3

SDIO_CLK/GPIO64

SPKR/GPIO81

SDIO_POWER_EN/GPIO70

SDIO_D2/GPIO68

SDIO_D1/GPIO67

SDIO_D0/GPIO66

SDIO_CMD/GPIO65

HSIOPC/PCIEPHY_PC/GPIO71

GPIO59

GPIO50

GPIO49

GPIO48

GPIO47

GPIO46

GPIO45

GPIO44

GPIO25

GPIO17

GPIO14

GPIO13

GPIO10

GPIO9

GPIO8

DEVSLP2/GPIO39

DEVSLP1/GPIO38

DEVSLP0/GPIO33

GPIO24

GPIO56

GPIO57

GPIO58

GPIO26

GPIO28

GPIO27

BMBUSY*/USB3PHY_PC/GPIO76

LAN_PHY_PWR_CTRL/GPIO12

GPIO15

GPIO16

SDIO_D3/GPIO69

UART0_RTS*/GPIO93

GSPI0_CS*/GPIO83

THERMTRIP*

RCIN*/GPIO82

SERIRQ

UART0_TXD/GPIO92

UART0_RXD/GPIO91

GSPI_MOSI/GPIO90

GSPI1_MISO/GPIO89

GSPI1_CLK/GPIO88

GSPI1_CS*/GPIO87

GSPI0_MISO/GPIO85

GSPI0_CLK/GPIO84

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

BI

OUT

IN

OUT

BI

OUT

IN

OUT

IN

OUT

IN

BI

IN

OUT

BI

OUT

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

(IPD-PLTRST#)

(IPD-RSMRST#)

(IPD-PLTRST#)

(IPD-DeepSx)

Redwood Ridge: Alias to TBT_CIO_PLUG_EVENT_L, requires pull-up (S0).

Cactus Ridge: Alias to TBT_CIO_PLUG_EVENT, requires pull-down.

Pull-up/down on chipset support page (depends on TBT controller)

(IPD)

(IPD-PLTRST#)

Requires connection to SMC via 1K series R

1/32W 01005

MF5%

10K

R1652

12

1/32W

MF5%

01005

47.0K

R1672

12

1/32W 01005

100K

MF5%

R1674

12

1/32W

MF5%

100K

01005

R1676

12

10K

1/32W

5% MF

01005

R1678

12

01005

100K

MF5%

1/32W

R1677

12

10K

MF5%

010051/32W

R1679

12

MF

5%

100K

1/32W 01005

R1639

1

2

5%

01005

MF

1/32W

1.00K

R1641

12

100K

5%

1/32W

MF

01005

R1621

1

2

13 15 16

18

29 62

15 63

15 31

BROADWELL-MOBILE-Y-B

OMIT_TABLE

BGA

CRITICAL

U0500

J30

E30

K31

J41

B17

E14

M19

K25

N26

H31

C22

F17

B15

K17

M25

L18

P23

L22

B29

K29

B31

F33

F25

F23

F15

D15

C18

D17

G34

D40

L36

K33

M31

L34

F37

H35

D29

R42

N36

M33

J37

J14

AB4

C34

AJ14 AL18

N34

H40

R40

R38

J39

P31

R36

E34

A34

CG40

N41

N43

M35

F39

N30

N39

P29

H38

1/32W

100K

MF5%

01005

R1609

12

1/32W

100K

MF 01005

5%

R1629

1

2

22

100K

5%

1/32W

MF

01005

R1691

1

2

13 15 16 18

5%

01005

100K

MF

1/32W

R1613

12

5% MF

1/20W

201

100K

RAMCFG3:H

R1631

1

2

1/32W

MF5%

47.0K

01005

R1673

12

47.0K

5% MF

1/32W 01005

R1675

12

47.0K

01005

5% MF

1/32W

R1668

12

1/32W 01005

47.0K

5% MF

R1669

12

47.0K

01005

5% MF

1/32W

R1670

12

010051/32W

MF5%

47.0K

R1671

12

1/32W

100K

MF5%

01005

R1608

12

15 63

5%

100K

1/20W 201

MF

RAMCFG2:H

R1636

1

2

15 63

MF

47.0K

1/32W5%01005

R1660

12

47.0K

MF5%

010051/32W

R1661

12

47.0K

1/32W

MF5%

01005

R1662

12

47.0K

5% MF

1/32W 01005

R1663

12

01005

5% MF

1/32W

100K

R1640

12

MF

5%

100K

01005

1/32W

SSD_LPSR:S3

R1634

1

2

13 31 46

52

5%

201

MF

100K

RAMCFG1:H

1/20W

R1635

1

2

5% MF

201

1/20W

RAMCFG0:H

100K

R1611

1

2

15 28 62 64

15 63

15

63

15 53 64

33

24

16

15 16 18

15 16

15 63

18

15 59 64

15 63

15 16

15 63

15 51

15 37

15 24 64

15 59 64

15 22 64

59

15 31 64

15 63

15 30 64

31 32 66

15 16

15 16 18

15 63

15 30

15 16

15 30 64

15 30 67

5%

1.00K

1/32W

MF

01005

R1650

1

2

15 30 67

5% MF

010051/32W

100K

R1610

12

5%

100K

010051/32W

MF

R1612

12

5% MF

100K

010051/32W

R1614

12

5% MF

100K

010051/32W

R1615

12

MF

010051/32W

100K

5%

R1616

12

100K

1/32W

MF

01005

5%

R1617

12

MF

100K

1/32W 01005

5%

R1618

12

100K

010051/32W

MF5%

R1619

12

5% MF

100K

010051/32W

SSD_LPSR:S0

R1620

12

MF

01005

100K

5%

1/32W

R1622

12

01005

100K

MF5%

1/32W

R1623

12

01005

100K

MF5%

1/32W

R1624

12

01005

100K

MF5%

1/32W

R1625

12

5%

01005

100K

MF

1/32W

R1626

12

010051/32W

100K

MF5%

R1627

12

5%

01005

MF

1/32W

100K

R1628

12

5%

100K

1/32W

MF

01005

R1630

12

5%

100K

1/32W

MF

01005

R1632

12

5%

100K

010051/32W

MF

R1633

12

MF

01005

5%

1/32W

100K

R1637

12

5%

010051/32W

100K

MF

R1638

12

5% MF

010051/32W

10K

R1694

12

1/32W 01005

100K

MF5%

R1693

12

PLACE_NEAR=U0500.AB4:2.54mm

201

1%

49.9

MF

1/20W

R1655

1

2

1/32W 01005

MF5%

100K

R1695

12

47K

201

1/20W

5% MF

R1664

12

47K

1/20W

MF5% 201

R1665

12

47K

5%

1/20W

MF 201

R1666

12

47K

201

1/20W

MF5%

R1667

12

RAMCFG3:H,RAMCFG2:H,RAMCFG1:H,RAMCFG0:H

RAMCFG_SLOT

PCH GPIO/MISC/LPIO

SYNC_MASTER=J92_DEVMLB

SYNC_DATE=08/14/2013

PP3V3_S0

CAMERA_PWR_EN

SPIROM_USE_MLB

TPAD_SPI_IF_EN

TPAD_SPI_INT_L

TPAD_SPI_IF_EN

TPAD_USB_IF_EN

PCH_TBT_PCIE_RESET_L

SD_RESET_L

AUD_WAKE_L

XDP_LPCPLUS_GPIO

PP3V3_S5

LPC_SERIRQ

AP_S0IX_WAKE_SEL

SSD_SR_EN_L

PP3V3_SUS

XDP_JTAG_ISP_TDI

XDP_LPCPLUS_GPIO

I2C_PCH_1_SDA

JTAG_ISP_TDO

TPAD_SPI_MOSI

TPAD_SPI_CLK

AP_S0IX_WAKE_L

TPAD_SPI_MISO

I2C_PCH_1_SCL

TBT_CIO_PLUG_EVENT_L

PLT_RESET_L

CAMERA_RESET_L

PM_THRMTRIP_L

XDP_JTAG_ISP_TCK

JTAG_TBT_TMS_PCH PCH_PCIEPHY_PC

PCH_STRP_TOPBLK_SWP_L

XDP_MLB_RAMCFG0

XDP_MLB_RAMCFG3 SPIROM_USE_MLB

AP_S0IX_WAKE_SEL

LCD_IRQ_L

SSD_SR_EN_L

TP_MEM_VDD_SEL_1V5_L

LCD_PSR_EN

PP1V05_S0

LCD_PSR_EN

ENET_MEDIA_SENSE LCD_IRQ_L

XDP_MLB_RAMCFG1

XDP_MLB_RAMCFG2

SD_PWR_EN

SMC_WAKE_SCI_L

XDP_PCH_GPIO17

I2C_PCH_1_SDA

PCH_UART1_D2R PCH_UART1_R2D

PCH_UART1_CTS_L

PCH_BT_UART_D2R

PCH_BT_UART_RTS_L

PCH_UART1_R2D

PCH_BT_UART_RTS_L

AP_S0IX_WAKE_L

PCH_BT_UART_CTS_L

PCH_TCO_TIMER_DISABLE

ENET_MEDIA_SENSE

PCH_OPI_COMP

TPAD_SPI_MISO

MIKEY_SPI_MOSI

LPC_SERIRQ

TPAD_SPI_MOSI

TPAD_SPI_CS_L

MIKEY_SPI_MISO

MIKEY_SPI_CLK

MIKEY_SPI_CS_L

MIKEY_SPI_MISO MIKEY_SPI_MOSI

PP3V3_S0

PCH_USB3PHY_PC

PCH_GPIO12

I2C_PCH_1_SCL

QR_SWITCH_EN

PCH_BT_UART_R2D

XDP_MLB_RAMCFG2

PCH_PCIEPHY_PC

PCH_BT_UART_R2D

CAMERA_PWR_EN

QR_SWITCH_EN

AP_RESET_L

PCH_UART1_CTS_L

JTAG_ISP_TDO

PCH_UART1_D2R

PCH_BT_UART_CTS_L

PCH_BT_UART_D2R

MIKEY_SPI_CS_L MIKEY_SPI_CLK

TPAD_SPI_CS_L

BT_PWRRST_L

XDP_MLB_RAMCFG1

JTAG_TBT_TMS_PCH

XDP_JTAG_ISP_TDI

XDP_JTAG_ISP_TCK

TBT_PWR_EN

PP3V3_SUS

SD_PWR_EN

PP3V3_SUS

XDP_SDCONN_STATE_CHANGE_L

AUD_WAKE_L

PP3V3_S0

SSD_PWR_EN

SSD_RESET_L

TBT_PWR_EN

XDP_SDCONN_STATE_CHANGE_L

SSD_PWR_EN

PCH_GPIO12

XDP_MLB_RAMCFG3

XDP_MLB_RAMCFG0

PM_SLP_S4_L

PLT_RESET_L

PP3V3_S0

PCH_SATAPHY_PC

BT_PWRRST_L

XDP_PCH_GPIO17 SD_RESET_L SMC_WAKE_SCI_L TPAD_SPI_INT_L TPAD_USB_IF_EN

XDP_PCH_USB3PHY_PC

PP3V3_S0

TPAD_SPI_CLK

15 OF 75

16 OF 130

<SCH_NUM>

8

11 12 13

15 17 18 23 24 29 32

33 34 35 36 40 46 47 53 60 73

75

15 24 64

15 37

15 30

15 16

8

11 13 16 17

22 33 37 46 47 51

59 60 73 75

15 31

15 22 64

15 59 64

8

11 14 15

18 27 28 29 46 51 60

8

11 14 15

18 27 28 29 46 51 60

15 28 34 64

15

15 30 67

15 22 64

15 30 67

15 28 34 64

15 63

6 8

11 16 17

32 44 46 51 60

15 63

15 53 64

15 16 18

15 28 34 64

15 64

15

15 23 64

15 23

15 64

15 23

15 22 64

15 23 64

15 63

8

11 12 13

15 17 18 23 24 29

32 33 34 35 36 40 46 47 53 60

73 75

16 51

15 63

15 28 34 64

15 23 64

15 16 18

15 51

15 23 64

15 28 62 64

15

15 64

15 23 64

15 63

15 30 64

15 63

15 16

15 63

8

11 14 15

18 27 28 29 46 51 60

15 63

8

11 14 15

18 27 28 29 46 51 60

15 16

15 63

8

11 12 13

15 17 18 23 24 29 32

33 34 35 36 40 46 47 53 60 73

75

15 59 64

15 16 18

8

11 12 13

15 17 18 23 24 29

32 33 34 35 36 40 46 47 53 60

73 75

16 51

15 63

15 16

15 63

15 31 64

15 30 64

15 63

8

11 12 13

15 17 18 23 24 29 32

33 34 35 36 40 46 47 53 60 73

75

www.qdzbwx.com

WWW.AliSaler.Com

IN

IN IN

IN

OUT

IN

OUT

IN

OUT OUT

IN

NC NC

IN IN

IN

OUT

IN

BI

IN

OUT

Y

NC NC

VCC

GND

A

NC

IN

NC

IN

PP

IN

PP

IN

BI

OUT

BI

OUT

IN

OUT

BI

OUT

IN

OUT

BI

PP

OUT

IN

VER 3

D

SG

VER 3

D

SG

VER 3

D

SG

VER 3

D

SG

IN

BI

IN

OUT

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

Extra BPM Probepoints

OBSDATA_A3

ITPCLK/HOOK4 ITPCLK#/HOOK5 VCC_OBS_CD RESET#/HOOK6

OBSFN_B0

PCH XDP Signals

OBSFN_A0 OBSFN_A1

DBR#/HOOK7

OBSDATA_B2 OBSDATA_D2

HOOK2

OBSDATA_C0

SSD_PCIEx_SEL_L straps are connected via 1K to common net. LPCPLUS_GPIO is aliased, do not attempt use during PCH debug.

SDCONN_STATE_CHANGE_L is aliased, do not plug/unplug SD Cards during PCH debug.

USB Overcurrents are aliased, do not cause USB OC# events during PCH debug.

support chipset debug.

OBSFN_C0 OBSFN_C1

OBSDATA_C1

OBSDATA_C3

OBSDATA_C2

OBSDATA_D0 OBSDATA_D1

OBSFN_D1

OBSDATA_D3

XDP_PRESENT#

TMS

TDI

OBSDATA_A0

OBSFN_B1

OBSDATA_A2

OBSDATA_B0

PWRGD/HOOK0

VCC_OBS_AB

HOOK3

HOOK1

SDA

TCK0

NOTE: This is not the standard XDP pinout. Use with 921-0133 Adapter Flex to

OBSDATA_A1

SCL

OBSFN_D0

Merged (CPU/PCH) Micro2-XDP

TDI and TMS are terminated in CPU.

NOTE: Should force PCH GPIO47 high to ensure TBT router powered to avoid leakage/clamping of signals.

JTAG_ISP (non-TMS) nets are aliased, do not attempt bit-banged JTAG during PCH debug.

Unused & MLB_RAMCFGx GPIOs have TPs.

OBSDATA_B3

OBSDATA_B1

TRSTn

TDO

PCH/XDP Signals

TCK1

518S0847

CPU JTAG Isolation

Non-XDP Signals

via Top-Side Probe. Nets are listed here to show XDP associations and to make clear what restrictions exist on PCH GPIOs when Top-Side Probe is used for PCH debug.

These signals do not connect to XDP connector in this architecture, only accessible

NOTE: XDP_DBRESET_L pulled-up to 3.3V on PCH Support Page

6

66

13 15 18

6

66

6

66

6

66

6

66

6

66

6

66

13 31

46

12 16 68

17 66

6

66

12 16 68

12

16 68

5% MF

XDP

PLACE_NEAR=U0500.AG7:2.54mm

1/20W

201

1K

R1805

12

PLACE_NEAR=U0500.CM41:28mm

51

XDP

MF

1/20W

5% 201

R1813

21

5%

0

MF

1/20W

XDP

0201

R1804

12

PLACE_NEAR=U5000.K1:2.54mm

XDP

MF

1/20W

0

5%

0201

R1802

12

1K

201

PLACE_NEAR=U0500.BU14:2.54mm

MF5%

XDP

1/20W

R1800

12

6

66

XDP_CONN

DF40RC-60DP-0.4V

CRITICAL

M-ST-SM1

J1800

1

10

1112 1314 1516 1718 19

2

20

2122 2324 2526 2728 29

3

30

3132 3334 3536 3738 39

4

40

4142 4344 4546 4748 49

5

50

5152 5354 5556 5758 59

6

60

61

62

6364

78 9

6

66

6

66

6

66

6

66

6

66

6

66

6

66

6

66

6

66

6

66

8

201

5%

150

MF

1/20W

R1830

1

2

PLACE_NEAR=U0500.CU38:28mm

XDP

51

MF

1/20W

5% 201

R1810

12

12 16 68

201

5%

1K

XDP

MF

1/20W

R1831

1

2

PLACE_NEAR=U0500.CK17:28mm

NO STUFF

51

MF

1/20W

5% 201

R1896

21

PLACE_NEAR=U0500.CK15:28mm

XDP

51

MF

1/20W

5% 201

R1892

21

PLACE_NEAR=U0500.CL20:28mm

XDP

51

MF

1/20W

5% 201

R1891

21

PLACE_NEAR=U0500.CL18:28mm

51

XDP

MF

1/20W

5% 201

R1890

21

PLACE_NEAR=U0500.CL16:28mm

201MF

NO STUFF

1/20W

1K

5%

R1899

12

PLACE_NEAR=J1800.58:28mm

XDP

MF

0

5%

0201

1/20W

R1835

12

12 16

6

12 16 66

6

66

6

66

6

16 66

0201

CERM-X5R

6.3V

10%

0.1UF

XDP

C1801

1

2

6

66

0.1UF

10%

CERM-X5R

XDP

6.3V 0201

C1800

1

2

6

66

6

66

CERM-X5R

0201

XDP

6.3V

0.1UF

10%

C1804

1

2

XDP

0.1UF

6.3V CERM-X5R 0201

10%

C1806

1

2

6

66

6

12 16 66

PLACE_NEAR=U0500.CM7:28mm

51

NO STUFF

MF

1/20W

5% 201

R1897

21

SOT891

74LVC1G07GF

U1845

2

3

1

5

6

4

0201

16V

0.1UF

10%

X5R-CERM

C1845

1

2

6

66

330K

MF

1/20W

5%

201

R1845

1

2

31 33 46

SM

P2MM

PP1802

1

P2MM

SM

PP1803

1

6

66

SM

P2MM

PP1804

1

SM

P2MM

PP1805

1

P2MM

SM

PP1806

1

P2MM

SM

PP1807

1

NOSTUFF

0201

1/20W

0

5% MF

R1832

1

2

15

12

12 64

12

15

12

15 18

15

18

15 18

15

14

14 16 28 62 63 64

14 16 64

15 18

P2MM

SM

PP1887

1

SHORT

201

NONENONENONE

OMIT

R1886

12

P2MM

SM

PP1884

1

P2MM

SM

PP1885

1

5% MF

1/20W

201

1K

R1883

12

NONENONE

SHORT

NONE

201

OMIT

R1882

12

201

NONE

SHORT

NONE NONE

OMIT

R1881

12

SM

P2MM

PP1880

1

P2MM

SM

PP1879

1

SM

P2MM

PP1875

1

P2MM

SM

PP1874

1

SM

P2MM

PP1873

1

15 51

12 23

15 51

14 16 28

62 63 64

14 16 64

PLACE_NEAR=J1800.55:28mm

CRITICAL

XDP

SOT563

DMN5L06VK-7

Q1840

3

5

4

PLACE_NEAR=J1800.55:28mm

CRITICAL

XDP

DMN5L06VK-7

SOT563

Q1840

6

2

1

SOT563

PLACE_NEAR=J1800.55:28mm

DMN5L06VK-7

XDP

CRITICAL

Q1842

3

5

4

SOT563

PLACE_NEAR=J1800.55:28mm

DMN5L06VK-7

XDP

CRITICAL

Q1842

6

2

1

6

66

14 34 68

14

34 68

6

16 66

6

66

8

17 46

6

66

6

66

6

66

SYNC_DATE=09/16/2013

CPU/PCH Merged XDP

SYNC_MASTER=J92_DEVMLB

XDP_CPU_VCCST_PWRGD XDP_CPU_PWRBTN_L

XDP_SYS_PWROK

XDP_CPU_TCK

XDP_JTAG_CPU_ISOL_L

XDP_PCH_TDO

XDP_PCH_TDI

XDP_PCH_TMS

XDP_CPUPCH_TRST_L

XDP_CPU_TMS

SMBUS_PCH_DATA

XDP_PCH_TCK

XDP_PCH_TMS

XDP_PCH_TDI

XDP_CPU_PRESENT_L

CPU_CFG<13>

CPU_CFG<14> CPU_CFG<15>

XDP_USB_EXTB_OC_L

XDP_CPU_TDI

MAKE_BASE=TRUE

XDP_CPUPCH_TRST_L

XDP_TRST_L

XDP_CPU_TDO

XDP_PCH_TDO

XDP_CPUPCH_TRST_L

CPU_VCCST_PWRGD

CPU_CFG<12>

PCH_JTAGX

SMBUS_PCH_CLK

CPU_CFG<5>

XDP_PCH_TCK

CPU_CFG<19>

CPU_CFG<11>

CPU_CFG<10>

XDP_CPUPCH_TRST_L

PLT_RESET_L

CPU_CFG<18>

CPU_CFG<9>

CPU_CFG<8>

CPU_CFG<16>

CPU_CFG<17>

CPU_PWR_DEBUG_L

PM_PCH_SYS_PWROK

CPU_CFG<7>

CPU_CFG<2>

XDP_CPU_PREQ_L

PP1V05_S0

XDP_CPU_TDO

PCH_JTAGX

PP1V05_SUS

XDP_CPU_TCK

ALL_SYS_PWRGD

XDP_BPM_L<2> XDP_BPM_L<3>

XDP_BPM_L<5> XDP_BPM_L<6>

CPU_CFG<6>

CPU_CFG<4>

XDP_BPM_L<1>

CPU_CFG<3>

CPU_CFG<1>

XDP_BPM_L<4>

XDP_BPM_L<7>

PP5V_S0 PP3V3_S5

PM_PWRBTN_L

XDP_LPCPLUS_GPIO

XDP_FW_PME_L

XDP_SSD_PCIE0_SEL_L

XDP_JTAG_ISP_TCK

XDP_JTAG_ISP_TDI

XDP_PCH_SATAPHY_PC

XDP_PCH_GPIO17 XDP_PCH_USB3PHY_PC

XDP_USB_EXTA_OC_L

MAKE_BASE=TRUE

XDP_USB_EXTD_OC_L

XDP_PCH_UART_SSD_L_BT_H

PCH_USB3PHY_PC

PCH_SATAPHY_PC PCH_UART_SSD_L_BT_H

XDP_SDCONN_STATE_CHANGE_L

XDP_USB_EXTC_OC_L

MAKE_BASE=TRUE

XDP_USB_EXTB_OC_L

XDP_DBRESET_L

XDP_CPU_PRDY_L

XDP_MLB_RAMCFG1 XDP_MLB_RAMCFG2 XDP_MLB_RAMCFG3

XDP_MLB_RAMCFG0

XDP_USB_EXTA_OC_L

XDP_CPURST_L

PP1V05_S0

XDP_BPM_L<0>

CPU_CFG<0>

16 OF 75

<SCH_NUM>

18 OF 130

12 16 68

12

16 68

12 16 68

6

12 16 66

6

12 16 66

12

16 68

6 8

11 15 16

17 32 44 46 51

60

6

16 66

12 16

8

11 12 46

48 51 60

6

16 66

17 25

30 39 40 44 45 47 49 51

60

8

11 13 15

17 22 33 37 46 47

51 59 60 73 75

66

6 8

11 15 16

17 32 44 46 51

60

WWW.AliSaler.Com

OUT

IN

BIIN

OUT

IN

NC

PAD

GND

VG3HOT

VDD

OE_12M_B

VIOE_12M_A

12M_B

12M_A

24M_B

24M_A

X1

X2

VIOE_24M_A VIOE_24M_B

THRM

32.768K

IN

VER 3

D

SG

VER 3

D

SG

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

GreenCLK 24MHz Power Must be powered if any VDDIO is powered.

CAM XTAL Power

available ~3.3V power

NOTE: 30 PPM or better required for RTC accuracy

SSD XTAL Power

System 32kHz / 12MHz / 24MHz Clock Generator

Coin-Cell: VBAT (300-ohm & 10uF RC) No Coin-Cell: 3.42V G3Hot (no RC)

Coin-Cell & G3Hot: 3.42V G3Hot Coin-Cell & No G3Hot: 3.3V S5 No Coin-Cell: 3.3V S5

VBAT and +V3.3A are

IPD = 9-50k

If high, ME is disabled. This allows for full re-flashing of SPI ROM.

Q1920 & 5V pull-up allows circuit to work regardless of HDA voltage.

PCH uses HDA_SDO as a power-up strap. If low, ME functions normally.

SMC controls strap enable to allow in-field control of strap setting.

PCH ME Disable Strap

to reduce VBAT draw.

internally ORed to

+V3.3A should be first

create VDD_RTC_OUT.

No bypass necessary

SB XTAL Power

PCH 24MHz Outputs

17 31 68

22

MF

201

5%

1/20W

PLACE_NEAR=U0500.K15:5.1mm

R1927

12

12 68

13 31 16

66

MF

XDP

1/20W

5%

0201

0

R1996

12

10K

MF 201

5% 1/20W

R1995

1

2

100K

MF 201

5% 1/20W

R1920

1

2

1K

MF 201

5% 1/20W

R1921

1

2

12 68

31

MF

1/20W

5%

201

10K

R1931

1

2

25V

0201

CERM-C0G

9PF

+/-0.5PF

C1926

12

25V

0201

CERM-C0G

9PF

+/-0.5PF

C1925

12

1/20W

MF

0201

0

5%

R1925

12

NO STUFF

5% 1/20W MF

1M

201

R1928

1

2

X5R-CERM

0.1UF

10% 16V

0201

C1924

1

2

10% 16V

0201

0.1UF

X5R-CERM

C1922

1

2

CRITICAL

24.000MHZ-20PPM-9.5PF-60OHM

1.60X1.20MM-SM

Y1925

24

13

SLG3AP3405

CRITICAL

TQFN

U1900

5 9

12 4

10

71114817

2

15

6

13

3

1

16

31

0201

10% 16V

X5R-CERM

0.1UF

C1923

1

2

X5R

20%

1UF

6.3V 0201

C1901

1

2

10% 16V X5R-CERM

0.1UF

0201

C1902

1

2

SOT563

DMN5L06VK-7

Q1920

6

2

1

DMN5L06VK-7

SOT563

Q1920

3

5

4

Chipset Support

SYNC_DATE=06/28/2013

SYNC_MASTER=J92_DEVMLB

SMC_CLK12M_EN

XDP_DBRESET_L

SYSCLK_CLK12M_SSD

SYSCLK_CLK24M_CAMERA

SYSCLK_CLK12M_SMC

SYSCLK_CLK32K_PMIC

SYSCLK_CLK24M_SB

PP3V3_S0

CPU_VCCST_PWRGD

HDA_SDOUT_R

PP1V05_S0

PP5V_S0

LPC_CLK24M_SMC_R

LPC_CLK24M_SMC

PM_SYSRST_L

MAKE_BASE=TRUE

LPC_CLK24M_SMC

PP3V3_G3H

SYSCLK_CLK24M_X2_R

SYSCLK_CLK24M_X1

PP1V8_S0SW_SSD_COLD

PP3V3_S5

PP1V2_CAM_XTALPCIEVDD

PP1V5_S0

SPI_DESCRIPTOR_OVERRIDE_L

PP1V5_S0

SPI_DESCRIPTOR_OVERRIDE_LS5V

SPI_DESCRIPTOR_OVERRIDE

SYSCLK_CLK24M_X2

<SCH_NUM>

19 OF 130

17 OF 75

54 64

24 64

68

31 64

46 64

12

8

11 12 13

15 18 23 24 29 32

33 34 35 36 40 46 47 53 60 73

75

8

16 46

6 8

11 15 16 32

44 46 51 60

16 25 30 39 40 44 45 47 49 51 60

17 31 68

28 30 31 32 33 34 37 42 43 60

23 50 54 56 58 59 60 64

8

11 13 15

16 22 33 37 46 47

51 59 60 73 75

24

8

11

17 40

46 60

8

11 17 40

46 60

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OUT

IN

OUT

NC

08

NC

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

Platform Reset Connections

Unbuffered

RAM Configuration Straps

LPDDR3 Alias Support

Pull-downs for chip-down RAM systems

5%

201

1/20W

MF

10K

RAMCFG3:L

R2050

1

2

5%

201

1/20W

MF

10K

RAMCFG2:L

R2051

1

2

5%

201

1/20W

MF

10K

RAMCFG1:L

R2052

1

2

5%

201

1/20W

MF

10K

RAMCFG0:L

R2053

1

2

15 16

15

16

15 16

6

18

15 18

0

MF

1/20W

0201

5%

R2072

12

13 15 16 31

2.2K

MF

1/20W

201

5%

R2000

1

2

2.2K

MF

1/20W

201

5%

R2001

1

2

MF

1/20W

5%

100K

201

R2010

1

2

14 33

13

X5R-CERM 0201

10V

10%

0.1UF

C2020

1

2

CRITICAL

74LVC1G08

SOT891

U2020

2

1

35

6

4

4.7K

MF

1/20W

5%

201

R2020

1

2

29

28 33 64

SYNC_MASTER=J92_DEVMLB

SYNC_DATE=08/01/2013

Project Chipset Support

PLT_RESET_L

TP_CPU_MEM_RESET_L

MAKE_BASE=TRUE

TP_MEM_VDD_SEL_1V5_L

MAKE_BASE=TRUE

VOLTAGE=0.6V

MAKE_BASE=TRUE

PPVREF_S3_MEM_VREFCA

PPVREF_S3_MEM_VREFDQ_A

MAKE_BASE=TRUE

VOLTAGE=0.6V

PPVREF_S3_MEM_VREFDQ_B

MAKE_BASE=TRUE

VOLTAGE=0.6V

PP3V3_S0

DP_TBTSNK0_DDC_DATA DP_TBTSNK0_DDC_CLK

PPVREF_S3_MEM_VREFCA PPVREF_S3_MEM_VREFCA

TP_MEM_VDD_SEL_1V5_L

TP_CPU_MEM_RESET_L

XDP_MLB_RAMCFG3

XDP_MLB_RAMCFG2

XDP_MLB_RAMCFG1

XDP_MLB_RAMCFG0

PPVREF_S3_MEM_VREFDQ_B

PPVREF_S3_MEM_VREFDQ_A

PP3V3_SUS

PCH_SML1ALERT_L

SMC_LRESET_L

DP_TBTSNK0_HPD

E85_TEST_MODE_HPD

PP3V3_S0

DP_E85SNK_HPD

<SCH_NUM>

20 OF 130

18 OF 75

6

18

15 18

18 19

20 21 69

18 19 20 69

18 19 21 69

8

11 12 13

15 17 18 23 24 29

32 33 34 35 36 40 46 47 53 60

73 75

13

18 19 20 21 69

18 19 21 69

18 19 20 69

8

11 14 15

27 28 29 46

51 60

8

11 12 13 15

17 18 23 24 29 32

33 34 35 36 40 46 47 53 60 73

75

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IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

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NOTICE OF PROPRIETARY PROPERTY:

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PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

DDR3 (1.5V) 7.70mV per step

LPDDR3 (1.2V) ?.??mV per step

DDR3L (1.35V) 6.99mV per step

NOTE: CPU DAC output step sizes:

CPU-Based Margining

VRef Dividers

7

201

MF

1%

8.2K

1/20W

R2221

1

2

201

PLACE_NEAR=R2261.2:1mm

1%

8.2K

1/20W

MF

R2262

1

2

201

MF

1/20W

1%

24.9

R2260

12

5.1

1/20W

0201

1% MF

R2263

12

10%

0.022UF

0201

X5R-CERM

6.3V

C2260

1

2

201

1%

8.2K

1/20W MF

R2261

1

2

PLACE_NEAR=R2241.2:1mm

201

1%

8.2K

1/20W

MF

R2242

1

2

201

MF

1/20W

1%

24.9

R2240

12

201

10

MF

1/20W

1%

R2243

12

6.3V X5R-CERM 0201

0.022UF

10%

C2240

1

2

MF 201

8.2K

1% 1/20W

R2241

1

2

201

1/20W

MF

10

1%

R2223

12

PLACE_NEAR=R2221.2:1mm

1/20W

MF

201

1%

8.2K

R2222

1

2

24.9

201

MF

1/20W

1%

R2220

12

0.022UF

6.3V

10%

0201

X5R-CERM

C2220

1

2

LPDDR3 VREF MARGINING

SYNC_DATE=06/28/2013

SYNC_MASTER=J92_DEVMLB

PP1V2_S3

MEM_VREFDQ_A_RC

CPU_DIMMA_VREFDQ

MEM_VREFDQ_B_RC

CPU_DIMMB_VREFDQ

CPU_DIMM_VREFCA

MEM_VREFCA_A_RC

MIN_NECK_WIDTH=0.2 mm

PPVREF_S3_MEM_VREFDQ_B

MIN_LINE_WIDTH=0.3 mm

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.3 mm

PPVREF_S3_MEM_VREFCA

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.3 mm

PPVREF_S3_MEM_VREFDQ_A

<SCH_NUM>

22 OF 130

19 OF 75

8

10 20 21

46 52 59 60 69

18 21 69

18 20 21 69

18 20 69

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VDDCA_A/B VDDCA_A/B

VDDCA_A/B

VDD2_A/B

VSS_A/B

VDD1_A/B

VDDCA_A/B VDDCA_A/B

VDDCA_A/B

VDD2_A/B VDD2_A/B

VDD2_A/B

VDD2_A/B VDD2_A/B

VDD2_A/B

VDD2_A/B VDD2_A/B

VDD2_A/B

VDDQ_A/B

VDDQ_A/B VDDQ_A/B VDDQ_A/B

VDDQ_A/B VDDQ_A/B

VSS_A/B VSS_A/B

VDD1_A/B

VSS_A/B

VSS_A/B VSS_A/B VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VDD1_A/B

SYM 2 OF 2

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

IN IN IN IN IN

IN

NC

NC NC NC NC

NC

NC NC

IN

BI BI

BI

IN

BI BI

CKE1_B

CS1_B*

CKE1_A

CS1_A*

CS0_B*

CKE0_B

CS0_A*

CKE0_A

CA9_B

CA8_B

DQ3_A

NC

VREFDQ_A

VREFCA_A

ZQ_A

DQS3_C_A

DQS3_T_A

DQS2_C_A

DQS2_T_A

DQS1_T_A DQS1_C_A

DQS0_T_A DQS0_C_A

DQ31_A

DQ30_A

DQ29_A

DQ28_A

DQ27_A

DQ26_A

DQ25_A

DQ24_A

DQ23_A

DQ22_A

DQ21_A

DQ20_A

DQ18_A DQ19_A

DQ17_A

DQ15_A DQ16_A

DQ13_A DQ14_A

DQ12_A

DQ11_A

DQ10_A

DQ8_A DQ9_A

DQ7_A

DQ6_A

DQ5_A

DQ4_A

DQ2_A

DQ0_A DQ1_A

DM3_A

DM2_A

DM1_A

DM0_A

ODT_A

NC

VREFDQ_B

VREFCA_B

ZQ_B

DQS3_C_B

DQS3_T_B

DQS2_C_B

DQS2_T_B

DQS1_C_B

DQS1_T_B

DQS0_C_B

DQS0_T_B

DQ31_B

DQ30_B

DQ29_B

DQ28_B

DQ26_B DQ27_B

DQ25_B

DQ24_B

DQ23_B

DQ22_B

DQ21_B

DQ20_B

DQ18_B DQ19_B

DQ17_B

DQ15_B DQ16_B

DQ14_B

DQ13_B

DQ12_B

DQ11_B

DQ10_B

DQ8_B DQ9_B

DQ7_B

DQ6_B

DQ5_B

DQ4_B

DQ3_B

DQ2_B

DQ1_B

DQ0_B

DM3_B

DM2_B

DM0_B DM1_B

ODT_B

CK_T_A

CA0_A

CA5_A

CK_C_BCK_C_A

CA1_A

CA3_A

CK_T_B

CA8_A

CA2_A

CA4_A

CA6_A

CA9_A

CA0_B CA1_B CA2_B CA3_B CA4_B CA5_B CA6_B CA7_BCA7_A

SYM 1 OF 2

DDR A

DDR B

IN IN

IN IN IN IN IN IN IN IN IN IN

IN IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

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D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BYPASS=U2300.R1::5mm

20%

6.3V

10UF

0402-2

CERM-X5R

C2341

1

2

BYPASS=U2300.A15::5mm

20%

6.3V

0402-2

CERM-X5R

10UF

C2340

1

2

BYPASS=U2300.A16::5mm

CERM-X5R

20%

0402-2

6.3V

10UF

C2342

1

2

10UF

BYPASS=U2300.T1::5mm

6.3V CERM-X5R 0402-2

20%

C2343

1

2

ELPIDA

32GB-LPDDR3X64

OMIT_TABLE

CRITICAL

BGA

U2300

R1 T1

B2 A15 A16 T16

H1

L1

T8 A11

U2

C3

U3 R15 H16 B17 C17

A7

A6

E1

K1

G2

A9

B9

N1 M2

U14 E17 G17 K17 L17 P17

M7

U7 M10 U10

M3

U11

U5 B12 C12 G12 K12 M12 A13

B1 C1

A3 B3 D3 A4 B4 C4 D4 M4 U4 A5

D1

E5 F5 G5 H5 J5 K5 L5 M5 A12 D12

F1

E12 F12 H12 L12 U12 N13 U13 A14 P14 G15

G1

H15 T15 U15 G16 R16 U16 D17 F17 J17 M17

M1

N17 R17 T17 E6 M6 U6 E7 R7 T7 A8

P1

E8 M8 R8 E9 U9 E10 E11 M11

A2 C2 D2

61

7

61 69

61

7

61 69

61

7

61 69

61

61 69

61

69

61 69

7

61 69

61

69

61 69

7

69

7

69

7

20 61 69

201

MF

1/20W

1%

243

R2300

1

2

X5R

6.3V 201

10%

0.047UF

C2311

1

2

X5R

6.3V

10%

0.047UF

201

C2310

1

2

61

X5R

6.3V

0.047UF

201

10%

C2331

1

2

X5R

6.3V

10%

0.047UF

201

C2330

1

2

201

MF

1/20W

1%

243

R2320

1

2

61

CRITICAL

OMIT_TABLE

32GB-LPDDR3X64

ELPIDA

BGA

U2300

B5 L2 C5 L3 D5 L4 B6 K2 C6 K3 C9 G3

D9 G4 B10 F2 C10 F3 D10 F4

C8 H2

B8 H3

C7 J3

D7 J4

D6 K4

B7 J2

N6 H14

P8 F13

P4 L14 P11 D14

N4 L15

T10 F16 R10 E13 P10 E14 N10 E15 T11 E16 R11 D13

T2 P15

R2 P16

P2 N14

N2 N15

T5 L16

T3 N16

R3 M13

P3 M14

N3 L13 N11 C13 N12 C14 P12 C15 T13 C16 R13 B13 P13 B14

R5 K13

T14 B15 R14 B16

P5 K14

N5 K15

T6 K16

R6 J15

P6 J16

T9 F14

R9 F15

N7 J13

P7 J14

N9 G13

P9 G14

R4 M15

T4 M16

R12 D15

T12 D16

A1 A17

C11 D11

D8E3 E4 H4

J12

M9

U1 U17

N8 H13

A10 J1

U8 H17

B11 E2

7

69

7

69

20%

BYPASS=U2300.A6::5mm

1.0UF

0201-1

X5R

6.3V

C2372

1

2

20%

6.3V

BYPASS=U2300.G2::5mm

CERM-X5R

0402-2

10UF

C2371

1

2

20%

6.3V

BYPASS=U2300.A9::5mm

CERM-X5R

0402-2

10UF

C2370

1

2

6.3V X5R 0201-1

1.0UF

20%

BYPASS=U2300.L1::5mm

C2353

1

2

6.3V CERM-X5R 0402-2

10UF

20%

BYPASS=U2300.A11::5mm

C2352

1

2

10UF

0402-2

CERM-X5R

6.3V

20%

BYPASS=U2300.U2::5mm

C2351

1

2

BYPASS=U2300.B17::5mm

CERM-X5R

10UF

0402-2

6.3V

20%

C2350

1

2

BYPASS=U2300.E17::5mm

20%

1.0UF

0201-1

X5R

6.3V

C2386

1

2

BYPASS=U2300.N1::5mm

20%

1.0UF

0201-1

X5R

6.3V

C2381

1

2

BYPASS=U2300.K17::5mm

20%

6.3V

CERM-X5R

0402-2

10UF

C2385

1

2

BYPASS=U2300.A13::5mm

20%

6.3V

CERM-X5R

0402-2

10UF

C2380

1

2

BYPASS=U2300.U5::5mm

20%

1.0UF

0201-1

X5R

6.3V

C2391

1

2

BYPASS=U2300.U10::5mm

20%

6.3V

CERM-X5R

0402-2

10UF

C2390

1

2

61 69

61

69

61 69

7

61 69

61

69

7

69

7

69

7

69

7

69

7

20 69

7

20 69

0201

25V

12PF

CERM

5%

C2344

1

2

5% CERM

12PF

25V 0201

C2354

1

2

NOSTUFF

25V

+/-0.1PF

3.3PF

C0G-CERM 0201

C2345

1

2

NOSTUFF

0201

C0G-CERM

3.3PF

+/-0.1PF 25V

C2355

1

2

SYNC_DATE=(MASTER)

SYNC_MASTER=(MASTER)

LPDDR3 DRAM Channel A (0-63)

PP1V2_S3

MEM_A_CKE<1>

MEM_A_CS_L<1>

MEM_A_CKE<3>

MEM_A_CS_L<1>

MEM_A_CS_L<0>MEM_A_CS_L<0>

MEM_A_CKE<2>

MEM_A_CAA<9>

MEM_A_CAA<8>

=MEM_A_DQ<35>

PPVREF_S3_MEM_VREFDQ_A

=MEM_A_DQS_N<7>

=MEM_A_DQS_P<7>

=MEM_A_DQS_N<6>

=MEM_A_DQS_P<6>

=MEM_A_DQS_N<5>

=MEM_A_DQS_P<4>

=MEM_A_DQS_N<4>

=MEM_A_DQ<63>

=MEM_A_DQ<62>

=MEM_A_DQ<61>

=MEM_A_DQ<60>

=MEM_A_DQ<59>

=MEM_A_DQ<58>

=MEM_A_DQ<57>

=MEM_A_DQ<56>

=MEM_A_DQ<55>

=MEM_A_DQ<54>

=MEM_A_DQ<53>

=MEM_A_DQ<52>

=MEM_A_DQ<51>

=MEM_A_DQ<49>

=MEM_A_DQ<47> =MEM_A_DQ<48>

=MEM_A_DQ<45> =MEM_A_DQ<46>

=MEM_A_DQ<44>

=MEM_A_DQ<43>

=MEM_A_DQ<42>

=MEM_A_DQ<40> =MEM_A_DQ<41>

=MEM_A_DQ<39>

=MEM_A_DQ<38>

=MEM_A_DQ<37>

=MEM_A_DQ<36>

=MEM_A_DQ<34>

=MEM_A_DQ<32> =MEM_A_DQ<33>

MEM_A_ODT<0>

MEM_A_ZQ_A

=MEM_A_DQS_N<3>

=MEM_A_DQS_P<3>

=MEM_A_DQS_N<1>

=MEM_A_DQS_P<1>

=MEM_A_DQS_N<0>

=MEM_A_DQS_P<0>

=MEM_A_DQ<31>

=MEM_A_DQ<30>

=MEM_A_DQ<29>

=MEM_A_DQ<28>

=MEM_A_DQ<26> =MEM_A_DQ<27>

=MEM_A_DQ<25>

=MEM_A_DQ<24>

=MEM_A_DQ<23>

=MEM_A_DQ<22>

=MEM_A_DQ<21>

=MEM_A_DQ<20>

=MEM_A_DQ<18> =MEM_A_DQ<19>

=MEM_A_DQ<17>

=MEM_A_DQ<15> =MEM_A_DQ<16>

=MEM_A_DQ<14>

=MEM_A_DQ<13>

=MEM_A_DQ<12>

=MEM_A_DQ<11>

=MEM_A_DQ<10>

=MEM_A_DQ<8>

=MEM_A_DQ<7>

=MEM_A_DQ<6>

=MEM_A_DQ<5>

=MEM_A_DQ<4>

=MEM_A_DQ<3>

MEM_A_DQ<33>

=MEM_A_DQ<1>

=MEM_A_DQ<0>

MEM_A_ODT<0>

MEM_A_CLK_P<1>

MEM_A_CAB<5>

MEM_A_CLK_N<0>MEM_A_CLK_N<1>

MEM_A_CAB<1>

MEM_A_CAB<3>

MEM_A_CLK_P<0>

MEM_A_CAB<8>

MEM_A_CAB<2>

MEM_A_CAB<4>

MEM_A_CAB<6>

MEM_A_CAB<9>

MEM_A_CAA<0> MEM_A_CAA<1>

MEM_A_CAA<5> MEM_A_CAA<6> MEM_A_CAA<7>MEM_A_CAB<7>

=MEM_A_DQ<9>

MEM_A_CAB<0>

=MEM_A_DQ<50>

MEM_A_DQS_N<6>

MEM_A_DQS_P<6>

=MEM_A_DQS_P<5>

PPVREF_S3_MEM_VREFCA

MEM_A_ZQ_B

PPVREF_S3_MEM_VREFCA PPVREF_S3_MEM_VREFDQ_A

MEM_A_CKE<0>

MEM_A_CAA<4>

MEM_A_CAA<3>

MEM_A_CAA<2>

PP1V2_S3

PP1V8_S3

20 OF 75

23 OF 130

<SCH_NUM>

8

10 19 20

21 46 52 59 60 69

8

10 19 20

21 46 52 59 60 69

7

20 69

7

20 69

18 19 20

69

7

20 61 69

18 19

20 21 69 18 19 20 21 69

18 19 20 69

8

10 19 20

21 46 52 59 60 69

21 46 50 52 59 60

www.qdzbwx.com

WWW.AliSaler.Com

VDDCA_A/B VDDCA_A/B

VDDCA_A/B

VDD2_A/B

VSS_A/B

VDD1_A/B

VDDCA_A/B VDDCA_A/B

VDDCA_A/B

VDD2_A/B VDD2_A/B

VDD2_A/B

VDD2_A/B VDD2_A/B

VDD2_A/B

VDD2_A/B VDD2_A/B

VDD2_A/B

VDDQ_A/B

VDDQ_A/B VDDQ_A/B VDDQ_A/B

VDDQ_A/B VDDQ_A/B

VSS_A/B VSS_A/B

VDD1_A/B

VSS_A/B

VSS_A/B VSS_A/B VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VSS_A/B VSS_A/B

VSS_A/B

VDD1_A/B

SYM 2 OF 2

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

IN IN IN IN IN

IN

NC

NC NC NC NC

NC

NC NC

IN

BI BI

BI

BI BI

CKE1_B

CS1_B*

CKE1_A

CS1_A*

CS0_B*

CKE0_B

CS0_A*

CKE0_A

CA9_B

CA8_B

DQ3_A

NC

VREFDQ_A

VREFCA_A

ZQ_A

DQS3_C_A

DQS3_T_A

DQS2_C_A

DQS2_T_A

DQS1_T_A DQS1_C_A

DQS0_T_A DQS0_C_A

DQ31_A

DQ30_A

DQ29_A

DQ28_A

DQ27_A

DQ26_A

DQ25_A

DQ24_A

DQ23_A

DQ22_A

DQ21_A

DQ20_A

DQ18_A DQ19_A

DQ17_A

DQ15_A DQ16_A

DQ13_A DQ14_A

DQ12_A

DQ11_A

DQ10_A

DQ8_A DQ9_A

DQ7_A

DQ6_A

DQ5_A

DQ4_A

DQ2_A

DQ0_A DQ1_A

DM3_A

DM2_A

DM1_A

DM0_A

ODT_A

NC

VREFDQ_B

VREFCA_B

ZQ_B

DQS3_C_B

DQS3_T_B

DQS2_C_B

DQS2_T_B

DQS1_C_B

DQS1_T_B

DQS0_C_B

DQS0_T_B

DQ31_B

DQ30_B

DQ29_B

DQ28_B

DQ26_B DQ27_B

DQ25_B

DQ24_B

DQ23_B

DQ22_B

DQ21_B

DQ20_B

DQ18_B DQ19_B

DQ17_B

DQ15_B DQ16_B

DQ14_B

DQ13_B

DQ12_B

DQ11_B

DQ10_B

DQ8_B DQ9_B

DQ7_B

DQ6_B

DQ5_B

DQ4_B

DQ3_B

DQ2_B

DQ1_B

DQ0_B

DM3_B

DM2_B

DM0_B DM1_B

ODT_B

CK_T_A

CA0_A

CA5_A

CK_C_BCK_C_A

CA1_A

CA3_A

CK_T_B

CA8_A

CA2_A

CA4_A

CA6_A

CA9_A

CA0_B CA1_B CA2_B CA3_B CA4_B CA5_B CA6_B CA7_BCA7_A

SYM 1 OF 2

DDR A

DDR B

IN IN

IN IN IN IN IN IN IN IN IN IN

IN IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BGA

32GB-LPDDR3X64

ELPIDA

CRITICAL

OMIT_TABLE

U2500

R1 T1

B2 A15 A16 T16

H1

L1

T8 A11

U2

C3

U3 R15 H16 B17 C17

A7

A6

E1

K1

G2

A9

B9

N1 M2

U14 E17 G17 K17 L17 P17

M7

U7 M10 U10

M3

U11

U5 B12 C12 G12 K12 M12 A13

B1 C1

A3 B3 D3 A4 B4 C4 D4 M4 U4 A5

D1

E5 F5 G5 H5 J5 K5 L5 M5 A12 D12

F1

E12 F12 H12 L12 U12 N13 U13 A14 P14 G15

G1

H15 T15 U15 G16 R16 U16 D17 F17 J17 M17

M1

N17 R17 T17 E6 M6 U6 E7 R7 T7 A8

P1

E8 M8 R8 E9 U9 E10 E11 M11

A2 C2 D2

61

7

61 69

61

7

61 69

61

7

61 69

61

61 69

61 64

69

61 69

7

61 69

61

69

61 69

7

69

7

69

7

21 61 69

243

1%

1/20W

MF

201

R2500

1

2

0.047UF

10%

201

6.3V X5R

C2511

1

2

201

0.047UF

10%

6.3V X5R

C2510

1

2

61

10%

201

0.047UF

6.3V X5R

C2531

1

2

201

0.047UF

10%

6.3V X5R

C2530

1

2

243

1% 1/20W MF 201

R2520

1

2

61

BGA

CRITICAL

OMIT_TABLE

32GB-LPDDR3X64

ELPIDA

U2500

B5 L2 C5 L3 D5 L4 B6 K2 C6 K3 C9 G3

D9 G4 B10 F2 C10 F3 D10 F4

C8 H2

B8 H3

C7 J3

D7 J4

D6 K4

B7 J2

N6 H14

P8 F13

P4 L14 P11 D14

N4 L15

T10 F16 R10 E13 P10 E14 N10 E15 T11 E16 R11 D13

T2 P15

R2 P16

P2 N14

N2 N15

T5 L16

T3 N16

R3 M13

P3 M14

N3 L13 N11 C13 N12 C14 P12 C15 T13 C16 R13 B13 P13 B14

R5 K13

T14 B15 R14 B16

P5 K14

N5 K15

T6 K16

R6 J15

P6 J16

T9 F14

R9 F15

N7 J13

P7 J14

N9 G13

P9 G14

R4 M15

T4 M16

R12 D15

T12 D16

A1 A17

C11 D11

D8E3 E4 H4

J12

M9

U1 U17

N8 H13

A10 J1

U8 H17

B11 E2

7

64 69

7

64 69

61 64 69

61

69

61 64 69

61 69

7

61 69

61

69

7

69

7

64 69

7

69

7

69

7

21 64 69

7

21 64 69

0402-2

CERM-X5R

10UF

6.3V

20%

BYPASS=U2500.U10::5mm

C2590

1

2

CERM-X5R

0402-2

6.3V

20%

10UF

BYPASS=U2500.K17::5mm

C2585

1

2

0201-1

20%

1.0UF

6.3V X5R

BYPASS=U2500.U5::5mm

C2591

1

2

6.3V X5R 0201-1

20%

1.0UF

BYPASS=U2500.E17::5mm

C2586

1

2

CERM-X5R

20%

6.3V

0402-2

10UF

BYPASS=U2500.A13::5mm

C2580

1

2

10UF

0402-2

CERM-X5R

6.3V

20%

BYPASS=U2500.A9::5mm

C2570

1

2

0402-2

CERM-X5R

10UF

6.3V

20%

BYPASS=U2500.G2::5mm

C2571

1

2

20%

1.0UF

0201-1

X5R

6.3V

BYPASS=U2500.N1::5mm

C2581

1

2

0201-1

X5R

6.3V

1.0UF

20%

BYPASS=U2500.A6::5mm

C2572

1

2

BYPASS=U2500.B17::5mm

20%

10UF

6.3V

0402-2

CERM-X5R

C2550

1

2

BYPASS=U2500.U2::5mm

20%

10UF

6.3V

0402-2

CERM-X5R

C2551

1

2

1.0UF

BYPASS=U2500.L1::5mm

20%

6.3V 0201-1

X5R

C2553

1

2

0402-2

CERM-X5R

10UF

20%

6.3V

BYPASS=U2500.A15::5mm

C2540

1

2

CERM-X5R

10UF

0402-2

6.3V

20%

BYPASS=U2500.R1::5mm

C2541

1

2

BYPASS=U2500.A16::5mm

6.3V 0402-2

10UF

20% CERM-X5R

C2542

1

2

CERM-X5R 0402-2

20%

6.3V

10UF

BYPASS=U2500.T1::5mm

C2543

1

2

BYPASS=U2500.A11::5mm

10UF

20%

6.3V 0402-2

CERM-X5R

C2552

1

2

CERM

25V 0201

5%

12PF

C2544

1

2

0201

25V

12PF

CERM

5%

C2554

1

2

NOSTUFF

25V

+/-0.1PF

3.3PF

C0G-CERM 0201

C2545

1

2

NOSTUFF

0201

C0G-CERM

3.3PF

+/-0.1PF 25V

C2555

1

2

LPDDR3 DRAM Channel B (0-63)

SYNC_MASTER=(MASTER)

SYNC_DATE=(MASTER)

PP1V2_S3

MEM_B_CAB<3>

MEM_B_CAB<2>

MEM_B_CAB<1>

MEM_B_CKE<1>

MEM_B_CS_L<1>

MEM_B_CKE<3>

MEM_B_CS_L<1>

MEM_B_CS_L<0>

MEM_B_CKE<0>

MEM_B_CS_L<0>

MEM_B_CKE<2>

MEM_B_CAA<9>

MEM_B_CAA<8>

=MEM_B_DQ<35>

PPVREF_S3_MEM_VREFDQ_B

PPVREF_S3_MEM_VREFCA

MEM_B_ZQ_B

=MEM_B_DQS_N<7>

=MEM_B_DQS_P<7>

=MEM_B_DQS_N<6>

=MEM_B_DQS_P<6>

=MEM_B_DQS_P<5> =MEM_B_DQS_N<5>

=MEM_B_DQS_P<4> =MEM_B_DQS_N<4>

=MEM_B_DQ<63>

=MEM_B_DQ<62>

=MEM_B_DQ<61>

=MEM_B_DQ<60>

=MEM_B_DQ<59>

=MEM_B_DQ<58>

=MEM_B_DQ<57>

=MEM_B_DQ<56>

=MEM_B_DQ<55>

=MEM_B_DQ<54>

=MEM_B_DQ<53>

=MEM_B_DQ<52>

=MEM_B_DQ<50> =MEM_B_DQ<51>

=MEM_B_DQ<49>

=MEM_B_DQ<47> =MEM_B_DQ<48>

=MEM_B_DQ<45> =MEM_B_DQ<46>

=MEM_B_DQ<44>

=MEM_B_DQ<43>

=MEM_B_DQ<42>

=MEM_B_DQ<40> =MEM_B_DQ<41>

=MEM_B_DQ<39>

=MEM_B_DQ<38>

=MEM_B_DQ<37>

=MEM_B_DQ<36>

=MEM_B_DQ<34>

=MEM_B_DQ<33>

MEM_B_ODT<0>

PPVREF_S3_MEM_VREFDQ_B

PPVREF_S3_MEM_VREFCA

=MEM_B_DQS_N<3>

=MEM_B_DQS_P<3>

MEM_B_DQS_N<6>

MEM_B_DQS_P<6>

=MEM_B_DQS_N<1>

=MEM_B_DQS_P<1>

=MEM_B_DQS_N<0>

=MEM_B_DQS_P<0>

=MEM_B_DQ<31>

=MEM_B_DQ<30>

=MEM_B_DQ<29>

=MEM_B_DQ<28>

=MEM_B_DQ<26> =MEM_B_DQ<27>

=MEM_B_DQ<25>

=MEM_B_DQ<24>

=MEM_B_DQ<22>

=MEM_B_DQ<21>

=MEM_B_DQ<20>

=MEM_B_DQ<18> =MEM_B_DQ<19>

=MEM_B_DQ<17>

=MEM_B_DQ<15> =MEM_B_DQ<16>

=MEM_B_DQ<14>

=MEM_B_DQ<13>

=MEM_B_DQ<12>

=MEM_B_DQ<11>

=MEM_B_DQ<10>

=MEM_B_DQ<8>

=MEM_B_DQ<7>

=MEM_B_DQ<6>

=MEM_B_DQ<5>

=MEM_B_DQ<4>

=MEM_B_DQ<3>

MEM_B_DQ<32>

=MEM_B_DQ<1>

=MEM_B_DQ<0>

MEM_B_ODT<0>

MEM_B_CLK_P<1>

MEM_B_CAB<5>

MEM_B_CLK_N<0>MEM_B_CLK_N<1>

MEM_B_CLK_P<0>

MEM_B_CAB<8>

MEM_B_CAB<4>

MEM_B_CAB<6>

MEM_B_CAB<9>

MEM_B_CAA<0>

MEM_B_CAA<2> MEM_B_CAA<3> MEM_B_CAA<4> MEM_B_CAA<5> MEM_B_CAA<6> MEM_B_CAA<7>MEM_B_CAB<7>

=MEM_B_DQ<23>

=MEM_B_DQ<32>

MEM_B_ZQ_A

MEM_B_CAA<1>

PP1V2_S3

MEM_B_CAB<0>

=MEM_B_DQ<9>

PP1V8_S3

<SCH_NUM>

25 OF 130

21 OF 75

8

10 19 20

21 46 52 59 60 69

7

21 64 69

7

21 64 69

18 19

21 69

18 19 20 21 69

18 19 21 69

18 19 20 21 69

7

21 61 69

8

10 19 20

21 46 52 59 60 69

8

10 19 20

21 46 52 59 60 69

20 46 50 52 59 60

WWW.AliSaler.Com

IN

OUT

IN

NC

IN

NC NC

NC

IN

OUT

IN

OUT

IN

NC NC

OUT

IN

NC

BI

SYM_VER_2

GS

D

OUT

SK

DO

ORG

NC

DI CS

GND

THRM

PAD

VCC

NC

IN

WP*

HOLD*

SI/SIO0 SO/SIO1

CS*

SCLK

THRM

GND

VCC

PAD

NC

B0

GND

B1

1

VCC

A

VER 1

0

SEL

NC

BT_GPIO5

HSIC_RESUME_FAST_CTS_IN/JTAG_TCK

2G_CORE0_ANT

5G_CORE0_ANT

2G_CORE1_ANT

5G_CORE1_ANT

BT_GPIO3

HOST_WAKE_BT

SEC_OUT/JTAG_TDO

JTAG_TRST SEC_IN/JTAG_TDI

JTAG_TMS

HSIC_WLAN_STROBE

BT_REG_ON

HSIC_DEV_RDY

JTAG_SEL

WLAN_REG_ON

FAST_UART_TX WL_GPIO_8

FAST_UART_RX

FAST_RTS_OUT

WL_UART_TX

WL_GPIO_9

WLAN_PCIE_RDN0

WLAN_PCIE_RDP0

WLAN_PCIE_PME

WLAN_PCIE_CLKREQ

WLAN_PCIE_TDN0

WLAN_PCIE_TDP0

WLAN_PCIE_REFCLKP

WL_HOST_WAKE

WL_GPIO_13

WL_UART_RX

WLAN_PERST

WLAN_PCIE_REFCLKN

BT_PCM_IN

BT_USB_DN

BT_USB_DP

BT_UART_TXD

BT_UART_RXD

BT_UART_CTS*

BT_PCM_OUT

BT_PCM_SYNC

BT_PCM_CLK

BT_UART_RTS*

BATT_VCC

BATT_RF_VCC

BT_WAKE

ANT_SWITCH_CORE1

ANT_SWITCH_CORE0

BT_GPIO4

CLK32K_AP

VDDIO_1P8

HSIC_HOST_READY/PCIE_DEV_WAKE

HSIC_WLAN_DATA

SYM 1 OF 2

(2 OF 2)

THRM_PAD

GND

THRM_PAD

P2

P3

P1

GND

P2

P3

P1

GND

NC NC

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

(FW changed to BT DEVICE WAKE)

(FW changed to BT HOST WAKE)

(GPIO5)

L PCIE_WAKE_L (B0)

(GPIO12)

(GPIO13)

(GPIO10)

(GPIO6)

SEL OUTPUT

(GPIO1)

(GPIO11)

PCIe Wake Muxing

H AP_S0IX_WAKE_L (B1)

(GPIO14) (GPIO15)

(GPIO2)

(GPIO4)

(GPIO3)

(GPIO0)

(AP_PCIE_WAKE_L)

(GPIO9)

(GPIO8) (GPIO7)

CRITICAL

20449-001E-01

F-ST-SM

J3510

234

1

31 64

20449-001E-01

CRITICAL

F-ST-SM

J3520

234

1

NO STUFF

0.2PF

+/-0.1PF

16V

NP0-C0G

01005

C3517

1

2

NO STUFF

16V NP0-C0G 01005

0.2PF

+/-0.1PF

C3516

1

2

16V

NP0-C0G

0.2PF

01005

+/-0.1PF

NO STUFF

C3527

1

2

NO STUFF

16V NP0-C0G 01005

0.2PF

+/-0.1PF

C3526

1

2

0.2PF

16V

NP0-C0G

01005

+/-0.1PF

NO STUFF

C3512

1

2

OMIT_TABLE

0.3PF

+/-0.1PF 16V NP0-C0G 01005

C3513

1

2

16V

NP0-C0G

01005

0.2PF

NO STUFF

+/-0.1PF

C3522

1

2

0.2PF

+/-0.1PF

01005

NP0-C0G

16V

OMIT_TABLE

C3520

1

2

CRITICAL

CERM

0.3PF

+/-0.5PF 16V

01005

C3523

1

2

0% MF

0.00

01005

CRITICAL

1/32W

R3510

12

MF

0%

CRITICAL

1/32W 01005

0.00

R3520

12

X5R-CERM1

6.3V 402

20%

4.7UF

C3500

1

2

X5R-CERM1 402

6.3V

20%

4.7UF

C3501

1

2

20%

10UF

603

X5R

6.3V

C3503

1

2

603

10UF

20% X5R

6.3V

C3502

1

2

1/20W MF

5%

100K

201

R3561

1

2

CERM-X5R

0201

10%

0.1UF

6.3V

C3560

1

2

15 64

13

15 64

5% MF

10K

201

1/20W

R3500

1

2

31 64 23

23

23 64

12

15

16V10%

0201

0.1UF

X5R-CERM

C3553

12

10%

0201X5R-CERM

16V

0.1UF

C3552

12

0.1UF

10%

0201

16V

X5R-CERM

C3551

12

0.1UF

16V10%

0201X5R-CERM

C3550

12

14 68

14

68

14 68

31 32

14 67

5%

100K

1/20W MF 201

R3571

1

2

100K

5% MF

201

1/20W

R3572

1

2

5%

100K

1/20W

MF

201

R3573

1

2

10%

0201

0.1UF

6.3V CERM-X5R

C3570

1

2

100K

MF 201

1% 1/20W

R3530

1

2

NO_XNET_CONNECTION=TRUE

DFN1006H4-3

DMN32D2LFB4

Q3530

3

1

2

30 31

33

OMIT_TABLE

AT93C66B-MAHM

UDFN

U3580

1

34

5

7

6

2

9

8

5%

10K

1/20W MF 201

R3580

1

2

6.3V

0.1UF

10%

0201

CERM-X5R

C3580

1

2

13 64

C0G

100PF

5%

0201

25V

C3554

12

12 68

5%

100PF

C0G25V

0201

C3555

12

512KBIT

MX25V512EZUI-13G

USON

OMIT_TABLE

U3570

1

4

7

6

5 2

9

8

3

1/20W

MF

1%

22

201

NO STUFF

R3550

12

201

MF

1%

22

1/20W

NO STUFF

R3551

12

MF

1/20W

5%

201

10K

R3501

1

2

MF

1/20W

5%

10K

201

R3502

1

2

201

MF

5% 1/20W

10K

R3503

1

2

201

5% MF

10K

1/20W

R3504

1

2

CRITICAL

DFN

PI5A3157B

U3560

34

2

5

6

1

0.2PF

16V

01005

NP0-C0G

+/-0.1PF

NO STUFF

C3525

1

2

OMIT_TABLE

0.00

1/32W

0% MF

01005

R3524

12

+/-0.1PF

01005

NP0-C0G

16V

2PF

C3515

1

2

OMIT_TABLE

0.00

1/32W 01005

0% MF

R3514

12

LBEE5UA1BL-717

LGA

CRITICAL

U3500

22 31

28 39

5 2

25

35

58

20

10

21

6

7

14

18

56

9 8

13 12

4

3

16

68

46

48 54

17

47 61 62

66 65

45

63 44

41

43 42

11

51

53

52

55

50 49

80

79

76

77

70

71

74

73

1

60

LBEE5UA1BL-717

LGA

CRITICAL

U3500

15 19

34 36 37 38 40 57 59 64 67 69

23

72 75 78

24 26 27 29 30 32 33

81 82

91 92 93 94 95 96 97 98 99

100

83

101 102 103 104 105 106 107 108 109 110

84

111 112 113

114 115 116 117 118 119 120

85

121 122 123 124 125 126 127 128 129 130

86

131 132 133 134 135 136 137 138 139 140

87

141 142 143 144 145 146 147 148 149 150

88

151 152 153 154 155 156 157 158 159 160

89

161 162 163 164 165 166 167 168 169 170

90

LLP

CRITICAL

LFD2H2G45ML5D911

U3510

246

1

3

5

LFD2H2G45ML5D911

LLP

CRITICAL

U3520

246

1

3

5

OMIT_TABLE

01005

1/32W

0.00

MF

0%

R3511

12

CRITICAL

1/32W

0.00

0% MF

01005

R3521

12

NO STUFF

0.2PF

01005

+/-0.1PF 16V NP0-C0G

C3510

1

2

13

5% CERM

12PF

25V 0201

C3505

1

2

25V

12PF

CERM

5%

0201

C3506

1

2

25V

12PF

CERM

5%

0201

C3507

1

2

25V

12PF

CERM

5%

0201

C3504

1

2

IND,FILM,0.4NH,+/-0.1NH,270MA,01005

152S1544

R3511

CRITICAL

1

IND,FILM,1.8NH,+/-0.1NH,270MA,01005

152S1720

C3520

CRITICAL

1

IND,FILM,2.4NH,+/-0.1NH,200MA,01005

152S1564 CRITICAL

R3524

1

152S1742

IND,FILM,1.6NH,+/-0.1NH,200MA,01005

C3513

CRITICAL

1

131S0259

CAP,7PF,+/-0.1PF,16V,01005

CRITICAL

R3514

1

WIFI/BT: MODULE

SYNC_MASTER=J72_MLB

SYNC_DATE=11/13/2012

PP3V3_S4

AP_PCIE_WAKE_L

RF_G_1_DIPLEXER

PCIE_AP_R2D_P

PCIE_CLK100M_AP_C_P

WLAN_ROM_CLK

BTROM_WP_L

WLAN_ROM_CS

WLAN_ROM_MOSI

USB_BT_P

USB_BT_N

SMC_PME_S4_WAKE_L

PCIE_AP_D2R_P

BTROM_HOLD_L

PCIE_AP_R2D_C_N

PCIE_AP_D2R_N

PCIE_CLK100M_AP_N

WLAN_ROM_MISO

AP_S0IX_WAKE_L

AP_S0IX_WAKE_SEL

PCIE_WAKE_L

PCIE_CLK100M_AP_P

WLAN_ROM_ORG

TP_JTAG_WLAN_TMS

SMC_BT_PWR_EN

JTAG_WLAN_SEL

WLAN_ROM_CLK WLAN_ROM_CS

WLAN_ROM_MISO

PCIE_AP_R2D_N

AP_CLKREQ_L

PCIE_AP_D2R_C_N

SMC_WIFI_EVENT_L

AP_RESET_L

PCIE_CLK100M_AP_C_N

BT_SPI_MISO

USB_BT_R_N

USB_BT_R_P

BT_UART_R2D

BT_UART_CTS_L

BT_SPI_MOSI

BT_UART_RTS_L

BT_GPIO4

PCIE_AP_R2D_C_P

PCIE_AP_D2R_C_P

BT_DEV_WAKE

SMC_WIFI_PWR_EN

RF_1_ANT

RF_0_ANT

RF_0_ANT_MATCH_T

RF_1_ANT_MATCH_T

RF_A_1_DIPLEXER

RF_A_0_DIPLEXER

BT_SPI_MISO

BT_SPI_MOSI

BT_SPI_CS_L BT_SPI_CLK

PP3V3_S4

RF_G_0_DIPLEXER

RF_G_0_MATCH

RF_A_0_MATCH

RF_G_1_MATCH

RF_A_1_MATCH

AP_PCIE_DEV_WAKE

BT_LOW_PWR_L

TP_JTAG_WLAN_TDO

JTAG_WLAN_TDI

TP_JTAG_WLAN_TCK

PP3V3_S5

WLAN_ROM_MOSI

TP_JTAG_WLAN_TRST

BT_UART_D2R

BT_SPI_CS_L

BT_SPI_CLK

<SCH_NUM>

35 OF 130

22 OF 75

22 23 28

29

30 32 33 50

51 60

64

73

68

22

68

22

67

22

68

64

73

73 73

73

22

22 23 28 29 30 32 33 50 51 60

73 73

73

8

11 13 15

16 17 33 37 46 47

51 59 60 73 75

22

WWW.AliSaler.Com

IN

OUT OUT

DIR2

A2

A1

DIR1

OE*

GND

B1 B2

VCCBVCCA

OUT

IN

SYM_VER_2

GS

D

OUT

OUT IN

VCC

GND

SELOE*

D+ D-

Y+ Y-

M+ M-

OUT

IN

NC

08

NC

OUT

IN

D

SYM_VER_3

SG

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

87 6 5

4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

Bootloader Enable

BT UART CTS# Isolation

SEL OUTPUT

(PCH_UART_SSD_L_BT_H_RC)

L SSD (M) H BT (D)

PCH UART CTS# Isolation

SSD/PCH Level Shifter

PCH UART BT/SSD MUX

22 usec tau

14 66

14

66

14 66

X5R-CERM

16V

0201

GND_VOID=TRUE

0.1UF

10%

C3716

12

16V

0201X5R-CERM

GND_VOID=TRUE

10%

0.1UF

C3717

12

16V

0201X5R-CERM

GND_VOID=TRUE

0.1UF

10%

C3713

12

GND_VOID=TRUE

16V

0201X5R-CERM

0.1UF

10%

C3712

12

16V

GND_VOID=TRUE

0201X5R-CERM

0.1UF

10%

C3715

12

0201

GND_VOID=TRUE

X5R-CERM

16V

0.1UF

10%

C3714

12

16V

X5R-CERM 0201

GND_VOID=TRUE

0.1UF

10%

C3711

12

16V

GND_VOID=TRUE

0.1UF

10%

0201X5R-CERM

C3710

12

64 66

64

66

64 66

QFN

SN1203086RSWR

U3750

8 9

5 4

10

1

3

2

7

6

X5R-CERM

10%

0201

10V

BYPASS=U3750.9:7:5mm

0.1UF

C3750

1

2

54 59 64

54

59 64

13 64

DMN32D2LFB4

DFN1006H4-3

Q3700

3

1

2

54 59 64

0201

X5R-CERM

10V

10%

0.1UF

BYPASS=U3750.6:7:5mm

C3751

1

2

22

201

100K

MF

5% 1/20W

R3750

1

2

1/20W MF

100K

5%

201

R3751

1

2

MF

5%

201

1/20W

100K

R3752

1

2

100K

MF

1/20W 201

5%

R3753

1

2

PI3USB102EZLE

TQFN

CRITICAL

U3755

6

7

3

4

5

8

10

9

2

1

BYPASS=U3755.9:3:5mm

0.1UF

0201

X5R-CERM

10% 10V

C3755

1

2

15 64

22 64

SOT891

74LVC1G08

CRITICAL

U3756

2

1

35

6

4

X5R-CERM

10%

0.1UF

0201

10V

BYPASS=U3756.6::5mm

C3756

1

2

22 64

15 64

15

MF 201

5% 1/20W

330K

R3711

1

2

31 54

DMN32D2LFB4

DFN1006H4-3

Q3720

3

1

2

4.7K

5%

201

1/20W

MF

R3720

1

2

10K

1/20W

MF

5%

201

R3722

12

0201

10%

2.2NF

X5R-CERM

10V

C3722

1

2

12 16

10% 10V

X5R-CERM

2.2NF

0201

R3721

12

SSD Support

SYNC_MASTER=J92_DEVMLB

SYNC_DATE=09/11/2013

PP1V8_S0SW_SSD_COLD

SMC_OOB1_D2R_L

SSD_UART_D2R

PCIE_SSD_R2D_N<1>

PCIE_SSD_R2D_P<0>

PCH_BT_UART_RTS_L

BT_UART_CTS_L

PCH_UART_SSD_L_BT_H_RC

PCH_UART_SSD_L_BT_H

BT_UART_RTS_L

PCH_BT_UART_CTS_L

BT_UART_R2D

PCIE_SSD_R2D_C_N<2>

PCIE_SSD_R2D_C_P<3>

PP3V3_S0

PCH_UART_SSD_L_BT_H_RC

PCH_BT_UART_R2D PCH_BT_UART_D2R

BT_UART_D2R

PP3V3_S4

S1X_DEBUG_UART_R2D

PCIE_SSD_R2D_N<2>

SSD_UART_BOOT_L

S1X_DEBUG_UART_D2R

PCIE_SSD_R2D_P<2>

PCIE_SSD_R2D_N<3> PCIE_SSD_R2D_P<3>

PCIE_SSD_R2D_P<1>

PCIE_SSD_R2D_N<0>

PCIE_SSD_R2D_C_P<2>

PCIE_SSD_R2D_C_N<1>

PCIE_SSD_R2D_C_P<1>

PCIE_SSD_R2D_C_N<0>

PCIE_SSD_R2D_C_P<0>

PCIE_SSD_R2D_C_N<3>

SSD_BOOT

SSD_UART_R2D

PP3V3_S0

<SCH_NUM>

37 OF 130

23 OF 75

17 50 54

56 58 59 60 64

23

8

11 12 13 15

17 18 23 24 29 32

33 34 35 36 40 46 47 53 60 73

75

23

22 23 28 29 30 32 33 50 51 60

8

11 12 13

15 17 18 23 24 29

32 33 34 35 36 40 46 47 53 60

73 75

Apple MacBook 12'' Retina A1534 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual