Apple IMAC 5.2 VALLCO Schematic

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

TABLE_TABLEOFCONTENTS_ITEM

7/25/06

IMAC 5,2 -- REV A

NB (GM) Decoupling

(MASTER)

19

(MASTER)

19

NB Power 1

MASTER

1616

MASTER

NB DDR2 Interfaces

01/05/2006

1515

M1

NB Misc Interfaces

MASTER

1414

MASTER

NB PEG / Video Interfaces

01/05/2006

1313

M1

CPU ITP700FLEX DEBUG

01/05/2006

1111

M38

(MASTER)

CPU & SYSTEM SENSE CIRCUITRIES

(MASTER)

7657

NB CPU Interface

01/05/2006

1212

M1

DDR2 SO-DIMM Connector A

MASTER

2828

MASTER

SMC

M1

01/05/2006

5844

LPC+ CONN

M38

12/09/2005

6046

SB: 2 OF 4

MASTER

22

MASTER

22

ETHERNET CONNECTOR

MASTER

4337

MASTER

ETHERNET MISC

MASTER

4236

MASTER

ETHERNET CONTROLLER

MASTER

4135

MASTER

Disk Connectors

MASTER

3834

MASTER

CLOCKS: TERMINATIONS

MASTER

3433

MASTER

NB Config Straps

01/05/2006

20

M1

20

SYNC MASTER

DATE

CONTENTS

CSAPDF

Power Conn / Alias

66

MASTER MASTER

SMC & TPM SUPPORT

(MASTER) (MASTER)

5945

AUDIO: POWER SUPPLIES

AUDIO

05/12/2006

7455

IMVP6 CPU VCore Regulator

MASTER MASTER

7556

SB: SMB HUB AND ALIAS

MASTER

2727

MASTER

SB: MISC

MASTER

2626

MASTER

SB:DECOUPLING

MASTER

2525

MASTER

SB: 4 OF 4

01/05/2006

2424

M38

CPU 1 OF 2-FSB

MASTER

77

MASTER

SB: 1 OF 4

01/05/2006

2121

M38

NB Grounds

01/05/2006

1818

M1

NB Power 2

01/05/2006

1717

M40

Table Items

MASTER

44

MASTER

CLOCKS

MASTER

3332

MASTER

PCIE PORT ALIASES

MASTER MASTER

43 54

SYNC MASTER

CONTENTS

CSA DATEPDF

SB: 3 OF 4

MASTER

2323

MASTER

External Display Conns

MASTER MASTER

9767

TMDS/Inverter/ExtVGA

MASTER MASTER

9666

EXTERNAL TMDS

MASTER MASTER

9565

Internal Display Conns

MASTER MASTER

9464

MASTER

S0 AND S3 FETS

MASTER

8363

MASTER

5V DC/DC

MASTER

8262

MASTER

1.5V_S0 & 1.05V_S0 VREG

MASTER

8061

1.8V & 1.2V VREG

MASTER MASTER

7960

05/12/2006

AUDIO: CONNECTORS

AUDIO

7354

AUDIO: SPEAKER AMP

AUDIO

05/12/2006

7253

FW: FW323-06

MASTER MASTER

4438

MASTER MASTER

6650

Fan 2 & HD Temp

Memory Vtt Supply

MASTER

3131

MASTER

Memory Active Termination

MASTER

3030

MASTER

DDR2 SO-DIMM Connector B

MASTER

2929

MASTER

Fan 0, 1 & System Temp

MASTER MASTER

6549

SPI BOOTROM

M38

01/05/2006

6348

MASTER MASTER

6147

NB THERMAL

AIRPORT CONN

MASTER MASTER

5342

MASTER

USB Device Interfaces

MASTER

4741

FIREWIRE CONNECTORS

MASTER MASTER

4640

MASTER

FW: DECAPS

MASTER

4539

22

MASTER MASTER

System Block Diagram

AUDIO: CODEC

AUDIO

05/12/2006

6852

(MASTER)

3V DC/DC 2.5V

(MASTER)

7859

PWR GOOD

(MASTER) (MASTER)

7758

TPM

M38

01/05/2006

6751

CPU TEMP SENSOR

MASTER

1010

MASTER

CPU DECAPS & VID<>

MASTER

99

MASTER

CPU 2 OF 2-PWR/GND

MASTER

88

MASTER

FUNC TEST 1 OF 2

MASTER

55

MASTER

33

MASTER

Power Block Diagram

A

SCHEM VALLCO

97

1

07/26/06 06/22/04

A

451207 PRODUCTION RELEASED

051-7199

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

3.3V/66MHZ/133MHZ

UATA/66/100

CONNECTOR

PAGE 14

J9700

MINI-DVI

SPI

U2100

DMI

PAGE 14

DMI

4-BIT

PAGE 15

U1200

PAGE 12

667MHZ

FSB

J0700

1.2V/800MHZ

CORE

MISC

CONTROL = 2.5V

SATA

MAIN MEMORY

JC900

PAGE 16-17

64-BIT

1.8V/667MHZ

DDR2 - DUAL CHAN

(1.83/2.17GHZ)

PAGE 7

PAGE 8

CORE (~1.2V)

CPU

(TMDS - VGA)

(INTERNAL)

LVDS

PAGE 94

J9402

PAGE

13

CORE (1.05V)

SB

SATA2

PAGE 38

HARD DRIVE

SATA0

PAGE 21

SATA

UATA

JC901

OPTICAL PAGE 38

CONNECTOR

UATA

PORT

#0

#2-5

PCI-E

PAGE 22

#1

MINI-PCIE

PAGE 53

AIRPORT

1.2V/1.5GHZ

X1 - 1.5GHZ

YUKON

GIG ETHERNET

ETHERNET CONNECTOR

4 Diff pairs

JD600

PAGE 43

U4101

PAGE 41

PAGES 30

PARALLEL

TERM

J2900

J2800

DIMM

PAGE 28-29

PAGE 21

PORT PORT

2 Diff pairs

32-BIT

33MHZ

FIREWIRE A

0

FIREWIRE A CONNECTORS

PAGE 46

PAGE 22

PCI

1 2

AZALIA

CONNECTOR

SPEAKER

LINE OUT

OPTICAL OUT

COMBO OUT CONNECTOR

PAGE 153

SPEAKER

U6800

J7303

PAGE 72

AMP

J7301

PAGE 73

PORT F

AUDIO CODEC

STA9221

PAGE 68

PORT C

PORT A

PORT B

LINE IN

CONNECTOR

J7300

PAGE 73

JE350

MIC IN

BNDI

INTERFACE

S/PDIF

DMI

PAGE 22 PAGE 22

SPI

PAGE 21

FW323-06

PAGE 44

PAGE 21

LPC

4-BIT (3.3V/33MHZ)

JE000, JE001

PAGE 58

SMC

PAGE 67

JE310/JE320/JE330

CONNECTORS

USB

PAGE 47

0 4

J5300

JE350

0,2,4

3,7

BNDI

INTERFACE

PAGE 47

2 3 7

CAMERA

IR

156

PAGE 48

J4700

CONN

BT

USB

PAGE 22

SMB

PAGE 23

J5300 (AIRPORT CONN)

J5300

AIRPORT

U3301

CK410MDIMM’S

J2900

J2800

U5800

RMT

BOOTROM

PAGE 63

U6300/01

PAGE 24

GPIOS

PAGE 23

ITP CONN

J1101

PAGE 11

U6100 GPU+NB TSENS

U1000 CPU TSENS

MLB FAN

J6602 ODD TSENS

J6500,J6501,J6600 FAN CONNS

J2901 ALS+ATS TSENS

U6700

TPM

PAGE 60

CONNLPC+

J6000

PAGE 34

TERMS

CLOCKS

PAGE 33

CK410

U3301

VIDEO

64-BIT

VGA FOR DEBUG

6DUAL CHANNEL LVDS - 6BIT

PAGE 94

CORE (1.50V)

NB- GT

J6601 HD TSENS

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

2

A

051-7199

97

System Block Diagram

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PANEL INVERTER FAN

PAGE 83

FET

PP5V_S0

PP5V_S3 FET

PAGE 83

SB ODD HDD

FHB IR

USB

PAGE 82

PP5V_S5

2.5V @ 0.9A

SB

NB_GRAPHICS

TMDS

AUDIO(+VREG)

FW

HDD

PAGE 83

FET

SPK_AMP

PP12V_S0

AUDIO(ALTERNATE)

1.3V @ 36A PAGE 75

PPVCORE_CPU_S0

CPU_CORE

1.05V @ 5.4A PAGE 80

PP1V05_S0

SB_CPU_IO

NB_VTT

CPU_FSB SB_CORE

NB_FSB

1.50V @ 10.12A PAGE 80

PP1V5_S0

SB_IO NB_GRAPHICS

NB_CORE

CPU_AVDD NB_PCIE

PAGE 79

PP1V2_S3

AC/DC POWER SUPPLY

1.21V @ 0.426A

PAGE 83

ODD

AIRPORT TMDS CK410

ENET_CORE

PAGE 83

FET

PP1V8_S0

PAGE 79

PP1V8_S3

1.81V @ 10A

TMDS

S5

12V, 180W, 15A

DRAM_CORE DRAM_IO

NB_DRAM

PAGE 83

FET

PP2V5_S0

PAGE 78

PP2V5_S5

2.5V @ 0.426A ???

NB_GRAPHICS TMDS

FET

PP3V3_S0

PAGE 83

PP2V5_S3

2.5V @ ?A PAGE 42

FET

3.35V @ 4.0A

PP3V3_S5

PAGE 78

PP3V3_S3

BT

TPM

ENET

SB_GPIO HARD DRIVE

AUDIO CODEC

FANS

FW SPI_BOOTROM

SB LCD

SMC

ENET

2.5V @ 0.9A PAGE 82

PP5V_S5_AUDIO

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

3 97

A

051-7199

Power Block Diagram

Preliminary

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_5_ITEM TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_ALT_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

USE BOM OPTION MEROM FOR MEROM PROCESSOR

ALTERNATE PARTS

MECHANICAL PARTS

341S1859 IC EFI BOOTROM DEV M50

338S0274

(335S0382)

COMMON

OPS REQUESTED QUAL PARTS

337S3280

(335S0384)

M50 1.83G LOW SPEED CPU (D0)

337S3242 M38 CPU(C0)

BARCODE LABEL, M50A

MEROM

[EEE:WJ9]

825-6447 CRITICAL

1

378S0140

LED601,LED602,LED603

378S0141

U7500

353S1465 353S1461

CPU VREG, OLD DIE,SCREENED PART

MEROM

M50 MEROM CPU

1

CPU

CRITICAL337S3386

CVR1

MYLAR BLACK LED CVR, M50

725-0720

1

CRITICAL

HS1

603-9186

1

SUBASSY, M50 CPU HEATSINK

SUBASSY, M50 NB HEATSINK

HS2

CRITICAL

1

603-9187

725-0668 CRITICAL

1

MYLAR WASHER

WASH1

3

C6505,C6504,C6602

PCAP,120UF,16V,20%,ELEC

124-0359 CRITICAL

CHOKE,COMMON_MODE,165OHM,4PIN

1

CRITICAL

L9703

155S0295051-7199 SCH1

PCB,SCHEM,MLB,M50

1

PCB,FAB,MLB,M50

MLB1820-1960

U6301

CRITICAL

1

341T0042

EFI ROM,M50A

124-0338 124-0333

C7953,C7954

FOR SUPPLY

U5940

353S1278 SMC VREF353S1381

C625126S0092126S0091

FACTORY SHORTAGE

Table Items

051-7199

974

A

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

IC,88E8053,GIGABIT ENET XCVR,64P QFN,NO

338S0270

1

CRITICAL

U4101

U7500

IC,CPU VREG,IMVP,TWO PHASE

1

CRITICAL353S1461

IC,CPU-SKT,479BGA

1

CRITICAL

J0700

511S0025

IC,CY28445-5,CLK GEN,68PIN QFN

359S0101 CRITICAL

U3301

1

BAT,COIN,3V,220MAH,CR2032

742-0048 BT2600 CRITICAL

1

IC,SB,652BGA

343S0385 CRITICAL

1

U2100

341S1797

1

U4102

CRITICAL

IC,ENET LAN ROM

341T0022

1

IC,SMC,M50 CRITICAL

U5800

IC,945GT,NORTHBRIDGE

CRITICAL

1

U1200

338S0298

TPM

CRITICAL341S1789

1

U6700

IC,TPM,TSSOP,28P

338S0279 CRITICAL

1

U4400

IC,FW32306,1394A LINK,TQFP

Preliminary

PP

PP PP PP

PP PP

PP

PP PP PP

PP

PP PP

PP

PP PP

PP PP PP

PP

PP PP

PP

PP PP

PP

PP PP

PP

PP PP

PP PP PP PP PP

PP

PP PP PP

PP

A

PP

A

IN IN IN IN IN

IN IN

IN

IN IN

IN IN IN IN IN

PP

IN

IN IN

IN

PP

PP PP PP

PP

PP PP

PP

PP PP

IN IN IN IN

PP PP

PP

PP PP

PP

PP PP PP

PP

PP PP PP

PP PP

PP

PP PP

PP

PP PP PP

PP

PP PP PP PP

PP

PP PP PP

PP

PP PP PP

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SPARE USB PORT

INVERTER DOES NOT USE THIS SIGNAL

LAYOUT NOTE: PLACE NEAR U2100

MISC GROUND VIAS

PLACE NEAR R1210 AND R1211

8 TESTPOINTS

LAYOUT NOTE: PLACE NEAR J0700

PLACE NEAR R0705 AND R0706

LAYOUT NOTE: PLACE NEAR U4101LAYOUT NOTE: PLACE NEAR U1200

THIS TEST POINT USED TO CONNECT THE SHAPES AROUND SLOT ON TOP AND BOTTOM OF THE BOARD.

PLACE NEAR R2800 AND R2801

PP600

1

OMIT

SM

P4MM

PP607

1

SM

OMIT

P4MM

PP697

1

SM

OMIT

P4MM

PP698

1

SM

OMIT

P4MM

PP699

1

P4MM

OMIT

SM

PP6A0

1

SM

OMIT

P4MM

PP6A1

1

P4MM

OMIT

SM

PP6A3

1

P4MM

OMIT

SM

PP6A2

1

SM

OMIT

P4MM

PP6A4

1

OMIT

P4MM

SM

PP6A5

1

SM

OMIT

P4MM

PP6A6

1

SM

OMIT

P4MM

PP608

1

SM

P4MM

OMIT

PP6A7

1

P4MM

OMIT

SM

PP6A8

1

SM

OMIT

P4MM

PP6B1

1

P4MM

OMIT

SM

PP6A9

1

P4MM

OMIT

SM

PP6B0

1

SM

OMIT

P4MM

PP6B2

1

SM

OMIT

P4MM

PP6B3

1

P4MM

OMIT

SM

PP6B4

1

SM

OMIT

P4MM

PP6B6

1

OMIT

P4MM

SM

PP6B5

1

P4MM

SM

OMIT

PP609

1

SM

OMIT

P4MM

PP6B7

1

SM

OMIT

P4MM

PP6B8

1

SM

OMIT

P4MM

PP6C1

1

P4MM

OMIT

SM

PP6B9

1

P4MM

OMIT

SM

PP6C0

1

SM

OMIT

P4MM

PP6C2

1

SM

OMIT

P4MM

PP6C3

1

P4MM

OMIT

SM

PP6C5

1

OMIT

SM

P4MM

PP6C4

1

SM

OMIT

P4MM

PP6C6

1

SM

OMIT

P4MM

PP610

1

P4MM

OMIT

SM

PP6C8

1

SM

OMIT

P4MM

PP6C7

1

OMIT

P4MM

SM

PP6D0

1

OMIT

P4MM

SM

PP6D1

1

P4MM

OMIT

SM

PP6D3

1

P4MM

OMIT

SM

PP6D2

1

SM

OMIT

P4MM

PP6D4

1

SM

OMIT

P4MM

PP6D5

1

SM

OMIT

P4MM

PP6D6

1

SM

OMIT

P4MM

PP611

1

SM

OMIT

P4MM

PP6D8

1

SM

OMIT

P4MM

PP6D7

1

SM

OMIT

P4MM

PP6D9

1

SM

OMIT

P4MM

PP6E0

1

P4MM

OMIT

SM

PP612

1

P4MM

OMIT

SM

PP613

1

SM

P4MM

OMIT

PP614

1

P4MM

OMIT

SM

PP615

1

OMIT

P4MM

SM

PP616

1

P4MM

OMIT

SM

PP601

1

OMIT

SM

P4MM

PP617

1

SM

OMIT

P4MM

PP618

1

OMIT

SM

P4MM

PP619

1

SM

OMIT

P4MM

PP632

1

OMIT

SM

P4MM

PP631

1

OMIT

SM

P4MM

PP6E1

1

P4MM

OMIT

SM

PP634

1

P4MM

SM

OMIT

PP1200

1

SM-TP50-TOP

PP1201

1

SM-TP50-TOP

PP1202

1

SM-TP50-TOP

PP700

1

SM-TP50-TOP

PP702

1

SM-TP50-TOP

PP2800

1

SM-TP50-TOP

PP633

1

SM

OMIT

P4MM

PP2801

1

SM-TP50-TOP

PP2802

1

SM-TP50-TOP

60 59 58

60 58

11

7

11

7

11

7

11

7

11

7

60 59 58

83 80 79

78 77 76 66 65 59 26

6

83 82 80 79 59

6

83 82 80 79 78 77 76

6

83 79

6

76 75

6

PP635

1

SM

OMIT

P4MM

26 25 24 21

59

26

ZH500

1

HOLE-VIA

ZH501

1

HOLE-VIA

ZH502

1

HOLE-VIA

ZH503

1

HOLE-VIA

ZH504

1

HOLE-VIA

ZH505

1

HOLE-VIA

ZH506

1

HOLE-VIA

ZH507

1

HOLE-VIA

PP602

1

SM

OMIT

P4MM

PP636

1

P4MM

OMIT

SM

ZH508

1

HOLE-VIA

ZH509

1

HOLE-VIA

ZH510

1

HOLE-VIA

ZH511

1

HOLE-VIA

ZH512

1

HOLE-VIA

PP637

1

SM

P4MM

OMIT

ZH513

1

HOLE-VIA

ZH514

1

HOLE-VIA

ZH515

1

HOLE-VIA

ZH516

1

HOLE-VIA

PP638

1

P4MM

OMIT

SM

ZH517

1

HOLE-VIA

ZH518

1

HOLE-VIA

ZH519

1

HOLE-VIA

ZH520

1

HOLE-VIA

ZH521

1

HOLE-VIA

PP640

1

P4MM

SM

OMIT

ZH522

1

HOLE-VIA

ZH523

1

HOLE-VIA

ZH524

1

HOLE-VIA

ZH525

1

HOLE-VIA

ZH526

1

HOLE-VIA

PP639

1

SM

OMIT

P4MM

ZH527

1

HOLE-VIA

ZH528

1

HOLE-VIA

ZH529

1

HOLE-VIA

PP4100

1

SM

P4MM

OMIT

PP4101

1

P4MM

OMIT

SM

PP641

1

SM

OMIT

P4MM

PP5E1

1

P4MM

OMIT

SM

PP5E2

1

SM

OMIT

P4MM

58 22

34

29

PP669

1

P4MM

OMIT

SM

PP670

1

P4MM

SM

OMIT

PP671

1

OMIT

P4MM

SM

PP642

1

P4MM

OMIT

SM

PP672

1

OMIT

SM

P4MM

PP643

1

SM

OMIT

P4MM

PP645

1

SM

OMIT

P4MM

PP644

1

P4MM

OMIT

SM

ZH599

1

HOLE-VIA

PP603

1

SM

P4MM

OMIT

PP648

1

P4MM

OMIT

SM

PP646

1

P4MM

OMIT

SM

PP647

1

SM

P4MM

OMIT

PP650

1

P4MM

OMIT

SM

PP649

1

SM

OMIT

P4MM

PP652

1

SM

P4MM

OMIT

PP651

1

SM

OMIT

P4MM

PP653

1

SM

OMIT

P4MM

PP654

1

SM

OMIT

P4MM

PP655

1

P4MM

OMIT

SM

PP620

1

SM

OMIT

P4MM

PP657

1

P4MM

OMIT

SM

PP656

1

P4MM

SM

OMIT

PP658

1

SM

OMIT

P4MM

PP660

1

SM

OMIT

P4MM

PP659

1

P4MM

OMIT

SM

PP662

1

SM

OMIT

P4MM

PP661

1

P4MM

SM

OMIT

PP663

1

P4MM

OMIT

SM

PP623

1

SM

OMIT

P4MM

PP622

1

SM

OMIT

P4MM

PP621

1

OMIT

SM

P4MM

PP625

1

OMIT

SM

P4MM

PP624

1

SM

P4MM

OMIT

PP626

1

SM

OMIT

P4MM

PP627

1

SM

P4MM

OMIT

PP628

1

SM

P4MM

OMIT

PP629

1

P4MM

OMIT

SM

PP630

1

SM

OMIT

P4MM

PP664

1

SM

OMIT

P4MM

PP666

1

SM

OMIT

P4MM

PP665

1

P4MM

OMIT

SM

PP604

1

P4MM

OMIT

SM

PP667

1

P4MM

OMIT

SM

PP668

1

SM

OMIT

P4MM

PP673

1

SM

OMIT

P4MM

PP674

1

P4MM

OMIT

SM

PP675

1

P4MM

OMIT

SM

PP677

1

SM

P4MM

OMIT

PP605

1

OMIT

P4MM

SM

PP676

1

P4MM

OMIT

SM

PP678

1

OMIT

SM

P4MM

PP679

1

SM

OMIT

P4MM

PP680

1

P4MM

OMIT

SM

PP682

1

P4MM

OMIT

SM

PP681

1

SM

OMIT

P4MM

PP683

1

SM

OMIT

P4MM

PP684

1

P4MM

OMIT

SM

PP685

1

SM

OMIT

P4MM

PP686

1

SM

OMIT

P4MM

PP606

1

OMIT

P4MM

SM

PP688

1

SM

OMIT

P4MM

PP687

1

P4MM

OMIT

SM

PP689

1

P4MM

OMIT

SM

PP690

1

SM

OMIT

P4MM

PP691

1

P4MM

OMIT

SM

PP693

1

P4MM

SM

OMIT

PP692

1

SM

OMIT

P4MM

PP694

1

SM

OMIT

P4MM

PP695

1

P4MM

OMIT

SM

PP696

1

OMIT

P4MM

SM

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

A

5 97

051-7199

FUNC TEST 1 OF 2

FUNC_TEST=TRUE

=PP1V8_S3_MEM

TP_SLOT

FSB_ADSTB_L<1>

FSB_DSTBP_L<0>

FSB_D_L<41>

FSB_DBSY_L

VR_PWRGOOD_DELAY

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<4>

NO_TEST=TRUE

PEG_R2D_C_N<5>

PEG_R2D_C_N<4>

PEG_R2D_C_N<10>

PEG_D2R_N<4>

PEG_D2R_N<7>

PEG_D2R_N<14>

MAKE_BASE=TRUE

TP_USB_F_N

MAKE_BASE=TRUE

TP_USB_F_P

=PP1V05_S0_FSB_NB

FSB_D_L<59>

FSB_DSTBP_L<2>

NB_RST_IN_L_R

FSB_ADSTB_L<0>

FUNC_TEST=TRUE

SW_RST_BTN_L

FUNC_TEST=TRUE

XDP_TDO

DMI_N2S_N<0>

PM_CLKRUN_L

FUNC_TEST=TRUE

PP3V3_S5_SB_RTC

FUNC_TEST=TRUE

POWER_BUTTON_L

FUNC_TEST=TRUE

SMC_MANUAL_RST_L

FUNC_TEST=TRUE

SMC_RX_L

FUNC_TEST=TRUE

XDP_TRST_L

FUNC_TEST=TRUE

XDP_TMS

FUNC_TEST=TRUE

XDP_TDI

FUNC_TEST=TRUE

XDP_TCK

FUNC_TEST=TRUE

PPVCORE_CPU

FUNC_TEST=TRUE

PP3V3_S5

FUNC_TEST=TRUE

PP5V_S5

FUNC_TEST=TRUE

PP1V8_S3

FUNC_TEST=TRUE

SMC_TX_L

FUNC_TEST=TRUE

SMC_TDO

FUNC_TEST=TRUE

SMC_TDI

FUNC_TEST=TRUE

SMC_TCK

FSB_DSTBN_L<3>

FSB_DINV_L<2> FSB_D_L<59>

FSB_DINV_L<3>

FSB_DSTBP_L<3>

FSB_LOCK_L FSB_CPURST_L

FSB_HITM_L

FSB_HIT_L

FSB_BNR_L

CPU_IGNNE_L

FSB_DINV_L<3>

FSB_DSTBP_L<3>

FSB_D_L<41> FSB_DSTBN_L<2>

FSB_DSTBN_L<1>

FSB_REQ_L<2>

FSB_DPWR_L FSB_REQ_L<0>

SB_CLK100M_SATA_P

FSB_LOCK_L

FSB_A_L<6>

FSB_A_L<27>

FSB_ADSTB_L<0>

FSB_CLK_CPU_N

CPU_SMI_L

FSB_DINV_L<1>

FSB_CLK_NB_N

FSB_DINV_L<2>

FSB_DSTBN_L<0>

FSB_A_L<27>

FSB_DSTBP_L<1>

NB_FSB_VREF

MEM_VREF

IDE_PDIORDY

PCI_CLK_SB

IDE_PDD<9>

SB_CLK100M_SATA_N

IDE_PDIOR_L

FSB_BREQ0_L

ENET_CLK100M_PCIE_N

ENET_CLK100M_PCIE_P

PCIE_A_D2R_N

PCIE_A_D2R_P

PCIE_B_D2R_P PCIE_B_D2R_N

DMI_N2S_P<0>

SB_CLK100M_DMI_P SB_CLK100M_DMI_N

PM_SYSRST_L

SB_CLK14P3M_TIMER SB_CLK48M_USBCTLR

FSB_ADSTB_L<1>

FSB_A_L<6>

FSB_CLK_NB_P

FSB_REQ_L<4>

FSB_DSTBN_L<3>

FSB_D_L<0> FSB_DSTBN_L<0>

FSB_DSTBP_L<0> FSB_DINV_L<0>

NO_TEST=TRUE

SPI_ARB

NO_TEST=TRUE

TP_PCI_CLK_SPARE

NO_TEST=TRUE

TP_MEM_B_A<14>

FUNC_TEST=TRUE

PP12V_S5

FSB_D_L<16>

FSB_DINV_L<0> FSB_D_L<16> FSB_DSTBN_L<1> FSB_DSTBP_L<1> FSB_DINV_L<1>

FSB_DSTBN_L<2> FSB_DSTBP_L<2>

CPU_INIT_L CPU_A20M_L

CPU_STPCLK_L CPU_INTR

FSB_CLK_CPU_P

CPU_NMI

NB_CLK_DREFSSCLKIN_N

DMI_S2N_N<0> DMI_S2N_P<0>

MEM_VREF_NB_0 MEM_VREF_NB_1

MEM_A_DQ<14>

MEM_A_DQ<7>

MEM_A_DQ<54>

MEM_A_DQ<47>

MEM_A_DQ<59> MEM_A_DQS_P<0> MEM_A_DQS_N<0>

MEM_A_DQS_N<1>

MEM_A_DQS_P<1>

MEM_A_DQS_P<2> MEM_A_DQS_N<2> MEM_A_DQS_P<3>

MEM_A_DQS_P<4>

MEM_A_DQS_N<3>

MEM_A_DQS_N<4> MEM_A_DQS_P<5> MEM_A_DQS_N<5>

MEM_A_DQS_N<6>

MEM_A_DQS_P<6>

MEM_A_DQS_P<7> MEM_A_DQS_N<7>

MEM_B_DQ<6>

MEM_B_DQ<23>

MEM_B_DQ<8>

MEM_B_DQ<25> MEM_B_DQ<38> MEM_B_DQ<44>

MEM_B_DQ<62>

MEM_B_DQ<48>

MEM_B_DQS_P<0> MEM_B_DQS_N<0> MEM_B_DQS_P<1> MEM_B_DQS_N<1> MEM_B_DQS_P<2> MEM_B_DQS_N<2> MEM_B_DQS_P<3> MEM_B_DQS_N<3> MEM_B_DQS_P<4> MEM_B_DQS_N<4> MEM_B_DQS_P<5> MEM_B_DQS_N<5> MEM_B_DQS_P<6> MEM_B_DQS_N<6> MEM_B_DQS_P<7> MEM_B_DQS_N<7>

NB_CLK100M_GCLKIN_P NB_CLK100M_GCLKIN_N

NB_CLK_DREFCLKIN_N

NB_CLK_DREFCLKIN_P

FSB_REQ_L<3>

FSB_REQ_L<1>

NB_CLK_DREFSSCLKIN_P

FUNC_TEST=TRUE

SMC_TMS

FUNC_TEST=TRUE

SMC_TRST_L

=PP1V05_S0_CPU

USB_F_P

USB_F_N

LVDS_BKLTEN

MAKE_BASE=TRUE

TP_LVDS_BKLTEN

FSB_D_L<0>

MEM_A_DQ<16> MEM_A_DQ<25> MEM_A_DQ<39>

MAKE_BASE=TRUE

NC_PEG_D2R_N<10>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<5>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<4>

NO_TEST=TRUE

NC_PEG_D2R_N<14>

MAKE_BASE=TRUE

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<7>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<6>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<3>

NO_TEST=TRUE

PEG_D2R_N<15>

PEG_D2R_N<13>

PEG_D2R_N<12>

PEG_D2R_N<11>

PEG_D2R_N<10>

PEG_D2R_N<9>

PEG_D2R_N<8>

PEG_D2R_N<6>

PEG_D2R_N<5>

PEG_D2R_N<3>

PEG_R2D_C_N<15>

PEG_R2D_C_N<13> PEG_R2D_C_N<14>

PEG_R2D_C_N<11> PEG_R2D_C_N<12>

PEG_R2D_C_N<8> PEG_R2D_C_N<9>

PEG_R2D_C_N<6> PEG_R2D_C_N<7>

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<5>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<7>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<6>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<10>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<9>

NO_TEST=TRUE

NC_PEG_R2D_C_N<12>

MAKE_BASE=TRUE

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<11>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<14>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<13>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<15>

NO_TEST=TRUE

TP_MEM_B_A<15>

NC_PEG_D2R_N<11>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_D2R_N<15>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_D2R_N<9>

MAKE_BASE=TRUE

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<8>

NO_TEST=TRUE

NC_PEG_D2R_N<12>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_D2R_N<13>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_R2D_C_N<8>

MAKE_BASE=TRUE

NO_TEST=TRUE

67

11

60

9

29

12

75

19

12

58

12

58

12

8

12

28

7

12

26

12

7

22

44

7

11

12

21

7

12

34

7

34

21

7

34

7

29

38

34

38

34

38

12

41

54

22

34

26

34

7

34

12

7

21

34

21

34

22

19

28

29

34

12

34

7

28

6

5

7

14

13

6

5

14

5

14

23

5

7

5

7

21

5

7

5

12

5

12

28

21

22

21

7

34

22

14

22

23

5

12

7

5

7

14

15

14

7

14

6

22

13

5

15

13

Preliminary

125

OUT

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)

SILKSCREEN:3

SILKSCREEN:RUN

SILKSCREEN:1

AC/DC CONN

"S5" RAILS

GND RAILS

SILKSCREEN:2

ONLY ON IN RUN

ON IN RUN AND SLEEP

"S0" RAILS

USING S3 TO DRIVE S0 OK IN THIS CASE

"S3" RAILS

CHASSIS GND

HDD POWER CONN

XW601

1 2

SM

OMIT

XW602

1 2

SM

OMIT

U600

2

7 1

14

3

CRITICAL

TSSOP

74LC125

C600

1

2

10V

20%

402

CERM

0.1UF

LED601

1

2

GREEN-3.6MCD

2.0X1.25MM-SM

XW604

1 2

SM

OMIT

XW605

1 2

SM

OMIT

ZH601

1

OMIT

4P25R3P5

ZH602

1

4P25R3P5

OMIT

ZH603

1

4P25R3P5

OMIT

C601

1

2

402

16V CERM

0.01UF

20%

NOSTUFF

C602

1

2

20% 16V

402

CERM

0.01UF

NOSTUFF

C603

1

2

402

20% 16V CERM

0.01UF

NOSTUFF

R602

1

2

330

402

1/16W

5% MF-LF

R603

1 2

NOSTUFF

0

1/16W MF-LF

402

5%

ZH604

1

4P25R3P5

OMIT

C604

1

2

16V CERM

20%

402

NOSTUFF

0.01UF

ZH606

1

OMIT

160R138

U600

5

7 4

14

6

CRITICAL

TSSOP

74LC125

U600

9

7

10

14

8

CRITICAL

74LC125

TSSOP

U600

12

7

13

14

11

TSSOP

CRITICAL

74LC125

R612

1 2

402

5%681/16W

MF-LF

R611

1 2

402

5%

68

MF-LF

1/16W

R614

1 2

1/16W

5%

402

MF-LF

68

R615

1 2

TPM

402

5%

68

MF-LF

1/16W

R616

1 2

5%

402

68

1/16W MF-LF

R617

1 2

402

5%

68

MF-LF

1/16W

R618

1 2

5%

1/16W

68

402

MF-LF

R619

1 2

1/16W MF-LF

68

5%

402

R600

1

2

330

402

1/16W

5% MF-LF

LED602

1

2

GREEN-3.6MCD

2.0X1.25MM-SM

R605

1

2

330

5%

402

1/16W

DEVELOPMENT

MF-LF

LED600

1

2

DEVELOPMENT

2.0X1.25MM-SM

GREEN-3.6MCD

I632

C621

1

2

CERM

25V

20%

603

0.1UF

NOSTUFF

C620

1

2

0.1UF

CERM

25V

20%

603

C624

1

2

16V CERM 1210

10%

10UF

C622

1

2

10V 805-2

20%

NOSTUFF

CERM

10UF

C623

1

2

805-2

20%

10UF

10V CERM

LED603

1

2

2.0X1.25MM-SM

GREEN-3.6MCD

R601

1

2

5%

330

402

1/16W MF-LF

J602

1 2 3 4 5

M-ST-SM

88737-0553

CRITICAL

C625

1

2

CRITICAL

100UF

20% 16V ELEC

6.3X5.5-SM

J601

1 2 3 4 5

39-30-3058

CRITICAL

M-RT-TH2

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

A

976

051-7199

Power Conn / Alias

PP12V_S5_AC_DC

POWER_GOOD

=PP1V5_S0_SB_VCCSATAPLL

=PP5V_S0_SATA

ZH702P1

=PP12V_S0_SATA

=PP3V3_S0_SATA

=PP2V5_S0_NB_CRTDAC

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE VOLTAGE=3.3V

PP2V5_S0

=PP2V5_S0_NB_VCC_TXLVDS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE VOLTAGE=3.3V

PP1V8_S0

MIN_NECK_WIDTH=0.15MM

VOLTAGE=0

MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6MM

PP1V5_S0

=PP1V5_S0_SB_VCC1_5_A

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP1V5_S0_NB

=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB_PCIE

=PPVCORE_S0_NB

=PP1V5_S0_NB_VCCD_HMPLL

=PP1V5_S0_NB_VCCD_LVDS

=PP2V5_S0_NB_VCCA_3GBG

ZH701P1

VOLTAGE=3.3V

MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

PP3V3_S3

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

VOLTAGE=1.8V

MAKE_BASE=TRUE

PP1V8_S3

=PP1V8_S0_MEMVTT

=PP1V5_S0_SB

=PP1V05_S0_CPU

GPU_PWM_RST_L

=PP0V9_S0_MEMVTT_LDO =PP0V9_S0_MEM_TERM

ITS_ALIVE

PP3V3_S3

ITS_PLUGGED_IN

PP3V3_S5

ZH703P1

ZH702P1

GND_CHASSIS_IO_RIGHT

VOLTAGE=0 MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

GND_CHASSIS_RJ45

GND_CHASSIS_VGA

GND_CHASSIS_FIREWIRE

GND_CHASSIS_IO_LEFT

MAKE_BASE=TRUE VOLTAGE=0 MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

GND_CHASSIS_USB

GND_AUDIO_SPKRAMP

GND_AUDIO

DEBUG_RST_L

AIRPORT_RST_L

TPM_LRESET_L

ENET_RST_L

TMDS_RESET_L

NB_RST_IN_L

SMC_LRESET_L

U600_11

U600_8

U600_3

VOLTAGE=0.9V MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE MIN_LINE_WIDTH=0.3MM

PP0V9_S0

MIN_NECK_WIDTH=0.15MM

VOLTAGE=1.25V

MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6MM

PPVCORE_CPU

U600_6

PP3V3_S5

GND_CHASSIS_AUDIO_EXTERNAL

SYS_POWERFAIL_L

=PP1V5_S0_NB_TVDAC

=PP5V_S3_USB

=PP1V2_S3_LAN

MAKE_BASE=TRUE VOLTAGE=12V

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

PP12V_S0

=PP12V_S0_AUDIO_SPKRAMP

=PP12V_S0_SATA

=PP12V_INVERTER

=PP5V_S0_TMDS

PP3V3_S0

ITS_RUNNING

LCD_SHOULD_ON

PP3V3_LCD_CONN

=PPVCORE_S0_CPU

=PP5V_S0_NB_TVDAC

=PP1V05_S0_FSB_NB =PP1V05_S0_NB_VTT

=PP1V05_S0_SB_CPU_IO

=PP3V3_S3_TPM

=PPVCORE_S0_SB

=PP1V5_S0_NB_VCCAUX =PP1V5_S0_NB_PLL

=PP3V3_S5_SB_PM

=PP3V3_S5_FW

MAKE_BASE=TRUE

PP5V_S5_AUDIO

=PP5V_S5_AUDIO

=PP1V5_S0_NB_VCCD_LVDS

=PP5V_S0_NBISENSE

VOLTAGE=1.8V

MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.2MM

PP1V2_S3

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V8_S3_MEM_NB

ZH704P1

GND_CHASSIS_AUDIO_INTERNAL

GND_CHASSIS_ODD_TEMP

POWER_GOOD

=PP3V3_S3_ENET

=PP1V8_S3_MEM

=PP1V8_S3_1V2_LDO

=PP3V3_S3_BT

VOLTAGE=5V MIN_NECK_WIDTH=0.25MM

MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6MM

PP5V_S3

=PP5V_S0_MEMVTT

=PP3V3_S5_SB =PP3V3_S5_SB_USB

=PP3V3_S5_SB_VCCSUS3_3 =PP3V3_S5_SB_VCCSUS3_3_USB =PP3V3_S5_SB_3V3_1V5_VCCSUSHDA =PP3V3_S5_SB_IO

=PP3V3_S5_2V5_LDO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=3.3V

MAKE_BASE=TRUE

PP3V3_S5

=PP5V_S3_BNDI

=PP5V_S5_AUDIO_LDO

=PP5V_S5_SB

=PP3V3_S5_LCD

=PP3V3_S5_ROM

=PP3V3_S5_DEBUG

=PP3V3_S5_SMC

=PP12V_S5_FW =PP12V_S5_CPU

MAKE_BASE=TRUE VOLTAGE=1.05V MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.15MM

PP1V05_S0

VOLTAGE=0

GND_CHASSIS_BNDI

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM

VOLTAGE=12V MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.60MM

MAKE_BASE=TRUE

PP12V_S5

=PP2V5_S0_NB_VCC_TXLVDS

=PP2V5_S0_NB_VCCSYNC

=PP2V5_S0_NB_DISP_PLL

=PP2V5_S0_TMDS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

PP5V_S5

MAKE_BASE=TRUE VOLTAGE=5V

=PP2V5_S0_NB_VCCA_LVDS

MIN_LINE_WIDTH=0.6MM

VOLTAGE=3.3V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15MM

PP3V3_S0

=PP3V3_S0_SATA =PP3V3_S0_LCD =PP3V3_S0_NB_VCC_HV

=PP3V3_S0_SB_GPIO

=PP3V3_S0_SB

=PP3V3_S0_SB_VCC3_3 =PP3V3_S0_SB_VCC3_3_PCI =PP3V3_S0_SB_VCC3_3_IDE =PP3V3_S0_SB_PCI =PP3V3_S0_SB_PM =PP3V3_S0_PATA =PP3V3_S0_FAN

=PP3V3_S0_ODD_TSENS

=PP3V3_S0_HD_TSENS

=PP3V3_S0_SB_3V3_1V5_VCCHDA =PP3V3_S0_TPM =PPSPD_S0_MEM =PP3V3_S0_CK410 =PP3V3_S0_IMVP =PP3V3_S0_AUDIO =PP3V3_S0_PCI

=PP3V3_S0_AIRPORT

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_TMDS

=PP3V3_S0_NB

PP4V5_S0_AUDIO_ANALOG

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

MAKE_BASE=TRUE

PP12V_S0_AUDIO_SPKRAMP

=PP12V_S0_FAN

=PP4V5_S0_AUDIO_ANALOG

=PP5V_S0_SB =PP5V_S0_PATA

VOLTAGE=5V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

PP5V_S0

=PP5V_S0_DEBUG =PP5V_S0_SATA

=PP1V8_S0_TMDS

=PP1V5_S0_AIRPORT

=PP1V5_S0_SB_VCCUSBPLL

=PP1V5_S0_NB_3GPLL

=PP1V5_S0_CPU

PLT_RST_L

83

80

79

78

94

78

94

77

83

77

83

76

82

76

66

61

66

80

83

61

11

65

59

65

79

82

59

83

9

83 59

59

41

59

78

80

41

74

19

59

83

8

59 26

76

26

82

26

76

19

25

46

19

43

29

26 26

77

19

79

26

27

66

73

97

20

25

17

25

19

17

19

53

79

7

30

53

6

74

75

6

78

19

83

10

9

12

19

24

25

23

45

17

25

16

42

28

83

25

27

6

59

80

76

17

59

19

10

19

23

25

65

25

29

72

25

96

19

66

83

25

76

6

24

6

19

83

6

83

80

24

19

6

13

16

17

6

17

6

5

31

25

5

94

31

29

6 5

6

43

97

46

47

72

74

60

53

67

42

95

14

58

5

73

76

6

47

42

76

72

6

94

97

6

94

8

19

5

17

21

67

24

19

11

44

68

6

80

79

24

14

73

66

6

41

5

79

47

59

31

23

22

24

22

78

5

47

82

25

94

63

60

58

46

76

34

47

5

6

19

95

5

17

6

94

17

21

22

24

26

38

59

66

24

67

28

33

75

68

44

53

24

95

14

83

65

68

25

38

75

60

6

95

53

24

19

8

22

Preliminary

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IN

IN IN

IN

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

OUT

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

OUT

IN

IN IN

IN

IN IN

OUT

IN IN

IN

IN IN

IN

OUT

IN

A3* A4* A5* A6*

A8*

A10* A11* A12* A13*

A16*

A15*

A14*

ADSTB0*

REQ2*

REQ0* REQ1*

REQ3* REQ4*

A17* A18* A19* A20* A21*

A23*

A22*

A24* A25* A26*

A29*

A28*

A27*

A31*

A30*

ADSTB1*

A20M* FERR* IGNNE*

STPCLK*

LINT1

LINT0

SMI*

RSVD10

RSVD9

RSVD5

RSVD4

RSVD3

RSVD2

RSVD1

RSVD8

RSVD7

RSVD6

RSVD11

ADS* BNR*

BPRI*

DEFER*

DRDY* DBSY*

BR0*

IERR* INIT*

LOCK*

RESET*

RS0* RS1* RS2*

TRDY*

HIT*

HITM*

BPM0*

BPM2*

BPM1*

BPM3* PRDY* PREQ*

TCK TDI TDO TMS

TRST*

DBR*

PROCHOT*

THERMDA THERMDC

THERMTRIP*

RSVD12

RSVD13

RSVD16

RSVD19

RSVD18

RSVD17

RSVD20

BCLK0 BCLK1

RSVD15

RSVD14

A7*

A9*

ADDR GROUP0

XDP/ITP SIGNALS

CONTROL

ADDR GROUP1

RESERVED

HCLK

THERM

(1 OF 4)

PSI*

SLP*

PWRGOOD

DPRSTP*

DPSLP*

DPWR*

COMP2 COMP3

COMP1

COMP0

DSTBP3*

DSTBN3*

DINV3*

D63*

D62*

D61*

D60*

D59*

D58*

D57*

D56*

D55*

D54*

D52* D53*

D51*

D50*

D49*

D48*

DINV2*

DSTBN2*

D47*

DSTBP2*

D45* D46*

D44*

D43*

D42*

D41*

D40*

D39*

D38*

D37*

D36*

D35*

D34*

D33*

D32*

BSEL2

DSTBN1*

BSEL0 BSEL1

TEST2

GTLREF

DINV1*

DSTBP1*

D31*

D30*

D29*

D26* D27* D28*

D24* D25*

D23*

D21* D22*

D20*

D19*

D18*

D16* D17*

DINV0*

DSTBP0*

DSTBN0*

D15*

D14*

D13*

D12*

D11*

D10*

D9*

D8*

D7*

D6*

D5*

D4*

D3*

D2*

D1*

D0*

TEST1

NC

(2 OF 4)

MISC

DATA GRP0

DATA GRP2

DATA GRP1

DATA GRP3

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NO STUFF R0701 IF USING ITP

TP_CPU_M_TEST3

SPARE[7-0],HFPLL:

ROUTE TO TP VIA AND PLACE GND VIA W/IN 1000 MILS

TP_CPU_M_TEST4

CPU SCH AND PCB

LAYOUT NOTE: 0.5" MAX LENGTH

PIN ACTUALLY DRIVEN BY ITP

DUMMY PIN

NOTE:

STUB)

WITHOUT T-ING (NO

ICH6-M AND GMCH

PM_THRMTRIP# SHOULD CONNECT TO

PLACE TESTPOINT ON

0.1" AWAY

SYMBOL NEED TO CHECK

FSB_IERR# WITH A GND

ON ITP SIGNALS?

NO SPACE FOR ITP

CONNECTOR, NEED TERM

CPU_PROCHOT_L TO SMC

AND CPU VR TO INFORM CPU IS HOT

TRACE LENGTH SHORTER THAN 0.5".

COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE

COMP1,3 CONNECT WITH ZO=55OHM, MAKE

LAYOUT NOTE:

R0703

1

2

1%

54.9

MF-LF 402

1/16W

R0704

1

2

MF-LF 402

5% 1/16W

68

R0705

1

2

1/16W

1%

402

MF-LF

1K

R0706

1

2

1/16W

1%

402

MF-LF

2.0K

R0720

1 2

54.9

MF-LF

402

1%

1/16W

R0721

1 2

1%

54.9

MF-LF

402

1/16W

R0722

1 2

54.9

MF-LF

402

1%

1/16W

R0719

1 2

1%

402

54.9

R0718

1 2

27.4

R0717

1 2

1%

402

54.9

R0716

1 2

27.4

402

R0730

1 2

0

402

NOSTUFF

R0712

1

2

1K

MF-LF 402

5% 1/16W

NOSTUFF

R0707

1

2

MF-LF 402

5% 1/16W

51

J0700

N3 P5 P2 L1 P4 P1 R1

Y2 U5 R3 W6

A6

U4 Y5 U2 R4 T5 T3 W3 W5 Y4

J4

W2 Y1

L4 M3 K5 M1 N2 J1

H1

L2

V4

A22 A21

E2

AD4 AD3 AD1 AC4

G5

F1

C20

E1

H5 F21

A5

G6 E4

D20

C4

B3

C6 B4

H4

AC2 AC1

D21

K3 H2 K2 J3 L5

B1 F3 F4 G3

AA1

C3

B25

T22

D2 F6 D3 C1 AF1 D22 C23

AA4

C24

AB2 AA3

M4 N5 T2 V3 B2

A3

D5

AC5 AA6 AB3

A24 A25

C7

AB5

G2

AB6

BGA

YONAH-SKT

CPU

OMIT

J0700

B22 B23 C21

R26 U26 U1 V1

E22 F24

J24 J23 H26 F26 K22 H25

N22 K25 P26 R23

E26

L25 L22 L23 M23 P25 P22 P23 T24 R24 L26

H22

T25 N24

AA23 AB24 V24 V26 W25 U23 U25 U22

F23

AB25 W22 Y23 AA26 Y26 Y22 AC26 AA24

AC22 AC23

G25

AB22 AA21 AB21 AC25 AD20 AE22 AF23 AD24 AE21 AD21

E25

AE25 AF25 AF22 AF26

E23 K24 G24

J26

M26

V23

AC20

E5 B5 D24

H23

M24

W24

AD23

G22

N25

Y25

AE24

AD26

A2

AE6

D6 D7

C26

D25

BGA

CPU

YONAH-SKT

OMIT

R0702

1

2

1%

54.9

1/16W MF-LF 402

R0701

1

2

1/16W

1%

402

MF-LF

54.9

97

051-7199

A

7

CPU 1 OF 2-FSB

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

TP_CPU_SPARE7

TP_CPU_SPARE4

TP_CPU_SPARE3

TP_CPU_SPARE2

CPU_GTLREF

FSB_IERR_L

FSB_DSTBP_L<0>

CPU_PSI_L

FSB_SLPCPU_L

CPU_DPRSTP_L

CPU_DPSLP_L

FSB_DPWR_L

CPU_COMP<2> CPU_COMP<3>

CPU_COMP<1>

CPU_COMP<0>

FSB_DSTBP_L<3>

FSB_DSTBN_L<3>

FSB_DINV_L<3>

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<57>

FSB_D_L<56>

FSB_D_L<55>

FSB_D_L<54>

FSB_D_L<52> FSB_D_L<53>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_DINV_L<2>

FSB_DSTBN_L<2>

FSB_D_L<47>

FSB_DSTBP_L<2>

FSB_D_L<45> FSB_D_L<46>

FSB_D_L<44>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

FSB_D_L<32>

CPU_BSEL<2>

FSB_DSTBN_L<1>

CPU_BSEL<0> CPU_BSEL<1>

CPU_TEST2

FSB_DINV_L<1>

FSB_DSTBP_L<1>

FSB_D_L<31>

FSB_D_L<30>

FSB_D_L<29>

FSB_D_L<26> FSB_D_L<27> FSB_D_L<28>

FSB_D_L<24> FSB_D_L<25>

FSB_D_L<23>

FSB_D_L<21> FSB_D_L<22>

FSB_D_L<20>

FSB_D_L<19>

FSB_D_L<18>

FSB_D_L<16> FSB_D_L<17>

FSB_DSTBN_L<0>

FSB_D_L<15>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<10>

FSB_D_L<9>

FSB_D_L<8>

FSB_D_L<7>

FSB_D_L<6>

FSB_D_L<5>

FSB_D_L<4>

FSB_D_L<3>

FSB_D_L<2>

FSB_D_L<1>

FSB_D_L<0>

CPU_TEST1

FSB_A_L<7>

TP_CPU_SPARE1

FSB_CLK_CPU_N

FSB_CLK_CPU_P

TP_CPU_SPARE5 TP_CPU_SPARE6

PM_THRMTRIP_L

CPU_THERMD_N

CPU_THERMD_P

XDP_DBRESET_L

XDP_TMS

XDP_TDO

XDP_TCK

XDP_BPM_L<1>

XDP_BPM_L<0>

FSB_HITM_L

FSB_HIT_L

FSB_TRDY_L

FSB_RS_L<1>

FSB_RS_L<0>

FSB_CPURST_L

FSB_LOCK_L

FSB_DBSY_L

FSB_DRDY_L

FSB_DEFER_L

FSB_BPRI_L

FSB_BNR_L

FSB_ADS_L

TP_CPU_HFPLL

TP_CPU_A37_L TP_CPU_A38_L

TP_CPU_A33_L TP_CPU_A34_L TP_CPU_A35_L TP_CPU_A36_L

TP_CPU_APM0_L TP_CPU_APM1_L

CPU_SMI_L

CPU_INTR CPU_NMI

CPU_STPCLK_L

CPU_IGNNE_L

CPU_FERR_L

CPU_A20M_L

FSB_ADSTB_L<1>

FSB_A_L<30> FSB_A_L<31>

FSB_A_L<27> FSB_A_L<28> FSB_A_L<29>

FSB_A_L<26>

FSB_A_L<25>

FSB_A_L<24>

FSB_A_L<22> FSB_A_L<23>

FSB_A_L<21>

FSB_A_L<20>

FSB_A_L<19>

FSB_A_L<18>

FSB_A_L<17>

FSB_REQ_L<4>

FSB_REQ_L<3>

FSB_REQ_L<1>

FSB_REQ_L<0>

FSB_REQ_L<2>

FSB_ADSTB_L<0>

FSB_A_L<14> FSB_A_L<15> FSB_A_L<16>

FSB_A_L<13>

FSB_A_L<12>

FSB_A_L<11>

FSB_A_L<10>

FSB_A_L<9>

FSB_A_L<8>

FSB_A_L<5>

FSB_A_L<4>

FSB_A_L<3>

=PP1V05_S0_CPU

XDP_TMS

XDP_TCK

XDP_TDI

CPU_PWRGD

XDP_BPM_L<3>

FSB_DINV_L<0>

CPU_PROCHOT_L

=PP1V05_S0_CPU

XDP_BPM_L<4> XDP_BPM_L<5>

FSB_RS_L<2>

XDP_TRST_L

XDP_TDI

XDP_BPM_L<2>

TP_CPU_SPARE0

TP_CPU_A32_L

TP_CPU_EXTBREF

TP_CPU_A39_L

FSB_A_L<6>

=PP1V05_S0_CPU

FSB_BREQ0_L

CPU_INIT_L

11

9

8

59

11

12

7

11

7

11

7

12

75

12

34

21

26

7

11

7

12

11

12

21

12

6

7

12

6

11

7

12

6

12

21

5

75

12

21

5

12

5

12

5

12

5

12

5

12

34

5

34

5

12

5

12

5

12

5

12

5

14

10

11

5

11

5

12

5

12

5

12

5

21

5

12

5

12

5

12

5

21

11

5

59

5

11

12

5

11

5

Preliminary

OUT OUT

OUT

OUT OUT

OUT

VCC_67

VCC_64

VCC_66

VCC_65

VCC_63

VCC_62

VCC_61

VCC_59 VCC_60

VCC_58

VCC_57

VCC_56

VCC_54 VCC_55

VCC_53

VCC_51 VCC_52

VCC_49 VCC_50

VCC_48

VCC_47

VCC_46

VCC_44 VCC_45

VCC_43

VCC_41 VCC_42

VCC_40

VCC_39

VCC_38

VCC_36 VCC_37

VCC_33

VCC_35

VCC_34

VCC_31 VCC_32

VCC_29 VCC_30

VCC_28

VCC_26 VCC_27

VCC_23

VCC_25

VCC_24

VCC_22

VCC_21

VCC_20

VCC_18 VCC_19

VCC_17

VCC_16

VCC_15

VCC_13 VCC_14

VCC_12

VCC_10 VCC_11

VCC_8 VCC_9

VCC_7

VCC_6

VCC_5

VCC_3 VCC_4

VCC_2

VCC_1 VCC_68

VCC_69

VCC_71

VCC_70

VCC_72

VCC_74

VCC_76

VCC_75

VCC_78

VCC_77

VCC_79

VCC_81

VCC_80

VCC_84

VCC_82 VCC_83

VCC_86

VCC_85

VCC_87

VCC_89

VCC_88

VCC_90 VCC_91 VCC_92

VCC_94

VCC_93

VCC_95 VCC_96 VCC_97

VCC_99

VCC_98

VCC_100

VCCP_1 VCCP_2 VCCP_3 VCCP_4 VCCP_5 VCCP_6 VCCP_7

VCCP_9

VCCP_8

VCCP_11

VCCP_10

VCCP_12 VCCP_13 VCCP_14

VCCP_16

VCCP_15

VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VSSSENSE

VCCSENSE

VCC_73

(3 OF 4)

VSS_82 VSS_83 VSS_84 VSS_85

VSS_87

VSS_86

VSS_88 VSS_89 VSS_90

VSS_92

VSS_91

VSS_93 VSS_94 VSS_95

VSS_97

VSS_96

VSS_100

VSS_98 VSS_99

VSS_102

VSS_101

VSS_105

VSS_103 VSS_104

VSS_106 VSS_107

VSS_110

VSS_109

VSS_108

VSS_111 VSS_112

VSS_115

VSS_114

VSS_113

VSS_116 VSS_117 VSS_118

VSS_120

VSS_119

VSS_123

VSS_121 VSS_122

VSS_124 VSS_125

VSS_128

VSS_126 VSS_127

VSS_129 VSS_130

VSS_133

VSS_131 VSS_132

VSS_134 VSS_135

VSS_138

VSS_136 VSS_137

VSS_139 VSS_140 VSS_141

VSS_143

VSS_142

VSS_146

VSS_144 VSS_145

VSS_147 VSS_148

VSS_151

VSS_150

VSS_149

VSS_152 VSS_153

VSS_156

VSS_155

VSS_154

VSS_157 VSS_158 VSS_159

VSS_161

VSS_160

VSS_162

VSS_1 VSS_2 VSS_3

VSS_5

VSS_4

VSS_6 VSS_7 VSS_8

VSS_10

VSS_9

VSS_11 VSS_12

VSS_15

VSS_13 VSS_14

VSS_16 VSS_17 VSS_18 VSS_19 VSS_20

VSS_23

VSS_22

VSS_21

VSS_24 VSS_25

VSS_28

VSS_27

VSS_26

VSS_29 VSS_30

VSS_33

VSS_32

VSS_31

VSS_34 VSS_35

VSS_38

VSS_37

VSS_36

VSS_39 VSS_40 VSS_41 VSS_42 VSS_43

VSS_46

VSS_44 VSS_45

VSS_47 VSS_48

VSS_51

VSS_49 VSS_50

VSS_52 VSS_53

VSS_56

VSS_54 VSS_55

VSS_57 VSS_58 VSS_59 VSS_60 VSS_61

VSS_63

VSS_62

VSS_64 VSS_65 VSS_66

VSS_69

VSS_68

VSS_67

VSS_70 VSS_71

VSS_74

VSS_73

VSS_72

VSS_75 VSS_76

VSS_79

VSS_78

VSS_77

VSS_80 VSS_81

(4 OF 4)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

VCCA=1.5 ONLY

LAYOUT NOTE: CONNECT R0802-03 TO VCCSENSE_P/N WITH NO STUB

PROVIDE A TEST POINT (WITH NO STUB)

BETWEEN VCCSENSE AND VSSSENSE AT THE LOCATION WHERE THE TWO 54.9 OHM

RESISTORS TERMINATE THE 55 OHM TRANSMISSION LINE

TO CONNECT A DIFFERENCTIAL PROBE

LAYOUT NOTE:

C0800

1

2

16V

20%

402

CERM

0.01UF

C0801

1

2

805-1

CERM

10UF

20%

6.3V

R0803

1

2

100

MF-LF 402

1% 1/16W

R0802

1

2

100

MF-LF 402

1% 1/16W

J0700

A7

B7

AF20

B9 B10 B12 B14 B15 B17 B18 B20

C9

A9

C10 C12 C13 C15 C17 C18

D9 D10 D12 D14

A10

D15 D17 D18

E7

E9 E10 E12 E13 E15 E17

A12

E18 E20

F7

F9 F10 F12 F14 F15 F17 F18

A13

F20 AA7 AA9

AA10 AA12 AA13 AA15 AA17 AA18 AA20

A15

AB9

AC10 AB10 AB12 AB14 AB15 AB17 AB18

AB20 AB7

A17

AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10

A18

AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15

A20

AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18

B26

V6

N6 R21 R6 T21 T6 V21 W21

G21 J6 K6 M6 J21 K21 M21 N21

AF7

AD6 AF5 AE5 AF4 AE3 AF2 AE2

AE7

OMIT

CPU

BGA

YONAH-SKT

J0700

A4

B8

V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2

B11

AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4

B13

AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8

B16

AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11

B19

AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14

B21

AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16

B24

AF19 AF21 AF24

C5 C8

C11

A8

C14 C16 C19

C2 C22 C25

D1

D4

D8 D11

A11

D13 D16 D19 D23 D26

E3

E6

E8 E11 E14

A14

E16 E19 E21 E24

F5

F8 F11 F13 F16 F19

A16

F2 F22 F25

G4

G1 G23 G26

H3

H6 H21

A19

H24

J2

J5 J22 J25

K1

K4 K23 K26

L3

A23

L6 L21 L24

M2

M5 M22 M25

N1

N4 N23

A26

N26

P3

P6 P21 P24 R2 R5 R22 R25 T1

B6 T4

T23 T26 U3 U6 U21 U24 V2 V5 V22

OMIT

CPU

YONAH-SKT

BGA

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

978

A

051-7199

CPU 2 OF 2-PWR/GND

CPU_VID<5>

CPU_VID<2>

CPU_VID<0>

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

CPU_VCCSENSE_N

=PP1V5_S0_CPU

=PPVCORE_S0_CPU

=PP1V5_S0_CPU

CPU_VCCSENSE_P

CPU_VID<6>

CPU_VID<4>

CPU_VID<3>

CPU_VID<1>

11

9

76

7

9

6

8

75

5

6

75

6

75

Preliminary

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MEROME VS. YONAH. SEE

USES DIFFERENT VALUES FOR

VCC CORE COUPLING CAPS

SECONDARY)

PRIMARY)

SECONDARY)

PLACE 6 INSIDE SOCKET

PLACE 8 INSIDE SOCKET CAVITY ON L8 (NORTH SIDE

PLACE 8 INSIDE SOCKET CAVITY ON L8 (SOUTH SIDE

SOUTH SIDE SECONDARY

PRIMARY)

DESIGN FOR 44 CERAMIC AND 3 ELECT BULK 1800UF

VCC CORE DECOUPLING

NEED LARGE BULK FOR 1.05V

PLACE INSIDE SOCKET CAVITY ON L8 (NORTH SIDE SECONDARY)

VCCP CORE DECOUPLING

CPU HEATSINK MOUNTING HOLES

WE HAD A 330UF ELEC CAP HERE FOR 1.05V RAIL - CHECK WE CAN REMOVE

CAVITY ON L1 (SOUTH SIDE

PLACE 6 INSIDE SOCKET

CAVITY ON L1 (NORTH SIDE

BOM TABLE.

C900

1

2

805

22UF

6.3V

20% X5R

C996

1

2

OMIT

22UF

X5R 805

20%

6.3V

C993

1

2

OMIT

22UF

X5R 805

20%

6.3V

C994

1

2

OMIT

22UF

6.3V

20%

805

X5R

C995

1

2

OMIT

22UF

X5R 805

20%

6.3V

C988

1

2

OMIT

22UF

X5R 805

20%

6.3V

C992

1

2

OMIT

22UF

6.3V

20%

805

X5R

C991

1

2

OMIT

22UF

6.3V

20%

805

X5R

C990

1

2

OMIT

22UF

X5R 805

20%

6.3V

C989

1

2

OMIT

22UF

6.3V

20%

805

X5R

C941

1

2

6.3V 805

20% X5R

OMIT

22UF

C942

1

2

OMIT

22UF

6.3V X5R

20%

805

C943

1

2

OMIT

22UF

6.3V X5R

20%

805

C944

1

2

OMIT

6.3V

22UF

X5R

20%

805

C945

1

2

OMIT

22UF

6.3V X5R

20%

805

C946

1

2

OMIT

22UF

6.3V X5R

20%

805

C947

1

23

470UF

D2T

TANT

2.5V

20%

NOSTUFF

C901

1

2

22UF

20%

6.3V X5R 805

C902

1

2

22UF

6.3V

OMIT

20% X5R

805

C904

1

2

22UF

6.3V

20% X5R

805

C905

1

2

NOSTUFF

22UF

X5R 805

20%

6.3V

C906

1

2

OMIT

22UF

805

20%

6.3V X5R

C907

1

2

20%

22UF

6.3V X5R 805

C908

1

2

22UF

20%

6.3V X5R 805

C909

1

2

22UF

20%

6.3V X5R 805

C910

1

2

22UF

20%

6.3V X5R 805

C911

1

2

X5R

22UF

20%

6.3V 805

C912

1

2

22UF

6.3V

20% X5R

805

C913

1

2

22UF

20% X5R

6.3V 805

C914

1

2

NOSTUFF

22UF

805

20%

6.3V X5R

C915

1

2

NOSTUFF

6.3V 805

22UF

20% X5R

C916

1

2

OMIT

805

X5R

6.3V

20%

22UF

C917

1

2

NOSTUFF

22UF

6.3V 805

20% X5R

C918

1

2

22UF

X5R

20%

6.3V 805

C919

1

2

OMIT

X5R

20%

805

6.3V

22UF

C920

1

2

OMIT

22UF

6.3V

20% X5R

805

C921

1

2

OMIT

6.3V

22UF

X5R 805

20%

C922

1

2

6.3V X5R

OMIT

22UF

20%

805

C923

1

2

22UF

6.3V X5R 805

20%

C924

1

2

22UF

6.3V

20% X5R

805

C925

1

2

OMIT

22UF

6.3V X5R 805

20%

C926

1

2

CERM

10V 402

0.1UF

20%

C928

1

2

22UF

20%

6.3V X5R 805

C929

1

2

22UF

20%

6.3V X5R 805

C930

1

2

22UF

805

6.3V

20% X5R

C931

1

2

OMIT

X5R

22UF

6.3V

20%

805

C932

1

2

NOSTUFF

22UF

805

20% X5R

6.3V

C934

1

2

20% 402

10V CERM

0.1UF

C935

1

2

0.1UF

CERM

10V 402

20%

C936

1

2

20%

0.1UF

402

10V CERM

C937

1

2

CERM

10V 402

0.1UF

20%

C938

1

2

20%

0.1UF

402

10V CERM

C939

1

2

OMIT

22UF

6.3V

20% X5R

805

C903

1

2

NOSTUFF

22UF

805

20% X5R

6.3V

ZH607

1

OMIT

4P75R4

C950

1

2

CERM

16V

402

0.01UF

20%

ZH608

1

OMIT

4P75R4

C951

1

2

402

0.01UF

CERM

20% 16V

ZH609

1

OMIT

4P75R4

C952

1

2

402

0.01UF

CERM

20% 16V

ZH610

1

OMIT

4P75R4

C953

1

2

402

0.01UF

CERM

20% 16V

C999

1

2

OMIT

22UF

6.3V

20%

805

X5R

C998

1

2

OMIT

22UF

X5R 805

20%

6.3V

C997

1

2

OMIT

22UF

6.3V

20%

805

X5R

CAP,10UF,6.3V,20%,X5R,0805

YONAH

138S0558 28

C922,C925,C906,C939,C919,C993,C942,C991,C995,C990,C989,C988,C920,C997,C992,C994,C996,C921,C999,C943,C998,C944,C945,C946,C941,C916,C931,C902

MEROM

CAP,22UF,6.3V,20%,X5R,0805

28138S0552

C922,C925,C906,C939,C919,C993,C942,C991,C995,C990,C989,C988,C920,C997,C992,C994,C996,C921,C999,C943,C998,C944,C945,C946,C941,C916,C931,C902

CPU DECAPS & VID<>

979

051-7199

A

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

=PPVCORE_S0_CPU

CPU_HS_ZH610CPU_HS_ZH607 CPU_HS_ZH609CPU_HS_ZH608

=PP1V05_S0_CPU

11

8

76 7 8 6 6

66

5

Preliminary

D+ D-

ALERT*/

THM*

SCLK

SDATA

VDD

GND

THM2*

IO

IO IO

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PLACE R1017 AND R1019 SUCH THAT THEY SHARE ONE PAD

PLACE R1002 AND R1018 SUCH THAT THEY SHARE ONE PAD

LAYOUT NOTE:

NOTE: IF CPU T DIODE TO BE READ IN OFF STATE, THEN THIS SHOULD BE S5

NOTE: SYMBOL SHOULD BE SHOWN ADT7461A

CPU THERMAL SENSOR

TEMPORARILY REMOVED BOMOPTION=CPU_TSENS_EXT

ROUTE ON SAME LAYER WITH 0.254MM TRACE WIDTH & SPACING.

ADD GND GUARD TRACES FOR CPU_THERMD_P/N

U1000

6

2

3

5

8

7

4

1

CRITICAL

MSOP

ADT7461

R1002

1 2

499

1%

MF-LF

1/16W

CPU_TSENS_INT

402

C1000

1

2

NOSTUFF

0.001UF

10% CERM

402

50V

C1001

1

2

0.1UF

X5R

10% 16V

402

R1017

1 2

499

1%

MF-LF

1/16W

CPU_TSENS_INT

402

R1001

1

2

5% 1/16W MF-LF

10K

402

R1000

1

2

10K

MF-LF

5% 1/16W

402

J1000

3

4

1 2

DEVELOPMENT CRITICAL

SM-2MT-BLK-LF

R1018

1 2

0

MF-LF

5%

1/16W

CPU_TSENS_EXT

402

R1019

1 2

1/16W

5%

MF-LF

0

CPU_TSENS_EXT

402

R1005

1 2

1/16W

5%

MF-LF

0

NOSTUFF

402

9710

A

051-7199

CPU TEMP SENSOR

PP3V3_S0

THERM_DX_N

THRM_THM

=SMB_THRM_CLK

THRM_ALERT_L

PM_THRM_L

THERM_DX_P

CPU_THERMD_P

CPU_THERMD_N

THERM_DX_P THERM_DX_N

CPU_THERMD_EXT_P CPU_THERMD_EXT_N

=SMB_THRM_DATA

94 83 76 61 59 41 26

58

6

10

59

23

10

7

10

59

Preliminary

OUT OUT

OUT

IN

IN IN

IO

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CONNECTOR’S FBO PIN.

ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S

518S0320

(TCK)

(FBO)

CPU ITP700FLEX DEBUG SUPPORT

(DEBUG PORT ACTIVE) (DBR#)

(DBA#)

NC

INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.

TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC

(AND WITH RESET BUTTON)

(DEBUG PORT RESET)

(FROM CK410M HOST 133/167MHZ)

P7 HAS OTHER PULL UP RESISTORS THAT MAY IMPACT ITP FUNCTIONALITY

ITP TCK SIGNAL LAYOUT NOTE:

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX

R1100

1 2

MF-LF

22.6

1%

1/16W

402

ITP

R1102

1 2

ITP

402

1% 1/16W MF-LF

22.6

R1103

1

2

54.9

1/16W

1%

402

ITP

MF-LF

C1100

1

2

16V 402

X5R

10%

0.1UF

ITP

R1104

1

2

240

402

MF-LF

5% 1/16W

ITP

J1101

1

10 11 12 13 14 15 16 17 18 19

2

20 21 22 23 24 25 26 27 28

29

3

30

4 5 6 7 8 9

F-RT-SM

52435-2872

DEVELOPMENT

R1101

1

2

402

54.9

1% MF-LF

1/16W

R1106

1

2

680

402

5% 1/16W MF-LF

CPU ITP700FLEX DEBUG

SYNC_DATE=01/05/2006

051-7199

A

11 97

SYNC_MASTER=M38

=PP1V05_S0_CPU

FSB_CPURST_L

XDP_TDO

ITPRESET_L

ITP_TDO

=PP3V3_S5_SB_PM

=PP1V05_S0_CPU

XDP_BPM_L<5> XDP_BPM_L<4>

XDP_BPM_L<2>

XDP_TDI XDP_TMS

XDP_TCK

CPU_XDP_CLK_P

CPU_XDP_CLK_N

XDP_TCK

XDP_BPM_L<3>

XDP_BPM_L<1> XDP_BPM_L<0>

XDP_TRST_L

XDP_DBRESET_L

11

11 9 9 8 8

7

12

7

11

6

7

23

6

7

26

5

6

5

7

5

34

5

7

5

7

Preliminary

IO

IO IO

OUT

IO

IO IO

IO

IO IO

IO

IO IO

IO

OUT

IO

OUT

IO IO

IO

IN

IO

IN

IO

HD4*

HD6*

HD16*

HTRDY*

HSLPCPU*

HRS1*

HRS0*

HHITM* HLOCK*

HHIT*

HDSTBP2*

HDTSBP3*

HDSTBP1*

HDSTBP0*

HDSTBN3*

HDSTBN1*

HDSTBN2*

HDSTBN0*

HDINV2* HDINV3*

HDINV1*

HDINV0*

HDVREF

HDRDY*

HDPWR*

HDEFER*

HDBSY*

HCPURST*

HBREQ0*

HBPRI*

HBNR*

HAVREF

HCLKIN*

HCLKIN

HYSWING

HYRCOMP HYSCOMP

HXSWING

HXSCOMP

HXRCOMP

HA13*

HADS*

HADSTB0*

HD3*

HD2*

HD1*

HD0*

HD63*

HD62*

HD61*

HD60*

HD59*

HD58*

HD57*

HD56*

HD55*

HD54*

HD53*

HD52*

HD51*

HD50*

HD49*

HD48*

HD47*

HD46*

HD45*

HD44*

HD43*

HD42*

HD41*

HD40*

HD39*

HD38*

HD37*

HD36*

HD35*

HD34*

HD33*

HD32*

HD31*

HD29*

HD28*

HD27*

HD26*

HD25*

HD24*

HD23*

HD22*

HD21*

HD20*

HD19*

HD18*

HD17*

HD15*

HD10* HD11* HD12* HD13* HD14*

HD5*

HD7* HD8* HD9*

HA30*

HA29*

HA28*

HA27*

HA26*

HA25*

HA24*

HA23*

HA31*

HA20*

HA19*

HA18*

HA16*

HA15*

HA14*

HA21* HA22*

HA17*

HA9*

HA8*

HA7*

HA6*

HA5*

HA4*

HA3*

HA10* HA11* HA12*

HADSTB1*

HREQ0* HREQ1* HREQ2* HREQ3*

HD30*

HREQ4*

HRS2*

(1 OF 10)

HOST

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

C1211

1

2

402

X5R

16V

10%

0.1uF

R1211

1

2

200

1% 1/16W MF-LF 402

R1210

1

2

100

1% 1/16W MF-LF 402

R1220

1

2

54.9

1% 1/16W MF-LF

402

R1221

1

2

402

MF-LF

1/16W

1%

24.9

R1225

1

2

221

1% 1/16W MF-LF 402

R1226

1

2

1% 1/16W MF-LF 402

100

C1226

1

2

0.1uF

402

X5R

16V

10%

C1236

1

2

402

X5R

16V

10%

0.1uF

R1235

1

2

221

1% 1/16W MF-LF 402

R1230

1

2

54.9

1% 1/16W MF-LF

402

R1236

1

2

1% 1/16W MF-LF 402

100

R1231

1

2

402

MF-LF

1/16W

1%

24.9

U1200

H11 J12

G14

D9 J14

H13

J15 F14

D12 A11

C11

A12 A13

E13

G13 F12

B12

B14 C12

A14

H9

C14

D14

C9

E11 G11

F11 G12

F9

E8 B9

C13

J13 C6

F6

C7

AG2

AG1

B7

F1

J1

K7 J8

H4

J3

K11

G4 T10

W11

T3

U7

H1

U9

U11 T11

W9

T1

T8

T4

W7

U5

T9

J6

W6

T5

AB7 AA9

W4

W3

Y3

Y7

W5

Y10

H3

AB8

W2

AA4

AA7 AA2

AA6

AA10

Y8

AA1 AB4

K2

AC9

AB11 AC11

AB3

AC2 AD1

AD9

AC1 AD7

AC6

G1

AB5

AD10

AD4 AC8

G2

K9

K1

A7 C3

J7 W8

U3

AB10

J9

H8

K4

T7

Y5 AC4

K3

T6

AA5 AC5

K13

D3 D4

B3

D8

G8 B8

F8

A8

B4

E6 D6

E3

E7

E1

E2

E4

Y1

U1

W1

BGA

NB

945GM

OMIT

SYNC_MASTER=M1

SYNC_DATE=01/05/2006

NB CPU Interface

A

12 97

051-7199

FSB_CPURST_L

FSB_A_L<29> FSB_A_L<30>

NB_FSB_VREF

FSB_D_L<17>

FSB_DSTBN_L<2> FSB_DSTBN_L<3>

FSB_DSTBP_L<1> FSB_DSTBP_L<2> FSB_DSTBP_L<3>

FSB_DINV_L<0>

FSB_DSTBN_L<0>

FSB_DINV_L<1> FSB_DINV_L<2>

FSB_D_L<1> FSB_D_L<2>

FSB_D_L<4> FSB_D_L<5> FSB_D_L<6>

FSB_D_L<10>

FSB_D_L<9>

FSB_D_L<8>

FSB_D_L<7>

FSB_D_L<3>

FSB_D_L<0>

FSB_D_L<16>

FSB_TRDY_L

FSB_SLPCPU_L

FSB_RS_L<1>

FSB_RS_L<0>

FSB_HITM_L FSB_LOCK_L

FSB_HIT_L

FSB_DSTBP_L<0>

FSB_DSTBN_L<1>

FSB_DINV_L<3>

FSB_DRDY_L

FSB_DPWR_L

FSB_DEFER_L

FSB_DBSY_L

FSB_BREQ0_L

FSB_BPRI_L

FSB_BNR_L

FSB_CLK_NB_N

FSB_CLK_NB_P

NB_FSB_YSWING

NB_FSB_YRCOMP NB_FSB_YSCOMP

NB_FSB_XSWING

NB_FSB_XSCOMP

FSB_A_L<13>

FSB_ADS_L FSB_ADSTB_L<0>

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<57>

FSB_D_L<56>

FSB_D_L<55>

FSB_D_L<54>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_D_L<47>

FSB_D_L<46>

FSB_D_L<45>

FSB_D_L<44>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

FSB_D_L<32>

FSB_D_L<31>

FSB_D_L<29>

FSB_D_L<28>

FSB_D_L<27>

FSB_D_L<26>

FSB_D_L<25>

FSB_D_L<24>

FSB_D_L<23>

FSB_D_L<22>

FSB_D_L<21>

FSB_D_L<20>

FSB_D_L<19>

FSB_D_L<18>

FSB_D_L<15>

FSB_D_L<11> FSB_D_L<12> FSB_D_L<13> FSB_D_L<14>

FSB_A_L<28>

FSB_A_L<27>

FSB_A_L<26>

FSB_A_L<25>

FSB_A_L<24>

FSB_A_L<23>

FSB_A_L<31>

FSB_A_L<20>

FSB_A_L<19>

FSB_A_L<18>

FSB_A_L<16>

FSB_A_L<15>

FSB_A_L<14>

FSB_A_L<21> FSB_A_L<22>

FSB_A_L<17>

FSB_A_L<9>

FSB_A_L<8>

FSB_A_L<7>

FSB_A_L<6>

FSB_A_L<5>

FSB_A_L<4>

FSB_A_L<3>

FSB_A_L<10> FSB_A_L<11> FSB_A_L<12>

FSB_ADSTB_L<1>

FSB_REQ_L<0> FSB_REQ_L<1> FSB_REQ_L<2> FSB_REQ_L<3>

FSB_D_L<30>

FSB_REQ_L<4>

FSB_RS_L<2>

=PP1V05_S0_FSB_NB

NB_FSB_XRCOMP

19

12

7

34

7

6

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

7

5

Preliminary

CRT_BLUE*

CRT_BLUE

CRT_GREEN*

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED*

HSYNC

CRT_DDC_DATA

CRT_VSYNC

CRT_IREF

TV_IRTNC

TV_IRTNB

TV_IREF TV_IRTNA

TV_DACB_OUT TV_DACC_OUT

TV_DACA_OUT

LB_DATA2

LB_DATA1

LB_DATA0

LB_DATA2*

LB_DATA1*

LB_DATA0*

LA_DATA2

LA_DATA1

LA_DATA0

LA_DATA2*

LA_DATA1*

LA_DATA0*

LB_CLK

LB_CLK*

LA_CLK

LA_CLK*

L_VDDEN

L_VREFL

L_VREFH

L_VBG

L_IBG

L_DDC_CLK L_DDC_DATA

EXP_A_COMPI EXP_A_COMPO

EXP_A_RXN0 EXP_A_RXN1 EXP_A_RXN2 EXP_A_RXN3 EXP_A_RXN4 EXP_A_RXN5 EXP_A_RXN6 EXP_A_RXN7 EXP_A_RXN8

EXP_A_RXN9 EXP_A_RXN10 EXP_A_RXN11 EXP_A_RXN12 EXP_A_RXN13

EXP_A_RXN15

EXP_A_RXN14

EXP_A_RXP0

EXP_A_RXP1

EXP_A_RXP2

EXP_A_RXP4

EXP_A_RXP3

EXP_A_RXP5

EXP_A_RXP6

EXP_A_RXP7

EXP_A_RXP10

EXP_A_RXP9

EXP_A_RXP8

EXP_A_RXP11 EXP_A_RXP12

EXP_A_RXP14

EXP_A_RXP13

EXP_A_RXP15

EXP_A_TXN1

EXP_A_TXN0

EXP_A_TXN3

EXP_A_TXN2

EXP_A_TXN6

EXP_A_TXN5

EXP_A_TXN4

EXP_A_TXN7

EXP_A_TXN8

EXP_A_TXN9 EXP_A_TXN10 EXP_A_TXN11 EXP_A_TXN12

EXP_A_TXN14

EXP_A_TXN13

EXP_A_TXN15

EXP_A_TXP0

EXP_A_TXP2

EXP_A_TXP1

EXP_A_TXP3

EXP_A_TXP4

EXP_A_TXP5

EXP_A_TXP7

EXP_A_TXP6

EXP_A_TXP8

EXP_A_TXP9 EXP_A_TXP10

EXP_A_TXP12

EXP_A_TXP11

EXP_A_TXP13 EXP_A_TXP14 EXP_A_TXP15

L_CLKCTLB

L_BKLTEN L_CLKCTLA

L_BKLTCTL

(3 OF 10)

LVDS

TV

VGA

PCI-EXPRESS GRAPHICS

IN

OUT

IN

OUT OUT

IN IN

OUT

IN

OUT

IO

IN

IN IN

IN

OUT

IN

OUT

IN

OUT

IN

OUT

OUT OUT

OUT

IN

IO IO

OUT

OUT OUT

OUT

OUT OUT

IN

OUT

IN

OUT

IO IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used

Can leave all signals NC if LVDS is not implemented

CRT Disable

TV-Out Disable

Composite: DACA only

TV-Out Signal Usage:

HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core

Unused DAC outputs must remain powered, but can omit

S-Video: DACB & DACC only

connect to GND through 75-ohm resistors.

Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and

Component: DACA, DACB & DACC

rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.

VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.

Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.

filtering components. Unused DAC outputs should

Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie

VCCD_LVDS must remain powered with proper decoupling.

LVDS Disable

Otherwise, tie VCCD_LVDS to GND also.

SDVOC_CLKP

SDVOC_BLUE

SDVOC_GREEN

SDVOC_RED

SDVOB_BLUE SDVOB_CLKP

SDVOB_RED# SDVOB_GREEN# SDVOB_BLUE# SDVOB_CLKN SDVOC_RED# SDVOC_GREEN# SDVOC_BLUE# SDVOC_CLKN

SDVOB_RED SDVOB_GREEN

SDVO_FLDSTALL

SDVO_INT

SDVO_TVCLKIN

SDVO_INT#

SDVO_TVCLKIN#

SDVO Alternate Function

SDVO_FLDSTALL#

U1200

E23

D23

C26

C25

C22

B22

J22

A21 B21

H23

D40 D38

F34

G38

V34 W38

Y34 AA38

AB34

AC38

H34

J38

L34 M38

N34

P38 R34

T38

D34 F38

T34

V38 W34

Y38

AA34 AB38

G34

H38 J34

L38

M34 N38

P34 R38

F36

G40

V36 W40

Y36 AA40

AB36

AC40

H36

J40

L36 M40

N36

P40 R36

T40

D36 F40

T36

V40 W36

Y40

AA36 AB40

G36

H40 J36

L40

M36 N40

P36 R40

G23

D32 J30

H30

H29 G26

G25 B38

C35

F32 C33

C32

A32

A33

B37

C37

B34

B35

A36

A37

E26

E27

F30

G30

D29

D30

F28

F29

A16

C18

A19

J20 B16

B18 B19

OMIT

945GM

NB

BGA

R1310

1

2

24.9

1% 1/16W MF-LF 402

NB PEG / Video Interfaces

SYNC_DATE=01/05/2006

SYNC_MASTER=M1

13 97

A

051-7199

PEG_R2D_C_N<15>

PEG_R2D_C_N<13> PEG_R2D_C_N<14>

PEG_R2D_C_N<12>

PEG_R2D_C_N<11>

PEG_R2D_C_N<10>

PEG_R2D_C_N<9>

PEG_R2D_C_N<8>

PEG_R2D_C_N<7>

PEG_R2D_C_N<4> PEG_R2D_C_N<5> PEG_R2D_C_N<6>

PEG_D2R_N<10>

PEG_D2R_N<8>

PEG_D2R_N<6>

PEG_D2R_N<5>

PEG_D2R_N<4>

PEG_D2R_N<3>

PEG_D2R_N<9>

PEG_D2R_N<7>

PEG_D2R_N<14>

PEG_D2R_N<13>

PEG_D2R_N<12>

PEG_D2R_N<11>

PEG_D2R_N<15>

LVDS_BKLTCTL

LVDS_CLKCTLA

PEG_D2R_P<1>

CRT_HSYNC_R

CRT_VSYNC_R

LVDS_CLKCTLB

=PP1V5_S0_NB_PCIE

LVDS_BKLTEN

PEG_R2D_C_P<15>

PEG_R2D_C_P<14>

PEG_R2D_C_P<13>

PEG_R2D_C_P<11> PEG_R2D_C_P<12>

PEG_R2D_C_P<10>

PEG_R2D_C_P<9>

PEG_R2D_C_P<8>

PEG_R2D_C_P<6> PEG_R2D_C_P<7>

PEG_R2D_C_P<5>

PEG_R2D_C_P<4>

PEG_R2D_C_P<3>

PEG_R2D_C_P<1> PEG_R2D_C_P<2>

PEG_R2D_C_P<0>

PEG_R2D_C_N<2> PEG_R2D_C_N<3>

PEG_R2D_C_N<0> PEG_R2D_C_N<1>

PEG_D2R_P<15>

PEG_D2R_P<13> PEG_D2R_P<14>

PEG_D2R_P<12>

PEG_D2R_P<11>

PEG_D2R_P<8> PEG_D2R_P<9> PEG_D2R_P<10>

PEG_D2R_P<7>

PEG_D2R_P<6>

PEG_D2R_P<5>

PEG_D2R_P<3> PEG_D2R_P<4>

PEG_D2R_P<2>

PEG_D2R_P<0>

PEG_D2R_N<2>

PEG_D2R_N<1>

PEG_D2R_N<0>

PEG_COMP

LVDS_DDC_DATA

LVDS_DDC_CLK

LVDS_IBG TP_LVDS_VBG

LVDS_VREFH LVDS_VREFL

LVDS_VDDEN

LVDS_A_CLK_N LVDS_A_CLK_P LVDS_B_CLK_N LVDS_B_CLK_P

LVDS_A_DATA_N<0> LVDS_A_DATA_N<1> LVDS_A_DATA_N<2>

LVDS_A_DATA_P<0> LVDS_A_DATA_P<1> LVDS_A_DATA_P<2>

LVDS_B_DATA_N<0> LVDS_B_DATA_N<1> LVDS_B_DATA_N<2>

LVDS_B_DATA_P<0> LVDS_B_DATA_P<1> LVDS_B_DATA_P<2>

CRT_IREF

CRT_DDC_DATA

CRT_RED_L

CRT_DDC_CLK

CRT_RED

CRT_GREEN CRT_GREEN_L

CRT_BLUE CRT_BLUE_L

TV_IRTNC

TV_IRTNB

TV_IRTNA

TV_IREF

TV_DACC_OUT

TV_DACB_OUT

TV_DACA_OUT

19

5

94

95

96

94

6

5

95

94

96

97

96

97

96

Preliminary

SM_CS0*

RSVD15

RSVD14

SM_CKE2

RSVD2 RSVD3

RSVD6

RSVD4 RSVD5

RSVD8

RSVD7

RSVD9

RSVD1

RSVD10 RSVD11 RSVD12 RSVD13

CFG1

CFG0

CFG2 CFG3 CFG4

CFG6

CFG5

CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14

CFG17

CFG16

CFG15

CFG18 CFG19 CFG20

PM_BM_BUSY* PM_EXTTS0* PM_EXTTS1* PW_THRMTRIP* PWROK RSTIN*

SDVO_CTRLCLK SDVO_CTRLDATA ICH_SYNC* CLK_REQ*

NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9

NC0 NC1

NC13

NC12

NC11

NC10

NC18

NC17

NC16

NC15

NC14

SM_CK0 SM_CK1 SM_CK2

SM_CK0*

SM_CK3

SM_CK1* SM_CK2* SM_CK3*

SM_CKE0 SM_CKE1

SM_CKE3

SM_CS1* SM_CS2* SM_CS3*

SMOCDCOMP0 SMOCDCOMP1

SM_ODT1

SM_ODT0

SM_ODT2

SMRCOMP*

SM_ODT3

SMRCOMP

SMVREF0 SMVREF1

G_CLKIN*

G_CLKIN

D_REFCLKIN*

D_REFCLKIN

D_REFSSCLKIN*

D_REFSSCLKIN

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0

DMI_TXP2

DMI_TXP1

DMI_TXP3

DDR MUXING

CFG

NC PM

CLKDMI

MISC

(2 OF 10)

RSVD

IN

OUT

IN

IO IO

OUT

OUT OUT

OUT

OUT OUT

IN

IN IN

IN

IN IN

IN

IN IN

IN

OUT

IN IN

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC NC

IPD

(LA_DATAN3) (LA_DATAP3) (LB_DATAN3) (LB_DATAP3)

(H_EDRDY#)

(D_PLLMON1)

(H_PROCHOT#)

(TESTIN#) (TV_DCONSEL0) (TV_DCONSEL1)

(H_PLLMON1)

(H_PLLMON1#)

(H_PCREQ#)

(VSS_MCHDETECT)

(D_PLLMON1#)

NC NC

NC

NC NC NC NC NC NC NC NC NC

NC

NC NC NC NC

IPU

IPD

IPU

IPU IPU

IPU

NC

IPU

NC

U1200

K16

K18

E16 D15

G15

K15 C15

H16

G18 H15

J25 K27

J18

J26

F18

E15

F15 E18

D19 D16

G16

H32

A26

A27

D41

C40

AE35 AF39

AG35

AH39

AC35 AE39

AF35

AG39

AE37

AF41

AG37 AH41

AC37

AE41

AF37 AG41

AG33

AF33

K28

D1

C41

B2

AY41

AY1

AW41

AW1

A40

A4

A39

A3

C1

BA41

BA40 BA39

BA3

BA2 BA1

B41

G28

F25 H26

G6

AH33 AH34

T32

J29

A41

A35 A34

D28 D27

R32

F3 F7

AG11

AF11

H7

J19

K30

H28

H27

AY35

AW35

AR1

AT1

AW7

AY7

AW40

AY40

AU20

AT20

BA29 AY29

AW13

AW12 AY21

AW21

BA13 BA12

AY20 AU21

AL20

AF10

AT9

AV9

AK1

AK41

BGA

NB

945GM

OMIT

R1430

1 2

402

MF-LF

1/16W

5%

100

R1441

1

2

10K

402

5%

MF-LF

1/16W

R1440

1

2

10K

402

5% 1/16W MF-LF

C1416

1

2

0.1uF

402

CERM

10V

20%

C1415

1

2

0.1uF

402

CERM

10V

20%

R1410

1

2

1/16W

1%

402

MF-LF

80.6

R1411

1

2

1/16W

1%

402

MF-LF

80.6

R1420

1

2

1/16W

5%

402

MF-LF

10K

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

NB Misc Interfaces

051-7199

A

9714

NB_BSEL<1>

TP_NB_XOR_FSB2_H7

TP_NB_XOR_LVDS_D27

TP_NB_XOR_LVDS_D28

TP_NB_XOR_LVDS_A34

MEM_VREF_NB_1

MEM_VREF_NB_0

MEM_RCOMP

MEM_RCOMP_L

=PP1V8_S3_MEM_NB

MEM_CKE<2>

MEM_CS_L<1> MEM_CS_L<2> MEM_CS_L<3>

MEM_ODT<1> MEM_ODT<2>

NB_CFG<12>

MEM_CS_L<0>

NB_BSEL<0>

NB_BSEL<2> NB_CFG<3> NB_CFG<4>

NB_CFG<6>

NB_CFG<5>

NB_CFG<7>

NB_CFG<9> NB_CFG<10>

NB_CFG<14>

NB_CFG<17>

NB_CFG<16>

NB_CFG<15>

NB_CFG<19> NB_CFG<20>

PM_BMBUSY_L

PM_THRMTRIP_L VR_PWRGOOD_DELAY

SDVO_CTRLCLK SDVO_CTRLDATA NB_SB_SYNC_L

MEM_CLK_P<0> MEM_CLK_P<1> MEM_CLK_P<2>

MEM_CLK_N<0>

MEM_CLK_P<3>

MEM_CLK_N<1> MEM_CLK_N<2> MEM_CLK_N<3>

MEM_CKE<0> MEM_CKE<1>

MEM_CKE<3>

MEM_ODT<0>

MEM_ODT<3>

NB_CLK100M_GCLKIN_N NB_CLK100M_GCLKIN_P

DMI_S2N_N<0> DMI_S2N_N<1> DMI_S2N_N<2> DMI_S2N_N<3>

DMI_S2N_P<0> DMI_S2N_P<1> DMI_S2N_P<2> DMI_S2N_P<3>

DMI_N2S_N<0> DMI_N2S_N<1> DMI_N2S_N<2> DMI_N2S_N<3>

DMI_N2S_P<0>

DMI_N2S_P<2>

DMI_N2S_P<1>

DMI_N2S_P<3>

NB_RST_IN_L

NB_CFG<8>

NB_CFG<11>

NB_CFG<13>

NB_CFG<18>

=PP3V3_S0_NB

PM_DPRSLPVR

TP_NB_TESTIN_L

TP_NB_XOR_LVDS_A35

NB_TV_DCONSEL0 NB_TV_DCONSEL1

=PP3V3_S0_NB

NB_CLK_DREFSSCLKIN_P

NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFCLKIN_P

NB_CLK_DREFCLKIN_N

CLK_NB_OE_L

NB_RST_IN_L_R

PM_EXTTS_L

TP_NB_RSVD3_F3 TP_NB_RSVD4_F7

20

19

75

19

16

30

26

30

34

22

14

75

14

34

59

34

6

29

28

29

28

29

28

34

20

23

5

95

22

28

29

28

29

28

29

28

29

28

29

5

22

5

22

5

22

5

22

6

20

6

23

6

5

33

5

58

Preliminary

SA_DQ1

SA_DQ0

SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10

SA_DQ12

SA_DQ11

SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27

SA_DQ29

SA_DQ28

SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33

SA_DQ35

SA_DQ34

SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44

SA_DQ46

SA_DQ45

SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS1

SA_BS0

SA_BS2

SA_CAS*

SA_DM0 SA_DM1 SA_DM2 SA_DM3

SA_DM5

SA_DM4

SA_DM7

SA_DM6

SA_DQS0

SA_DQS2

SA_DQS1

SA_DQS3

SA_DQS5

SA_DQS4

SA_DQS6 SA_DQS7

SA_DQS3*

SA_DQS2*

SA_DQS4* SA_DQS5* SA_DQS6* SA_DQS7*

SA_MA1

SA_MA0

SA_MA2 SA_MA3

SA_MA5

SA_MA4

SA_MA6 SA_MA7

SA_MA9

SA_MA8

SA_MA10 SA_MA11 SA_MA12 SA_MA13

SA_RAS*

SA_RCVENIN*

SA_RCVENOUT*

SA_WE*

SA_DQS1*

SA_DQS0*

(4 OF 10)

DDR SYSTEM MEMORY A

IO

IO IO

IO

OUT

IO

OUT

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

SB_DQ1

SB_DQ0

SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10

SB_DQ12

SB_DQ11

SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27

SB_DQ29

SB_DQ28

SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33

SB_DQ35

SB_DQ34

SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44

SB_DQ46

SB_DQ45

SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS1

SB_BS0

SB_BS2

SB_CAS*

SB_DM0 SB_DM1 SB_DM2 SB_DM3

SB_DM5

SB_DM4

SB_DM7

SB_DM6

SB_DQS0

SB_DQS2

SB_DQS1

SB_DQS3

SB_DQS5

SB_DQS4

SB_DQS6 SB_DQS7

SB_DQS3*

SB_DQS2*

SB_DQS4* SB_DQS5* SB_DQS6* SB_DQS7*

SB_MA1

SB_MA0

SB_MA2 SB_MA3

SB_MA5

SB_MA4

SB_MA6 SB_MA7

SB_MA9

SB_MA8

SB_MA10 SB_MA11 SB_MA12 SB_MA13

SB_RAS*

SB_RCVENIN*

SB_RCVENOUT*

SB_WE*

SB_DQS1*

SB_DQS0*

(5 OF 10)

DDR SYSTEM MEMORY B

IO IO

IO

IO IO

IO

OUT

IO

OUT

IO

OUT

IO

IO IO

IO

OUT

IO

OUT OUT

OUT

IO

OUT

IO

OUT

IO

OUT OUT

OUT

IO

OUT

IO

IO IO

IO

IO IO

IO

IO IO

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

U1200

AU12

AV14

BA20

AY13 AJ33

AM35

AL26 AN22

AM14

AL9 AR3

AH4

AJ35

AJ34

AR31 AP31

AN38

AM36 AM34

AN33

AK26 AL27

AM26

AN24

AM31

AK28

AL28 AM24

AP26

AP23 AL22

AP21

AN20 AL23

AP24

AM33

AP20 AT21

AR12 AR14

AP13

AP12 AT13

AT12

AL14 AL12

AJ36

AK9

AN7 AK8

AK7 AP9

AN9

AT5 AL5

AY2

AW2

AK35

AP1

AN2

AV2 AT3

AN1 AL2

AG7

AF9 AG4

AF6

AJ32

AG9 AH6

AF4

AF8

AH31

AN35 AP33

AK33

AK32

AT33

AU33

AN28

AN27

AM22

AM21

AN12

AM12

AN8

AL8

AP3

AN3

AG5

AH5

AY16

AU14

AU13

AT17

AV20 AV12

AW16

BA16 BA17

AU16

AV17 AU17

AW17

AT16

AW14

AK23

AK24 AY14

BGA

945GM

NB

OMIT

U1200

AT24

AV23

AY28

AR24 AK36

AR38

AT36 BA31

AL17

AH8 BA5

AN4

AK39

AJ37

AU38 AV38

AP38

AR40 AW38

AY38

BA38 AV36

AR36

AP36

AP39

BA36

AU36 AP35

AP34

AY33 BA33

AT31

AU29 AU31

AW31

AR41

AV29 AW29

AM19 AL19

AP14

AN14 AN17

AM16

AP15 AL15

AJ38

AJ11

AH10

AJ9

AN10 AK13

AH11

AK10

AJ8

BA10

AW10

AK38

BA4

AW4

AY10

AY9

AW5 AY5

AV4

AR5 AK4

AK3

AN41

AT4 AK5

AJ5

AJ3

AP41

AT40 AV41

AM39

AM40

AT39

AU39

AU35

AT35

AR29

AP29

AR16

AP16

AR10

AT10

AR7

AT7

AN5

AP5

AY23

AW24

AV24

BA27

AY27 AR23

AY24

AR28 AT27

AT28

AU27 AV28

AV27

AW27

AU23

AK16

AK18 AR27

BGA

945GM

NB

OMIT

SYNC_DATE=01/05/2006

SYNC_MASTER=M1

NB DDR2 Interfaces

051-7199

A

9715

MEM_B_DQ<1>

MEM_B_DQ<0>

MEM_B_DQ<2> MEM_B_DQ<3> MEM_B_DQ<4> MEM_B_DQ<5> MEM_B_DQ<6> MEM_B_DQ<7> MEM_B_DQ<8> MEM_B_DQ<9> MEM_B_DQ<10>

MEM_B_DQ<12>

MEM_B_DQ<11>

MEM_B_DQ<13> MEM_B_DQ<14> MEM_B_DQ<15> MEM_B_DQ<16> MEM_B_DQ<17> MEM_B_DQ<18> MEM_B_DQ<19> MEM_B_DQ<20> MEM_B_DQ<21> MEM_B_DQ<22> MEM_B_DQ<23> MEM_B_DQ<24> MEM_B_DQ<25> MEM_B_DQ<26> MEM_B_DQ<27>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<30> MEM_B_DQ<31> MEM_B_DQ<32> MEM_B_DQ<33>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQ<36> MEM_B_DQ<37> MEM_B_DQ<38> MEM_B_DQ<39> MEM_B_DQ<40> MEM_B_DQ<41> MEM_B_DQ<42> MEM_B_DQ<43> MEM_B_DQ<44>

MEM_B_DQ<46>

MEM_B_DQ<45>

MEM_B_DQ<47> MEM_B_DQ<48> MEM_B_DQ<49> MEM_B_DQ<50> MEM_B_DQ<51> MEM_B_DQ<52> MEM_B_DQ<53> MEM_B_DQ<54> MEM_B_DQ<55> MEM_B_DQ<56> MEM_B_DQ<57> MEM_B_DQ<58> MEM_B_DQ<59> MEM_B_DQ<60> MEM_B_DQ<61> MEM_B_DQ<62> MEM_B_DQ<63>

MEM_B_BS<1>

MEM_B_BS<0>

MEM_B_BS<2>

MEM_B_CAS_L MEM_B_DM<0> MEM_B_DM<1> MEM_B_DM<2> MEM_B_DM<3>

MEM_B_DM<5>

MEM_B_DM<4>

MEM_B_DM<7>

MEM_B_DM<6>

MEM_B_DQS_P<0>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<3>

MEM_B_DQS_P<5>

MEM_B_DQS_P<4>

MEM_B_DQS_P<6> MEM_B_DQS_P<7>

MEM_B_DQS_N<3>

MEM_B_DQS_N<2>

MEM_B_DQS_N<4> MEM_B_DQS_N<5> MEM_B_DQS_N<6> MEM_B_DQS_N<7>

MEM_B_A<1>

MEM_B_A<0>

MEM_B_A<2> MEM_B_A<3>

MEM_B_A<5>

MEM_B_A<4>

MEM_B_A<6> MEM_B_A<7>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<10> MEM_B_A<11> MEM_B_A<12> MEM_B_A<13>

MEM_B_RAS_L

MEM_B_WE_L

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_A_DQ<1>

MEM_A_DQ<0>

MEM_A_DQ<2> MEM_A_DQ<3> MEM_A_DQ<4>

MEM_A_DQ<6> MEM_A_DQ<7> MEM_A_DQ<8> MEM_A_DQ<9> MEM_A_DQ<10>

MEM_A_DQ<12>

MEM_A_DQ<11>

MEM_A_DQ<13> MEM_A_DQ<14> MEM_A_DQ<15> MEM_A_DQ<16> MEM_A_DQ<17> MEM_A_DQ<18> MEM_A_DQ<19> MEM_A_DQ<20> MEM_A_DQ<21> MEM_A_DQ<22> MEM_A_DQ<23> MEM_A_DQ<24> MEM_A_DQ<25> MEM_A_DQ<26> MEM_A_DQ<27>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<30> MEM_A_DQ<31> MEM_A_DQ<32> MEM_A_DQ<33>

MEM_A_DQ<35>

MEM_A_DQ<34>

MEM_A_DQ<36> MEM_A_DQ<37> MEM_A_DQ<38> MEM_A_DQ<39> MEM_A_DQ<40> MEM_A_DQ<41> MEM_A_DQ<42> MEM_A_DQ<43> MEM_A_DQ<44>

MEM_A_DQ<46>

MEM_A_DQ<45>

MEM_A_DQ<47> MEM_A_DQ<48> MEM_A_DQ<49> MEM_A_DQ<50> MEM_A_DQ<51> MEM_A_DQ<52> MEM_A_DQ<53> MEM_A_DQ<54> MEM_A_DQ<55> MEM_A_DQ<56> MEM_A_DQ<57> MEM_A_DQ<58> MEM_A_DQ<59> MEM_A_DQ<60> MEM_A_DQ<61> MEM_A_DQ<62> MEM_A_DQ<63>

MEM_A_BS<1>

MEM_A_BS<0>

MEM_A_BS<2>

MEM_A_CAS_L MEM_A_DM<0> MEM_A_DM<1> MEM_A_DM<2> MEM_A_DM<3>

MEM_A_DM<5>

MEM_A_DM<4>

MEM_A_DM<7>

MEM_A_DM<6>

MEM_A_DQS_P<0>

MEM_A_DQS_P<2>

MEM_A_DQS_P<1>

MEM_A_DQS_P<3>

MEM_A_DQS_P<5>

MEM_A_DQS_P<4>

MEM_A_DQS_P<6> MEM_A_DQS_P<7>

MEM_A_DQS_N<3>

MEM_A_DQS_N<2>

MEM_A_DQS_N<4> MEM_A_DQS_N<5> MEM_A_DQS_N<6> MEM_A_DQS_N<7>

MEM_A_A<1>

MEM_A_A<0>

MEM_A_A<2> MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<4>

MEM_A_A<6> MEM_A_A<7>

MEM_A_A<9>

MEM_A_A<8>

MEM_A_A<10> MEM_A_A<11> MEM_A_A<12> MEM_A_A<13>

MEM_A_RAS_L

MEM_A_WE_L

MEM_A_DQS_N<1>

MEM_A_DQS_N<0>

MEM_A_DQ<5>

29

30

29

30

29

28

30

28

30

28

29

5

29

5

29

5

29

5

29

5

29

5

29

5

29

5

29

5

29

5

28

5

28

5

28

5

28

5

28

5

28

5

28

5

28

5

28

5

28

5

28

Preliminary

VCC_SM19

VCC_SM107

VCC_SM105

VCC_SM106

VCC_SM102

VCC_SM104

VCC_SM103

VCC_SM100

VCC_SM101

VCC_SM98

VCC_SM99

VCC_SM97

VCC_SM95

VCC_SM96

VCC_SM93

VCC_SM94

VCC_SM92

VCC_SM91

VCC_SM90

VCC_SM89

VCC_SM88

VCC_SM86

VCC_SM87

VCC_SM85

VCC_SM84

VCC_SM83

VCC_SM81

VCC_SM80

VCC_SM82

VCC_SM79

VCC_SM78

VCC_SM77

VCC_SM74

VCC_SM75

VCC_SM76

VCC_SM73

VCC_SM72

VCC_SM70

VCC_SM71

VCC_SM68

VCC_SM67

VCC_SM69

VCC_SM65

VCC_SM66

VCC_SM64

VCC_SM63

VCC_SM62

VCC_SM61

VCC_SM60

VCC_SM59

VCC_SM58

VCC_SM56

VCC_SM57

VCC_SM55

VCC_SM53

VCC_SM54

VCC_SM52

VCC_SM50

VCC_SM51

VCC_SM49

VCC_SM48

VCC_SM46

VCC_SM47

VCC_SM44

VCC_SM45

VCC_SM43

VCC_SM41

VCC_SM42

VCC_SM40

VCC_SM39

VCC_SM37

VCC_SM38

VCC_SM36

VCC_SM34

VCC_SM35

VCC_SM32

VCC_SM33

VCC_SM30

VCC_SM31

VCC_SM28

VCC_SM29

VCC_SM27

VCC_SM26

VCC_SM25

VCC_SM23

VCC_SM24

VCC_SM22

VCC_SM21

VCC_SM20

VCC_SM18

VCC_SM16

VCC_SM17

VCC_SM15

VCC_SM13

VCC_SM14

VCC_SM11

VCC_SM12

VCC_SM10

VCC_SM9

VCC_SM8

VCC_SM7

VCC_SM6

VCC_SM5

VCC_SM4

VCC_SM3

VCC_SM0

VCC_SM1

VCC_SM2

VCC_110

VCC_109

VCC_108

VCC_105

VCC_106

VCC_107

VCC_104

VCC_103

VCC_101

VCC_100

VCC_102

VCC_98

VCC_99

VCC_96

VCC_97

VCC_95

VCC_94

VCC_93

VCC_92

VCC_91

VCC_90

VCC_88

VCC_89

VCC_87

VCC_86

VCC_85

VCC_83

VCC_84

VCC_82

VCC_80

VCC_81

VCC_79

VCC_78

VCC_76

VCC_77

VCC_74

VCC_73

VCC_75

VCC_72

VCC_71

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_65

VCC_64

VCC_62

VCC_63

VCC_61

VCC_60

VCC_59

VCC_57

VCC_58

VCC_55

VCC_56

VCC_53

VCC_54

VCC_52

VCC_50

VCC_51

VCC_49

VCC_46

VCC_47

VCC_48

VCC_44

VCC_45

VCC_43

VCC_42

VCC_41

VCC_40

VCC_39

VCC_38

VCC_37

VCC_36

VCC_34

VCC_35

VCC_33

VCC_32

VCC_31

VCC_30

VCC_28

VCC_29

VCC_25

VCC_26

VCC_27

VCC_24

VCC_23

VCC_21

VCC_20

VCC_22

VCC_13

VCC_14

VCC_12

VCC_16

VCC_15

VCC_17

VCC_18

VCC_19

VCC_11

VCC_10

VCC_9

VCC_8

VCC_7

VCC_4

VCC_5

VCC_6

VCC_2

VCC_3

VCC_0

VCC_1

(6 OF 10)

VCC

VCCAUX_NCTF57

VCCAUX_NCTF56

VCCAUX_NCTF55

VCCAUX_NCTF54

VCCAUX_NCTF53

VCCAUX_NCTF52

VCCAUX_NCTF51

VCCAUX_NCTF50

VCCAUX_NCTF49

VCCAUX_NCTF47 VCCAUX_NCTF48

VCCAUX_NCTF45

VCCAUX_NCTF44

VCCAUX_NCTF46

VCCAUX_NCTF40

VCCAUX_NCTF39

VCCAUX_NCTF37 VCCAUX_NCTF38

VCCAUX_NCTF36

VCCAUX_NCTF34 VCCAUX_NCTF35

VCCAUX_NCTF32 VCCAUX_NCTF33

VCCAUX_NCTF31

VCCAUX_NCTF30

VCCAUX_NCTF29

VCCAUX_NCTF27 VCCAUX_NCTF28

VCCAUX_NCTF26

VCCAUX_NCTF24 VCCAUX_NCTF25

VCCAUX_NCTF22

VCCAUX_NCTF21

VCCAUX_NCTF23

VCCAUX_NCTF42 VCCAUX_NCTF43

VCCAUX_NCTF41

VCCAUX_NCTF19 VCCAUX_NCTF20

VCCAUX_NCTF18

VCCAUX_NCTF17

VCCAUX_NCTF16

VCCAUX_NCTF14 VCCAUX_NCTF15

VCCAUX_NCTF13

VCCAUX_NCTF12

VCCAUX_NCTF11

VCCAUX_NCTF9

VCCAUX_NCTF10

VCCAUX_NCTF8

VCCAUX_NCTF7

VCCAUX_NCTF6

VCCAUX_NCTF5

VCCAUX_NCTF4

VCCAUX_NCTF3

VCCAUX_NCTF1

VCCAUX_NCTF0

VCCAUX_NCTF2

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF7 VSS_NCTF8

VSS_NCTF5 VSS_NCTF6

VSS_NCTF4

VSS_NCTF2 VSS_NCTF3

VSS_NCTF0 VSS_NCTF1

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF61 VCC_NCTF62 VCC_NCTF63

VCC_NCTF60

VCC_NCTF57 VCC_NCTF58 VCC_NCTF59

VCC_NCTF56

VCC_NCTF55

VCC_NCTF53 VCC_NCTF54

VCC_NCTF52

VCC_NCTF50 VCC_NCTF51

VCC_NCTF49

VCC_NCTF48

VCC_NCTF46 VCC_NCTF47

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF41

VCC_NCTF40

VCC_NCTF42

VCC_NCTF38 VCC_NCTF39

VCC_NCTF36 VCC_NCTF37

VCC_NCTF34 VCC_NCTF35

VCC_NCTF33

VCC_NCTF31 VCC_NCTF32

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCC_NCTF18 VCC_NCTF19

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF13 VCC_NCTF14

VCC_NCTF11 VCC_NCTF12

VCC_NCTF10

VCC_NCTF8 VCC_NCTF9

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF3

VCC_NCTF2

VCC_NCTF0 VCC_NCTF1

(7 OF 10)

NCTF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

impacting part performance.

NCTF balls are Not Critical To Function

These connections can break without

Layout Note: Place near pin BA23

Place near pin BA15

Layout Note:

1.05V or 1.5V

(Need to better define cavity)

Layout Note: Place in cavity

U1200

AA33

W33

P32

M19

L19

N18

M18

L18

P17

N17

M17

N16

M16

N32

L16

M32

L32

J32

AA31

W31

V31

T31

R31

P33

P31

N31

M31

AA30

Y30

W30

V30

U30

T30

R30

N33

P30

N30

M30

L30

AA29

Y29

W29

V29

U29

R29

L33

P29

M29

L29

AB28

AA28

Y28

V28

U28

T28

R28

J33

P28

N28

M28

L28

P27

N27

M27

L27

P26

N26

AA32

L26

N25

M25

L25

P24

N24

M24

AB23

AA23

Y23

Y32

P23

N23

M23

L23

AC22

AB22

Y22

W22

P22

N22

W32

M22

L22

AC21

AA21

W21

N21

M21

L21

AC20

AB20

V32

Y20

W20

P20

N20

M20

L20

AB19

AA19

Y19

N19

AU41

AT41

AR34

AR6

AP6

AN6

AL6

AK6

AJ6

AV1

AJ1

BA30

AY30

AW30

AV30

AU30

AT30

AR30

AP30

AN30

AM41

AM30

AM29

AL29

AK29

AJ29

AH29

AJ28

AH28

AJ27

AH27

AU40

BA26

AY26

AW26

AV26

AU26

AT26

AR26

AJ26

AH26

AJ25

BA34

AH25

AJ24

AH24

BA23

AJ23

BA22

AY22

AW22

AV22

AU22

AY34

AT22

AR22

AP22

AK22

AJ22

AK21

AK20

BA19

AY19

AW19

AW34

AV19

AU19

AT19

AR19

AP19

AK19

AJ19

AJ18

AJ17

AH17

AV34

AJ16

AH16

BA15

AY15

AW15

AV15

AU15

AT15

AR15

AJ15

AU34

AJ14

AJ13

AH13

AK12

AJ12

AH12

AG12

AK11

BA8

AY8

AT34

AW8

AV8

AT8

AR8

AP8

BA6

AY6

AW6

AV6

AT6

OMIT

BGA

NB

945GM

C1610

1

2

402

6.3V CERM-X5R

0.47UF

10%

C1621

1

2

10UF

CERM

20%

6.3V

805-1

C1620

1

2

6.3V

20%

10UF

CERM

805-1

U1200

AD27 AC27

AD26

AC26 AB26

AA26

Y26 W26

V26

U26 T26

R26

AB27

AD25 AC25

AB25 AA25

Y25

W25 V25

U25

T25 R25

AA27

AD24

AC24 AB24

AA24

Y24

W24

V24 U24

T24

R24

Y27

AD23

V23

U23 T23

R23

AD22

V22

U22 T22

R22

W27

AD21

V21

U21

T21 R21

AD20

V20

U20

T20 R20

V27

AD19

V19 U19

T19

AD18 AC18

AB18 AA18

Y18

W18

U27

V18

U18

T18

T27

R27

AG27

AF27

AG22 AF22

AG21

AF21 AG20

AF20

AG19 AF19

R19 AG18

AG26

AF18

R18 AG17

AF17

AE17 AD17

AB17

AA17 W17

V17

AF26

T17

R17

AG16 AF16

AE16

AD16 AC16

AB16

AA16 Y16

AG25

W16 V16

U16

T16 R16

AG15

AF15 AE15

AD15

AC15

AF25

AB15

AA15 Y15

W15

V15 U15

T15

R15

AG24

AF24 AG23

AF23

AE27 AE26

AC17

Y17 U17

AE25

AE24 AE23

AE22

AE21 AE20

AE19

AE18

OMIT

BGA

NB

945GM

C1611

1

2

6.3V CERM-X5R

0.47UF

10%

402

C1612

1

2

6.3V

CERM-X5R

0.47UF

10%

402

C1613

1

2

6.3V CERM-X5R

0.47UF

10%

402

C1614

1

2

0.47UF

CERM-X5R

6.3V

10%

402

C1615

1

2

6.3V CERM-X5R

0.47UF

10%

402

16 97

A

051-7199

NB Power 1

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

NB_VCCSM_LF5

NB_VCCSM_LF2 NB_VCCSM_LF1

=PPVCORE_S0_NB

PP1V5_S0_NB_FILT_VCCAUX

=PPVCORE_S0_NB

=PP1V8_S3_MEM_NB

NB_VCCSM_LF4

19

16

19

16

14

6

17

6

Preliminary

VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8

VTT9 VTT10 VTT11 VTT12 VTT13

VTT15

VTT14

VTT16

VTT18

VTT17

VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25

VTT27

VTT26

VTT28 VTT29

VTT31

VTT30

VTT32

VTT34

VTT33

VTT35 VTT36 VTT37

VTT39

VTT38

VTT40 VTT41 VTT42 VTT43 VTT44 VTT45

VTT48

VTT46 VTT47

VTT49 VTT50

VTT52

VTT51

VTT53

VTT55

VTT54

VTT57

VTT56

VTT58 VTT59 VTT60 VTT61 VTT62

VTT64

VTT63

VTT65 VTT66 VTT67

VTT69

VTT68

VTT70 VTT71

VTT73

VTT72

VTT74

VTT76

VTT75

VCCSYNC

VCC_TXLVDS0 VCC_TXLVDS1 VCC_TXLVDS2

VCC3G0 VCC3G1

VCC3G3

VCC3G2

VCC3G4

VCC3G6

VCC3G5

VCCA_3GPLL VCCA_3GBG VSSA_3GBG

VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC

VCCA_DPLLB

VCCA_DPLLA

VCCA_HPLL

VSSA_LVDS

VCCA_LVDS

VCCA_MPLL

VCCA_TVBG VSSA_TVBG

VCCA_TVDACC0 VCCA_TVDACC1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACA0 VCCA_TVDACA1

VCCD_HMPLL0 VCCD_HMPLL1

VCCD_LVDS2

VCCD_LVDS0 VCCD_LVDS1

VCCD_TVDAC

VCC_HV1 VCC_HV2

VCC_HV0

VCCD_QTVDAC

VCCAUX19

VCCAUX18

VCCAUX17

VCCAUX16

VCCAUX14 VCCAUX15

VCCAUX13

VCCAUX12

VCCAUX11

VCCAUX10

VCCAUX0 VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4

VCCAUX6

VCCAUX5

VCCAUX9

VCCAUX8

VCCAUX7

VCCAUX21

VCCAUX20

VCCAUX23 VCCAUX24

VCCAUX22

VCCAUX25 VCCAUX26

VCCAUX29

VCCAUX28

VCCAUX27

VCCAUX30 VCCAUX31

VCCAUX33

VCCAUX32

VCCAUX34 VCCAUX35 VCCAUX36

VCCAUX38

VCCAUX37

VCCAUX39 VCCAUX40

POWER

(8 OF 10)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

U1200

AJ41 AB41

Y41 V41

R41

N41 L41

A23 B23

B25

C30

B30

A30

G41

AC33

F21

E21

B26

C39

AF1

A38

AF2

H20

E19

F19

C20

D20

E20 F20

AK31 AF31

AE30

AD30 AC30

AG29

AF29 AE29

AD29

AC29 AG28

AF28

AE31

AE28

AH22

AJ21 AH21

AJ20

AH20 AH19

P19

P16

AH15

AC31

P15 AH14

AG14

AF14 AE14

Y14

AF13 AE13

AF12

AE12

AL30

AD12

AK30

AJ30 AH30

AG30 AF30

AH1

AH2

A28

B28

C28

H19

D21

H22

H41

G21

B39

G20

AC14

AB14

AD13 AC13

AB13 AA13

Y13

W13 V13

U13

T13 R13

W14

N13

M13 L13

AB12 AA12

Y12

W12 V12

U12

T12

V14

R12

P12

N12 M12

L12 R11

P11

N11 M11

R10

T14

P10 N10

M10

P9 N9

M9 R8

P8

N8 M8

R14

P7

N7 M7

R6

P6 M6

A6 R5

P5

N5

P14

M5

P4

N4 M4

R3

P3 N3

M3 R2

P2

N14

M2 D2

AB1

R1 P1

N1

M1

M14

L14

OMIT

945GM

BGA

NB

C1711

1

2

402

10%

0.47UF

CERM-X5R

6.3V

C1713

1

2

402

10%

0.47UF

6.3V

CERM-X5R

C1712

1

2

X5R

6.3V

20%

0.22UF

402

17 97

A

051-7199

NB Power 2

SYNC_MASTER=M40

SYNC_DATE=01/05/2006

NB_VTTLF_CAP3

NB_VTTLF_CAP1

PP1V5_S0_NB_VCC3G

GND_NB_VSSA_CRTDAC

PP1V5_S0_NB_VCCA_HPLL

PP3V3_S0_NB_VCCA_TVDACA

=PP1V5_S0_NB_VCCD_HMPLL

PP1V5_S0_NB_VCCD_TVDAC

PP2V5_S0_NB_VCCA_CRTDAC

NB_VTTLF_CAP2

PP2V5_S0_NB_VCCSYNC

=PP2V5_S0_NB_VCC_TXLVDS

=PP1V05_S0_NB_VTT

GND_NB_VSSA_3GBG

=PP2V5_S0_NB_VCCA_3GBG

PP1V5_S0_NB_VCCA_3GPLL

PP1V5_S0_NB_VCCA_DPLLA PP1V5_S0_NB_VCCA_DPLLB

=PP2V5_S0_NB_VCCA_LVDS GND_NB_VSSA_LVDS

PP1V5_S0_NB_VCCA_MPLL

PP3V3_S0_NB_VCCA_TVBG GND_NB_VSSA_TVBG

PP3V3_S0_NB_VCCA_TVDACC

PP3V3_S0_NB_VCCA_TVDACB

=PP1V5_S0_NB_VCCD_LVDS

=PP3V3_S0_NB_VCC_HV

PP1V5_S0_NB_VCCD_QTVDAC

PP1V5_S0_NB_FILT_VCCAUX

19

6

19

6

19

6

19

6

19

6

19

16

Preliminary

VSS_1

VSS_0

VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7

VSS_9

VSS_8

VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17

VSS_19

VSS_18

VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26

VSS_28

VSS_27

VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35

VSS_37

VSS_36

VSS_39

VSS_38

VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47

VSS_49

VSS_48

VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55

VSS_57

VSS_56

VSS_59

VSS_58

VSS_61

VSS_60

VSS_64

VSS_63

VSS_62

VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71

VSS_73

VSS_72

VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79

VSS_82

VSS_80 VSS_81

VSS_84

VSS_83

VSS_85

VSS_87

VSS_86

VSS_89

VSS_88

VSS_91

VSS_90

VSS_92 VSS_93 VSS_94

VSS_96

VSS_95

VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112

VSS_114

VSS_113

VSS_115

VSS_117

VSS_116

VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125

VSS_127

VSS_126

VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135

VSS_137

VSS_136

VSS_138 VSS_139 VSS_140 VSS_141

VSS_143

VSS_142

VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156

VSS_158

VSS_157

VSS_159 VSS_160 VSS_161 VSS_162

VSS_164

VSS_163

VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170

VSS_172

VSS_171

VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179

VSS

(9 OF 10)

VSS_272

VSS_271

VSS_269 VSS_270

VSS_268

VSS_266 VSS_267

VSS_265

VSS_264

VSS_263

VSS_261 VSS_262

VSS_260

VSS_259

VSS_258

VSS_256 VSS_257

VSS_255

VSS_254

VSS_253

VSS_251 VSS_252

VSS_250

VSS_248 VSS_249

VSS_247

VSS_246

VSS_245

VSS_243 VSS_244

VSS_242

VSS_241

VSS_240

VSS_238 VSS_239

VSS_237

VSS_236

VSS_235

VSS_233 VSS_234

VSS_232

VSS_231

VSS_230

VSS_228 VSS_229

VSS_227

VSS_225 VSS_226

VSS_224

VSS_223

VSS_222

VSS_220 VSS_221

VSS_219

VSS_218

VSS_217

VSS_215 VSS_216

VSS_214

VSS_213

VSS_212

VSS_210 VSS_211

VSS_209

VSS_207 VSS_208

VSS_205 VSS_206

VSS_204

VSS_202 VSS_203

VSS_201

VSS_200

VSS_199

VSS_197 VSS_198

VSS_196

VSS_195

VSS_194

VSS_192 VSS_193

VSS_191

VSS_190

VSS_189

VSS_187 VSS_188

VSS_186

VSS_184 VSS_185

VSS_183

VSS_182

VSS_180 VSS_181

VSS_273 VSS_274

VSS_276

VSS_275

VSS_277

VSS_279

VSS_278

VSS_281

VSS_280

VSS_282 VSS_283 VSS_284

VSS_286

VSS_285

VSS_287 VSS_288 VSS_289

VSS_291

VSS_290

VSS_293

VSS_292

VSS_294

VSS_296

VSS_295

VSS_297

VSS_299

VSS_298

VSS_301 VSS_302

VSS_300

VSS_304

VSS_303

VSS_305 VSS_306 VSS_307

VSS_309

VSS_308

VSS_311

VSS_310

VSS_312 VSS_313 VSS_314 VSS_315

VSS_317

VSS_316

VSS_318 VSS_319 VSS_320

VSS_322

VSS_321

VSS_323 VSS_324 VSS_325

VSS_327

VSS_326

VSS_328 VSS_329 VSS_330

VSS_332

VSS_331

VSS_334

VSS_333

VSS_335

VSS_337

VSS_336

VSS_338 VSS_339 VSS_340

VSS_342 VSS_343

VSS_341

VSS_345

VSS_344

VSS_346 VSS_347 VSS_348

VSS_350

VSS_349

VSS_352

VSS_351

VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360

VSS

(10 OF 10)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

U1200

AC41

AA41

AN40

AE34

AC34 C34

AW33

AV33 AR33

AE33

AB33 Y33

V33

AK40

T33 R33

M33 H33

G33

F33 D33

B33

AH32 AG32

AJ40

AF32

AE32 AC32

AB32 G32

B32

AY31 AV31

AN31

AJ31

AH40

AG31

AB31

Y31 AB30

E30 AT29

AN29

AB29 T29

N29

AG40

K29 G29

E29

C29 B29

A29 BA28

AW28

AU28 AP28

AF40

AM28

AD28 AC28

W28

J28 E28

AP27 AM27

AK27

J27

AE40

G27

F27

C27 B27

AN26

M26 K26

F26 D26

AK25

B40

P25 K25

H25

E25 D25

A25

BA24 AU24

AL24 AW23

AY39 AW39

W41

AV39

AR39 AN39

AJ39

AC39 AB39

AA39

Y39

W39

V39

T41

T39

R39

P39 N39

M39

L39 J39

H39 G39

F39

P41

D39 AT38

AM38

AH38 AG38

AF38

AE38

C38

AK37 AH37

M41

AB37

AA37

Y37

W37

V37

T37

R37

P37

N37

M37

J41

L37

J37

H37

G37

F37

D37 AY36

AW36

AN36 AH36

F41

AG36 AF36

AE36

AC36

C36

B36

BA35 AV35

AR35

AH35

AV40

AB35

AA35

Y35

W35

V35

T35

R35

P35

N35

M35

AP40

L35

J35

H35

G35

F35

D35 AN34

AK34

AG34

AF34

OMIT

BGA

945GM

NB

U1200

AT23 AN23

AM23

AH23 AC23

W23 K23

J23

F23 C23

AA22

K22 G22

F22

E22 D22

A22 BA21

AV21

AR21 AN21

AL21

AB21

Y21

P21

K21

J21

H21

C21

AW20

AR20 AM20

AA20

K20

B20

A20

AN19 AC19

W19

K19

G19

C19 AH18

P18

H18

D18

A18

AY17 AR17

AP17 AM17

AK17

AV16 AN16

AL16

J16

F16

C16

AN15 AM15

AK15

N15

M15

L15

B15

A15

BA14 AT14

AK14

AD14 AA14

U14

K14

H14

E14 AV13

AR13

AN13 AM13

AL13

AG13

P13

F13

D13

B13

AY12 AC12

K12

H12

E12

AD11

AA11

Y11

J11 D11

B11

AV10 AP10

AL10 AJ10

AG10

AC10 W10

U10

BA9 AW9

AR9

AH9 AB9

Y9 R9

G9

E9 A9

AG8

AD8 AA8

U8

K8 C8

BA7 AV7

AP7

AL7 AJ7

AH7

AF7 AC7

R7

G7 D7

AG6 AD6

AB6

Y6 U6

N6

K6 H6

B6

AV5 AF5

AD5 AY4

AR4

AP4 AL4

AJ4

Y4 U4

R4

J4 F4

C4 AY3

AW3

AV3 AL3

AH3

AG3 AF3

AD3

AC3 AA3

G3 AT2

AR2

AP2 AK2

AJ2

AD2 AB2

Y2

U2 T2

N2 J2

H2

F2 C2

AL1

OMIT

BGA

945GM

NB

18 97

A

051-7199

NB Grounds

SYNC_MASTER=M1

SYNC_DATE=01/05/2006

Preliminary

IN

NR/FB

IN

EN

OUT

GND

NC

NOISE

GND

VOUT

CONT

VIN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Layout Note: These 2 caps should be within 6.35 mm of NB edge

(MCH LVDS DATA/CLK TX 2.5V PWR)

(MCH LVDS DIGITAL 1.5V PWR)

INTEGRATED GFX (PG. 333)

Power Interface

MCH DISPLAY PLL POWER LDO

GMCH VCCD_LVDS BYPASS

MCH VCCSYNC BYPASS (MCH H/V SYNC 2.5V PWR)

FILTERING REQUIRED FOR

Layout Note: This 0.1uF cap should

GMCH VCCTX_LVDS BYPASS

945 EDS: 5 mOhm, 1nH (1210?)

Layout Note: Place on the edge

MCH VCCA_CRTDAC BYPASS

945 EDS: 1210?

be within 5 mm of NB edge

MCH VCCA_LVDS FILTER

(MCH LVDS ANALOG 2.5V PWR)

Layout Note: Route to caps, then GND

(MCH CRTDAC ANALOG 2.5V PWR)

Layout Note: Route to caps, then GND

MCH VCCA_DPLLA FILTER

(MCH DISPLAY A PLL 1.5V PWR)

(MCH DISPLAY B PLL 1.5V PWR)

GMCH VCCA_DPLL_B FILTER

(MCH TVDAC DIGITAL QUIET 1.5V PWR)

(MCH TVDAC DEDICATED PWR 1.5V)

GMCH VCCD_TVDAC FILTER

GMCH VCCD_QTVDAC FILTER

MCH VCCA_TVDACC FILTER (MCH TV OUT CHANNEL A 3.3V PWR)

(MCH TV OUT CHANNEL B 3.3V PWR)

MCH VCCA_TVDACC FILTER

within 6.35 mm of NB edge

These 8 caps should be

Layout Note:

Layout Note: Route to caps, then GND

(MCH TV DAC BAND GAP 3.3V PWR)

MCH VCCA_TVBG FILTER

MCH VCCA_TVDACC FILTER (MCH TV OUT CHANNEL C 3.3V PWR)

WAS A 330UF ELEC - CHECK WE CAN REMOVE

Layout Note: 3GPLL 10uF cap should be placed in cavity

Layout Note:

close to MCH

Place L and C

1uH, 20%

be within 5 mm of NB edge

be close to MCH

Layout Note: Place in cavity

10uF caps should

on opposite side.

Layout Note: Route to caps, then GND

Should be 1%

These 4 0.1uF caps should

Layout Note:

These are the power signals that leave the NB "block"

Layout Note:

Layout Note: PLACE CAPS NEAR NB EDGE ON THESE 2 RAILS

C1970

1

2

20%

2.5V POLY SMB2

220UF

C1967

1

2

20%

0.22uF

402

6.3V X5R

C1966

1

2

6.3V CERM1 603

10%

2.2UF

C1965

1

2

603

4.7uF

20%

6.3V CERM

C1976

1

2

20%

402

CERM

10V

0.1uF

C1975

1

2

CERM

20%

6.3V

805-1

10UF

R1975

1 2

0.51

1%

402

MF-LF

1/16W

L1975

1 2

1.0UH-220MA-0.12-OHM

0805

C1918

1

2

0.1uF

10V CERM 402

20%

C1915

1

2

0.1uF

20%

402

CERM

10V

C1914

1

2

CERM

20%

6.3V

805-1

10UF

C1916

1

2

10V CERM 402

20%

0.1uF

R1980

1 2

1/16W MF-LF

5%

402

1K

R1981

1

2

402

MF-LF

1/16W

5%

1K

R1983

1

2

MF-LF 402

1/16W

5%

1K

R1982

1 2

5%

402

MF-LF

1/16W

1K

L1970

1 2

91NH

1210

C1921

2

1 3

NFM18

22000pF-1000mA

16V

C1920

1

2

402

20% 10V

CERM

0.1uF

C1923

2

1 3

16V

NFM18

22000pF-1000mA

C1922

1

2

0.1uF

10V

402

20%

CERM

L1922

1 2

0603

180-OHM-1.5A

R1950

1 2

1

5%

MF-LF

402

1/16W

C1953

1

2

6.3V

10%

1UF

CERM 402

R1951

1 2

MF-LF

402

1

5%

1/16W

C1952

1

2

20%

CERM

6.3V

10UF

805-1

C1954

1

2

6.3V

10%

1UF

402

CERM

C1951

1

2

0.01uF

402

10%

CERM

16V

U1900

3

2

1

4

5

TPS73115

SOT23-5

C1950

1

2

6.3V

1UF

10% CERM

402

D1986

16

5

BAT54DW

SOT-363

R1985

1 2

MF-LF

402

1/16W

10

1%

L1985

1 2

180-OHM-1.5A

0603

C1986

2

1 3

NFM18

16V

22000pF-1000mA

C1985

1

2

CERM

402

20% 10V

0.1uF

C1981

1

2

0.01uF

10% 16V

402

CERM

C1980

1

2

10V CERM 402

20%

0.1uF

I243

C1994

2

1 3

16V

NFM18

22000pF-1000mA

C1993

1

2

402

0.1uF

10V

CERM

20%

C1996

2

1 3

16V

22000pF-1000mA

NFM18

C1995

1

2

0.1uF

10V

CERM

402

20%

C1998

2

1 3

NFM18

22000pF-1000mA

16V

C1997

1

2

CERM

402

20% 10V

0.1uF

D1986

43

2

BAT54DW

SOT-363

C1992

2

1 3

NFM18

16V

22000pF-1000mA

C1991

1

2

402

CERM

10V

0.1uF

20%

C1990

1

2

20%

805-1

CERM

6.3V

10UF

L1990

1 2

0603

180-OHM-1.5A

R1990

1 2

1%

1/16W

402

10

MF-LF

C1942

1

2

CERM

6.3V

10%

1UF

402

C1941

1

2

0.01uF

10% 16V CERM 402

U1901

3

2

4

1 5

MM157

SOT23-5-LF

C1940

1

2

6.3V

10%

1UF

402

CERM

C1911

1

2

20% 10V CERM 402

0.1uF

C1910

1

2

20%

CERM

6.3V

805-1

10UF

C1913

1

2

10V CERM 402

20%

0.1uF

C1912

1

2

6.3V

4.7uF

CERM

20%

603

C1917

1

2

0.1uF

CERM

20% 10V

402

I276

C1962

1

2

402

CERM

10V

20%

0.1uF

C1964

1

2

SMB2

220UF

20%

2.5V POLY

C1963

1

2

SMB2

220UF

2.5V POLY

20%

L1910

1 2

0603

180-OHM-1.5A

C1926

1

2

603

X5R

6.3V

20%

10UF

C1927

1

2

10UF

20%

6.3V X5R 603

L1923

1 2

0603

180-OHM-1.5A

C1924

1

2

603

6.3V X5R

20%

10UF

C1987

1

2

10UF

20%

6.3V X5R 603

L1934

1 2

FERR-120-OHM-0.2A

0603

C1907

1

2

402

X5R

6.3V

20%

0.22uF

C1972

1

2

CERM

20%

6.3V

805-1

10UF

C1971

1

2

CERM

20%

6.3V

805-1

10UF

C1906

1

2

402

X5R

6.3V

20%

0.22uF

C1905

1

2

X5R

20%

0.22uF

6.3V

402

C1904

1

2

10%

402

6.3V CERM

1UF

C1937

1

2

402

10V CERM

20%

0.1uF

C1935

1

2

10V

0.1uF

20%

402

CERM

C1934

1

2

22uF

6.3V

20%

805

X5R

L1936

1 2

FERR-120-OHM-0.2A

0603

C1936

1

2

22uF

X5R 805

6.3V

20%

C1903

1

2

10UF

CERM

20%

6.3V

805-1

C1902

1

2

CERM

20%

6.3V

805-1

10UF

SYNC_DATE=(MASTER)

19 97

A

051-7199

SYNC_MASTER=(MASTER)

NB (GM) Decoupling

=PP1V5_S0_NB_VCCD_LVDS

=PP1V5_S0_NB_TVDAC

PP1V5_S0_DPLL

MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.35MM

VOLTAGE=1.5V

PP1V5_S0_NB_QTVDAC

MIN_NECK_WIDTH=0.35MM

MIN_LINE_WIDTH=1.0 mm

VOLTAGE=1.5V

VOLTAGE=1.5V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM

PP1V5_S0_NB_FILT_VCCAUX

=PP1V5_S0_NB =PP1V5_S0_NB_PCIE

=PP1V5_S0_NB_3GPLL

=PP1V05_S0_NB_VTT

GND_NB_VSSA_3GBG

MIN_NECK_WIDTH=0.2 MM

PP1V5_S0_NB_3GPLL_F

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm

MIN_NECK_WIDTH=0.2 MM

PP1V5_S0_NB_VCCA_3GPLL

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm

=PP1V5_S0_NB_3GPLL

=PP1V05_S0_NB_VTT

=PP1V5_S0_NB_PLL

=PP1V05_S0_FSB_NB

=PP2V5_S0_NB_VCCA_3GBG

=PP1V5_S0_NB_VCCAUX

=PP3V3_S0_NB_VCC_HV

MIN_NECK_WIDTH=0.35MM

MIN_LINE_WIDTH=1.0 mm

PP3V3_S0_NB_VCCA_TVDACB

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.35MM

PP3V3_S0_NB_VCCA_TVDACC

MIN_LINE_WIDTH=1.0 mm

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.35MM

PP3V3_S0_NB_VCCA_TVBG

MIN_LINE_WIDTH=1.0 mm

VOLTAGE=3.3V

GND_NB_VSSA_TVBG

PP3V3_S0_NB_VCCA_TVDACA

MIN_NECK_WIDTH=0.35MM

MIN_LINE_WIDTH=1.0 mm

VOLTAGE=3.3V

=PP1V5_S0_NB

PP3V3_S0_NB_TVDAC_FOLLOW

VOLTAGE=3.3V MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.35MM

MM1573DN_NR

=PP5V_S0_NB_TVDAC

MIN_NECK_WIDTH=0.35MM

VOLTAGE=1.5V

PP1V5_S0_NB_VCCA_DPLLB

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_DPLLA

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.35MM

=PP2V5_S0_NB_CRTDAC

=PP2V5_S0_NB_VCCA_LVDS

GND_NB_VSSA_LVDS

=PPVCORE_S0_NB

MEM_VREF_NB_0

=PP1V8_S3_MEM_NB

MEM_VREF_NB_1

=PP2V5_S0_NB_VCC_TXLVDS

=PP5V_S0_NB_TVDAC

MIN_NECK_WIDTH=0.2 MM

PP1V5_S0_NB_VCC3G

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm

PP2V5_S0_NB_CRTDAC_FOLLOW

VOLTAGE=2.5V MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.35MM

PP1V5_S0_NB_VCCA_HPLL

MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.2 MM

VOLTAGE=1.5V

=PP3V3_S0_NB_VCC_HV

=PP3V3_S0_NB

=PP2V5_S0_NB_VCCA_LVDS

=PP2V5_S0_NB_VCCA_3GBG

=PP1V8_S3_MEM_NB

=PP1V5_S0_NB_PLL =PP1V5_S0_NB_TVDAC =PP1V5_S0_NB_VCCD_HMPLL =PP1V5_S0_NB_VCCD_LVDS =PP1V5_S0_NB_VCCAUX

PP2V5_S0_NB_VCCSYNC

=PP1V5_S0_NB_VCCAUX

=PP2V5_S0_NB_VCCSYNC

PP1V5_S0_NB_VCCA_MPLL

MIN_LINE_WIDTH=1.0 mm

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.35MM

MIN_LINE_WIDTH=1.0 mm

PP3V3_S0_NB_TVDAC_F

TPS73115_NR

=PP2V5_S0_NB_VCC_TXLVDS

=PP2V5_S0_NB_DISP_PLL

=PP2V5_S0_NB_VCCSYNC

=PPVCORE_S0_NB

MIN_NECK_WIDTH=0.35MM

MIN_LINE_WIDTH=1.0 mm

PP3V3_S0_NB_TVDAC

VOLTAGE=3.3V

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.35MM

PP1V5_S0_NB_VCCD_QTVDAC

VOLTAGE=1.5V

PP1V5_S0_NB_TVDAC

MIN_LINE_WIDTH=1.0 mm

MIN_NECK_WIDTH=0.35MM

PP1V5_S0_NB_VCCD_TVDAC

MIN_NECK_WIDTH=0.35MM

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm

PP2V5_S0_NB_CRTDAC_F

VOLTAGE=2.5V MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.35MM

MIN_LINE_WIDTH=1.0 mm

VOLTAGE=2.5V

PP2V5_S0_NB_VCCA_CRTDAC

MIN_NECK_WIDTH=0.35MM

GND_NB_VSSA_CRTDAC

=PPVCORE_S0_NB

19

12

19

16

19

20

19

16

19

17

19

17

19

13

19

17

19

17

19

6

17 19

17

19 19

17

16

14

17

19

17

14

17

14

19

17

19

17

6

16

6

16

6

17

6

5

6 6

6

17

6 6

17

6

17

6

5

6

5

6

17

6

17

6

17

6

17

6

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PCIe Backward Interop. Mode

VCC Select

Reversal

DMI Lane

High = Reversed

Low = Normal

High = 1.5V

Low = 1.05V

Internal pull-down

945 External Design Spec says reserved

High = Both active

Low = Only SDVO or PCIe x1

ODT

FSB Dynamic

RESERVED

Low = Disabled

High = Enabled

RESERVED

Internal pull-up

RESERVED

00 = Partial Clock Gating Disable 01 = XOR Mode Enabled 10 = All-Z Mode Enabled 11 = Normal Operation

Internal pull-up

Low = Reversed

RESERVED

CPU Strap

RESERVED

PCIE Graphics

High = Normal

Low = RESERVED

High = DMIx4

Low = DMIx2

NB_CFG<20>

NB_CFG<19>

NB_CFG<9>

NB_CFG<8>

NB_CFG<18>

NB_CFG<17>

NB_CFG<6>

NB_CFG<16>

NB_CFG<15>

NB_CFG<5>

NB_CFG<14>

NB_CFG<13:12>

RESERVED

NB_CFG<3>

NB_CFG<4>

Lane Reversal

PROBABLY NOT NEEDED

DMI x2 Select

Internal pull-up

RESERVED

NB_CFG<7>

High = Mobile CPU

NB_CFG<10>

NB_CFG<11>

RESERVED

Internal pull-up

Internal pull-ups

R2075

1

2

402

5%

2.2K

1/16W MF-LF

NBCFG_DMI_X2

R2085

1

2

2.2K

5% 1/16W MF-LF 402

NBCFG_DYN_ODT_DISABLE

R2058

1

2

402

1/16W

5%

2.2K

NBCFG_VCC_1V5

MF-LF

R2059

1

2

402

MF-LF

1/16W

5%

2.2K

NBCFG_DMI_REVERSE

R2060

1

2

NBCFG_SDVO_AND_PCIE

402

MF-LF

1/16W

5%

2.2K

R2077

1

2

402

MF-LF

1/16W

5%

2.2K

NO STUFF

R2079

1

2

402

MF-LF

1/16W

5%

2.2K

NBCFG_PEG_REVERSE

20 97

A

051-7199

NB Config Straps

SYNC_MASTER=M1

SYNC_DATE=01/05/2006

NB_CFG<9>

NB_CFG<7>

NB_CFG<5>

NB_CFG<16>

NB_CFG<20>

NB_CFG<19>

NB_CFG<18>

=PP3V3_S0_NB

20

19

14

6

Preliminary

IO

IN

OUT

IN

OUT

IN

IO

IO IO

IO

IN

IO

DDACK*

SATARBIASN SATARBIASP

SATA_CLKN SATA_CLKP

SATA_2TXP

SATA_2TXN

SATA_2RXN SATA_2RXP

SATA_0TXP

SATA_0TXN

SATA_0RXP

SATA_0RXN

SATALED*

ACZ_SDOUT

ACZ_SDIN1 ACZ_SDIN2

ACZ_SDIN0

ACZ_SYNC

ACZ_BIT_CLK

LAN_TXD2

LAN_TXD0 LAN_TXD1

LAN_RXD1 LAN_RXD2

LAN_RSTSYNC

LAN_RXD0

LAN_CLK

EE_SHCLK

EE_CS

INTVRMEN

INTRUDER*

RTCRST*

RTCX2

RTCX1

THRMTRIP*

STPCLK*

NMI

SMI*

RCIN*

INTR

INIT*

INIT3_3V*

IGNNE*

GPIO49/CPUPWRGD

FERR*

TP1/DPRSTP*

TP2/DPSLP*

A20M*

CPUSPL*

A20GATE

LFRAME*

LDRQ1*/GPIO23

LDRQ0*

LAD3

LAD2

LAD0 LAD1

EE_DOUT EE_DIN

ACZ_RST*

DIOR*

IDEIRQ

DIOW*

IORDY DDREQ

DD0 DD1

DD3

DD2

DD5

DD4

DD6 DD7 DD8

DD11

DD9

DD10

DD12 DD13 DD14 DD15

DA0 DA1 DA2

DCS3*

DCS1*

AC-97/

AZALIA

RTC

LPC

LAN

CPU

IDE

SATA

(1 OF 6)

OUT

IN

OUT

IN IN

IN

OUT

IN

OUT

IN IN

IN

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L

(INT PU)

(WEAK INT PD)

NOTE: R2108=56 IN CV.

BOM CONSOLIDATION

CHANGED TO 54.9 FOR

NOTE: R2110=56 IN CV.

NOTE: PULLED UP PER INTEL

NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU

INTEL CONFIRMS OK TO LEAVE PINS AS NC

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

INTO RESET STATE TO SAVE PWR.

NOTE: POR IS SMC WILL PUT LAN INT’F

NOTE: KEYBOARD CONTROLLER RESET CPU

NOTE: RISING-EDGE TRIGGERED AT CPU

BOM CONSOLIDATION

< 2 IN OF SB

LAYOUT NOTE: R2107 TO BE

CHANGED TO 54.9 FOR

LAYOUT NOTE: R2108 TO BE < 2 IN OF R2107 W/O STUB

(DSTROBE)

20K PD

(STOP)

(HSTROBE)

NOTE: DD<7> HAS INTERNAL 11.5K PD

NOTE: ENABLE INTERNAL 1.05V SUSPEND REG

INTERNAL 20K PD ONLY ENABLED IN S3COLD

INTERNAL 20K PD

NONE

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

INTERNAL 20K PD ENABLED WHEN

INTERNAL 20K PD

INTERNAL 20K PD ENABLED DURING RESET AND WHEN

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

AC ’07

INTERNAL 20K PD

INTERNAL 20K PD ENABLED WHEN

ACZ_SDIN[0-2]

ACZ_RST#

ACZ_BIT_CLK

ACZ_SYNC

ACZ_SDOUT

INTEL HIGH DEFINITION AUDIO

NOTE: LAD<0-3> HAVE INTERNAL 20K PU

NOTE: DDREQ HAS INTERNAL 11.5K PD

LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S

(WEAK INT PU)

R2100

1 2

402

5%

0

MF-LF 1/16W

NOSTUFF

R2101

1 2

MF-LF

1/16W

5%

2.2K

402

NOSTUFF

R2195

1 2

1/16W

402

39

5%

MF-LF

R2198

1 2

39

R2197

1 2

39

R2196

1 2

39

R2199

1

2

MF-LF

1/16W

5%

10K

402

U2100

AE22 AH28

U1

R5 T2 T3 T1

T4

R6

AG27

AH17 AE17 AF17

AE16 AD16

AB15 AE14

AB13 AC14 AF14 AH13 AH14 AC15

AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12

AF16

AE15

AF15 AH15

W1

W3

Y2

Y1

AG26

AG24

AH16

AG22

AF22

AG21

AF25

Y5 W4

AG16

AA6 AB5 AC4 Y6

V3

U3

U5 V4 T5

U7 V6 V7

AC3 AA5

AB3

AH24

AG23

AA3

AB1 AB2

AF3 AE3 AG2 AH2

AF7 AE7 AG6 AH6

AF1 AE1

AF18

AH10 AG10

AF23

AH22

AF26

AF24 AH25

OMIT

ICH7-M

SB

BGA

R2194

1

2

MF-LF

1/16W

5%

10K

402

R2105

1

2

MF-LF

1/16W

1%

402

332K

R2107

1 2

402

1%

1/16W

MF-LF

24.9

R2108

1

2

54.9

1%

1/16W

MF-LF

402

R2110

1 2

1%

54.9

402

1/16W

MF-LF

SB: 1 OF 4

SYNC_DATE=01/05/2006

SYNC_MASTER=M38

051-7199

9721

A

IDE_PDD<3>

IDE_PDD<2>

TP_SB_XOR_V3

TP_SB_XOR_W3

TP_SB_XOR_T5

TP_SB_XOR_V4

TP_SB_XOR_U5

TP_SB_XOR_U3

PP3V3_S5_SB_RTC

ACZ_RST_L

ACZ_BITCLK

SB_RTC_RST_L

SB_RTC_X2

LPC_FRAME_L

TP_SB_GPIO23

TP_SB_DRQ0_L

LPC_AD<3>

LPC_AD<2>

LPC_AD<1>

LPC_AD<0>

=PP3V3_S0_SB_GPIO

IDE_PDD<6>

ACZ_SDATAOUT

PM_THRMTRIP_L

=PP1V05_S0_SB_CPU_IO

SMC_RCIN_L

ACZ_SYNC

IDE_PDCS1_L IDE_PDCS3_L

IDE_PDA<2>

IDE_PDA<1>

IDE_PDA<0>

IDE_PDD<15>

IDE_PDD<14>

IDE_PDD<13>

IDE_PDD<12>

IDE_PDD<10>

IDE_PDD<9>

IDE_PDD<11>

IDE_PDD<8>

IDE_PDD<7>

IDE_PDD<4> IDE_PDD<5>

IDE_PDD<1>

IDE_PDD<0>

IDE_PDDREQ

IDE_PDIORDY

IDE_PDIOW_L

IDE_IRQ14

IDE_PDIOR_L

SB_ACZ_RST_L

TP_CPU_CPUSLP_L

CPU_A20M_L

CPU_DPSLP_L

CPU_DPRSTP_L

CPU_PWRGD

CPU_IGNNE_L

FWH_INIT_L CPU_INIT_L

CPU_INTR

CPU_SMI_L

CPU_NMI

CPU_STPCLK_L

CPU_THERMTRIP_R

SB_RTC_X1

SB_SM_INTRUDER_L

SB_ACZ_BITCLK SB_ACZ_SYNC

ACZ_SDATAIN<0>

TP_SB_ACZ_SDIN2

TP_SB_ACZ_SDIN1

SB_ACZ_SDATAOUT

TP_SB_SATALED_L

SATA_A_D2R_N SATA_A_D2R_P SATA_A_R2D_C_N SATA_A_R2D_C_P

SATA_C_D2R_N

SATA_C_R2D_C_N SATA_C_R2D_C_P

SB_CLK100M_SATA_P

SB_CLK100M_SATA_N

SATA_RBIAS_P

SATA_RBIAS_N

IDE_PDDACK_L

SATA_C_D2R_P

CPU_RCIN_L

SB_A20GATE

CPU_FERR_L

=PP1V05_S0_SB_CPU_IO

SB_INTVRMEN

TP_SB_XOR_W1 TP_SB_XOR_Y1 TP_SB_XOR_Y2

TP_SB_XOR_U7 TP_SB_XOR_V6 TP_SB_XOR_V7

26

27

27 25

25

67

23

59

24

60

21

14

21

38

7

75

7

60

7

34

21

38

5

68

26

58

6

38

68

7

6

58 68

38

5

38

5

38

5

7

5

59

5

26

68

38

5

38

7

6

Preliminary

IN

IO

IN

OUT

IN

IN IN

IN

OUT OUT

OUT

IO

IO IO

IN

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IN

OUT

IN

OUT

IO

DMI_ZCOMP

DMI_CLKP

DMI_IRCOMP

USBRBIAS*

USBRBIAS

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI2TXN DMI2TXP

DMI3RXN

DMI3TXP

DMI3TXN

DMI3RXP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P

USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P

USBP4N

OC0* OC1* OC2* OC3* OC4*

OC6*/GPIO30

OC5*/GPIO29

SPI_CLK SPI_CS*

SPI_MOSI SPI_MISO

SPI_ARB

DMI_CLKN

DMI2RXP

DMI2RXN

DMI1TXP

DMI1TXN

DMI1RXN DMI1RXP

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

OC7*/GPIO31

PCI-EXP

(3 OF 6)

DMI

SPI

USB

REQ4*/GPIO22

REQ0*

MCH_SYNC*

RSVD8

RSVD7

RSVD6

RSVD5

RSVD4

GPIO5/PIRQH*

GPIO4/PIRQG*

GPIO3/PIRQF*

GPIO2/PIRQE*

GPIO17/GNT5*

GPIO1/REQ5*

GNT4*/GPIO48

C/BE0* C/BE1*

DEVSEL*

PERR*

STOP*

PCIRST*

PME*

PLTRST*

TRDY*

FRAME*

IRDY*

PCICLK

PAR

PLOCK*

SERR*

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE2* C/BE3*

GNT0* REQ1* GNT1* REQ2* GNT2* REQ3* GNT3*

PIRQA* PIRQB* PIRQC* PIRQD*

RSVD0 RSVD1 RSVD2 RSVD3

MISC

INT I/F

PCI

(2 OF 6)

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

IN

IO

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

AND PWROK=H

ENABLED ONLY WHEN PCIRST#=0

GNT[0-3]# HAVE INT 20K PU

NOTE: R2210 WAS PD ON PIN A14 = FWH_TBL_L

BOM NOTE FOR PD ON PCI_GNT3_L:

IR

BT

CF/SD

CAMERA

AIRPORT (MINI-PCIE)

EXTERNAL 2

EXTERNAL 1

EXTERNAL 0

NOTE:

STUFF - A16 SWAP OVERRIDE

NO STUFF - DEFAULT

(STRAPPED TO TOP-BLOCK SWAP MODE IE SB INVERTS A16 FOR ALL CYCLES TARGETING FWH BIOS SPACE)

SB BOOT BIOS SELECT

GNT4#GNT5#

TO RSVD[1-9]

NOTE: CHANGE SYMBOL

(INT 20K PU)

R2210STRAP

11

10

01

STUFF

UNSTUFF

UNSTUFF UNSTUFF

STUFF

UNSTUFF

SPI

PCI

LPC (DEFAULT)

NOTE:

LAYOUT NOTE: PLACE R2203 < 1/2 IN FROM SB

LAYOUT NOTE: PLACE R2204 < 1/2 IN FROM SB

GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

(AKA TP3, INTERNAL 20K PU)

(INT PD)

GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD

NOTE: FWH_WP_L NOT USED

R2211

R2203

1 2

1%

MF-LF

24.9

402

1/16W

R2222

1

2

402

5% MF-LF

1/16W

10K

R2204

1 2

MF-LF

1/16W

1%

22.6

402

R2223

1

2

402

MF-LF

10K

5% 1/16W

R2225

1

2

402

MF-LF

1/16W

5%

10K

R2226

1

2

5%

10K

1/16W MF-LF 402

R2299

1

2

402

MF-LF

1/16W

5%

10K

U2100

V26 V25 U28 U27

Y26 Y25 W28 W27

AB26 AB25 AA28 AA27

AD25 AD24 AC28 AC27

AE28 AE27

D25

C25

D3 C4 D5 D4 E5 C3 A2 B3

F26

H26

K26

M26

P26

T25

F25

H25

K25

M25

P25

T24

E28

G28

J28

L28

N28

R28

E27

G27

J27

L27

N27

R27

P1

R2 P6

P2

P5

F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3

D1

D2

ICH7-M

SB

BGA

OMIT

U2100

E18 C18

E14 D14 B12 C13 G15 G13 E12 C11 D11 A11

A16

A10 F11 F10

E9 D9 B9 A8 A6 C7 B6

F18

E6 D6

E16 A18 E17 A17 A15 C14

B15 C12 D12 C15

A12

F16

E7

D16

D17

F13

A14 C8 D8

G8 F7 F8 G7

A7

AH20

E10 A9

B18

C9

A3 B4 C5 B5

E11

C26

B19

D7

C16

C17

E13

A13

AE5 AD5 AG4 AH4 AD9

AE9 AG8 AH8 F21

B10 F15 F14

SB

ICH7-M

BGA

OMIT

R2200

1

2

1/16W

10K

402

5% MF-LF

R2250

1

2

1/16W

10K

5% MF-LF

402

R2251

1

2

402

MF-LF

1/16W

5%

10K

R2255

1

2

402

10K

5% 1/16W MF-LF

R2298

1

2

10K

5% 1/16W MF-LF 402

R2205

1

2

1/16W

10K

5%

402

MF-LF

R2206

1

2

NOSTUFF

1/16W

5%

MF-LF

10K

402

R2207

1

2

5%

402

10K

1/16W

MF-LF

VOLTAGE=0

R2211

1

2

402

1K

5% MF-LF

1/16W

051-7199

9722

A

SB: 2 OF 4

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

=PP3V3_S5_SB_USB

=PP3V3_S0_SB

TP_SB_XOR_AH8

TP_SB_XOR_AG8

TP_SB_XOR_AE9TP_SB_XOR_AE5

TP_SB_XOR_AD9

TP_SB_XOR_AH4

TP_SB_XOR_AG4

TP_SB_XOR_AD5

INT_PIRQD_L

USB_H_P

SPI_ARB

SB_GPIO29

USB_C_OC_L USB_D_OC_L USB_E_OC_L

USB_B_OC_L

USB_A_OC_L

USB_C_OC_L

=PP3V3_S5_SB_IO

PP1V5_S0_SB_VCC1_5_B

PCIE_F_R2D_C_P

PCIE_F_R2D_C_N

PCIE_F_D2R_P

PCIE_F_D2R_N

PCIE_E_R2D_C_P

PCIE_E_R2D_C_N

PCIE_E_D2R_P

PCIE_E_D2R_N

PCIE_D_R2D_C_P

PCIE_D_R2D_C_N

PCIE_D_D2R_P

PCIE_D_D2R_N

PCIE_C_R2D_C_P

PCIE_C_R2D_C_N

PCIE_C_D2R_P

PCIE_C_D2R_N

PCIE_B_R2D_C_P

PCIE_B_R2D_C_N

PCIE_B_D2R_P

PCIE_B_D2R_N

PCIE_A_R2D_C_P

PCIE_A_R2D_C_N

PCIE_A_D2R_P

PCIE_A_D2R_N

DMI_N2S_P<1>

DMI_N2S_N<1>

DMI_S2N_N<1> DMI_S2N_P<1>

DMI_N2S_N<2> DMI_N2S_P<2>

SB_CLK100M_DMI_N

SB_GPIO29 SB_GPIO30

USB_E_N

USB_H_N

USB_G_P

USB_G_N

USB_F_P

USB_F_N

USB_E_P

USB_D_P

USB_D_N

USB_C_P

USB_C_N

USB_B_P

USB_B_N

USB_A_P

USB_A_N

DMI_N2S_P<3> DMI_S2N_N<3> DMI_S2N_P<3>

DMI_N2S_N<3>

DMI_S2N_P<2>

DMI_S2N_N<2>

DMI_S2N_P<0>

DMI_S2N_N<0>

DMI_N2S_P<0>

DMI_N2S_N<0>

USB_RBIAS_PN

SB_CLK100M_DMI_P

DMI_IRCOMP_R

INT_PIRQC_L

INT_PIRQB_L

INT_PIRQA_L

TP_PCI_GNT0_L

PCI_C_BE_L<3>

PCI_C_BE_L<2>

PCI_AD<31>

PCI_AD<30>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<23>

PCI_AD<22>

PCI_AD<21>

PCI_AD<20>

PCI_AD<19>

PCI_AD<18>

PCI_AD<17>

PCI_AD<16>

PCI_AD<15>

PCI_AD<14>

PCI_AD<13>

PCI_AD<12>

PCI_AD<11>

PCI_AD<10>

PCI_AD<9>

PCI_AD<8>

PCI_AD<5>

PCI_AD<4>

PCI_AD<3>

PCI_AD<2>

PCI_AD<1>

PCI_AD<0>

PCI_SERR_L

PCI_LOCK_L

PCI_PAR

PCI_CLK_SB

PCI_IRDY_L

PCI_FRAME_L

PCI_TRDY_L

PLT_RST_L

TP_PCI_PME_L

PCI_RST_L

PCI_STOP_L

PCI_PERR_L

PCI_DEVSEL_L

PCI_C_BE_L<1>

PCI_C_BE_L<0>

SB_GPIO2 SB_GPIO3 SB_GPIO4

TP_SB_RSVD9

NB_SB_SYNC_L

PCI_REQ0_L

SPI_CE_L

SB_GPIO31

USB_A_OC_L

USB_E_OC_L

USB_B_OC_L

USB_D_OC_L

SPI_SI

SB_GPIO_48

ODD_PWR_EN_L

SPI_SCLK

SPI_SO

SB_GPIO31

PCI_GNT1_L

BOOT_LPC_SPI_L

PCI_PME_FW_L

PCI_GNT3_L

PCI_REQ2_L

TP_PCI_GNT2_L PCI_AD<6> PCI_AD<7>

PCI_REQ3_L

SB_CRT_TVOUT_MUX

PCI_REQ1_L

SB_GPIO30

25

44

58

47

27

25

54

34

14

34

44

34

44

38

63

47

63

60

27

6

26

47

5

22

6

24

54

5

54

5

14

5

22

47

5

47

53

47

14

5

26

44

26

44

5

26

6

44

26

44

26

14

26

58

22

58

94

26

58

22

27

58

44

27

26

44

26

96

26

22

Preliminary

IN

OUT

OUT OUT

OUT

IN

IO

OUT OUT

OUT

IN

IO

IN

IO

IN

OUT

IO

IN

OUT

IN

OUT

IN

OUT

GPIO19/SATA1GP

GPIO21/SATA0GP

GPIO36/SATA2GP

CLK48

GPIO37/SATA3GP

CLK14

SUSCLK

SLP_S3* SLP_S4* SLP_S5*

PWROK

TP0/BATLOW*

GPIO16/DPRSLPVR

PWRBTN*

LAN_RST*

RSMRST*

GPIO10

GPIO9

GPIO12

GPIO14

GPIO13

GPIO24

GPIO15

GPIO25 GPIO35 GPIO38 GPIO39

SMBCLK SMBDATA LINKALERT*

SMLINK1

SMLINK0

RI*

SYS_RST*

SPKR SUS_STAT*

GPIO0/BM_BUSY*

GPIO18/STPPCI*

GPIO11/SMBALERT*

GPIO20/STPCPU*

GPIO26

GPIO28

GPIO27

GPIO32/CLKRUN*

GPIO33/AZ_DOCK_EN*

WAKE*

GPIO34/AZ_DOCK_RST*

SERIRQ THRM*

GPIO7

GPIO6

VRMPWRGD

GPIO8

(4 OF 6)

SMB

GPIO

PWR MNGT

SYS GPIO

CLKS

SATA GPIO

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS

- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)

AZALIA DOCKING INT’F

RESERVED FOR MOBILE

SYSTEM REBOOT FEATURE

STRAPPING @ PWROK RISING: SB WILL DISABLE TCO TIMER

NOTE FOR R2323 (DEF=NOSTUFF)

NOT USED

NOTE: RESERVED FOR FUTURE

(INT WEAK PD)

LAYOUT NOTE: PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE

NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN

NOTE FOR GPIO25:

(INT 20K PU)

OD

DEF=GPI

IN RESET STATE TO SAVE PWR

SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’F

NOTE:

NOTE: SV_SET_UP IS LINDACARD DETECT

LO = NOT PRESENT

HI = PRESENT

R2302

1 2

100

R2303

1 2

100

R2305

1 2

100

R2306

1

2

NOSTUFF

402 5%

MF-LF

1/16W

10K

R2307

1

2

10K

402 5%

MF-LF

1/16W

R2308

1

2

402

1/16W MF-LF

5%

10K

R2309

1

2

5%

MF-LF

1/16W

0

402

NOSTUFF

R2310

1

2

402 5%

MF-LF

1/16W

10K

R2311

1

2

1/16W MF-LF

5%

NOSTUFF

402

10K

R2313

1

2

10K

1/16W MF-LF

5%

402

R2314

1

2

402

NOSTUFF

0

1/16W MF-LF

5%

R2316

1

2

402

10K

1/16W MF-LF

5%

R2317

1

2

402

10K

1/16W MF-LF

5%

R2318

1

2

10K

402

1/16W MF-LF

5%

R2319

1

2

402 5%

MF-LF

1/16W

10K

R2320

1

2

402 5%

MF-LF

1/16W

10K

RP2300

1 2 3 4

8 7 6 5

1/16W

5%

10K

SM-LF

R2399

1 2

5%

402

MF-LF

1/16W

100K

R2398

1

2

1/16W MF-LF

5%

402

1K

R2397

1

2

5%

MF-LF

1/16W

8.2K

402

R2396

1

2

MF-LF 5%

1/16W

10K

402

R2395

1

2

8.2K

1/16W MF-LF

402 5%

U2100

AC1 B2

AB18

A20

B23

F19 E19 R4 E22

AC22

AC20

AH18

AF21

AF19

R3 D20

A21

B21 E23

AG18

AC19

U2

AD21

AH19 AE19

AD20 AE20

AC21 AC18

E21

E20

C19

A26

C23

AA4

A28

Y4

AH21

B24 D23 F22

C22 B22

B25 A25

A19 A27

C20

A22

AF20

C21

AD22

F20

ICH7-M

SB

BGA

OMIT

R2390

1

2

402

10K

5% 1/16W MF-LF

R2388

1

2

402

1/16W MF-LF

5%

10K

R2387

1

2

402 5%

MF-LF

1/16W

10K

NOSTUFF

R2323

1

2

MF-LF 5%

1/16W

NO_REBOOT_MODE

402

1K

R2326

1

2

NOSTUFF

1/16W 402

5%

MF-LF

10K

R2327

1

2

NOSTUFF

5%

MF-LF

1/16W 402

10K

R2343

1

2

5%

402

8.2K

1/16W MF-LF

SB: 3 OF 4

051-7199

9723

A

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

PM_DPRSLPVR

=PP3V3_S0_SB_GPIO

INT_SERIRQ

PM_BATLOW_L

PM_RSMRST_L

SMC_WAKE_SCI_L

PM_STPPCI_L PM_STPCPU_L

PM_CLKRUN_L

PCIE_WAKE_L

PM_THRM_L

SMC_RUNTIME_SCI_L SMC_EXTSMI_L

SV_SET_UP

SMB_CLK

SATA_C_DET_L

SB_GPIO19

SB_GPIO21

SB_GPIO37

PM_SLP_S4_L PM_SLP_S5_L

PM_SB_PWROK

PM_PWRBTN_L

PM_LAN_ENABLE

SV_SET_UP

TP_SB_GPIO25_DO_NOT_USE

SB_CLK100M_SATA_OE_L

SATA_C_PWR_EN_L

SMB_LINK_ALERT_L

SMLINK<1>

SMLINK<0>

PM_RI_L

PM_SYSRST_L

PM_SUS_STAT_L

BIOS_REC

TP_AZ_DOCK_EN_L

VR_PWRGD_CK410

=PP3V3_S5_SB

IDE_RESET_L

TP_SB_GPIO6

TP_SB_GPIO38

CRB_SV_DET

=PP3V3_S5_SB

FWH_MFG_MODE

BIOS_REC

SMC_SB_NMI

PATA_PWR_EN_L

SMS_INT_L

CRB_SV_DET

=PP3V3_S0_SB_GPIO

SATA_C_PWR_EN_L

=PP3V3_S5_SB

PATA_PWR_EN_L

TP_AZ_DOCK_RST_L

FWH_MFG_MODE

PM_BMBUSY_L

SB_SPKR

SMB_DATA

=PP3V3_S5_SB

SMB_ALERT_L

SB_GPIO26

SB_CLK14P3M_TIMER SB_CLK48M_USBCTLR

SUS_CLK_SB

PM_SLP_S3_L

=PP3V3_S5_SB_PM

67

27

60

26

27

26

80

23

67

58

67

25

23

25

79

75

21

60

44

53

58

60

77

60

26

60

23

58

21

23

34

77

11

14

6

58

33

5

41

10

58

23

27

38

58

26

58

23

33

23

5

58

23

26

6

38

23

6

23

58

23

26

23

6

23

6

23

14

27

6

5

59

58

6

Preliminary

(6 OF 6)

VSS

V5REF_SUS

VCC3_3

VCCDMIPLL

VCCSATAPLL

VCC3_3

VCCRTC

VCCUSBPLL

VCCSAUS1_5

VCC PAUX

USB CORE

VCC1_5_A

ARX

USB

PCI

IDE

VCCA3GP

CORE

ATX

VCC1_5_A

VCC3_3

VCCSUS3_3

VCC1_5_A

VCCSUS3_3

VCC1_5_A

VCCLAN1_5

V_CPU_IO

VCC3_3/VCCHDA

VCCSUS3_3/VCCSUSHDA

VCCLAN_3_3

VCC1_05

V5REF

VCC1_5_B

(5 OF 6)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE FOR VCCLAN_3_3: S3 IF INTERNAL LAN IS USED S0 OR S3 IF NOT

CHANGE SYMBOL TO 1.05

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

NOTE: VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V DEPENDING ON VIO OF AZALIA INTERFACE CODEC IC’S CONSIDERED SO FAR ARE 3.3V

0 0

U2100

A4

A23

B1

B8 B11 B14 B17 B20 B26 B28 C2 C6 C27

D10

D13 D18 D21 D24 E1 E2 E4 E8 E15 F3

F4

F5 F12 F27 F28 G1 G2 G5 G6 G9 G14

G18

G21 G24 G25 G26 H3 H4 H5 H24 H27 H28

J1

J2 J5 J24 J25 J26 K24 K27 K28 L13 L15

L24

L25 L26 M3 M4 M5 M12 M13 M14 M15 M16

M17

M24 M27 M28 N1 N2 N5 N6 N11 N12 N13

N14

N15

N16 AE24 AE25

AF2 AF4

AF8 AF11 AF27 AF28

N17

AG1

AG3

AG7

AG11 AG14 AG17 AG20 AG25 AH1 AH3

N18

AH7 AH12 AH23 AH27

N24

N25

N26

P3

P4 P12 P13 P14 P15 P16 P17

P24

P27 P28

R1 R11 R12 R13 R14 R15 R16 R17

R18

T6 T12 T13 T14 T15 T16 T17

U4 U12 U13

U14

U15 U16 U17 U24 U25 U26

V2 V13 V15 V24

V27

V28

W6 W24 W25 W26

Y3 Y24 Y27 Y28 AA1

AA24

AA25 AA26

AB4 AB6

AB11 AB14 AB16 AB19 AB21 AB24

AB27

AB28

AC2 AC5 AC9

AC11

AD1

AD3 AD4 AD7 AD8

AD11

AD15 AD19 AD23 AE2 AE4 AE8 AE11 AE13 AE18 AE21

SB

ICH7-M

BGA

OMIT

U2100

G10

AD17

F6

AE23 AE26 AH26

L11

P18 T11 T18 U11 U18 V11 V12 V14 V16 V17

L12

V18

L14 L16 L17 L18 M11 M18 P11

AB7 AC6

AB9 AC10 AD10 AE10 AF10

AF9

AG9

AH9

AB17 AC17

AC7

T7 F17 G17

AB8 AC8

A1 H6 H7 J6 J7

AD6

AE6

AF5

AF6

AG5

AH5

AB10

AA22 AA23

AD28

D26

D27

D28

E24

E25

E26

F23

F24

G22

AB22

G23

H22

H23

J22

J23

K22

K23

L22

L23

M22

AB23

M23

N22

N23

P22

P23

R22

R23

R24

R25

R26

AC23

T22

T23

T26

T27

T28

U22

U23

V22

V23

W22

AC24

W23

Y22

Y23

AC25 AC26 AD26 AD27

U6

B27

AH11

AG19

A5 B13 B16 B7 C10 D15 F9 G11 G12

AA7

G16

AB12 AB20 AC16 AD13 AD18 AG12 AG15

AG28

AA2

Y7

V5 V1 W2 W7

W5

AD2

K7

C28 G20

R7

P7

A24

L1 L2 L3 L6 L7 M6 M7 N7

E3

C24 D19 D22 G19

K3 K4 K5 K6

C1

ICH7-M

SB

BGA

OMIT

051-7199

9724

A

SYNC_MASTER=M38

SYNC_DATE=01/05/2006

SB: 4 OF 4

PP1V5_S0_SB_VCC1_5_B

PP5V_S0_SB_V5REF

PP5V_S5_SB_V5REF_SUS

=PPVCORE_S0_SB

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA

=PP1V05_S0_SB_CPU_IO

=PP3V3_S0_SB_VCC3_3

PP1V5_S0_SB_VCCDMIPLL

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB_VCCSATAPLL

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S0_SB_VCC3_3_PCI

PP3V3_S5_SB_RTC

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP1V5_S0_SB_VCC1_5_A

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCCUSBPLL

26

25

21

24

25

24

25

24

25

21

24

25

22

25

6

25

6

5

6

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

A24 ... G19 AND P7 OF SB

PLACE < 2.54MM OF SB ON

PLACEMENT NOTE:

SECONDARY SIDE OR 3.56MM ON PRIMARY

152S0315

1UH,0.5A,20%,1206

PLACE NEAR PINS AE23, AE26 & AH26 OF SB

AB8 AND AC8 OF SB

PLACEMENT NOTE: PLACE CAPS NEAR PINS

K3 ... N7 OF SB

PLACEMENT NOTE: PLACE CAPS NEAR PINS

PLACEMENT NOTE: PLACE CAPS AT EDGE OF SB

PLACEMENT NOTE: PLACE CAPS NEAR PIN W5 OF SB

PLACEMENT NOTE: PLACE C2520 NEAR PIN C1 OF SB

PLACEMENT NOTE: DISTRIBUTE IN PCI SECTION OF SB NEAR PINS A5 ... G16

PLACEMENT NOTE:

PLACEMENT NOTE: PLACE C2520 NEAR PIN E3 OF SB

V5, W2, OR W7

PLACE CAP UNDER SB NEAR PINS V1,

PLACEMENT NOTE:

PLACE C2509 NEAR PIN B27 OF SB

PLACEMENT NOTE:

NEAR PINS D28, T28, AD28

PLACEMENT NOTE: PLACE C2503 < 2.54MM OF PIN AD17 OF SB ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2504 < 2.54MM OF PIN F6 OF SB ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2500 & C2505-07 < 2.54MM OF SB ON SECONDARY SIDE OR 3.56MM ON PRIMARY

3.56MM ON PRIMARY NEAR PIN AG9

3.56MM ON PRIMARY NEAR PIN AH11

3.56MM ON PRIMARY NEAR PIN AD2

PLACE < 2.54MM OF SB ON SECONDARY OR

3.56MM ON PRIMARY NEAR PIN U6

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS AA7 ... AG19

PLACEMENT NOTE: PLACE < 2.54MM OF SB ON SECONDARY OR

3.56MM ON PRIMARY NEAR PINS A1 ... J7

PLACEMENT NOTE:

155S0247

100-OHM,4A,0805

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PIN AG5

C2500

1

2

SMB2

2.5V POLY

20%

220UF

C2510

1

2

X5R

16V

10%

0.1UF

402

0

C2512

1

2

402

0.1UF

10% 16V X5R

0

R2500

1 2

1/10W

603

1

5%

MF-LF

D2501

1

3

BAT54E3

SOT23

D2500

1

3

BAT54E3

SOT23

C2524

1

2

603

CERM

6.3V

20%

4.7UF

C2540

1

2

402

0.1UF

10% 16V X5R

C2541

1

2

1UF

10% CERM

6.3V 402

C2542

1

2

X5R

16V

10%

0.1UF

402

C2503

1

2

16V

0.1UF

402

10% X5R

0

C2504

1

2

402

0.1UF

10% 16V X5R

0

R2501

1 2

1%

10

402

1/16W MF-LF

L2500

1 2

SM-3

100-OHM-EMI

0

C2505

1

2

0.1UF

10% 16V X5R 402

C2506

1

2

X5R

16V

10%

0.1UF

402

C2507

1

2

0.1UF

10% 16V X5R 402

L2507

1 2

0.28-OHM

1206

C2501

1

2

0.01UF

10% 16V CERM 402

C2508

1

2

20%

6.3V CERM 805-1

10UF

0

C2509

1

2

0.1UF

10% 16V X5R 402

0

C2511

1

2

402

X5R

16V

10%

0.1UF

0

C2517

1

2

0.1UF

402

X5R

16V

10%

0

C2513

1

2

0.1UF

10% 16V X5R 402

0

C2514

1

2

402

6.3V CERM

10%

1UF

0

C2520

1

2

CERM

0.01UF

402

16V

10%

C2515

1

2

CERM

0.01UF

10% 16V

402

0

C2516

1

2

CASE-C2

POLY

330UF

20%

2.5V

R2502

1

2

5%

1/16W 402

MF-LF

100

C2502

1

2

1UF

10% CERM

6.3V 402

C2518

1

2

402

0.1UF

10% 16V X5R

0

C2519

1

2

X5R

16V

10%

0.1UF

402

0

C2521

1

2

402

0.1UF

10% 16V X5R

0

C2522

1

2

0.1UF

16V X5R 402

10%

C2523

1

2

X5R

16V

10%

0.1UF

402

0

C2525

1

2

X5R

16V

10%

0.1UF

402

0

C2526

1

2

0.1UF

16V X5R

10%

402

C2527

1

2

402

0.1UF

10% 16V X5R

C2528

1

2

X5R

16V

10%

0.1UF

402

C2529

1

2

402

0.1UF

10% 16V X5R

0

C2530

1

2

402

0.1UF

10% 16V X5R

C2534

1

2

402

0.1UF

10% 16V X5R

0

C2531

1

2

402

0.1UF

10% 16V X5R

C2532

1

2

402

0.1UF

10% 16V X5R

0

C2533

1

2

402

0.1UF

10% 16V X5R

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

SB:DECOUPLING

A

25 97

051-7199

VOLTAGE=1.5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP1V5_S0_SB_VCC1_5_B

=PP1V05_S0_SB_CPU_IO

=PP3V3_S0_SB

=PP5V_S0_SB

=PP3V3_S5_SB

=PP1V5_S0_SB

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB_VCCSATAPLL

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP3V3_S0_SB_VCC3_3

=PP3V3_S5_SB_VCCSUS3_3

=PPVCORE_S0_SB

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S0_SB_VCC3_3_IDE

=PP1V5_S0_SB_VCC1_5_A

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP5V_S0_SB_V5REF

=PP1V5_S0_SB

PP1V5_S0_SB_VCCDMIPLL

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=1.5V

PP1V5_S0_SB_R

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=1.5V

=PP1V5_S0_SB_VCCUSBPLL

PP3V3_S5_SB_RTC

=PP3V3_S0_SB_VCC3_3_PCI

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP5V_S5_SB_V5REF_SUS

=PP5V_S5_SB

26

24

26

25

24

21

22

23

25

24

25

24

21

24

22

6

24

6

24

6

5

6

24

6

Preliminary

OUT

IO

IN

IO

IO IO

OUT

IN

OUT

IN

VCC

GND

IN

OUT

IN

OUT

IO IO

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

USING 1% FOR BOM CONSOLIDATION

PLACE R2603 IN ACCESSIBLE LOCATION

FLASH DURING DEVELOPMENT

RESET_L IN CASE OF BAD SMC

PROVIDE PADS TO SHORT THIS

RESISTOR TO GND USED TO

RESET

NOTE: ISL6262 SPEC (P 5) SAID TO USE 1.9K

SHOULD BE STUFFED WITH ITP & NO DEVELOPMENT

NOTE: R2696 CAN’T EXIST WITH BOTH ITP & DEVELOPMENT

0

R2600

1 2

MF-LF

1/16W

402

20.0K

1%

D2600

1 3

SOT23

BAT54E3

D2601

1 3

SOT23

BAT54E3

U2603

2

3

5

4

74LVC1G04DBVG4

SOT23-5

C2611

1 2

0.1UF

CERM

10V

20%

402

C2605

1

2

1UF

402

CERM

6.3V

10%

SW2600

1 2

3 4

DEVELOPMENT

SM-LF

SPST

R2699

1

2

402

1/16W

5% MF-LF

10K

DEVELOPMENT

0

U2699

1

2 3

4

MAX6816

SOT143

DEVELOPMENT

C2699

1

2

0.1UF

CERM

10V

20%

DEVELOPMENT

402

R2698

1

2

100K

5% 1/16W MF-LF 402

DEVELOPMENT

C2698

1

2

402

CERM

10V

DEVELOPMENT

20%

0.1UF

R2606

1

2

MF-LF

1/16W

1M

402

1%

R2697

1

2

10K

5% 1/16W MF-LF 402

SB_SYSRST_4_PVT

R2696

1 2

NOT_DEVELOPMENT_PLUS_ITP

402

0

5% 1/16W MF-LF

Y2600

14

CRITICAL

SM-LF

32.768K

U2601

3

2

1

4

5

MC74VHC1G08

SOT23-5-LF

U2698

3

2

1

4

5

MC74VHC1G08

DEVELOPMENT

SOT23-5-LF

R2650

1 2

402

1K

5% 1/16W MF-LF

DEVELOPMENT

R2651

1

2

MF-LF

1/16W

5%

10K

402

R2607

1

2

402

1/16W

1K

MF-LF

5%

R2603

1

2

NOSTUFF

402

MF-LF

1/16W

5%

0

J2600

2

1

CRITICAL

BB1020

SM

R2609

1

2

5%

1/16W

MF-LF

10M

402

R2611

1 2

402

MF-LF

1/16W

1.82K

1%

C2607

1 2

20% 10V

CERM

0.1UF

402

R2612

1 2

10K

1/16W MF-LF

5%

402

0

C2608

1 2

50V 5%

402

CERM

15PF

R2622

1 2

10K

C2609

1 2

CERM 402

5%

50V

15PF

R2623

1 2

8.2K

R2624

1 2

8.2K

R2625

1 2

8.2K

R2626

1 2

8.2K

0

R2627

1 2

8.2K

R2628

1 2

8.2K

R2629

1 2

8.2K

R2630

1 2

8.2K

R2631

1 2

8.2K

R2632

1 2

8.2K

R2633

1 2

8.2K

R2634

1 2

8.2K

R2636

1 2

8.2K

R2637

1 2

8.2K

R2638

1 2

8.2K

R2639

1 2

8.2K

R2640

1 2

8.2K

R2641

1 2

8.2K

R2642

1 2

8.2K

R2643

1 2

8.2K

C2610

1

2

402

1UF

10%

6.3V CERM

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

SB: MISC

9726

A

051-7199

ALL_SYS_PWRGD

SB_GPIO5

MAKE_BASE=TRUE

ODD_PWR_EN_L

U2698_4

SMS_INT_L

PP3V3_S5

=PP3V3_S0_SB_PCI

PP3V3_S5

PCI_PERR_L

PCI_IRDY_L

PCI_FRAME_L

PCI_TRDY_L PCI_STOP_L

PCI_REQ0_L

PCI_REQ2_L

VR_PWRGOOD_DELAY

SW_RST_DEBNC

XDP_DBRESET_L

PM_SB_PWROK

=PP3V3_S0_SB_PM

SB_GPIO2 SB_GPIO3 SB_GPIO4

INT_PIRQC_L INT_PIRQD_L

INT_PIRQB_L

INT_PIRQA_L

PCI_REQ3_L

PCI_REQ1_L

PCI_LOCK_L

PCI_DEVSEL_L

PCI_SERR_L

PP3V3_S0

CK410_PD_VTT_PWRGD_L

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.6MM

PPVBATT_S5_RTC

SB_SM_INTRUDER_L

=PP3V3_S5_SB

VR_PWRGD_CK410_L

VR_PWRGD_CK410

PM_SYSRST_L

SB_RTC_X1

SB_RTC_X2

SW_RST_BTN_L

SB_RTC_RST_L

MIN_LINE_WIDTH=0.6MM

PPVBATT_S5_RTC_R

VOLTAGE=3.3V

PP3V3_S5

PP3V3_S5_SB_RTC

MIN_LINE_WIDTH=0.6MM

83

80

79

78

94

78

77

83

77

76

66

61

66

65

59

65

59

41

59

25

26

75

26

25

58

26

24

77

58

6

44

14

11

38

44

27

44

10

33

23

6

21

58

22

23

5

6

5

22

5

7

23

6

22

6

21

6

75 23

5

21

5

Preliminary

IO IO

IO

IO IO

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PCI CONTROL

SB I2C BUSSES

R2719

1 2

NOSTUFF

2.2K

R2718

1 2

NOSTUFF

2.2K

R2729

1 2

2.2K

R2728

1 2

2.2K

SB: SMB HUB AND ALIAS

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

9727

A

051-7199

PCI_REQ3_L

MAKE_BASE=TRUE

TP_PCI_GNT3_L

PCI_GNT1_L

MAKE_BASE=TRUE

PCI_GNT3_L

SMB_CK410_CLK

SMB_CK410_DATA

=SMB_AIRPORT_CLK

=SMB_AIRPORT_DATA

MAKE_BASE=TRUE

SMB_DATA

=I2C_MEM_SCL =I2C_MEM_SDA

MAKE_BASE=TRUE

SMB_CLK

=PP3V3_S5_SB_IO

=PP3V3_S0_SB_GPIO

SMB_DATA

SMB_CLK

NO_TEST=TRUE

PCI_FW_GNT_L

PCI_FW_REQ_L

PCI_REQ1_L

MAKE_BASE=TRUE

27

29

27

23

26

33

53

23

28

23

22

21

27

26

22

6

23

44

22

Preliminary

DQ58 DQ59

SA1GNDVDDSPD

SDA SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0 DQ1

DQ34

DQ40

DQ42 DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DDR2 VRef

TO NETS TO IMPROVE PLANE POUR

SOME ANCHOR PINS CONNECTED

516S0403

NC

ADDR=0xA0(WR)/0xA1(RD)

NC

Power aliases required by this page:

(For return current)

DDR2 Bypass Caps

(NONE)

- =I2C_MEM_SCL

- =I2C_MEM_SDA

BOM options provided by this page:

Signal aliases required by this page:

Page Notes

- =PP1V8_S3_MEM

- =PPSPD_S0_MEM (2.5V - 3.3V)

One 0.1uF per connector

C2813

1

2

10V

0.1uF

CERM 402

20%

C2812

1

2

10V

0.1uF

CERM 402

20%

C2811

1

2

10V

0.1uF

CERM 402

20%

C2810

1

2

10V

0.1uF

CERM 402

20%

C2819

1

2

20%

402

CERM

0.1uF

10V

C2818

1

2

20%

402

CERM

0.1uF

10V

C2817

1

2

20%

402

CERM

0.1uF

10V

C2816

1

2

20%

402

CERM

0.1uF

10V

C2821

1

2

20%

402

CERM

0.1uF

10V

C2820

1

2

20%

402

CERM

10V

0.1uF

C2815

1

2

20%

402

CERM

0.1uF

10V

C2814

1

2

20%

402

CERM

0.1uF

10V

C2800

1

2

0.1uF

20%

10V

402

CERM

C2804

1

2

603

X5R

6.3V

10UF

20%

C2803

1

2

603

X5R

6.3V

10UF

20%

C2802

1

2

603

X5R

6.3V

10UF

20%

C2801

1

2

603

X5R

6.3V

10UF

20%

J2800

102101

105

9089

100

99

9897

94

92

93

91

107

106

85

113

30 32

164 166

79

10

26

52

67

130

147

170

185

5 7

35 37

20 22

36 38

43 45

55 57

17

44 46

56 58

61 63

73 75

62 64

19

74 76

123 125

135 137

124 126

134 136

4

141 143

151 153

140 142

152 154

157 159

6

173 175

158 160

174 176

179 181

189 191

14

180 182

192 194

16

23 25

13

11

31

29

51

49

70

68

131

129

148

146

169

167

188

186

201

202

203

204

205

116

86

84

80

119

115

50

69

83

120

163

114

108 110

198 200

197

195

81 82

117 118

87 88

95 96

103 104

111 112

199

1 2 3

27 28

33 34

39 40

41 42

47 48

8

53 54

59 60

65 66

71 72

77 78

121 122

127 128

132

133

138

139

144

9

145

149 150

155 156

161 162

165

168

171

12

172

177 178

183 184

187

190

193

196

15

18

21

24

109

DDR2-SODIMM-STD

CRITICAL

F-RT-SM1

C2850

1

2

603

CERM1

6.3V

2.2UF

10%

C2852

1

2

0.1uF

20%

CERM

10V

402

C2851

1

2

603

CERM1

6.3V

10%

2.2UF

R2800

1

2

1/16W

1%

1K

402

MF-LF

R2801

1

2

1K

MF-LF 402

1% 1/16W

DDR2 SO-DIMM Connector A

051-7199

A

9728

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

VOLTAGE=0.9V MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.25 mm

MEM_VREF

=PP1V8_S3_MEM

MEM_A_DM<1>

MEM_A_DQS_P<0>

MEM_A_DQ<57>

MEM_A_DQ<51>

MEM_A_DQS_P<6>

MEM_A_DQ<42>

MEM_A_DQ<40>

MEM_A_DQ<34>

MEM_A_DQ<0> MEM_A_DQ<1>

MEM_A_DQS_N<0>

MEM_A_DQ<2> MEM_A_DQ<3>

MEM_A_DQ<8> MEM_A_DQ<9>

MEM_A_DQS_N<1> MEM_A_DQS_P<1>

MEM_A_DQ<10> MEM_A_DQ<11>

MEM_A_DQ<16> MEM_A_DQ<17>

MEM_A_DQS_N<2> MEM_A_DQS_P<2>

MEM_A_DQ<18> MEM_A_DQ<19>

MEM_A_DQ<24> MEM_A_DQ<25>

MEM_A_DM<3>

MEM_A_DQ<26> MEM_A_DQ<27>

MEM_CKE<0>

MEM_A_BS<2>

MEM_A_A<12> MEM_A_A<9> MEM_A_A<8>

MEM_A_A<5> MEM_A_A<3> MEM_A_A<1>

MEM_A_A<10> MEM_A_BS<0> MEM_A_WE_L

MEM_A_CAS_L MEM_CS_L<1>

MEM_ODT<1>

MEM_A_DQ<32> MEM_A_DQ<33>

MEM_A_DQS_N<4> MEM_A_DQS_P<4>

MEM_A_DQ<35>

MEM_A_DQ<41>

MEM_A_DM<5>

MEM_A_DQ<48> MEM_A_DQ<49>

MEM_A_DQS_N<6>

MEM_A_DQ<50>

MEM_A_DQ<56>

MEM_A_DM<7>

MEM_A_DQ<58> MEM_A_DQ<59>

=I2C_MEM_SDA =I2C_MEM_SCL

MEM_A_DQ<43>

MEM_A_DQ<12>

MEM_A_DQ<6>

MEM_A_DQ<4> MEM_A_DQ<5>

MEM_A_DM<0>

MEM_A_DQ<7>

MEM_A_DQ<13>

MEM_CLK_N<0>

MEM_A_DQ<14> MEM_A_DQ<15>

MEM_A_DQ<20> MEM_A_DQ<21>

DIMM_OVERTEMP_L

MEM_A_DM<2>

MEM_A_DQ<22> MEM_A_DQ<23>

MEM_A_DQ<28> MEM_A_DQ<29>

MEM_A_DQS_N<3> MEM_A_DQS_P<3>

MEM_A_DQ<30>

MEM_CKE<1>

MEM_A_DQ<61>

MEM_A_DQ<55>

MEM_A_DM<6>

MEM_A_DQ<47>

MEM_A_DQ<46>

TP_MEM_A_A<15> TP_MEM_A_A<14>

MEM_A_A<11> MEM_A_A<7> MEM_A_A<6>

MEM_A_A<4> MEM_A_A<2> MEM_A_A<0>

MEM_A_BS<1> MEM_A_RAS_L MEM_CS_L<0>

MEM_ODT<0> MEM_A_A<13>

=PP1V8_S3_MEM

MEM_A_DQ<36> MEM_A_DQ<37>

MEM_A_DM<4>

MEM_A_DQ<38> MEM_A_DQ<39>

MEM_A_DQ<44> MEM_A_DQ<45>

MEM_A_DQS_N<5> MEM_A_DQS_P<5>

MEM_A_DQ<53>

MEM_CLK_P<1> MEM_CLK_N<1>

MEM_A_DQ<54>

MEM_A_DQ<60>

MEM_A_DQS_N<7> MEM_A_DQS_P<7>

MEM_A_DQ<62> MEM_A_DQ<63>

MEM_A_DQ<31>

MEM_A_DQ<52>

MEM_CLK_P<0>

=PPSPD_S0_MEM

MEM_VREF

=PP1V8_S3_MEM

29

28

29

28

6

15

30

15

29

15

59

15

30

15

30

6

15

29

28

6

5

15

5

15

5

15

5

15

5

15

5

15

5

15

5

15

14

15

14

15

5

15

5

15

5

27

15

5

15

14

5

15

29

15

5

15

14

15

5

15

14

15

5

15

5

15

5

15

14

5

15

5

15

14

6

5

Preliminary

DQ58 DQ59

SA1GNDVDDSPD

SDA SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0 DQ1

DQ34

DQ40

DQ42 DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TO NETS TO IMPROVE PLANE POUR

SOME ANCHOR PINS CONNECTED

- =PPSPD_S0_MEM (2.5V - 3.3V)

- =PP1V8_S3_MEM

NOTE: This page does not supply VREF.

ADDR=0XA4(WR)/0XA5(RD)

NC

516S0404

BOM options provided by this page:

Power aliases required by this page:

Page Notes

Signal aliases required by this page:

(For return current)

DDR2 Bypass Caps

- =I2C_MEM_SCL

- =I2C_MEM_SDA

(NONE)

by another page.

The reference voltage must be provided

Resistor prevents pwr-gnd short

C2908

1

2

6.3V

402

CERM

10%

1UF

C2900

1

2

0.1uF

10V

CERM

402

20%

R2900

1

2

402

MF-LF

1/16W

5%

10K

C2909

1

2

402

6.3V

CERM

10%

1UF

C2910

1

2

1UF

10% CERM

6.3V

402

C2911

1

2

1UF

10% CERM

6.3V

402

C2915

1

2

1UF

10% CERM

6.3V

402

C2914

1

2

1UF

10% CERM

6.3V

402

C2913

1

2

6.3V

CERM

10%

1UF

402

C2912

1

2

6.3V

CERM

10%

1UF

402

C2919

1

2

1UF

10% CERM

6.3V

402

C2918

1

2

1UF

10% CERM

6.3V

402

C2917

1

2

6.3V

CERM

10%

1UF

402

C2916

1

2

6.3V

CERM

10%

1UF

402

C2923

1

2

1UF

10% CERM

6.3V

402

C2922

1

2

1UF

10% CERM

6.3V

402

C2921

1

2

6.3V

CERM

10%

1UF

402

C2920

1

2

6.3V

CERM

10%

1UF

402

J2900

102101

105

9089

100

99

9897

94

92

93

91

107

106

85

113

30 32

164 166

79

10

26

52

67

130

147

170

185

5 7

35 37

20 22

36 38

43 45

55 57

17

44 46

56 58

61 63

73 75

62 64

19

74 76

123 125

135 137

124 126

134 136

4

141 143

151 153

140 142

152 154

157 159

6

173 175

158 160

174 176

179 181

189 191

14

180 182

192 194

16

23 25

13

11

31

29

51

49

70

68

131

129

148

146

169

167

188

186

201

202

203

204

205

116

86

84

80

119

115

50

69

83

120

163

114

108 110

198 200

197

195

81 82

117 118

87 88

95 96

103 104

111 112

199

1 2 3

27 28

33 34

39 40

41 42

47 48

8

53 54

59 60

65 66

71 72

77 78

121 122

127 128

132

133

138

139

144

9

145

149 150

155 156

161 162

165

168

171

12

172

177 178

183 184

187

190

193

196

15

18

21

24

109

CRITICAL

F-RT-SM1

DDR2-SODIMM-REV

C2950

1

2

2.2UF

10%

603

CERM1

6.3V

C2952

1

2

402

10V

CERM

20%

0.1uF

C2951

1

2

2.2UF

10%

6.3V

CERM1

603

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

9729

051-7199

A

DDR2 SO-DIMM Connector B

=PP1V8_S3_MEM

=PPSPD_S0_MEM

MEM_B_DM<1>

MEM_B_DQS_P<0>

MEM_B_DQ<57>

MEM_B_DQ<51>

MEM_B_DQS_P<6>

MEM_B_DQ<42>

MEM_B_DQ<40>

MEM_B_DQ<34>

MEM_B_DQ<0> MEM_B_DQ<1>

MEM_B_DQS_N<0>

MEM_B_DQ<2> MEM_B_DQ<3>

MEM_B_DQ<8> MEM_B_DQ<9>

MEM_B_DQS_N<1> MEM_B_DQS_P<1>

MEM_B_DQ<10> MEM_B_DQ<11>

MEM_B_DQ<16> MEM_B_DQ<17>

MEM_B_DQS_N<2> MEM_B_DQS_P<2>

MEM_B_DQ<18> MEM_B_DQ<19>

MEM_B_DQ<24> MEM_B_DQ<25>

MEM_B_DM<3>

MEM_B_DQ<26> MEM_B_DQ<27>

MEM_CKE<2>

MEM_B_BS<2>

MEM_B_A<12> MEM_B_A<9> MEM_B_A<8>

MEM_B_A<5> MEM_B_A<3> MEM_B_A<1>

MEM_B_A<10> MEM_B_BS<0> MEM_B_WE_L

MEM_B_CAS_L MEM_CS_L<3>

MEM_ODT<3>

MEM_B_DQ<32> MEM_B_DQ<33>

MEM_B_DQS_N<4> MEM_B_DQS_P<4>

MEM_B_DQ<35>

MEM_B_DQ<41>

MEM_B_DM<5>

MEM_B_DQ<48> MEM_B_DQ<49>

MEM_B_DQS_N<6>

MEM_B_DQ<50>

MEM_B_DQ<56>

MEM_B_DM<7>

MEM_B_DQ<58> MEM_B_DQ<59>

=I2C_MEM_SDA =I2C_MEM_SCL

MEM_B_DQ<43>

MEM_B_DQ<12>

MEM_B_DQ<6>

MEM_B_DQ<4> MEM_B_DQ<5>

MEM_B_DM<0>

MEM_B_DQ<7>

MEM_B_DQ<13>

MEM_CLK_N<3>

MEM_B_DQ<14> MEM_B_DQ<15>

MEM_B_DQ<20> MEM_B_DQ<21>

DIMM_OVERTEMP_L

MEM_B_DM<2>

MEM_B_DQ<22> MEM_B_DQ<23>

MEM_B_DQ<28> MEM_B_DQ<29>

MEM_B_DQS_N<3> MEM_B_DQS_P<3>

MEM_B_DQ<30>

MEM_CKE<3>

MEM_B_DQ<61>

MEM_B_DQ<55>

MEM_B_DM<6>

MEM_B_DQ<47>

MEM_B_DQ<46>

TP_MEM_B_A<15> TP_MEM_B_A<14>

MEM_B_A<11> MEM_B_A<7> MEM_B_A<6>

MEM_B_A<4> MEM_B_A<2> MEM_B_A<0>

MEM_B_BS<1> MEM_B_RAS_L MEM_CS_L<2>

MEM_ODT<2> MEM_B_A<13>

MEM_B_DQ<36> MEM_B_DQ<37>

MEM_B_DM<4>

MEM_B_DQ<38> MEM_B_DQ<39>

MEM_B_DQ<44> MEM_B_DQ<45>

MEM_B_DQS_N<5> MEM_B_DQS_P<5>

MEM_B_DQ<53>

MEM_CLK_P<2> MEM_CLK_N<2>

MEM_B_DQ<54>

MEM_B_DQ<60>

MEM_B_DQS_N<7> MEM_B_DQS_P<7>

MEM_B_DQ<62> MEM_B_DQ<63>

MEM_B_SPD_SA1

MEM_B_DQ<31>

MEM_B_DQ<52>

MEM_CLK_P<3>

=PPSPD_S0_MEM

=PP1V8_S3_MEM

=PP0V9_S0_MEM_TERM

=PP1V8_S3_MEM

MEM_VREF

29

28

29

28

6

28

15

30

15

28

15

59

15

30

15

28

6

30

6

28

5

6

15

5

15

5

15

5

15

5

15

5

15

5

15

5

15

14

15

14

15

5

15

5

15

5

15

27

15

5

15

14

15

28

15

5

15

5

15

14

15

5

15

14

15

5

15

5

15

5

15

14

15

5

15

14

6

5

6 5

5

Preliminary

IN

IN IN IN IN IN IN IN IN IN IN IN IN IN IN

IN

IN IN IN

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BOMOPTION shown at the top of each group applies to every part below it

One cap for each side of every RPAK, one cap for every two discrete resistors

R3001

1 2

402

MF-LF1/16W

5%

56

R3009

1 2

1/16W

56

402

MF-LF

5%

R3011

1 2

1/16W

56

5%

402

MF-LF

R3025

1 2

56

5%

1/16W MF-LF

402

R3035

1 2

56

402

MF-LF1/16W

5%

0

2

1

29 15

C3004

1

2

0.1uF

402

CERM

10V

20%

C3006

1

2

20%

CERM 402

0.1uF

10V

C3008

1

2

0.1uF

402

CERM

10V

20%

C3009

1

2

0.1uF

402

CERM

10V

20%

C3013

1

2

0.1uF

10V

402

CERM

20%

C3014

1

2

0.1uF

20% 10V CERM 402

C3015

1

2

0.1uF

20% 10V CERM 402

RP3000

3 6

56

SM-LF

1/16W

5%

RP3000

4 5

56

SM-LF

1/16W

5%

RP3000

1 8

56

SM-LF

1/16W

5%

RP3000

2 7

56

SM-LF

1/16W

5%

RP3001

2 7

1/16W

56

SM-LF

5%

RP3001

1 8

56

SM-LF

1/16W

5%

RP3001

4 5

56

SM-LF

1/16W

5%

RP3001

3 6

1/16W

56

SM-LF

5%

RP3002

4 5

56

1/16W

SM-LF

5%

RP3002

1 8

56

SM-LF

1/16W

5%

RP3002

2 7

56

SM-LF

1/16W

5%

RP3002

3 6

56

SM-LF

1/16W

5%

RP3003

1 8

56

5%

1/16W

SM-LF

RP3003

2 7

5%

1/16W

56

SM-LF

RP3003

3 6

56

1/16W

5%

SM-LF

RP3003

4 5

1/16W

56

5%

SM-LF

RP3004

1 8

56

1/16W

5%

SM-LF

RP3004

3 6

5%

1/16W

56

SM-LF

RP3004

4 5

5%

1/16W

56

SM-LF

RP3005

1 8

56

5%

1/16W

SM-LF

RP3005

2 7

5%

1/16W

56

SM-LF

RP3005

3 6

56

1/16W

5%

SM-LF

RP3005

4 5

1/16W

5%

SM-LF

56

RP3006

1 8

56

5%

1/16W

SM-LF

RP3006

2 7

5%

1/16W

56

SM-LF

RP3006

3 6

1/16W

5%

SM-LF

56

RP3007

4 5

1/16W

SM-LF

5%

56

RP3007

3 6

1/16W

SM-LF

56

5%

RP3007

2 7

5%

1/16W

56

SM-LF

RP3007

1 8

5%

1/16W

56

SM-LF

RP3008

4 5

56

1/16W

5%

SM-LF

RP3008

3 6

5%

1/16W

56

SM-LF

RP3008

2 7

56

1/16W

5%

SM-LF

RP3008

1 8

1/16W

5%

56

SM-LF

RP3009

1 8

1/16W

5%

56

SM-LF

RP3009

2 7

5%

1/16W

56

SM-LF

RP3009

3 6

56

1/16W

5%

SM-LF

RP3009

4 5

56

1/16W

5%

SM-LF

RP3010

3 6

5%

1/16W

56

SM-LF

RP3010

2 7

56

1/16W

5%

SM-LF

RP3010

1 8

SM-LF

5%

1/16W

56

RP3010

4 5

SM-LF

56

1/16W

5%

RP3011

1 8

5%

1/16W

SM-LF

56

RP3011

2 7

56

1/16W

5%

SM-LF

RP3011

4 5

5%

1/16W

56

SM-LF

RP3006

4 5

1/16W

5%

SM-LF

56

RP3011

3 6

56

1/16W

5%

SM-LF

29 15

C3031

1

2

0.1uF

20% 10V CERM 402

C3032

1

2

0.1uF

402

CERM

10V

20%

C3043

1

2

0.1uF

20% 10V CERM 402

C3036

1

2

0.1uF

20% 10V CERM 402

C3037

1

2

0.1uF

20% 10V CERM 402

C3038

1

2

0.1uF

20% 10V CERM 402

C3001

1

2

0.1uF

20% 10V CERM 402

C3000

1

2

0.1uF

20% 10V CERM 402

C3040

1

2

0.1uF

20% 10V CERM 402

C3039

1

2

0.1uF

20% 10V

402

CERM

C3042

1

2

0.1uF

20% 10V CERM 402

C3041

1

2

20% 10V CERM 402

0.1uF

0

1

0

1

0

2

0

1

2

3

4

5

6

7

10

11

9

8

13

12

29 28 14

28 15

2

3

2

3

C3033

1

2

0.1uF

20% 10V CERM 402

C3030

1

2

0.1uF

20% 10V CERM 402

C3011

1

2

0.1uF

CERM 402

20% 10V

C3010

1

2

0.1uF

402

CERM

10V

20%

C3007

1

2

0.1uF

20% 10V CERM 402

C3005

1

2

0.1uF

402

CERM

10V

20%

C3035

1

2

0.1uF

402

CERM

10V

20%

0

1

2

3

29 28 14

Memory Active Termination

30 97

A

051-7199

MEM_A_A<13..0>

MEM_CKE<3..0>

MEM_ODT<3..0>

MEM_A_BS<2..0>

MEM_CS_L<3..0>

MEM_B_BS<2..0>

MEM_A_RAS_L

MEM_B_A<10> MEM_B_A<4>

MEM_B_A<1> MEM_B_A<11> MEM_B_A<12> MEM_B_A<13>

MEM_B_A<2>

MEM_B_CAS_L MEM_B_WE_L

MEM_B_RAS_L

MEM_A_CAS_L

MEM_B_A<3>

MEM_B_A<0>

MEM_A_WE_L

MEM_B_A<5> MEM_B_A<6> MEM_B_A<7> MEM_B_A<8> MEM_B_A<9>

=PP0V9_S0_MEM_TERM

29

6

Preliminary

VREF

VTT

GND

VTT_IN

EN

VTTS

VDDQ

VCC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DDR2 Vtt Regulator

(NONE)

Power aliases required by this page:

Signal aliases required by this page:

- =PP5V_S0_MEMVTT

- =PP1V8_S0_MEMVTT

MEMVTT_EN can be used to

Page Notes

If power inputs are not S0,

?Can 5V be S0 if 1V8 is S3?

disable MEMVTT in sleep.

USING 1% FR BOM CONSOLIDATION

- =PP0V9_S0_MEMVTT_LDO

BOM options provided by this page:

C3101

1

2

805-1

CERM

10UF

20%

6.3V

U3100

2

1

65

4

8

7

3

MSOP-8

BD3533FVM

CRITICAL

R3100

1

2

5% 1/16W MF-LF

402

1K

MEMVTT_EN_PU

C3105

6.3V POLY

20%

150UF

SMC-LF

CRITICAL

C3102

1

2

805-1

CERM

10UF

20%

6.3V

R3101

1 2

1%

221

1/16W MF-LF

402

C3109

1

2

6.3V

2.2UF

10%

CERM1

603

C3110

1

2

20%

0.1UF

10V

CERM

402

C3100

1

2

402

CERM

1uF

10%

6.3V

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

31 97

A

051-7199

Memory Vtt Supply

=PP1V8_S0_MEMVTT

=PP0V9_S0_MEMVTT_LDO

MEMVTT_VREF

=PP5V_S0_MEMVTT

MEMVTT_EN

U3100_VDDQ

6

79

Preliminary

VTT_PWRGD*/PD

DOT96T/27MHZ_NON-SPREAD

SRCT_0/LCD100MT

CPUC2_ITP/SRCC_10

VDD48

XIN

VDD_PCI1

VDD_SRC0

VDD_REF

VDD_SRC1

VDD_SRC2

VDD_SRC3

REF1/FCTSEL0

REF0/FSC

FSA/48M

DOT96C/27MHZ_SPREAD

CLKREQ_8*

SRCT_8

SRCC_8

SRCT_7

SRCC_7

CLKREQ_6*

CPUT2_ITP/SRCT_10

IREF

SDATA

SCLK

VSS_REF

VSS_PCI1

VSS_PCI0

VSS_CPU

VSS48

VSS_SRC

PCIF1

PCI1

SRCT_5

THRML_PAD

PCI4

PCI2

FSB

CLKREQ_4*

SRCC_5

SRCC_4 SRCT_4

SRCT_3

CLKREQ_3*

SRCC_3

SRCC_2 SRCT_2

SRCC_1

CLKREQ_1*

SRCT_1

SRCC_0/LCD100MC

CPUC1 CPUT1

CPUC0 CPUT0

PCI_STP* CPU_STP*

SRCC_6

CLKREQ_5*

SRCT_6

PCIF0/ITP_SEL

PCI5/FCTSEL1

PCI3

XOUT

VDDA VSSA

VDD_PCI0

VDD_CPU

IN IN

OUT OUT

OUT

OUT OUT

OUT

IN

OUT

OUT OUT

IN

IO

OUT

IN

IO

OUT

IN

OUT

IN

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(INT PU)

(INT PD)

PIN 7

DOT96C

TBD

SPREAD

27M

(NO USED)

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)

(ICH SM BUS)

(ICH7M PCI 33MHZ)

(PORT80 LPC 33MHZ)

0

(INT PU)

(FOR PCI-E CARD)

(ICH7M,SIO,LPC REF. 14.318MHZ)

(INT PD)

(GMCH G_CLKIN 100 MHZ )

(FROM ICH7 GPIO18 STPPCI* ) (FROM ICH7 GPIO20 STPCPU* )

(GMCH HOST 133/167MHZ)

(ITP HOST 133/167MHZ)

(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

PROTO TO REMOVE 100M FROM SIGNAL NAME)

(SIGNAL NAME WILL BE CHANGED POST

(INT PU)

(CPU HOST 133/167MHZ)

(NOT USED )

(INT PD)

(INT PU)

PIN 6

* FOR EXT. GRAPHIC SYSTEM

* FOR INT. GRAPHIC SYSTEM

SRCT0

DOT96T

PIN 10 PIN 11

100MC_SST

FCTSEL1

00 0 1 1 1 1

OFF LOW

27M NON SPREAD

DOT96C 100MT_SST

SRCT0

SRCC0

FCTSEL0

(INT PU)

(ICH SATA 100 MHZ)

(FW PCI 33MHZ) (TPM LPC 33MHZ) (SMC LPC 33MHZ)

(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

(EACH POWER PIN PLACED ONE 0.1UF)

(INT PU) (INT PU)

(GPU PCI-E 100 MHZ )

NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?

(ICH7M DMI 100 MHZ )

(FROM ICH7 GPIO35)

(FROM GMCH CLK_REQ*)

(WIRELESS PCI-E 100 MHZ )

(GIGA LAN PCI-E 100 MHZ )

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

(FROM CPU VCORE PWR GOOD) (ICH7M USB 48MHZ)

C3309

1

2

10UF

6.3V

20% X5R

603

L3302

1 2

0402

FERR-120-OHM-1.5A

C3305

1

2

16V X5R

10%

0.1UF

402

C3306

1

2

0.1UF

402

X5R

16V

10%

C3307

1

2

402

10%

0.1UF

X5R

16V

C3308

1

2

X5R

16V

0.1UF

402

10%

U3301

9

59

20

60

25

34

55

44

41

36

45

42

37

7 6

4

8

40

57 58 63 64 65

56

68

1

54 53

47 48

11

14

16

19

22

24

27

30

32

10

13

15

18

21

23

26

29

33

69

34361674912172835

38

5

46

62 66

52

31

39

2

51 50

QFN

CY284455

OMIT

CRITICAL

C3390

1

2

50V CERM

5%

15PF

402

C3389

1

2

CERM

50V

15PF

5%

402

R3300

1

2

1/16W 402

475

1% MF-LF

C3312

1

2

20%

6.3V CERM

10UF

805-1

C3311

1

2

10% X5R

402

0.1UF

16V

C3304

1

2

X5R

16V

10% 402

0.1UF

C3303

1

2

10%

0.1UF

402

16V X5R

C3302

1

2

402

X5R

16V

10%

0.1UF

C3301

1

2

10%

0.1UF

16V X5R 402

C3310

1

2

402

10% CERM

6.3V

1UF

C3316

1

2

10UF

20%

6.3V X5R 603

C3315

1

2

0.1UF

402

16V X5R

10%

L3301

1 2

0402

FERR-120-OHM-1.5A

C3314

1

2

402

6.3V CERM

10%

1UF

R3302

1 2

2.2

5% 1/16W MF-LF

402

R3303

1 2

1

MF-LF

5% 1/16W

402

C3317

1

2

10UF

20%

6.3V X5R 603

R3304

1 2

1/16W

5%

2.2

402

MF-LF

R3301

1

2

1/16W 402

MF-LF

5%

10K

Y3301

1 2

5X3.2-SM

14.31818

CRITICAL

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

CLOCKS

9733

051-7199

A

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

PP3V3_S0_CK410_VDD_CPU_SRC

CK410_CPU1_N

=PP3V3_S0_CK410

CK410_XTAL_OUT

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

PP3V3_S0_CK410_VDDA

CK410_PCI4_CLK

CK410_DOT96_27M_N CK410_DOT96_27M_P

CK410_USB48_FSA

CK410_CPU2_ITP_SRC10_P

CK410_CPU0_N

PM_STPCPU_L

PM_STPPCI_L

CK410_CPU1_P

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

PP3V3_S0_CK410_VDD_REF

CK410_PCI5_FCTSEL1

CK410_PCIF1_CLK

CK410_IREF

SMB_CK410_DATA

CK410_SRC5_P

CLK_NB_OE_L

CK410_SRC_CLKREQ6_L

CK410_CPU0_P

=PP3V3_S0_CK410

CK410_PCI2_CLK

CK410_SRC_CLKREQ1_L

CK410_SRC2_N

CK410_SRC3_P

CK410_LVDS_P

CK410_LVDS_N

CK410_CPU2_ITP_SRC10_N

SMB_CK410_CLK

CK410_SRC_CLKREQ3_L

CK410_SRC1_P

SB_CLK100M_SATA_OE_L

CK410_SRC5_N

CK410_SRC4_P

CK410_SRC4_N

CK410_SRC8_N

CK410_SRC7_P

CK410_SRC7_N

CK410_SRC6_N CK410_SRC6_P

CK410_PCI3_CLK

CK410_SRC3_N

CK410_SRC2_P

=PP3V3_S0_CK410

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

PP3V3_S0_CK410_VDD48

CK410_SRC1_N

CK410_FSB_TEST_MODE

CK410_PCI1_CLK

CK410_XTAL_IN

CK410_PCIF0_CLK

CK410_REF1_FCTSEL0

CK410_CLK14P3M_TIMER

CK410_PD_VTT_PWRGD_L

CK410_SRC_CLKREQ8_L

CK410_SRC8_P

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

PP3V3_S0_CK410_VDD_PCI

33

34

6

34

23

34

27

34

14

53

34

6

34

27

34

23

34

6

34

26

34

Preliminary

OUT

OUT OUT

IN IN

IN

IN IN

IN

IN IN

IN

OUT

IO

OUT

IN

OUT

IN

OUT OUT

OUT

OUT OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(GPU CLK OE*)

(YUKON CLK OE*)

(SPARE CLK OE*)

FSB FREQUENCY SELECT:

CPU DRIVEN

(133MHZ CPU CLK)

STUFF

R3459

R3454

R3461

R3457

R3452

R3463

R3457

R3463

R3459

R3454

NO STUFF

R3454 R3459 R3463

R3452 R3457 R3461

R3452 R3461

(166MHZ CPU CLK)

533MHZ

667MHZ

NO GPU SO LEAVE THIS CLK NOT CONNECTED AND DISABLE THE OUTPUT IN THE CLOCK CHIP

NOTE: USE THESE PULL-DOWNS IF NOT CONNECTED TO GPIO’S

34 21

5

34 14

5

41 34

5

41 34

5

53 34

R3400

1 2

MF-LF

5%

1/16W

33

402

R3401

1 2

33

R3402

1 2

33

R3403

1 2

33

R3404

1 2

TPM

33

R3405

1 2

33

R3406

1 2

33

R3407

1 2

33

R3408

1 2

33

R3409

1 2

33

R3410

1 2

33

R3411

1 2

33

R3412

1 2

33

R3413

1 2

33

R3414

1 2

33

R3415

1 2

33

R3416

1 2

33

R3417

1 2

33

R3418

1 2

33

R3419

1 2

33

R3420

1 2

33

R3421

1 2

33

R3422

1 2

33

R3429

1 2

49.9

1%

402 1/16W MF-LF

R3430

1 2

49.9

R3431

1 2

49.9

R3432

1 2

49.9

R3433

1 2

49.9

R3434

1 2

49.9

R3435

1 2

49.9

R3436

1 2

49.9

R3437

1 2

49.9

R3438

1 2

49.9

R3439

1 2

49.9

R3440

1 2

49.9

R3441

1 2

49.9

R3442

1 2

49.9

R3443

1 2

49.9

R3444

1 2

49.9

60

22

5

44

67

58

5

23

5

R3462

1 2

5%

1K

1/16W MF-LF

402

R3460

1

2

1K

5% 1/16W MF-LF 402

R3451

1 2

402

MF-LF

1/16W

5%

2.2K

R3463

1

2

402

0

MF-LF

1/16W

5%

R3461

1

2

NOSTUFF

402

5% 1/16W MF-LF

0

R3457

1

2

NOSTUFF

402

5%

0

MF-LF

1/16W

R3456

1

2

402

1K

5% 1/16W MF-LF

R3459

1

2

402

MF-LF

1/16W

5%

0

R3458

1 2

402

5%

MF-LF

1K

1/16W

R3452

1

2

NOSTUFF

402

56

MF-LF

5% 1/16W

R3454

1

2

402

5% 1/16W MF-LF

0

R3453

1 2

402

MF-LF1/16W1K5%

R3455

1 2

402

MF-LF1/16W

5%

1K

34 14

5

34 14

5

R3471

1 2

33

R3470

1 2

33

R3499

1 2

1/16W

5%

402

1K

MF-LF

23

5

R3497

1 2

2.2K

5% 1/16W MF-LF

402

R3498

1 2

402

5%

1/16W33MF-LF

R3496

1 2

33

R3495

1 2

1K

R3494

1 2

1K

R3493

1 2

1K

R3492

1 2

33

R3489

1 2

33

R3490

1 2

33

R3491

1 2

33

R3487

1 2

49.9

R3488

1 2

49.9

R3486

1 2

49.9

R3485

1 2

49.9

R3425

1 2

33

R3426

1 2

33

34 14

5

34 14

5

R3447

1 2

49.9

R3448

1 2

49.9

R3449

1 2

49.9

R3450

1 2

49.9

34 12

5

34 12

5

34

7 5

34

7 5

34 14

5

34 21

5

34 22

5

34 22

5

CLOCKS: TERMINATIONS

9734

051-7199

A

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_CK410_SRC1_P

CK410_SRC3_P

SPARE_SRC7_P SPARE_SRC7_N

SPARE_SRC3_N

CK410_PCI3_CLK

CK410_PCI2_CLK

CK410_PCI1_CLK

CK410_PCIF1_CLK

PCI_CLK_PORT80

CK410_SRC1_N

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_CK410_SRC1_N

CK410_SRC1_P

CK410_SRC7_N

CK410_SRC7_P

CK410_SRC4_N

NB_CLK_DREFCLKIN_P NB_CLK_DREFCLKIN_N

NB_CLK100M_GCLKIN_N

NB_CLK100M_GCLKIN_P

AIRPORT_CLK100M_PCIE_N

SB_CLK100M_DMI_N

ENET_CLK100M_PCIE_N

ENET_CLK100M_PCIE_P

CK410_DOT96_27M_P CK410_DOT96_27M_N

SB_CLK100M_DMI_P

CK410_FSA

NB_BSEL<0>

CPU_BSEL<0>

PP1V05_S0

CPU_BSEL<2>

NB_BSEL<2>

NB_BSEL<1>

FSB_CLK_CPU_N

AIRPORT_CLK100M_PCIE_P

FSB_CLK_XDP_N

FSB_CLK_XDP_P

NB_CLK100M_GCLKIN_P NB_CLK100M_GCLKIN_N

AIRPORT_CLK100M_PCIE_N

SB_CLK100M_DMI_P SB_CLK100M_DMI_N

SB_CLK100M_SATA_P

ENET_CLK100M_PCIE_N

ENET_CLK100M_PCIE_P

PP1V05_S0

CK410_FSB_TEST_MODE

CPU_BSEL<1>

CK410_FSC

PCI_CLK_SMC

PCI_CLK_FW

PCI_CLK_SB

AIRPORT_CLK100M_PCIE_P

SB_CLK100M_SATA_P SB_CLK100M_SATA_N

CK410_PCIF0_CLK

CK410_SRC6_P

CK410_SRC4_P

CK410_SRC5_N

CK410_SRC5_P

CK410_SRC2_P

SB_CLK48M_USBCTLR

CK410_FSA

SB_CLK14P3M_TIMER

CK410_FSC

CK410_PCI4_CLK

TP_PCI_CLK_SPARE

CK410_REF1_FCTSEL0

TP_CLK14P3M_SPARE

CK410_SRC_CLKREQ3_L

CK410_SRC_CLKREQ1_L

CK410_SRC_CLKREQ8_L

FSB_CLK_CPU_N

FSB_CLK_NB_N

FSB_CLK_CPU_P

FSB_CLK_NB_P

SPARE_SRC3_P

CK410_SRC3_N

FSB_CLK_XDP_P

MAKE_BASE=TRUE

FSB_CLK_XDP_N

MAKE_BASE=TRUE

CPU_XDP_CLK_N

CK410_SRC6_N

FSB_CLK_CPU_P

FSB_CLK_NB_P FSB_CLK_NB_N

CK410_PCI5_FCTSEL1

CK410_CLK14P3M_TIMER

CK410_CPU1_P CK410_CPU1_N

CK410_CPU0_P CK410_CPU0_N

CK410_CPU2_ITP_SRC10_P CK410_CPU2_ITP_SRC10_N

CK410_SRC8_P CK410_SRC8_N

CK410_LVDS_P CK410_LVDS_N

NB_CLK_DREFSSCLKIN_P NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFSSCLKIN_P

NB_CLK_DREFCLKIN_N

NB_CLK_DREFCLKIN_P

SB_CLK100M_SATA_N

CPU_XDP_CLK_P

CK410_SRC2_N

TP_CK410_PCI5_FCTSEL1

CK410_USB48_FSA

PCI_CLK_TPM

80

34

41

80

34

33

34

7

53

14

53

22

21

34

7

12

14

21

33

34

14

7

6

7

14

5

34

5

34

5

6

33

7

34

33

34

33

34

34 11

33

5

33

5

11

33

Preliminary

OUT

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PULL UP TO 5V ON P26

(SB_GPIO14)

PLACE SHORT AT PACKAGE

FROM SB WITHIN EACH PAIR

CAPS TO BE SAME DISTANCE

SATA PORT 0 IS NOT USED

NOTE: GO TO SB AND SMC

PATA CONNECTOR

SATA CONNECTOR

518S0251

SATA DIFF PAIR GND VIAS

"IDE ACTIVE"

PER ATA7 SPEC

516S0327

NC NC

NC

Obsolete

MIN_NECK & MIN_LINE WIDTH

PLACE C3805-06 CLOSE TO JC901 FOR PP5V_S0_PATA. APPLY A WIDE TRACE SHAPE FROM JC901 TO C3805-06.

ARE CONTROLLED BY PP5V_S0 1MM / 0.6MM.

NOTE: ATA-2, NOW OBSOLETE

Per ATA Spec

STUFFED PER LARRY

NOTE: ???

VALUE=3900PF IN REFERENCE SCHEM

PLACE < 0.5 IN FROM BALL OF U2100

REMOVED TEST POINTS FROM SHORT TRACE BETWEEN CAP AND CONNECTOR TO IMPROVE SIGNAL INTEGRITY.

R3852

1

2

10K

NO STUFF

R3853

1

2

1K

R3851

1

2

4.7K

C3804

1

2

NO STUFF

10pF

402

CERM

50V

5%

R3859

1

2

MF-LF

5%

6.2K

1/16W 402

R3858

1

2

0

402

MF-LF

1/16W

5%

R3857

1

2

499

1%

402

MF-LF

1/16W

DEVELOPMENT

JC900

1 2 3 4 5 6 7

CRITICAL

EP00-081-91

M-ST-SM

LED3800

1 2

2.0X1.25MM-SM

DEVELOPMENT

GREEN-3.6MCD

JC901

51

52

1

10 11 12 13 14 15 16 17 18 19

2

20 21 22 23 24 25 26 27 28 29

3

30 31 32 33 34 35 36 37 38 39

4

40 41 42 43 44 45 46 47 48 49

5506 7 8 9

804RVS-0501S5RGM

CRITICAL

F-ST-SM

C3805

1

2

0.1uF

20% CERM

10V

402

GV3808

1

HOLE-VIA-P5RP25

GV3806

1

HOLE-VIA-P5RP25

GV3801

1

HOLE-VIA-P5RP25

GV3803

1

HOLE-VIA-P5RP25

GV3805

1

HOLE-VIA-P5RP25

GV3807

1

HOLE-VIA-P5RP25

GV3802

1

HOLE-VIA-P5RP25

GV3804

1

HOLE-VIA-P5RP25

0

C3806

1

2

CERM

20%

10UF

10V 805-2

C3800

1 2

0.0047UF

402

C3801

1 2

402

0.0047UF

C3802

1 2

402

0.0047UF

C3803

1 2

0.0047UF

402

R3824

1

2

10K

NOSTUFF

R3899

1

2

402

5% 1/16W MF-LF

100

R3897

1 2

1%

402

MF-LF

1/16W

24.9

0

R2389

1

2

1K

5% 1/16W MF-LF 402

R3800

1 2

0

5% 1/16W MF-LF

402

R3801

1 2

NO STUFF

0

5% 1/16W MF-LF

402

Disk Connectors

A

051-7199

9738

NO_TEST=TRUE

SATA_C_R2D_N

NO_TEST=TRUE

SATA_C_R2D_P

SATA_RBIAS

MAKE_BASE=TRUE

SATA_A_R2D_C_N

IDE_RESET_L_CONN

=PP5V_S0_PATA

IDE_IOCS16_PU

IDE_CSEL_PD

IDE_PDD<8> IDE_PDD<9> IDE_PDD<10> IDE_PDD<11> IDE_PDD<12>

IDE_PDD<15>

IDE_PDIOR_L

IDE_PDA<0> IDE_PDA<2>

IDE_DASP_L_DS

SATA_C_R2D_C_P

SATA_C_D2R_P

SATA_C_R2D_C_N

SATA_C_D2R_N

SATA_C_D2R_C_N

NO_TEST=TRUE

SATA_C_D2R_C_P

NO_TEST=TRUE

=PP3V3_S0_PATA

MAKE_BASE=TRUE

TP_SATA_A_R2D_N

MAKE_BASE=TRUE

TP_SATA_A_R2D_P

MAKE_BASE=TRUE

TP_SATA_A_D2R_P

MAKE_BASE=TRUE

TP_SATA_A_D2R_N

SATA_A_D2R_P

SATA_A_D2R_N

SATA_C_DET_L

IDE_PDD<14>

IDE_PDDACK_L

IDE_PDD<13>

IDE_PDD<6>

IDE_PDD<7>

IDE_PDD<0>

IDE_PDD<1>

IDE_PDD<5>

IDE_DASP_L

IDE_PDCS3_L

IDE_PDD<4> IDE_PDD<3> IDE_PDD<2>

IDE_PDDREQ

=PP5V_S0_PATA

SATA_RBIAS_N

SATA_RBIAS_P

SATA_A_R2D_C_P

IDE_PDCS1_L

IDE_PDA<1>

IDE_IRQ14

IDE_PDIORDY

IDE_PDIOW_L

IDE_RESET_L_CONN

SB_GPIO14

MAKE_BASE=TRUE

IDE_RESET_L

SB_GPIO3

21

38

21

38

21

26

38

6

21

5

21

5

21 21

21

6

23

21

6

21

5

21

38

23

22

Preliminary

OUT

AVDDL0

AVDDL4

AVDD

THRML_PAD

VDDO_TTL0

AVDDL6

VDDO_TTL1

RX_N

TESTMODE

TSTPT

LINK*

LED_LINK10/100* LED_LINK1000*

LED_ACT*

RSET

CTRL25 CTRL12

HSDACN

HSDACP

SWITCH_VAUX

SWITCH_VCC

VMAIN_AVLBL

VAUX_AVLBL

LOM_DISABLE*

XTALO

XTALI

SPI_DO

SPI_CLK

SPI_CS

SPI_DI

VPD_CLK

VPD_DATA

MDIP3 MDIN3

MDIN2

MDIP2

MDIN1

MDIP1

MDIN0

MDIP0

WAKE*

REFCLKN

TX_N

VDDO_TTL3

VDDO_TTL2

VDDO_TTL4

VDD0

VDD1

VDD3

VDD2

VDD6

VDD5

VDD4

VDD7

AVDDL1

AVDDL2

AVDDL5

VDD25

PERST*

REFCLKP

RX_P

AVDDL3

TX_P

PU_VDDO_TTL0 PU_VDDO_TTL1

TEST

TWSI

SPI

MAIN CLK

PCI EXPRESS

ANALOG

MEDIA

LED

E2

WC*

NC0

NC1

VCC

VSS

SCL

SDA

IO

IO IO

IO

IO IO

IN IN

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

OPTIONAL EXTERNAL LDO

LAYOUT NOTE: PLACE C4112-13 AT U2100

LAYOUT NOTE: PLACE C4110-11 AT U4101

C4116

1

2

CERM 402

27PF

5% 50V

R4122

1 2

4.7K

1/16W

402

MF-LF

5%

R4123

1 2

1/16W

5%

402

4.7K

MF-LF

C4101

1

2

0.1UF

10% X5R

402

16V

U4101

23

19222832515257

3

4

25

24

59 60 62 63

10

18

21

27

31

17

20

26

30

5

42 43

56

55

16

53

54

37 36

35 34

9

11

46

65

29

50

49

12

2713643339444858

18404561

47

38 41

6

15 14

QFN

88E8053

OMIT

U4102

3

1

2

6

5

8

4

7

OMIT

SO8

M24C08

C4140

1

2

0.1UF

X5R 402

10% 16V

C4110

1 2

20%

CERM

10V 402

0.1UF

C4111

1 2

20%

0.1UF

10V

CERM

402

C4112

1 2

402

10V20%

0.1UF

CERM

C4113

1 2

402

CERM

10V20%

0.1UF

R4102

1 2

1/16W

1%

402

4.75K

MF-LF

R4130

1 2

4.7K

R4131

1 2

4.7K

R4151

1 2

NOSTUFF

1/16W

5%

402

MF-LF

0

R4150

1 2

402

5%

0

1/16W

MF-LF

Y4101

24

13

25.0000M

CRITICAL

SM-3.2X2.5MM

R4119

1 2

49.9

1%

1/16W

MF-LF

402

R4118

1 2

49.9

1%

1/16W

MF-LF

402

R4120

1 2

49.9

1%

1/16W

MF-LF

402

R4117

1 2

49.9

1%

1/16W

MF-LF

402

R4103

1 2

402

1/16W

1%

49.9

MF-LF

R4104

1 2

49.9

402

1%

1/16W

MF-LF

R4105

1 2

1%

402

MF-LF

1/16W

49.9

R4106

1 2

49.9

402

1%

1/16W

MF-LF

R4101

1 2

MF-LF

402

5%

1/16W

4.7K

C4106

1

2

0.001UF

50V

10% 402

CERM

C4107

1

2

50V

10%

402

CERM

0.001UF

C4117

1

2

10% 402

CERM

0.001UF

50V

C4118

1

2

50V

10% 402

CERM

0.001UF

C4105

1

2

0.001UF

50V

10%

402

CERM

C4104

1

2

X5R

16V 402

0.1UF

10%

C4103

1

2

16V

10%

402

X5R

0.1UF

C4102

1

2

16V

10%

402

X5R

0.1UF

C4150

1

2

0.001UF

50V

10%

402

CERM

C4128

1

2

16V 402

X5R

0.1UF

10%

C4133

1

2

10%

402

0.001UF

50V CERM

C4134

1

2

50V 402

CERM

0.001UF

10%

C4131

1

2

10%

402

0.001UF

CERM

50V

C4132

1

2

50V 402

CERM

0.001UF

10%

C4127

1

2

16V

10% X5R

402

0.1UF

C4126

1

2

16V 402

X5R

10%

0.1UF

C4129

1

2

16V 402

X5R

0.1UF

10%

C4130

1

2

10%

402

X5R

0.1UF

16V

C4139

1

2

50V

10%

0.001UF

402

CERM

C4138

1

2

50V

10% 402

CERM

0.001UF

C4137

1

2

16V

10% 402

X5R

0.1UF

C4136

1

2

0.1UF

16V

10% X5R

402

C4135

1

2

16V

10% 402

X5R

0.1UF

C4115

1

2

402

CERM

27PF

5% 50V

ETHERNET CONTROLLER

41 97

051-7199

A

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

PCIE_ENET_R2D_N

PCIE_ENET_R2D_P

ENET_XTALI ENET_XTALO

ENET_VPD_CLK ENET_VPD_DATA

ENET_PU_VDDO_TTL0

=PP1V2_S3_ENET

ENET_MDI0

ENET_MDI_N<1>

ENET_MDI1

=PP2V5_S3_ENET

=PP3V3_S3_ENET

ENET_PU_VDDO_TTL1

VMAIN_AVLBL

=PP3V3_S3_ENET

ENET_LOM_DIS_L

ENET_LED_LINK10_100_L ENET_LED_LINK1000_L

PCIE_ENET_R2D_C_N

ENET_ANALOG_RSET

ENET_LED_LINK_L

=PP2V5_S3_ENET

ENET_CTRL25 ENET_CTRL12

ENET_CLK100M_PCIE_P

ENET_MDI2 ENET_MDI3

ENET_VPD_CLK

ENET_VPD_DATA

=PP3V3_S3_ENET

ENET_MDI_P<0> ENET_MDI_N<0>

ENET_MDI_P<1>

ENET_MDI_P<2>

ENET_MDI_P<3> ENET_MDI_N<3>

=PP1V2_S3_ENET

=PP3V3_S3_ENET

PCIE_ENET_D2R_C_N

PCIE_ENET_D2R_C_P

PCIE_ENET_D2R_N

PCIE_ENET_D2R_P

ENET_CLK100M_PCIE_N

PCIE_WAKE_L

ENET_GATED_RST_L

PCIE_ENET_R2D_C_P

ENET_MDI_N<2>

PP3V3_S0

ENET_LED_ACT_L

94 83 76 61

43

59

42

26

42

41

42

34

41

42

41

34

53

10

41

43

41

6

43

54

43

41

42

5

41

6

43

41

6

54

5

23

42

54

43

6

43

Preliminary

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

C4202

1

2

22UF

805

X5R

6.3V

20%

C4203

1

2

6.3V CERM 603

4.7UF

20%

C4204

1

2

0.1UF

16V

10%

402

X5R

R4202

1

2

402

5% 1/16W MF-LF

4.7K

C4205

1

2

4.7UF

603

6.3V

20% CERM

C4206

1

2

402

0.1UF

X5R

10% 16V

C4210

1

2

0.1UF

X5R 402

10% 16V

C4209

1

2

4.7UF

CERM

20%

6.3V 603

L4201

1 2

SM

FERR-330-OHM

L4200

1 2

SM

FERR-330-OHM

I38

C4207

1

2

6.3V

20%

10UF

CERM 805-1

Q4201

1

24

3

CRITICAL

PBSS5540Z

SOT223

C4200

1

2

22UF

805

X5R

6.3V

20%

C4201

1

2

0.1UF

402

10% 16V X5R

ETHERNET MISC

A

051-7199

9742

ENET_CTRL12

MAKE_BASE=TRUE

TP_ENET_CTRL12

=PP1V2_S3_LAN

=PP3V3_S3_ENET

MAKE_BASE=TRUE

ENET_RST_L

ENET_GATED_RST_L

ENET_CTRL25

=PP2V5_S3_ENET

=PP1V2_S3_ENET

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

VOLTAGE=1.2V

PP1V2_S3_ENET

MAKE_BASE=TRUE

PP2V5_S3_ENET

VOLTAGE=2.5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

VOLTAGE=3.3V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

Q4201_3

43

41

6

41

6

41

43

Preliminary

IO IO

IO

IO IO

IO

IO IO

1CT:1CT

MDI_3-

ENET_CTAP

MDI_0+

75 OHM

MDI_0-

MDI_1MDI_2+ MDI_2-

75 OHM

RJ45

CABLE SIDE

SECONDARY

J4

J8

J7

J6

J5

J1 J2 J3

1CT:1CT

RJ45

CHIP SIDE

ENET_CTAP

MDI_1+

MDI_3+

PRIMARY

SHIELD 1000PF, 2000V

1CT:1CT

75 OHM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

RESISTOR PADS USED AS PLACEHOLDER FOR INDUCTOR IF NEEDED

(514-0253)

C4300

1

2

402

20% 10V CERM

0.1UF

C4301

1

2

10%

402

CERM

50V

0.001UF

C4304

1

2

402

CERM

50V

0.001UF

10%

C4305

1

2

402

CERM

50V

0.001UF

10%

R4300

1 2

1/8W

805

0

5%

MF-LF

JD600

11

12

13

1

10

2 3 4

5 6

7 8 9

JFM38V10-0112-4F

OMIT

F-ANG-TH

R4301

1

2

5% 1/10W MF-LF 603

330

DEVELOPMENT

LED4300

1

2

GREEN-3.6MCD

2.0X1.25MM-SM

DEVELOPMENT

R4302

1

2

DEVELOPMENT

330

MF-LF

1/10W

5%

603

LED4301

1

2

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

R4303

1

2

DEVELOPMENT

330

MF-LF

1/10W

5%

603

LED4302

1

2

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

R4304

1

2

DEVELOPMENT

330

MF-LF

1/10W

5%

603

LED4303

1

2

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

R4350

1 2

0

R4351

1 2

0

R4352

1 2

0

R4353

1 2

0

R4354

1 2

0

R4355

1 2

0

R4356

1 2

0

R4357

1 2

0

97

051-7199

A

43

ETHERNET CONNECTOR

JD600

17_INCH_LCD

CRITICAL

1

514-0365

CON,RJ-45 7 DEGRESS, 243DEG C

ENET_MDI_R_N<3>

ENET_MDI_R_P<3>

ENET_MDI_R_N<2>

ENET_MDI_R_P<2>

ENET_MDI_R_N<1>

ENET_MDI_R_P<1>

ENET_MDI_R_N<0>

ENET_MDI_R_P<0>

ENET_MDI_N<3>

ENET_MDI_P<3>

ENET_MDI_N<2>

ENET_MDI_P<2>

ENET_MDI_N<1>

ENET_MDI_P<1>

ENET_MDI_N<0>

ENET_MDI_P<0>

ENET_LED_LINK_L

MAKE_BASE=TRUE

ENET_LED_LINK1000_L

MAKE_BASE=TRUE

ENET_LED_LINK10_100_L

MAKE_BASE=TRUE

LED4303_1

=PP3V3_S3_ENET

LED4301_1 LED4302_1LED4300_1

MAKE_BASE=TRUE

ENET_LED_ACT_L

GND_CHASSIS_RJ45

VOLTAGE=2.5V

PP2V5_ENET_CTAP

MIN_NECK_WIDTH=0.38mm

MIN_LINE_WIDTH=0.50mm

PP2V5_S3_ENET

42 41

41

6

41

6

42

Preliminary

IO IO

IO

OUT

PCI_AD1

VDD6

PCI_AD24

PCI_AD27

VDD5

XI

XO

RESET*

R1

R0

TPBIAS0

TPA0_P TPA0_N TPB0_P TPB0_N

TPBIAS1

TPA1_P TPA1_N TPB1_P TPB1_N

TPBIAS2

TPA2_P TPA2_N TPB2_P TPB2_N

LPS

CPS

LKON

CNA

NANDTREE

CONTENDER

PC1 PC2

PC0

VAUX_PRESENT

NU2

NU1

MPCIACT*

SE SM

TEST0 TEST1 PTEST

ROM_CLK

ROM_AD

PLLVSS

VSS0

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS8

VSS7

VSS9

VSS10

VSS11

VSS13

VSS12

VSSA0

VSSA1

VSSA2

VSSA3

CARDBUS*

PCI_INTA*

PCI_RST*

PCI_PME/CSTSCHG*

CLKRUN*

PCI_CLK

PCI_SERR*

PCI_PERR*

PCI_GNT*

PCI_REQ*

PCI_IDSEL

PCI_STOP*

PCI_DEVSEL*

PCI_TRDY*

PCI_IRDY*

PCI_FRAME*

PCI_PAR

PCI_CBE3*

PCI_CBE0* PCI_CBE1* PCI_CBE2*

PCI_AD31

PCI_AD30

PCI_AD29

PCI_AD26

PCI_AD28

PCI_AD25

PCI_AD21 PCI_AD22 PCI_AD23

PCI_AD20

PCI_AD19

PCI_AD18

PCI_AD17

PCI_AD16

PCI_AD13

PCI_AD15

PCI_AD14

PCI_AD11 PCI_AD12

PCI_AD8

PCI_AD10

PCI_AD9

PCI_AD6 PCI_AD7

PCI_AD3

PCI_AD5

PCI_AD4

PCI_AD2

PCI_AD0

PCI_VIOS

VDD10

VDD9

VDD8

VDD7

VDD4

VDD3

VDD1

VDD2

VDD0

PLLVDD

VDDA0

VDDA1

VDDA2

IO

IO IO

IO

IO IO

IO

IO IO

IO

IN

IO

IN

IO IO

IO

IO IO

IO

IO IO

IO

IO IO

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

USING PCI [1]

??? CHECK YELLOW EDS

THESE POWER PLANES SHOULD BE MOSTLY ISOLATED

T1: TP (?)

NOTE: 1% FOR BOM CONSOLIDATION

R4409

1 2

10K

R4402

1 2

10K

R4416

1

2

402

10K

5% 1/16W MF-LF

U4400

3

13

5

86

94

90

91

92

6

4 127

89 88 87

84 83

68 67 65 64 63 62 46 45 42 41

80

40 39 36 35 31 30 29 28 25 24

79

23 22

78 76 75 74 70 69

73 60 47 33

20

53

48

16

34

14

51

59

57

18

17

15

58

54

52

85

119

120

124

117

118

123

9

8

126 125

10 7

112

113

107

108

99

100

110

111

105

106

97

98

114

109

101

128

1

119319263743495572

82

104

116

96

12

2

667177

81

21273238445056

61

102

103

115

95

121

122

TQFP

FW32306

OMIT

L4409

1 2

0402

600-OHM-300MA

R4450

1 2

10K

R4451

1 2

10K

R4452

1 2

10K

R4453

1 2

10K

R4454

1 2

10K

R4455

1 2

10K

R4403

1 2

22

R4407

1 2

150

402

MF-LF

1/16W

1%

R4411

1 2

5%

1/16W

0

402

MF-LF

NOSTUFF

C4410

1

2

0.1UF

20%

402

10V CERM

Y4400

1

2

24.576M

HC49-USMD

CRITICAL

R4410

1 2

MF-LF

1/16W

1%

412

402

C4412

1 2

27PF

50V 402

5% CERM

C4401

1 2

27PF

CERM

50V5%402

C4402

1 2

0.1UF

402

CERM

20%10V

R4412

1 2

402

MF-LF

5%

1/16W

510K

R4413

1 2

1/16W1%MF-LF

402

2.49K

R4414

1 2

402

MF-LF

1/16W

5%

390K

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

051-7199

A

44 97

FW: FW323-06

PCI_IDSEL

=PP3V3_S5_FW

PCI_AD<0>

PP3V3_S5_FW_VDDA

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

VOLTAGE=3.3V

PCI_RST_L

PCI_RST_FW_L

FW_SM

FW_SE

FW_TEST

FW_CONTENDER

FW_PC2

FW_PC1

PCI_AD<7>

PCI_PAR

=PP3V3_S5_FW

FW_A_TPA_N

FW_XTAL_XR

FW_XTAL_XI

FW_RESET_L

=PP3V3_S5_FW

=PP12V_S5_FW_PHY

FW_XTAL_X0

=PP3V3_S0_PCI

PCI_AD<2>

PCI_AD<4> PCI_AD<5>

PCI_AD<3>

PCI_AD<6>

PCI_AD<9> PCI_AD<10>

PCI_AD<8>

PCI_AD<12>

PCI_AD<11>

PCI_AD<14> PCI_AD<15>

PCI_AD<13>

PCI_AD<16> PCI_AD<17> PCI_AD<18>

PCI_AD<20>

PCI_AD<23>

PCI_AD<22>

PCI_AD<21>

PCI_AD<25>

PCI_AD<28>

PCI_AD<26>

PCI_AD<29> PCI_AD<30> PCI_AD<31>

PCI_C_BE_L<2>

PCI_C_BE_L<1>

PCI_C_BE_L<0>

PCI_C_BE_L<3>

PCI_FRAME_L PCI_IRDY_L PCI_TRDY_L PCI_DEVSEL_L PCI_STOP_L

PCI_PERR_L PCI_SERR_L

PCI_CLK_FW PM_CLKRUN_L

PCI_PME_FW_L

PCI_RST_FW_L INT_PIRQD_L

FW_CARDBUS_L

TP_FW_ROM_AD

FW_ROM_CLK

TP_FW_MPCIACT_L

NC_FW_NU1 NC_FW_NU2

TP_FW_VAUX_PRES

FW_PC0

TP_FW_NANDTREE

TP_FW_CNA

TP_FW_LKON

FW_CPS

TP_FW_LPS

FW_C_TPB_N

FW_C_TPB_P

FW_C_TPA_N

FW_C_TPA_P

FW_C_TPBIAS

FW_B_TPB_N

FW_B_TPB_P

FW_B_TPA_N

FW_B_TPA_P

FW_B_TPBIAS

FW_A_TPB_N

FW_A_TPB_P

FW_A_TPA_P

FW_A_TPBIAS

FW_R0

FW_R1

FW_RESET_L

FW_XTAL_X0

FW_XTAL_XI

PCI_AD<27>

PCI_AD<24>

PCI_AD<1>

=PP3V3_S5_FW

PCI_AD<19>

PCI_FW_REQ_L PCI_FW_GNT_L

67

46

60

46

45

58

45

44

26

23

26

44

6

22

45

22

44

22

6

46

44

6

46

44

6

22

34

5

22

44

22

46

44

22

6

22

27

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

C4500

1

2

402

CERM

16V

20%

0.01UF

C4501

1

2

402

CERM

16V

20%

0.01UF

C4502

1

2

402

CERM

16V

20%

0.01UF

C4504

1

2

402

CERM

16V

20%

0.01UF

C4505

1

2

0.01UF

20% 16V CERM 402

C4506

1

2

20% CERM

402

10V

0.1UF

C4507

1

2

402

CERM

20% 10V

0.1UF

C4508

1

2

402

CERM

20% 10V

0.1UF

C4521

1

2

402

0.1UF

10V

20% CERM

C4520

1

2

402

0.1UF

10V CERM

20%

C4523

1

2

402

CERM

16V

20%

0.01UF

C4522

1

2

402

CERM

16V

20%

0.01UF

C4515

1

2

805-1

6.3V

20%

10UF

CERM

C4503

1

2

805-1

10UF

20%

6.3V CERM

C4509

1

2

0.1UF

10V 402

CERM

20%

C4510

1

2

0.1UF

10V

20% CERM

402

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

FW: DECAPS

9745

A

051-7199

=PP3V3_S5_FW

PP3V3_S5_FW_VDDA

46 44

6

44

Preliminary

TPI

VGND

VP

TPI#

TPO#

TPO

TPI

VGND

VP

TPI#

TPO#

TPO

SYM_VER-1

IO IO

IO

IO IO

IO

IO IO

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TO FW CDS PIN (CABLE POWER DETECT)

8 WATTS MAX

PLACE R4657 PADS INSIDE R4656

514-0251 20_INCH_VERSION SHOWN

FW_VP MAX IS 33V

"Snapback" & "Late VG" Protection

12 VOLTS

Place close to FireWire PHY

(TPB-)

PORT 0

1394A

(TPA+)

(TPA-)

(TPB+)

(TPB-)

1394A

(TPA+)

(TPB+)

PORT 1

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

ESD Rail

(TPA-)

Termination

DESIGNED WITH INTENTION TO RESIZE FUSE LIMITS EQUAL FW SPEC 1.5A LIMIT

POSSIBLE CURRENT SHARING SCENARIO KCL = CABLE POWER + SYSTEM POWER = > 1.5 AMPS

3rd TPA/TPB pair unused

R4690 VALUE WAS RECOMMENDED BY COLIN

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP

[ LATE VG NOTES ]

"Snapback" & "Late VG" Protection

D4600

1 2

MURS320XXG

SMC

R4656

1 2

2512

NOSTUFF

20%

1.3

1W FF

C4626

1

2

20% 16V

CERM

402

0.01uF

DP4620

4

5

3

SOT-363

BAV99DW-X-F

DP4620

1

2

6

BAV99DW-X-F

SOT-363

JE001

10

7 8 9

4

3

6

5

2

1

F-ST-TH

CRITICAL

OMIT

UF01613-M33-4F

JE000

10

7 8 9

4

3

6

5

2

1

CRITICAL

F-ST-TH

OMIT

UF01613-M33-4F

C4616

1

2

0.01uF

402

CERM

20% 16V

DP4610

4

5

3

BAV99DW-X-F

SOT-363

DP4611

4

5

3

SOT-363

BAV99DW-X-F

DP4610

1

2

6

BAV99DW-X-F

SOT-363

DP4611

1

2

6

SOT-363

BAV99DW-X-F

C4660

1

2

0.33UF

CERM-X5R

10%

6.3V 402

R4661

1

2

1/16W

1%

402

56.2

MF-LF

R4660

1

2

402

1/16W

1%

56.2

MF-LF

C4650

1

2

0.33UF

CERM-X5R

10%

402

6.3V

R4651

1

2

402

1/16W

1%

56.2

MF-LF

R4650

1

2

MF-LF

1/16W

402

1%

56.2

R4663

1

2

402

1/16W

1%

56.2

MF-LF

R4662

1

2

402

MF-LF

1/16W

1%

56.2

R4664

1

2

4.99K

1% 1/16W

402

MF-LF

C4664

1

2

220PF

5%

25V

CERM

402

R4653

1

2

402

MF-LF

1/16W

1%

56.2

R4652

1

2

1/16W

402

MF-LF

56.2

1%

R4654

1

2

4.99K

MF-LF

1/16W

1%

402

C4654

1

2

220PF

402

CERM

5%

25V

L4690

1 2

SM-1

400-OHM-EMI

D4690

1 3

BZX84C2V7-X-F

SOT23

CRITICAL

FL4610

1

2 3

4

2012

120-OHM

CRITICAL

FLE011

1

2 3

4

2012

120-OHM

CRITICAL

FL4620

1

2 3

4

120-OHM

2012

CRITICAL

FLE021

1

2 3

4

2012

120-OHM

CRITICAL

L4610

1

2

1206-LF

FERR-160-OHM

L4620

1

2

1206-LF

FERR-160-OHM

F4602

1 2

CRITICAL

0.75AMP-13.2V

MINISMD-LF

DP4621

4

5

3

SOT-363

BAV99DW-X-F

DP4621

1

2

6

BAV99DW-X-F

SOT-363

I443

R4690

1 2

374

402

MF-LF

1%

1/16W

C4615

1

2

603-1

X7R

10%

0.1UF

50V

C4625

1

2

50V

0.1UF

10% X7R

603-1

C4623

1

2

50V

0.001UF

10%

CERM

402

C4622

1

2

402

CERM

10%

0.001UF

50V

C4612

1

2

402

CERM

10%

0.001UF

50V

C4613

1

2

402

CERM

10%

0.001UF

50V

C4621

1

2

50V

0.001UF

10%

CERM

402

C4620

1

2

0.001UF

50V

10%

CERM

402

C4610

1

2

402

CERM

10%

0.001UF

50V

C4611

1

2

402

CERM

10%

0.001UF

50V

R4657

1 2

5%

1/8W

MF-LF

805

0

FIREWIRE CONNECTORS

46 97

A

051-7199

JE000,JE001

CRITICAL

17_INCH_LCD

2

514-0336

CON,1394A 7 DEGREES, W/O RIBS

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.6 mm

VOLTAGE=33V

PPFW_PORTS_VP

PP3V3_FW_ESD

FW_C_TPB_N

=PP3V3_S5_FW

VOLTAGE=33V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.8MM

FW_VP

FW_B_TPA_N FW_B_TPB_P FW_B_TPB_N

VOLTAGE=1.86V

FW_B_TPBIAS

PP3V3_FW_ESD_F

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.25 mm

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.38 mm

PP3V3_FW_ESD

PPFW_PORTS_VP

FW_TPA_C<1>

VOLTAGE=0V

VOLTAGE=1.86V

FW_A_TPBIAS

FW_TPA_C<0>

VOLTAGE=0V

MAKE_BASE=TRUE

FW_PORT0_TPA_P

FW_A_TPA_P

FW_PORT0_TPA_N

MAKE_BASE=TRUE

FW_A_TPA_N

FW_PORT0_TPB_N

MAKE_BASE=TRUE

FW_PORT0_TPB_P

FW_A_TPB_P

FW_PORT1_TPA_P

MAKE_BASE=TRUE

TP_FW_C_TPA_P

MAKE_BASE=TRUE

TP_FW_C_TPBIAS

MAKE_BASE=TRUE

FW_C_TPBIAS

FW_C_TPA_P

TP_FW_C_TPA_N

MAKE_BASE=TRUE

TP_FW_C_TPB_P

MAKE_BASE=TRUE

TP_FW_C_TPB_N

MAKE_BASE=TRUE

FW_C_TPA_N

FW_C_TPB_P

=PP12V_S5_FW_PHY

FW_PORT0_TPB_FL_P

FW_PORT0_TPB_FL_N

FW_PORT0_TPA_FL_P

FW_PORT0_TPA_FL_N

PP3V3_FW_ESD

FW_PORT0_TPA_P

FW_PORT0_TPB_P

FW_PORT0_TPB_N

FW_PORT0_TPA_N

FW_PORT1_TPA_FL_P

FW_PORT1_TPA_FL_N

FW_PORT1_TPB_FL_P

FW_PORT1_TPB_FL_N

FW_PORT1_TPA_N

FW_PORT1_TPA_P

FW_PORT1_TPB_N

PP3V3_FW_ESD

GND_CHASSIS_FIREWIRE

VOLTAGE=33V

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.6 mm

PPFW_PORT0_VP_FL

VOLTAGE=33V

PPFW_PORT1_VP_FL

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.25 mm

GND_CHASSIS_FIREWIRE

FW_PORT1_TPB_P

FW_A_TPB_N

FW_B_TPA_P

MAKE_BASE=TRUE

FW_PORT1_TPB_N

MAKE_BASE=TRUE

FW_PORT1_TPB_P

MAKE_BASE=TRUE

FW_PORT1_TPA_N

=PP12V_S5_FW

MAKE_BASE=TRUE

VOLTAGE=12V

MIN_LINE_WIDTH=0.8MM

PP12V_FW

MIN_NECK_WIDTH=0.25MM

45

44

46

6

44

46

44

46

44

46

44

46

44

46

44

46

6

46

44

46

6

Preliminary

SYM_VER-1

SYM_VER-2

IO

OUT

EN3*

EN1* EN2*

OC1* OC2* OC3*

IN1 IN2

OUT1

OUT2

OUT3

NC

GNDA GNDB

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

STUFFING FOR PROTO, EVAL LATER

D-

VDD

PORT 0

STUFFING FOR PROTO, EVAL LATER

D+

LAYOUT NOTE:

BOTH SIDES OF THE PIN.

TO M13D SLOT

GND

D+

D-

VDD

PORT 1

514-0247

GND

VDD D-

PORT 2

GND

D+

SB HAS INTERNAL 15K PULL-DOWNS

740S0032

514-0247

NOTE: STANDOFFS FOR J4700

SB HAS INTERNAL 15K PULL-DOWNS

MAKE SURE 6.3V CAP HERE IS OK

SB HAS INTERNAL 15K PULL-DOWNS

CAMERA CONNECTOR

SB HAS INTERNAL 15K PULL-DOWNS

MIC CONNECTOR

IR CONNECTOR

514-0247

External USB Ports

SB HAS INTERNAL 15K PULL-DOWNS

PLACE C4743, C4797 & L4740

ORDER LISTED, AND NOT ON

BLUETOOTH

SB HAS INTERNAL 15K PULL-DOWNS

NEAR JE4702 PIN 14 IN THE

PLACE C4742 CLOSED TO JE4702.

L4712

1

2 3

4

2012

120-OHM

CRITICAL

C4713

1

2

20% 16V

402

CERM

0.01uF

C4712

1

2

0.01uF

402

20%

CERM

16V

C4710

1

2

20% POLY

6.3V SMD2

150UF

NOSTUFF

L4710

1 2

FERR-250-OHM

SM

C4723

1

2

20%

0.01uF

402

CERM

16V

C4722

1

2

20%

402

0.01uF

CERM

16V

L4720

1 2

SM

FERR-250-OHM

L4722

1

2 3

4

120-OHM

2012

CRITICAL

L4732

1

2 3

4

CRITICAL

2012

120-OHM

C4733

1

2

20%

402

CERM

0.01uF

16V

C4732

1

2

CERM

0.01uF

20% 16V

402

L4730

1 2

SM

FERR-250-OHM

R4712

1 2

NOSTUFF

402

0

R4713

1 2

NOSTUFF

0

402

R4722

1 2

NOSTUFF

0

402

R4723

1 2

NOSTUFF

402

0

R4732

1 2

NOSTUFF

0

402

R4733

1 2

NOSTUFF

402

0

R4742

1 2

0

NOSTUFF

402

R4743

1 2

NOSTUFF

0

402

L4752

1

2 3

4

CAMERA

2012

CRITICAL

120-OHM

R4755

1 2

0

402

NOSTUFF

R4754

1 2

402

0

NOSTUFF

C4743

1

2

CAMERA

CERM

16V 402

20%

0.01uF

C4742

1

2

CAMERA

16V

20%

0.01uF

402

CERM

L4740

1 2

CAMERA

SM

FERR-250-OHM

R4746

1 2

CAMERA

0

805

1/8W

MF-LF

5%

L4742

1

2 3

4

CRITICAL

120-OHM

2012

F4701

1 2

CAMERA

CRITICAL

MINISMD-LF

0.75AMP-13.2V

C4797

1

2

CAMERA

CERM

20%

6.3V

10UF

805-1

J4700

1

10

2

3

4

5

6

7

8

9

CRITICAL

F-ST-SM

QT800101-1210S-8F

BLUETOOTH

C4798

1

2

0.1UF

CERM

20% 10V

402

BLUETOOTH

JE310

5 6

7

1 2 3 4

OMIT

UB01123M23-4F

F-ST-TH

JE320

5 6

7

1 2 3 4

OMIT

F-ST-TH

UB01123M23-4F

JE330

5 6

7

1 2 3 4

UB01123M23-4F

OMIT

F-ST-TH

C4799

1

2

CERM

20%

6.3V

10UF

805-1

BLUETOOTH

SDF4700

1

STDOFF-4OD4.5H-1.35-TH

BLUETOOTH

SDF4701

1

STDOFF-4OD4.5H-1.35-TH

BLUETOOTH

D4700

3

1

2

CRITICAL

SC-75

RCLAMP0502B

D4701

3

1

2

SC-75

RCLAMP0502B

D4702

3

1

2

SC-75

RCLAMP0502B

U4700

3 4 7

1 5

2

6

8 9 10

16 13 12

15

14

11

CRITICAL

TPS2043B

SOI

C4720

1

2

150UF

20% POLY

6.3V SMD2

NOSTUFF

C4700

1

2

TH-KZJ-LF

1800UF

20%

6.3V ELEC

CRITICAL

JE4700

5

6

1 2 3 4

M-ST-SM

87212-0400L-BLK

CRITICAL

JE4702

6

7

1 2 3 4 5

53261-0598

CRITICAL

M-RT-SM

CAMERA

JE4701

4

5

1 2 3

CRITICAL

M-RT-SM

53261-0398

A

051-7199

47 97

USB Device Interfaces

3

CRITICAL

17_INCH_LCD

514-0339

USB RECEPTACLE,4P,UB1123-M50-4F

JE310,JE320,JE330

USB_CAMERA_N

USB_CAMERA_P

GND_CHASSIS_USB

VOLTAGE=0

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.2MM

USB_H_N

=PP5V_S3_BNDI

USB_H_P

PP5V_S3_BNDI GND_BNDI

USB_D_N

USB_D_P

USB_A_N

USB_A_P

USB_PORT0_N

PP5V_USB2_PORT1_F

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

USB_E_OC_L

USB_C_OC_L

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

PP5V_S3_BNDI

MAKE_BASE=TRUE

USB_BT_P

PP5V_BNDI_LE340

GND_BNDI

VOLTAGE=0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

GND_CHASSIS_BNDI

=PP5V_S3_BNDI

USB_G_P

USB_G_N

GND_CHASSIS_USB

USB_PORT1_P

USB_PORT2_N

USB_PORT2_P

USB_C_P

USB_C_N

USB_E_N

USB_E_P

PP5V_USB2_PORT2_F

MIN_NECK_WIDTH=0.25MM

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM

GND_CHASSIS_USB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

VOLTAGE=5V

PP5V_USB2_PORT2

USB_A_OC_L

USB_PORT1_N

PP5V_USB2_PORT0_F

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

USB_PORT0_P

VOLTAGE=5V

PP5V_USB2_PORT1

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

=PP5V_S3_USB

USB_IR_N USB_IR_P

GND_AUDIO_MIC_CONN

AUD_MIC_IN_P_CONN

AUD_MIC_IN_N_CONN

VOLTAGE=5V

PP5V_USB2_PORT0

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

GND_CHASSIS_BNDI

MAKE_BASE=TRUE

USB_BT_N

=PP3V3_S3_BT

47

22

47

6

22

6

22

47

22

47

6

22

6

22

6

73

6

Preliminary

KEY

IO IO

IN

IO

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PLACE CAPS < 250 MILS FROM U2100

LAYOUT NOTE:

MINIMIZED IF THE RESISTORS ARE NOT STUFFED

PLACE R5302-03 SUCH THAT STUB LENGTH IS

NOTE: STANDOFFS FOR J5300

SB HAS INTERNAL 15K PULL-DOWNS

SDF5300

1

STDOFF-4OD5.6H-1.35-TH

SDF5301

1

STDOFF-4OD5.6H-1.35-TH

C5300

1 2

0.1UF

C5301

1 2

0.1UF

J5300

53

54

1

10 11 12 13 14 15 16 17 18 19

2

20 21 22 23 24 25 26 27 28 29

3

30 31 32 33 34 35 36 37 38 39

4

40 41 42 43 44 45 46 47 48 49

5

50 51 52

6 7 8 9

CRITICAL

F-RT-SM

ASOB226-S80N-7F

C5304

1

2

10V CERM 402

0.1UF

20%

C5305

1

2

402

20%

0.1UF

CERM

10V

C5306

1

2

0.1UF

10V CERM 402

20%

C5307

1

2

402

CERM

10V

0.1UF

20%

C5308

1

2

402

20%

0.1UF

10V CERM

C5310

1

2

10V 402

CERM

0.1UF

20%

C5309

1

2

CERM 402

20%

0.1UF

10V

R5302

1 2

0

R5303

1 2

0

C5311

1

2

805-2

10UF

CERM

10V

20%

R5304

1 2

0

C5312

1

2

805-2

10UF

CERM

10V

20%

C5314

1

2

805-2

10UF

CERM

10V

20%

C5313

1

2

402

CERM

10V

20%

0.1UF

051-7199

9753

A

AIRPORT CONN

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

USB_B_N USB_B_P

=PP1V5_S0_AIRPORT

=PP3V3_S0_AIRPORT

AIRPORT_CONN_DATA

AIRPORT_WAKE_L

PP3V3_S3

AIRPORT_CLK100M_PCIE_N

PCIE_WAKE_L

PCIE_AIRPORT_D2R_P

AIRPORT_CONN_CLK =SMB_AIRPORT_CLK

=SMB_AIRPORT_DATA

AIRPORT_CLK100M_PCIE_P

CK410_SRC_CLKREQ6_L

AIRPORT_RST_L

PCIE_AIRPORT_R2D_C_N

PCIE_AIRPORT_R2D_P

PCIE_AIRPORT_R2D_N

PCIE_AIRPORT_R2D_C_P

PCIE_AIRPORT_D2R_N

83 59

41

22

6

34

23

54

27

34

33

6

54

Preliminary

IN

OUT

IN

OUT

IN

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

USED PCIE PORTS

051-7199

A

54 97

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

PCIE PORT ALIASES

PCIE_C_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_C_D2R_N

MAKE_BASE=TRUE

TP_PCIE_C_D2R_P

MAKE_BASE=TRUE

TP_PCIE_D_R2D_C_P

MAKE_BASE=TRUE

TP_PCIE_D_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_D_D2R_N

MAKE_BASE=TRUE

TP_PCIE_D_D2R_P

MAKE_BASE=TRUE

TP_PCIE_E_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_E_R2D_C_P

TP_PCIE_E_D2R_P

MAKE_BASE=TRUE

TP_PCIE_E_D2R_N

MAKE_BASE=TRUE

TP_PCIE_C_R2D_C_P

MAKE_BASE=TRUE

PCIE_C_R2D_C_P

PCIE_C_D2R_N

PCIE_C_D2R_P

PCIE_D_R2D_C_N

PCIE_D_R2D_C_P

PCIE_D_D2R_N

PCIE_D_D2R_P

PCIE_E_R2D_C_N

PCIE_E_R2D_C_P

PCIE_E_D2R_N

PCIE_E_D2R_P

MAKE_BASE=TRUE

PCIE_A_R2D_C_P

MAKE_BASE=TRUE

PCIE_A_R2D_C_N

PCIE_F_R2D_C_N

PCIE_F_R2D_C_P

PCIE_F_D2R_P

PCIE_F_D2R_N

TP_PCIE_F_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_F_R2D_C_P

MAKE_BASE=TRUE

TP_PCIE_F_D2R_P

MAKE_BASE=TRUE

TP_PCIE_F_D2R_N

PCIE_AIRPORT_R2D_C_N

PCIE_AIRPORT_R2D_C_P

TP_PCIE_C_R2D_C_N

MAKE_BASE=TRUE

PCIE_AIRPORT_D2R_N

PCIE_AIRPORT_D2R_P

PCIE_ENET_R2D_C_N

PCIE_ENET_R2D_C_P

MAKE_BASE=TRUE

PCIE_A_D2R_P

MAKE_BASE=TRUE

PCIE_A_D2R_N

PCIE_ENET_D2R_N

MAKE_BASE=TRUE

PCIE_B_R2D_C_P

MAKE_BASE=TRUE

PCIE_B_D2R_N

PCIE_ENET_D2R_P

MAKE_BASE=TRUE

PCIE_B_D2R_P

MAKE_BASE=TRUE

PCIE_B_R2D_C_N

22

5

22

5

22

53

41

Preliminary

IN

OUT

IN

OUT

IN

IN IN

IN

IN IN

IN

OUT

IN

OUT

P16

P51

P50

P42/SDA1

P97/IRQ15*/SDA0

P95/IRQ14*

P94/IRQ13*

P93/IRQ12*

P92/IRQ0*

P91/IRQ1*

P86/IRQ5*/SCK1/SCL1

P83/LPCPD*

P82/CLKRUN*

P80/PME*

P35/LRESET*

P34/LFRAME*

P10

P12 P13 P14 P15

P17

P31/LAD1

P30/LAD0

P32/LAD2 P33/LAD3

P36/LCLK P37/SERIRQ

P44/TMO1

P77/AN7

P76/AN6

P81/GA20

P96/EXCL

P11

P47/PWX1/PWM1

P45 P46/PWX0/PWM0

P40/TMIO

P43/TMI1/EXSCK1

P27

P26

P25

P24

P23

P22

P21

P20

P41/TMO0

P52/SCL0

P60/KIN0* P61/KIN1* P62/KIN2* P63/KIN3* P64/KIN4*

P65/KIN5* P66/IRQ6*/KIN6* P67/IRQ7*/KIN7*

P70/AN0 P71/AN1 P72/AN2 P73/AN3 P74/AN4 P75/AN5

P84/IRQ3*/TXD1 P85/IRQ4*/RXD1

P90/IRQ2*

(1 OF 4)

PA2/KIN10*/PS2AC PA3/KIN11*/PS2AD

PA5/KIN13*/PS2BD

PA4/KIN12*/PS2BC

PB2 PB3 PB4

PE0

PG6/EXIRQ14*/EXSDAB

PG5/EXIRQ13*/EXSCLA

PH1/EXIRQ7*

PH0/EXIRQ6*

PG7/EXIRQ15*/EXSCLB

PG4/EXIRQ12*/EXSDAA

PH3/EXEXCL

PH2/FWE

PB5

PF4/PWM4

PF2/IRQ10*/TMOY

PG2/EXIRQ10*/SDA2

PG0/EXIRQ8*/TMIX

PF7/PWM7

PC3/TIOCD0/TCLKB/WUE11*

PH5

PB7

PB6

PH4

PF5/PWM5 PF6/PWM6

PG1/EXIRQ9*/TMIY

PA6/KIN14*/PS2CC PA7/KIN15*/PS2CD

PD0/AN8 PD1/AN9 PD2/AN10 PD3/AN11 PD4/AN12 PD5/AN13 PD6/AN14 PD7/AN15

PF0/IRQ8*/PWM2 PF1/IRQ9*/PWM3

PB0/LSMI* PB1/LSCI

PC0/TIOCA0/WUE8* PC1/TIOCB0/WUE9* PC2/TIOCC0/TCLKA/WUE10*

PC4/TIOCA1/WUE12* PC5/TIOCB1/TCLKC/WUE13* PC6/TIOCA2/WUE14* PC7/TIOCB2/TCLKD/WUE15*

PG3/EXIRQ11*/SCL2

PF3/IRQ11*/TMOX

PA1/KIN9*/PA2DD

PA0/KIN8*/PA2DC

PE1*/ETCK PE2*/ETDI PE3*/ETDO PE4*/ETMS

(2 OF 4)

VCL

AVREF

VCC

AVCC

XTAL EXTAL

AVCC

VCC

MD1 MD2

NMI

RES*

ETRST*

AVREF

AVSS

VSS

(3 OF 4)

NC22

NC21

NC20

NC19

NC18

NC17

NC16

NC15

NC14

NC13

NC12

NC9

NC6

NC11

NC10

NC8

NC7

NC5

NC4

NC3

NC2

NC1

NC0

(4 OF 4)

OUT

IO

OUT

IN

OUT

IN

IO

IN

IO

OUT

IN

OUT

IN

OUT OUT

OUT

IN

IN IN

IN

OUT

IN

OUT

OUT OUT

OUT

IO

IO IO

IO

OUT

OUT OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT OUT

IO IO

IO

IO IN

IN

OUT

OUT OUT

IO

IN

IN IN

IO

IN IN

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

THEY ARE SET BY SOFTWARE TO BE DRIVEN OUTPUTS ALWAYS SO THEY

LAYOUT NOTE: PLACE C5807 NEAR PIN F1

VCL IS INTERNAL RAIL

PLACE R5899 AND C5820 NEAR SMC PIN N14,N15

SMC

LAYOUT NOTE:

UNUSED PINS HAVE THE FORMAT

CAN BE LEFT NO-CONNECTED.

SMC_XXX WHERE XXX IS THE PORT NUMBER.

C5802

1

2

22UF

X5R

6.3V

20%

805

C5807

1

2

CERM-X5R

6.3V

10%

402

0.47UF

C5803

1

2

402

CERM

20%

0.1UF

10V

C5820

1

2

402

10V CERM

20%

0.1UF

R5899

1 2

MF-LF

402

4.7

1/16W

5%

C5804

1

2

402

CERM

10V

20%

0.1UF

XW5800

1 2

OMIT

SM

C5805

1

2

CERM

0.1UF

20% 10V

402

C5806

1

2

0.1UF

402

CERM

10V

20%

U5800

B12 C13 A15 B14 B15 C14 D12 C15

D13 D14 D15 E12 E14 E15 E13 F14

D9 C9 A9 B9 D8 C8 A8 D7

A5 B5 D5 C3 B1 C2 D3 C1

G1 G4 F2

L13 L14 L15 K12 K13 K14 J12 J13

N12 R13 P13 R14 P14 R15 N13 P15

C7 A7 B7 D6 C6 A6 B6

K4 J2 J1 J3 J4 H2 H1 G2

SMC_H8S2116

OMIT

BGA

U5800

R3 P3 R2 N3 R1 N2 M4 N1

B10 A10 D10 A11 B11 C11 A12 D11

G14 G15 G13 G12 H14 H15 H13 H12

M11 P11 R11 N11 P10 R10 N10 M10

M3 M2 M1 L4 L2

M7 P6 R6 N6 M6 R5 P5 N5

P9 R9 N9 P8 R8 M8 P7 R7

E1 F3 K2 C4 D4 B3

BGA

SMC_H8S2116

OMIT

U5800

N14

N15

M14

M15

P12 R12

L1

B2

E2 K1

F4

E3

P2P1J15A1F1

D1P4R4

F12

F13

B13

A13

A4B4D2

A2

OMIT

SMC_H8S2116

BGA

U5800

G3 H3

K15 J14

F15 A14 C12 C10 C5 A3 B8 E4

K3

H4 M9 N8

L3 N4 M5

N7 M12 M13 L12

OMIT

SMC_H8S2116

BGA

R5809

1

2

10K

1/16W 402

5% MF-LF

R5801

1

2

1/16W

10K

5% 402

MF-LF

R5802

1

2

402

MF-LF

10K

5% 1/16W

R5803

1

2

0

5% 1/16W MF-LF 402

NOSTUFF

R5898

1

2

402

1/16W

5% MF-LF

10K

9758

A

051-7199

SMC_SYS_VSET

SMC_BATT_ISET

SMC_LID

SMC_PF1

SMS_ONOFF_L

SMS_X_AXIS

SMS_Z_AXIS SMC_ANALOG_ID SMC_NB_ISENSE SMC_MEM_ISENSE

SMC_BS_ALRT_L

SMS_INT_L

SMC_CPU_ISENSE

SPI_SI

SMC_FAN_2_CTL

SMC_EXCARD_OC_L

SMC_PM_G2_EN

SMC_P22

SMC_XTAL SMC_EXTAL

MIN_NECK_WIDTH=0.20 MM

MIN_LINE_WIDTH=0.25 MM

PP3V3_AVCC_SMC

=PP3V3_S5_SMC

KBC_MDE

ALS_LEFT

SMC_MD1

PP3V3_AVREF_SMC

SMC_PROCHOT

SMC_TRST_L

SMC_NMI

GND_SMC_AVSS

SPI_ARB

SMC_XDP_TDO_3_3

SMC_SYS_LED_16B

GND_SMC_AVSS

=PP3V3_S5_SMC

SMC_CPU_INIT_3_3_L

SMC_P23

SMC_BC_ACOK

SMC_FWE

ALS_RIGHT

SMS_Y_AXIS

SMC_FAN_3_TACH

SMC_FAN_1_CTL

SMC_FAN_0_CTL

SMC_P21

SMC_BATT_TRICKLE_EN_L

SMC_P20

SMC_BATT_CHG_EN

SMC_P26

SMC_CASE_OPEN SMC_TCK SMC_TDI SMC_TDO SMC_TMS

SMC_SYS_ISET

SMC_BATT_VSET

SMC_ODD_DETECT

SMC_RUNTIME_SCI_L

SMB_0_S0_DATA

SMC_CPU_VSENSE

SMC_ADAPTER_EN

SMC_PF0

SPI_CE_L SMC_XDP_TCK_3_3

SMC_CPU_RESET_3_3_L

SMC_GPU_ISENSE

SMC_DCIN_ISENSE

SMC_EXCARD_CP

SMC_VCL

=PP3V3_S5_SMC

PM_SLP_S5_L

PM_SLP_S4_L

PM_SLP_S3_L

SMC_RST_L

ALS_GAIN

SMC_THRMTRIP

SMC_XDP_TRST_L

PM_SYSRST_L

SMC_SUS_CLK

SPI_SCLK

SPI_SO SMC_PROCHOT_3_3_L

SMC_GPU_VSENSE

SMC_PBUS_VSENSE SMC_BATT_ISENSE SMC_FWIRE_ISENSE

SMC_EXCARD_PWR_EN

ISENSE_CAL_EN

SMC_EXTSMI_L

SMC_RX_L

SMC_XDP_TCK

SMC_XDP_TMS

SMB_BSB_DATA SMC_TPM_PP

SMC_FAN_3_CTL

SMC_FAN_2_TACH

SMC_FAN_1_TACH

SMC_FAN_0_TACH

PM_BATLOW_L

SYS_ONEWIRE

PM_THRM_L

PM_EXTTS_L

SMC_TPM_RESET_L

BOOT_LPC_SPI_L

SMC_RCIN_L

SMC_P27

LPC_AD<0> LPC_AD<1> LPC_AD<2> LPC_AD<3> LPC_FRAME_L SMC_LRESET_L PCI_CLK_SMC INT_SERIRQ

SMC_TPM_GPIO PM_CLKRUN_L PM_SUS_STAT_L SC_TX_L SC_RX_L

SMC_ONOFF_L

SMB_BSB_CLK

SMC_WAKE_SCI_L

PM_PWRBTN_L

IMVP_VR_ON

PM_RSMRST_L

SMC_SB_NMI

RSMRST_PWRGD

ALL_SYS_PWRGD

PM_LAN_ENABLE SMC_RSTGATE_L

SMB_0_S0_CLK

SMB_BSA_DATA SMB_BSA_CLK SMB_A_S3_DATA SMB_A_S3_CLK SMB_B_S0_DATA SMB_B_S0_CLK

SMC_SYS_KBDLED

SMC_SYS_LED

SMC_TX_L

67

80

60

59

76

59

60

59

79

26

60

67

44

67

60

26

63

58

59

22

59

58

59

63

58

77

77 60

23

63

59

23

59

67

60

23

60

77

59

80

59

23

76

22

66

59

6

59

60

59

60

58

5

59

58

6

59

65

59

5

59

59 59

23

59

76

59

22

59

76

59

6

23

23 59

59

5

59

22

59

76

59

76

23

5

59

66

65

23

59

10

14

59

22

21

59

21

6

34

23

59

5

23

59

23

75

23

76

26

23

59

5

Preliminary

G

D

S

G

D

S

IO

NC

CD

GND

OUT

VDD

G

D

S

D

G

S

LM393A

V+

GND

LM393A

V+

GND

VIN

VOUT

OUT

IO IO

IO

IO IO

IN

IO

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TPM CRYSTAL

LAYOUT NOTE: PLACE CAPACITORS BETWEEN CRYSTAL AND SMC/TPM

TPM RESET PULLUP

WIRE-OR DIMM OVERTEMP TO SMC

CPU HIGH SIDE IN CURRENT

ONLY USING PADS FOR SWITCH

PLACE R5908 CLOSE TO SW5901

AMBIENT LIGHT SENSOR CONNECTOR

SYS POWER BUTTON

PIN COMPATIBLE WITH TI REF3133 353S1278

SMC RESET BUTTON

POWER BUTTON HEADER

ALIAS SENSORS INTO SMC I2C BUSSES

SMC I2C BUS PULLUPS (INCLUDING UNUSED ONES)

WHITE SYSLED

SMC ALIASES, PULLUPS, AND TESTPOINTS

SENSE GPU VCORE

GENERATE 0.48V MID-VREF

NC OR PULLDOWN UNUSED ANALOG SENSE PINS

WIRE SMC TO SB PINS

SMC PULL-UPS

SMC 3.3V -> CPU 1.05V SHIFTER

3.3V RAIL AND AVCC RAIL IS UP.

NO-CONNECT UNUSED PINS

SPARE COMPARATER

PRECISION 3.3V AVREF FOR SMC

(REF DES PRESERVED FOR PLACEMENT PURPOSE)

DEBUG TESTPOINTS ON SELECTED INPUTS/OUTPUTS

CPU 1.05V -> SMC 3.3V SHIFTER

518S0328

518S0327

(REF DES PRESERVED FOR PLACEMENT PURPOSE)

I2C ADDR:72(1001000)

TURN ON 3.3V VREF ONLY AFTER SMC

PINS ON PORT 7.

PULLDOWN UNUSED ANALOG SENSE

PULLUPS FOR SYSTEM STATE PINS

SMC CRYSTAL

PULLDOWNS FOR SYSTEM STATE PINS

PCB: RUN A TRACE FROM EACH ANALOG OPAMP PSEUDO-DIFFERENTIALLY

TIE INTO DIGITAL GND VERY CLOSE TO SMC’S XW5800. PLACE XW5900 NEAR XW5800.

NEXT TO THIS GND TRACE AND

SELECT TPM GPIO

PCB: ENSURE FSB_CPURST_L FANS OUT FROM U1200 AND MINIMIZE ROUTE LENGTH TO U5999.

TIE ANALOG SENSOR OPAMP GROUNDS TO SMC GROUND

J2901

5

6

1 2 3 4

53398-0476

CRITICAL

F-ST-SM

R5917

1 2

10K

R5920

1 2

SMC_TPM_GPIO1

0

R5921

1 2

1/16W MF-LF

402

SMC_TPM_GPIO2

5%

0

R5922

1 2

DEVELOPMENT_SMC

0

R5923

1 2

5% 1/16W MF-LF

402

0

DEVELOPMENT_SMC

Q5901

6

2

1

2N7002DW-X-F

SOT-363

Q5901

3

5

4

SOT-363

2N7002DW-X-F

C5903

1

2

CERM

20%

0.1uF

402

10V

R5930

1

2

402

5%

6.2K

1/16W MF-LF

J2903

3

4

1 2

M-ST-SM

53398-0276

R5931

1

2

1/16W MF-LF 402

5%

1K

R5933

1

2

402

5%

1K

1/16W MF-LF

LED2901

1

2

WHITE-500MCD

3X2MM-SM

R5916

1 2

10K

R5901

1

2

56.2

17_INCH_LCD

1/16W 402

MF-LF

1%

Q5900

3

1

2

SOT23-LF

FDV301N

R5830

1 2

10K

R5829

1 2

10K

R5808

1 2

1/16W MF-LF

5%

402

10K

R5832

1 2

NOT_DEVELOPMENT_SMC

10K

R5831

1 2

10K

R5817

1 2

10K

R5815

1 2

10K

R5902

1

2

1/16W

NOSTUFF

MF-LF 402

5%

4.7K

R5833

1 2

NOT_DEVELOPMENT_SMC

10K

R5819

1 2

10K

R5821

1 2

10K

R5818

1 2

100K

R5822

1 2

10K

R5823

1 2

10K

R5824

1 2

10K

R5825

1 2

10K

R5826

1 2

10K

R5828

1 2

10K

R5827

1 2

TPM

10K

R5995

1 2

SMC_TPM_PP

5%

0

1/16W

402

MF-LF

C5941

1

2

0.01uF

20% 16V

402

CERM

C5942

1

2

CERM

10UF

20%

6.3V

805-1

C5940

1

2

402

10%

0.47UF

6.3V CERM-X5R

C5901

1

2

10V

CERM

0.1uF

402

20%

R5932

1

2

5% 1/16W MF-LF

1K

402

R5924

1 2

10K

5% 1/16W MF-LF

XW5900

1 2

SM

OMIT

R5940

1 2

NOSTUFF

402

MF-LF

1/16W

5%

0

U5900

5

3

4

1

2

CRITICAL

SOT23-5

RN5VD30A-F

R5941

1 2

1/16W

5%

402

MF-LF

10K

C5943

1

2

CERM

6.3V

10%

1UF

402

Q5911

3

1

2

2N7002

SOT23-LF

Q5910

3

1

2

NTR4101P

SOT-23

R5942

1

2

402

MF-LF

1/16W

5%

10K

R5934

1 2

1K

402

5%

MF-LF

1/16W

R5935

1 2

1K

402

5%

MF-LF

1/16W

U5999

4

6

5

7

8

SOI-1-LF

SW5901

1 2

3 4

DEVELOPMENT

SM-LF

SPST

U5999

4

2

3

1

8

SOI-1-LF

U5940

3

1 2

ISL60002-33

SOT23-3

CRITICAL

C5904

1

2

402

CERM

50V

5%

100PF

NOSTUFF

R5908

1

2

NOSTUFF

1K

5%

402

MF-LF

1/16W

R5903

1 2

2.2K

R5904

1 2

2.2K

R5905

1 2

2.2K

R5906

1 2

2.2K

R5900

1

2

402

MF-LF

1K

5% 1/16W

R5907

1 2

MF-LF

5%

402

1/16W

1K

Y5800

1

2

OMIT

20.000M

SM-3

C5800

1 2

CERM 5%

50V 402

22PF

C5801

1 2

4025%50V

CERM

22PF

Y6700

14

TPM CRITICAL

32.768K

SM-LF

C6704

1 2

TPM

50V

CERM

402

5%

15PF

C6705

1 2

TPM

5%

50V

CERM

402

15PF

C5900

1

2

16V

CERM

402

10%

0.01UF

C5902

1

2

CERM

10V

20%

402

0.1uF

R5910

1 2

10K

R5911

1 2

10K

SW5900

1 2

3 4

SM-LF

SPST

DEVELOPMENT

R5913

1 2

10K

R5912

1 2

10K

R5914

1 2

10K

R5915

1 2

10K

SMC & TPM SUPPORT

9759

A

051-7199

CRITICAL197S0165

1

XTAL,20.00,80PPM,HC49,SMD,LF

Y5800

SC_TX_L

TPM_PP

SMC_PB7 SMC_FAN_3_TACH SMC_FAN_3_CTL

=PP3V3_S5_SMC

P0V48_SMC_LSREF

CPU_PROCHOT_L

SMC_SYS_KBDLED

MAKE_BASE=TRUE

FUNC_TEST=TRUE

TP_PM_G2_EN

=PP3V3_S5_SMC

SMB_0_S0_DATA

FUNC_TEST=TRUE

TP_SMB_0_S0_DATA

MAKE_BASE=TRUE

SMB_BSA_CLK

SMC_ANALOG_ID

SMC_BATT_CHG_EN

SMC_BATT_TRICKLE_EN_L

SMC_SYS_VSET

PM_EXTTS_L

SMC_BATT_ISET

SMC_P20

MAKE_BASE=TRUE

NC_SMC_SYS_VSET

CPU_HISIDE_ISENSE

NC_SMS_X_AXIS

MAKE_BASE=TRUE

PP5V_S3

PP3V3_S5

SYS_LED_DRV_C

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

PP5V_S5

=PP3V3_S5_SMC

MAKE_BASE=TRUE

TP_SMC_PB7

FUNC_TEST=TRUE

SMC_EXCARD_PWR_EN

FUNC_TEST=TRUE

TP_SMC_EXCARD_PWR_EN

MAKE_BASE=TRUE

I2C_ALS_SCL

=SMB_THRM_CLK

I2C_ALS_SDA

MAKE_BASE=TRUE

NC_SMC_BATT_VSET

PP3V3_TPM_3VSB

SMC_REF_GATE2

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

TPM_XTALI

SMC_TPM_PP

SMC_CASE_OPEN

=SMB_THRM_DATA

MAKE_BASE=TRUE

SMB_A_S3_CLK

MAKE_BASE=TRUE

SMB_A_S3_DATA

SMS_X_AXIS

I2C_ALS_SCL

SUS_CLK_SB

MAKE_BASE=TRUE

PP3V3_S0

SMB_BSB_CLK SMB_BSB_DATA

NC_SMC_BATT_ISET

MAKE_BASE=TRUE

DIMM_OVERTEMP_L

SC_RX_L

SMC_REF_GATE1

UNUSED_SMC_SENSE

SMC_FWIRE_ISENSE

SMC_BATT_ISENSE

SMC_TPM_GPIO

SMC_ONOFF_L

SMC_P21

SMB_GPU_NB_THRM_DATA

SMB_GPU_NB_THRM_CLK

=I2C_HD_TEMP_SDA

=I2C_HD_TEMP_SCL

MAKE_BASE=TRUE

NC_SMC_MEM_ISENSE

SMC_ADAPTER_EN

ALS_RIGHT

SMC_MANUAL_RST_L

SMB_0_S0_CLK

PP3V3_S3

SMB_B_S0_CLK

TPM_XTALO

SMC_XTAL

SMC_P27

SMC_P26

ALS_LEFT

MAKE_BASE=TRUE

NC_SMC_ANALOG_ID

SMC_PF1

NC_SMS_Z_AXIS

MAKE_BASE=TRUE

NC_SMS_Y_AXIS

MAKE_BASE=TRUE

FWH_INIT_L

MAKE_BASE=TRUE

PM_THRMTRIP_L

CPU_PROCHOT_L

SMC_PROCHOT

SMC_THRMTRIP

SMC_EXTAL

GND_NEXT_TO_SMC

P0V48_SMC_LSREF

=PP3V3_S0_FAN

=PP3V3_S5_SMC

MAKE_BASE=TRUE

NC_SMC_P23

SMC_P23

SMC_SYS_ISET

NC_SMC_SYS_ISET

MAKE_BASE=TRUE

TP_SMC_PF0

MAKE_BASE=TRUE

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_SMC_SYS_KBDLED SMC_PF0 SMC_PM_G2_EN

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_ALS_LEFT

MAKE_BASE=TRUE

TP_SMC_PF1

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

SYS_LED_DRV_K

SMC_XDP_TDO_3_3

=PP3V3_S5_SMC

ALS_GAIN

SMC_BATT_VSET

MAKE_BASE=TRUE

TP_SMC_FAN_3_TACH

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_SMC_FAN_3_CTL

FUNC_TEST=TRUE

TPM_GPIO2

TPM_GPIO1

SMC_SYS_LED_16B

SMC_PROCHOT_3_3_L

NC_SMC_P27

MAKE_BASE=TRUE

NC_SMC_P26

SMC_XDP_TCK

MAKE_BASE=TRUE

TP_SMC_XDP_TCK

MAKE_BASE=TRUE

TP_SMC_XDP_TMS

SMC_XDP_TMS

SMC_P22

MAKE_BASE=TRUE

NC_SMC_P22

MAKE_BASE=TRUE

NC_SMC_P21

NC_SMC_P20

MAKE_BASE=TRUE

TP_SMC_PB7

FUNC_TEST=TRUE

SMC_PB7

SMC_XDP_TRST_L

TP_SMC_XDP_TRST_L

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V

PP3V3_AVREF_SMC

SMC_REF_IN

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDT=0.2 MM

GND_SMC_AVSS

VOLTAGE=0V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

SMC_EXCARD_CP

SMC_ONOFF_L

SMC_TMS

SMS_ONOFF_L

SC_RX_L

SMC_ODD_DETECT

SMC_TX_L

SC_TX_L

SMC_SYS_LED

SMC_RSTGATE_L

TP_SMC_RSTGATE_L

MAKE_BASE=TRUE

TP_SMC_SYS_LED

MAKE_BASE=TRUE

NC_SMC_BATT_TRICKLE_EN_L

MAKE_BASE=TRUE

NC_SMC_BATT_CHG_EN

MAKE_BASE=TRUE

NC_ALS_GAIN

SMC_CPU_INIT_3_3_L

SMS_Y_AXIS SMS_Z_AXIS

SMC_MEM_ISENSE

MAKE_BASE=TRUE

UNUSED_SMC_SENSE

MAKE_BASE=TRUE

UNUSED_SMC_SENSE

SMC_RX_L

SMC_TX_L

SMC_FWE

SMC_BC_ACOK

SMC_TCK

SMC_TDI

SMC_TDO

SMC_BS_ALRT_L

SMC_RX_L SYS_ONEWIRE

MAKE_BASE=TRUE

TP_ALS_RIGHT

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_SMC_ADAPTER_EN

SMB_B_S0_DATA

SMB_A_S3_CLK SMB_A_S3_DATA

FUNC_TEST=TRUE

TP_SMB_0_S0_CLK

MAKE_BASE=TRUE

SMB_BSA_DATA

SMC_LID

=I2C_ODD_TEMP_SDA

=I2C_ODD_TEMP_SCL

MAKE_BASE=TRUE

SMB_B_S0_DATA

SMB_B_S0_CLK

MAKE_BASE=TRUE

=PP3V3_S0_FAN

SMC_CPU_RESET_3_3_L

SMC_XDP_TCK_3_3

SMC_SUS_CLK

SMC_RST_L

CPU_HISIDE_VSENSE

SMC_GPU_VSENSE

SMC_EXCARD_OC_L

=PP3V3_S5_SMC

PP3V3_S3

I2C_ALS_SDA

POWER_BUTTON_L

MAKE_BASE=TRUE

SMC_GPU_ISENSE

SMC_TPM_RESET_L

83

80 79 78

94

77

83

76

83

76

66

82

61

65

80

41

83

66

60

66

83

59

26

79

59

26

59

21

65

59

80

60

59

60

59

65

59

58

59

58

83

6

58

59

10

59

10

58

10

29

59

61

66

53

59

60

14

59

58

76

59

58

59

58

59

58

59

66

58

59

60

58

53

67

58

67

59

58

6

59

7

58

6

58

14

58

76

6

5

6

58

67

58

59

23

6

58

28

58

59

58

5

58

6

58

67

58

21

7

58

76

59

6

58

6

58

67

58

59

58

5

58

5

58

59

5

58

5

58

5

58

6

58

76 58

58

6

59

5

58

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

J6000

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

SM1

F-ST-5047

NOSTUFF

C6000

1

2

CERM

6.3V

1UF

10%

402

C6001

1

2

0.1UF

20% 10V CERM 402

C6003

1

2

CERM 402

10V

20%

0.1UF

C6002

1

2

1UF

CERM

6.3V 402

10%

9760

A

051-7199

SYNC_MASTER=M38

SYNC_DATE=12/09/2005

LPC+ CONN

=PP5V_S0_DEBUG

=PP3V3_S5_DEBUG

SMC_TX_L

SV_SET_UP

LPC_AD<0> LPC_AD<1>

SMC_MD1

SMC_RX_L

LPC_AD<3>

INT_SERIRQ

SMC_TDI

SMC_RST_L

SMC_NMI

BOOT_LPC_SPI_L

SMC_TMS

DEBUG_RST_L

PM_CLKRUN_L

SMC_TDO

SMC_TRST_L

LPC_FRAME_L

LPC_AD<2>

PM_SUS_STAT_L

SMC_TCK

PCI_CLK_PORT80

FWH_INIT_L

67 58

59

67

59

67

59 59

44

59

67

59

58

59

58

23

58

59

6

5

23

21

58

5

21

23

5

58

22

5

6

5

21

23

5

34

21

Preliminary

SMBDATA

SMBCLK ALERT*

OT2*

DXP2

OT1*

DXN

DXP1

GND

VCC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

I2C ADDR:30(0011000)

R6100

1 2

DEVELOPMENT

402

47

MF-LF

1/16W

5%

R6101

1 2

DEVELOPMENT

402

MF-LF

1/16W

5%

0

C6100

1

2

DEVELOPMENT

402

CERM

20% 10V

0.1UF

U6100

8

3

2

4

6

5 10

7

9

1

DEVELOPMENT

CRITICAL

MAX6695AUB

UMAX

C6101

1

2

DEVELOPMENT

0.001UF

10% 50V CERM 402

J3

3

4

1 2

DEVELOPMENT

CRITICAL

SM-2MT-BLK-LF

9761

A

051-7199

NB THERMAL

NB_THRM_SPARE_DXP

TSENSE_NB_GPU_DXN

U6100_VCC

SMB_GPU_NB_THRM_DATA SMB_GPU_NB_THRM_CLK

PP3V3_S0

TSENSE_NB_DXP

94 83 76 59 41 26 10

59

6

Preliminary

SCK

SO

WP*

SI

VDD

CE*

HOLD*

VSS

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

R6303 SHOULD BE PLACED LESS THAN 2.54MM FROM U6301

R6306-07 SHOULD BE PLACED LESS THAN 2.54MM FROM U2100

IS SHARED WITH SB AND SMC

R6309 NOT NEEDED SINCE SPI ROM

C6312

1

2

20%

0.1UF

10V CERM 402

R6301

1

2

MF-LF

3.3K

5%

402

1/16W

R6302

1

2

402

MF-LF

3.3K

5%

1/16W

C6301

1

2

33PF

CERM 402

5% 50V

R6307

1 2

5%

47

402

MF-LF

1/16W

C6308

1

2

CERM

5% 50V

402

33PF

C6309

1

2

50V

33PF

CERM

5%

402

R6303

1 2

1/16W MF-LF

47

402

5%

R6306

1 2

47

402

MF-LF

1/16W

5%

C6311

1

2

402

50V

33PF

5% CERM

U6301

1

7

6

5

2

8

4

3

SST25VF016B

16MBIT

SOI

OMIT

R6399

1

2

MF-LF

5%

1/16W

10K

402

R6309

1

2

NOSTUFF

402

MF-LF

5%

1/16W

10K

63

SPI BOOTROM

051-7199

A

97

SYNC_MASTER=M38

SYNC_DATE=01/05/2006

SPI_WP_L

SPI_CE_L

SPI_SO_R

SPI_SI_R

=PP3V3_S5_ROM

SPI_SO

SPI_SCLK

SPI_SCLK_R

SPI_HOLD_L

SPI_SI

58

58 58

22

6

22

22 22

Preliminary

IN

OUT

IN

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: ADDED TO PROTECT SMC

518S0326

MOTOR CONTROL

FAN 1

MOTOR CONTROL TACH

12V DC

FAN 0

GND

GND 12V DC

518S0193

TACH

HD FAN

ODD FAN

R6500

1

2

MF-LF 402

1/16W

10K

5%

R6501

1

2

10K

5% 1/16W MF-LF 402

C6500

1

2

20%

NOSTUFF

CERM

25V

0.1UF

603

R6502

1

2

1.5K

5% 1/4W MF-LF 1206

Q6500

12367

8

4

5

1206A-03-LF

NTHS5443T1

R6503

1

2

1/8W

5%

MF-LF

805

1.5K

D6500

1

3

SOT23

MMBD914XXG

R6504

1 2

MF-LF

1/8W

5%

0

805

C6501

1

2

16V

10%

0.47UF

805

X7R

R6505

3.9K

5%

1/8W

MF-LF

805

R6506

1

2

10K

402

5% MF-LF

1/16W

Q6503

12367

8

4

5

NTHS5443T1

1206A-03-LF

C6502

1

2

20%

NOSTUFF

25V 603

0.1UF

CERM

R6507

1

2

1/8W

1.5K

5%

MF-LF

805

R6508

1 2

805

MF-LF

1/8W

0

5%

C6503

1

2

16V

10%

805

0.47UF

X7R

R6509

3.9K

5%

1/8W

805

MF-LF

D6501

1

3

MMBD914XXG

SOT23

R6510

1

2

MF-LF

5%

1206

1.5K

1/4W

R6511

1

2

402

10K

5% MF-LF

1/16W

C6504

1

2

OMIT CRITICAL

ELEC

16V

20%

6.3X11-TH-LF

120UF

C6505

1

2

OMIT

120UF

6.3X11-TH-LF

20% 16V ELEC

CRITICAL

R6512

1

2

NOSTUFF

MF-LF

1/8W

5%

1.0K

805

R6513

1

2

NOSTUFF

1.0K

5% 1/8W MF-LF 805

R6514

1 2

1/8W

5%

MF-LF

0

805

R6515

1 2

805

0

5%

MF-LF

1/8W

D6502

1 2

B130LBT01XF

NOSTUFF

SMB

D6503

1 2

NOSTUFF

SMB

B130LBT01XF

J6500

5

6

1 2 3 4

CRITICAL

M-RT-SM

53261-0498

J6501

6

7

1 2 3 4 5

CRITICAL

53261-0598

M-RT-SM

R6599

1 2

47K

5% 1/16W MF-LF

402

R6598

1 2

402

MF-LF

1/16W

5%

47K

Q6502

3

1

2

SOT23-LF

2N7002

Q6505

3

1

2

SOT23-LF

2N7002

65 97

A

051-7199

Fan 0, 1 & System Temp

FAN_0_PWR

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.25MM

SMC_FAN_0_CTL

=PP12V_S0_FAN

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.25MM

FAN_0_OUT

F0_GATESLOWDN

FAN_RPM1

FAN_TACH1

F1_VOLTAGE8R5

F0_VOLTAGE8R5

FAN_RPM0

SMC_FAN_1_TACH

SMC_FAN_0_TACH

=PP3V3_S0_FAN

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

F1_RCFEEDBK

MIN_NECK_WIDTH=0.25MM

F0_RCFEEDBK

MIN_LINE_WIDTH=0.5MM

FAN_1_OUT

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM

=PP3V3_S0_FAN

PP3V3_S5

FAN_1_PWR

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

=PP12V_S0_FAN

PP3V3_S5

F1_GATESLOWDN

FAN_TACH0

SMC_FAN_1_CTL

83

80

79

78

77

76

66

65

66

59

66

65

26

66

26

58

65

59

6

65

6

58

6

58

6

5

6

5

Preliminary

G

D

S

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

I2C ADDR:0X90(1001000)

518S0193

MOTOR CONTROL

GND

TACH

12V DC

HD TEMP SENSOR

FAN 2

ODD TEMP SENSOR

518S0328

CPU FAN

I2C ADDR:0X92(1001001)

C6654

1

2

402

CERM

10V

0.1UF

HD_TEMP_SENSE

20%

C6655

1

2

402

CERM

10V

0.1UF

20%

Q6602

3

1

2

2N7002

SOT23-LF

C6602

1

2

CRITICAL

ELEC

16V

20%

6.3X11-TH-LF

120UF

OMIT

R6600

1

2

MF-LF 402

10K

1/16W

5%

J6601

5

6

1 2 3 4

53261-0498

M-RT-SM

HD_TEMP_SENSE

CRITICAL

Q6600

12367

8

4

5

NTHS5443T1

1206A-03-LF

D6600

1

3

MMBD914XXG

SOT23

C6600

1

2

NOSTUFF

CERM

0.1UF

603

25V

20%

R6601

1

2

1.5K

5%

1/8W

MF-LF

805

R6602

1 2

0

1/8W

805

MF-LF

5%

C6601

1

2

0.47UF

10%

805

X7R

16V

R6603

3.9K

5%

1/8W

MF-LF

805

R6604

1

2

1206

1.5K

5% 1/4W MF-LF

R6605

1

2

MF-LF

10K

402

5% 1/16W

R6606

1

2

NOSTUFF

1/8W

1.0K

805

5% MF-LF

R6607

1 2

805

0

5%

1/8W

MF-LF

D6601

1 2

NOSTUFF

SMB

B130LBT01XF

J6602

5

6

1 2 3 4

M-RT-SM

53261-0498

CRITICAL

J6600

5

6

1 2 3 4

53398-0476

F-ST-SM

CRITICAL

R6697

1 2

47K

5% 1/16W MF-LF

402

C6650

12

16V

HD_TEMP_SENSE

0.01UF

CERM

402

20%

C6651

12

HD_TEMP_SENSE

0.01UF

16V 402

CERM

20%

C6653

12

402

17_INCH_LCD

CERM

0.01UF

16V

20%

C6652

12

402

0.01UF

CERM

17_INCH_LCD

16V

20%

051-7199

A

66 97

Fan 2 & HD Temp

CPU_HS_ZH608

=PP3V3_S0_HD_TSENS

=I2C_HD_TEMP_SCL

FAN_2_PWR

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

FAN_RPM2

PP3V3_S5

=PP3V3_S0_FAN

=I2C_ODD_TEMP_SCL

=I2C_ODD_TEMP_SDA

=I2C_HD_TEMP_SDA

SMC_FAN_2_TACH

F2_RCFEEDBK

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.25MM

FAN_2_OUT

MIN_LINE_WIDTH=0.5MM

F2_GATESLOWDN

=PP12V_S0_FAN

FAN_TACH2

CPU_HS_ZH608

GND_CHASSIS_ODD_TEMP

=PP3V3_S0_ODD_TSENS

F2_VOLTAGE8R5

SMC_FAN_2_CTL

83

80 79 78 77 76 65 59 26

65

66

6

59

65

66

58

9

6

59

5

6

59

58

6

9

6

Preliminary

IN

IO

LAD1 LAD2

LCLK LFRAME* LRESET* LPCPD* SERRIRQ

LAD0

CLKRUN/GPIO*

PP/GPIO GPIO_EXPRESS_00 GPIO/SM_DAT GPIO/SM_CLK

XTALI/32K_IN

TESTBI/BADD/GPIO

TESTI

3V0 3V1 3V2

3VSB

VNC

VBAT

XTALO

GND2

GND3

GND0

GND1

LAD3

IO

IN

IO

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

GPIO

(INT PD)

GND

NC

VSB

VDD

NC

PP

CLKRUN*

NC

BASE ADDR = 0X2E/2F

LAYOUT NOTE: PLACE WHERE ACCESSIBLE

LAYOUT NOTE: PLACE R6702-03 WHERE ACCESSIBLE

NOTE: SINCE CURRENT OF VSB IS NOT YET ON SPEC, 1/8W (R6704/R6705) IS USED FOR NOW

TESTBI/BADD

GPIO2

BASE ADDR = 0X4E/4F

C6700

1

2

TPM

0.1UF

10% 16V X5R 402

C6701

1

2

TPM

10% 16V X5R 402

0.1UF

C6702

1

2

TPM

402

X5R

16V

10%

0.1UF

C6703

1

2

TPM

402

X5R

16V

10%

0.1UF

R6700

1

2

402

MF-LF

1/16W

5%

0

NOSTUFF

U6700

10 19 24

5

15

4

111825

2

1

6

26 23 20 17

21 22

28

16

7

27

9 8

12

3

13 14

TPM

TSSOP

OMIT

R6702

1

2

TPM

402

10K

5% 1/16W MF-LF

R6703

1

2

402

10K

MF-LF

1/16W

5%

NOSTUFF

R6704

1 2

TPM

0

5%

1/8W

MF-LF

805

R6705

1

2

0

5% 1/8W MF-LF 805

NOSTUFF

R6798

1 2

TPM

402

1/16W MF-LF

5%

0

R6799

1 2

402

1/16W

NOSTUFF

0

5%

MF-LF

9767

A

051-7199

SYNC_MASTER=M38

SYNC_DATE=01/05/2006

TPM

PP3V3_TPM_3VSB

VOLTAGE=3.3V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

TPM_GPIO1

LPC_AD<3>

=PP3V3_S0_TPM

=PP3V3_S3_TPM

=PP3V3_S0_TPM

INT_SERIRQ

PM_SUS_STAT_L

LPC_FRAME_L

PCI_CLK_TPM

LPC_AD<2>

LPC_AD<1>

LPC_AD<0>

TPM_BADD

TPM_LRESET_L

SMC_TPM_RESET_L

PM_CLKRUN_L

TPM_PP

TPM_XTALO

TPM_GPIO2

TPM_XTALI

TPM_RST_L

60 58

60

44

58

67

58

59

23

59

21

6

23

21

34

21

6

58

5

59

Preliminary

IN IN

IN

OUT

NR/FB

EN

IN

OUT

GND

GND TAB

GPIO1

GPIO0

GPIO2

SPDIF-OUT

AVDD1

AVDD2

DVDD_CORE3

DVDD_CORE1

BIT_CLK SYNC SDATA_OUT SDATA_IN

PORT-C_R

PORT-D_L_HP PORT-D_R_HP

CD-G

VOLUME_DOWN

VOLUME_UP

PC_BEEP

GPIO3/SPDIFIN

SENSE_A SENSE_B

PORT-A_L_HP PORT-A_R_HP

PORT-E_L PORT-E_R

AVSS3

AVSS1

DVSS2

DVSS3

VREF_FILT

AFILT1 AFILT2

NC1 NC2

CAP2

VREFOUT-D

VREFOUT-A

VREFOUT-B

VREFOUT-C

PORT-B_L PORT-B_R

PORT-F_R_HP

PORT-F_L_HP

PORT-C_L

CD-R

CD-L

RESET*

MIC1

HP

LO

MIC2

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP

NC

APN: 353S1233

MIC INPUT TO BOTH L&R

NC

14

11

10

13

15

10

APPLE P/N 353S1345

AUDIO CODEC

NC

12

NC

C6821

1

2

0.1UF

16V X5R

10%

402

C6825

1

2

CERM 402

6.3V

10%

1UF

AUD_REG

R6803

1

2

MF-LF

100K

5%

402

1/16W

AUD_REG

C6823

1

2

16V

0.1UF

X5R

10%

402

AUD_REG

C6822

1

2

603

X5R

6.3V

20%

AUD_REG

10UF

R6802

1 2

AUD_REG

402

MF-LF

1/16W

1%

1K

C6810

1

2

10UF

TANT

SMA-LF

20%

6.3V

R6808

1 2

39

402

5% 1/16W MF-LF

C6829

1

2

402

1000PF

X7R

25V

10%

C6832

1

2

402

10% 25V X7R

1000PF

C6833

1

2

402

10%

1000PF

25V X7R

C6834

1

2

X7R

25V 402

10%

1000PF

C6807

1

2

6.3V

20%

10UF

TANT

SMA-LF

C6813

1

2

402

1000PF

X7R

25V

10%

C6812

1

2

X7R 402

25V

10%

1000PF

C6802

1

2

20%

100UF

16V

ELEC

6.3X5.5-SM

C6803

1

2

20%

100UF

16V

ELEC

6.3X5.5-SM

C6830

1

2

X7R

1000PF

402

25V

10%

R6811

1

2

29.4K

1/16W MF-LF

1%

402

AUD_REG

R6810

1

2

1/16W

78.7K

1% MF-LF

402

AUD_REG

C6835

1

2

1000PF

10% X7R

402

25V

C6836

1

2

1000PF

402

10% 25V X7R

VR6800

1

3 6

2

5

4

SOT223-6

TPS79501

AUD_REG

C6826

1

2

10UF

603

6.3V X5R

20%

AUD_REG

C6808

1

2

1UF

10%

6.3V 402

CERM

C6809

1

2

10%

402

CERM

6.3V

1UF

C6811

1

2

CERM

402

10%

6.3V

1UF

L6800

1 2

AUD_REG

0603

180-OHM-1.5A

R6812

1 2

1/16W MF-LF

0

402

5%

L6801

1 2

180-OHM-1.5A

0603

C6804

1

2

SMA-LF

TANT

6.3V

10UF

20%

U6800

30 31

25

38

26

42

6

33

19

18

20

1

9

4

7

45 46

44

47

40 43

12

39 41

21 22

23 24

35 36 14

15

16 17

11

8

5

13 34

48

10

3

2

27

37

28

29 32

LQFP

STAC9220

L6802

1 2

LEMENU

180-OHM-1.5A

0603

C6805

1

2

805

5%

50V

CERM

1000PF

R6814

1 2

MF-LF

0

1/16W

402

5%

R6807

1 2

MF-LF

1/16W

5%

402

39

C6806

1

2

805

1000PF

CERM

50V

5%

C6801

1

2

1000PF

25V 402

10% X7R

R6800

1

2

100K

MF-LF

1/16W 402

5%

C6800

1

2

805-1

CERM

6.3V

20%

10UF

R6801

1

2

1/8W

5%

0

MF-LF 805

68

051-7199

97

SYNC_MASTER=AUDIO

A

SYNC_DATE=05/12/2006

AUDIO: CODEC

TP_AUD_BI_PORT_E_R

AUD_VREF_PORT_B

AUD_BI_PORT_B_L AUD_BI_PORT_B_R

AUD_BYPASS

AUD_ANALOG_FILT_2

TP_AUD_BI_PORT_E_L

ACZ_SDATAIN_CHIP

ACZ_SDATAOUT

AUD_ANALOG_FILT_1

AUD_VREF_FILT

NC_AUD_VREF_PORT_D

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5V_REG_IN

VOLTAGE=5V

AUD_4V5_SHDN_L

ACZ_RST_L

AUD_GPIO_1

ACZ_BITCLK

VOLTAGE=3.3V

=PP3V3_S0_AUDIO

AUD_BI_PORT_A_R

AUD_SENSE_B

AUD_SENSE_A

AUD_BI_PORT_F_L AUD_BI_PORT_F_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP4V5_AUDIO_ANALOG

VOLTAGE=4.5V

NC_AUD_VREF_PORT_A

AUD_BI_PORT_A_L

AUD_SPDIF_OUT_CHIP

PPV_3V3_AUDIO_CODEC

MIN_NECK_WIDTH=0.20MM VOLTAGE=3.3V

GND_AUDIO_CODEC

AUD_SPDIF_OUT

AUD_BI_PORT_B_RAUD_BI_PORT_B_L

VREG_FB

AUD_SPDIF_IN

BEEP

VOLTAGE=5V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

=PP5V_S5_AUDIO

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_GPIO_0_A

AUD_GPIO_0

AUD_GPIO_1

AUD_GPIO_1_A

AUD_GPIO_2

AUD_BI_PORT_C_L

BAL_IN_R

NC_VOL_DOWN

NC_AUD1 NC_AUD2

TP_AUD_BI_PORT_D_L

AUD_BI_PORT_C_R

NC_AUD_VREF_PORT_C

ACZ_SDATAIN<0>

=PP4V5_S0_AUDIO_ANALOG

MIN_LINE_WIDTH=0.6MM VOLTAGE=5V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=4.5V

PP4V5_AUDIO_ANALOG

VOLTAGE=0V

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

GND_AUDIO_CODEC

NC_VOL_UP

BAL_IN_COM

BAL_IN_L

ACZ_SYNC

AUD_GPIO_0

TP_AUD_BI_PORT_D_R

74

73

74

73

74

72

73

72

73

74

68

74

MIN_LINE_WIDTH=0.30MM

72

74

68

72

74

72

74

68

21

68

21

6

74

68

74

68

73

68 68

73

6

68

72 68

68 73

74

72

74

72

21

6

68

74

21

68

Preliminary

PGND

VDD

G1 G2

CHOLD

AGND

PAD

THM

NC

SHDN*

FS2

FS1

INL-

INL+

INR-

REG

INR+

OUTL+ OUTL+

OUTLOUTL-

C1+

C1-

OUTR+ OUTR+

OUTROUTR-

SS

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SPEAKER AMP

APPLE P/N 353S0680

GAIN SETTINGS: +19DB

MODULATION SETTING: LOW EMI

GAIN AND SWITCHING FREQUENCY STUFF OPTIONS

NC

R7214

1

2

402

1%

10K

1/16W MF-LF

U7200

13

6

5

7

19 20

17 18

10

9

16

15

8

31

29

32

30

27

25

28

26

1

2

23

24

14

11

12

33

3

4

21

22

QFN-LF

MAX9714

XW7201

1 2

OMIT

SM

Q7200

3

5

4

SOT-363

2N7002DW-X-F

Q7200

6

2

1

SOT-363

2N7002DW-X-F

C7220

1

2

100PF

5% 50V

402

CERM

C7221

1

2

402

CERM

50V

5%

100PF

R7213

1 2

1/16W

5%

402

MF-LF

47K

R7215

1 2

5%

10K

1/16W MF-LF

402

R7217

1 2

0

5%

MF-LF

1/16W

402

R7216

1

2

NOSTUFF

MF-LF

0

5%

402

1/16W

R7218

1

2

NOSTUFF

0

5% 1/16W MF-LF 402

R7219

1 2

0

1/16W MF-LF

402

5%

NOSTUFF

L7203

1 2

180-OHM-1.5A

0603

C7208

1

2

603-1

0.1UF

50V

10% X7R

L7204

1 2

180-OHM-1.5A

0603

C7209

1

2

0.47UF

X7R 805

16V

10%

L7200

1 2

SM-1

FERR-250-OHM

C7204

1 2

X7R 805

0.47UF

16V

10%

C7205

1 2

0.47UF

10% 16V X7R 805

L7202

1 2

0603

180-OHM-1.5A

C7214

1

2

1UF

X5R

10% 25V

603

C7207

1 2

10% X7R

16V

0.47UF

805

C7206

1 2

0.47UF

10%

805

X7R

16V

C7200

1

2

20% 16V

ELEC

SM-CASE-C1

220UF

L7201

1 2

0603

180-OHM-1.5A

R7208

1

2

0

5% 1/16W MF-LF 402

C7217

1

2

ELEC

16V

20%

220UF

SM-CASE-C1

C7202

1

2

603

X5R

25V

10%

1UF

RP7200

1 2 3 4

8 7 6 5

SM-LF

1/16W

47K

5%

R7212

1

2

402

1/16W MF-LF

10K

1%

XC7200

1

50R28

L7205

1 2

1000-OHM-200MA

0603

C7215

1

2

5%

100PF

402

CERM

50V

C7216

1

2

50V

5%

100PF

CERM 402

L7206

1 2

0603

1000-OHM-200MA

L7207

1 2

0603

1000-OHM-200MA

L7208

1 2

1000-OHM-200MA

0603

C7219

1

2

CERM 603

0.1UF

20% 16V

C7218

1

2

0.1UF

603

16V

CERM

20%

C7203

1

2

10UF

10% 16V CERM 1210

C7223

1

2

10UF

10% 16V CERM 1210

C7201

1

2

10UF

16V CERM 1210

10%

C7210

1

2

402

X7R

10%

1000PF

25V

C7211

1

2

1000PF

402

X7R

10% 25V

C7212

1

2

X7R

25V

10%

402

1000PF

C7213

1

2

402

X7R

10% 25V

1000PF

72

SYNC_MASTER=AUDIO

A

97

051-7199

AUDIO: SPEAKER AMP

SYNC_DATE=05/12/2006

PP3V3_INTERCON

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

=PP3V3_S0_AUDIO

SPKRAMP_MUTE

AUD_DEBOUNCE

AUDSAMPINRN

GND_AUDIO_CODEC

AUD_BI_PORT_C_R

NET_SPACING_TYPE=AUDIO

VOLTAGE=12V

=PP12V_S0_AUDIO_SPKRAMP

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

=PP3V3_S0_AUDIO

AUD_BI_PORT_C_L

AUD_SAMP_G1

AUD_MAX9714_CHOLD

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.2MM

AUD_SAMP_FS2

AUDSAMPINLN

AUDSAMPINRP

AUDSAMPINLP

AUD_SAMP_FS1

MIN_LINE_WIDTH=0.2MM

AUDSAMPCPP

MIN_NECK_WIDTH=0.15MM

AUDSAMPCPN

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

NET_SPACING_TYPE=AUDIO

GND_AUDIO_SPKRAMP

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.3MM

MIN_LINE_WIDTH=0.5MM

AUDSAMPOURTP

GND_AUDIO_SPKRAMP_PLANE

AUD_SAMP_G1

AUD_SAMP_INR_P

AUD_SAMP_INL_N

AUD_SAMP_FS2 AUD_SAMP_FS1 AUD_SAMP_G2

GND_AUDIO_SPKRAMP_PLANE

AUD_SAMP_INR_N

AUDSAMPOUTRN

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.3MM

AUD_SAMP_G2

AUD_SAMP_SHDN_L

SPKRAMP_SS

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.2MM

AUD_MAX9714_VREG

MIN_NECK_WIDTH=0.15MM

MIN_NECK_WIDTH=0.3MM

AUDSAMPOUTLP

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

GND_AUDIO_SPKRAMP_PLANE

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTL_N

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTL_P

MIN_NECK_WIDTH=0.2MM

=PP3V3_S0_AUDIO

GND_AUDIO_SPKRAMP_PLANE

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

AUD_GPIO_0_A

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTR_P

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTR_N

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUDSAMPOUTLN

MIN_NECK_WIDTH=0.3MM

GND_AUDIO_SPKRAMP_PLANE

AUD_SAMP_INL_P

VOLTAGE=12V

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP12V_AUD_SPKRAMP_PLANE

NET_SPACING_TYPE=AUDIO

74

73

74

73

72

73

72

68

72

68

74

68

74

6

68

6

68

72

6

72

73

6

72

68

73

72

Preliminary

TYPE_DET TIP

GND

VIN VCC

LED

GND_2

GND_1

RING

TIP_DET

IN

IN IN

VCC

VOUT

GND

SHELL

LED

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

APPLE P/N 514-0338

APPLE P/N 514-0341 (M50)

SPEAKER CABLE CONNECTOR

APPLE P/N 518S0325

NC

LINE IN JACK

LINE OUT JACK

NC

TO FHB CONNECTOR PAGE 47

TO POWER SUPPLY PAGE 6

C7303

1

2

402

5% CERM

50V

100PF

C7302

1

2

100PF

CERM

5%

50V 402

R7302

1

2

1/16W

5%

MF-LF

402

0

C7301

1

2

100PF

CERM

50V

5%

402

C7300

1

2

402

100PF

CERM

50V

5%

C7324

1

2

5%

402

50V CERM

100PF

C7323

1

2

402

5% 50V CERM

100PF

L7301

1 2

0603

180-OHM-1.5A

L7302

1 2

180-OHM-1.5A

0603

L7303

1 2

0603

180-OHM-1.5A

L7304

1 2

180-OHM-1.5A

0603

L7305

1 2

0603

180-OHM-1.5A

L7306

1 2

0603

180-OHM-1.5A

L7307

1 2

0603

180-OHM-1.5A

L7309

1 2

0603

180-OHM-1.5A

L7310

1 2

0603

180-OHM-1.5A

L7312

1 2

180-OHM-1.5A

0603

L7313

1 2

0603

180-OHM-1.5A

L7314

1 2

0603

180-OHM-1.5A

L7315

1 2

180-OHM-1.5A

0603

L7316

1 2

180-OHM-1.5A

0603

L7320

1 2

180-OHM-1.5A

0603

L7322

1 2

0603

180-OHM-1.5A

L7323

1 2

0603

180-OHM-1.5A

L7324

1 2

180-OHM-1.5A

0603

L7328

1 2

180-OHM-1.5A

0603

J7301

8

9

1 2 3 4 5 6 7

53261-0798

M-RT-SM

CRITICAL

J7303

9

1

10 11

12 13

2

3

4

5

6

8

7

CRITICAL

OPTI-AUD-OUT-JCK-M50

F-ANG-TH

L7325

1 2

0603

180-OHM-1.5A

C7314

1

2

402

5%

100PF

CERM

50V

L7317

1 2

180-OHM-1.5A

0603

C7312

1

2

100PF

402

CERM

50V

5%

L7327

1 2

180-OHM-1.5A

0603

L7319

1 2

180-OHM-1.5A

0603

L7318

1 2

180-OHM-1.5A

0603

C7313

1

2

100PF

5% 50V CERM 402

L7326

1 2

0603

180-OHM-1.5A

XW7300

1 2

OMIT

SM

DZ7301

13

24

5.6V-15A

0405

DZ7302

1 3

2 4

5.6V-15A

0405

DZ7304

1 3

2 4

NOSTUFF

0405

5.6V-15A

DZ7300

1 3

2 4

0405

5.6V-15A

DZ7303

1 3

2 4

0405

5.6V-15A

R7304

1

2

1/16W

5%

MF-LF

402

NOSTUFF

4.7K

R7303

1

2

NOSTUFF

402

MF-LF

5%

1/16W

47K

C7325

1

2

402

CERM

0.1UF

20% 10V

C7318

1

2

6.3V

10UF

20% CERM

805-1

L7329

1 2

180-OHM-1.5A

0603

L7330

1 2

0603

180-OHM-1.5A

R7305

1

2

MF-LF 402

1/16W

0

5%

C7328

1

2

CERM

50V

5%

100PF

402

R7306

1 2

MF-LF

1/16W

39

402

5%

C7322

1

2

100PF

50V CERM 402

5%

C7317

1

2

CERM

10V 402

20%

0.1UF

C7321

1

2

100PF

50V 402

5% CERM

R7308

1

2

MF-LF

1/16W

100K

402

5%

J7300

8

1

10 11 12 13

2 3

4

5 6

7

9

CRITICAL

OPTI-AUD-JCK

WO-RIB-M50

F-5.5-DEG-TH

L7300

1 2

180-OHM-1.5A

0603

XW7301

1 2

OMIT

SM

C7315

1

2

100PF

402

50V CERM

5%

C7311

1

2

402

100PF

50V

5% CERM

C7403,C7404

FACTORY SHORTAGE

126S0092126S0091

C6802,C6803

FACTORY SHORTAGE

126S0092126S0091

AUDIO: CONNECTORS

051-7199

SYNC_DATE=05/12/2006

SYNC_MASTER=AUDIO

A

9773

AUD_MIC_IN_N_CONN

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_P_CONN

AUD_SPDIFOUT_GND

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.25MM

AUD_SPDIF_OUT_JACK

PP3V3_AUDIO_SPDIF_JACK

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_DET2_JACK

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_R_JACK

AUD_LO_DET1_JACK

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_L_JACK

AUD_GPIO_1_A

=PP3V3_S0_AUDIO

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N

AUD_MIC_IN_P

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N_EMI

NET_SPACING_TYPE=AUDIO

GND_AUDIO_MIC_CONN

AUD_SPKR_OUTL_N

MIN_LINE_WIDTH=0.5MM NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTL_P

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_LI_DET_JACK

AUD_SPDIF_IN_JACK

AUD_SPDIFIN_GND

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_PORT_F_L

AUD_SPDIF_IN_1

AUD_SPDIF_OUT

MIN_LINE_WIDTH=0.3MM

AUD_PORT_A_L

MIN_NECK_WIDTH=0.2MM

AUD_PORT_A_R

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

MIN_LINE_WIDTH=0.6MM

GND_AUDIO_CODEC

MIN_NECK_WIDTH=0.25MM

AUD_LO_DET1

MIN_LINE_WIDTH=0.5MM NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTR_P

MIN_NECK_WIDTH=0.2MM

GND_AUDIO_CODEC

NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTR_N

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

PP3V3_AUDIO_SPDIF_JACK

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_LI_DET_H

AUD_LO_DET2

AUD_LI_L_EMI

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_SPDIF_IN_EMI

MIN_NECK_WIDTH=0.4MM

MIN_LINE_WIDTH=0.5MM

AUD_LO_GND_EMI

AUD_LO_DET1_EMI

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

PP3V3_AUDIO_SPDIF_EMI

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_R_EMI

AUD_LO_DET2_EMI

AUD_SPDIF_OUT_EMI

=PP3V3_S0_AUDIO

MIN_LINE_WIDTH=0.3MM

AUD_LO_L_EMI

MIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.2MM

AUD_LI_R_JACK

AUD_LI_GND_JACK

MIN_NECK_WIDTH=0.3MM

MIN_LINE_WIDTH=0.4MM

MIN_NECK_WIDTH=0.3MM

MIN_LINE_WIDTH=0.4MM

AUD_LI_GND_EMI

MIN_NECK_WIDTH=0.15MM

AUD_LI_R_EMI

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.2MM

AUD_LI_DET_EMI

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.2MM

AUD_LI_L_JACK

GND_CHASSIS_AUDIO_EXTERNAL_J

GND_CHASSIS_AUDIO_EXTERNAL

GND_CHASSIS_AUDIO_EXTERNAL_J

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_PORT_F_R

AUD_MIC_IN_P_EMI

NET_SPACING_TYPE=AUDIO

GND_CHASSIS_AUDIO_INTERNAL

AUD_SPDIF_IN

GND_CHASSIS_AUDIO_EXTERNAL_J

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.4MM

AUD_LO_GND_JACK

74

73

74

73

72

73

72

74

68

72

68

74

47

73

68

6

74

72

74

68

74

68

74

72

68

72

73

74

6

73

6

73

74

6

68

73

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

OUTR

CEXT

GND

INR

OUTL

SHDN* INL

VCC

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

UNUSED PORT TERMINATION

UNUSED PORTS

PORT A HP/LI

PORT D

PORT F LI/LO

PORT C BI SPEAKERS

PORT F LI/LO

USED PORTS

PLACE NEAR ENTRY TO SPEAKER

PLACE AT J7303

PORT A HP/LI

NC

PORT F (LI) PLUG DETECT

AMP GROUND PLANE

PLACE NEXT TO L6802

PLACE NEXT TO L6800

AUDIO GROUND RETURNS

PORT B MIC IN

NC

PORT E

MICROPHONE IMPEDANCE MATCHING CIRCUIT

JACK SENSE PULL UPS(PLACE NEXT TO CODEC)

PLACE NEAR HEADPHONE PORT

NC

PORT A/H (LO/DIG_OUT) PLUG DETECT (E TELLS H TO COME ON)

PLACE ACROSS GROUND SPLIT

R7412

1 2

1/8W

5%

0

805

NOSTUFF

MF-LF

R7405

1

2

MF-LF

1% 1/16W

402

20.0K

Q7401

3

1

2

SOT23-LF

2N7002

C7401

1

2

20%

402

10V

0.1UF

CERM

R7404

1 2

1/16W MF-LF

5%

402

47K

R7409

1

2

270K

5% MF-LF

402

1/16W

C7400

1

2

10V

20%

0.1UF

CERM 402

R7400

1 2

47K

MF-LF

1/16W

5%

402

C7402

1

2

0.1UF

402

10V

20% CERM

R7408

1 2

MF-LF

5%

47K

402

1/16W

R7414

1 2

5%

4.7

805

1/8W

MF-LF

R7415

1 2

1/8W

5%

MF-LF

805

4.7

R7416

1 2

5%

805

4.7

1/8W

MF-LF

R7417

1 2

805

1/8W

5%

4.7

MF-LF

C7403

1 2

ELEC

16V

100UF

20%

6.3X5.5-SM

C7404

1 2

6.3X5.5-SM

20% 16V

ELEC

100UF

R7420

1

2

MF-LF

1/16W

100K

5%

402

R7413

1

2

5% MF-LF

1/16W 402

470K

R7418

1

2

22K

MF-LF

402

5%

1/16W

R7419

1

2

402

1/16W

5%

22K

MF-LF

R7422

1

2

1%

402

MF-LF

5.11K

1/16W

C7408

1

2

0.1UF

16V 402

X5R

10%

R7421

1

2

1% 1/16W MF-LF

5.11K

402

C7407

1

2

402

X5R

16V

10%

0.1UF

C7417

1

2

402

X5R

16V

10%

0.1UF

C7416

1

2

0.1UF

10%

402

16V X5R

C7415

1

2

X5R

0.1UF

16V 402

10%

C7419

1 2

50V

0.1UF

10% X7R

603-1

XW6800

1 2

OMIT

SM

R7427

1

2

2.2K

5% 1/16W

402

MF-LF

R7426

1

2

402

MF-LF

1/16W

100K

5%

R7425

1 2

1/10W

5%

MF-LF

603

330

C7418

1

2

CERM

50V

820PF

805

10%

R7423

1

2

1/16W

22K

402

MF-LF

5%

R7424

1

2

1/16W

5%

22K

MF-LF 402

C7421

1

2

OMIT

10%

0.1UF

X5R 402

16V

Q7400

6

2

1

2N7002DW-X-F

SOT-363

Q7400

3

5

4

SOT-363

2N7002DW-X-F

R7407

1 2

1/16W MF-LF

5%

100K

402

Q7402

3

5

4

2N7002DW-X-F

SOT-363

Q7402

6

2

1

SOT-363

2N7002DW-X-F

R7431

1

2

402

39.2K

1/16W

1% MF-LF

R7430

1

2

39.2K

MF-LF 402

1% 1/16W

R7441

1 2

0

805

5%

MF-LF

1/8W

R7440

1 2

MF-LF

1/8W

5%

805

0

AUD_REG

U7400

C3

A2

B1

B3

A1

A3

C1

C2

UCSP-LF

MAX9890

C7424

1

2

CERM-X5R

6.3V

0.22UF

402

10%

R7442

1 2

NOSTUFF

MF-LF

805

5%

1/8W

0

R7443

1 2

805

MF-LF

NOSTUFF

0

1/8W

5%

R7437

1

2

10K

1% MF-LF

1/16W 402

C7435

1

2

SM-CASE-C1

220UF

20% 16V

ELEC

R7435

1 2

402

2.2K

5%

MF-LF

1/16W

C7405

1 2

3.3UF

SMA-LF

16V

TANT

10%

C7406

1 2

3.3UF

SMA-LF

10%

TANT

16V

XW7400

1 2

OMIT

SM

R7411

1 2

5%

1/8W

0

805

NOSTUFF

MF-LF

R7410

1 2

0

5%

1/8W

NOSTUFF

MF-LF

805

114S0315

1

C7421

CRITICAL NOCAMERA

RESISTOR, 10K OHM, 0402

SYNC_DATE=05/12/2006

SYNC_MASTER=AUDIO

051-7199

97

A

74

AUDIO: POWER SUPPLIES

C7421

CRITICAL CAMERA

CAPACITOR, .1UF, 0402

1

132S0099

GND_AUDIO_CODEC

GND_CHASSIS_AUDIO_EXTERNAL_J

GND_AUDIO_SPKRAMP_PLANE

AUD_SENSE_B

GND_AUDIO_CODEC

AUD_MIC_INTERCON

AUD_VREF_PORT_B

AUD_LO_DET1_INV

AUD_SENSE_B

GND_AUDIO_CODEC

AUD_PORT_A_L

AUD_PORT_F_DET_L

AUD_PORT_A_L1

GND_AUDIO_CODEC

AUD_LO_DET2_1

U7400_CEXT

AUD_PORT_A_R2

AUD_SENSE_A

AUD_PORT_E_DET_L

AUD_BI_PORT_F_R

AUD_TYPE_DET_EN

AUD_PORT_A_R1

AUD_PORT_A_L1 AUD_PORT_A_R1

AUD_PORT_A_L2 AUD_PORT_A_R2

GND_AUDIO_CODEC

GND_CHASSIS_AUDIO_EXTERNAL_J

GND_AUDIO_SPKRAMP

GND_AUDIO_CODEC

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.25MM

VOLTAGE=0V

GND_AUDIO

MIN_LINE_WIDTH=0.6MM

=PP3V3_S0_AUDIO

AUDLINDETH

=PP3V3_S0_AUDIO

AUD_SENSE_B

AUD_PORT_A_L2

AUD_PORT_A_R1

AUD_BI_PORT_A_L

AUD_BI_PORT_A_R

PP4V5_AUDIO_ANALOG

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_LO_DET2

AUD_LO_DET1_1

AUD_PORT_A_DET_L

BAL_IN_L

AUD_PORT_A_L2

AUD_PORT_A_R

BAL_IN_COM

BAL_IN_R

GND_AUDIO_CODEC

PP4V5_AUDIO_ANALOG

AUD_LI_DET_H

AUD_PORT_A_R2

AUD_PORT_A_L1

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_P

GND_AUDIO_CODEC

AUD_BI_PORT_B_L

AUD_LO_DET1_1

GND_AUDIO_CODEC

AUD_MIC_P1

AUD_LO_DET1

AUD_GPIO_1_A

AUD_SENSE_A

AUD_BI_PORT_F_L

AUD_PORT_F_L

AUD_PORT_F_L1

AUD_PORT_F_R

AUD_PORT_F_R1

GND_AUDIO_CODEC

AUD_GPIO_2

74

73

74

73

72

73

72 74

74

72

74

72

74

72

74

72

68

74

68

72

74

72

73

74

72

68 73

72

68

73

74

68

74

68 68

74

68

73

6

68

6

68

74

68

6

68

73

74

68

74

73

68

73

74

73

68

74

68

73

68

68 73

73

68

Preliminary

TPAD

VSS

BOOT2

BOOT1

PHASE1

UGATE1

LGATE1

PGND1

ISEN1

UGATE2

PHASE2

LGATE2

PVCC

VDDVIN

PGND2

VID6 VID5 VID4

VID2

VID3

VID1 VID0

ISEN2

VSUM

OCSET

VO

DROOP

DFB

VSEN

RTN

DPRSTP* DPRSLPVR PSI* PGD_IN

3V3 CLK_EN*

PGOOD

VR_ON

NTC

VR_TT*

SOFT

RBIAS

VDIFF

FB2 FB COMP VW

NC

IN

IN IN

OUT

IN

OUT

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

YONAH OR MEROM

NEEDED FOR

THIS CAP NOT

44A MAX CURRENT

1-Phase CCM

11

(IMVP6_PHASE1)

2-Phase CCM

FROM SMC

1

DPRSTP*

PSI*

MIN_NECK_WIDTH

MIN_LINE_WIDTH

(IMVP6_VO)

(IMVP6_VSUM)

(IMVP6_ISEN2)

MIN_LINE_WIDTH MIN_NECK_WIDTH MIN_LINE_WIDTH MIN_NECK_WIDTH

(IMVP6_COMP)

(IMVP6_FB)

(IMVP6_VW)

(GND)

FROM 1.5V AND 1.05V VREGS

ERT-J1VR103J

*NEED TO CHANGE R7531 TO NTC ERT-J1VR103J PANASONIC

NTC

DPRSLPVR

(IMVP6_VO)

Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only.

1

Operation Mode

1

LAYOUT NOTE: PLACE R7526

CLOSE TO CPU

(GND)

(IMVP6_ISEN1)

IMVP6 CPU VCORE REGULATOR

(IMVP6_PHASE2)

1-Phase DCM

CPU_VCCSENSE_P & N ARE DIFF PAIRS ROUTE AS 18MIL WIDE, 7MIL SPACE

0

0 0

0

C7500

1

2

402

NO STUFF

0.0022UF

CERM

10% 50V

R7503

1

2

MF-LF

1/4W

5%

1.0

1206

C7512

1

2

CERM

50V

4700PF

603

10%

C7590

1

2

NO STUFF

0.0022UF

50V CERM

10%

402

R7500

1 2

1/16W

1%

10K

402

MF-LF

C7503

1 2

0.22uF

10% CERM-X5R

402

6.3V

XW7503

1

2

SM

XW7504

1

2

SM

U7500

48

36 26

47

10

17

45

46

16

11

12

24

23

32

30

25

6

8

3

33

29

1

34

28

2

31

4

15

7

49

35

27

22

13

37

38

39

40

41

42

43

20

18

44

5

14

21

19

9

OMIT

QFN

ISL6262

C7515

1

2

20%

0.22UF

25V X5R

603

XW7501

1

2

SM

XW7502

1

2

SM

R7505

1 2

1/16W

10K

402

1% MF-LF

C7504

1 2

CERM-X5R

6.3V

10% 402

0.22uF

C7511

1

2

603

4700PF

50V

10% CERM

R7502

1

2

5%

1.0

1206

MF-LF

1/4W

C7502

1

2

50V

0.0022UF

CERM 402

10%

NO STUFF

C7592

1

2

10%

402

CERM

0.0022UF

NO STUFF

50V

C7527

1

2

0.22UF

20% 25V X5R

603

R7520

1 2

MF-LF 402

1/16W

1%

10

R7512

1 2

MF-LF 402

1/16W

1%

10

C7526

1

2

X5R 603

10% 25V

1uF

C7596

1

2

16V

10% X5R

0.1uF

402

R7521

1 2

402

1/16W MF-LF

1%

10

C7530

1

2

0.1uF

10% 16V X5R 402

R7519

1 2

1%

1/16W MF-LF

402

499

C7507

1

2

50V

5%

47PF

CERM 402

R7510

1

2

4.42K

MF-LF 402

1% 1/16W

C7535

1

2

6.3V

4.7uF

CERM

20% 603

D7500

1

2

SMB

B340LBXF

D7501

1

2

SMB

B340LBXF

R7595

1 2

0

R7593

1 2

0

R7591

1 2

0

R7596

1 2

0

R7594

1 2

0

R7592

1 2

0

R7590

1 2

0

C7508

1

2

22UF

20% X7R

1210

16V

R75A0

1 2

MF-LF

1/16W

1%

402

499

R7527

1 2

402

MF-LF

1/16W

1%

4.02K

C7510

1 2

402

16V 10%

0.01uF

CERM

R7508

1 2

1/16WMF-LF

1%402

147K

R7513

1 2

MF-LF

1/16W

2.0K

NO STUFF

1%

402

C7506

1

2

402

10% 50V

470pF

CERM

R7511

1

2

1.40K

MF-LF 402

1% 1/16W

R7509

1

2

1/16W

1%

402

MF-LF

1.82K

C7513

1

2

390pF

CERM 402

10% 50V

C7514

1

2

402

10%

470PF

50V CERM

R7514

1

2

402

1/16W MF-LF

180K

5%

R7504

1

2

1/16W MF-LF

5%

402

1

R7507

1

2

MF-LF

1/16W

5%

402

1

C7516

1

2

0.001uF

NO STUFF

10% 50V CERM

402

R7516

1

2

11.5K

MF-LF

1/16W

1%

402

R7517

1 2

402

MF-LF

1% 1/16W

5.76K

C7529

1

2

CERM

50V

5%

180pF

402

R7518

1

2

1/16W MF-LF

1K

1%

402

R7530

1

2

MF-LF 402

1/16W

1%

2.61K

R7515

1

2

11K

402

1% 1/16W MF-LF

C7528

1

2

0.33uF

10%

402

6.3V CERM-X5R

C7534

1

2

0.033UF

402

10% 16V X5R

R7522

1

2

0

402

MF-LF

1/16W

5%

C7531

1 2

0.01uF

10% 16V CERM 402

C7532

1 2

10% CERM

402

16V

NO STUFF

0.01uF

R7523

1

2

0

1/16W MF-LF

5%

402

C7533

1 2

16V 402

10% CERM

0.01uF

C7521

1 2

402

6.3V

20% X5R

0.22UF

XW7500

1

2

SM

R7501

1

2

MF-LF

1% 1/10W

603

3.65K

R7506

1

2

603

1/10W

1%

3.65K

MF-LF

C7505

1 2

0.01uF

10%16V CERM

402

R7531

1 2

CRITICAL

0603-LF

10KOHM-5%

L7500

1 2

CRITICAL

SM

0.36UH-30A-0.80MOHM

L7501

1 2

CRITICAL

SM

0.36UH-30A-0.80MOHM

C7501

1

2

16V

20%

22UF

1210

X7R

C7517

1

2

CRITICAL

20%

1000UF

ELEC

16V TH-KZJ-LF

C7509

1

2

CRITICAL

1000UF

ELEC

16V TH-KZJ-LF

20%

C7550

1

2

1000UF

CRITICAL

TH-KZJ-LF

20% 16V ELEC

C7551

1

2

1210

16V

20% X7R

22UF

C7579

1

2

TH

20% POLY

2.5V

680UF

CRITICAL

C7578

1

2

CRITICAL

TH

POLY

2.5V

680UF

20%

C7577

1

2

TH

CRITICAL

680UF

POLY

2.5V

20%

Q7500

4

1

3

CRITICAL

TO-252AA

IRLR7821PBF

Q7501

4

1

3

TO-252AA

CRITICAL

IRLR7843PBF

Q7504

4

1

3

CRITICAL

TO-252AA

IRLR7843PBF

Q7502

4

1

3

TO-252AA

IRLR7821PBF

CRITICAL

Q7503

4

1

3

CRITICAL

TO-252AA

IRLR7843PBF

Q7505

4

1

3

CRITICAL

TO-252AA

IRLR7843PBF

C7552

1

2

1210

X7R

20% 16V

22UF

C7554

1

2

1210

X7R

20% 16V

22UF

C7553

1

2

16V

20% X7R

1210

22UF

R7540

1 2

603

MF-LF

1/10W

1%

10K

R7541

1

2

603

MF-LF

1/10W

1%

10K

C7580

1

2

680UF

2.5V POLY

20%

TH

CRITICAL

NOSTUFF

R7526

1 2

470K

1% 1/16W MF-LF

402

051-7199

A

75 97

IMVP6 CPU VCore Regulator

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

IMVP6_ISEN2

IMVP6_VO_R

IMVP6_RTN

IMVP6_VSEN

CPU_VCCSENSE_P CPU_VCCSENSE_N

IMVP6_LGATE1

IMVP6_PHASE1

GND_IMVP6_SGND

IMVP6_VW

IMVP6_FB

PP12V_S5_CPU_REG

0.25 MM0.25 MM

IMVP6_PHASE2

0.25 MM0.25 MM

IMVP6_BOOT2

0.25 MM0.25 MM

IMVP6_ISEN2

0.25 MM0.25 MM

IMVP6_FET_RC2

0.25 MM0.60 MM

IMVP6_VSUM_R2

0.25 MM0.25 MM

R7507_1

=PP3V3_S0_IMVP

IMVP6_VDIFF

IMVP6_VDIFF_RC

IMVP6_VSUM_R2

IMVP6_UGATE1

IMVP_VID<6>

MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM

PPVIN_S5_IMVP6_VIN

PP5V_S0_IMVP6_VDD

MIN_NECK_WIDTH=0.2 MM VOLTAGE=5V

MIN_LINE_WIDTH=0.25 MM

GND_IMVP6_SGND

IMVP_VID<2>

0.25 MM0.25 MM

IMVP6_LGATE2

IMVP6_FB2

IMVP_VID<5>

IMVP6_LGATE2

IMVP6_OCSET

IMVP6_UGATE2

0.20 MM0.50 MM

GND_IMVP6_SGND

0.20 MM0.25 MM

IMVP6_FB2

IMVP6_COMP

IMVP6_SOFT

IMVP_VID<4> IMVP_VID<3>

IMVP_VID<0>

0.20 MM0.25 MM

IMVP6_DFB

GND_IMVP6_SGND

IMVP6_DROOP

IMVP_DPRSLPVR

IMVP6_FET_RC2

IMVP6_BOOT1

PM_DPRSLPVR

0.20 MM0.25 MM

IMVP6_FB

0.20 MM0.25 MM

IMVP6_COMP

0.25 MM0.25 MM

IMVP6_VW

0.25 MM0.25 MM

IMVP6_VSEN

PP12V_S5_CPU_REG

CPU_DPRSTP_L

CPU_PSI_L IMVP_PGD_IN

VR_PWRGD_CK410_L IMVP_VR_ON

VR_PWRGOOD_DELAY

CPU_VID<6>

CPU_VID<4>

CPU_VID<2>

CPU_VID<0>

CPU_VID<5>

CPU_VID<3>

CPU_VID<1>

IMVP6_RBIAS

0.25 MM0.25 MM

IMVP6_UGATE2

0.25 MM

1.5 MM

IMVP6_PHASE1

0.25 MM0.25 MM

IMVP6_BOOT1

0.25 MM

1.5 MM

IMVP6_UGATE1

0.25 MM0.25 MM

IMVP6_ISEN1

0.25 MM

1.5 MM

IMVP6_LGATE1

0.25 MM0.25 MM

R7504_1

0.25 MM0.25 MM

IMVP6_VSUM_R1

0.25 MM0.25 MM

IMVP6_FET_RC1

IMVP6_DFB

0.20 MM0.25 MM

IMVP6_OCSET

0.20 MM0.25 MM

IMVP6_VSUM

0.20 MM0.25 MM

IMVP6_VO

0.20 MM0.25 MM

IMVP6_DROOP

0.20 MM0.25 MM

IMVP6_SOFT

0.20 MM0.25 MM

IMVP6_RBIAS

0.20 MM0.25 MM

IMVP6_VDIFF

0.25 MM 0.25 MM

IMVP6_RTN

IMVP_VID<1>

IMVP6_VR_TT

IMVP6_COMP_RC

IMVP6_FET_RC1

IMVP6_BOOT2

PP12V_S5_CPU_REG

MIN_LINE_WIDTH=0.25 MM

PP3V3_S0_IMVP6_3V3

MIN_NECK_WIDTH=0.2 MM

IMVP6_VSUM_R1

IMVP6_PHASE2

R7504_1

IMVP6_NTC_R

IMVP6_NTC

PP5V_S0

PPVCORE_CPU

IMVP6_VO

IMVP6_VSUM

IMVP6_ISEN1

R7507_1

26

76

23

76

21

14

76

83

6

76

75

75 75

8

75

6

75

14

75

7

77

26

58

5

8

75

6

5

75

Preliminary

IN

G

D

S

D

G

S

VIN

IOUT

LOADNC

GND

VIN

IOUT

LOADNC

GND

D

S

G

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

STUFF C7602 WITH 10K PULL DOWN

WHEN DEVELOPMENT BOM IS NOT STUFFED

TO PULL LOW SMC INPUT PIN

PROCESSOR DCIN VOLTAGE SENSE

(SCALING 12V INPUT VOLTAGE TO SMC)

2.73224 A/V

Current Sense Calibration Circuit

Switches in fixed load on power supplies to calibrate current sense circuits

ADC IS 10BIT 0 TO 1023

PROCESSOR VCORE CURRENT SENSE

(USING 12V INPUT CURRENT TO DERIVE CPU CURRENT)

WORKS WELL.

SO SMC ADC SAMPLING

1 MS TIME CONSTANT

PCB:PLACE D7699,R7697,C7699 BY SMC

0.0129 A/COUNT

PCB: PLACE D7599, C7599, R7597 WITHIN 1" OF SMC (U5800)

SYSTEM CURRENT SENSE

TO SMC

(MEASURING DC/DC INDUCTOR DCR TO DERIVE CPU CURRENT)

SYSTEM VOLTAGE SENSE

1 MS TIME CONSTANT SO SMC ADC SAMPLING

PCB: PLACE R7602, C7602 WITHIN 1" OF SMC (U5800)

SMC PWRGD PULLUP

PCB: PLACE R7612, C7612 WITHIN 1" OF SMC (U5800)

PROCESSOR VCORE SENSE

4 V/V

SCALE COUNT

.0129 V/COUNT

0 TO 3.3V

ADC IS 10BIT 0 TO 1023

SCALE COUNT

PROCESSOR VCORE CURRENT SENSE

TO SMC

WORKS WELL.

PCB: PLACE R7632, C7633 WITHIN 1" OF SMC (U5800)

COUNT

.0129 V/COUNT

COUNT

0 TO 3.3V

ADC IS 10BIT 0 TO 1023

SCALE

4 V/V

SCALE

0 TO 3.3V

PCB:PLACE D7650,R7652,C7650 BY SMC

PCB:KEEP SHORTS NEXT TO U7601

(SCALING 12V INPUT VOLTAGE TO SMC)

PCB: PLACE R7632, C7633 WITHIN 1" OF SMC (U5800)

PCB: PLACE D7599, C7599, R7597 WITHIN 1" OF SMC (U5800)

PCB:KEEP SHORTS NEXT TO U7602

3.33333 A/V

.010753 A/COUNT

ADC IS 10BIT 0 TO 1023

0 TO 3.3V

L7602

1 2

TH-VERT-LF

1UH-20A-4.5MOHM

CRITICAL

R7640

1

2

DEVELOPMENT_ISENSE_CALIB

402

100K

MF-LF

1/16W

5%

R7607

1 2

DEVELOPMENT

5%

0

1/16W MF-LF

402

R7604

1 2

NOSTUFF

1/16W

402

MF-LF

5%

0

Q7639

3

1

2

DEVELOPMENT_ISENSE_CALIB

SOT23-LF

2N7002

Q7640

3

1

2

DEVELOPMENT_ISENSE_CALIB

NTR4101P

SOT-23

R7639

1

2

DEVELOPMENT_ISENSE_CALIB

10K

5% 1/16W MF-LF 402

R7641

1

2

DEVELOPMENT_ISENSE_CALIB

402

MF-LF

10K

5% 1/16W

R7659

1 2

MF-LF

5%

0

DEVELOPMENT

1/16W

402

R7605

1 2

DEVELOPMENT

40.2K

1% 1/16W MF-LF

402

R7606

1 2

40.2K

1%

MF-LF

DEVELOPMENT

402

1/16W

U7600

3

4

1

5

2

CRITICAL

LMV2011MF

DEVELOPMENT

SOT23-5

R7669

1 2

DEVELOPMENT

MF-LF

1/16W

402

0

5%

R7652

1 2

4.53K

1%

402

MF-LF

1/16W

XW7650

1 2

OMIT

SM

R7650

1 2

0.005

2010

1W MF

1%

CRITICAL

C7650

1

2

0.22UF

6.3V X5R

20%

402

R7651

1

2

402

5.90K

MF-LF

1% 1/16W

R7655

1 2

402

1/16W

4.53K

1%

MF-LF

C7651

1

2

20%

6.3V 402

0.22UF

X5R

R7653

1

2

1% 1/16W MF-LF 402

6.04K

R7654

1

2

1%

2.0K

402

MF-LF

1/16W

U7601

2

3

51

4

SOT23-5

ZXCT1010

CRITICAL

R7691

1 2

CPU_DCIN_SENSE_R

402

464

1% 1/16W MF-LF

R7600

1 2

DEVELOPMENT

1%

1M

1/16W MF-LF

402

U7602

2

3

51

4

SOT23-5

ZXCT1010

CRITICAL

R7656

1 2

100

402

MF-LF

1/16W

1%

D7650

1

3

NOSTUFF

SOT23-LF

BAS16-75V-0.25A

D7699

1

3

BAS16-75V-0.25A

SOT23-LF

NOSTUFF

Q7641

5

4

1 2 3

FDM6296

MICROFET3X3

CRITICAL

DEVELOPMENT_ISENSE_CALIB

C7600

1 2

DEVELOPMENT

50V

CERM

402

470PF

10%

C7603

1

2

DEVELOPMENT

470PF

402

CERM

50V

10%

R7603

1

2

402

DEVELOPMENT

1/16W MF-LF

1%

1M

C7601

1 2

20% 10V

DEVELOPMENT

CERM

0.1UF

402

R7697

1 2

4.53K

1/16W MF-LF

402

1%

C7699

1

2

20%

402

X5R

6.3V

0.22UF

XW7698

1 2

OMIT

SM

R7602

1 2

4.53K

DEVELOPMENT

1/16W MF-LF

1%

402

C7602

1

2

OMIT

6.3V X5R

0.22UF

402

20%

R7612

1 2

402

MF-LF

1/16W

4.53K

1%

C7612

1

2

20%

6.3V 402

X5R

0.22UF

C7633

1

2

0.22UF

20%

6.3V 402

X5R

R7632

1 2

4.53K

MF-LF

1%

1/16W

402

R7698

1

2

402

MF-LF

1/16W

1%

1K

R7630

1

2

1% 1/16W

6.04K

MF-LF 402

R7631

1

2

1%

402

MF-LF

1/16W

2.0K

R7623

1

2

1% MF-LF

402

10K

1/16W

R7699

1 2

1W

CRITICAL

0.025

MF

2512-1

1%

R7620

1 2

NOSTUFF

1/16W

0

5%

MF-LF

402

R7643

1

2

1206

MF-LF

1/4W

1%

1.00

DEVELOPMENT_ISENSE_CALIB

R7642

1

2

470K

5% 1/16W MF-LF 402

DEVELOPMENT_ISENSE_CALIB

NOT_DEVELOPMENT

C7602

RES,10K,5%,0402

116S0090

1

DEVELOPMENT

C7602

CAP,0.22UF,6.3V,20%,0402

132S0080

1

CPU & SYSTEM SENSE CIRCUITRIES

051-7199

A

76 97

SYNC_MASTER=(MASTER)

SYNC_DATE=(MASTER)

SYSTEM_DCIN_SENSE_R

GND_CPU_ISENSE_OPAMP

MIN_LINE_WIDTH=0.20 MM

PP12V_S0

VOLTAGE=12V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.60MM

PP12V_S5_AC_DC

CPU_DCIN_SENSE

PP12V_S5

SMC_PBUS_VSENSE

SMC_SYSTEM_VSENSE_R

GND_SMC_AVSS

SMC_PBUS_VSENSE_R

PP12V_S5_CPU_REG

PPVCORE_CPU

SMC_CPU_VSENSE

GND_SMC_AVSS

ISENSE_CAL_EN

MIN_LINE_WIDTH=0.20 MM

MIN_NECK_WIDTH=0.20 MM

ISENSE_CAL_EN_L

ISENSE_CAL_EN_L_R

PP3V3_S0

GND_NEXT_TO_SMC

PP3V3_S5

RSMRST_PWRGD

SYS_POWERFAIL_L

=PP12V_S5_CPU

IMVP6_VO_R_OA

SYSTEM_SENSE_I_R

IMVP6_DROOP

PP3V3_S0

SMC_DCIN_ISENSE

PP3V3_S0

SYSTEM_DCIN_SENSE

PP12V_S5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.60MM

VOLTAGE=12V

PP12V_S5_CPU_REG

CPU_SENSE_I_R

CPU_HISIDE_ISENSE

CPU_HISIDE_VSENSE

GND_SMC_AVSS

PP12V_L7502

VOLTAGE=12V

MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.60MM

CPUVCORE_ISENSE_CAL

MIN_LINE_WIDTH=0.50 mm MIN_NECK_WIDTH=0.20 mm

ISENSE_CAL_EN_LS12V

=PPVCORE_S0_CPU

IMVP6_VO

CPU_ISENSE_R_POS

CPU_ISENSE_OUT_R

CPU_ISENSE_R_NEG

GND_SMC_AVSS

IMVP6_DROOP_R

SMC_CPU_ISENSE

83

80

83

94

79

94

83

82

83

78

83

82

80

76

77

76

80

79

61

66

61

79

78

59

65

59

78

77

80

41

59

41

77

80

76

75

76

26

82

26

76

9

76

83

6

59

76

6

59

10

6

78

10

6

76

59

8

59

6

5

58

75

5

58

6

59

5

58

6

75

6

58

6

5

75

59

58

6

75

58

Preliminary

IN

G

D

S

G

D

S

IN

OUT

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SILKSCREEN:SYS_PWRGD

TIMING OF VARIOUS RAILS COMING UP

PWGOOD SIMPLIFIED BASED ON AS MEASURED ON PROTO2 BOARDS

ALL AND GATE INPUTS ARE 7V TOLERANT REGARDLESS OF INPUT POWER

Q7703

6

2

1

SOT-363

2N7002DW-X-F

R7793

1

2

402

MF-LF

1/16W

5%

10K

R7794

1

2

MF-LF

1/16W

NOSTUFF

5%

402

10K

Q7703

3

5

4

2N7002DW-X-F

SOT-363

C7710

1 2

0.1UF

10V

C7712

1 2

0.1UF

10V

U7710

3

2

1

4

5

MC74VHC1G08

SOT23-5-LF

U7712

3

2

1

4

5

MC74VHC1G08

SOT23-5-LF

R7700

1

2

DEVELOPMENT

5% 1/10W MF-LF 603

330

LED7700

1

2

DEVELOPMENT

SYS_PWRGD_LED_R

2.0X1.25MM-SM

GREEN-3.6MCD

R7701

1

2

DEVELOPMENT

10K

402

MF-LF

1/16W

5%

Q7700

3

1

2

DEVELOPMENT

SOT23-LF

2N7002

R7795

1

2

5% 1/16W MF-LF 402

10K

R7710

1 2

402

33

5% 1/16W MF-LF

PWR GOOD

9777

051-7199

A

SYNC_DATE=(MASTER)

SYNC_MASTER=(MASTER)

PGOOD_PP1V8_S3

IMVP_PGD_IN_R

IMVP_PGD_IN

PP3V3_S5

PGOOD_PP1V05_S0

PGOOD_PP1V5_S0

ALL_SYS_PWRGD

PP3V3_S5

PM_SLP_S4

PP3V3_S5

MAKE_BASE=TRUE

SYS_PWRUP_L

PP12V_S5

PM_SLP_S3_L

SYS_PWRGD_LED

ALL_SYS_PWRGD

PP3V3_S5

PP12V_S5

PM_SLP_S4_L

83

80

79

78

83

78

83

77

82

77

82

76

80

76

80

66

79

66

79

65

78

65

78

59

77

80

59

77

26

77

26

76

79

77

26

76

6

58

6

83

6

58

6

58

79

75

5

80

26

5

79

5

83

5

23

26

5

23

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

YUKON=0.426A

2.50V NOMINAL

3.35V NOMINAL

SB=0.500A

2.5V S5

VREF = 0.800V TYP

0.784V MIN

0.816V MAX

(R1)

(R2)

VOUT=VREF*(1+R2/R1)

AIRPORT=1.000A

PANEL=1.000A TOTAL=4.000A

3.3V S5

TOTAL=0.426A

3.3V AND 2.5V S5 REGULATOR

M50 POWER BUDGET

MISC=1.500A

M50 POWER BUDGET

L7803

1 2

TH1

CRITICAL

3.0UH

C7853

1

2

TH-KZJ-LF

ELEC

20%

1000UF

16V

CRITICAL

C7801

1 2

603

CERM

20% 25V

0.1UF

C7813

1

2

805-1

10UF

6.3V

20% CERM

C7814

1

2

805-1

10UF

6.3V

20% CERM

C7815

1

2

6.3V

CRITICAL

TH-KZJ-LF

ELEC

20%

1800UF

R7899

1

2

402

1/16W

5% MF-LF

22

C7807

1

2

402

10% CERM

16V

0.01UF

R7803

1

2

MF-LF

1/16W

1%

402

1.24K

R7801

1

2

402

1/16W MF-LF

392

1%

R7802

1

2

1206

MF-LF

1/4W

1%

5.11

C7809

1

2

CERM 1206

50V

5%

1000PF

C7802

1

2

10% 25V

1000PF

X7R 402

C7808

1 2

16V

10%

0.047UF

402

CERM

R7840

1 2

1/16W

5%

MF-LF

402

2.2

C7892

1 2

603

X5R

25V

10%

1UF

C7800

1

2

10%

1UF

CERM 402

6.3V

R7805

1

2

1%

10

MF-LF 402

1/16W

C7823

1

2

10%

402

X7R

25V

1000PF

C7820

1

2

X5R

6.3V

20%

22UF

805

C7806

1 2

402

560PF

10% 50V

CERM

R7804

1 2

402

8.06K

1% 1/16W MF-LF

U7800

5

15

1

6

2

16

3

4

11

12

13

10

17

14

7 8

9

ISL6549

CRITICAL

QFN

XW7800

1

2

SM

C7803

1

2

4.7UF

20%

6.3V CERM

603

C7824

1

2

1000PF

10% 25V X7R 402

NOSTUFF

R7821

1

2

402

1/16W MF-LF

5%

2.7K

R7820

1

2

1K

402

MF-LF

1/16W

1%

R7822

1

2

470

402

1/16W

1% MF-LF

C7826

1

2

805-1

10UF

20%

6.3V CERM

R7892

1

2

402

MF-LF

1/16W

5%

100K

Q7802

3

1

2

2N7002

SOT23-LF

NOSTUFF

C7821

1

2

805-1

20%

10UF

CERM

6.3V

C7825

1

2

805-1

10UF

20%

6.3V CERM

C7822

1

2

805-1

10UF

20%

6.3V CERM

D7800

1

2

3

4

5

CTLSH3-30M833

TLM833

NOSTUFF

Q7803

5678

4

123

CRITICAL

SO-8

IRF1902PBF

Q7800

4

1

3

TO-252AA

CRITICAL

IRLR7807Z

Q7801

4

1

3

TO-252AA

IRLR7807Z

CRITICAL

C7811

1

2

1210

CERM

16V

10UF

10%

3V DC/DC 2.5V

9778

A

051-7199

TRUE

SYNC_MASTER=(MASTER)

SYNC_DATE=(MASTER)

PAGE_BORDER=TRUE

3V3REG_FB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_LGATE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_SWITCHNODE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_LDO_FB

2V5_LDODR_C

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

3V3REG_GND

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0 V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_COMP

3V3REG_FB_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP3V3_S5

PP12V_S5

PP2V5_S5

MIN_LINE_WIDTH=0.6MM

3V3REG_BOOT_R

MIN_NECK_WIDTH=0.25MM

3V3REG_BOOT

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

MIN_NECK_WIDTH=0.25MM

3V3REG_COMP_R

MIN_LINE_WIDTH=0.6MM

SYS_POWERFAIL_L

3V3REG_PVCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_SNUB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_FS_DIS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

MIN_NECK_WIDTH=0.25MM

3V3REG_LDO_DR

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_UGATE

=PP3V3_S5_2V5_LDO

3V3REG_VCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

83 80

79 77

83

76

82

66

80

65

79

59

77

26

76

82

6

76

5

83

6

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

LM393A

V+

GND

LM393A

V+

GND

V+

LM339A

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

M50 POWER BUDGET

TOTAL=10.000A

1.21V NOMINAL

0.784V MIN

0.816V MAX

NB=4.000A

DRAM=6.000A

1.8V S3

(R1)

PP1V8_S3

PLACE LED NEAR VREG

YUKON=0.426A

1.2V S3

TOTAL=0.426A

1.591V

PP1V8_S3

SPARE COMPARATOR

1.84V NOMINAL

VOUT=VREF*(1+R2/R1)

VREF = 0.800V TYP

(R2)

1.8V AND 1.2V S3 REGULATOR

R7912

1

2

5.11K

402

MF-LF

1/16W

1%

R7911

1

2

1% 1/16W MF-LF 402

5.49K

R7910

1

2

402

MF-LF

1/16W

1%

10K

R7999

1

2

402

22

1/16W

5% MF-LF

R7903

1

2

402

1% 1/16W MF-LF

1.24K

C7907

1

2

16V 402

10%

0.01UF

CERM

R7901

1

2

953

402

1% 1/16W MF-LF

R7902

1

2

5.11

1/4W

1% MF-LF

1206

C7909

1

2

5% 50V CERM 1206

1000PF

C7908

1 2

402

16V

10%

0.047UF

CERM

R7940

1 2

402

5%

1/16W

2.2

MF-LF

C7906

1 2

10%

560PF

50V

CERM

402

C7900

1

2

402

CERM

10%

6.3V

1UF

R7905

1

2

1%

402

MF-LF

1/16W

10

R7904

1 2

MF-LF

1/16W

1%

8.06K

402

U7900

5

15

1

6

2

16

3

4

11

12

13

10

17

14

7 8

9

QFN

ISL6549

CRITICAL

C7903

1

2

603

CERM

6.3V

20%

4.7UF

R7992

1

2

100K

5% 1/16W MF-LF 402

Q7902

3

1

2

2N7002

SOT23-LF

C7992

1 2

1UF

25V X5R 603

10%

C7902

1

2

1000PF

10% 25V X7R 402

C7956

1

2

CRITICAL

2.5V

20%

680UF

POLY TH

C7957

1

2

20%

TH

POLY

2.5V

CRITICAL

680UF

C7954

1

2

680UF

TH-MCZ

ELEC

16V

20%

CRITICAL

C7953

1

2

CRITICAL

680UF

20% 16V ELEC TH-MCZ

C7923

1

2

25V

10% X7R

402

1000PF

C7924

1

2

402

X7R

25V

10%

1000PF

NOSTUFF

R7921

1

2

MF-LF 402

1/16W

5%

2.7K

C7921

1

2

805-1

20%

10UF

CERM

6.3V

R7920

1

2

402

1K

1/16W

1% MF-LF

R7922

1

2

1% 1/16W

402

MF-LF

1.96K

C7920

1

2

805

X5R

6.3V

20%

22UF

C7912

1

2

2.2UF

16V

10% X5R

603

L7903

1 2

L810HW-LF

1.5UH-19A

CRITICAL

C7960

1

2

1UF

10%

6.3V CERM 402

C7958

1

2

402

CERM

10%

1UF

6.3V

C7959

1

2

402

CERM

6.3V

10%

1UF

C7926

1

2

805-1

20%

10UF

CERM

6.3V

C7922

1

2

805-1

10UF

20%

6.3V CERM

C7925

1

2

805-1

10UF

20%

6.3V CERM

D7900

1

2

3

4

5

NOSTUFF

CTLSH3-30M833

TLM833

Q7900

4

1

3

IRLR7807Z

CRITICAL

TO-252AA

Q7903

5678

4

123

CRITICAL

IRF1902PBF

SO-8

Q7901

4

1

3

IRLR7807Z

CRITICAL

TO-252AA

C7980

1 2

0.1UF

402

CERM

10V

20%

U7910

4

2

3

1

8

SOI-1-LF

U7910

4

6

5

7

8

SOI-1-LF

C7901

1 2

20% 25V

CERM

603

0.1UF

C7911

1

2

CERM

10%

1210

16V

10UF

R7906

1

2

DEVELOPMENT

402

MF-LF

1/16W

5%

330

LED_PP1V8_S3_P

LED7900

1

2

LED_PP1V8_S3_N

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

U7901

12

8

9

14

3

DEVELOPMENT

SOI-LF

C7913

1

2

805-1

20%

6.3V

10UF

CERM

XW7900

1

2

SM

79

051-7199

A

97

1.8V & 1.2V VREG

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

PP12V_S5

PP1V8_S3

VOLTAGE=0 V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_GND

1V8REG_DDR_FB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_LDO_FB

1V2_LDODR_C

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_LDO_DR

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

PP5V_S5

1V6_REF

PGOOD_PP1V8_S3

PP3V3_S5

PP1V2_S3

=PP1V8_S3_1V2_LDO

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_VCC5

1V0_REF

MEMVTT_EN

PM_SLP_S3_L

PM_SLP_S4

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_FB_R

MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_SNUB

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_SWITCHNODE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_BOOT_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_UGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_PVCC5

1V8REG_DDR_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_FS_DIS

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_COMP_R

MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_LGATE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_COMP

MIN_LINE_WIDTH=0.6MM

PP3V3_S5

83

80

79

78

83

77

82

76

80

83

66

78

82

65

77

80

59

80

59

76

83

59

26

77

26

6

58

83

6

5

77

5

6

80

31

23

77

5

Preliminary

D

G

S

D

G

S

D

G

S

D

G

S

GND

V+

LM339A

VIN

PHASE2

SOFT2

DDR

OCSET2

PG2/REF

EN2

VSEN2

PGND2

LGATE2

ISEN2

UGATE2

BOOT2

EN1 PG1

OCSET1

PGND1 VSEN1

PHASE1 ISEN1

UGATE1

BOOT1

SOFT1

LGATE1

GND

VCC

GND

V+

LM339A

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(R1)

(R2)

VREF = 0.900V TYP

VOUT=VREF*(1+R2/R1)

1.064V NOMINAL

M50 POWER BUDGET

1.50V NOMINAL

TOTAL=10.120A

NB=8.000A SB=2.000A

CPU=0.120A

1.5V S0

1.5V S0 AND 1.05V S0 RAILS

TOTAL=5.374A

NB=2.000A SB=0.874A

1.05V S0

CPU=2.500A

PP1V5_S0

PLACE LED NEAR VREG

0.867V

PLACE LED NEAR VREG

close to inductor

R8084 AND R8087

Placement Note:

KEEP C8080, R8080,

R8082

12

1/16W

402

MF-LF

1M

1%

DEVELOPMENT

Q8000

4

1

3

IRLR7807Z

TO-252AA

CRITICAL

Q8001

4

1

3

TO-252AA

CRITICAL

IRLR7807Z

Q8050

4

1

3

TO-252AA

CRITICAL

IRLR7807Z

Q8051

4

1

3

TO-252AA

CRITICAL

IRLR7807Z

C8073

1

2

805-1

20%

6.3V

10UF

CERM

C8072

1

2

805-1

CERM

10UF

6.3V

20%

C8071

1

2

TH-MCZ

1500UF

20%

6.3V ELEC

CRITICAL

R8050

1

2

402

1/16W

5%

0

MF-LF

C8070

1

2

TH-MCZ

1500UF

20%

6.3V ELEC

CRITICAL

R8051

1

2

MF-LF

1/10W

1%

603

3.65K

R8052

1

2

603

1%

20.0K

1/10W MF-LF

C8062

1

2

603

5%

0.018UF

50V X7R

D8050

1

3

BAT54E3

SOT23

R8055

1

2

402

MF-LF

1/16W

1%

10K

R8053

1 2

2.43K

1% 1/16W MF-LF

402

C8063

1

2

0.01UF

603-1

10% X7R

50V

R8054

1

2

110K

603

MF-LF

1% 1/10W

R8091

1

2

402

MF-LF

1/16W

5%

330

DEVELOPMENT

LED8091

1

2

LED_PP1V05_S0_P

2.0X1.25MM-SM

DEVELOPMENT

GREEN-3.6MCD

C8090

1 2

20% 10V

CERM

402

0.1UF

DEVELOPMENT

U7901

12

4

5

2

3

DEVELOPMENT

SOI-LF

R8092

1

2

MF-LF

1/16W

1%

8.45K

402

DEVELOPMENT

R8093

1

2

3.01K

1% 1/16W MF-LF 402

DEVELOPMENT

D8000

1

3

BAT54E3

SOT23

C8005

1

2

TH-KZJ-LF

ELEC

16V

20%

1000UF

CRITICAL

C8004

1

2

TH-KZJ-LF

ELEC

16V

20%

1000UF

CRITICAL

R8000

1

2

MF-LF

5% 1/16W

0

402

C8003

1

2

1210

CERM

16V

10%

10UF

C8002

1

2

1210

CERM

16V

10%

10UF

C8010

1

2

603

4.7UF

20%

6.3V CERM

C8001

1

2

1210

CERM

16V

10%

10UF

L8050

1 2

TH-LF

CRITICAL

1.53UH

C8000

1

2

1210

10% 16V CERM

10UF

U8000

6

23

13

8

21

1209

7

22

2

27

11 18

15 16

3

26

4

25

12 17

5

24

28

14

10 19

1V05REG_ISEN

ISL6539

CRITICAL

1V05REG_SOFT

SSOP

R8004

1

2

603

110K

1% 1/10W MF-LF

C8013

1

2

0.01UF

50V X7R

10%

603-1

R8003

1 2

2.43K

1/16W MF-LF

1%

402

C8011

1

2

0.1UF

25V CERM

20%

603

C8061

1

2

0.1UF

25V CERM

20%

603

L8000

1 2

1.53UH

CRITICAL

TH-LF

C8012

1

2

603

5%

0.018UF

50V X7R

R8001

1

2

603

1/10W MF-LF

3.32K

1%

C8023

1

2

6.3V ELEC

20%

1500UF

TH-MCZ

CRITICAL

R8002

1

2

603

1%

4.99K

1/10W MF-LF

R8005

1

2

10K

1% 1/16W MF-LF 402

C8022

1

2

6.3V ELEC

20%

1500UF

TH-MCZ

CRITICAL

C8021

1

2

10UF

CERM

6.3V

20%

805-1

C8020

1

2

6.3V

20%

10UF

CERM 805-1

R8090

1

2

DEVELOPMENT

330

5% 1/16W MF-LF 402

LED8090

1

2

LED_PP1V5_S0_P

DEVELOPMENT

2.0X1.25MM-SM

GREEN-3.6MCD

U7901

12

6

7

1

3

DEVELOPMENT

SOI-LF

D8001

1

2

3

4

5

NOSTUFF

TLM833

CTLSH3-30M833

R8006

1

2

1%

5.11

1/4W MF-LF 1206

C8024

1

2

X7R

10% 25V

1000PF

402

D8051

1

2

3

4

5

NOSTUFF

CTLSH3-30M833

TLM833

R8056

1

2

1%

5.11

1/4W MF-LF 1206

C8064

1

2

X7R

10% 25V

1000PF

402

R8087

1

2

10KOHM-5%

0603-LF

DEVELOPMENT

CRITICAL

R8084

1 2

1/16W

1%

1K

402

MF-LF

NO STUFF

R8086

1

2

1/16W

1%

402

MF-LF

1K

DEVELOPMENT

C8080

12

6.3V

1uF

402

CERM

10%

DEVELOPMENT

R8080

1

2

649

MF-LF

402

1/16W

1%

DEVELOPMENT

R8083

1 2

1/16W

402

MF-LF

1%

15.0K

DEVELOPMENT

R8081

1 2

DEVELOPMENT

15.0K

1%

402

1/16W MF-LF

C8086

1

2

20%

6.3V

0.22UF

402

X5R

OMIT

R8089

12

4.53K

MF-LF

1%

1/16W

402

DEVELOPMENT

C8085

1

2

CERM

10%

6.3V

1uF

402

DEVELOPMENT

C8088

1 2

10%

CERM

402

470pF

50V

DEVELOPMENT

C8082

1 2

10%

CERM

402

470pF

50V

DEVELOPMENT

R8088

12

DEVELOPMENT

1%

1M

1/16W MF-LF

402

U8085

3

4

1

5

2

SOT23-5

CRITICAL

LMV2011MF

DEVELOPMENT

1

116S0090

RES,10K,5%,0402 NOT_DEVELOPMENT

C8086

1

132S0080

CAP,0.22UF,6.3V,20%,0402

DEVELOPMENT

C8086

97

A

051-7199

80

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

1.5V_S0 & 1.05V_S0 VREG

U8595_1

1V05_LGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

PM_SLP_S3_L

PGOOD_PP1V05_S0

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

1V05REG_UGATE

PP12V_S5

MIN_NECK_WIDTH=0.25MM

1V5REG_SWITCHNODE

MIN_LINE_WIDTH=0.6MM

PGOOD_PP1V5_S0

PP1V5_S0

1V5REG_UGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

NBISENS_POS

MIN_LINE_WIDTH=0.6MM

1V5REG_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V05REG_BOOT

SMC_NB_ISENSE

PP3V3_S5

1V0_REF

LED_PP1V05_S0_N

PP3V3_S5

LED_PP1V5_S0_N

PP1V5_S0

1V0_REF

PP5V_S5

PGOOD_PP1V5_S0

PP5V_S5

PGOOD_PP1V05_S0

PP1V05_S0

MIN_LINE_WIDTH=0.6MM

1V05_VSEN

MIN_NECK_WIDTH=0.25MM

1V05REG_BOOT_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V05REG_SNUBBER_R

1V05_OCSET

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V5REG_ISEN

1V5REG_SNUBBER_R

1V5REG_BOOT_R

GND_SMC_AVSS

NBISENS_NTC

PP1V05_S0

=PP5V_S0_NBISENSE

NBISENS_RC

PP5V_S5

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

1V5REG_LGATE

NBISENS_NEG

PM_SLP_S3_L

1V5REG_SOFT

1V5REG_OCSET

1V5REG_VSEN

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

1V05_SWITCHNODE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

83

80

79

78

83

77

82

76

83 83

83

79

66

82 82

82

80

78

65

80 80

80

79

77

59

79 79

79

77

76

26

59 59

80

76

80

59

77

58

80

6

80

6

80

6

80

6

80

6

80

34

59

34

6

58

23

77

5

77

6

58

5

79

5

6

79

5

77

5

77

6

58

6

5

23

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

M50 POWER BUDGET

5V S5 AND 5V AUDIO S5 REGULATOR

POWER SUPPLY 3.3V/5V MAIN SWITCH

0.784V MIN

0.816V MAX

VREF = 0.800V TYP

VOUT=VREF*(1+R2/R1)

(R2)

(R1)

MISC=1.500A

USB=1.500A ODD=1.000A

5V S5

AUDIO O=1.000A

TOTAL=5.000A

5.10V NOMINAL AUDIO=?A TOTAL=?A

5V AUDIO S5

4.50V NOMINAL

C8211

1

2

10%

10UF

16V CERM 1210

C8215

1

2

CRITICAL

TH-KZJ-LF

ELEC

6.3V

20%

1800UF

R8299

1

2

22

5% 1/16W

402

MF-LF

C8207

1

2

16V

10%

0.01UF

CERM 402

R8203

1

2

1/16W

1.24K

402

1% MF-LF

R8201

1

2

232

402

1% 1/16W MF-LF

R8202

1

2

5.11

1/4W

1% MF-LF

1206

C8209

1

2

1206

CERM

50V

5%

1000PF

C8202

1

2

1000PF

10% 25V X7R 402

C8208

1 2

402

16V

10%

CERM

0.047UF

R8240

1 2

2.2

402

MF-LF

5%

1/16W

C8292

1 2

1UF

10% 25V X5R 603

C8200

1

2

402

CERM

1UF

10%

6.3V

R8205

1

2

1%

402

MF-LF

1/16W

10

C8220

1

2

X5R 805

6.3V

20%

22UF

L8203

1 2

TH1

3.0UH

CRITICAL

C8206

1 2

10%

402

CERM

50V

470PF

R8204

1 2

MF-LF

1/16W

1%

402

8.06K

U8200

5

15

1

6

2

16

3

4

11

12

13

10

17

14

7 8

9

CRITICAL

QFN

ISL6549

XW8200

1

2

SM

C8203

1

2

603

CERM

6.3V

20%

4.7UF

C8224

1

2

1000PF

NOSTUFF

402

X7R

25V

10%

C8253

1

2

16V

1000UF

20% ELEC

TH-KZJ-LF

CRITICAL

C8223

1

2

1000PF

X7R

25V

10%

402

R8221

1

2

1/16W 402

2.7K

5% MF-LF

R8220

1

2

1% 1/16W MF-LF 402

1K

R8222

1

2

402

221

MF-LF

1% 1/16W

C8226

1

2

805-1

6.3V

20%

10UF

CERM

R8292

1

2

100K

5% 1/16W MF-LF 402

Q8202

3

1

2

NOSTUFF

2N7002

SOT23-LF

C8221

1

2

CERM 805-1

20%

6.3V

10UF

C8222

1

2

20%

6.3V 805-1

10UF

CERM

C8225

1

2

10UF

805-1

6.3V

20% CERM

D8200

1

2

3

4

5

CTLSH3-30M833

TLM833

NOSTUFF

Q8203

5678

4

123

SO-8

IRF1902PBF

CRITICAL

Q8200

4

1

3

TO-252AA

CRITICAL

IRLR7807Z

Q8201

4

1

3

TO-252AA

IRLR7807Z

CRITICAL

C8201

1 2

20% 25V

CERM

0.1UF

603

C8213

1

2

805-1

10UF

20%

6.3V CERM

C8214

1

2

805-1

10UF

20%

6.3V CERM

051-7199

A

82 97

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

5V DC/DC

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_LDO_FB

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_FS_DIS

5VREG_SWITCHNODE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_UGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_LGATE

PP12V_S5

=PP5V_S5_AUDIO_LDO

5VREG_SNUB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

VOLTAGE=0 V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_GND

MIN_LINE_WIDTH=0.6MM

5VREG_FB_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_FB

5VREG_VCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_BOOT_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_COMP

SYS_POWERFAIL_L

MIN_NECK_WIDTH=0.25MM

5VREG_PVCC5

MIN_LINE_WIDTH=0.6MM

PP5V_S5

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_COMP_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_LDO_DR

5V_AUDIO_LDODR_C

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

PP4V5_S5_AUDIO_ANALOG

83 80 79

83

78

80

77

79

76

78

59

6

76

6

5

6

5

83

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

D

G

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

4.5V S0 AUDIO

2.5V S0

12V S0

3.3V S0

5V S0

1.8V S0

3.3V AND 5V S3

Q8319

125

63

4

CRITICAL

SI3446DV

TSOP-LF

R8318

1 2

100K

1%

MF-LF

603

1/10W

C8318

1

2

0.01UF

NOSTUFF

10% 50V X7R 603-1

C8317

1

2

0.01UF

10% X7R

50V 603-1

Q8320

3

1

2

2N7002

SOT23-LF

Q8323

125

63

4

TSOP-LF

CRITICAL

SI3446DV

C8323

1

2

603-1

50V X7R

10%

0.01UF

R8319

1 2

MF-LF

100K

1/10W

603

1%

C8324

1

2

NOSTUFF

10%

0.01UF

603-1

X7R

50V

Q8324

3

1

2

2N7002

SOT23-LF

Q8318

3

4

5

CMLDM7002A

SOT563

Q8318

6

1

2

CMLDM7002A

SOT563

R8313

1

2

MF-LF

1/10W 603

100K

1%

R8312

1

2

603

10K

1% 1/10W MF-LF

Q8300

5 6 7 8

4

1 2 3

CRITICAL

SO-8

IRF7413PBF

R8315

1 2

47K

5%

MF-LF

1/10W

603

D8310

1 2

SOD-123

B0530WXF

Q8313

5

6

7

8

4

1

2

3

IRF7410PBF

SO-8

C8316

1

2

NOSTUFF

CERM

25V

20%

0.1UF

603

Q8303

3

1

2

SOT23-LF

2N7002

Q8302

3

1

2

SOT23-LF

2N7002

C8319

1

2

25V CERM

0.1UF

20%

603

C8320

1

2

0.01UF

10%

402

16V CERM

R8300

1

2

5% 1/16W MF-LF 402

47K

C8326

1

2

0.01UF

NOSTUFF

10% 50V X7R 603-1

R8325

1 2

MF-LF

1%

603

1/10W

100K

Q8317

125

63

4

CRITICAL

SI3446DV

TSOP-LF

Q8316

3

1

2

2N7002

SOT23-LF

C8325

1

2

0.01UF

10% X7R

50V 603-1

R8301

1

2

402

MF-LF

5%

3.6K

1/16W

Q8301

5 6 7 8

4

1 2 3

CRITICAL

SO-8

IRF7413PBF

R8302

1

2

402

1/16W MF-LF

5%

3.6K

R8303

1

2

MF-LF 402

5%

47K

1/16W

C8399

1

2

CERM

20%

603

10V

1UF

C8398

1

2

CERM

20%

603

10V

1UF

Q8310

125

63

4

CRITICAL

TSOP-LF

SI3446DV

C8310

1

2

50V

10%

0.033UF

X7R-CERM 603

C8311

1

2

NOSTUFF

10% 50V X7R 603-1

0.01UF

R8310

1 2

603

1%

MF-LF

100K

1/10W

Q8311

3

1

2

SOT23-LF

2N7002

Q8312

125

63

4

SI3446DV

TSOP-LF

CRITICAL

Q3815

3

1

2

SOT23-LF

2N7002

C8315

1

2

603-1

0.01UF

50V

10%

X7R

NOSTUFF

C8321

1

2

0.01UF

603-1

X7R

50V

10%

R8311

1 2

100K

1% 1/10W MF-LF

603

S0 AND S3 FETS

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

051-7199

A

83 97

GATE_3V3_S3

PM_SLP_S4

GATE_5V_S3

PP5V_S5

PP5V_S3

PP3V3_S5

PP3V3_S3

PP12V_S5

PP5V_S5

PP5V_S0

PP3V3_S0

PP12V_S5

SYS_PWRUP_L

START_G_1V8_S0

PP1V8_S3

SYS_PWRUP_L

START_G_3V3_S0

PP1V8_S0

SYS_PWRUP_L

TO_GATE_12V_S0_R

PP12V_S0

START_G_12V_S0

GATE_12V_S0

PP12V_S5

START_G_2V5_S0

PP2V5_S0

PP12V_S5

SYS_PWRUP_L

PP4V5_S0_AUDIO_ANALOG

START_G_5V_S0

SYS_PWRUP_L

VOLTAGE=2.5V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.60MM

PP2V5_S5

START_G_4V5_S0

PP4V5_S5_AUDIO_ANALOG

VOLTAGE=2.5V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.60MM

PP3V3_S5

83

80

79

78

83

78

77

82

94

82

77

83

76

80

83

76

80

76

82

66

79

82

61

79

66

80

65

78

80

59

78

65

79

59

77

79

41

77

59

26

59

76

59

26

76

79

76

26

79

6

59

6

53

6

75

10

6

83

6

83

76

6

83

6

77

5

6

5

6

5

6

5

77

5

77

6

77

6

5

6

5

77

6

77

78

82

5

Preliminary

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

INTEL RECOMMENDS 10K PULL-UPS ON I2C LINES PANEL HAS 4.2K PULL-UPS

RESISTOR TO SET DEFAULT VALUE OF PANEL ID

LVDS REFERENCE CURRENT, 1.5K OHM PULL DOWN RESISTOR NEEDED

518S0331

MIGHT BE ABLE TO BYPASS IF SMC DRIVES SIGNAL

GATE TO PREVENT LEAKAGE ONTO PWM

INVERTER INTERFACE

LCD (LVDS) INTERFACE

R9410

1

2

402

MF-LF

1/16W

5%

100K

C9410

1

2

0.001UF

10% 50V

CERM

402

R9411

1

2

402

100K

1/16W MF-LF

5%

C9401

1

2

0.001UF

10% 50V

CERM

402

L9400

1 2

SM

FERR-250-OHM

C9400

1 2

CERM

20% 16V

0.1UF

603

R9401

1 2

402

47K

MF-LF

5%

1/16W

R9400

1

2

402

MF-LF

5%

1/16W

100K

Q9400

1

2

5

63

4

SI3443DV

CRITICAL

TSOP-LF

Q9401

3

1

2

SOT23-LF

2N7002

C9450

1

2

CERM

20%

4.7UF

16V

1206-1

R9450

1 2

402

47

5%

MF-LF

1/16W

R9470

1

2

5%

100K

1/16W

402

MF-LF

J9402

1

10

11

12

13

14

15

16

17

18

19

2

20

21

22

23

24

25

26

27

28

29

3

30

4

5

6

7

8

9

CRITICAL

53307-3072

F-ST-SM

SDF9400

1

STDOFF-3MMOD4.6MMH-1.35-TH

SDF9401

1

STDOFF-3MMOD4.6MMH-1.35-TH

C9420

1

2

CERM 1210

16V

10UF

10%

J9401

1 2 3 4

87437-0443-BLK

M-ST-SM

CRITICAL

R9475

1 2

402

1/16W

5%

47

MF-LF

R9474

1

2

402

10K

5% 1/16W MF-LF

C9470

1

2

0.1UF

10V

NOSTUFF

20% CERM

402

U9470

3

2

1

4

5

NOSTUFF

MC74VHC1G08

SOT23-5-LF

R9473

1 2

402

1/16W

5%

MF-LF

0

R9472

1

2

402

NOSTUFF

MF-LF

10K

5% 1/16W

I512

I513

I514

R9420

1

2

402

MF-LF

10K

5% 1/16W

R9421

1

2

402

MF-LF

10K

5% 1/16W

R9422

1 2

402

1.5K

1% 1/16W MF-LF

R9451

1

2

402

5%

10K

1/16W MF-LF

R9402

1 2

NOSTUFF

0

5%

1/8W

MF-LF

805

C9451

1

2

402

CERM

20%

NOSTUFF

10V

0.1UF

C9452

1

2

402

CERM

20%

NOSTUFF

10V

0.1UF

94 97

A

051-7199

Internal Display Conns

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

LCD_PWM

PANEL_ID

=PP12V_INVERTER

=PP3V3_S5_LCD

=PP3V3_S0_LCD

LVDS_A_CLK_P

=PP3V3_DDC_LCD PP3V3_LCD_CONN

LCD_PWREN_L_RC

=PP3V3_DDC_LCD

LVDS_VDDEN

LVDS_BKLTCTL

PP3V3_LCD_CONN

LVDS_A_DATA_N<2>

LVDS_A_CLK_N

LVDS_A_DATA_N<1>

LVDS_A_DATA_P<0>

LVDS_B_CLK_P

LVDS_B_DATA_N<1> LVDS_B_DATA_N<2>

LVDS_DDC_DATA

LCD_PWM

LVDS_A_DATA_P<1>

LVDS_B_CLK_N

=PP3V3_DDC_LCD

GPU_PWM_RST_L

LCD_PWREN_L

LVDS_B_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_DDC_CLK

LVDS_A_DATA_N<0>

LVDS_B_DATA_P<2>

LVDS_B_DATA_P<0> LVDS_B_DATA_P<1>

=PP3V3_S0_LCD

PP3V3_S0

LVDS_CLKCTLA LVDS_CLKCTLB

LVDS_VREFH

LVDS_IBG

=PP3V3_S0_LCD

LVDS_DDC_CLK

=PP3V3_S0_LCD

PANEL_ID

SB_GPIO_48

LCD_PWM_R

LVDS_VREFL

VOLTAGE=3.3V MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.25 mm

PP3V3_LCD_CONN

LVDS_DDC_DATA

PP3V3_LCD_SW

MIN_NECK_WIDTH=0.25 mm

VOLTAGE=3.3V MIN_LINE_WIDTH=0.5 mm

83 76 61 59 41 26

94

94 94

94

94 94

94

10

94

6

13

94

6

94

13

6

13

94

13

94

6

13

6

13

6

13

6

94 22

13

6

13

Preliminary

IN

OUT

IN

OUT

OUT OUT

OUT

TX0_P TX0_N

TX1_N

TX1_P

TX2_P TX2_N TXC_P

SCLDDC SDADDC

SDG_P

TEST

EXT_SWING

TXC_N

SGND1

SGND0

PGND2

AGND0

AGND1

AGND2

GND1

SPGND

GND0

HTPLG

A1

SDSDA

SDSCL

RESET*

EXT_RES

SDI_P SDI_N

SDC_P SDC_N

SDB_P SDB_N

SDR_N

SDR_P

SDG_N

VCC1

VCC0

VCC2

AVCC0

AVCC1

PVCC1

PVCC2

SVCC0

SVCC1

SPVCC

OVCC

CORE

SDVO RCVR

I2C MASTER

INTER

TEXT MODE

CONFIG/

PRGRM

DIFF SIG

DATA

OUT OUT

OUT

IO IO

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NO STUB.

RIGHT ON TRACE WITH

THESE 2 CAPS FOR EMI

ONE 0.1UF AND 0.001UF FOR EACH PIN

PLACE THE CAP NEAR THE NB SIDE

MCH SDVO CHANNEL R,G,B,CLK SIGNAL TO TMDS CHIP

ADDRESS=0X70

IF HIGH, ADDRESS=0X72

NC

ONE 0.1UF AND 0.001UF FOR EACH PIN

PLACE IT CLOSE TO CONNECTOR

TMDS CHIP SDVO INPUT INTERRUPT SIGNAL TO MCH

ONE 0.1UF AND 0.001UF FOR EACH PIN

PLACE THIS SET OF TERMINATION NEAR CONNECTOR

PLACE NEAR U9500

C9511

1

2

402

0.1UF

X5R

16V

10%

C9510

1

2

50V

10%

402

CERM

0.001UF

C9509

1

2

10%

0.1UF

16V 402

X5R

C9508

1

2

0.001UF

CERM

10%

402

50V

C9507

1

2

0.1UF

16V

10%

402

X5R

C9520

1 2

0.1UF

X5R

10% 16V

402

C9548

1

2

16V

X5R

10%

402

0.1UF

C9547

1

2

X5R 402

16V

10%

0.1UF

C9546

1

2

X5R

16V

0.1UF

10%

402

C9545

1

2

X5R

16V

402

10%

0.1UF

C9544

1

2

16V

X5R

0.1UF

402

10%

C9543

1

2

0.1UF

X5R

16V

10%

402

C9542

1

2

16V

10%

0.1UF

X5R 402

C9541

1

2

X5R

0.1UF

402

10%

16V

C9531

1

2

16V

0.1UF

10% X5R

402

C9502

1

2

10% 16V

402

0.1UF

X5R

C9533

1

2

16V X5R 402

10%

0.1UF

C9535

1

2

402

X5R

16V

10%

0.1UF

C9540

1

2

805-1

10UF

CERM

20%

6.3V

C9539

1

2

16V

0.1UF

10% X5R

402

C9538

1

2

16V

10%

0.1UF

X5R 402

C9536

1

2

402

CERM

0.001UF

50V

10%

C9537

1

2

10% CERM

0.001UF

50V 402

C9532

1

2

0.001UF

50V

10% CERM

402

C9534

1

2

402

50V

10% CERM

0.001UF

C9501

1

2

0.001UF

CERM

10% 50V

402

C9500

1

2

CERM

10% 50V

0.001UF

402

C9530

1

2

0.001UF

50V

10% CERM

402

U9500

6

121824

15

21

35

25

7

31

29

1

27

11

26

2

8 9

44

43

47

46

41

40

33

32

38

37

5 4

39

45

3

483642

30

16

17

19

20

22

23

13

14

102834

SIL1362ACLU

LQFP

C9522

1 2

10% 16V X5R

0.1UF

402

R9537

1 2

1%

140

1/16W

402

MF-LF

C9523

1 2

402

0.1UF

16V

10% X5R

R9538

1 2

1%

1/16W

140

402

MF-LF

C9524

1 2

402

0.1UF

X5R

16V

10%

R9539

1 2

1%

140

402

1/16W MF-LF

C9525

1 2

402

0.1UF

X5R

16V

10%

R9540

1 2

100

PLACEHOLDER

1%

402

1/16W MF-LF

L9504

1 2

FERR-120-OHM-1.5A

0402

L9503

1 2

0402

FERR-120-OHM-1.5A

L9500

1 2

FERR-120-OHM-1.5A

0402

L9505

1 2

FERR-120-OHM-1.5A

0402

R9505

1

2

MF-LF

1/16W

5%

10K

402

R9506

1

2

MF-LF

1/16W

5%

10K

402

L9501

1 2

FERR-120-OHM-1.5A

0402

L9506

1 2

FERR-120-OHM-1.5A

0402

R9503

1

2

402

1K

5% 1/16W MF-LF

D9500

1

2

6

SOT-363

BAV99DW-X-F

R9501

1

2

402

MF-LF

1/16W

5%

5.6K

R9502

1

2

5.6K

MF-LF

1/16W

5%

402

R9500

1 2

402

2.2K

5% 1/16W MF-LF

R9504

1

2

332

402

1/16W MF-LF

1%

C9552

1

2

0.1UF

10% 16V X5R 402

C9551

1

2

CERM 402

50V

10%

0.001UF

C9553

1

2

50V CERM

10%

0.001UF

402

C9554

1

2

0.1UF

10% 402

X5R

16V

C9555

1

2

0.001UF

CERM

10% 50V

402

C9556

1

2

0.1UF

10% 402

X5R

16V

C9565

1

2

CERM

10UF

20%

6.3V

805-1

C9505

1

2

CERM

50V

5%

10PF

402

C9506

1

2

CERM

50V

5%

10PF

402

C9513

1

2

6.3V

20% CERM

805-1

10UF

C9512

1

2

10%

0.001UF

50V 402

CERM

C9504

1

2

805-1

20%

6.3V CERM

10UF

C9503

1

2

402

10% 16V

0.1UF

X5R

C9521

1

2

10% 402

X5R

0.1UF

16V

C9519

1 2

0.1UF

10% X5R 402

16V

PEG_D2R_P<1>

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

95 97

A

051-7199

EXTERNAL TMDS

TMDS_SDB_P TMDS_SDB_N

TMDS_I2C_SCL

TMDS_TX_N<0>

TMDS_TX_N<2>

TMDS_TX_CLK_N

TMDS_TX_P<2>

TMDS_TX_N<0>

TMDS_TX_CLK

PEG_R2D_C_N<0>

SDVO_CTRLCLK

PP1V8_TMDS

VOLTAGE=1.8V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

TMDS_TX<2>

TMDS_TX<1>

TMDS_TX<0>

MIN_LINE_WIDTH=0.6MM VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MM

PP3V3_PVCC1_TMDS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM VOLTAGE=3.3V

PP3V3_ANALOG_SDVO

VOLTAGE=1.8V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP1V8_ANALOG_SDVO

PEG_R2D_C_P<1>

PEG_R2D_C_N<1>

PP3V3_PVCC2_TMDS

TMDS_SDG_N

TMDS_SDC_P

TMDS_HTPLG_R

TMDS_TX_HPD

TMDS_HTPLG

=PP3V3_S0_TMDS

TMDS_EXT_RES

=PP1V8_S0_TMDS

PEG_R2D_C_P<0>

TMDS_I2C_SDA

PP3V3_PVCC1_TMDS

TMDS_TX_P<0>

TMDS_TX_P<1>

TMDS_SDG_P

TMDS_SDR_N

TMDS_SDR_P

PP1V8_TMDS

PP3V3_ANALOG_TMDS

=PP3V3_S0_TMDS

PEG_R2D_C_N<2>

PEG_R2D_C_N<3>

PEG_R2D_C_P<2>

PEG_D2R_N<1>

=PP3V3_S0_TMDS

=PP2V5_S0_TMDS

SDVO_CTRLDATA

=PP3V3_S0_TMDS

PP3V3_ANALOG_SDVO

=PP1V8_S0_TMDS

PP1V8_ANALOG_SDVO

TMDS_TX_N<1> TMDS_TX_P<2>

TMDS_EXT_SWING

TMDS_TX_N<2> TMDS_TX_CLK_P TMDS_TX_CLK_N

PP5V_S0_TMDS_D

TMDS_RESET_L

TMDS_INT_N

TMDS_INT_P

TMDS_SDC_N

PEG_R2D_C_P<3>

=PP3V3_S0_TMDS

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

PP3V3_PVCC2_TMDS

=PP3V3_S0_TMDS

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP3V3_ANALOG_TMDS

TMDS_TX_CLK_P

PP3V3_ANALOG_TMDS

TMDS_TX_P<1>

TMDS_TX_N<1>

TMDS_TX_P<0>

97

96

97

95

97

95

97

95

97

13

95

13

14

95

13

95

97

6

13

95

6

13

6

14

6

95

6

95

97

6

13

6

95

6

95

Preliminary

125

GND

VCC

DA

S1A S2A

S1B S2B

S1C S2C

S1D S2D

IN EN_L

DD

DC

DB

125 125

LCFILTER

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

VIDEO_MUX_SEL

SPARE BUFFERS, TYING OE* HIGH

VGA SYNC BUFFERS

PLACE RESISTORS AT NORTHBRIDGE

0

1

CRT

OUT

TV

NC

NC NC

PLACE U9620 NEAR GMCH

ANALOG FILTERING

PLACE BY CONNECTOR

U9670

2

7 1

14

3

74LC125

TSSOP

U9670

5

7 4

14

6

TSSOP

74LC125

U9620

4

7

9

12

15

8

1

2

5

11

14

3

6

10

13

16

SOP

TS3V330

C9620

1

2

402

X5R

16V

10%

0.1UF

U9670

9

7

10

14

8

TSSOP

74LC125

U9670

12

7

13

14

11

74LC125

TSSOP

C9621

1

2

6.3V

20%

10UF

CERM 805-1

FL9602

1 2

3 4

SM-220MHZ-LF

FL9601

1 2

3 4

SM-220MHZ-LF

FL9600

1 2

3 4

SM-220MHZ-LF

C9670

1

2

6.3V

10%

1UF

CERM 402

C9608

1

2

402

22PF

5% CERM

NOSTUFF

50V

R9671

1 2

MF-LF

39

5%

1/16W

402

C9607

1

2

NOSTUFF

22PF

CERM

50V

5%

402

R9672

1 2

402

MF-LF

39

5%

1/16W

R9690

1

2

402

75

1/16W

1%

MF-LF

R9692

1

2

402

75

1%

MF-LF

1/16W

R9694

1

2

402

75

1%

MF-LF

1/16W

R9691

1

2

1/16W MF-LF

402

1%

150

NOSTUFF

R9693

1

2

1/16W MF-LF

402

1%

150

NOSTUFF

R9695

1

2

MF-LF

402

1%

150

1/16W

NOSTUFF

R96A0

1

2

1/16W MF-LF

402

1%

255

R9600

1 2

402

39

MF-LF

1/16W

5%

R9601

1 2

39

402

1/16W

5%

MF-LF

I942

I943

I944

R9696

1

2

MF-LF

402

75

1/16W

1%

I961

R9697

1

2

MF-LF

402

75

1/16W

1%

I963

R9698

1

2

MF-LF

402

75

1/16W

1%

I967

R9699

1

2

MF-LF

1/16W

1%

4.99K

402

SYNC_DATE=MASTER

SYNC_MASTER=MASTER

051-7199

A

96 97

TMDS/Inverter/ExtVGA

VIDEO_MUX_GREEN

VIDEO_MUX_RED

VIDEO_MUX_BLUE

FILT_ANALOG_RED

FILT_ANALOG_BLU

FILT_ANALOG_GRN

=PP3V3_S0_TMDS

CRT_GREEN_L

CRT_RED_L

TV_IRTNC

=PP3V3_S0_TMDS

CRT_VSYNC

CRT_HSYNC

TV_DACA_OUT

CRT_RED

TV_IREF

CRT_IREF

CRT_HSYNC_R

VIDEO_MUX_RED

VIDEO_MUX_BLUE

VIDEO_MUX_GREEN

VGA_BUF_HSYNC

VGA_HSYNC

CRT_GREEN

CRT_BLUE

SB_CRT_TVOUT_MUX

TV_DACA_OUT

TV_DACB_OUT

CRT_RED

TV_DACC_OUT

CRT_VSYNC_R

VGA_VSYNC

VGA_BUF_VSYNC

CRT_BLUE_L

CRT_BLUE

TV_DACC_OUT

CRT_GREEN

TV_IRTNB

TV_DACB_OUT

TV_IRTNA

=PP3V3_S0_TMDS

97

96

95

96

95

96

97

6

13

6

13

96

97

13

22

13

13 97

13

6

Preliminary

G

SD

G

SD

SYM_VER-1

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

DVI INTERFACE

DVI DDC CURRENT LIMIT

AS CLOSE TO GPU (U8400)

514S0128

REMOVE TABLE AND OMIT ON PART

PLACE LEFT SIDE

3V LEVEL SHIFTERS

TO TMDS CONNECTOR

PLACE FILTER CLOSE

AS POSSIBLE

(55mA requirement per DVI spec)

WHEN PART AVAILABILITY FINALIZES,

R9721

1

2

5%

10K

402

MF-LF

1/16W

R9720

1

2

10K

1/16W

5%

402

MF-LF

Q9711

6

2

1

SOT-363

2N7002DW-X-F

Q9711

3

5

4

SOT-363

2N7002DW-X-F

R9722

1

2

1/16W

5%

402

MF-LF

100K

C9713

1

2

50V

5%

402

CERM

100pF

R9712

1

2

4.7K

1/16W

5%

402

MF-LF

R9710

1

2

1/16W

5%

402

MF-LF

4.7K

C9711

1

2

50V

5%

402

CERM

100pF

C9710

1

2

603-1

X7R

10%

0.01UF

50V

L9710

1 2

SM-1

400-OHM-EMI

F9710

1 2

SM-LF

0.5AMP-13.2V

CRITICAL

C9714

1

2

50V

5%

402

CERM

100pF

R9711

1 2

402

MF-LF

100

5%

1/16W

R9713

1 2

1/16W

5%

402

MF-LF

100

R9714

1 2

1%

20.0K

MF-LF

402

1/16W

L9700

1

2 3

4

CRITICAL

90-OHM-300MA

2012H

L9701

1

23

4

CRITICAL

90-OHM-300MA

2012H

L9702

1

2 3

4

CRITICAL

90-OHM-300MA

2012H

L9703

1

2 3

4

CRITICAL

165-OHM

SM

OMIT

J9710

20

8

7

6

5

4

3

2

1

26 18

25

9

10

32

11

12

13

14

15

16

28

30 22

29

17

24

33

34

19

27

31

MINI-DVI

OMIT

F-ST-SM4

D9700

2 1

CASE425

MMSZ4681XXG

C9720

1

2

402

X5R

16V

10%

0.1UF

C9721

1

2

0.1UF

10% 16V X5R 402

C9722

1

2

16V X5R

0.1UF

10%

402

C9723

1

2

0.1UF

10% 16V X5R 402

D9710

1 2

SOD-123

B0530WXF

97 97

A

051-7199

External Display Conns

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

MINI DVI CONNECTOR,32P,TH SHIELD, W/O RIBS

514S0128

1

J9710

CRITICAL

GND_CHASSIS_VGA_C_B

GND_CHASSIS_VGA

=PP3V3_S0_TMDS

CRT_DDC_DATADVI_DDC_DATA

TMDS_TX_HPD

DVI_DDC_CLK CRT_DDC_CLK

DVI_DDC_CLK_UF

TMDS_CONN_DP<1>

TMDS_CONN_DN<1>

TMDS_CONN_DN<2>

TMDS_CONN_DP<2>

DVI_HPD_UF

TMDS_TX_P<1>

DIFFERENTIAL_PAIR=TMDS_TX_1

TMDS_TX_N<1>

DIFFERENTIAL_PAIR=TMDS_TX_2

TMDS_TX_N<2>

DIFFERENTIAL_PAIR=TMDS_TX_CLK

TMDS_TX_CLK_N

DVI_DDC_DATA_UF

DVI_DDC_CLK_UF

DVI_HPD_UF

PP5V_S0_DDC

DVI_DDC_DATA_UF

VGA_BUF_HSYNC

FILT_ANALOG_GRN

TMDS_CONN_DP<0>

TMDS_CONN_DN<0>

FILT_ANALOG_RED

TMDS_CONN_CLKN

TMDS_CONN_CLKP

GND_CHASSIS_VGA_C_A

VGA_BUF_VSYNC

FILT_ANALOG_BLU

TMDS_TX_N<0>

DIFFERENTIAL_PAIR=TMDS_TX_0

TMDS_CONN_DN<0>

DIFFERENTIAL_PAIR=TMDS_CONN_D0

TMDS_CONN_DP<0>

DIFFERENTIAL_PAIR=TMDS_CONN_D0

TMDS_CONN_DN<2>

DIFFERENTIAL_PAIR=TMDS_CONN_D2

TMDS_CONN_CLKP

TMDS_CONN_CLKN

TMDS_CONN_DN<1>

TMDS_CONN_DP<1>

DIFFERENTIAL_PAIR=TMDS_CONN_D2

TMDS_CONN_DP<2>

TMDS_TX_P<2>

DIFFERENTIAL_PAIR=TMDS_TX_2

DIFFERENTIAL_PAIR=TMDS_TX_CLK

TMDS_TX_CLK_P

TMDS_TX_P<0>

DIFFERENTIAL_PAIR=TMDS_TX_0

PP5V_S0_DDC

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

VOLTAGE=5V

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

PP5V_S0_DDC_FUSE

=PP5V_S0_TMDS

PP5V_S0_TMDS_D

96 95 6 6

13

95

13

97

97 97

95

97

96

97

96

97

97 96

96

95

97

95

97

6

95

Preliminary

Apple IMAC 5.2 VALLCO Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual