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LC320WXE
Product Specification
SPECIFICATION
FOR
APPROVAL
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Preliminary Specification |
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Final Specification |
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Title |
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32.0” WXGA TFT LCD |
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BUYER |
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China |
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SUPPLIER |
LG Display Co., Ltd. |
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*MODEL |
LC320WXE |
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MODEL |
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SUFFIX |
SBV2 |
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*When you obtain standard approval, |
please use the above model name without suffix
SIGNATURE
APPROVED BY
DATE
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Please return 1 copy for your confirmation with your signature and comments.
APPROVED BY
SIGNATURE
DATE
D.W. Lee / Team Leader
REVIEWED BY
PREPARED BY
D.E. Kim / Engineer
TV Product Development Dept.
LG Display Co., Ltd
Ver. 1.0 |
1 / 27 |
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LC320WXE
Product Specification
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CONTENTS |
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Number |
ITEM |
Page |
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COVER |
1 |
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CONTENTS |
2 |
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RECORD OF REVISIONS |
3 |
1 |
GENERAL DESCRIPTION |
4 |
2 |
ABSOLUTE MAXIMUM RATINGS |
5 |
3 |
ELECTRICAL SPECIFICATIONS |
6 |
3-1 |
ELECTRICAL CHARACTERISTICS |
6 |
3-2 |
INTERFACE CONNECTIONS |
8 |
3-3 |
SIGNAL TIMING SPECIFICATIONS |
10 |
3-4 |
SIGNAL TIMING WAVEFORMS |
12 |
3-5 |
COLOR DATA REFERENCE |
13 |
3-6 |
POWER SEQUENCE |
14 |
4 |
OPTICAL SPECIFICATIONS |
16 |
5 |
MECHANICAL CHARACTERISTICS |
20 |
6 |
RELIABILITY |
23 |
7 |
INTERNATIONAL STANDARDS |
24 |
7-1 |
SAFETY |
24 |
7-2 |
EMC |
24 |
8 |
PACKING |
25 |
8-1 |
INFORMATION OF LCM LABEL |
25 |
8-2 |
PACKING FORM |
25 |
9 |
PRECAUTIONS |
26 |
9-1 |
MOUNTING PRECAUTIONS |
26 |
9-2 |
OPERATING PRECAUTIONS |
26 |
9-3 |
ELECTROSTATIC DISCHARGE CONTROL |
27 |
9-4 |
PRECAUTIONS FOR STRONG LIGHT EXPOSURE |
27 |
9-5 |
STORAGE |
27 |
9-6 |
HANDLING PRECAUTIONS FOR PROTECTION FILM |
27 |
Ver. 1.0 |
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2 / 27 |
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LC320WXE |
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Product Specification |
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RECORD OF REVISIONS |
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0.4 |
Jun. 22. 2009 |
4, 20 |
Defined the weight spec. |
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11 |
Changed the picture (CNT. direction) |
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21 |
Updated the drawing |
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22 |
Updated the drawing |
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0.5 |
Jul, 15, 2009 |
7 |
Modified the Table 3. (Striking Time : Max 5 Min 1.5) |
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11 |
Fixed the Rear view of LCM |
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21, 22 |
Fixed the drawing |
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24 |
Changed International Standard |
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hT\SG]VX[ |
Changed the Origin |
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A-13/14 |
Updated the Lamp Electrical spec |
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XUW |
h UG[UGYWW` |
5 |
Added Notes 3. |
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XXSYY |
Changed the picture (CNT. direction) |
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X]SX^ |
j G UV UGCR & G G GsW |
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Ver. 1.0 |
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3 / 27 |
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LC320WXE
Product Specification
1. General Description
The LC320WXE is a Color Active Matrix Liquid Crystal Display with an integral External Electrode Fluorescent Lamp(EEFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally black mode. It has a 31.51 inch diagonally measured active display area with WXGA resolution (768 vertical by 1366 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in Horizontal stripes. Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot, thus presenting a palette of more than 16.7M(true) colors.
It has been designed to apply the 8-bit 1-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.
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EEPROM |
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SCL |
SDA |
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+12.0V |
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TFT - LCD Panel |
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LVDS 1Port |
CN1 |
Timing Controller |
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(1366 |
Ý 768 x RGB pixels) |
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LVDS Select #9 |
(30pin) |
[LVDS Rx + Spread Spectrum |
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[Gate In Panel] |
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integrated] |
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Power Circuit |
RGB |
S1 |
S1366 |
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Block |
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Source Driver Circuit |
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High Input |
CN2, 3Pin, 10 Lamps/@65 mA |
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High Input |
Back light Assembly (10EEFL) |
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CN3, 3Pin, 10 Lamps/@65 mA |
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General Features
Active Screen Size |
31.51 inches(800.4mm) diagonal |
Outline Dimension |
760.0 mm(H) x 450.0 mm(V) x 36.0 mm(D) (Typ.) |
Pixel Pitch |
510.75 x 170.25 x RGB |
Pixel Format |
1366 horiz. by 768 vert. pixels RGB horizontal stripe arrangement |
Color Depth |
8bit, 16,7 M colors |
Luminance, White |
350 cd/m2 (Center 1 point) (Typ.) |
Viewing Angle (CR>10) |
Viewing angle free ( R/L 178(Min.), U/D 178(Min.)) |
Power Consumption |
Total 73.7Watt (Typ.) (Logic=3.7 W, Back Light= 70W @ with Inverter) |
Weight |
4,000g(Typ.) |
Display Operating Mode |
Transmissive mode, normally black |
Surface Treatment |
Hard coating(3H), anti-glare treatment of the front polarizer (Haze 13%) |
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Ver. 1.0 |
4 / 27 |
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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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LC320WXE
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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Parameter |
Symbol |
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Value |
Unit |
Remark |
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Min |
Max |
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Power Input |
VLCD |
-0.3 |
+14.0 |
VDC |
at 25 2 ¶C |
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Voltage |
LCM |
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B/L Input |
Operating Voltage |
VOP |
600 |
1300 |
V[ RMS] |
GY\G YG¶j |
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voltage |
(one side) |
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Operating Temperature |
TOP |
0 |
+50 |
¶C |
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Storage Temperature |
TST |
-20 |
+60 |
¶C |
Note 1,2 |
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Operating Ambient Humidity |
HOP |
10 |
90 |
%RH |
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Storage Humidity |
HST |
10 |
90 |
%RH |
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Notes : 1. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be Max 39 ¶C and no condensation of water.
2.Gravity mura can be guaranteed below 40condition.
3.The mold backlight can be discolored in a high temperature by long time operation but it doesn’t care about the picture quality.
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90% |
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60 |
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60% |
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Wet Bulb |
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40 |
50 |
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[(%)RH] |
Storage |
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Temperature [¶C] |
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Humidity |
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40% |
Operation |
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30 |
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20 |
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10 |
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10% |
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-20 |
0 |
10 |
20 |
30 |
40 |
50 |
60 |
70 |
80 |
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Dry Bulb Temperature [¶C] |
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Ver. 1.0 |
5 / 27 |
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LC320WXE
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit.
The other Is used for the EEFL backlight.
Table 2. ELECTRICAL CHARACTERISTICS |
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Parameter |
Symbol |
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Value |
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Unit |
Note |
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Min |
Typ |
Max |
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Circuit : |
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Power Input Voltage |
VLCD |
10.8 |
12.0 |
13.2 |
VDC |
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Power Input Current |
ILCD |
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310 |
405 |
mA |
1 |
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535 |
695 |
mA |
2 |
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Power Consumption |
PLCD |
- |
3.7 |
4.9 |
Watt |
1 |
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Rush current |
IRUSH |
- |
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3.0 |
A |
3 |
Notes : 1. The specified current and power consumption are under the VLCD=12.0V, 25 2¶C, fV=60Hz condition whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2.The current is specified at maximum current pattern.
3.The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.)
White : 255 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6) |
Ver. 1.0 |
6 / 27 |
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LC320WXE
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS of Back Light Assembly & Lamp (Continue)
Parameter |
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Symbol |
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Values |
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Unit |
Notes |
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Min |
Typ |
Max |
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Backlight Assembly : |
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Operating Voltage |
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VBL |
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970 |
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VRMS |
1, 2 |
(one side, fBL=63KHz, IBL= 65mArms)) |
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Operating Current (one side) |
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IBL |
- |
65 |
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mARMS |
1 |
Established Starting |
0 |
VS |
- |
- |
1100 |
VRMS |
1, 3 |
Voltage (one side) |
25 |
- |
- |
990 |
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Operating Frequency |
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fBL |
61 |
63 |
65 |
kHz |
4 |
Striking Time |
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S TIME |
1.5 |
- |
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3 |
Power Consumption |
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PBL |
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70 |
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Watt |
6 |
Burst Dimming Duty |
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PWM Duty |
20 |
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100 |
% |
9 |
Burst Dimming Frequency |
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1/T |
94 |
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126 |
Hz |
9 |
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Parameter |
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Symbol |
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Values |
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Unit |
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Notes |
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Min |
Typ |
Max |
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Lamp : APPENDIX-IX |
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Lamp Voltage (one side) |
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VLAMP |
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760 |
970 |
1110 |
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VRMS |
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Lamp Current (one side) |
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ILAMP |
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3 |
6.5 |
8.0 |
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mARMS |
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Discharge Stabilization Time |
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TS |
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- |
3 |
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Min |
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5 |
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Lamp Frequency |
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f LAMP |
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40 |
63 |
80 |
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KHz |
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Lamp Temperature |
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TLAMP |
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130 |
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¶C |
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Established Starting |
0 |
VS |
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1100 |
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VRMS |
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3 |
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Voltage (one side) |
25 |
VS |
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990 |
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Life Time |
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50,000 |
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Hrs |
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7 |
Notes : The design of the inverter must have specifications for the lamp in LCD Assembly. |
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The electrical characteristics of inverter are |
based on High-High Driving type. |
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The performance of the lamps in LCM, for example life time or brightness, is extremely influenced by |
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the characteristics of the DC-AC inverter. So, all the parameters of an inverter should be carefully |
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designed so as not to produce too much leakage current from high-voltage output of the inverter. |
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When you design or order the inverter, please make sure unwanted lighting caused by the mismatch |
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of the lamp and the inverter (no lighting, flicker, etc) has never been occurred. When you confirm it, |
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the LCD– Assembly should be operated in the same condition as installed in your instrument. |
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Do not attach a conductive tape to lamp connecting wire. |
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If you attach conductive tape to the lamp wire, not only luminance level can be lower than typical one
but also inverter operate abnormally on account of leakage current which is generated between lamp wire and conductive tape.
1.Specified values are defined for a Backlight Assembly. (IBL : 10 Lamp, 6.5mA/Lamp)
2.Operating voltage is measured at 25 2¶C(after 2hr.aging). The variance range for operating voltage is 10%.
3.The established starting voltage [ VS ] should be applied to the lamps for more than Striking time (S TIME)
for start-up. Inverter open voltage must be more than established starting voltage. Otherwise, the lamps may not be turned on. The used lamp current is typical value.
Ver. 1.0 |
7 / 27 |
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LC320WXE
Product Specification
} T
S TIME
Vs = (Vpk-pk) / [ 2*root(2)]
4.Lamp frequency may produce interference with horizontal synchronous frequency. As a result, the may
cause beat on the display. Therefore, lamp frequency shall be away as much as possible from the horizontal synchronous frequency and its harmonics range inorder to prevent interference.
There is no reliability problem of lamp, if use out of range of operation frequency (61 kHz~65 kHz) on CAS
5.The brightness of the lamp after lighted for 5minutes is defined as 100%.
TS is the time required for the brightness of the center of the lamp to be not less than 95% at typical current. The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.
6.Maximum level of power consumption is measured at initial turn on.
Typical level of power consumption is measured after 2hrs aging at 25 2¶C.
7. The life time is determined as the time at which brightness of the lamp is 50% compared to that of initial value at the typical lamp current on condition of continuous operating at 25 2¶C, based on duty 100%.
8.The output of the inverter must have symmetrical(negative and positive) voltage and current waveform (Unsymmetrical ratio is less than 10%). Please do not use the inverter which has not only unsymmetrical voltage and current but also spike wave.
Requirements for a system inverter design, which is intended to achieve better display performance, power efficiency and more reliable lamp characteristics.
It can help increase the lamp lifetime and reduce leakage current.
a.The asymmetry rate of the inverter waveform should be less than 10%.
b.The distortion rate of the waveform should be within ˲2 ·10%.
*Inverter output waveform had better be more similar to ideal sine wave.
* Asymmetry rate:
I p
| I p – I –p | / Iop x 100%
* Distortion rate
I -p
I p (or I –p) / Iop
Ver. 1.0 |
8 / 27 |
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LC320WXE
Product Specification
9. The reference method of burst dimming duty ratio.
It is recommended to use synchronous V-sync frequency to prevent waterfall (Vsync x 2 =Burst Frequency)
{
A
PWM
Output of Inverter to Lamp
PWM duty={ A/T } * 100
Point A : rising time 90% of Iout point . Point B : falling starting point .
I out duty = { a/T } * 100 PWM Frequency = 1/T
+3.3V TTL
I-out
90%
a
Point A Point B
We recommend not to be muchdifferent between PWM duty and Iout duty .
Dimming current output rising and falling time may produce humming and inverter trans’ sound noise. Burst dimming duty should be 100% for more than 1second after turn on.
Equipment
Oscilloscope :TDS3054B(Tektronix)
Current Probe : P6022 AC (Tektronix)
High Voltage Probe: P5100(Tektronix)
10. The Cable between the backlight connector and its inverter power supply should be connected directly
with a minimized length. The longer cable between the backlight and the inverter may cause the lower luminance of lamp and may require more higher starting voltage ( Vs ).
11.The operating current must be measured as near as backlight assembly input.
12.The operating current unbalance between left and right must be under 10% of Typical current
Left(Master) current – Right(Slave) Current |
10% of typical current |
Ver. 1.0 |
9 / 27 |
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LC320WXE
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, a 30-pin connector is used for the module electronics and 3-pin (65002HP-03P) connector is used for the internal backlight system.
3-2-1. LCD Module
-LCD Connector(CN1) : FI-X30SSL-HF (Manufactured by JAE) or Equivalent -Mating Connector : FI-X30C2L (Manufactured by JAE) or Equivalent
Table 4. MODULE CONNECTOR(CN5) PIN CONFIGURATION |
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Pin No. |
Symbol |
Description |
Note |
1 |
VLCD |
Power Supply +12.0V |
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2 |
VLCD |
Power Supply +12.0V |
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3 |
VLCD |
Power Supply +12.0V |
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4 |
VLCD |
Power Supply +12.0V |
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5 |
GND |
Ground |
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6 |
GND |
Ground |
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7 |
GND |
Ground |
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8 |
GND |
Ground |
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9 |
LVDS Select |
‘H’ =JEIDA , ‘L’ or NC = VESA |
Appendix VII |
10 |
nuk |
Ground |
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11 |
GND |
Ground |
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12 |
RA- |
LVDS Receiver Signal(-) |
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13 |
RA+ |
LVDS Receiver Signal(+) |
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14 |
GND |
Ground |
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15 |
RB- |
LVDS Receiver Signal(-) |
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16 |
RB+ |
LVDS Receiver Signal(+) |
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17 |
GND |
Ground |
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18 |
RC- |
LVDS Receiver Signal(-) |
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19 |
RC+ |
LVDS Receiver Signal(+) |
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20 |
GND |
Ground |
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21 |
RCLK- |
LVDS Receiver Clock Signal(-) |
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22 |
RCLK+ |
LVDS Receiver Clock Signal(+) |
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23 |
GND |
Ground |
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24 |
RD- |
LVDS Receiver Signal(-) |
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25 |
RD+ |
LVDS Receiver Signal(+) |
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26 |
GND |
Ground |
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27 |
PWM OUT |
PWM output (From LCM) |
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28 |
Ext VBR-B |
External VBR (From System) |
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29 |
GND |
Ground |
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30 |
GND |
Ground |
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Notes : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2.All VLCD (power input) pins should be connected together.
3.All Input levels of LVDS signals are based on the EIA 644 Standard. (Please see the Appendix VI)
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LC320WXE
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Product Specification |
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3-2-2. Backlight Module |
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[ Master ] |
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[ Slave ] |
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1) Connector |
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1) Connector |
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: 65002HP-03P (YEONHO) or equivalent |
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: 65002HP-03P (YEONHO) or equivalent |
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2) Mating Connector |
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2) Mating Connector |
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: 65002HS-03 (YEONHO) or equivalent. |
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: 65002HS-03 (YEONHO) or equivalent. |
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Table 5. BACKLIGHT CONNECTOR PIN CONFIGURATION(CN2,CN3) |
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No |
Symbol |
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Master |
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Slave |
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Note |
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1 |
FB |
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NC |
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NC |
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2 |
H_Input |
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High_Input |
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High_Input |
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3 |
FB |
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NC |
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NC |
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Rear view of LCM
1
2
1
2 3
3
Ver. 1.0 |
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LC320WXE
Product Specification
3-3. Signal Timing Specifications
Table 6-1 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timing should be satisfied with the following specification for normal operation.
[ DE (Data Enable) Only ]
ITEM |
Symbol |
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Min |
Typ |
Max |
Unit |
Note |
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DCLK |
Period |
tCLK |
12.5 |
13.8 |
15.8 |
ns |
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Frequency |
- |
63 |
72.4 |
80 |
MHz |
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Period |
tHT |
1456 |
1528 |
1920 |
tCLK |
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Horizontal Valid |
tHV |
1366 |
1366 |
1366 |
tCLK |
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Horizontal Blank |
- |
tHP- tHV |
162 |
tHP- tHV |
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Hsync |
Frequency |
fH |
45 |
47.4 |
50 |
KHz |
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Width |
tWH |
- |
32 |
- |
tCLK |
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Horizontal Back Porch |
tHBP |
24 |
50 |
- |
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Horizontal Front Porch |
tHFP |
40 |
80 |
- |
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Period |
tVT |
776 |
790 |
1063 |
tHP |
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(894) |
(948) |
(1008) |
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Vertical Valid |
tVV |
768 |
768 |
768 |
tHP |
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Vertical Blank |
- |
tVP- tVV |
22 |
tVP- tVV |
tHP |
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Frequency |
fV |
57 |
60 |
63 |
Hz |
Note 1) |
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Vsync |
NTSC : 57~63Hz |
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(47) |
(50) |
(53) |
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(PAL : 47~53Hz) |
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Width |
tWV |
- |
5 |
- |
tHP |
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(12) |
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Vertical Back Porch |
tVBP |
5 |
15 |
- |
Hz |
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(128) |
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Vertical Front Porch |
tVFP |
1 |
2 |
- |
tHP |
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(40) |
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Note :
1. The input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode). If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2.The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency
3.Timing should be set based on clock frequency.
Ver. 1.0 |
12 / 27 |
|
|
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
Global LCD Panel Exchange Center |
www.panelook.com |
LC320WXE
Product Specification
3-4. Signal Timing Waveforms
|
DE, Data |
0.7VDD |
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0.3VDD |
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tCLK |
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0.5 VDD |
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DCLK |
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Valid data |
data |
Invalid data |
Invalid data |
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DE(Data Enable) |
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tHV |
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tHT |
DE(Data Enable) |
1 |
768 |
tVV
tVT
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