LC320EUA
Product Specification
SPECIFICATION
FOR
APPROVAL
() Preliminary Specification
( ●) Final Specification
Title |
32.0” WUXGA TFT LCD |
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BUYER |
LGE |
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MODEL |
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SUPPLIER |
LG Display Co., Ltd. |
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*MODEL |
LC320EUA |
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SUFFIX |
PFF1 (RoHS Verified) |
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APPROVED BY
SIGNATURE
DATE
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Please return 1 copy for your confirmation with your signature and comments.
Ver. 1.0 |
1 /40 |
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LC320EUA |
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Product Specification |
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CONTENTS |
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Number |
ITEM |
Page |
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COVER |
1 |
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CONTENTS |
2 |
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RECORD OF REVISIONS |
3 |
1 |
GENERAL DESCRIPTION |
4 |
2 |
ABSOLUTE MAXIMUM RATINGS |
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3 |
ELECTRICAL SPECIFICATIONS |
6 |
3-1 |
ELECTRICAL CHARACTERISTICS |
6 |
3-2 |
INTERFACE CONNECTIONS |
9 |
3-3 |
SIGNAL TIMING SPECIFICATIONS |
13 |
3-4 |
PANEL PIXEL STRUCTURE |
14 |
3-5 |
POWER SEQUENCE |
15 |
4 |
OPTICAL SPECIFICATIONS |
17 |
5 |
MECHANICAL CHARACTERISTICS |
23 |
6 |
RELIABILITY |
26 |
7 |
INTERNATIONAL STANDARDS |
27 |
7-1 |
SAFETY |
27 |
7-2 |
EMC |
27 |
7-3 |
Environment |
27 |
8 |
PACKING |
28 |
8-1 |
DESIGNATION OF LOT MARK |
28 |
8-2 |
PACKING FORM |
28 |
9 |
PRECAUTIONS |
29 |
9-1 |
MOUNTING PRECAUTIONS |
29 |
9-2 |
OPERATING PRECAUTIONS |
29 |
9-3 |
ELECTROSTATIC DISCHARGE CONTROL |
30 |
9-4 |
PRECAUTIONS FOR STRONG LIGHT EXPOSURE |
30 |
9-5 |
STORAGE |
30 |
9-6 |
OPERAGING CONDITION GUIDE |
30 |
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Ver. 1.0 |
2 /40 |
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LC320EUA
Product Specification
Revision No. |
Revision Date |
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Description |
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0.0 |
Aug, 20, 2012 |
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Preliminary Specification (First Draft) |
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0.1 |
Oct, 25, 2012 |
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Update Electrical |
spec |
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1.0 |
Dec, 28, 2012 |
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CAS Version 1.0 |
Release |
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Ver. 1.0 |
3 /40 |
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LC320EUA
Product Specification
The LC320EUA is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 31.55 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot. Therefore, it can present a palette of more than 16.7Milion colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.
Power (VCC, VDD, HVDD, VGH, VGL) |
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Source Driver Circuit |
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Gate Control Signal |
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CN1 |
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S1 |
S1920 |
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Gamma Reference Voltage |
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(50pin) |
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G1 |
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EPI (RGB & Control signal) for Left drive |
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TFT - LCD Panel |
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Power (VCC, VDD, HVDD, VGH, VGL) |
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(1920 × RGB × 1080 pixels) |
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Gate Control Signal |
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[Gate In Panel] |
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Gamma Reference Voltage |
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CN2 |
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G1080 |
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(50pin) |
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EPI (RGB & Control Signal) for Right drive |
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SIN, SCLK, V_Sync |
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LED Driver |
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+24.0V, GND, On/Off |
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H Local Dimming : 4Block |
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ExtVBR-B |
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General Features |
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Active Screen Size |
31.55 inches(801.31mm) diagonal |
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Outline Dimension |
715.8 (H) × 416.33(V) X 9.7(B)/21.9 mm(D) (Typ.) |
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Pixel Pitch |
0.36375 mm x 0.36375 mm |
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Pixel Format |
1920 |
horiz. by 1080 vert. Pixels, RGB stripe arrangement |
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Color Depth |
8-bit, |
16.7 M colors ( 1.06B colors @ 10 bit (D) System Output ) |
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Drive IC Data Interface |
Source D-IC : 8-bit |
EPI, gamma reference voltage, and control signals |
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Gate D-IC : Gate In Panel |
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Luminance, White |
350 cd/m2 (Center 1point ,Typ.) |
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Viewing Angle (CR>10) |
Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.)) |
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Power Consumption |
Total 43.6W (Typ.) [Logic= 6.2W, LED Driver=37.4W (ExtVbr_B=100% )] |
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Weight |
5.0 Kg (Typ.) |
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Display Mode |
Transmissive mode, Normally black |
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Surface Treatment |
Hard coating(3H), Anti-glare treatment : Haze 1%(typ.) |
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Ver. 1.0 |
4 /40 |
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LC320EUA
Product Specification
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter |
Symbol |
Value |
Unit |
Note |
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Min |
Max |
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Logic & EPI Power Voltage |
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VCC |
-0.5 |
+2.2 |
VDC |
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Gate High Voltage |
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VGH |
+18.0 |
+30.0 |
VDC |
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Gate Low Voltage |
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VGL |
-8.0 |
-4.0 |
VDC |
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Source D-IC Analog Voltage |
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VDD |
-0.3 |
+18.0 |
VDC |
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Gamma Ref. Voltage (Upper) |
VGMH |
½VDD-0.5 |
VDD+0.5 |
VDC |
1 |
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Gamma Ref. Voltage (Low) |
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VGML |
-0.3 |
½ VDD+0.5 |
VDC |
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Driver Power Input Voltage |
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VBL |
-0.3 |
+ 27.0 |
VDC |
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ON/OFF |
VOFF / VON |
-0.3 |
+3.9 |
VDC |
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Driver Control Voltage |
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Brightness |
EXTVBR-B |
-0.3 |
+3.9 |
VDC |
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Status |
Status |
-0.3 |
+5.5 |
VDC |
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Panel Front Temperature |
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TSUR |
- |
+68 |
°C |
4 |
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Operating Temperature |
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TOP |
0 |
+50 |
°C |
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Storage Temperature |
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TST |
-20 |
+60 |
°C |
2,3 |
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Operating Ambient Humidity |
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HOP |
10 |
90 |
%RH |
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Storage Humidity |
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HST |
10 |
90 |
%RH |
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Note 1. Ambient temperature condition (Ta = 25 ± 2 °C )
2.Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be Max 39°C, and no condensation of water.
3.Gravity mura can be guaranteed below 40°C condition.
4.The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 68 . The range of operating temperature may be degraded in case of improper thermal management in final product design.
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90% |
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60 |
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60% |
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50 |
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[(%)RH] |
Storage |
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Wet Bulb |
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Temperature [°C] |
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40 |
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Humidity |
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40% |
Operation |
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30 |
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20 |
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10 |
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0 |
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10% |
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-20 |
0 |
10 |
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30 |
40 |
50 |
60 |
70 |
80 |
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Dry Bulb Temperature [°C] |
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Ver. 1.0 |
5 /40 |
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LC320EUA
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires several power inputs. The VCC is the basic power of LCD Driving power sequence, Which is used to logic power voltage of Source D-IC and GIP.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter |
Symbol |
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MAX |
Unit |
Note |
Logic & EPI Power Voltage |
VCC |
- |
1.62 |
1.8 |
1.98 |
VDC |
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Logic High Level Input Voltage |
VIH |
- |
1.4 |
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VCC |
VDC |
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Logic Low Level Input Voltage |
VIL |
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0 |
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0.4 |
VDC |
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Source D-IC Analog Voltage |
VDD |
- |
16.8 |
17 |
17.2 |
VDC |
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Half Source D-IC Analog Voltage |
H_VDD |
- |
8.3 |
8.5 |
8.7 |
VDC |
6 |
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VGMH |
(GMA1 ~ GMA9) |
H_VDD+0.2V |
- |
VDD-0.2 |
VDC |
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Gamma Reference Voltage |
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VGML |
(GMA10 ~ GMA18) |
0.2 |
- |
H_VDD-0.2V |
VDC |
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Common Voltage |
Vcom |
Reverse |
7.0 |
7.3 |
7.6 |
V |
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EPI input common voltage |
VCM |
LVDS Type |
0.8 |
VCC/2 |
1.3 |
V |
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EPI input differential voltage |
Vdiff |
- |
150 |
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500 |
mV |
5 |
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EPI Input eye diagram |
Veye |
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90 |
- |
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mV |
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@ 25 |
26.7 |
27 |
27.3 |
VDC |
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Gate High Voltage |
VGH |
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@ 0 |
28.7 |
29 |
29.3 |
VDC |
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Gate Low Voltage |
VGL |
- |
-5.2 |
-5.0 |
-4.8 |
VDC |
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VGI_P |
- |
VGL |
- |
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VDC |
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GIP Bi-Scan Voltage |
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VGI_N |
- |
- |
- |
VGH |
VDC |
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GIP Refresh Voltage |
VGH |
- |
VGL |
- |
VGH |
V |
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even/odd |
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GIP Start Pulse Voltage |
VST |
- |
VGL |
- |
VGH |
V |
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GIP Operating Clock |
GCLK |
- |
VGL |
- |
VGH |
V |
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Total Power Current |
ILCD |
- |
- |
520 |
650 |
mA |
1 |
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Total Power Consumption |
PLCD |
- |
- |
6.2 |
7.8 |
Watt |
1 |
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Note: |
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1. The specified current and power consumption are under the VLCD=12V., 25 ± 2°C, fV=60Hz |
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condition whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency. |
2. |
The above spec is based on the basic model. |
3. |
All of the typical gate voltage should be controlled within 1% voltage level |
4. |
Ripple voltage level is recommended under ±5% of typical voltage |
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In case of EPI signal spec, refer to Fig 2 for the more detail. |
6. |
HVDD Voltage level is half of VDD and it should be between Gamma9 and Gamma10. |
Ver. 1.0 |
6 /40 |
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LC320EUA
Product Specification
VGH
VGHM
GND
VGL
Without GPM |
With GPM |
FIG. 1 Gate Output Wave form without GPM and with GPM
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EPI + |
Vdiff |
Vdiff |
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0 V |
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Vdiff |
EPI - |
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Vcm |
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0 V |
(Differential Probe) |
(Active Probe) |
FIG. 2-1 EPI Differential signal characteristics
1 UI
0.5 UI
Veye
0 V
Veye
B1 B2
(Differential Probe)
FIG. 2-2 Eye Pattern of EPI Input
*Source PCB
FIG. 3 Measure point
Ver. 1.0 |
7 /40 |
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LC320EUA |
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Product Specification |
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Table 3. ELECTRICAL CHARACTERISTICS (Continue) |
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Values |
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Parameter |
Symbol |
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Unit |
Notes |
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Min |
Typ |
Max |
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LED Driver : |
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Power Supply Input Voltage |
VBL |
22.8 |
24.0 |
25.2 |
Vdc |
1 |
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Power Supply Input Current |
IBL |
- |
1.56 |
1.74 |
A |
1 |
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VBL = 22.8V |
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Power Supply Input Current (In-Rush) |
In-rush |
- |
- |
3 |
A |
Ext VBR-B = 100% |
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Power Consumption |
PBL |
- |
37.4 |
39.7 |
W |
1 |
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On |
V on |
2.5 |
- |
3.6 |
Vdc |
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On/Off |
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Off |
V off |
-0.3 |
0.0 |
0.7 |
Vdc |
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Brightness Adjust |
ExtVBR-B |
1 |
- |
100 |
% |
On Duty |
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6 |
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|
|
Input Voltage for |
PWM Frequency for |
PAL |
|
100 |
|
Hz |
3 |
|
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|||
|
Control System |
NTSC & PAL |
NTSC |
|
120 |
|
Hz |
3 |
|
|
Signals |
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||||
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|
Pulse Duty Level |
High Level |
2.5 |
- |
3.6 |
Vdc |
HIGH : on duty |
||
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(PWM) |
Low Level |
0.0 |
- |
0.7 |
Vdc |
LOW : off duty |
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|||||
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|
VSYNC, SIN, SCLK |
High Level |
2.7 |
3.3 |
3.6 |
Vdc |
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||
|
|
(Local Dimming) |
Low Level |
-0.3 |
0.0 |
0.4 |
Vdc |
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LED : |
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|
Life Time |
|
|
|
30,000 |
50,000 |
|
Hrs |
2 |
|
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|
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|
|
|
|
Notes :
1.Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60 minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand VBR (ExtVBR-B : 100%), it is total power consumption.
2.The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at 25±2°C.
3.LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system. Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4.The duration of rush current is about 200ms. This duration is applied to LED on time.
5.Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.
6.Ext_PWM Signal have to input available duty range.
Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%)
But ExtVBR-B 0% and 100% are available.
High
Available duty range
Low
0% 1% |
Ext_PWM Input Duty |
99% 100% |
Ver. 1.0 |
8 /40 |
|
|
LC320EUA
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, two 50-pin FFC connector are used for the module electronics and 8-pin / 8-pin connectors are used for the integral backlight system.
3-2-1. LCD Module
-LCD Connector (CN1): TF06L-50S-0.5SH (Manufactured by HRS) or Compatible
Table 3-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No |
Symbol |
Description |
|
No |
Symbol |
Description |
|
|
|
|
|
|
|
|
|
1 |
LTD_OUT |
LTD OUTPUT |
|
26 |
GND |
Ground |
|
|
|
|
|
|
|
|
|
2 |
NC |
No Connection |
|
27 |
EPI2- |
EPI Receiver Signal(2-) |
|
|
|
|
|
|
|
|
|
3 |
GCLK1 |
GIP GATE Clock 1 |
|
28 |
EPI2+ |
EPI Receiver Signal(2+) |
|
|
|
|
|
|
|
|
|
4 |
GCLK2 |
GIP GATE Clock 2 |
|
29 |
GND |
Ground |
|
|
|
|
|
|
|
|
|
5 |
GCLK3 |
GIP GATE Clock 3 |
|
30 |
GND |
Ground |
|
|
|
|
|
|
|
|
|
6 |
GCLK4 |
GIP GATE Clock 4 |
|
31 |
EPI1- |
EPI Receiver Signal(1-) |
|
|
|
|
|
|
|
|
|
7 |
GCLK5 |
GIP GATE Clock 5 |
|
32 |
EPI1+ |
EPI Receiver Signal(1+) |
|
|
|
|
|
|
|
|
|
8 |
GCLK6 |
GIP GATE Clock 6 |
|
33 |
GND |
Ground |
|
|
|
|
|
|
|
|
|
9 |
VGI_N |
GIP Bi-Scan (VGI_N = VGH) |
|
34 |
VCC |
Logic & EPI Power Voltage |
|
|
|
|
|
|
|
|
|
10 |
VGI_P |
GIP Bi-Scan (VGI_P = VGL) |
|
35 |
NC |
No Connection |
|
|
|
|
|
|
|
|
|
11 |
VGH_ODD |
GIP Panel VDD for Odd GATE TFT |
|
36 |
LOCKOUT3 |
LOCKOUT3 |
|
|
|
|
|
|
|
|
|
12 |
VGH_EVEN |
GIP Panel VDD for Even GATE TFT |
|
37 |
NC |
No Connection |
|
|
|
|
|
|
|
|
|
13 |
VGL |
GATE Low Voltage |
|
38 |
GND |
Ground |
|
|
|
|
|
|
|
|
|
14 |
VST |
VERTICAL START PULSE |
|
39 |
GMA18 |
GAMMA VOLTAGE 18 (Output From LCD) |
|
|
|
|
|
|
|
|
|
15 |
GIP_Reset |
GIP Reset |
|
40 |
NC |
No Connection |
|
|
|
|
|
|
|
|
|
16 |
VCOM_L_FB |
VCOM Left Feed-Back Output |
|
41 |
GMA 15 |
GAMMA VOLTAGE 15 |
|
|
|
|
|
|
|
|
|
17 |
VCOM_L |
VCOM Left Input |
|
42 |
GMA 14 |
GAMMA VOLTAGE 14 |
|
|
|
|
|
|
|
|
|
18 |
GND |
Ground |
|
43 |
GMA 12 |
GAMMA VOLTAGE 12 |
|
|
|
|
|
|
|
|
|
19 |
VDD |
Driver Power Supply Voltage |
|
44 |
GMA 10 |
GAMMA VOLTAGE 10 (Output From LCD) |
|
|
|
|
|
|
|
|
|
20 |
VDD |
Driver Power Supply Voltage |
|
45 |
GMA 1 |
GAMMA VOLTAGE 1 |
(Output From LCD) |
|
|
|
|
|
|
|
|
21 |
H_VDD |
Half Driver Power Supply Voltage |
|
46 |
GMA 4 |
GAMMA VOLTAGE 4 |
|
|
|
|
|
|
|
|
|
22 |
GND |
Ground |
|
47 |
GMA 5 |
GAMMA VOLTAGE 5 |
|
|
|
|
|
|
|
|
|
23 |
EPI3- |
EPI Receiver Signal(3-) |
|
48 |
GMA 7 |
GAMMA VOLTAGE 7 |
|
|
|
|
|
|
|
|
|
24 |
EPI3+ |
EPI Receiver Signal(3+) |
|
49 |
NC |
No Connection |
|
|
|
|
|
|
|
|
|
25 |
GND |
Ground |
|
50 |
GMA 9 |
GAMMA VOLTAGE 9 |
(Output From LCD) |
|
|
|
|
|
|
|
|
Note :
1. Please refer to application note for details. (GIP & Half VDD & Gamma Voltage setting)
Ver. 1.0 |
9 /40 |
|
|
LC320EUA
Product Specification
-LCD Connector (CN1): TF06L-50S-0.5SH (Manufactured by HRS) or Compatible
Table 3-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
|
|
No |
Symbol |
|
Description |
|
|
|
|
|
|
No |
|
Symbol |
|
|
|
|
|
|
Description |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1 |
GMA 9 |
GAMMA VOLTAGE 9 (Output From LCD) |
|
26 |
|
|
|
GND |
Ground |
|
|||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2 |
NC |
No Connection |
|
|
|
|
|
|
27 |
|
|
|
EPI1- |
EPI Receiver Signal(4-) |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
3 |
GMA 7 |
GAMMA VOLTAGE 7 |
|
|
|
|
|
|
28 |
|
|
|
EPI1+ |
EPI Receiver Signal(4+) |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
4 |
GMA 5 |
GAMMA VOLTAGE 5 |
|
|
|
|
|
|
29 |
|
|
|
GND |
Ground |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
5 |
GMA 4 |
GAMMA VOLTAGE 4 |
|
|
|
|
|
|
30 |
|
|
|
H_VDD |
Half Driver Power Supply Voltage |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
6 |
GMA 1 |
GAMMA VOLTAGE 1 (Output From LCD) |
|
31 |
|
|
|
VDD |
Driver Power Supply Voltage |
|
|||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
7 |
GMA 10 |
GAMMA VOLTAGE 10 (Output From LCD) |
|
32 |
|
|
|
VDD |
Driver Power Supply Voltage |
|
|||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
8 |
GMA 12 |
GAMMA VOLTAGE 12 |
|
|
|
|
|
|
33 |
|
|
|
GND |
Ground |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
9 |
GMA 14 |
GAMMA VOLTAGE 14 |
|
|
|
|
|
|
34 |
|
VCOM_R |
VCOM Right Input |
|
||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
10 |
GMA 15 |
GAMMA VOLTAGE 15 |
|
|
|
|
|
|
35 |
VCOM_R_FB |
VCOM Right Feed-Back Output |
|
|||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
11 |
NC |
No Connection |
|
|
|
|
|
|
36 |
GIP_Reset |
GIP Reset |
|
|||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
12 |
GMA 18 |
GAMMA VOLTAGE 18 (Output From LCD) |
|
37 |
|
|
|
VST |
VERTICAL START PULSE |
|
|||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
13 |
GND |
Ground |
|
|
|
|
|
|
38 |
|
|
|
VGL |
GATE Low Voltage |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
14 |
LOCKOUT6 |
LOCKOUT6 |
|
|
|
|
|
|
39 |
VGH_EVEN |
GIP Panel VDD for Even GATE TFT |
|
|||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
15 |
LOCKIN3 |
LOCKIN3 |
|
|
|
|
|
|
40 |
VGH_ODD |
GIP Panel VDD for Odd GATE TFT |
|
|||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
16 |
NC |
No Connection |
|
|
|
|
|
|
41 |
|
|
|
VGI_P |
GIP Bi-Scan (VGI_P = VGL) |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
17 |
VCC |
Logic & EPI Power Voltage |
|
|
|
|
|
|
42 |
|
|
|
VGI_N |
GIP Bi-Scan (VGI_N = VGH) |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
18 |
GND |
Ground |
|
|
|
|
|
|
43 |
|
|
|
GCLK6 |
GIP GATE Clock 6 |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
19 |
EPI6- |
EPI Receiver Signal(6-) |
|
|
|
|
|
|
44 |
|
|
|
GCLK5 |
GIP GATE Clock 5 |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
20 |
EPI6+ |
EPI Receiver Signal(6+) |
|
|
|
|
|
|
45 |
|
|
|
GCLK4 |
GIP GATE Clock 4 |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
21 |
GND |
Ground |
|
|
|
|
|
|
46 |
|
|
|
GCLK3 |
GIP GATE Clock 3 |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
22 |
GND |
Ground |
|
|
|
|
|
|
47 |
|
|
|
GCLK2 |
GIP GATE Clock 2 |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
23 |
EPI5- |
EPI Receiver Signal(5-) |
|
|
|
|
|
|
48 |
|
|
|
GCLK1 |
GIP GATE Clock 1 |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
24 |
EPI5+ |
EPI Receiver Signal(5+) |
|
|
|
|
|
|
49 |
|
|
|
NC |
No Connection |
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
25 |
GND |
Ground |
|
|
|
|
|
|
50 |
|
LTD_OUT |
LTD OUTPUT |
|
||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Note : 1. Please refer to application note for details. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||||||||||||
|
|
|
(GIP & Half VDD & Gamma Voltage setting) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||||||||||
|
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|
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|
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|
|
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|
|
|
|
|
|
|
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|
|
|
|
|
|
CN 2 |
|
|
|
|
|
|
|
|
|
|
|
|
CN 1 |
|
|
|
|
|
|
|
|
|
|
Source Right PCB |
|
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|
|
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|
|
|
|
Source Left PCB |
|
|||
|
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|
|||||
|
|
|
|
|
#1 #14 #15 |
|
#50 |
|
|
|
|
|
|
|
#1 |
|
|
|
|
#36 #50 |
|
|
|
|
|||||
|
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|
|||||||||
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LOCK6 LTD OUTPUT
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System (or Control) PCB |
To SOC ( or T-Con) |
LOCK3 |
||
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Ver. 1.0 |
10 /40 |
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LC320EUA
Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
:20022WR - H14B2(Yeonho)
-Mating Connector
:20022HS - 14B2 or compatible
Table 4-1. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No |
Symbol |
Description |
Note |
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1 |
VBL |
Power Supply +24.0V |
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2 |
VBL |
Power Supply +24.0V |
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3 |
VBL |
Power Supply +24.0V |
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4 |
VBL |
Power Supply +24.0V |
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5 |
VBL |
Power Supply +24.0V |
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6 |
GND |
Backlight Ground |
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7 |
GND |
Backlight Ground |
|
8 |
GND |
Backlight Ground |
1 |
9 |
GND |
Backlight Ground |
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10 |
GND |
Backlight Ground |
|
11 |
Status |
Back Light Status |
2 |
12 |
VON/OFF |
Backlight ON/OFF control |
4 |
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13 |
NC |
Don’t care |
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14 |
EXTVBR-B |
External PWM |
3 |
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Notes :1. GND should be connected to the LCD module’s metal frame.
2.Normal : Low (under 0.7V) / Abnormal : Open
3.High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )
4.Each impedance of pin #12 and 14 is over 50 [KΩ] .
Status
Rear view of LCM
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PCB |
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1 |
14 |
1 |
14 |
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… |
… |
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<Master> |
|
Ver. 1.0 |
11 /40 |
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LC320EUA
Product Specification
3-2-3. Local Dimming Interface
-Local Dimming Interface Connector : 12507WR-H08L(YEONHO Elec.)
-Mating Connector: 12507HS-08L(YEONHO Elec.)
Table 4-2. LOCAL DIMMING INTERFACE CONNECTOR PIN CONFIGULATION
Pin No |
Symbol |
Description |
Note |
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1 |
VSYNC |
Vertical Sync signal |
2 |
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2 |
N.C |
Don’t care |
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3 |
N.C |
Don’t care |
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4 |
SIN |
Local Dimming Serial Data (SPI) |
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5 |
GND |
Backlight Ground |
1 |
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6 |
SCLK |
Local Dim Serial Clock (SPI) |
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7 |
N.C |
Don’t care |
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8 |
N.C |
Don’t care |
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Notes : 1. GND should be connected to the LCD module’s metal frame.
2. Vertical Sync Freq. should be double of frame rate (Vf = 60Hz → Vsync 120Hz)
Rear view of LCM
|
PCB |
8 |
|
… |
… |
1 |
|
Ver. 1.0 |
12 /40 |
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