LG Electronics 42LS570S, 42LS570T, 42LS570T-ZB, 42LS575S, 42LS575T-ZD User Manual

...
0 (0)
Printed in KoreaP/NO : MFL67360908 (1202-REV00)
CHASSIS : LD22E
MODEL: 42LS570S/570T/575S/575T
MODEL:
42LS570S/570T-ZB 42LS575S/575T-ZD
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
SERVICE MANUAL
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
- 2 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SERVICING PRECAUTIONS .................................................................... 4
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 10
SCREW ASSEMBLY WORKING GUIDE ............................................. 18
BLOCK DIAGRAM .................................................................................. 19
EXPLODED VIEW .................................................................................. 20
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
- 3 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of th e cir cuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exp ose d metallic par t. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
IMPORTANT SAFETY NOTICE
SAFETY PRECAUTIONS
- 4 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board mod-
ule or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explo-
sion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specied otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a ammable mixture.
Unless specied otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test xtures specied in this
service manual.
CAUTION: Do not connect the test xture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged eas-
ily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some eld-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component dam-
age caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alter-
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or expo-
sure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classied as “anti-static” can generate
electrical charges sufcient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufcient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electri-
cally shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replace-
ment ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted oor can generate static electricity suf-
cient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder ows onto and around both the compo-
nent lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
- 5 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent at against the cir-
cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as pos-
sible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connec-
tions).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly con-
nected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
- 6 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This specification is applied to the LCD TV used LD22E
chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
ea ch drawing and s pe cificatio n b y p art number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
- Wireless : Wireless HD Specification (Option)
4. Model General Specification
No. Item Specication Remarks
1 Market EU(PAL Market-36Countries)
DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) : 30 countries
Germany, Netherland, Switzerland, Hungary, Austria,
Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia,
Luxemburg, Greece, Czech, Croatia, Turkey, Moroco, Ire-
land, Latvia, Estonia, Lithuania, Poland, Portugal, Romania,
Albania, Bosnia, Serbia, Slovakia, Beralus
DTV (MPEG2/4, DVB-T2) : 7 countries
UK, Sweden, Denmark, Finland, Norway, Ukraine, Kaza-
khstan, Ireland
DTV (MPEG2/4, DVB-C) : 37 countries
Germany, Netherland, Switzerland, Hungary, Austria,
Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia,
Luxemburg, Greece, Czech, Croatia, Turkey, Moroco, Ire-
land, Latvia, Estonia, Lithuania, Poland, Portugal, Romania,
Albania, Bosnia, Serbia, Slovakia, Beralus, UK, Sweden,
Denmark, Finland, Norway, Ukraine, Kazakhstan
DTV (MPEG2/4,DVB-S) : 30 countries
Germany, Netherland, Switzerland, Hungary, Austria,
Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia,
Luxemburg, Greece, Czech, Croatia, Turkey, Moroco, Ire-
land, Latvia, Estonia, Lithuania, Poland, Portugal, Romania,
Albania, Bosnia, Serbia, Slovakia, Beralus
Supported satellite : 22 satellites
HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102,
ATLANTIC BIRD 3, AMOS 2/3, THOR 5/6, IRIUS 4, EU-
TELSAT-W3A, EUROBIRD 9°, EUTELSAT-W2A, HOTBIRD
6/8/9, EUTELSAT-SESAT, ASTRA 1L/H/M/KR, ASTRA
3°/3B, BADR 4/6, ASTRA 2D, EUROBIRD 3, EUTELSAT-
W7, HELLASSAT 2, EXPRESS AM1, TURKSAT 2°/3°,
INTERSAT10
- 7 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No. Item Specication Remarks
2 Broadcasting system
1) PAL-BG
2) PAL-DK
3) PAL-I/I’
4) SECAM L/L’, DK, BG, I
5) DVB-T
6) DVB-C
7) DVB-T2
8) DVB-S
DVB-S: Satellite
3 Receiving system
Analog : Upper Heterodyne
Digital : COFDM, QAM
► DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-C
- Symbolrate :
4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S/S2
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
4 Scart Gender Jack (1EA) PAL, SECAM
Scart jack is Full scart and support MNT/DTV-OUT
(not support DTV Auto AV)
5 Video Input RCA(1EA) PAL, SECAM, NTSC
4 System : PAL, SECAM, NTSC, PAL60
AV gender jack 1EA
6 Head phone out
Antenna, AV1, AV2, Component,
RGB, HDMI1, HDMI2, HDMI3,
HDMI4, USB1, USB2, USB3
7 Component Input (1EA)
Y/Cb/Cr
Y/Pb/Pr
Component Gender 1EA
8 RGB Input RGB-PC Analog(D-SUB 15PIN)
9 HDMI Input (4EA)
HDMI1-DTV
HDMI2-DTV
HDMI3-DTV
HDMI4-DTV
HDMI4 : PC support(HDMI version 1.3)
Support HDCP
10 Audio Input (3EA)
RGB/DVI Audio
Component
AV
L/R Input
11 SPDIF out (1EA) SPDIF out
12 USB (3EA) EMF, DivX HD, For SVC (download) JPEG, MP3, DivX HD
13 Ethernet Connect(1EA) Ethernet Connect
- 8 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Component Video Input (Y, Cb/Pb, Cr/Pr)
6. RGB input (PC)
No. Resolution H-freq(kHz) V-freq(Hz) Porposed
1 720×480 15.73 60.00 SDTV, DVD 480i
2 720×480 15.63 59.94 SDTV, DVD 480i
3 720×480 31.47 59.94 480p
4 720×480 31.50 60.00 480p
5 720×576 15.625 50.00 SDTV, DVD 625 Line
6 720×576 31.25 50.00 HDTV 576p
7 1280×720 45.00 50.00 HDTV 720p
8 1280×720 44.96 59.94 HDTV 720p
9 1280×720 45.00 60.00 HDTV 720p
10 1920×1080 31.25 50.00 HDTV 1080i
11 1920×1080 33.75 60.00 HDTV 1080i
12 1920×1080 33.72 59.94 HDTV 1080i
13 1920×1080 56.250 50 HDTV 1080p
14 1920×1080 67.5 60 HDTV 1080p
No. Resolution H-freq(kHz) V-freq.(Hz) Proposed
1 640 x 350 @70Hz 31.468 70.09 EGA
2 720 x 400 @70Hz 31.469 70.08 DOS
3 640 x 480 @60Hz 31.469 59.94 VESA(VGA)
4 800 x 600 @60Hz 37.879 60.31 VESA(SVGA)
5 1024 x 768 @60Hz 48.363 60.00 VESA(XGA)
6 1152 x 864 @60Hz 54.348 60.053 VESA
7 1360 x 768 @60Hz 47.712 60.015 VESA(WXGA)
8 1920 x 1080 @60Hz 67.5 60.00 WUXGA(Reduced Blanking))
- 9 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7. HDMI Input
7.1. DTV mode
No. Resolution H-freq(kHz) V-freq.(kHz) Proposed
1. 640*480 31.469 / 31.5 59.94/60 SDTV 480P
2. 720*480 31.469 / 31.5 59.94 / 60 SDTV 480P
3. 720*576 31.25 50 SDTV 576P
4. 720*576 15.625 50 SDTV 576I
5. 1280*720 37.500 50 HDTV 720P
6. 1280*720 44.96 / 45 59.94 / 60 HDTV 720P
7. 1920*1080 33.72 / 33.75 59.94 / 60 HDTV 1080I
8. 1920*1080 28.125 50.00 HDTV 1080I
9. 1920*1080 26.97 / 27 23.97 / 24 HDTV 1080P
10. 1920*1080 25 HDTV 1080P
11. 1920*1080 33.716 / 33.75 29.976 / 30.00 HDTV 1080P
12. 1920*1080 56.250 50 HDTV 1080P
13. 1920*1080 67.43 / 67.5 59.94 / 60 HDTV 1080P
No. Resolution H-freq(kHz) V-freq.(Hz) Proposed
1 640 x 350 @70Hz 31.468 70.09 EGA
2 720 x 400 @70Hz 31.469 70.08 DOS
3 640 x 480 @60Hz 31.469 59.94 VESA(VGA)
4 800 x 600 @60Hz 37.879 60.31 VESA(SVGA)
5 1024 x 768 @60Hz 48.363 60.00 VESA(XGA)
6 1152 x 864 @60Hz 54.348 60.053 VESA
7 1280 x 1024 @60Hz 63.981 60.020 VESA(SXGA)
8 1360 x 768 @60Hz 47.712 60.015 VESA(WXGA)
9 1920 x 1080 @60Hz 67.5 60.00 WUXGA(Reduced Blanking))
7.2. PC mode
- 10 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LED LCD TV
with LD22E chassis.
2. Designation
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.
In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3. Automatic Adjustment
3.1. ADC Adjustment
3.1.1. Overview
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate RGB
deviation.
3.1.2. Equipment & Condition
(1) USB to RS-232C Jig
(2) MSPG-92 5 Series Pattern Generat or(MSPG-925FA,
pattern - 65)
- Resolution : 1080P Comp1
1920*1080 RGB
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7 ± 0.1 Vp-p
- Image
3.1.3. Adjustment
(1) Adjustment method
Don’t need to adjust ADC because there is data in OTP
and adjusted initially.
▪ Check ADC adjustment
1) Press In start key on the Adj. Remote Control, then
Adjust ADC(OTP) status is displayed on “1.Adjustment
check ”. Sele ct 2.A DC Data ”, then AD C data is
displayed.
2) Press Adj. key on the Adjustmetn Remote Control, and
select “9.ADC Calibration”. Set up the ADC Type to
OTP, then Select [Start] button by pressing Enter key,
Component and RGB are Writed and display Success
or NG.
(2) Adj. protocol
Ref.) ADC Adj. RS232C Protocol_Ver1.0
(3) Adj. order
- aa 00 00 [Enter ADC adj. mode]
- xb 00 04 [Change input source to Component1 (480i&
1080p)]
- ad 00 10 [Adjust 480i&1080p Comp1]
- xb 00 06 [Change input source to RGB(1024*768)]
- ad 00 10 [Adjust 1920*1080 RGB]
- ad 00 90 End adj.
Protocol Command Set ACK
Enter adj. mode aa 00 00 a 00 OK00x
Source change
xb 00 04 b 00 OK04x (Adjust 480i, 1080p Comp1 )
xb 00 06 b 00 OK06x (Adjust 1920*1080 RGB)
Begin adj. ad 00 10
Return adj. result
OKx (Case of Success)
NGx (Case of Fail)
Read adj. data
(main)
ad 00 20
(main)
000000000000000000000000007c007b006dx
(sub )
(Sub)
000000070000000000000000007c00830077x
ad 00 21
Conrm adj. ad 00 99
NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj. aa 00 90 a 00 OK90x
- 11 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
3.2. MAC address D/L, CI+ key D/L, Widevine
key D/L, ESN D/L
Connect: USB port
Communication Prot connection
▪ Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
▪ check the test process: DETECT -> MAC -> CI -> Widevine
-> ESN
▪. Play: START
▪. Result: Ready, Test, OK or NG
▪. Printer Out (MAC Address Label)
3.3. LAN
3.3.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
3.3.2. LAN inspection solution
▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
▪ Setting state confirmation
If automatic setting is finished, you confirm IP and MAC
Address.
3.3.3. WIDEVINE key Inspection
- Confirm key input data at the "IN START" MENU Mode.
3.4. LAN PORT INSPECTION(PING TEST)
Connect SET → LAN port == PC → LAN Port
3.4.1. Equipment setting
(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
3.4.2. LAN PORT inspection(PING TEST)
(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.
Play: Start
G
SET PC
- 12 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
3.5. Model name & Serial number Download
3.5.1. Model name & Serial number D/L
Press "Power on" key of service remote control.
(Baud rate : 115200 bps)
Connect RS232 Signal Cable to RS-232 Jack.
Write Serial number by use RS-232.
Must check the serial number at Instart menu.
3.5.2. Method & notice
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "5.Model Number D/L" like below photo.
3) Input the Factory model name(ex 47LM760S-ZB-A) or
Serial number like photo.
4) Check the model name Instart menu. Factory name
displayed. (ex 47LM760S-ZB)
5) Check the Diagnost ics.(DTV country only) Buyer
model displayed. (ex 47LM760S-ZB)
3.6. CI+ Key checking method
- Check the Section 3.2
Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).
=> Check the Download to CI+ Key value in LGset.
3.6.1. Check the method of CI+ Key value
(1) Check the method on Instart menu
(2) Check the method of RS232C Command
1) Into the main ass’y mode(RS232: aa 00 00)
2) Check the key download for transmitted command
(RS232: ci 00 10)
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
3.6.2. Check the method of CI+ key value(RS232)
1) Into the main ass’y mode(RS232: aa 00 00)
2) Check the mothed of CI+ key by command
(RS232: ci 00 20)
3) Result value
i 01 OK 1d1852d21c1ed5dcx
3.7. WIFI MAC ADDRESS CHECK
(1) Using RS232
(2) Check the menu on in-start.
CMD 1 CMD 2 Data 0
A A 0 0
CMD 1 CMD 2 Data 0
C I 1 0
CMD 1 CMD 2 Data 0
A A 0 0
CMD 1 CMD 2 Data 0
C I 2 0
CI+ Key Value
H-freq(kHz) V-freq.(Hz)
Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]
- 13 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4. Manual Adjustment
* ADC adjustment is not needed because of OTP(Auto ADC
adjustment)
4.1 EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download
4.1.1. Overview
It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of "Plug and Play".
4.1.2. Equipment
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
- Adjustment remote control
4.1.3. Download method
(1) Press "ADJ" key on the Adjustment remote control then
select "10.EDID D/L", By pressing "Enter" key, enter EDID
D/L menu.
(2) Select "Start" button by pressing "Enter" key, HDMI1/
HDMI2/ HDMI3/ HDMI4/ RGB are writing and display OK
or NG.
4.1.4. EDID DATA
(1) EDID DATA
▪ Reference
- HDMI1 ~ HDMI4 / RGB
- In the data of EDID, bellows may be different by S/W or
Input mode.
. Product ID
. Serial No: Controlled on production line.
. Month, Year: Controlled on production line:
ex) Week : '01' -> '01'
Year : '2012' -> '16' fix
. Model Name(Hex): LGTV
. Checksum: Changeable by total EDID data.
. Vendor Specific(HDMI)
For Analog For HDMI EDID
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
HEX EDID Table DDC Function
0001 01 00 Analog/Digital
Chassis MODEL NAME(HEX)
LD22E 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 80 2D
HDMI2 67 03 0C 00 20 00 80 2D
HDMI3 67 03 0C 00 30 00 80 2D
HDMI4 67 03 0C 00 40 00 80 2D
1 2 3
HDMI1 43 15 X
HDMI2 43 05 X
HDMI3 43 F5 X
HDMI4 43 E5 X
RGB X X 5C
- 14 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.2. White Balance Adjustment
4.2.1. Overview
▪ W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel's W/B deviation
(2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.
(3) Adjustment condition : normal temperature
1) Surrounding Temperature : 25 °C ± 5 °C
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
4.2.2. Equipment
(1) Color Analyzer: CA-210 (LED Module : CH 14)
(2) Adjustment Computer(During auto adj., RS-232C protocol
is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/204-Gray
(Model: 217, Pattern: 49)
-> Only when internal pattern is not available
▪ Color Analyzer Matrix should be calibrated using CS-100.
4.2.3. Equipment connection MAP
4.2.4. Adj. Command (Protocol)
<Command Format>
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
▪ RS-232C Command used during auto-adjustment.
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f → Gain adj. completed
*(wb 00 20(Start), wb 00 2f(end)) → Off-set adj.
wb 00 ff → End white balance auto-adj.
▪ Adj. Map
4.2.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using P-Only key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable.(RS-232C to USB)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
(2) Manual adjustment. method
1) Set TV in Adj. mode using P-Only key.
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10 cm of the surface.
3) Press ADJ key → EZ adjust using adj. R/C → 7. White-
Balance then press the cursor to the right(key ►).
(When right key(►) is pressed 216 Gray internal pattern
will be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adjustment is performed in COOL, MEDIUM, WARM 3
modes of color temperature.
If internal pattern is not available, use RF input. In EZ
Adj. menu 7.White Balance, you can select one of 2
Test-pattern: ON, OFF. Default is inner(ON). By selecting
OFF, you can adjust using RF signal in 216 Gray pattern.
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP
Co lor Anal yze r
Co mp ute r
Pattern Gen era to r
RS -232 C
RS- 232 C
RS- 232 C
Pro be
Sig nal Sou rce
* If TV internal pattern is used, not needed
RS-232C COMMAND
[CMD ID DATA]
Explantion
wb 00 00 Begin White Balance adjustment
wb 00 10 Gain adjustment(internal white pattern)
wb 00 1f Gain adjustment completed
wb 00 20 Offset adjustment(internal white pattern)
wb 00 2f Offset adjustment completed
wb 00 ff
End White Balance adjustment
(internal pattern disappears )
Adj. item
Command
(lower caseASCII)
Data Range
(Hex.)
Default
(Decimal)
CMD1 CMD2 MIN MAX
Cool
R Gain j g 00 C0
G Gain j h 00 C0
B Gain j i 00 C0
R Cut
G Cut
B Cut
Medium
R Gain j a 00 C0
G Gain j b 00 C0
B Gain j c 00 C0
R Cut
G Cut
B Cut
Warm
R Gain j d 00 C0
G Gain j e 00 C0
B Gain j f 00 C0
R Cut
G Cut
- 15 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
▪ Adjustment condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer(CA-210) probe should be within 10 cm
and perpendicular of the module surface.(80° ~ 100°)
3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
4.2.6. Reference(White balance adjusmtment coordinate
and color temperature)
▪ Luminance : 204 Gray
Standard color coordinate and temperature using CS-1000
(over 26 inch)
Standard color coordinate and temperature using CA-210(CH 14)
4.2.7. LED White balance table
- EDGE LED module change color coordinate because of
aging time.
- Apply under the color coordinate table, for compensated
aging time.
- ALEF(LS57 series)
4.3. EYE-Q function check
(1) Turn on TV.
(2) Press EYE key of Adjustment remote control.
(3) Cover the Eye Q II sensor on the front of the using your
hand and wait for 6 seconds.
(4) Confirm that R/G/B value is lower than 10 of the "Raw
Data (Sensor data, Back light)". If after 6 seconds, R/G/B
value is not lower than 10, replace Eye Q II sensor.
(5) Remove your hand from the Eye Q II sensor and wait for 6
seconds.
(6) Confirm that "ok" pop up. If change is not seen, replace
Eye Q II sensor.
4.4. Local Dimming Function Check
Step 1) Turn on TV.
Step 2) Press “TILT” key on the Adj. R/C.
Step 3) At the Local Dimming mode, module Edge Backlight
moving right to left Back light of IOP module moving.
Step 4) Confirm the Local Dimming mode.
Step 5) Press "exit" key.
4.5. Magic Motion Remote control test
(1) Equipment : RF Remote control for test, IR-KEY-Code
Remote control for test
(2) You must confirm the battery power of RF-Remote control
before test(recommend that change the battery per every lot)
(3) Sequence (test)
1) if you select the "Start(Wheel)" key on the Adjustment
remote control, you can pairing with the TV SET.
2) You can check the cursor on the TV Screen, when select
the "Wheel" key on the Adjustment remote control.
3) You must remove the pairing with the TV Set by select
"Mute" key on the Adjustment remote control
Mode
Coordinate
Temp ∆uv
x y
Cool 0.269 0.273 13000 K 0.0000
Medium 0.285 0.293 9300 K 0.0000
Warm 0.313 0.329 6500 K 0.0000
Mode
Coordinate
Temp ∆uv
x y
Cool 0.269 ± 0.002 0.273 ± 0.002 13000 K 0.0000
Medium 0.285 ± 0.002 0.293 ± 0.002 9300 K 0.0000
Warm 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000
GP4
Aging
time
(Min)
Cool Medium Warm
X y x y x y
269 273 285 293 313 329
1 0-2 280 287 296 307 320 337
2 3-5 279 285 295 305 319 335
3 6-9 277 284 293 304 317 334
4 10-19 276 283 292 303 316 333
5 20-35 274 280 290 300 314 330
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
8 80-119 270 274 286 294 310 324
9 Over 120 269 273 285 293 309 323
- 16 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.7. Wi-Fi Test
Step 1) Turn on TV
Step 2) Select Network Connection option in Network Menu.
Step 3) Select Start Connection button in Network Connection.
Step 4) If the system finds any AP like blow PIC, it is working
well.
4.8. LNB voltage and 22KHz tone check
(only for DVB-S/S2 model)
▪ Test method
(1) Set TV in Adj. mode using POWER ON.
(2) Connect cable between satellite ANT and test JIG.
(3) Press Yellow key(ETC+SWAP) in Adj Remote control to
make LNB on.
(4) Check LED light ‘ON’ at 18 V menu.
(5) Check LED light ‘ON’ at 22 KHz tone menu.
(6) Press Blue key(ETC+PIP INPUT) in Adj Remote control
to make LNB off.
(7) Check LED light ‘OFF’ at 18 V menu.
(8) Check LED light ‘OFF’ at 22 KHz tone menu.
▪ Test result
(1) After press LNB On key, ‘18 V LED’ and ‘22 KHz tone
LED’ should be ON.
(2) After press LNB OFF key, ‘18 V LED’ and ‘22 KHz tone
LED’ should be OFF.
4.9. Option selection per country
4.9.1. Overview
- Option selection is only done for models in Non-EU
4.9.2. Method
(1) Press ADJ key on the Adj. R/C, then select Country Group
Meun
(2) Depending on destination, select Country Group Code 04
or Country Group EU then on the lower Country option,
select US, CA, MX. Selection is done using +, - or ►◄
key.
4.10. Tool Option selection
Method : Press "ADJ" key on the Adjustment remote control,
then select Tool option.
4.11. Ship-out mode check(In-stop)
After final inspection, press "IN-STOP" key of the Adjustment
remote control and check that the unit goes to Stand-by mode.
- 17 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.12. GND and Internal Pressure check
4.12.1. Method
(1) GND & Internal Pressure auto-check preparation
- Check that Power cord is fully inserted to the SET.
(If loose, re-insert)
(2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
4.12.2. Checkpoint
▪ TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
▪ LEAKAGE CURRENT: At 0.5 mArms
5. Audio
Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
(3) RGB PC: 1 KHz sine wave signal 0.7 Vrms
6. USB S/W Download(Service only)
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(Download Version High & Power only mode, Set is
automatically Download)
(3) Show the message "Copying files from memory".
(4) Updating is starting.
(5) Updating Completed, The TV will restart automatically.
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
* After downloading, have to adjust Tool Option again.
(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)
No. Item Min Typ Max Unit Remark
1.
Audio practical
max Output, L/R
(Distortion=10%
max Output)
9 10 12 W EQ Off
AVL Off
Clear Voice Off
8.10 10.8 Vrms
2.
Speaker (8Ω
Impedance)
9 10 12 W
EQ Off
AVL Off
Clear Voice Off
- 18 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
■ Screw specification and application situation
<Warning>
Check Screw Type When Screw is assembled at 'A' Part. If 'C' Screw is used at the 'A'
part, Module will get damaged.
SCREW ASSEMBLY WORKING GUIDE
C
A
A
A
A
A
A
A
A
A
A
A
B
C
C
C
C
C
C
C
B
B
B
A
CC
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
BB
CC
CC
CC
CC
CC
CC
CC
BB
BB
BB
AA
ח ͷͲͳ
;ͽͳͼ;ΒΔΙΚΟΖ
ח ͶͲ
ח ͷͲͳ
;ͽͳͼ΅ΒΡΥΚΥΖ
ח ͶͲ
ח ͷͲͳ
;ͽͳͼ΅ΒΡΥΚΥΖ
ח ͶͲ
D
D
D
D
DD
DD
DD
DD
ח ͷͲͳ
;ͽͳͼ;ΒΔΙΚΟΖ
ͶͲ
- 19 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
L/R In
SPDIF OUT
USB
Audio
AMP
( STA)
I2S Out
MTK
jpG
jpG
P_TS
CVBS
P_TS
T/C Demod
IF(+/-)
USB1
RS-232C
PC-RGB
PC-AUDIO
OPTIC
LAN
SYSTEM
DDR3 X
1600 X
16
(2Gb)
HDMI1
HDMI2
HDMI3
Side
Rear
RGB,H/V
Ethernet
CVBS
UART
SYSTEM EEPROM X 1
(256Kb)
HDMI
MUX
(HDCP
EEPROM)
M-Remote
Module
Air/
Cable
TUNER
(T/C)
TUNER
(S2)
DIGITAL
DEMOD
(T/C)
DVB-S
ANALOG
DEMOD
DIGITAL
DEMOD
(S2)
TS_S/P
sui
USB2
USB3
HDMI4
eMMC X 1
(2GB)
USB_WIFI
SYSTEM
DDR3 X
1600 X 16
(2Gb)
DDR
CONTROLER A/B
SPI
LOCAL DIMMING
I2C
Sub Micom
(RENESASA)
IR
Remote Control
SYSTEM
DDR3 X
1600 X
16
(2Gb)
SYSTEM
DDR3 X
1600 X 16
(2Gb)
UART
P_TS
EPI
50P
50P
X_TAL
27MHz
BLOCK DIAGRAM
- 20 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A7
A2
A21
A5
A10
900
300
200
400
540
521
530
800
810
910
120
510
310
* Set + Stand
* Stand Base + Body
LV1
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essenti al that these special safet y parts shoul d be replac ed with the same compo nents as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_DATA[5]
CI_DATA[7]
MT5369_TS_OUT[2]
CI_DATA[2]
CI_DATA[4]
CI_ADDR[2]
CI_ADDR[10]
MT5369_TS_OUT[1]
CI_ADDR[13]
FE_TS_DATA[7]
CI_ADDR[5]
EMMC_DATA[7]
EMMC_DATA[6]
FE_TS_DATA[5]
CI_ADDR[8]
CI_DATA[0]
CI_ADDR[6]
CI_ADDR[1]
EMMC_DATA[4]
CI_ADDR[11]
CI_ADDR[12]
CI_DATA[1]
EMMC_DATA[2]
FE_TS_DATA[6]
FE_TS_DATA[0]
CI_ADDR[7]
FE_TS_DATA[4]
MT5369_TS_OUT[4]
CI_DATA[3]
EMMC_DATA[3]
EMMC_DATA[5]
FE_TS_DATA[3]
CI_ADDR[0]
MT5369_TS_OUT[7]
CI_ADDR[3]
CI_DATA[6]
FE_TS_DATA[1]
MT5369_TS_OUT[5]
MT5369_TS_OUT[0]
CI_ADDR[9]
CI_ADDR[14]
FE_TS_DATA[2]
MT5369_TS_OUT[3]
CI_ADDR[4]
MT5369_TS_OUT[6]
MODEL_OPT_2
JTRST#
FE_TS_SYNC
STB_SCL
USB_CTL3
SOC_RX
C116
0.1uF
R150
1K
MODEL_OPT_0
MT5369_TS_VAL
R147
1K
OPT
/CI_CD2
R155
10K
OPT
R166
2.7K
OPT
EMMC_CLK
R151
1K
OPT
MT5369_TS_SYNC
MT5369_TS_IN[1]
R165
4.7K
OSDA0
L/DIM0_MOSI
/USB_OCD3
R172
22
/PCM_CE1
OSDA1
+3.3V_NORMAL
MODEL_OPT_8
MODEL_OPT_6
R148
1K
JTMS
SOC_TX
CI_ADDR[0-14]
FE_TS_VAL
R167
4.7K
L/DIM0_VS
R103
4.7K
MT5369_TS_OUT[0-7]
MT5369_TS_IN[5]
EMMC_DATA[2-7]
R168
4.7K
OPT
R157
4.7K
OPT
R158
33
OPT
MODEL_OPT_1
CI_DATA[0-7]
JTDI
/PCM_IORD
MT5369_MISTRT
MODEL_OPT_1
CI_A_VS1
LED_PWM0
/PCM_REG
MT5369_XTAL_OUT
MT5369_MIVAL_ERR
I2C_SDA5
MT5369_XTAL_IN
AVDD_33SB
JTCLK
MODEL_OPT_5
A_DIM
FE_TS_CLK
USB_CTL2
MT5369_TS_IN[4]
SOC_RESET
/USB_OCD2
MT5369_MCLKI
/USB_OCD1
/PCM_OE
MT5369_TS_CLK
AVDD_33SB
PCM_RST
MODEL_OPT_3
MT5369_TS_IN[6]
USB_CTL1
MODEL_OPT_10
L/DIM0_SCLK
R153
1K
OPT
LED_PWM1
/PCM_IOWR
JTDO
C118
0.1uF
M_REMOTE_TX
OSCL0
VDD3V3
LED_PWM1
/PCM_WE
M_REMOTE_RX
R136 33
MT5369_TS_IN[0]
MODEL_OPT_5
MODEL_OPT_3
MT5369_TS_IN[2]
MT5369_TS_IN[3]
MODEL_OPT_0
+3.3V_NORMAL
ERROR_OUT
MT5369_TS_IN[7]
MODEL_OPT_6
+3.3V_NORMAL
IC104
AT24C256C-SSHL-T
NVRAM_ATMEL
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
FE_TS_DATA[0-7]
MODEL_OPT_9
R174
10K
OPCTRL3
/PCM_WAIT
EMMC_CLK
/PCM_IRQA
R169
10K
OPT
R171
22
R170
22
OSCL1
PWM_DIM2
R137 33
R161
4.7K
OPT
R178
4.7K
OPT
PWM_DIM1
/CI_CD1
LED_PWM0
M_RFModule_ISP
+3.3V_NORMAL
IR
R154
1K
C117
0.1uF
I2C_SCL5
+3.3V_NORMAL
STB_SDA
X100
27MHz
MT5369_XTAL_OUTMT5369_XTAL_IN
+3.3V_NORMAL
R143 33
MTK_JTAG
JTMS
+3.3V_NORMAL
R144
10K
R152
1K
MTK_JTAG
JTDO
JTRST#
JTCLK
JTDI
AR100
10K
R149
10K
MTK_JTAG
R146
10K
MTK_JTAG
R145
10K
MTK_JTAG
+3.3V_NORMAL
R139
2.7K
OSDA2
I2C_SDA2
R117 33
+3.3V_NORMAL
R115 33
I2C_SDA6
R188
2.7K
I2C_SCL4
I2C_SDA4
OSCL2
I2C_SCL5
R122 33
R160
2.7K
R116 33
I2C_SDA5
R142
2.7K
OSCL0
I2C_SCL2
STB_SDA
R111 33
R123 33
R134
2.7K
I2C_SDA1
I2C_SCL3
R114 33
R110 33
OSCL1
I2C_SCL6
I2C_SDA3
R113 33
R164
2.7K
OSDA1
R173
2.7K
R156
2.7K
R118 33
R185
2.7K
OSDA0
R177
2.7K
R112 33
I2C_SCL1
R121 33
STB_SCL
R176
10K
SC_ID_SOC
M_RFModule_RESET
R162
10K
R163
10K
/TU_RESET
RF_SWITCH_CTL
AV1_CVBS_DET
OPCTRL3
DSUB_DET
HP_DET
COMP1_DET
SC_DET
OPCTRL_1_SCL
OPCTRL_11_SCL
/S2_RESET
SMARTCARD_VCC
SMARTCARD_RST
SMARTCARD_DATA
SMARTCARD_CLK
SMARTCARD_DET
SMARTCARD_PWR_SEL
SMARTCARD_VCC
SMARTCARD_PWR_SEL
SMARTCARD_RST
SMARTCARD_CLK
SMARTCARD_DATA
SMARTCARD_DET
+3.3V_NORMAL
R140
4.7K
MTK_DVB_T2_TUNER
R106
4.7K
MTK_Int_FRC/URSA5
R135
4.7K
MTK_CP_BOX
R101
4.7K
MTK_FRC3/URSA5
R189
4.7K
MTK_EPI
R186
4.7K
MTK_DVB_C2_TUNER
R125
4.7K
MTK_OPTIC_Tx_IC
R130
4.7K
MTK_3D_DEPTH_IC
R108
4.7K
MTK_FHD
R175
4.7K
MTK_DVB_S_TUNER
R132
4.7K
MTK_DDR_768MB
R190
4.7K
MTK_NON_EPI
R127
4.7K
MTK_NON_OPTIC_Tx_IC
R133
4.7K
MTK_DDR_DEFAULT
R129
4.7K
MTK_NON_3D_DEPTH_IC
R141
4.7K
MTK_NON_DVB_T2_TUNER
R102
4.7K
MTK_NO_FRC/Int_FRC
R138
4.7K
MTK_NON_CP_BOX
R109
4.7K
MTK_HD
R187
4.7K
MTK_NON_DVB_C2_TUNER
R184
4.7K
MTK_NON_DVB_S_TUNER
R107
4.7K
MTK_NO_FRC/FRC3
EPI_LOCK6
OPCTRL_0_SDA
OPCTRL_10_SDA
OPCTRL_1_SCL
OPCTRL_11_SCL
OPCTRL_0_SDA
OPCTRL_10_SDA
C101
0.1uF
16V
R191 22
+3.3V_NORMAL
R192 22
I2C_SCL1
R181 4.7K
I2C_SDA1
+3.3V_NORMAL
MDS62110213
M100
MTK_H/S_3.5T
MDS62110213
M101
MTK_H/S_3.5T
MDS62110213
M102
MTK_H/S_3.5T
MDS62110213
M103
MTK_H/S_3.5T
+3.3V_NORMAL
R159 4.7K
P100
12507WS-12L
MTK_JTAG
1
2
3
4
5
6
7
8
9
10
11
12
13
C120
2.2uF
10V
OPT
R193
10K
NON_EU
OPC_EN
/S2_RESET
R128
1.2K
R131
1.2K
EMMC_DATA[0]
EMMC_DATA[1]
EMMC_CMD
R119
0
IC104-*1
M24256-BRMN6TP
NVRAM_ST
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
C115
24pF
C113
24pF
AMP_RESET_SOC AMP_RESET_N
R124
33
AMP_RESET_BY_SOC
AMP_RESET_SOC
IC105
LGE2112
MT5369_NON_RM
JTCK
AP14
JTDI
AM14
JTDO
AR14
JTMS
AR15
JTRST
AN14
OSDA0
AP12
OSCL0
AN12
OSDA1
AP15
OSCL1
AN15
XTALI
AT34
XTALO
AU34
AVDD33_XTAL_STB
AK27
AVSS33_XTAL_STB
AH26
AVDD33_VGA_STB
AK18
AVSS33_VGA_STB
AK17
AVDD33_PLLGP
AK23
AVSS33_PLLGP
AM27
AVDD10_LDO
AJ20
GPIO0
H32
GPIO1
F37
GPIO2
F36
GPIO3
G37
GPIO4
G36
GPIO5
G35
GPIO6
G34
GPIO7
H34
GPIO8
L34
GPIO9
L32
GPIO10
K33
GPIO11
K32
GPIO12
H33
GPIO13
L35
GPIO14
K36
GPIO15
J32
GPIO16
J34
GPIO17
K34
GPIO18
K35
GPIO19
K37
GPIO20
J36
GPIO21
J37
GPIO22
J35
GPIO23
J33
GPIO24
G33
GPIO25
H35
GPIO26
H31
GPIO27
F34
GPIO28
E36
GPIO29
N33
GPIO30
P32
GPIO31
M35
GPIO32
M37
GPIO33
M33
GPIO34
F35
GPIO35
E35
GPIO36
E37
GPIO37
N32
GPIO38
M34
GPIO39
M36
GPIO40
M32
GPIO41
L33
GPIO42
E33
GPIO43
E32
GPIO44
F32
GPIO45
A29
GPIO46
D31
GPIO47
C31
GPIO48
E30
GPIO49
E31
GPIO50
F31
GPIO51
E29
GPIO52
AP9
GPIO53
AT9
GPIO54
AR9
GPIO55
AU9
ADIN0_SRV
AN23
ADIN1_SRV
AN24
ADIN2_SRV
AP23
ADIN3_SRV
AR23
ADIN4_SRV
AU23
ADIN5_SRV
AT23
ADIN6_SRV
AM24
ADIN7_SRV
AM23
U0TX
AR18
U0RX
AP18
U1RX
AU16
U1TX
AT16
POWE
A35
POOE
C33
POCE1
B34
POCE0
D33
PDD7
D29
PDD6
C30
PDD5
D30
PDD4
B31
PDD3
A31
PDD2
B32
PDD1
A32
PDD0
C32
PARB
D32
PACLE
A34
PAALE
C34
EMMC_CLK
C29
OPWRSB
AM20
ORESET
AM22
OIRI
AU21
FSRC_WR
D27
STB_SCL
AT21
STB_SDA
AR21
DEMOD_RST
T34
DEMOD_TSCLK
T32
DEMOD_TSDATA0
T36
DEMOD_TSDATA1
U36
DEMOD_TSDATA2
T33
DEMOD_TSDATA3
T30
DEMOD_TSDATA4
V33
DEMOD_TSDATA5
V32
DEMOD_TSDATA6
V31
DEMOD_TSDATA7
V30
DEMOD_TSSYNC
T35
DEMOD_TSVAL
T31
CI_INT
N36
CI_TSCLK
T37
CI_TSDATA0
R35
CI_TSSYNC
R37
CI_TSVAL
R36
PVR_TSCLK
R34
PVR_TSVAL
R32
PVR_TSSYNC
R33
PVR_TSDATA0
P33
PVR_TSDATA1
P34
SPI_CLK1
N37
SPI_CLK
P35
SPI_DATA
N34
SPI_CLE
N35
OPWM2
AU12
OPWM1
AT12
OPWM0
AR12
SD_D0
A37
SD_D1
C35
SD_D2
A36
SD_D3
B35
SD_CMD
B36
SD_CLK
B37
LDM_CS
AT11
LDM_CLK
AU11
LDM_VSYNC
AR10
LDM_DO
AM9
LDM_DI
AP10
LED_PWM1
AN22
LED_PWM0
AP21
OPCTRL11
AU20
OPCTRL10
AT20
OPCTRL9
AN18
OPCTRL8
AP20
OPCTRL7
AM18
OPCTRL6
AN19
OPCTRL5
AP19
OPCTRL4
AR19
OPCTRL3
AN21
OPCTRL2
AM19
OPCTRL1
AN20
OPCTRL0
AR20
IC104-*2
R1EX24256BSAS0A
NVRAM_RENESAS
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
R100
10K
AMP_RESET_BY_SOC
C114
0.1uF
16V
C105
0.1uF
OPT
C106
0.1uF
OPT
C100
0.1uF
OPT
C103
0.1uF
OPT
C102
0.1uF
OPT
C104
0.1uF
OPT
R120
1K
PWM1_PULL_DOWN_1K
R126
1K
PWM2_PULL_DOWN_1K
MDS61887710
M104
MTK_H/S_9.5T
IC100
M24C16-R
HDCP_EEPROM_ST
3
NC_3
2
NC_2
4
VSS
1
NC_1
5
SDA
6
SCL
7
WC
8
VCC
IC100-*1
24LC16B
HDCP_EEPROM_MICRO
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
R105
4.7K
OPT
R104
4.7K
OPT
M_RFModule_ISP
C108
2.2uF
10V
C107
2.2uF
10V
IC105-*1
LGE2112-AL
MT5369_RM
DDRV_44
AC1
DDRV_45
AC2
DDRV_1
A3
DDRV_2
A4
DDRV_5
B4
DDRV_8
C4
DDRV_10
D4
DDRV_4
B3
DDRV_7
C3
DDRV_46
AC3
DDRV_47
AC4
MEMTP
G10
MEMTN
G9
RVREF_B
G13
RVREF_A
G21
ARCKE
F10
ARCLK1
D9
ARCLK1
C9
ARCLK0
A20
ARCLK0
A21
ARODT
E18
ARRAS
F17
ARCAS
E17
ARCS
E16
ARWE
D14
ARRESET
B14
ARBA0
A13
ARBA1
G11
ARBA2
D16
ARCSX
F18
ARA14
C15
ARA13
A15
ARA12
F13
ARA11
C14
ARA10
F11
ARA9
E15
ARA8
D13
ARA7
B15
ARA6
E14
ARA5
F16
ARA4
E13
ARA3
B13
ARA2
A14
ARA1
F14
ARA0
F15
ARDQM0
C19
ARDQS0
C21
ARDQS0
B21
ARDQ0
C23
ARDQ1
B17
ARDQ2
D23
ARDQ3
C17
ARDQ4
D24
ARDQ5
C16
ARDQ6
C24
ARDQ7
D15
ARDQM1
D21
ARDQS1
B20
ARDQS1
C20
ARDQ8
A17
ARDQ9
A23
ARDQ10
D17
ARDQ11
B23
ARDQ12
D20
ARDQ13
D22
ARDQ14
D19
ARDQ15
C22
ARDQM2
A7
ARDQS2
B9
ARDQS2
A9
ARDQ16
C12
ARDQ17
D6
ARDQ18
B12
ARDQ19
C5
ARDQ20
C13
ARDQ21
A5
ARDQ22
A12
ARDQ23
B5
ARDQM3
E10
ARDQS3
C8
ARDQS3
D8
ARDQ24
C6
ARDQ25
D10
ARDQ26
D7
ARDQ27
C11
ARDQ28
C7
ARDQ29
C10
ARDQ30
B7
ARDQ31
B10
AVDD33_MEMPLL
N14
AVSS33_MEMPLL
N15
DVSS_50
R1
DVSS_48
P21
8
MID_MAIN_1
2011.12.13
LG FRC2
3D DEPTH
T2 Tuner
MODEL OPTION 8 is just for CP Box
It should not be appiled at MP
NON_3D_Depth_IC
S Tuner
SoC
internal
FRC
SOC -> CI SLOT
NON_OPTIC
CI SLOT -> SOC
SOC -> CI SLOT
MODEL_OPT_9
OPTIC
1
MODEL_OPT_7
MODEL_OPT_3
Support
FHD
Write Protection
- Low : Normal Operation
- High : Write Protection
Disable
Reserved
DDR_768MB
EPI
Reserved
MODEL_OPT_2
DDR
MODEL_OPT_6
HIGH
MODEL_OPT_8
CI SLOT -> SOC
MODEL_OPT_0
Not Support
Default
1
Not Support
CP BOX
MODEL_OPT_5
0
0
CI SLOT -> SOC
Support
Enable
LOW
1
NO_FRC
NVRAM
Model Option
0
Close to eMMC Flash
(IC8100)
MODEL_OPT_10
0
CI SLOT -> SOC
HD
STRAPPING LED_PWM0 LED_PWM1 OPCTRL3
ICE mode + 27M + Serial boot 0 0 0
ICE mode + 27M + ROM to Nand boot 0 0 1
ICE mode + 27M + Rom to eMMC boot 0 1 0
from eMMC pins (share pins w/s NAND)
ICE mode + 27M + ROM to eMMC boot 0 1 1
from SDIO pins
DDR_Default
EXTERNAL DEMOD
-> SOC
MODEL_OPT_1
1
MODEL_OPT_4
3D_Depth_IC
X-TAL
JTAG
I2C
I2C_1 : AMP, L/DIMMING,HDCP KEY
I2C_2 : T-CON
I2C_3 : MICOM
I2C_4 : S/Demod,T2/Demod, LNB
I2C_5 : NVRAM
I2C_6 : TUNER_MOPLL(T/C,ATV)
FOR JAPAN
FOR JAPAN
HDCP EEPROM
Support
Not Support
HEAT SINK SMD GASKET
5V Tolerance
MODEL_OPT_4
MODEL_OPT_4
Crystal Matching Test result
: 27pF -> 20pF -> 24pF
IC
EAX6430790* : LD22* / LC22*
EAX6443420* : LT22* / LJ22* / LA22* / LB22*
MODEL_OPT_7
MODEL_OPT_7
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_ADDR[3]
CI_DATA[7]
CI_ADDR[4]
CI_DATA[2]
MT5369_TS_OUT[1]
CI_ADDR[7]
CI_ADDR[8]
CI_ADDR[10]
CI_ADDR[14]
CI_DATA[5]
MT5369_TS_OUT[6]
CI_DATA[6]
MT5369_TS_OUT[4]
CI_DATA[3]
CI_ADDR[12]
MT5369_TS_OUT[7]
CI_ADDR[0]
CI_ADDR[5]
MT5369_TS_OUT[2]
CI_ADDR[11]
MT5369_TS_OUT[5]
CI_DATA[0]
CI_ADDR[1]
CI_DATA[1]
CI_DATA[4]
CI_ADDR[13]
CI_ADDR[6]
MT5369_TS_OUT[0]
CI_ADDR[2]
MT5369_TS_OUT[3]
CI_ADDR[9]
C323
0.1uF
MT5369_TS_IN[0]
TP324
C343
100pF
50V
C3690.01uF
HDMI_HPD_3_JACK
TP337
AV1_R_IN_SOC
D0+_HDMI2_JACK
TXA4P
TP353
COMP1_Pr_SOC
R3791.2K
TP321
R358100
SCART_Rout_SOC
TP345
C355
0.047uF
T/C&AT&CHB
DTV/MNT_V_OUT_SOC
C3740.01uF
R323
22
TP378
C397
1200pF
C359 0.047uF
TP374
TXD1P
C398
1200pF
R330
75
1%
C382
0.1uF
C354
0.1uF
/PCM_WE
MT5369_TS_IN[5]
TP375
R311 30K
HP_LOUT_AMP
VDD3V3
TXCCLKP
HP_ROUT_AMP
MT5369_TS_IN[4]
HDMI_HPD_2_JACK
TP372
TXA0N
D2+_HDMI3_JACK
HP_ROUT_MAIN
TP326
C307
0.1uF
C336
1uF
10V
T/C&AT&CHB
R373
0
C384
10pF
50V
TXDCLKN
IF_AGC
C361 1uF
CK+_HDMI4_JACK
TXD0P
R3781.2K
VDD3V3
SC_R_SOC
R3521.2K
HP_OUT
D2-_HDMI3_JACK
TXC1P
PC_R_IN_SOC
C380
0.1uF
DSUB_VSYNC
TXD2N
TP322
TP307
TXB2P
C400
1200pF
TP350
PC_L_IN_SOC
+1.2V_MTK_AVDD
C3710.01uF
AV1_CVBS_IN_SOC
TXC1N
TP329
+1.2V_MTK_AVDD
R341 100
R309
100K
TXD0N
PC_R_IN
EPHY_TDP
C391
27pF
50V
OPT
TP311
R371 100
D2-_HDMI4_JACK
R310 30K
TP318
SCART_Rout_SOC
C386
27pF
50V
OPT
TXB1P
DSUB_HSYNC_SOC
AUD_LRCH
R300
470K
OPT
DDC_SDA_1_SOC
TP313
TXC2N
TP348
C332
0.22uF
10V
HP_OUT
C3660.01uF
TXC0P
SC_B_SOC
CK-_HDMI2_JACK
OSCL2
OSDA2
D1-_HDMI2_JACK
C302
0.1uF
R354
75
1%
DSUB_VSYNC_SOC
C392
27pF
50V
OPT
C395
1200pF
HP_OUT
DDC_SCL_4_JACK
R335 51
T/C&AT&CHB
TXDCLKP
TXA1P
EPHY_RDP
TP365
DAC_3V3
C385
27pF
50V
OPT
PC_L_IN_SOC
SCART_Lout_SOC
5V_HDMI_2_JACK
R368 100
AV1_L_IN_SOC
TP355
+1.2V_MTK_AVDD
C331
0.22uF
10V
HP_OUT
C383
1200pF
HP_OUT
TP300
D1+_HDMI3_JACK
R3701.2K
HP_OUT
SC_G_SOC
TP341
D0-_HDMI1_SOC
DDC_SCL_2_JACK
R343
24K
1%
VDD3V3
VDD3V3
SC_G_SOC
TP370
AV1_R_IN
C341
0.047uF
T/C&AT&CHB
TP308
C393
22pF
OPT
D0+_HDMI1_SOC
R367 100
C387
22pF
OPT
TXA4N
VDD3V3
R372
0
TP330
C308
0.1uF
TP351
TP366
/CI_CD1
C319
10uF
16V
R362100
TP360
TXD3P
D0+_HDMI4_JACK
TP334
MT5369_MISTRT
C3701500pF
R301
470K
OPT
D1+_HDMI1_SOC
D2+_HDMI2_JACK
C314
100pF
50V
OPT
COMP1_Pr_SOC
TXB1N
SC_L_IN_SOC
C340
47pF
50V
C364
0.1uF
ARC
TP317
SC_DET
C344
27pF
50V
OPT
TXA3N
C300
560pF
50V
OPT
SPDIF_OUT
TP359
C301
560pF
50V
OPT
D0-_HDMI4_JACK
C351
0.1uF
IF_P
TU_CVBS
WIFI_DM
TXD4N
R334 51
T/C&AT&CHB
R3500
R357100
TXA1N
TXACLKP
TXC0N
L303
BLM18PG121SN1D
HP_OUT
TUNER_SIF
TP338
/PCM_IRQA
MT5369_MIVAL_ERR
SC_R_SOC
TP320
DDC_SCL_3_JACK
R324
22
C316
0.1uF
TP373
R3511.2K
HP_OUT
MT5369_TS_IN[6]
MT5369_TS_IN[7]
C337 1uF
10V
T/C&AT&CHB
/PCM_REG
TP352
VDD3V3
HDMI_HPD_1_SOC
EPHY_RDN
WIFI_DP
C3720.01uF
C3730.01uF
R308
1.2K
OPT
R366 100
+1.2V_MTK_AVDD
TXA2P
C3670.01uF
D2-_HDMI2_JACK
DSUB_G+
R328
470K
OPT
TP314
DDC_SDA_2_JACK
D1+_HDMI4_JACK
+1.2V_MTK_AVDD
TP335
VDD3V3
C399
1200pF
L302
BLM18PG121SN1D
HP_OUT
D2+_HDMI1_SOC
R353
75
1%
AUDIO_R_OUT_COMMERCIAL
TP356
PCM_5V_CTL
TP336
R31524K
D1+_HDMI2_JACK
MT5369_TS_SYNC
TP328
R322
75
HP_ROUT
MT5369_MCLKI
TP310
R361100
MT5369_TS_VAL
C320
10uF
16V
TP342
CK+_HDMI3_JACK
RGB_DDC_SDA
TXB0N
C390
1200pF
HP_OUT
VDD3V3
R355
75
1%
AUD_LRCK
TP358
HP_LOUT_MAIN
TXC2P
TXB4P
C377
1200pF
HP_OUT
C3680.01uF
TP346
TXB4N
C329
5pF
50V
OPT
EPHY_TDN
TP312
AUD_MASTER_CLK
TXD2P
/PCM_IORD
MT5369_TS_CLK
TP343
TP362
TXACLKN
D2+_HDMI4_JACK
/PCM_CE1
COMP1_Pb_SOC
MT5369_TS_IN[2]
PC_L_IN
R321
75
MT5369_TS_IN[1]
R320
75
TP349
TXA2N
R307 1K
C394
27pF
50V
OPT
C304
0.1uF
DTV/MNT_V_OUT_SOC
R329
470K
OPT
TXCCLKN
TP319
SC_COM_SOC
HDMI_ARC
AV1_R_IN_SOC
R339
2.2K
OPT
AV1_CVBS_IN_SOC
C388
27pF
50V
OPT
HDMI_HPD_4_JACK
R3761.2K
CK-_HDMI4_JACK
D1-_HDMI4_JACK
TP347
CK-_HDMI3_JACK
D0+_HDMI3_JACK
TXB3P
SC_FB_SOC
COMP1_Y_SOC
D1-_HDMI1_SOC
TXB0P
R356100
5V_HDMI_4_JACK
C389
22pF
OPT
CK-_HDMI1_SOC
R374
0
COMP1_Pr
TP377
R3771.2K
C346
10uF
16V
C360 0.047uF
R305
1K
TP367
TP323
C363
1uF
25V
AV1_L_IN
/PCM_OE
TXD3N
C315
100pF
50V
OPT
R3691.2K
HP_OUT
5V_HDMI_3_JACK
TP331
SC_R_IN_SOC
R326
2K
OPT
SC_CVBS_IN_SOC
VDD3V3
C328
0.1uF
SC_COM_SOC
SC_ID_SOC
SC_L_IN_SOC
RGB_DDC_SCL
CK+_HDMI1_SOC
CI_DATA[0-7]
C330
5pF
50V
OPT
C358
0.01uF
50V
MT5369_TS_OUT[0-7]
TP316
D0-_HDMI2_JACK
C345
10uF
16V
CK+_HDMI2_JACK
DDC_SDA_4_JACK
ARC
COMP1_Pb
C303
0.1uF
AV1_CVBS_IN
C3751500pF
R340 100
TP339
SC_FB_SOC
IF_N
R342 10K
T/C&AT&CHB
SC_CVBS_IN_SOC
TXC4N
TP371
R359100
C379
10pF
50V
DDC_SDA_3_JACK
+1.2V_MTK_AVDD
TXA0P
DDC_SCL_1_SOC
DSUB_HSYNC
TXC4P
C378
10pF
50V
TP340
COMP1_Y_SOC
R332 10K
T/C&AT&CHB
C347
0.1uF
AUD_SCK
SC_R_IN_SOC
TP357
C338
560pF
50V
OPT
TP325
PCM_RST
D2-_HDMI1_SOC
D1-_HDMI3_JACK
/PCM_IOWR
SC_B_SOC
TP363
R306
1K
DSUB_VSYNC_SOC
SCART_Lout_SOC
R304
1K
TXC3P
CI_ADDR[0-14]
R303
82
TP315
TP309
TP332
AV1_L_IN_SOC
D0-_HDMI3_JACK
/PCM_WAIT
AUDIO_L_OUT_COMMERCIAL
R363100
5V_HDMI_1_SOC
TP368
TXBCLKN
TXBCLKP
COMP1_Y
TP344
TP361
R3490
OPT
HP_LOUT
CI_A_VS1
DSUB_R+
COMP1_Pb_SOC
/CI_CD2
TP327
TP364
TP369
TXA3P
TXB2N
TXB3N
C342
100pF
50V
TP333
MT5369_TS_IN[3]
C339
560pF
50V
OPT
R325
2K
OPT
R302
180
C352 0.01uF
TXC3N
PC_R_IN_SOC
DSUB_B+
R364100
DSUB_HSYNC_SOC
TXD4P
TP354
C396
33pF
OPT
+5V_NORMAL
TXD1N
C306
0.1uF
MODEL_OPT_10
2D/3D_CTL
MODEL_OPT_2
PCM_5V_CTL
EMMC_RST
MODEL_OPT_8
MODEL_OPT_9
VCOM_DYN
GST_SOC
MCLK_SOC
GCLK_SOC
EO_SOC
PMIC_RESET
C365
0.01uF
C305
1uF
25V
C362
0.1uF
C350
0.1uF
R314
0
R336
0
R331 0
T/C&AT&CHB
R346 0
T/C&AT&CHB
C309
OPT
C311 1uF
10V
C310
33pF
T/C&AT&CHB
C312
33pF
T/C&AT&CHB
C334
47pF
50V
C335
47pF
50V
C333
47pF
50V
USB_DP2
USB_DM2
USB_DP1
USB_DM1
USB_DM3
USB_DP3
IC105
LGE2112
HDMI_CEC
AA32
HDMI_0_SCL
AG33
HDMI_1_SCL
AE33
HDMI_2_SCL
AC33
HDMI_3_SCL
AH32
HDMI_0_SDA
AF33
HDMI_1_SDA
AD33
HDMI_2_SDA
AB33
HDMI_3_SDA
AH33
HDMI_0_PWR5V
AG31
HDMI_1_PWR5V
AE31
HDMI_2_PWR5V
AC31
HDMI_3_PWR5V
AH31
HDMI_0_HPD
AG32
HDMI_1_HPD
AE32
HDMI_2_HPD
AC32
HDMI_3_HPD
AJ32
AVDD12_HDMI_0_RX
AA24
AVDD12_HDMI_1_RX
Y24
AVDD12_HDMI_2_RX
W24
AVDD12_HDMI_3_RX
AB24
AVDD33_HDMI_0_RX
AB29
AVDD33_HDMI_1_RX
AA29
AVDD33_HDMI_2_RX
Y29
AVDD33_HDMI_3_RX
AC29
AVSS33_HDMI_RX_1
AB30
AVSS33_HDMI_RX_2
AD30
AVSS33_HDMI_RX_3
AF31
AVSS33_HDMI_RX_4
AF32
USB_DP_P0
C36
USB_DM_P0
C37
USB_DP_P1
D36
USB_DM_P1
D37
USB_DP_P2
AT13
USB_DM_P2
AU13
USB_DP_P3
AT14
USB_DM_P3
AU14
AVDD33_USB_P0P1
D35
AVDD33_USB_P2P3
AP13
AVSS33_USB_P1
D34
AVSS33_USB_P2
AR13
PCIE11_TXP
W35
PCIE11_TXN
W34
PCIE11_RXN
Y34
PCIE11_RXP
Y35
AVDD12_PCIE11
U24
AVDD33_PCIE11
V24
AVSS12_PCIE11
W30
PCIE11_REFCKN
W36
PCIE11_REFCKP
W37
HDMI_0_RX_0
AG35
HDMI_0_RX_0B
AG34
HDMI_0_RX_1
AG37
HDMI_0_RX_1B
AG36
HDMI_0_RX_2
AF35
HDMI_0_RX_2B
AF34
HDMI_0_RX_C
AH35
HDMI_0_RX_CB
AH34
HDMI_1_RX_0
AE37
HDMI_1_RX_0B
AE36
HDMI_1_RX_1
AD35
HDMI_1_RX_1B
AD34
HDMI_1_RX_2
AC35
HDMI_1_RX_2B
AC34
HDMI_1_RX_C
AE35
HDMI_1_RX_CB
AE34
HDMI_2_RX_0
AB35
HDMI_2_RX_0B
AB34
HDMI_2_RX_1
AA35
HDMI_2_RX_1B
AA34
HDMI_2_RX_2
AA37
HDMI_2_RX_2B
AA36
HDMI_2_RX_C
AC37
HDMI_2_RX_CB
AC36
HDMI_3_RX_0
AK35
HDMI_3_RX_0B
AK34
HDMI_3_RX_1
AJ35
HDMI_3_RX_1B
AJ34
HDMI_3_RX_2
AJ37
HDMI_3_RX_2B
AJ36
HDMI_3_RX_C
AJ33
HDMI_3_RX_CB
AK33
TXVP_0
AT18
TXVN_0
AU18
RXVN_1
AU17
RXVP_1
AT17
PHYLED1
AN16
PHYLED0
AM16
REXT
AD15
AVDD12_REC
AD14
AVDD33_COM
AD16
AVDD33_LD
AD17
AVSS33_LD
AL16
AVSS33_COM
AL15
AVSS12_REC
AL14
IC105
LGE2112
TCON0
F27
TCON1
E27
TCON2
F30
TCON3
F29
TCON4
B27
TCON5
A27
TCON6
B28
TCON7
A28
TCON8
C28
TCON9
D28
TCON10
E28
TCON11
F28
TCON12
B29
AVDD12_LVDS_1
AG6
AVDD12_LVDS_2
AJ6
AVDD12_VPLL
AF6
AVDD33_LVDSB
AE6
AVDD33_LVDSA
AH7
AVSS12_LVDS_2
AJ5
AVSS12_LVDS_1
AG5
AVSS12_VPLL
AF5
AVSS33_LVDSB
AE5
AVSS33_LVDSA
AH5
REXT_VPLL
AG7
AIN0_R_AADC
AU37
AIN0_L_AADC
AU35
AIN1_R_AADC
AT35
AIN1_L_AADC
AT37
AIN2_R_AADC
AU36
AIN2_L_AADC
AP34
AIN3_R_AADC
AT36
AIN3_L_AADC
AR37
AIN4_R_AADC
AR33
AIN4_L_AADC
AP32
AIN5_R_AADC
AR36
AIN5_L_AADC
AP37
AIN6_R_AADC
AR35
AIN6_L_AADC
AP36
AVDD33_AADC
AL31
AVSS33_AADC
AJ28
VMID_AADC
AJ27
MPXP
AN28
ADCINP_DEMOD
AU32
ADCINN_DEMOD
AT32
AVDD33_DEMOD
AD22
AVDD12_DEMOD
AL27
AVSS33_DEMOD
AM28
AVSS12_DEMOD
AJ26
IF_AGC
U35
RF_AGC
U34
LOUTN
AP31
LOUTP
AN30
OSCL2
V35
OSDA2
V34
SC0
AP28
SY0
AR29
CVBS3P
AT30
CVBS2P
AR30
CVBS1P
AR31
CVBS0P
AN29
CVBS_COM
AP30
AVDD33_CVBS_1
AK24
AVDD33_CVBS_2
AK25
AVSS33_CVBS_1
AL25
AVSS33_CVBS_2
AM26
AO3N
AG3
AO3P
AG4
AO4N
AG1
AO4P
AG2
AOCLKN
AF3
AOCLKP
AF4
AO2N
AE3
AO2P
AE4
AO1N
AE1
AO1P
AE2
AO0N
AD1
AO0P
AD2
AE4N
AL3
AE4P
AL4
AE3N
AL1
AE3P
AL2
AECLKN
AK3
AECLKP
AK4
AE2N
AJ3
AE2P
AJ4
AE1N
AJ1
AE1P
AJ2
AE0N
AH3
AE0P
AH4
BO4N
AT2
BO4P
AU2
BO3N
AT1
BO3P
AU1
BOCLKN
AR1
BOCLKP
AR2
BO2N
AP1
BO2P
AP2
BO1N
AN1
BO1P
AN2
BO0N
AM3
BO0P
AM4
BE4N
AT6
BE4P
AU6
BE3N
AP6
BE3P
AR6
BECLKN
AP5
BECLKP
AR5
BE2N
AT4
BE2P
AU4
BE1N
AP4
BE1P
AR4
BE0N
AP3
BE0P
AR3
AR0_ADAC
AN35
AL0_ADAC
AN34
AR1_ADAC
AM32
AL1_ADAC
AM34
AR2_ADAC
AM37
AL2_ADAC
AM33
AR3_ADAC
AM36
AL3_ADAC
AM35
AVDD33_DAC
AG30
AVDD33_DAC1
AF30
AVSS33_DAC
AK30
AVSS33_DAC1
AE30
ALIN
Y33
ASPDIF0
AR16
ASPDIF1
Y32
AOBCK
AR11
AOLRCK
AP11
AOMCLK
AM12
AOSDATA4
AM10
AOSDATA3
AM11
AOSDATA2
AN11
AOSDATA1
AN10
AOSDATA0
AN9
HSYNC
AN25
VSYNC
AM25
RP
AR25
GP
AR24
BP
AU24
COM
AP24
SOG
AT24
VGA_SDA
AR22
VGA_SCL
AP22
COM1
AT26
PB1P
AR26
PR1P
AP26
Y1P
AU26
SOY1
AP25
COM0
AU28
PB0P
AT28
PR0P
AR28
Y0P
AP27
SOY0
AR27
VDACX_OUT
AU30
VDACY_OUT
AP29
AVDD33_VDAC_BG
AD20
AVDD33_VDAC
AD21
AVDD12_RGB
AD19
AVSS33_VDAC_BG
AJ22
AVSS12_RGB
AJ21
AVSS33_VDAC
AL24
L301
BLM15BD121SN1
L300
BLM15BD121SN1
L304
BLM15BD121SN1
ZD304
5.48VTO5.76V
ZD305
5.48VTO5.76V
ZD306
5.48VTO5.76V
ZD307
5.48VTO5.76V
ZD302
5.48VTO5.76V
ZD300
5.48VTO5.76V
ZD303
5.48VTO5.76V
ZD301
5.48VTO5.76V
D300
5.5V
ADLC 5S 02 015
D302
5.5V
ADLC 5S 02 015
D301
5.5V
ADLC 5S 02 015
R344
30K
R345
30K
C348
100pF
50V
R338 0
R337 0
R333
120-ohm
9
MID_MAIN_2
2011.12.19
Close to MT5369
Place at JACK SIDE
1608 sizs For EMI
PLACE AT JACK SIDE
Close to Tuner
1.0Vpp
Close to Tuner
CHANGE SYMBOL
1608 sizs For EMI
1608 sizs For EMI
Don’t use as GPIO
FOR EMI
CH1
CH2
CH3
CH4
CH5
CH6
1608 sizs For EMI
1608 sizs For EMI
1608 sizs For EMI
1608 sizs For EMI
For PCB Pattern
For PCB Pattern
For PCB Pattern
For PCB Pattern
Close to MT5369
Port was changed !!!!
PLACE AT JACK SIDE
1608 sizs For EMI
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C532
0.1uF
+3.3V_NORMAL
POWER_ON/OFF1
C544
0.1uF
16V
C535
0.1uF
C503
10uF
C539
10uF
+1.2V_MTK_CORE
EMMC_VCCQ
C550
0.1uF
C525
10uF
+1.2V_MTK_CORE
C529
0.1uF
+1.2V_MTK_CORE
TP500
3.3V_EMMC
R500
1
C512
0.1uF
16V
C546
0.1uF
C540
10uF
10V
TP501
C543
0.1uF
L500
BLM18PG121SN1D
DAC_3V3
LAN_JACK_POWER
+3.3V_NORMAL
L504
BLM18PG121SN1D
+3.3V_NORMAL
VDD3V3
C548
0.1uF
C500
10uF
C510
0.1uF
+1.2V_MTK_CORE
VDD3V3
C522
0.1uF
16V
C526
10uF
10V
L506
BLM18PG121SN1D
+5V_NORMAL
C552
0.1uF
C553
0.1uF
VDD3V3
L501
BLM18PG121SN1D
C501
0.1uF
AVDD_33SB
L502
BLM18PG121SN1D
C502
0.1uF
+1.2V_MTK_CORE +1.2V_MTK_AVDD
C505
10uF
C506
10uF
+1.2V_MTK_CORE
+1.5V_DDR
IC501
AP1117E33G-13
OUT
INADJ/GND
C524
10uF
IC105
LGE2112
DVSS_51
R2
DVSS_52
R3
DVSS_37
J4
DVSS_53
R4
DVSS_107
Y4
DVSS_20
F5
DVSS_38
J5
DVSS_54
R5
DVSS_108
Y5
DVSS_95
W5
DVSS_44
L7
DVSS_46
M7
DVSS_56
R7
DVSS_120
AA5
DVSS_130
AB5
DVSS_43
K7
DVSS_77
U7
DVSS_97
W7
DVSS_13
E9
DVSS_12
E8
DVSS_22
F9
DVSS_28
G14
DVSS_39
J6
DVSS_57
R15
DVSS_68
T15
DVSS_78
U15
DVSS_87
V15
DVSS_99
W15
DVSS_112
Y15
DVSS_122
AA15
DVSS_132
AB15
DVSS_34
H11
DVSS_58
R16
DVSS_69
T16
DVSS_79
U16
DVSS_88
V16
DVSS_100
W16
DVSS_113
Y16
DVSS_123
AA16
DVSS_133
AB16
DVSS_59
R17
DVSS_70
T17
DVSS_80
U17
DVSS_89
V17
DVSS_114
Y17
DVSS_71
T18
DVSS_90
V18
DVSS_115
Y18
DVSS_72
T19
DVSS_91
V19
DVSS_116
Y19
DVSS_101
W17
DVSS_124
AA17
DVSS_134
AB17
DVSS_60
R18
DVSS_131
AB6
DVSS_35
H19
DVSS_36
H22
DVSS_40
J11
DVSS_41
J12
DVSS_42
J22
DVSS_55
R6
DVSS_62
R20
DVSS_73
T20
DVSS_83
U20
DVSS_92
V20
DVSS_104
W20
DVSS_117
Y20
DVSS_127
AA20
DVSS_137
AB20
DVSS_29
G16
DVSS_63
R21
DVSS_74
T21
DVSS_84
U21
DVSS_93
V21
DVSS_105
W21
DVSS_118
Y21
DVSS_128
AA21
DVSS_138
AB21
DVSS_64
R22
DVSS_75
T22
DVSS_85
U22
DVSS_94
V22
DVSS_106
W22
DVSS_119
Y22
DVSS_129
AA22
DVSS_139
AB22
DVSS_65
R23
DVSS_76
T23
DVSS_86
U23
DVSS_140
AB23
DVSS_96
W6
DVSS_30
G17
DVSS_27
F25
DVSS_109
Y6
DVSS_17
E21
DVSS_25
F21
DVSS_45
L8
DVSS_66
T7
DVSS_7
D11
DVSS_14
E11
DVSS_8
D12
DVSS_18
E22
DVSS_26
F22
DVSS_33
G25
DVSS_136
AB19
DVSS_126
AA19
DVSS_49
P22
DVSS_103
W19
DVSS_82
U19
DVSS_61
R19
DVSS_110
Y7
DVSS_135
AB18
DVSS_125
AA18
DVSS_102
W18
DVSS_81
U18
DVSS_121
AA7
DVSS_47
N22
DVSS_67
T8
DVSS_98
W8
DVSS_111
Y8
DVSS_11
E7
DVSS_21
F8
IC105
LGE2112
VCCK_43
AR7
VCCK_45
AT7
VCCK_47
AU7
VCCK_42
AP8
VCCK_44
AR8
VCCK_46
AT8
VCCK_48
AU8
VCCK_37
AM7
VCCK_39
AN7
VCCK_41
AP7
VCCK_38
AM8
VCCK_40
AN8
VCCK_1
P14
VCCK_9
R14
VCCK_11
T14
VCCK_13
U14
VCCK_14
V14
VCCK_16
W14
VCCK_18
Y14
VCCK_20
AA14
VCCK_22
AB14
VCCK_23
AC14
VCCK_28
AC19
VCCK_2
P15
VCCK_24
AC15
VCCK_3
P16
VCCK_25
AC16
VCCK_15
V23
VCCK_17
W23
VCCK_19
Y23
VCCK_21
AA23
VCCK_31
AC22
VCCK_32
AC23
VCCK_36
AD24
VCCK_8
P23
VCCK_10
R24
VCCK_12
T24
VCCK_33
AC24
VCCK_30
AC21
VCCK_7
P20
VCCK_29
AC20
VCCK_6
P19
VCCK_27
AC18
VCCK_5
P18
VCCK_26
AC17
VCCK_4
P17
VCCK_34
AD18
VCCK_35
AD23
VCC3IO_B_4
AL9
VCC3IO_B_2
AK10
VCC3IO_B_1
AK9
VCC3IO_B_3
AK11
VCC3IO_A_5
H29
VCC3IO_A_7
J29
VCC3IO_A_6
H30
VCC3IO_A_8
J30
VCC3IO_A_3
G31
VCC3IO_A_4
G32
VCC3IO_A_2
F33
VCC3IO_A_1
E34
MDS62110209
M501
SMD_GASKIT_8.5T_RGB
MDS62110209
M500
SMD_GASKIT_8.5T_LAN
MDS62110209
M502
SMD_GASKIT_8.5T_COMP
C545
0.1uF
+1.2V_MTK_CORE
C531
0.1uF
C537
0.1uF
+1.5V_DDR
C547
0.1uF
C533
0.1uF
C536
0.1uF
C520
0.1uF
C527
0.1uF
C514
0.1uF
C508
0.1uF
C523
0.1uF
MDS62110217
M504
SMD_GASKIT_12.5T_USB1
MDS62110217
M506
SMD_GASKIT_12.5T_HDMI1
MDS62110217
M503
SMD_GASKIT_12.5T_HDMI2
MDS62110217
M505
SMD_GASKIT_12.5T_USB3
C504
2.2uF
10
2011.12.09
MID_MAIN_3
60mA
5600mA
DECAP FOR SOC (HIDDEN - UCC) DECAP FOR SOC (BOTTOM)
SMD Gaskit
LAN RGB COMP
HDMI2~3HDMI1~2 USB1~2 USB3
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SC_FB_SOC
C605
10pF
EU
C614 0.01uF
EU
R610
51K
1/16W
1%
EU
R607
75
1%
EU
SC_FB
SC_B_SOC
C601
10pF
OPT
SC_L_IN_SOC
C606
10pF
EU
C613 0.01uF
EU
SC_R_IN
SC_CVBS_IN_IF
R615
75
1%
EU
SC_ID
R617 100
EU
SC_CVBS_IN
SC_G
C615 0.01uF
EU
SCART_Lout
SC_ID_SOC
SC_R_SOC
C604
10pF
EU
R604
75
1%
EU
R622 100
EU
R606
75
1%
EU
SC_CVBS_IN_SOC
C616 0.047uF
EU
R621 100
EU
R609
22
EU
SC_R_IN_SOC
R620 100
EU
R613
10K
EU
R616
75
1%
EU
SCART_Rout_SOC
SC_B
R601
470K
OPT
SC_R
SCART_Rout
R61815K
EU
DTV/MNT_V_OUT_SOC
R605
75
1%
EU
TU_CVBS
R608
75
1%
EU
C612 0.01uF
EU
SC_COM_SOC
SC_CVBS_IN_IF
SC_L_IN
SCART_Lout_SOC
R623 100
EU
DTV/MNT_V_OUT
SC_G_SOC
R61915K
EU
R602
470K
OPT
C610
10uF
16V
EU
C611
10uF
16V
EU
C603
330pF
50V
OPT
C602
330pF
50V
OPT
R600
EU
0
TP600
C600
220pF
OPT
C617
220pF
OPT
R627
330pF
50V
EU
R603
330pF
50V
EU
+12V
R630
100K
OPT
R631
100K
OPT
R628
100K
OPT
R629
100K
OPT
+12V
R632
EU
0
R633
EU
0
SCART_AMP_R_FB
SCART_AMP_L_FB
R612
EU
0
R634
EU
0
R614
0
1/16W
5%
EU
R624
0
1/16W
5%
EU
R625
30K
EU
R626
30K
EU
C608
100pF
50V
EU
C609
100pF
50V
EU
C607
100pF
EU
R611
EU
120-ohm
R635
10K
EU
R636
10K
EU
2011.12.30
11
MID_MAIN_SCART
PLACE AT MAIN SOC SIDE
PLACE AT JACK SIDE
READY FOR FILTER (EMI)
READY FOR FILTER (EMI)
READY FOR FILTER (EMI)
PLACE AT IC6000
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BRDQ[30]
BRDQ[18]
BRA[10]
ARDQ[30]
BRA[1]
BRDQ[22]
BRA[4]
ARDQ[22]
ARDQ[26]
ARA[11]
ARA[0]
BRA[12]
ARA[6]
BRA[10]
BRDQ[28]
BRA[7]
ARDQ[20]
BRA[6]
BRA[5]
BRA[9]
ARA[8]
ARA[5]
ARA[9]
ARA[6]
ARA[5]
ARA[0]
ARDQ[16]
BRA[8]
BRA[11]
ARDQ[28]
ARA[3]
BRA[7]
ARA[7]
ARA[5]
ARA[10]
ARA[11]
BRDQ[17]
BRA[1]
BRA[8]
BRA[14]
BRA[13]
ARA[7]
ARDQ[19]
BRA[2]
ARA[0]
ARA[2]
ARA[13]
BRA[5]
ARA[8]
BRA[3]
BRA[11]
BRA[12]
ARA[6]
BRDQ[26]
ARA[13]
ARA[9]
ARDQ[17]
BRDQ[23]
BRA[3]
ARA[1]
ARA[3]
BRA[0]
BRA[11]
ARA[12]
ARA[12]
BRA[12]
BRDQ[20]
ARDQ[31]
ARA[4]
BRDQ[31]
BRA[8]
ARA[12]
BRDQ[27]
BRDQ[19]
ARA[10]
ARA[4]
ARA[11]
ARA[2]
ARDQ[27]
ARA[4]
ARA[1]
BRA[0]
BRA[1]
BRA[9]
ARA[3]
ARA[7]
BRA[10]
BRA[2]
BRDQ[21]
BRA[4]
BRA[13]
ARDQ[21]
BRA[7]
ARDQ[29]
ARDQ[18]
BRDQ[25]
BRA[3]
ARA[8]
BRDQ[24]
ARA[9]
ARA[10]
BRDQ[29]
ARDQ[24]
BRA[13]
BRA[6]
ARDQ[25]
ARA[13]
BRA[5]
ARDQ[23]
BRA[2]
BRDQ[16]
BRA[0]
BRA[4]
ARA[2]
BRA[6]
ARA[1]
BRA[9]
ARA[14]
BRBA1
+1.5V_DDR
/ARCLK0
ARDQS3
R716
240
1%
ARDQ[24-31]
TP701
C725
0.1uF
ARDQM1
+1.5V_DDR
ARCKE
BRCLK1
/ARDQS0
R720
1K
1%
ARDQ[8-15]
+1.5V_DDR
BRDQM0
R714
100
5%
ARBA1
ARDQM3
BRDQS1
/ARDQS2
ARDQM2
R730
1K
1%
ARBA0
RVREF_D
A_RVREF1
R709
1K
1%
C720
0.1uF
BRDQ[24-31]
R724
1K
1%
C726
0.1uF
ARDQ[0-7]
ARDQ[16-23]
BRA[14]
R729
1K
1%
BRDQS2
R728
1K
1%
BRDQS3
RVREF_A
ARCLK1
B_RVREF6
BRA[14]
ARCLK0
ARA[0-13]
A_RVREF4
ARDQS1
B_RVREF7
ARBA1
R715
100
5%
ARODT
C719
0.1uF
R705
1K
1%
BRDQS3
C754
0.1uF
BRDQM3
BRDQ[0-7]
BRREST
BRA[0-14]
B_RVREF5
BRDQS0
B_RVREF6
+1.5V_DDR
TP700
ARDQM0
/ARCAS
C722
0.1uF
R706
1K
1%
ARBA2
RVREF_D
ARDQS3
BRDQ[16-23]
ARA[0-13]
/ARCAS
+1.5V_DDR
C753
0.1uF
/ARWE
/BRDQS2
ARDQM2
R711
240
1%
+1.5V_DDR
/BRCS
+1.5V_DDR
/BRRAS
+1.5V_DDR
RVREF_B
BRBA1
BRBA2
R732
1K
1%
/BRWE
/ARCLK0
R733
1K
1%
R713
100
5%
R721
1K
1%
R722
1K
1%
R726
1K
1%
+1.5V_DDR
+1.5V_DDR
+1.5V_DDR
/BRDQS0
+1.5V_DDR
ARBA1
BRDQM0
C751
0.1uF
C717
0.1uF
BRDQS0
BRDQM1
BRCLK1
ARDQ[8-15]
ARA[0-14]
BRA[0-13]
C745
0.1uF
ARDQS1
ARDQM0
R727
1K
1%
ARDQ[16-23]
BRBA2
ARREST
+1.5V_DDR
C757
0.1uF
/BRDQS1
BRBA0
/BRCAS
+1.5V_DDR
B_RVREF8
RVREF_C
/BRCS
/BRCLK0
BRBA0
BRCLK0
/ARCS
C752
0.1uF
/ARCS
/ARDQS0
+1.5V_DDR
B_RVREF5
BRDQM1
ARDQ[24-31]
+1.5V_DDR
BRBA0
/BRCLK0
/BRDQS1
BRDQ[24-31]
BRODT
ARREST
/ARWE
ARDQ[0-7]
+1.5V_DDR
/ARDQS3
/ARDQS1
/BRCLK1
/BRDQS3
ARBA2
BRA[0-13]
A_RVREF1
/ARWE
R717
240
1%
R712
100
5%
/ARCLK1
ARDQS2
A_RVREF3
ARCLK1
C723
0.1uF
BRDQM3
ARDQS0
ARDQM1
AVDD3V3_MEMPLL
RVREF_C
C755
0.1uF
C727
0.1uF
+1.5V_DDR
BRDQ[0-7]
+1.5V_DDR
R723
1K
1%
BRREST
ARBA2
A_RVREF2
R707
1K
1%
C721
0.1uF
R718
1K
1%
/BRCS
/BRRAS
C724
0.1uF
/ARCLK1
/BRCAS
ARCKE
R731
1K
1%
BRREST
ARCKE
RVREF_B
+1.5V_DDR
B_RVREF8
BRDQ[16-23]
B_RVREF7
ARODT
R725
1K
1%
/ARDQS2
R704
1K
1%
/ARRAS
BRODT
BRCKE
BRODT
ARBA0
ARCLK0
C756
0.1uF
BRDQ[8-15]
/ARCAS
ARDQM3
BRCKE
ARBA0
+1.5V_DDR
BRDQS1
/BRDQS0
/ARRAS
/BRWE
RVREF_A
ARDQS0
/ARDQS1
R719
1K
1%
+1.5V_DDR
C718
0.1uF
BRDQS2
C728
0.1uF
R710
240
1%
/BRWE
/BRCLK1
0.1uF
C758
BRBA1
BRDQM2
BRCKE
A_RVREF3
/ARDQS3
/ARRAS
A_RVREF2
ARA[14]
/BRCAS
ARDQS2
ARA[14]
BRCLK0
BRDQ[8-15]
R708
1K
1%
/BRDQS2
R703
1K
1%
C750
0.1uF
/BRDQS3
BRBA2
R702
1K
1%
A_RVREF4
+1.5V_DDR
ARREST
BRDQM2
ARODT
/BRRAS
/ARCS
+3.3V_NORMAL
L700
BLM18PG121SN1D
AVDD3V3_MEMPLL
C700
0.1uF
C701
10uF
10V
C704
10uF
10V
C707
10uF
10V
C708
10uF
10V
1uF
C706
1uF
C705
1uF
C703
1uF
C702
H5TQ2G63BFR-PBC
IC703
DDR_HYNIX
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
H5TQ2G63BFR-PBC
IC701
DDR_HYNIX
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
H5TQ2G63BFR-PBC
IC704
DDR_HYNIX
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
H5TQ2G63BFR-PBC
IC702
DDR_HYNIX
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
NT5CB128M16BP-DI
IC701-*1
DDR_NANYA
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12
N7
NC_6
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_7
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
NT5CB128M16BP-DI
IC703-*1
DDR_NANYA
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12
N7
NC_6
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_7
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
NT5CB128M16BP-DI
IC704-*1
DDR_NANYA
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12
N7
NC_6
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_7
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
NT5CB128M16BP-DI
IC702-*1
DDR_NANYA
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12
N7
NC_6
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_7
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
C716
0.1uF
C714
0.1uF
C715
0.1uF
C713
0.1uF
C711
0.1uF
C712
0.1uF
C710
0.1uF
C709
0.1uF
C736
0.1uF
C735
0.1uF
C734
0.1uF
C733
0.1uF
C737
0.1uF
C739
0.1uF
C740
0.1uF
C738
0.1uF
C742
0.1uF
C744
0.1uF
C743
0.1uF
C741
0.1uF
C749
0.1uF
C747
0.1uF
C748
0.1uF
C746
0.1uF
IC105
LGE2112
DDRV_44
AC1
DDRV_45
AC2
DDRV_1
A3
DDRV_2
A4
DDRV_5
B4
DDRV_8
C4
DDRV_10
D4
DDRV_4
B3
DDRV_7
C3
DDRV_46
AC3
DDRV_47
AC4
MEMTP
G10
MEMTN
G9
RVREF_B
G13
RVREF_A
G21
ARCKE
F10
ARCLK1
D9
ARCLK1
C9
ARCLK0
A20
ARCLK0
A21
ARODT
E18
ARRAS
F17
ARCAS
E17
ARCS
E16
ARWE
D14
ARRESET
B14
ARBA0
A13
ARBA1
G11
ARBA2
D16
ARCSX
F18
ARA14
C15
ARA13
A15
ARA12
F13
ARA11
C14
ARA10
F11
ARA9
E15
ARA8
D13
ARA7
B15
ARA6
E14
ARA5
F16
ARA4
E13
ARA3
B13
ARA2
A14
ARA1
F14
ARA0
F15
ARDQM0
C19
ARDQS0
C21
ARDQS0
B21
ARDQ0
C23
ARDQ1
B17
ARDQ2
D23
ARDQ3
C17
ARDQ4
D24
ARDQ5
C16
ARDQ6
C24
ARDQ7
D15
ARDQM1
D21
ARDQS1
B20
ARDQS1
C20
ARDQ8
A17
ARDQ9
A23
ARDQ10
D17
ARDQ11
B23
ARDQ12
D20
ARDQ13
D22
ARDQ14
D19
ARDQ15
C22
ARDQM2
A7
ARDQS2
B9
ARDQS2
A9
ARDQ16
C12
ARDQ17
D6
ARDQ18
B12
ARDQ19
C5
ARDQ20
C13
ARDQ21
A5
ARDQ22
A12
ARDQ23
B5
ARDQM3
E10
ARDQS3
C8
ARDQS3
D8
ARDQ24
C6
ARDQ25
D10
ARDQ26
D7
ARDQ27
C11
ARDQ28
C7
ARDQ29
C10
ARDQ30
B7
ARDQ31
B10
AVDD33_MEMPLL
N14
AVSS33_MEMPLL
N15
DVSS_50
R1
DVSS_48
P21
IC105
LGE2112
RVREF_C
P13
RVREF_D
V7
BRCLK0
F4
BRCLK0
F3
BRCLK1
V4
BRCLK1
V3
BRCKE
P6
BRODT
H6
BRRAS
H4
BRCAS
H5
BRCS
K3
BRBA0
N1
BRBA1
P5
BRBA2
K4
BRWE
L4
BRA14
L5
BRA13
M4
BRA12
N5
BRA11
M5
BRA10
P4
BRA9
M3
BRA8
L6
BRA7
L3
BRA6
N4
BRA5
K5
BRA4
N6
BRA3
N2
BRA2
M1
BRA1
N3
BRA0
K6
BRCSX
G5
DDRV_11
D5
DDRV_13
E5
DDRV_38
T5
DDRV_42
V5
DDRV_40
U5
DDRV_14
E6
DDRV_18
F6
DDRV_23
G6
DDRV_41
U6
DDRV_39
T6
DDRV_48
AC5
DDRV_19
F7
DDRV_24
G7
DDRV_49
AC6
DDRV_36
N7
DDRV_37
P7
DDRV_43
V6
DDRV_35
J10
DDRV_32
H10
DDRV_33
H13
DDRV_15
E20
DDRV_20
F20
DDRV_27
G20
DDRV_25
G15
DDRV_26
G18
DDRV_12
D25
DDRV_9
C25
DDRV_6
B25
DDRV_3
A25
DDRV_30
H7
DDRV_31
H8
DDRV_34
J8
BRDQM0
G2
BRDQS0
E4
BRDQS0
E3
BRDQ0
A1
BRDQ1
J1
BRDQ2
B2
BRDQ3
J2
BRDQ4
C2
BRDQ5
K1
BRDQ6
A2
BRDQ7
K2
BRDQM1
D1
BRDQS1
F1
BRDQS1
F2
BRDQ8
J3
BRDQ9
B1
BRDQ10
H3
BRDQ11
D3
BRDQ12
G3
BRDQ13
C1
BRDQ14
G4
BRDQ15
D2
BRDQM2
Y1
BRDQS2
V2
BRDQS2
V1
BRDQ16
T4
BRDQ17
AB4
BRDQ18
P2
BRDQ19
AB3
BRDQ20
P3
BRDQ21
AB1
BRDQ22
P1
BRDQ23
AB2
BRDQM3
U1
BRDQS3
W3
BRDQS3
W4
BRDQ24
AA3
BRDQ25
U4
BRDQ26
AA4
BRDQ27
T3
BRDQ28
Y3
BRDQ29
U3
BRDQ30
Y2
BRDQ31
U2
BRRESET
M2
DDRV_16
E23
DDRV_22
F24
DDRV_29
G24
DDRV_21
F23
DDRV_28
G23
DDRV_17
E24
DVSS_15
E12
DVSS_23
F12
DVSS_1
A18
DVSS_3
B18
DVSS_5
C18
DVSS_9
D18
DVSS_16
E19
DVSS_24
F19
DVSS_31
G19
DVSS_32
G22
DVSS_19
E25
DVSS_2
A26
DVSS_4
B26
DVSS_6
C26
DVSS_10
D26
K4B2G1646C-HCK0
IC701-*2
DDR_SS
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
K4B2G1646C-HCK0
IC703-*2
DDR_SS
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
K4B2G1646C-HCK0
IC704-*2
DDR_SS
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
K4B2G1646C-HCK0
IC702-*2
DDR_SS
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
DDR ONE SIDE 12
2011.12.09
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MT5369_TS_IN[5]
CI_TS_DATA[5]
MT5369_TS_IN[3]
CI_TS_DATA[6]
CI_TS_DATA[1]
MT5369_TS_IN[2]
CI_TS_DATA[2]
CI_TS_DATA[3]
MT5369_TS_IN[0]
MT5369_TS_IN[4]
MT5369_TS_IN[1]
CI_TS_DATA[0]
CI_TS_DATA[7]
MT5369_TS_IN[7]
MT5369_TS_IN[6]
CI_TS_DATA[4]
CI_MDI[1]
CI_MDI[0]MT5369_TS_OUT[0]
MT5369_TS_OUT[1]
MT5369_TS_OUT[2]
MT5369_TS_OUT[3] CI_MDI[3]
CI_MDI[2]
MT5369_TS_OUT[4]
MT5369_TS_OUT[5]
MT5369_TS_OUT[6]
MT5369_TS_OUT[7] CI_MDI[7]
CI_MDI[6]
CI_MDI[5]
CI_MDI[4]
CI_A_DATA[0]
CI_MDI[6]
CI_MDI[3]
CI_MDI[7]
CI_MDI[5]
CI_MDI[2]
CI_MDI[4]
CI_MDI[1]
CI_MDI[0]
CI_A_DATA[2]
CI_A_DATA[1]
CI_A_DATA[6]
CI_A_DATA[7]
CI_A_DATA[5]
CI_A_DATA[3]
CI_A_DATA[4]
CI_A_DATA[0]
CI_A_DATA[1]
CI_A_DATA[2]
CI_A_DATA[3]
CI_A_DATA[4]
CI_A_DATA[5]
CI_A_DATA[6]
CI_A_DATA[7] CI_DATA[7]
CI_DATA[6]
CI_DATA[5]
CI_DATA[4]
CI_DATA[3]
CI_DATA[2]
CI_DATA[1]
CI_DATA[0]
CI_A_ADDR[0]
CI_A_ADDR[1]
CI_A_ADDR[2]
CI_A_ADDR[3]
CI_A_ADDR[4]
CI_A_ADDR[5]
CI_A_ADDR[6]
CI_A_ADDR[7]
CI_A_ADDR[8]
CI_A_ADDR[9]
CI_A_ADDR[10]
CI_A_ADDR[11]
CI_A_ADDR[12]
CI_A_ADDR[13]
CI_A_ADDR[14] CI_ADDR[14]
CI_ADDR[13]
CI_ADDR[12]
CI_ADDR[11]
CI_ADDR[10]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
MT5369_TS_OUT[0-7]
MT5369_TS_CLK
R908
47
CI_IN_TS_CLK
C902
12pF
50V
OPT
MT5369_MCLKI
CI_IN_TS_SYNC
CI_TS_CLK
MT5369_MISTRT
R917
47
CI
AR901 47
CI
MT5369_MIVAL_ERR
CI_MDI[0-7]
CI_IN_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0-7]
R916
47
CI
MT5369_TS_VAL
R907
47
AR900 47
CI
CI_TS_VAL
R915
47
CI
MT5369_TS_SYNC
MT5369_TS_IN[0-7]
R909
47
C900
12pF
50V
OPT
AR902
47
CI
AR903
47
CI
CI_A_ADDR[8]
/PCM_IOWR
CI_TS_CLK
R929
10K
CI
CI_IN_TS_SYNC
CI_A_ADDR[7]
+5V_CI_ON
CI_A_ADDR[2]
CI_A_ADDR[10]
/PCM_OE
R912 22
/CI_CD2
R923
10K
OPT
CI_TS_DATA[0]
/CI_CD1
PCM_RST
R938
0
OPT
CI_A_ADDR[0]
C905
10uF
10V
CI
R925
0
C904
0.1uF
CI
R940 22
CI
/CI_CD1
R922
22
CI
PCM_INPACK
/PCM_CE1
R936
10K
CI
CI_A_ADDR[5]
R928 100
CI
CI_A_ADDR[14]
CI_TS_DATA[1]
R921
22
CI
R924
10K
OPT
CI_A_DATA[0-7]
R941 22
C907
0.1uF
16V
CI
/CI_CD2
CI_MDI[0-7]
CI_VS1
/PCM_IORD
CI_A_ADDR[11]
+5V_CI_ON
+3.3V_NORMAL
R934
10K
OPT
/PCM_CE1
/PCM_IOWR
CI_IN_TS_VAL
CI_IN_TS_CLK
/PCM_WE
R920
22
OPT
CI_TS_DATA[3]
/PCM_WE
CI_A_ADDR[6]
CI_TS_SYNC
R942 22
CI_TS_DATA[2]
+5V_CI_ON
R910
10K
CI
CI_TS_DATA[4]
R911 22
R933
10K
OPT
R927
100
CI
R932 22
OPT
CI_TS_DATA[5]
PCM_RST
CI_TS_VAL
R926
0
OPT
C906 0.1uF
CI
CI_A_ADDR[9]
R939 22
CI
CI_A_ADDR[1]
/PCM_CE2
R937
10K
OPT
/PCM_IORD
CI_A_ADDR[4]
CI_A_ADDR[13]
/PCM_OE
/PCM_IRQA
CI_A_ADDR[3]
R914
10K
CI
/PCM_A_REG
CI_A_ADDR[12]
+3.3V_NORMAL
CI_TS_DATA[7]
R935
10K
CI
/PCM_WAIT
R93122
OPT
R906
10K
OPT
CI_TS_DATA[6]
CI_DATA[0-7]
CI_A_DATA[0-7]
CI_A_ADDR[0-14]
CI_ADDR[0-14]
/PCM_WAIT
PCM_INPACK
/PCM_IRQA
CI_VS1
/PCM_REG
/PCM_CE2
/PCM_A_REG /PCM_REG
CI_A_VS1
CI_VS1
AR906 0
CI
AR907 0
CI
AR904 0
CI
AR908 0
CI
AR905 0
CI
AR909 0
CI
R919
47K
CI
R930
47K
CI
R918
47K
CI
R913
47K
CI
JK900
10118309-015LF
CI
G1G2
57
TS_OUT_CLK
21
ADDR12
52
VPP
16
/IRQA
10
ADDR11
47
TS_IN0
41
TS_OUT7
5
DAT6
36
/CI_DET1
59
CI_WAIT
23
ADDR6
45
IOWR
54
TS_IN5
18
VPP
49
TS_IN2
43
VS1
13
ADDR13
7
/CARD_EN1
38
TS_OUT4
2
DAT3
25
ADDR4
56
TS_IN7
20
TS_IN_CLK
51
VCC
15
/WR_EN
9
/O_EN
46
TS_IN_SYN
40
TS_OUT6
4
DAT5
35
GND
58
CI_RESET
22
ADDR7
53
TS_IN4
17
VCC
11
ADDR10
48
TS_IN1
42
CARD_EN2
12
ADDR8
6
DAT6
37
TS_OUT3
1
GND
24
ADDR5
55
TS_IN6
19
TS_IN_VAL
50
TS_IN3
44
IORD
14
ADDR14
8
ADDR10
39
TS_OUT5
3
DAT4
26
ADDR3
60
INPACK
27
ADDR2
61
REG
28
ADDR1
62
TS_OUT_VAL
29
ADDR0
63
TS_OUT_SYN
30
DAT0
64
TS_OUT0
31
DAT1
32
DAT2
33
/IO_BIT
34
GND
65
TS_OUT1
66
TS_OUT2
67
/CI_DET2
68
GND
69
R900
10K
OPT
13
2011.11.21
MID_MAIN_CI
Close to CI Slot
CI TS INPUT
Close to MT5369
Close to MT5369
Close to CI Slot
Close to CI Slot
CI TS OUTPUT
Close to MT5369
CI DETECT
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THERMAL
THERMAL
THERMAL
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C2432
0.01uF
50V
L2407
BLM18PG121SN1D
+1.5V_DDR
+5V_NORMAL
C2415
10uF
16V
R2432
330K1/16W 5%
Q2406
MMBT3904(NXP)
E
B
C
+3.5V_ST
L2412
BLM18PG121SN1D
NON_CN
C2401
0.1uF
50V
L2405
BLM18PG121SN1D
C2422
0.01uF
50V
C2416
100pF
50V
C2406
0.1uF
16V
C2418
10uF
10V
R2433
56K
1/16W
1%
L2408
BLM18SG121TN1D
+24V
C2417
1uF
10V
R2431
15K
1/16W 5%
R2425
100
Q2407
AO3407A
G
D
S
C2412
0.1uF
16V
P2401
SMAW200-H24S2
19
12V
14
GND
9
3.5V
4
24V
18
INV ON
13
GND
8
GND
3
24V
17
12V
12
3.5V
7
GND
2
24V
16
GND/V-sync
11
3.5V
6
GND
1
PWR ON
20
A.DIM
15
GND
10
3.5V
5
GND
21
12V
22
P.DIM1
23
GND/P.DIM2
24
Err OUT
25
R2419
100
Q2401
MMBT3906(NXP)
1
2
3
L2403
CIS21J121
IC2401
NCP803SN293
OPT
1
GND
3
VCC
2
RESET
R2435
10K
+12V
C2440
1uF
25V
OPT
C2423
0.1uF
16V
+3.3V_TU_IN
L2401
CIS21J121
R2418
100
OPT
R2408
10K
R2416
100K
OPT
L2409
3.6uH
NR8040T3R6N
INV_CTL
C2429
0.1uF
16V
ERROR_OUT
R2420
0
POWER_16_GND
+3.5V_ST
L2406
3.6uH
NR8040T3R6N
R2421
10K
OPT
PWM_DIM2
R2424
4.7K
OPT
IC2403
TPS54319TRE
1
VIN_1
3
GND_1
7
COMP
9
SS/TR
10
PH_1
11
PH_2
12
PH_3
13
BOOT
14
PWRGD
15
EN
16
VIN_3
5
AGND
8
RT/CLK
6
VSENSE
4
GND_2
2
VIN_2
17
EP[GND]
R2413
0
5%
OPT
+3.3V_NORMAL
+12V
L2402
CIS21J121
R2417
100K
L/DIM0_VS
C2433
0.1uF
50V
C2419
0.1uF
16V
+3.5V_ST
R2423 0
POWER_16_VSYNC
C2430
22uF
10V
PANEL_CTL
C2420
0.1uF
16V
POWER_DET
IC2404
TPS54327DDAR
DEV_DCDC_TPS54327
3
VREG5
2
VFB
4
SS
1
EN
5
GND
6
SW
7
VBST
8
VIN
9
[EP]GND
C2428
3300pF
50V
+12V
+3.5V_ST
C2411
0.1uF
16V
PWM_DIM1
+3.3V_NORMAL
IC2402
NCP803SN293
1
GND
3
VCC
2
RESET
C2427
0.1uF
16V
R2439
10K
1%
R2426
1K
R2434
47K 1%
+24V
P2400
FW20020-24S
OPT
19
14
9
4
18
13
8
3
17
12
7
2
16
11
6
1
20
15
10
5
21 22
23 24
C2426
100pF
50V
PANEL_VCC
+3.5V_ST
C2443
0.1uF
50V
R2437
10K
A_DIM
R2422
0
POWER_24_GND
R2415
56K
1%
C2421
4700pF
50V
R2442
10K
MTK_EPI
R2441
1.8K
MTK_EPI
+12V
R2430
10K
RL_ON
+3.5V_ST
C2413
0.1uF
50V
R2401
10K
C2402
10uF
16V
C2441
3300pF
50V
OPT
R2403
10K
R24000
OPT
L2404
2uH
C2400
10uF
16V
POWER_ON/OFF1
R2406
10K
1%
C2403
0.1uF
16V
OPT
C2404
0.1uF
16V
IC2400
AOZ1038PI
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
NC_1
8
NC_2
9
[EP]LX
+12V
C2414
10uF
10V
C2409
10uF
10V
C2408
10uF
10V
C2407
10uF
10V
+1.2V_MTK_CORE
L2400
BLM18PG121SN1D
C2445
22pF
50V
C2434
0.1uF
50V
+12V
+3.3V_NORMAL
C2431
10uF
16V
R2428
10K
1%
C2438
1uF
10V
C2437
0.1uF
C2442
22uF
10V
C2439
3300pF
50V
R2414 10K
C2444
22uF
10V
R2407
100K
L2411
2uH
+3.3V_NORMAL
R2427
33K
1%
L2410
BLM18PG121SN1D
IC2405
TPS54425PWPR
3
VREG5
2
VFB
4
SS
1
VO
6
PG
5
GND
7
EN
8
PGND1
9
PGND2
10
SW1
11
SW2
12
VBST
13
VIN1
14
VIN2
15
[EP]PGND
C2436
0.1uF
16V
POWER_ON/OFF2_1
POWER_ON/OFF1
POWER_ON/OFF2_2
POWER_ON/OFF2_3
POWER_ON/OFF2_4
POWER_ON/OFF2_1
POWER_ON/OFF2_3
POWER_ON/OFF2_2
R2402
3.3K
C2405
4700pF
50V
R2404
5.6K
1%
C24001
0.1uF
16V
R2410
2.7K
1%
R2411
1.5K
1%
OPT
R2409
1.2K
1%
C2446
10uF
10V
C2447
10uF
10V
C2424
10uF
10V
C2425
10uF
10V
C2435
4.7uF
50V
C2448
10uF
10V
R2451
2K
1/8W
PANEL_DISCHARGE_REG
R2452
2K
1/8W
PANEL_DISCHARGE_REG
R2412
8.2K
5%
OPT
R2442-*1
33K
MTK_NON_EPI
R2441-*1
5.6K
MTK_NON_EPI
+3.3V_NORMAL
L2413
BLM18PG121SN1D
CN
C2410
0.1uF
50V
OPT
R2405
22
POWER_24_ERROR_OUT
24
MID_POWER
2011.11.25
Vout=0.827*(1+R1/R2)=1.521V
3A
On-semi
24V-->3.48V
TYP 1450mA
#16/#20/#23
LD - GND OR USE
LE(N.L.D.) - OPEN
LE(L.D.) - USE
R2
FROM LIPS & POWER B/D
R2
DDR MAIN 1.5V
PANEL_POWER
R1
R1
12V-->3.58V
Power_DET
not to RESET at 8kV ESD
ST_3.5V-->3.5V
$ 0.145
3A
3A
+5V_Normal
Placed on SMD-TOP
*NOTE 17
R1
R2
Vout=0.8*(1+R1/R2)
4A
Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)
+3.3V_NORMAL
MAX 3.4 A
R2
R1
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EEPROM_SCL
+3.5V_ST
GND
POWER_ON/OFF2_4
EDID_WP
R3023
4.7M
OPT
C3004
0.1uF
16V
R3009 10K
MICOM_JAPAN
MICOM_DEBUG
SW3000
JTP-1127WEM
MICOM_RESET_SW
12
4 3
R3027
270K
OPT
R3026
10K
PANEL_CTL
SOC_RX
POWER_ON/OFF1
IR
SIDE_HP_MUTE
INV_CTL
MICOM_RESET
POWER_ON/OFF2_3
MODEL1_OPT_1
MODEL1_OPT_3
LED_B/GP4_LED_R
AMP_MUTE
AMP_RESET_N
R30 22 10K
R3006 10K
MICOM_LCD/OLED
MICOM_RESET
R3012 10K
MICOM_DIIVA
MODEL1_OPT_1
I2C_SCL3
KEY1
MODEL1_OPT_2
EXT_AMP_MUTE
I2C_SDA3
MODEL1_OPT_0
R3025 22
MICOM_DIIVA
+3.5V_ST
COMMERCIAL_12V_CTL
MODEL1_OPT_4
+3.5V_ST
MODEL1_OPT_0
SOC_RESET
12V_EXT_PWR_DET
R3007 10K
MICOM_TOUCH_KEY
POWER_ON/OFF2_1
R3008 10K
MICOM_TACT_KEY
R3010 10K
MICOM_NON_JAPAN
KEY2
SCART_MUTE
R3014 1K
MODEL1_OPT_4
+3.5V_ST
RL_ON
POWER_ON/OFF2_2
R3005 10K
MICOM_PDP
X3000
32.768KHz
R3024 22
MODEL1_OPT_3
EEPROM_SDA
MODEL1_OPT_2
HDMI_CEC
R3011 10K
MICOM_DEBUG
POWER_ON/OFF2_3
EXT_AMP_RESET
MICOM_DEBUG
C3000
0.1uF
SOC_TX
R3013 10K
MICOM_NON_DIIVA
POWER_DET
POWER_ON/OFF2_4
+3.5V_ST
HDMI_CEC
D3000
BAT54_SUZHO
R3029
120K
CEC_REMOTE
R3028
27K
+3.5V_ST
RUE003N02
Q3001
HDMI_CEC_FET_ROHM
S
D
G
EXT_AMP_RESET
SCART_MUTE
EXT_AMP_MUTE
12V_EXT_PWR_DET
COMMERCIAL_12V_CTL
R3030 10K
MICOM_GP4_10PIN
R3031 10K
MICOM_GP3_12/15PIN
+3.3V_NORMAL
R3034
4.7K
OPT
+3.3V_NORMAL
+3.3V_NORMAL
+3.3V_NORMAL
R3035
4.7K
OPT
+3.3V_NORMAL
Q3000
MMBT3904(NXP)
EDID_WP
E
B
C
P3000
12507WS-12L
MICOM_DEBUG
1
2
3
4
5
6
7
8
9
10
11
12
13
R3036
10K
OPT
R3037
10K
OPT
R3032
10K
AMP_RESET_BY_MICOM
R3033
10K
IC3000
R5F100GEAFB
MICOM
1
P60/SCLA0
2
P61/SDAA0
3
P62
4
P63
5
P31/TI03/TO03/INTP4
6
P75/KR5/INTP9/SCK01/SCL01
7
P74/KR4/INTP8/SI01/SDA01
8
P73/KR3/SO01
9
P72/KR2/SO21
10
P71/KR1/SI21/SDA21
11
P70/KR0/SCK21/SCL21
12
P30/INTP3/RTC1HZ/SCK11/SCL11
13
P50/INTP1/SI11/SDA11
14
P51/INTP2/SO11
15
P17/TI02/TO02
16
P16/TI01/TO01/INTP5
17
P15/PCLBUZ1/SCK20/SCL20
18
P14/RXD2/SI20/SDA20
19
P13/TXD2/SO20
20
P12/SO00/TXD0/TOOLTXD
21
P11/SI00/RXD0/TOOLRXD/SDA00
22
P10/SCK00/SCL00
23
P146
24
P147/ANI18
25
P27/ANI7
26
P26/ANI6
27
P25/ANI5
28
P24/ANI4
29
P23/ANI3
30
P22/ANI2
31
P21/ANI1/AVREFM
32
P20/ANI0/AVREFP
33
P130
34
P01/TO00/RXD1
35
P00/TI00/TXD1
36
P140/PCLBUZ0/INTP6
37
P120/ANI19
38
P41/TI07/TO07
39
P40/TOOL0
40
RESET
41
P124/XT2/EXCLKS
42
P123/XT1
43
P137/INTP0
44
P122/X2/EXCLK
45
P121/X1
46
REGC
47
VSS
48
VDD
C3002
8pF
C3003
8pF
R3000
10K
R3001 22
MICOM_DIIVA
POD_WAKEUP_N
FLG_POD_DR
/RST_DIIVA
FLG_POD_DR
/RST_DIIVA
POD_WAKEUP_N
R3002 22
MICOM_DIIVA
R3003 22
AMP_RESET_BY_MICOM
MODEL1_OPT_6
MODEL1_OPT_5
MODEL1_OPT_6
MODEL1_OPT_5
R3020 10K
MICOM_MHL
R3021 10K
MICOM_NON_MHL
R3016 10K
MICOM_GED
R3017 10K
MICOM_NON_GED
C3001 0.47uF
LOGO_LIGHT
LOGO_LIGHT
SI1012CR-T1-GE3
Q3001-*1
HDMI_CEC_FET_VISHAY
S
D
G
R3018
3.3K
R3019
3.3K
R3005-*1
56K
MICOM_OLED_MAIN
R3005-*2
22K
MICOM_OLED_FRC
MICOM
30
For Debug
PDP
DIVA
Renesas MICOM
NON DIVA
/ OLED
MICOM MODEL OPTION
MODEL_OPT_3
LCD
For CEC
IR Wafer
10Pin
MODEL_OPT_4
12/15Pin
IR Wafer
10
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
JAPAN
NON JAPAN
TOUCH_KEY
TACT_KEY
GP4 High/MID Power SEQUENCE
POWER_ON/OFF!
POWER_ON/OFF2_1
POWER_ON/OFF2_2
POWER_ON/OFF2_3
POWER_ON/OFF2_4
SOC_RESET
For Japan:LNB_INIT
HDMI_WAUP:HDMI_INIT
2011.12.12
for DiiVA
For China
(GP3_Soft touch)
NON_MHL
MHLMODEL_OPT_5
NON_GED
GEDMODEL_OPT_6
For JAPAN
GP4_HIGH
(GP4_TOOL)
For Sample Set
MICOM MODEL OPTION
Eye Sensor Option
MODEL_OPT_2
1
0
MC8101_ABOV
N/A
MODEL_OPT_4
0
1
CM3231_CAPELLA
CM3231_CAPELLA
(TACT_KEY)
(GP3 Soft touch) (GP4 Soft touch)
Don’t remove R3014,
not making float P40
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
D1-_HDMI1_SOC
D0+_HDMI1_SOC
R3303 100
R3319
22
HDMI_EXT_EDID
DDC_SDA_2_JACK
R3314 100
5V_HDMI_3_JACK
R3305
1K
R3325
47K
CEC_REMOTE
D1-_HDMI2_JACK
5V_HDMI_2_JACK
R3324
47K
R3320
22
HDMI_EXT_EDID
R3316
1K
R3317
1K
HDMI_HPD_4_JACK
C3303
0.1uF
16V
JK3300
RSD-105156-100
EAG62611201
14
NC
13
CE_REMOTE
5
D1_GND
20
BODY_SHIELD
12
CK-
11
CK_GND
2
D2_GND
19
HP_DET
18
5V
10
CK+
4
D1+
1
D2+
17
GND
9
D0-
8
D0_GND
3
D2-
16
DDC_DATA
7
D0+
6
D1-
15
DDC_CLK
D2+_HDMI2_JACK
+5V_NORMAL
CK-_HDMI2_JACK
D2+_HDMI4_JACK
R3326
47K
R3313
100K
C3301
0.1uF
16V
R3339
47K
D0-_HDMI4_JACK
R3337
47K
DDC_SCL_2_JACK
D2-_HDMI4_JACK
R3307
100K
5V_HDMI_2_JACK
HDMI_ARC
HDMI_HPD_2_JACK
5V_HDMI_4_JACK
R3311
1K
+5V_NORMAL
C3302
0.1uF
16V
R3338
47K
DDC_SCL_4_JACK
5V_HDMI_4_JACK
DDC_SDA_1_SOCDDC_SDA_2_JACK
D0+_HDMI4_JACK
CK+_HDMI2_JACK
R3318
4.7K
R3308 100
D1+_HDMI2_JACK
R3301
100K
R3309 100
D2+_HDMI1_SOC
CK-_HDMI1_SOC
CEC_REMOTE
C3300
0.1uF
16V
R3340
47K
JK3301
RSD-105156-100
EAG62611201
14
ARC
13
CE_REMOTE
5
D1_GND
20
BODY_SHIELD
GND
12
CK-
11
CK_GND
2
D2_GND
19
HP_DET
18
5V
10
CK+
4
D1+
1
D2+
17
GND
9
D0-
8
D0_GND
3
D2-
16
DDC_DATA
7
D0+
6
D1-
15
DDC_CLK
D0-_HDMI2_JACK
DDC_SDA_3_JACK
CK-_HDMI4_JACK
D1+_HDMI1_SOC
D0+_HDMI2_JACK
CK+_HDMI4_JACK
DDC_SCL_2_JACK
R3310
1K
DDC_SCL_4_JACK
DDC_SCL_3_JACK
CK+_HDMI1_SOC
D2-_HDMI2_JACK
HDMI_HPD_1_SOC
R3315 100
5V_HDMI_1_SOC
+5V_NORMAL
DDC_SDA_4_JACK
5V_HDMI_1_SOC
R3304
1K
DDC_SCL_1_SOC
D1+_HDMI4_JACK
R3323
47K
DDC_SDA_4_JACK
R3302 100
DDC_SCL_1_SOC
D1-_HDMI4_JACK
R3306
4.7K
HDMI_INTERNAL_EDID
DDC_SDA_1_SOC
+5V_NORMAL
CEC_REMOTE
D0-_HDMI1_SOC
R3312
4.7K
EDID_WP
JK3302
RSD-105156-100
EAG62611201
14
NC
13
CE_REMOTE
5
D1_GND
20
BODY_SHIELD
12
CK-
11
CK_GND
2
D2_GND
19
HP_DET
18
5V
10
CK+
4
D1+
1
D2+
17
GND
9
D0-
8
D0_GND
3
D2-
16
DDC_DATA
7
D0+
6
D1-
15
DDC_CLK
D2-_HDMI1_SOC
Q3300
MMBT3904(NXP)
E
B
C
Q3301
MMBT3904(NXP)
E
B
C
Q3302
MMBT3904(NXP)
E
B
C
IC3300
M24C02-RMN6T
HDMI_EXT_EDID
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
5V_HDMI_3_JACK
D0-_HDMI3_JACK
Q3303
MMBT3904(NXP)
E
B
C
CK+_HDMI3_JACK
CEC_REMOTE
HDMI_HPD_3_JACK
D2-_HDMI3_JACK
R3329 100
DDC_SDA_3_JACK
D1+_HDMI3_JACK
R3327
100K
R3336
4.7K
D1-_HDMI3_JACK
R3328 100
D2+_HDMI3_JACK
DDC_SCL_3_JACK
D0+_HDMI3_JACK
CK-_HDMI3_JACK
JK3303
RSD-105156-100
EAG62611201
14
NC
13
CE_REMOTE
5
D1_GND
20
BODY_SHIELD
12
CK-
11
CK_GND
2
D2_GND
19
HP_DET
18
5V
10
CK+
4
D1+
1
D2+
17
GND
9
D0-
8
D0_GND
3
D2-
16
DDC_DATA
7
D0+
6
D1-
15
DDC_CLK
R3331
1K
R3330
1K
R3321
4.7K
HDMI_EXT_EDID
D3300
MMBD6100
A2
C
A1
D3302
MMBD6100
A2
C
A1
D3303
MMBD6100
A2
C
A1
D3301
MMBD6100
A2
C
A1
R33 00
0
UI : HDMI1
UI : HDMI3
UI : HDMI2
33
HDMI 4
2011.10.29
UI : HDMI4
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Fiber Optic
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JK3601
KJA-PH-0-0177
3 DETECT
4 L
5 GND
1 R
+3.3V_NORMAL
R3641
2.7K
D3615
30V
OPT
C3633
18pF
50V
R3644 22
JK3602
2F11TC1-EM52-4F
C
GND
B
VCC
A
VIN
4
SHIELD
DSUB_B+
R3620
2.7K
OPT
+3.3V_NORMAL
DSUB_G+
RGB_DDC_SCL
DSUB_DET
R3645
10K
RGB_EDID
DSUB_R+
R3643 22
JK3603
SLIM-15F-D-2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
R3646
10K
C3615
0.1uF
16V
RGB_DDC_SDA
SPDIF_OUT
R3615
33
C3634
18pF
50V
EDID_WP
PC_R_IN
+5V_NORMAL
DSUB_HSYNC
DSUB_VSYNC
D3616
30V
OPT
PC_L_IN
R3642
2.7K
RGB_5V
RGB_5V
IC3600
M24C02-RMN6T
RGB_EDID
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
SOC_TX
SOC_RX
D3620
MMBD6100
A2
C
A1
R3647
100
RGB_DEBUG
D3623
5.6V
OPT
D3611
5.6V
OPT
D3612
5.6V
OPT
D3600
20V
OPT
D3601
20V
OPT
D3622
5.5V
ADUC 5S 02 0R5L
OPT
D3621
5.5V
ADUC 5S 02 0R5L
OPT
D3613
5.5V
ADUC 5S 02 0R5L
OPT
D3611-*1
5.6V
ESD_MTK
D3612-*1
5.6V
ESD_MTK
D3613-*1
5.5V
ADUC 5S 02 0R5L
ESD_MTK
R3602
100
RGB_DEBUG
R3600
0
NON_RGB_DEBUG
R3601
0
NON_RGB_DEBUG
RGB PC
PC AUDIO
RGB/ PC AUDIO/ SPDIF
SPDIF OUT
36
JACK HIGH / MID
2011.11.21
Closed to JACK
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Loading...
+ 89 hidden pages