Apple Q16A Schematic

DRAWING

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

CPU CORE VOLTAGE POWER SUPPLY

PAGE

SIGNAL CONSTRAINTS (1 OF 4) - DDR MEM/CLK

CONTENTS

25

3.3V / 5V SYSTEM POWER SUPPLY

SOUND/LEFT USB/BLUETOOTH, SERIAL DEBUG

USB 2.0 INTERFACE (uPD720101)

INTREPID POWER RAILS/1.5V LDO

INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG

INTREPID ENET/FW/UATA/EIDE INTERFACES

400PIN STACKED DDR SODIMM CONNECTOR

GPU_PWRMSR

EXT_TMDS

USB_MODEM

SOFT_MODEM

INT_TMDS

VGA_BUFFER_RES

ATI_MEMIO_LO

INT_2_5V_HOT

BBANG

1_8V_MAXBUS

M11 POWER

20

33

FIREWIRE PHY

FAN CONTROLLER, USB MODEM/SOFT MODEM,

1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES

41

COMPONENT LOCATIONS (1 OF 2)

SIGNAL LOCATIONS

REVISION HISTORY

FUNCTIONAL TESTPOINTS

SIGNAL CONSTRAINTS (4 OF 4) - POWER NETS

SIGNAL CONSTRAINTS (3 OF 4) - DIGITAL/DIFF

PBUS SUPPLY / PMU SUPPLY / BACKUP BATTERY

BATTERY CHARGER AND CONNECTOR

FIREWIRE PORTS

External TMDS (DVI Transmitter SIL1162) M11 LVDS/TMDS/GPIO & GPU VCORE

MPC7447A DATA / NC PINS / BOOTBANGER

INTREPID MEMORY INTERFACE / BOOT ROM

INTREPID MAXBUS AND BOOT STRAPS

CPU PLL AND CONFIGURATION STRAPS

MPC7447A MAXBUS INTERFACE

PCB NOTES AND HOLES

POWER BLOCK DIAGRAM

TITLE PAGE AND CONTENTS

SYSTEM BLOCK DIAGRAM

23

26

ATI_MEMIO_HI

OPTICAL DRIVE

38

18 19

16

15

14

13

12

INTREPID AGP 4X/PCI

DDR MEMORY MUXES

CONTENTS

INTREPID DECOUPLING

5V_HD_LOGIC NO_BBANG INT_2_5V_COLD

GPU_SS

STUFF

22

32

2

39 40

3

43

42

PMU

37

36

34

1

4 5 6

8

7

10

9

35

21

28

LVDS

29

NO STUFF

31

11

17

SIGNAL CONSTRAINTS (2 OF 4) - CPU

COMPONENT LOCATIONS (2 OF 2)

M11 AGP INTERFACE & SPREAD SPECTRUM SUPPORT

CARDBUS INTERFACE (PCI1510)

GIGABIT ETHERNET INTERFACE

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO,

INTERNAL CONNECTORS - AIRPORT, HARD DRIVE,

3V_HD_LOGIC

1_5V_MAXBUS

BOM OPTIONS (IN COMMON PARTS)

NO_SSCG

SSCG

27

30

KBD,TPAD,HALL EFFECT,PWR BUTTON,LMU/SENSOR

24

PAGE

051-6570

44

?

04/02/04

B

1

PRODUCTION RELEASED

322174

SCHEM,MLB,PB15

B

SCH1

1

051-6570

SCHEM,MLB,PB15

1

PCB1820-1600

PCBF,MLB,PB15

SCHEM,MLB,PB15

Fri Apr 2 16:49:30 2004

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Connector

Modem/SW Modem

J19

J2

P.23

LMU LUX Board

RUX Board

2 DATA PAIRS

I2C

Keyboard

P.23

Connector

J11

Connector

OPTICAL DRIVE

BOOTROM

Circuit

U53/J1/J18

SLEEP

P.23

J8

LED

Connector

5V

SERIAL

P.23

J10

TRACKPAD

CH. C

AIRPORT

PMU

CARDBUS

P.18

Connector

J5

U51

J3

J15

U56

U16/U18/U28/U27

J14 J21

J17

J3

U47

J6

J27

J26

U11

J28

J3

J12

J13

J20

U36

U43

J24

J23

Ethernet

4 DATA PAIRS

BlueTooth (LIO)

(INTERNAL MEM)

P.12

M10

ATI

MEMORY

(INTERNAL MEM)

CH. D

(VIA STATLER)

1M X 8

Connector

Controller

TI PCI1510

Serial Debug

(INTERNAL MEM)

MAXBUS

P.25

P.13

EIDE

NOT USED

P.25

LIO/Audio

Connector

I2S I2C

Fan

P.25

P.17

U8

P.30

P.30-34

S-Video

COMPOSITE

Inverter

P.9

P.29

U28

P.30

P.12

P.14

P.13

P.14P.13

P.11

J25

P.10

P.9

P.8

P.14

P.13

P.13P.13

P.28

INTREPID

P.28

Connector

@ 200MHz

USB PORT A USB PORT B

Connector

Ethernet

APOLLO

400 MB/S

INTREPID

3.3V

SMBUS

Battery

Connector

P.25

USB PORT C

USB PORT F

FireWire

SYSTEM BLOCK DIAGRAM

VIA/PMU

CARDSLOT

64BITS

33MHZ

UATA 100

DDR MEMORY

DDR SDRAM DIMM 1

DDR SDRAM DIMM 0

SO-DIMM Connector

FIREWIREETHERNET

10/100/1000

USB PORT D USB PORT E

Config

CPU PLL

I2S

MEMORYMEMORY

CH. A

CH. B

64MB

CardBus

3.3V

33MHZ

32BITS

PCI BUS

P.7

P.5-6

CPU

4X AGP

P.19-21

Connector

LCD Panel

S-VIDEO

P.22

P.18

ULTRA ATA/100

Connector

& Charger

Power Supply

Connector

P.25

I2C

SCCA

P.14

Connector

32BITS

AGP BUS

1.5V/3.3V

66MHZ

PHY

P.26

10/100/1000

3.3V

G/MII

8BIT TX 8BIT RX 125MHZ

FW - A

FW - B

PHY

P.27

2 DATA PAIRS

@ 400MHZ

P.24

8BIT TX/RX

50MHZ

3.3V

1394 OHCI

UIDE

EIDE

NOT USED

64BIT DATA

32BIT ADDRESS

MAXBUS

1.8V

167MHZ

PMU

I2C

33MHZ 16/32 BITS

3.3V/5V

P.25

(MPC7447)

BOOT ROM

NOT USED

DC-In

P.24

NEC USB2.0

EHCI HC

(INTERNAL MEM)

LEFT USB

(VIA LIO)

RIGHT USB

U17

MEMORY

PCI

DVI-I

J22

DDC

RGB

EDID (I2C)

LVDS

2.5V

MEMORY BUS

167MHZ 64BITS

2:1 DDR MUXES

P.22 P.22

Connector

P.22

Connector

J4

Connector

(VIA SIL1162)

TMDS

051-6570

2 44

B

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

INTERNAL ZENER CLAMP TO 6V

+5V_MAIN

SLEEP: RUNNING

3S 2P 18650 CELLS

RUN

SHUT-DOWN

RUN SLEEP

~7.36MS

~8.2MS

(D3COLD)

GPU_VCORE

(D3HOT)

GPU_VCORE

(AT LTC1778 RUN/SS)

(MAX1715 OUTPUT)

1_5V_2_5V_OK

+1_5V_SLEEP

+1_5V_MAIN

??? MS

+2_5V_MAIN

??? MS

SLEEP

3V_5V_OK

2.4V - ??? MS

+5V_SLEEP

+5V_MAIN

DCDC_EN

DCDC_EN_L

1M & 0.1UF @14V, IT TAKES ~5.88MS TO START SWITCHER

GPU_VCORE

SEQUENCING

DCDC_EN_L

1_5V_2_5V_OK

D3_HOT

1_5V_2_5V_OK WILL NOT PULL LOW UNTIL +5V_MAIN TURNS ON

BECOMES ’1’; MUCH LESS THAN THE

DCDC_EN_L OR PMU_POWERUP_L

RC CHARGING AT INT_VCC (5V)

HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

DCDC_EN

SLEEP

D3_COLD

VCC

EXT_VCC

DC/DC

+5V_MAIN

SEQUENCING

MAXBUS

DCDC_EN

SLEEP

VCC

SHDN

+5V_MAIN

(MAX1717)

DC/DC

RUN: RUNNING

SHUTDOWN: STOPPED

SLEEP: STOPPED

MAXBUS

AGP I/O

DDR POWER

+2.5V_MAIN

+1.5V_MAIN

ON1/ON2

1625 NOT RUNNING

PGOOD

3V_5V_OK

PGOOD

(MAX1715)

DC/DC

BACKLIGHT

INVERTER

TURNS CONTROL TO RUN/SS WHEN IT’S OPEN

WHEN IT’S CONNECTED TO GND

HOLDS BOTH RUN/SS AT GND

14V CHARGES BACKUP BATTERY

WHEN ONLY BATTERY IS CONNECTED

+5V_MAIN

14V_PBUS

+3V_PMU

LDO

+3V_PMU

STBYMD

+3.3V_MAIN

RUN: RUNNING

BUCK

<~13.44V SHUTS-OFF

>~13.44V TURNS-ON

INRUSH

LIMITER

ADAPTER

IN

AC

(UNTIL DRAINED)

POWER BLOCK DIAGRAM

& BOOST OUTPUT

-

+

1V20_REF

BACKUP BATTERY

BATTERY

24V IS OUTPUT ONLY FROM

RUN: RUNNING

SLEEP: RUNNING

RUN/SS - 3V

SHUTDOWN: STOPPED

RUN: RUNNING

TURNS ON OUTPUT @ 2.4V

NO INRUSH PROTECTION

+24V_PBUS

+BATT

1_5V_2_5V_OK

VCC

+5V_MAIN

+1.8V_MAIN

+5V_MAIN

LOW IN SHUTDOWN

DCDC_EN_L WILL PULL ON1/ON2

AFTER PMU IS UP AND RUNNING

DCDC_EN_L

VCC

TURNS ON AT >1V

DC/DC

(LTC3707)

MAIN 3V/5V

<100UA ALLOWED

RUN/SS - 5V

TURNS ON AT >1V <100UA ALLOWED

INTERNAL ZENER CLAMP TO 6V

RC AT 1M*0.047UF @ 24V

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

RC AT 1M*0.1UF @ 24V

STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

RUN/SS

BATTERY VOLTAGE

+PBUS

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

MAP31 DDR CORE MAP31 DDR I/O

POWER SYSTEM ARCHITECTURE

VCC

NO AC: BATTERY VOLTAGE

PG 31

PG 30

PG 31

PG 32

PG 34

TURNS ON AS LOW AS 0.8V/TYP 1.5V

INTERNAL 1.2UA CURRENT SOURCE

PG 33

PG 20

CHARGER INPUT

SHUT-DOWN

INTREPID CORE

+PBUS

SHUTDOWN: STOPPED

MAIN 2.5V/1.5V

(LTC1625)

REGULATOR

AC: 12.8V

SHUTDOWN: RUNNING

+4_6V_BU

WHEN ONLY BATTERY IS CONNECTED

PG 30

CHARGER

BATTERY

NO INRUSH PROTECTION

FEED-IN PATH

(MAX1772)

RUN: RUNNING

SLEEP: STOPPED

SHUTDOWN: STOPPED

(LTC3411)

DC/DC

SLEEP: RUNNING

RUN/SS

RUN: RUNNING

SHUTDOWN: STOPPED

~2.23MS

SLEEP_L_LS5

+2_5V_SLEEP

+3V_MAIN

1_5V_2_5V_OK

+3V_SLEEP

CPU_VCORE

GPU_VCORE

(LTC1778)

+1.2V

(+1.385V)

SLEEP: D3COLD

BACKUP

B

3 44

051-6570

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

GROUND VIAS

PCB SPECS

THICKNESS : 1.2 MM / 0.047 IN

PREPREG (3 MIL)

CORE (3 MIL)

PREPREG (3 MIL)

PREPREG (5 MIL)

CORE (5 MIL)

CUT POWER PLANE (1 OZ)

SIGNAL (1/2 OZ + COPPER PLATING)

BOARD HOLES

BOARD INFORMATION

SEE PCB CAD FILES FOR MORE SPECIFIC INFO.

IMPEDANCE : 50 OHMS +/- 10%

1/2 OZ CU THICKNESS: 0.7 MILS

DIELECTRIC: FR-4 LAYER COUNT: 10

BOARD STACK-UP AND CONSTRUCTION

SIGNAL TRACE WIDTH: 4 MILS PREPREG THICKNESS: 2-3 MILS

SIGNAL TRACE SPACING: 4 MILS

I/O AREA

1394

1

4

5

7

6

3

2

8

9

10

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

1-8-1 BLIND MICROVIA/20R10 BURIED VIA/20R10 TH VIA

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

1.0 OZ CU THICKNESS: 1.4 MILS

LWR CPU

UPPER RT GPU

LEFT CPU

LWR RT GPU

INVERTER

DVI

BATT. CHRGR

CHASSIS MOUNTS

ASICS HEATSINK MOUNTS

MECH. HOLES

HOLE-VIA-20R10

ZT70

1

HOLE-VIA-20R10

ZT9

1

HOLE-VIA-20R10

ZT2

1

HOLE-VIA-20R10

ZT73

1

HOLE-VIA-20R10

ZT75

1

HOLE-VIA-20R10

ZT63

1

HOLE-VIA-20R10

ZT77

1

HOLE-VIA-20R10

ZT66

1

HOLE-VIA-20R10

ZT65

1

HOLE-VIA-20R10

ZT62

1

HOLE-VIA-20R10

ZT25

1

HOLE-VIA-20R10

ZT24

1

HOLE-VIA-20R10

ZT19

1

HOLE-VIA-20R10

ZT67

1

HOLE-VIA-20R10

ZT37

1

HOLE-VIA-20R10

ZT29

1

HOLE-VIA-20R10

ZT31

1

HOLE-VIA-20R10

ZT1

1

HOLE-VIA-20R10

ZT12

1

HOLE-VIA-20R10

ZT14

1

HOLE-VIA-20R10

ZT27

1

HOLE-VIA-20R10

ZT26

1

HOLE-VIA-20R10

ZT13

1

HOLE-VIA-20R10

ZT30

1

HOLE-VIA-20R10

ZT33

1

HOLE-VIA-20R10

ZT18

1

SHLD-SM

OG-503040

SH1

1

2

3

CHGND5

HOLE-VIA-20R10

ZT7

1

HOLE-VIA-20R10

ZT21

1

HOLE-VIA-20R10

ZT59

1

HOLE-VIA-20R10

ZT58

1

HOLE-VIA-20R10

ZT85

1

HOLE-VIA-20R10

ZT86

1

HOLE-VIA-20R10

ZT16

1

HOLE-VIA-20R10

ZT74

1

HOLE-VIA-20R10

ZT36

1

HOLE-VIA-20R10

ZT23

1

HOLE-VIA-20R10

ZT42

1

CHGND2

CHGND1

CHGND3

HOLE-VIA-20R10

ZT76

1

HOLE-VIA-20R10

ZT41

1

HOLE-VIA-20R10

ZT40

1

HOLE-VIA-20R10

ZT39

1

HOLE-VIA-20R10

ZT38

1

HOLE-VIA-20R10

ZT61

1

HOLE-VIA-20R10

ZT64

1

HOLE-VIA-20R10

ZT68

1

HOLE-VIA-20R10

ZT69

1

HOLE-VIA-20R10

ZT72

1

HOLE-VIA-20R10

ZT28

1

HOLE-VIA-20R10

ZT46

1

HOLE-VIA-20R10

ZT71

1

HOLE-VIA-20R10

ZT78

1

HOLE-VIA-20R10

ZT80

1

HOLE-VIA-20R10

ZT51

1

HOLE-VIA-20R10

ZT50

1

HOLE-VIA-20R10

ZT52

1

HOLE-VIA-20R10

ZT53

1

HOLE-VIA-20R10

ZT57

1

HOLE-VIA-20R10

ZT82

1

HOLE-VIA-20R10

ZT60

1

HOLE-VIA-20R10

ZT22

1

HOLE-VIA-20R10

ZT17

1

HOLE-VIA-20R10

ZT35

1

HOLE-VIA-20R10

ZT45

1

HOLE-VIA-20R10

ZT79

1

HOLE-VIA-20R10

ZT83

1

HOLE-VIA-20R10

ZT81

1

HOLE-VIA-20R10

ZT49

1

HOLE-VIA-20R10

ZT47

1

HOLE-VIA-20R10

ZT48

1

HOLE-VIA-20R10

ZT54

1

HOLE-VIA-20R10

ZT55

1

HOLE-VIA-20R10

ZT56

1

HOLE-VIA-20R10

ZT5

1

HOLE-VIA-20R10

ZT84

1

HOLE-VIA-20R10

ZT15

1

HOLE-VIA-20R10

ZT44

1

HOLE-VIA-20R10

ZT4

1

HOLE-VIA-20R10

ZT8

1

HOLE-VIA-20R10

ZT6

1

HOLE-VIA-20R10

ZT3

1

HOLE-VIA-20R10

ZT32

1

HOLE-VIA-20R10

ZT10

1

HOLE-VIA-20R10

ZT34

1

HOLE-VIA-20R10

ZT11

1

HOLE-VIA-20R10

ZT20

1

HOLE-VIA-20R10

ZT43

1

B

444

051-6570

ZT10_SPN NO_TEST=TRUE

ZT302_SPN NO_TEST=TRUE

NO_TEST=TRUE

ZT301_SPN

QACK*

TEA*

A10

MCP*

A23

A28 A29

TRST*

PMON_OUT*

A7

SHD1* HIT*

SHD0*

ARTRY*

AACK*

CI*

WT*

GBL*

TBST*

TS*

BG*

BR*

GND

VDD

A1 A2

A11

A5

A4

A3

A6

A8 A9

A12

A22

A21

A20

A19

A18

A17

A16

A15

A14

A13

A32

A31

A30

A27

A24 A25

AP1

AP4

AP2 AP3

AP0

A35

A34

A33

TT0

TT4

TSIZ1 TSIZ2

TSIZ0

TT1 TT2 TT3

DTI3

DTI2

TDI TDO TMS TCK

A26

BMODE0*

PMON_IN*

BMODE1*

DTI1

A0

DTI0

LSSD_MODE*

TA*

L2_TSTCLK

L1_TSTCLK

EXT_QUAL

CHKS*

DX*

SRW0*

IARTRY0*

SRW1*

(1 OF 3)

HRESET*

SRESET*

TBEN

QREQ*

CKSTP_IN*

CKSTP_OUT*

SYSCLK

INT* SMI*

PLL_CFG1

CLK_OUT

OVDD

PLL_CFG0

PLL_CFG3

DRDY*

DBG*

PLL_CFG2

PLL_CFG4

BVSEL

AVDD

OVDDSENSE

PG EN

VIN

ADJ

VOUT

GND

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(Nap Voltage=0.98V for both Config.)

470OHM FOR BOOT BANGER

MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)

R2

MPC7447 PULL-UPS

470OHM FOR BOOT BANGER

MPC7447 MAXBUS

NC

CPU INTERNAL PLL FILTERING

CPU_VCORE DECOUPLING NETWORK

CPU_OVDD DECOUPLING NETWORK

R1

Vout=0.59*(1+R1/R2) Place R449 & R452 close to U5 pin 6&5

For CPU DFS mode, Must stuff R748

(R1)

402

MF

1/16W

5%

10K

R46

1 2

10K

402

MF

1/16W

5%

R13

1 2

1/16W

402

MF

5%

10K

R20

1 2

402

MF

1/16W

5%

470

R32

1 2

5%

1/16W

MF

402

10K

R11

1 2

200

5% 1/16W MF

NO_BBANG

402

R10

1

2

5%

10K

1/16W

MF

402

R4

1 2

5%

402

MF

1/16W

1K

R7

1 2

10K

5%

402

MF

1/16W

R24

1 2

5%

402

MF

1/16W

10K

R34

1 2

20% CERM

10V

0.1uF

402

C89

1

2

0.1uF

CERM

10V

20%

402

C73

1

2

0.1uF

20%

402

10V CERM

C18

1

2

10V 402

CERM

20%

0.1uF

C20

1

2

CERM

20%

402

10V

0.1uF

C75

1

2

0.1uF

20% 10V

402

CERM

C9

1

2

10V CERM

0.1uF

402

20%

C49

1

2

0.1uF

10V

20%

402

CERM

C46

1

2

0.1uF

20% CERM

10V 402

C30

1

2

10V

0.1uF

20%

402

CERM

C56

1

2

0.1uF

20% 10V

402

CERM

C45

1

2

0.1uF

CERM

10V

20%

402

C48

1

2

0.1uF

20% 402

CERM

10V

C44

1

2

402

10V

20% CERM

0.1uF

C86

1

2

10V 402

CERM

20%

0.1uF

C88

1

2

20%

402

CERM

10V

0.1uF

C10

1

2

0.1uF

20% CERM

402

10V

C38

1

2

CERM 402

10V

20%

0.1uF

C72

1

2

MF

5%

470

1/16W

402

R89

1

2

10V

0.1uF

402

CERM

20%

C50

1

2

20% 10V

402

0.1uF

CERM

C28

1

2

402

20% 10V

0.1uF

CERM

C39

1

2

0.1uF

CERM 402

20% 10V

C47

1

2

20%

402

0.1uF

CERM

10V

C26

1

2

0.1uF

20% 10V

402

CERM

C31

1

2

470

5%

1/16W

MF

402

R38

1

2

10K

5%

1/16W

MF

402

R36

1 2

470

5%

1/16W

MF

402

R45

1 2

MF

1/16W

402

10K

5%

R28

1 2

1K

1/16W

MF

402

5%

R3

1 2

10uF

805

CERM

6.3V

20%

C32

10uF

805

CERM

20%

6.3V

C33

1

2

805

CERM

6.3V

20%

10uF

C59

6.3V

20% CERM

805

10uF

C58

1

2

10K

402

1/16W

5% MF

R27

1 2

10K

5% MF

402

1/16W

R33

1 2

2.2uF

10V 805

CERM

20%

C62

1

2

2.2uF

20%

805

10V CERM

C34

1

2

402

MF

1/16W

10K

5%

R25

1 2

402

MF

1/16W

5%

10K

R8

1 2

0

5%

1/16W

MF

603

1_5V_MAXBUS

R281

1 2

0

5%

1/16W

MF

603

1_8V_MAXBUS

R283

1 2

+1_5V_SLEEP

+1_8V_SLEEP

1/16W

470

5% MF

402

BBANG

R9

1

2

470

MF

402

5%

1/16W

R2

1 2

APOLLO7-1.XXV

BGA

1.XXGHZ

OMIT

U56

E11

H1

D12

L3 G4 T2 F4 V1 J4 R2 K5 W2

C11

J2 K4 N4 J3 M5 P5 N3 T1 V2 U1

G3

N5 W1

B12

C4 G10 B11

F10

L2 D11

D1 C10

G2

R1

C1

E3

H6

F5

G7

N2

A8

M1

G9 F8

D2 B7

A12

J1

A3 B1

H2

M2

R3 G1 K1 P1 N1

D10

A11

E2

B5

H9

H11

H13

J6

J8

J10

J12

K7K3K9

C3

K11

K13

L6

L8

L10

L12

M4M7M9

M11D6M13

N7P3P9

P12R5R14

R17T7T10

D13

U3

U13

U17

V5

V8

V11

V15

E17F3G17

H4

H7

B2

D8

B6

D4

G8 B3

E8

C9

B4

M3N6P2P8P11R4R13

R16T6T9C2U2

U12

U16V4V7

V10

V14

C12D5F2H3J5K2L5

E18

G18

B8 C8 C7 D7 A7

D9

A9

G5

P4

E4 H5

F9

A2

B10

E10

A10

K6

E1

F11

C6

B9 A4

L1

F1

A5

L4

G6 F7 E7

E5 E6 F6 E9 C5

H8

K12

K14L7L9

L11

L13M8M10

M12

H10

H12J7J9

J11

J13K8K10

D3

CERM

10V 402

20%

0.1uF

C29

1

2

402

10V CERM

20%

0.1uF

C27

1

2

20% CERM

10V 402

0.1uF

C25

1

2

CERM

10V 402

20%

0.1uF

C54

1

2

402

CERM

10V

0.1uF

20%

C53

1

2

20% 10V

402

CERM

0.1uF

C55

1

2

0.1uF

20% CERM

402

10V

C87

1

2

10V 402

CERM

0.1uF

20%

C69

1

2

20% CERM

402

10V

0.1uF

C17

1

2

10V 402

20% CERM

0.1uF

C82

1

2

0.1uF

20% 10V

402

CERM

C81

1

2

0.1uF

10V 402

20% CERM

C61

1

2

10K

402

MF

1/16W

5%

R6

1 2

5%

1/16W

MF

402

10K

R37

1 2

10K

402

MF

1/16W

5%

R19

1 2

10K

402

MF

1/16W

5%

R26

1 2

10V

20% CERM

402

0.1uF

C2

1

2

20% CERM

402

0.1uF

10V

C103

1

2

CERM

0.1uF

10V

20%

402

C68

1

2

20% CERM

10V

0.1uF

402

C109

1

2

CERM

20%

0.1uF

10V 402

C107

1

2

10uF

805

CERM

20%

6.3V

C104

1

2

10V CERM

20%

0.1uF

402

C108

1

2

0.1uF

20% CERM

10V 402

C110

1

2

10V 402

0.1uF

20% CERM

C1

1

2

SM

OMIT

XW34

1 2

FAN2558

SOT23-6

U5

53

2

4

1 6

110K

CPU_BST

1% 1/16W

402

MF

R449

1

2

1% 1/16W

402

100K

MF

R452

1

2

1uF

10%

6.3V CERM 402

C102

1

2

CERM1

603

10%

2.2uF

6.3V

C85

1

2

1/10W

5%

0

603

MF

R302

1

2

+3V_SLEEP

1/16W

MF

1%

10

402

R748

12

10

1%

1/16W

NO STUFF

MF

402

R453

12

5%

1/16W

402

MF

100K

R455

SM

MBR0530

D17

12

10V CERM 402

20%

0.1uF

C502

1

2

0.001uF

10% 50V

402

CERM

C626

1

2

0

5% 1/16W MF 402

R755

1

2

NO STUFF

200K

5% 1/16W MF 402

R775

1

2

402

CERM

20% 10V

0.1uF

C810

1

2

6.3V

4.7uF

20% 805

CERM

C811

1

2

337S2855

U56

CRITICAL1CPU_BST

IC,APOLLO7 PM,R1.1,1.50GHZ,1.24V CORE

RES,MF,1/16W,100k ohm,1%,0402,SMD

114S1005

1

CPU_BTR

R449

IC,APOLLO7 PM,R1.1,1.33GHZ,1.18V CORE

337S2856 CRITICAL1CPU_BTR

U56

445

051-6570

B

CPU_VCORE_SLEEP

CPU_ADDR<3>

CPU_LSSD_MODE CPU_L1TSTCLK

JTAG_CPU_TCK

CPU_AVDD

CPU_AVDD_VOUT

SYSCLK_CPU

NO_TEST=TRUE

CPU_CLKOUT_SPN

CPU_TS_L

CPU_BG_L

CPU_AVDD_ADJ

CPU_PULLUP

CPU_PLL_CFG<3>

CPU_AVDD_VIN

CPU_PLL_CFG<1>

CPU_PLL_CFG<4>

CPU_PLL_CFG<0>

CPU_DBG_L

CPU_TA_L

CPU_DRDY_L

CPU_SRWX_L

CPU_HRESET_L

CPU_ADDR<19>

MAXBUS_SLEEP

CPU_PULLDOWN

JTAG_CPU_TCK

CPU_L1TSTCLK

CPU_EDTI

CPU_VCORE_SLEEP

MAXBUS_SLEEP

JTAG_CPU_TRST_L

ADT7460_VCORE_MON

CPU_ADDR<1>

CPU_MCP_L

CPU_CHKSTP_OUT_L

CPU_ADDR<18>

CPU_ADDR<2>

CPU_CHKS_L

CPU_PULLDOWN

CPU_ADDR<16>

CPU_ADDR<21>

CPU_PMONIN_L

CPU_EMODE0_L

CPU_ARTRY_L CPU_SHD0_L

CPU_HIT_L

CPU_SHD1_L

CPU_BR_L

CPU_ADDR<4>

CPU_ADDR<6>

CPU_ADDR<5>

CPU_ADDR<9>

CPU_ADDR<8>

CPU_ADDR<11>

CPU_ADDR<10>

CPU_ADDR<12>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<15>

CPU_ADDR<17>

CPU_ADDR<20>

CPU_ADDR<22>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27> CPU_ADDR<28> CPU_ADDR<29>

CPU_ADDR<31>

CPU_ADDR<30>

CPU_TT<0> CPU_TT<1>

CPU_TT<3>

CPU_TT<2>

CPU_TBST_L

CPU_TT<4>

CPU_TSIZ<0>

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_WT_L

CPU_GBL_L

CPU_CI_L CPU_AACK_L

CPU_ADDR<7>

CPU_PULLDOWN

CPU_EMODE1_L

CPU_SRWX_L

CPU_PULLUP

CPU_PULLDOWN

CPU_HRESET_L

CPU_SRESET_L

MPIC_CPU_INT_L CPU_SMI_L

CPU_QREQ_L

CPU_BUS_VSEL

CPU_TBEN

MAXBUS_SLEEP

CPU_TBEN

CPU_CHKS_L

CPU_SHD1_L

CPU_SHD0_L

CPU_LSSD_MODE

CPU_MCP_L

CPU_L2TSTCLK

CPU_CHKSTP_OUT_L

CPU_PMONIN_L

CPU_EMODE1_L

CPU_SMI_L

JTAG_CPU_TDI

MPIC_CPU_INT_L

JTAG_CPU_TMS

CPU_QACK_L

CPU_EDTI

CPU_DTI<2>

CPU_DTI<0> CPU_DTI<1>

CPU_L2TSTCLK

JTAG_CPU_TDI JTAG_CPU_TDO_TP JTAG_CPU_TMS

JTAG_CPU_TRST_L

CPU_AVDD_SHDN_L

CPU_PLL_CFG<2>

CPU_SRESET_L

VCORE_SHDN_L_3V

VCORE_SHDN_L

CPU_ADDR<0>

CPU_TEA_L

38

33

16

39

15

39

15

38

39

8

38

8

39

8

33

39

7

39

33

7

39

7

39

6

36

6

35

36

6

36

6

36

39

36

6

39

14

29

36

8

6

8

39

29

6

14

6

36

6

39

36

5

8

5

38

8

5

7

38

7

8

5

8

5

25

8

5

8

5

8

5

7

8

5

8

5

8

5

8

7

5

8

5

8

5

39

5

7

5

33

8

D22

D3

D2

D1

D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21

D28

D27

D23 D24 D25 D26

D29

D32

D31

D30

D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44

D48

D47

D45 D46

D49

D51

D50

D52 D53 D54 D55

D58

D57

D56

D59

DP6

DP5

DP4

DP3

DP2

DP1

DP0

DP7

D63

D62

D61

D60

D0

(2 OF 3)

VDD

N/C_1

N/C_4

N/C_8

N/C_13

N/C_17

N/C_20

N/C_22 N/C_23

N/C_31

N/C_39

N/C_30

N/C_33

N/C_35 N/C_36

N/C_38

N/C_29

N/C_28

N/C_27

N/C_25

N/C_24

N/C_21

N/C_19

N/C_18

N/C_16

N/C_15

N/C_14

N/C_12

N/C_11

N/C_10

N/C_9

N/C_7

N/C_6

N/C_5

N/C_3

N/C_2

(3 OF 3)

N/C_26

N/C_32

N/C_34

N/C_37

SENSEVDD

GND

TEMP_CATHODE

TEMP_ANODE

SENSEGND

HPR*

VCC

RESET* XTAL1 XTAL2 PB0

PD6

PD5

PD4

PD3

PD2

PD1

PD0

GND

PB1 PB2 PB3 PB4 PB5 PB6 PB7

SYM_VER2

WC*

VCC

VSS

SDA SCL

NC1 NC2 NC3

Y

B

A

Y

B

A

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

NC

UNSTUFFING Ra AND STUFFING Rb WILL DISABLE THE CONTROLLER

009-6240 FW GT4 BBANGER

NC

INPUTS ARE 3V TOLERANT

NC

(Ra)

BOOT BANGER - TWEAK PROCESSOR BITS AFTER POWER-ON

INPUTS ARE 3V TOLERANT

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

MPC7447/BBANG

NC

NC NC NC NC NC NC

NC NC NC NC

NC NC

NC

(Rb)

NC

1.XXGHZ

BGA

APOLLO7-1.XXV

OMIT

U56

R15 W15

T13 P13 U14 W14 R12 T12 W12 V12 N11 N10

T14

R11 U11 W11 T11 R10

N9 P10 U10

R9 W10

V16

U9

V9

W5

U6

T5

U5

W7

R6

P7

V6

W16

P17 R19 V18 R18 V19 T19 U19 W19 U18 W17

T15

W18 T16 T18 T17

W3 V17

U4

U8

U7

R7

U15

P6

R8

W8

T8

P14 V13 W13

T3

W4

T4

W9

M6

V3

N8

W6

1.XXGHZ

BGA

APOLLO7-1.XXV

OMIT

U56

A17 A19 B13 B16 B18 E12 E19 F13 F16 F18 G19 H18 J14 L14 M15 M17 M19 N14 N16 P15 P19

A6

A14

C15 D15 E15 F15 G15 H15 J15 K15 L15 C16

B14

D16 C17 D17 C18 D18 C19 D19 H16 J16 K16

C14

L16 J17 K17 L17 J18 K18 L18 J19 K19 L19

D14 E14 F14 G14 A15 B15

N13 G12

N12 G13

N18 N19

A13 A16 A18 B17 B19 C13 E13 E16 F12 F17 F19 G11 G16 H14 H17 H19 M14 M16 M18 N15 N17 P16 P18

+3V_SLEEP

BBANG

10K

5%

1/32W

25V

SM

RP46

5 10

1 2 3 4 6 7 8 9

0.1uF

402

CERM

10V

20%

BBANG

C762

1

2

BBANG

603

MF

1/16W

1%

10K

R692

1

2

10K

603

MF

1/16W

1%

NO STUFF

R709

1

2

10K

1% 1/16W MF 603

BBANG

R707

1

2

10K

1% 1/16W

BBANG

603

MF

R712

1

2

+3V_SLEEP

AT90S1200A

SSOP

OMIT

U54

10

12 13 14 15 16 17 18 19

2 3 6 7 8 9 11

1

20

5

4

0.1uF

402

20% 10V CERM

BBANG

C120

1

2

+3V_SLEEP

32KX8_M24256B

SOI

BBANG

U52

1 2 3

6

5

8

4

7

10K

5%

1/16W

MF

402

BBANG

R100

1

2

BBANG

SC70-5

SN74AUC1G08

U9

1

2

3

5

4

402

MF

1/16W

5%

0

NO_BBANG

R104

1 2

+3V_SLEEP

10K

5%

1/16W

MF

402

BBANG

R103

1

2

BBANG

SN74AUC1G08

SC70-5

U10

1

2

3

5

4

BBANG

402

MF

1/16W

5%

10K

R105

1

2

10K

1% 1/16W MF 603

BBANG

R637

1

2

6 44

051-6570

B

MCU,PROGRAMMED W/ BBANGER

341S1135

BBANG

U541

BB_EEPR_ADDR

CPU_DATA<50>

CPU_DATA<23>

CPU_THERM_DP

CPU_THERM_DM

CPU_VCORE_SLEEP

CPU_DATA<0> CPU_DATA<1> CPU_DATA<2> CPU_DATA<3> CPU_DATA<4>

CPU_DATA<6>

CPU_DATA<5>

CPU_DATA<8>

CPU_DATA<7>

CPU_DATA<9> CPU_DATA<10> CPU_DATA<11> CPU_DATA<12> CPU_DATA<13> CPU_DATA<14> CPU_DATA<15> CPU_DATA<16> CPU_DATA<17> CPU_DATA<18> CPU_DATA<19> CPU_DATA<20> CPU_DATA<21> CPU_DATA<22>

CPU_DATA<24> CPU_DATA<25> CPU_DATA<26> CPU_DATA<27> CPU_DATA<28> CPU_DATA<29> CPU_DATA<30> CPU_DATA<31> CPU_DATA<32>

CPU_DATA<34>

CPU_DATA<33>

CPU_DATA<35>

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<39>

CPU_DATA<38>

CPU_DATA<40>

CPU_DATA<42>

CPU_DATA<41>

CPU_DATA<43> CPU_DATA<44> CPU_DATA<45>

CPU_DATA<47>

CPU_DATA<46>

CPU_DATA<48> CPU_DATA<49>

CPU_DATA<51> CPU_DATA<52>

CPU_DATA<54>

CPU_DATA<53>

CPU_DATA<55> CPU_DATA<56> CPU_DATA<57> CPU_DATA<58> CPU_DATA<59> CPU_DATA<60> CPU_DATA<61> CPU_DATA<62> CPU_DATA<63>

PMU_CPU_HRESET_L

JTAG_CPU_TRST_L

JTAG_CPU_TMS

BB_MISO

MAXBUS_SLEEP

CPU_HRESET_L

ICT_TRST_L

INT_I2C_DATA0 INT_I2C_CLK0

BB_EEPR_WP_PD

BB_SCK

BB_MOSI

JTAG_CPU_TDI

BBANG_JTAG_TCK

ESP_EN_L

BB_RESET_L

MAXBUS_SLEEP

BBANG_TCK_EN

BBANG_JTAG_TCK

JTAG_CPU_TCK

BB_EEPR_ADDR

BB_SCK

BB_MISO

BB_MOSI

BBANG_JTAG_TCK

ESP_EN_L BFR_TDO ICT_TRST_L

BBANG_HRESET_L

INT_I2C_DATA0

BFR_TDO

BB_XTAL1_SPN

INT_I2C_CLK0

BBANG_HRESET_L

RESET_VREF

PMU_CPU_HRESET_L

38

33

16

15

39

15

39

8

23

8

23

38

39

7

39

13

7

13

39

36

33

36

29

39

6

7

11

39

6

39

11

29

6

8

25

5

8

6

5

6

5

6

6 5

6

39

5

6

5

6

G

D

S

G

D

S

04

G

D

S

G

D

S

D

G

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L PULLUP TO ENSURE THAT Vgs OF PASS TRANSISTOR ON CPU_PLL_CFG<4> IS MET.

R10ER01ER00D

R10E, R01E, OR PULLUP STUFFED

STUFF PASS TRANSISTOR ONLY IF

R00AR01A R10D

7.0X 1250

1 0111 17 0 0111 07 1 1010 1A

0 0110 06

0 1100 0C

10671333

1000

4.0X

R10CR00CR01CR10BR00BR10A R00E

E ABCD HEX

4 0123

CPU CONFIGURATION

1 1110 1E

12671583

11331417

1500 1200

21.0X

20.0X

18.0X

17.0X

13.5X

13.0X

12.5X

11.5X

12.0X

11.0X

10.5X

10.0X

14.0X

15.0X

16.0X

28003500

2167 2250

2833 3000 3333

2000 2083

2667

2500

2333 1867

2000 2133

1733 1800

2267 2400 2667

1600 1667

1 0100 14

1 1111 1F

1 1011 1B

1 0011 13

1 0010 12

1 0000 10

0 1110 0E

1 0101 15

1 1101 1D

1 0001 11

1 1100 1C

1533

1400

1333

1467

1917

1750

1667

1833

1 1001 19

1 1000 18

0 0000 00

24.0X

28.0X 4667 3733

4000 3200

1 0110 16

1167

1083

1000

0 0001 01

0 0010 02

0 0101 05

0 1101 0D

0 1010 0A

0 1000 08

0 0100 04

0 0011 03PLL BYPASS

167MHZ

CORE FREQUENCY

(AT BUS FREQUENCY)

CPU_PLL_CFG

0 1111 0F

(Bus-to-Core)

133MHZ

PLL OFF

(MHZ)

CPU FREQUENCY CONFIGURATION

LOW SPEED 0 0 HIGH SPEED 0 1 PLL DISABLE 1 X

APOLLO 7

0.0X

1.0X

2.0X

3.0X

6.0X

6.5X

7.5X

9.0X

8.0X

8.5X

9.5X

667

500

333

5.5X

5.0X 833

917

0 1001 09

0 1011 0B

667 733 800 867

533

400

267

933

1.8V INTERFACE

NEED TO CHARACTERIZE

INVERTER TO INVERT HRESET_L

DESKTOP HAD PROBLEM USING

MAX BUS MODE

APPLICATION

60X BUS MODE

2.5V INTERFACE

1.5V INTERFACE

1.8V INTERFACE

LOW

HIGH

TIED

CPU_HRESET_L

CPU_HRESET_INV

CPU_HRESET_L

CPU_EMODE0_L (PROCESSOR)

SIGNAL

CPU_BUS_VSEL

(PROCESSOR)

APOLLO ONLY SUPPORTS MAXBUS

BUSTYPE SELECT

INVERTED HRESET_L

1.5V INTERFACE

MAXBUS VSEL

CPU CONFIGURATION

STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC

MULTIPLIER

R01DR01B

CPU PLL CONFIG CIRCUITRY

MF

1/16W

NO STUFF

0

5%

402

R63

1

2

1/16W

NO STUFF

402

MF

0

5%

R92

1

2

10K

1/16W 402

MF

5%

R35

1

2

10K

1/16W 402

MF

5%

R50

1

2

402

1/16W

5%

10K

MF

R68

1

2

10K

402

MF

1/16W

5%

R79

1

2

47K

MF

1/16W

5%

402

R133

1

2

10K

MF

1/16W

5%

402

R132

1

2

5%

1/16W

MF

402

82K

R14

1

2

0

5% 1/16W

402

MF

NO STUFF

R31

1

2

NO STUFF

5% 1/16W MF 402

0

R23

1

2

2N7002DW

SOT-363

Q14

3

5

4

2N7002DW

SOT-363

Q14

6

2

1

1_5V_MAXBUS

SN74AUC1G04

SC70-5

U12

2

3

5

4

CPU_BTR

5%

0

1/16W MF 402

R12

1

2

CPU_BST

2N7002DW

SOT-363

Q3

6

2

1

SOT-363

2N7002DW

CPU_BST

Q3

3

5

4

+5V_SLEEP

1_5V_MAXBUS

402

22

5% MF

1/16W

R5

21

5%

0

402

MF

1/16W

CPU_BTR

R70

1

2

402

10K

5% 1/16W MF

CPU_BST

R18

1

2

402

5% MF

1/16W

22

R110

21

1_8V_MAXBUS

402

1/16W

5% MF

10

R17

1

2

SM

2N7002

Q13

3

1

2

2N3904

SM

Q12

1

3

2

1%

1/16W

MF

402

249K

R131

1 2

0

CPU_BST

402

1/16W

5% MF

R43

1

2

+3V_SLEEP

NO STUFF

0

5% 1/16W MF 402

R44

1

2

NO STUFF

5% MF

1/16W

0

402

R48

1

2

NO STUFF

0

5% 1/16W MF 402

R60

1

2

NO STUFF

1/16W

5%

0

402

MF

R64

1

2

1/16W MF 402

NO STUFF

0

5%

R76

1

2

CPU_BTR

1/16W 402

0

5% MF

R84

1

2

NO STUFF

402

MF

1/16W

5%

0

R78

1

2

NO STUFF

402

1/16W

0

5% MF

R88

1

2

051-6570

7

44

B

CPU_PLL_CFG<0>

CPU_EMODE0_LCPU_HRESET_L

CPU_HRESET_L

CPU_HRESET_INV

MAXBUS_SLEEP

CPU_BUS_VSEL

CPU_VCORE_HI_OC

CPU_PLL_STOP_OC

PLL_STOP_L

CPU_PLL_STOP_OC

CPU_PLL_STOP_BASE

CPU_PLL_FS00

CPU_PLL_FS10

CPU_PLL_CFG<4>

PLL_STOP_L

CPU_PLL_FS01

CPU_PLL_CFG<3>

CPU_PLL_CFG<2>

CPU_PLL_CFG<1>

CPU_PLL_CFGEXT

MAXBUS_SLEEP

38

33

16

15

39

8

7

6

33

29

6

5

5 5

5

29

7

5

7

5

(PLL6)

VSSA_7

(PLL6)

VDD15A_7

D_42

D_41

D_40

D_39

D_38

D_44

D_43

D_45 D_46 D_47 D_48

D_52

D_51

D_50

D_49

D_53

D_55

D_54

D_56 D_57 D_58

D_60

D_59

D_62

D_61

D_63

DBG

DRDY

DTI_0

TEA

TA

DTI_2

DTI_1

D_1

D_0

D_2

D_6

D_5

D_4

D_3

D_7

D_11

D_10

D_9

D_8

D_12

D_14

D_13

D_15 D_16 D_17

D_22

D_21

D_20

D_19

D_18

D_23 D_24 D_25 D_26 D_27

D_32

D_31

D_30

D_29

D_28

D_34

D_33

D_35 D_36 D_37

BR

(1 OF 9)

MAXBUS

INTERFACE

TS

BG

A_0 A_1 A_2 A_3 A_4 A_5

A_9

A_6 A_7 A_8

A_10

A_14

A_13

A_12

A_11

A_20

A_16 A_17 A_18 A_19

A_15

A_27

A_22

A_21

A_30

A_29

A_28

A_26

A_25

A_24

A_23

TT_2

TT_1

TT_0

A_31

TBST TSIZ_0 TSIZ_1 TSIZ_2

CI GBL

TT_4

AACK

QREQ

ARTRY

TT_3

WT

HIT

ANALYZER_CLK

SUSPENDACK

SUSPENDREQ

QACK

STOPCPUCLK

CPU_FB_OUT

CPU_FB_IN

CPU_CLK

TBEN

ACS_REF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BIT 32 TO 39

Spare

2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED

FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE

1: PLL4

0: PLL5 (no spread)

1: PLL4

0: PLL5 (no spread)

PCI0 Source Clock

BIT 40 TO 47

0: Active high

INTREPID BOOT STRAPS

1: Active

OBSOLETE (Should remain high)

OBSOLETE

1: 0-1 IDE / 2-3 PCI1

0: 0 IDE / 1 PCI1

ROM_Ovrly_Rng

1: BootROM on PCI1

0: BootROM on IDE/CardSlot

En_PCI_ROM_P

1: External source

SelPLL4ExtSrc

1: TI PHY workaround

011: 33.3 ohm 101: 40 ohm

110: 66.6 ohm

0: PLL5

BUF_REF_CLK_OUTEnable_h

0: Inactive

1: Active

1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED 3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED

4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED 5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED 6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT

IF A STRAP IS NOT LISTED, THEN IT CANNOT BE CHANGED BY SOFTWARE

THE FOLLOWING STRAP BITS CAN BE CHANGED BY SOFTWARE:

LONG = 1" LONGER THAN MATCHED LENGTH

SHORT = 1" SHORTER THAN MATCHED LENGTH

NO BUS KEEPER - ?

INPUT - PU

INPUT - PD

NO BUS KEEPER - PU

NO BUS KEEPER - PU NO BUS KEEPER - PU

INPUT - PU

NO BUS KEEPER - PU

INPUT NO BUS KEEPER

NO BUS KEEPER

Vout = MaxBus rail (1.8V)

Vin = Intrepid Vcore (1.5V)

BIT2 BIT1 BIT0

BIT0BIT1

001: 50 ohm

010: 100 ohm 100: 200 ohm 000: 200 ohm

111: 28.6 ohm

MaxBus output impedance

100: 83.20MHZ

001: 149.76MHZ

INTREPID OUTPUTS HIGH BY DEFAULT

INTREPID BOOT STRAPS

0: TDI input (JTAG)

Spare

PCI1_REQ1_L / PCI1_GNT1_L

PCI1_REQ2_L / PCI1_GNT2_L

0: REQ/GNT

1: GPIOs

0: REQ/GNT

1: GPIOs

PCI1_REQ0_L / PCI1_GNT0_L

Processor Bus Mode

0: Legacy interface

1: B-mode interface

FireWire PHY interface

1: 60x bus (G3)

0: Max Bus (G4)

BIT 56 TO 63

0: Normal 1394b

TI 1394b workaround

Spare

BIT 48 TO 55

0: Inactive

Spare

PCI1 Source Clock

AnalyzerClk_En_h

1: Active

0: Inactive

DDR_TPDEn_Pol

1: Active low

0: Active high

ExtPLL_SDwn_Pol

1: Active low

Spare

Intrepid MaxBus

NO BUS KEEPER - PU

MAXBUS PULL-UPS

011: 99.84MHZ (1.5X)

MODE A (2.5X) IS FOR STATIC OPERATION

DDR_TPDModeEnable_h

1: TDI output

BIT2

PLL4MODESEL_NXT[2:0] 000: 166.4MHZ (2.5X)

010: 133.12MHZ (2.0X)

MODE C (2.0X) IS FOR CLOCK SLEW OPERATION

InternalSpreadEn

(SW CNTL ONLY)

1K

1%

1/16W

MF

402

R161

1

2

0.22uF

402

CERM

6.3V

20%

C187

1

2

402

MF

1/16W

5%

4.7

R159

1 2

0

5%

1/16W

MF

402

R168

1 2

0

402

MF

1/16W

5%

R155

12

511

402

1%

1/16W

MF

R169

1

2

5%

1/16W

MF

402

10K

R666

1

2

10K

402

MF

1/16W

5%

NO STUFF

R638

1

2

5% MF

402

10K

NO STUFF

1/16W

R639

1

2

MF

402

10K

5%

1/16W

R650

1

2

5%

1/16W

MF

402

10K

R652

1

2

10K

402

MF

1/16W

5%

R620

1

2

10K

402

MF

1/16W

5%

R621

1

2

5%

1/16W

MF

402

10K

NO STUFF

R653

1

2

10K

402

MF

1/16W

5%

R618

1

2

5%

1/16W

MF

402

10K

R619

1

2

NO STUFF

5%

1/16W

MF

402

10K

R640

1

2

5%

1/16W

MF

402

10K

R622

1

2

10K

402

MF

1/16W

5%

NO STUFF

R699

1

2

5%

1/16W

MF

402

10K

NO_SSCG

R693

1

2

5%

1/16W

MF

402

10K

NO STUFF

R694

1

2

NO STUFF

10K

402

MF

1/16W

5%

R664

1

2

10K

402

MF

1/16W

5%

SSCG

R665

1

2

NO STUFF

5%

1/16W

MF

402

10K

R641

1

2

MF

5%

1/16W

402

10K

R684

1

2

5%

1/16W

MF

402

10K

R679

1

2

5%

10K

MF

1/16W

402

SSCG

R678

1

2

10K

402

MF

5%

1/16W

R649

1

2

MF

5%

NO_SSCG

10K

1/16W

402

R651

1

2

402

MF

1/16W

5%

10K

R623

1

2

5%

1/16W

MF

402

10K

R677

1

2

5%

1/16W

MF

402

10K

R648

1

2

10K

402

MF

1/16W

5%

NO STUFF

R642

1

2

5%

1/16W

MF

402

10K

R698

1

2

NO STUFF

5%

1/16W

MF

402

10K

R643

1

2

NO STUFF

10K

402

MF

1/16W

5%

R668

1

2

5%

1/16W

MF

402

10K

R667

1

2

10K

402

MF

1/16W

5%

SSCG

R695

1

2

5%

1/16W

MF

402

10K

R626

1

2

10K

402

MF

1/16W

5%

NO STUFF

R683

1

2

10K

402

MF

1/16W

5%

R624

1

2

5%

1/16W

MF

402

10K

R625

1

2

10K

402

MF

5%

1/16W

R655

1

2

NO STUFF

5%

1/16W

MF

402

10K

R654

1

2

10K

402

MF

1/16W

5%

NO_SSCG

R680

1

2

5%

1/16W

MF

402

10K

SSCG

R696

1

2

5%

1/16W

MF

402

10K

NO_SSCG

R681

1

2

NO STUFF

10K

402

MF

1/16W

5%

R646

1

2

5%

1/16W

MF

402

10K

R644

1

2

NO STUFF

10K

402

MF

1/16W

5%

R670

1

2

NO STUFF

5%

1/16W

MF

402

10K

R697

1

2

NO STUFF

10K

402

MF

1/16W

5%

R645

1

2

5%

1/16W

MF

402

10K

NO STUFF

R669

1

2

5%

1/16W

MF

402

10K

R629

1

2

5%

1/16W

MF

402

10K

R658

1

2

10K

402

MF

1/16W

5%

NO STUFF

R627

1

2

10K

402

MF

1/16W

5%

R682

1

2

5%

1/16W

MF

402

10K

R628

1

2

10K

402

MF

1/16W

5%

R657

1

2

5%

1/16W

MF

402

10K

R685

1

2

10K

402

MF

1/16W

5%

R656

1

2

NO STUFF

0

5%

1/16W

MF

402

R146

1

2

402

MF

1/16W

5%

0

R140

1 2

0

5%

1/16W

MF

402

R141

1

2

402

MF

1/16W

5%

0

NO STUFF

R128

1 2

0

5%

1/16W

MF

402

R147

1 2

0

5%

1/16W

MF

402

NO STUFF

R136

1 2

INTREPID-REV2.1

BGA

CRITCAL

U51

B29

H13

G8

H23

D24 D25

J22 B25 H22 G22 D22 B24 B23 E22 J21 G21

A27

E21 A24 D21 A23 H20 B22 H21 A22 E20 B21

E24

D20 A21

G23 B26 A26 D23 A25 E23

E26

E29

G26

J15

J24 H16 A30

G28

K25 D29 B30

D10 G12

B10 J13 A10 D12 E13 G13 B11 D13 A11 G14

E11

H14 E14 B12 G15 B13 H15 D14 B14 A12 G16

H11

E15 J16 D15 A14 A13 D16 E16 G17 B15 H17

B9

A15 B16 E17 A16 J18 H18 D17 G18 A17 B17

B8

E18 B18 D18 A18 A19 H19 B19 J19 A20 D19

A9

E19 G19 B20 G20

A8 E12 D11

A29

B31

G27

A32

AH9

AM8

AK9

E27

A31

A28

E28

B27

G24 H24 D26 E25 G25 B28 D27 J25

H26

H25

D28

10K

402

MF

1/16W

5%

R152

1 2

5%

1/16W

MF

402

10K

R150

1 2

10K

402

MF

1/16W

5%

R151

1 2

SM1

1/16W

5%

10K

RP2

1 8

SM1

1/16W

5%

10K

RP2

4 5

SM1

10K

5%

1/16W

RP2

2 7

SM1

10K

5%

1/16W

RP3

2 7

SM1

10K

5%

1/16W

RP3

1 8

SM1

10K

1/16W

5%

RP3

3 6

SM1

1/16W

5%

10K

RP3

4 5

SM1

10K

1/16W

5%

RP2

3 6

051-6570

44

8

B

CPU_DATA<40>

CPU_DATA<47>

MAXBUS_SLEEP

CPU_DATA<42>

CPU_DATA<50>

CPU_DATA<53>

CPU_DATA<55>

CPU_DATA<43> CPU_DATA<44>

CPU_DATA<46>

CPU_DATA<41>

CPU_DATA<38>

CPU_DATA<34>

CPU_TSIZ<0>

CPU_GBL_L

SYSCLK_CPU

CPU_QREQ_L

CPU_DBG_L

CPU_BG_L

CPU_AACK_L

CPU_TEA_L

CPU_DRDY_L

CPU_HIT_L

CPU_ARTRY_L

CPU_BR_L

CPU_TS_L

CPU_TA_L

MAXBUS_SLEEP

CPU_DATA<39>

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<33>

CPU_DATA<54>

CPU_DATA<45>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<49>

CPU_DATA<48>

CPU_DATA<63>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<32>

+1_5V_INTREPID_PLL

INT_CPUFB_OUT

INT_CPUFB_OUT_SHORT

INT_CPUFB_IN

INT_CPUFB_OUT_NORM

INT_CPUFB_IN_NORM

INT_CPUFB_LONG

MAXBUS_SLEEP

+1_5V_INTREPID_PLL7

CPU_TEA_L

CPU_TA_L

CPU_DTI<2>

CPU_DTI<1>

CPU_DTI<0>

CPU_DRDY_L

CPU_DBG_L

CPU_DATA<63>

CPU_DATA<61> CPU_DATA<62>

CPU_DATA<60>

CPU_DATA<58> CPU_DATA<59>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<55>

CPU_DATA<53> CPU_DATA<54>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<48>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<47>

CPU_DATA<46>

CPU_DATA<44> CPU_DATA<45>

CPU_DATA<43>

CPU_DATA<41> CPU_DATA<42>

CPU_DATA<40>

CPU_DATA<39>

CPU_DATA<38>

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<35>

CPU_DATA<34>

CPU_DATA<33>

CPU_DATA<32>

CPU_DATA<30> CPU_DATA<31>

CPU_DATA<29>

CPU_DATA<28>

CPU_DATA<27>

CPU_DATA<25> CPU_DATA<26>

CPU_DATA<24>

CPU_DATA<23>

CPU_DATA<22>

CPU_DATA<20> CPU_DATA<21>

CPU_DATA<19>

CPU_DATA<17> CPU_DATA<18>

CPU_DATA<16>

CPU_DATA<15>

CPU_DATA<14>

CPU_DATA<12> CPU_DATA<13>

CPU_DATA<11>

CPU_DATA<10>

CPU_DATA<7>

CPU_DATA<9>

CPU_DATA<8>

CPU_DATA<6>

CPU_DATA<5>

CPU_DATA<2>

CPU_DATA<4>

CPU_DATA<3>

CPU_DATA<0> CPU_DATA<1>

CPU_BR_L CPU_BG_L

CPU_TS_L

CPU_ADDR<1>

CPU_ADDR<0>

CPU_ADDR<2> CPU_ADDR<3> CPU_ADDR<4> CPU_ADDR<5> CPU_ADDR<6> CPU_ADDR<7> CPU_ADDR<8> CPU_ADDR<9> CPU_ADDR<10>

CPU_ADDR<12>

CPU_ADDR<11>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<15> CPU_ADDR<16> CPU_ADDR<17>

CPU_ADDR<19>

CPU_ADDR<18>

CPU_ADDR<20>

CPU_ADDR<22>

CPU_ADDR<21>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27>

CPU_ADDR<29>

CPU_ADDR<28>

CPU_ADDR<30> CPU_ADDR<31>

CPU_CI_L

CPU_TBST_L

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_TT<1>

CPU_TT<0>

CPU_TT<2>

CPU_TT<4>

CPU_TT<3>

CPU_WT_L

CPU_AACK_L

CPU_HIT_L

CPU_ARTRY_L

CPU_QREQ_L

CPU_QACK_L INT_SUSPEND_REQ_L INT_SUSPEND_ACK_L

INT_CPUFB_IN INT_CPUFB_OUT SYSCLK_LA_TP

CPU_CLK_EN

SYSCLK_CPU_UF

INTREPID_ACS_REF

CPU_TBEN

MAXBUS_SLEEP

CPU_DATA<35>

38

33

16

15

8

36

7

36

7

36

38

7

36

7

36

8

6

8

36

35

8

6

8

14

35

6

8

36

8

36

8

36

8

36

35

6

8

6

5

6

5

6

12

8

35

8

35

5

38

5

6

5

29

8

29

35

5

6

A0 A1

A6

A2 A3 A4 A5

A9

A8

A7

A10 A11 A12 A13 A14 A15 A16

A20

A17 A18 A19

CE OE WE WP PWD

GND

DQ0 DQ1

DQ6

DQ5

DQ2 DQ3 DQ4

DQ7

VPP VCC

FEPR-1MX8

(2 OF 9)

DDR_VREF_1

DDR_VREF_0

DDR_DATA_0 DDR_DATA_1 DDR_DATA_2 DDR_DATA_3 DDR_DATA_4 DDR_DATA_5 DDR_DATA_6 DDR_DATA_7 DDR_DATA_8 DDR_DATA_9 DDR_DATA_10 DDR_DATA_11 DDR_DATA_12 DDR_DATA_13 DDR_DATA_14 DDR_DATA_15 DDR_DATA_16 DDR_DATA_17 DDR_DATA_18 DDR_DATA_19 DDR_DATA_20 DDR_DATA_21

DDR_DATA_25 DDR_DATA_26 DDR_DATA_27 DDR_DATA_28 DDR_DATA_29 DDR_DATA_30

DDR_DATA_33 DDR_DATA_34 DDR_DATA_35 DDR_DATA_36 DDR_DATA_37 DDR_DATA_38 DDR_DATA_39 DDR_DATA_40 DDR_DATA_41 DDR_DATA_42 DDR_DATA_43 DDR_DATA_44 DDR_DATA_45 DDR_DATA_46 DDR_DATA_47 DDR_DATA_48 DDR_DATA_49 DDR_DATA_50 DDR_DATA_51 DDR_DATA_52 DDR_DATA_53 DDR_DATA_54 DDR_DATA_55 DDR_DATA_56 DDR_DATA_57 DDR_DATA_58 DDR_DATA_59 DDR_DATA_60 DDR_DATA_61 DDR_DATA_62 DDR_DATA_63

DDR_DATA_22 DDR_DATA_23 DDR_DATA_24

DDR_DATA_31 DDR_DATA_32

DDR_BA_0 DDR_BA_1

DDRCS_3

DDRCS_2

DDRCS_1

DDRCS_0

DDR_DQS_7

DDR_DQS_6

DDR_DQS_5

DDR_DQS_4

DDR_DQS_3

DDR_DQS_2

DDR_DQS_1

DDR_DQS_0

DDR_DM_7

DDR_DM_6

DDR_DM_5

DDR_DM_4

DDR_DM_3

DDR_DM_2

DDR_DM_1

DDR_DM_0

DDRRAS DDRCAS

DDRWE DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3

DDR_MCLK_0_P DDR_MCLK_0_N DDR_MCLK_1_P DDR_MCLK_1_N DDR_MCLK_2_P DDR_MCLK_2_N DDR_MCLK_3_P DDR_MCLK_3_N DDR_MCLK_4_P DDR_MCLK_4_N DDR_MCLK_5_P DDR_MCLK_5_N

DDR_REF

DDR_SELHI_0 DDR_SELHI_1 DDR_SELLO_0 DDR_SELLO_1

MEMORY

DDR

INTERFACE

DDR_A_10 DDR_A_11 DDR_A_12

DDR_A_9

DDR_A_8

DDR_A_7

DDR_A_6

DDR_A_5

DDR_A_4

DDR_A_3

DDR_A_2

DDR_A_1

DDR_A_0

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

OVERRIDE ROM MODULE INTERCEPTS ROM CHIP SELECT

CLOCKS

PINS ARE SWAPABLE FOR RPAKS

SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS

Weak pulldowns ensure CKEs stay low after 2.5V I/O to Intrepid shuts off.

MEM_VREF

’2’ & ’3’ GO TO SLOT B

’0’ & ’1’ GO TO SLOT A

’2’ & ’3’ GO TO SLOT B

’0’ & ’1’ GO TO SLOT A

’1’S ARE SAME POLARITY (ACTIVE-HI)

’0’S ARE SAME POLARITY (ACTIVE-LO)

CNTL

BA

ADDR

CKE

CS

INT - DDR/BOOTROM

1MB BOOT ROM

INT_2_5V_COLD

10K

5% 1/16W MF 402

R260

1

2

INT_2_5V_COLD

402

MF

1/16W

5%

10K

R265

1

2

TSOP

1MX8-3.3V

OMIT

U11

21 20

36

6 5 4 3 2

1 40 13 37

19

38

18 17 16 15 14

8

7

22

25 26 27 28 32 33 34 35

23 39

24

10

30 3111

9 12

NO STUFF

5%

0

1/16W

402

MF

R1

1 2

NO STUFF

5%

1/16W

MF

402

0

R271

1 2

NO STUFF

MF

1/16W

5%

0

402

R194

1 2

NO STUFF

5%

0

1/16W 402

MF

R236

1

2

22

5%

1/16W

MF

402

R176

1 2

1K

1% MF

402

1/16W

R209

1

2

10K

1%

1/16W

MF

402

R208

1

2

0.1uF

20% 10V

CERM

402

C249

1

2

10K

402

MF

1/16W

1%

R202

1

2

2.2uF

20% 805

CERM

10V

C125

1

2

402

CERM

10V

20%

0.1uF

C773

1

2

402

CERM

10V

20%

0.1uF

C122

1

2

5%

10K

1/16W

MF

402

R112

1

2

+3V_MAIN

CRITICAL

INTREPID-REV2.1

BGA

U51

H32

AN35 AM35 AM36 AL36

AN34 AN36 AL35 AL33

L29

K30

H35 G35

G33 H33 D35

G36 F36 F35 E35 E36 G32 D36 H36

L30 M29

AK32 AK33

AH35 AG36 AH36 AH32 AG32 AG31 AE32 AF35 AF36 AE36

AK31

AE35 AE33 AD36 AD35 AA36 AA35 AA33 AB36 AB35 AC36

AK35

AA32 AB33

V36 U33 U32 V35 T30 U36 U35 T36

AK36

P33 R30 P35 P36 R36 R35 R33 R32 N35 M36

AJ32

L35 M35 M33 L36 N33 M30 J32 J33 J35 K32

AJ35

K33 J36 K36 K35

AJ36 AG33 AG35

AJ33 AH33 AD33 AC35 T35 T33 N32 L33

AJ31 AH31 AD32 AB30 V30 P32 N29 L32

Y33

Y32

Y36

Y35

W30

Y30

W33

W32

V32

V33

W36

W35

AA22

AB32 AE29 N30 T32

Y22 T22

402

MF

10K

5% 1/16W

R691

1

2

5%

1K

402

MF

1/16W

R674

1 2

22

5%

1/16W

SM1

RP20

4 5

SM1

5%

22

1/16W

RP20

3 6

22

5%

1/16W

SM1

RP22

1 8

SM1

22

5%

1/16W

RP22

2 7

SM1

1/16W

5%

22

RP20

2 7

SM1

1/16W

5%

22

RP22

3 6

22

402

MF

1/16W

5%

R162

1 2

SM1

1/16W

5%

22

RP20

1 8

SM1

1/16W

5%

22

RP22

4 5

22

1/16W

5%

SM1

RP31

3 6

1/16W

5%

22

SM1

RP29

3 6

1/16W

5%

22

SM1

RP31

2 7

22

5%

1/16W

SM1

RP31

1 8

22

5%

1/16W

SM1

RP31

4 5

1/16W

5%

22

SM1

RP29

4 5

22

5%

1/16W

SM1

RP29

1 8

22

5%

1/16W

SM1

RP29

2 7

1/16W

5%

22

SM1

RP14

3 6

1/16W

5%

22

SM1

RP12

2 7

1/16W

5%

22

SM1

RP12

1 8

22

5%

1/16W

SM1

RP12

3 6

SM1

1/16W

5%

22

RP12

4 5

22

5%

1/16W

SM1

RP9

2 7

22

5%

1/16W

SM1

RP9

1 8

22

5%

1/16W

SM1

RP14

2 7

22

5%

1/16W

SM1

RP9

4 5

22

5%

1/16W

SM1

RP14

1 8

22

5%

1/16W

SM1

RP14

4 5

22

5%

1/16W

SM1

RP17

4 5

SM1

1/16W

5%

22

RP9

3 6

SM1

5%

22

1/16W

RP17

1 8

22

5%

SM1

1/16W

RP17

2 7

SM1

1/16W

5%

22

RP17

3 6

+3V_MAIN

INT_2_5V_COLD

402

MF

1/16W

5%

10K

R247

1

2

INT_2_5V_COLD

402

MF

1/16W

5%

10K

R257

1

2

051-6570

44

9

B

CRITICAL

U11

IC,BootRom Q16A

1 ?

341S1460

ROM_OE_L

ROM_OE_TP_L

INT_MEM_VREF

SYSCLK_DDRCLK_B0_L_UF

PCI_AD<11> PCI_AD<12> PCI_AD<13> PCI_AD<14> PCI_AD<15> PCI_AD<16> PCI_AD<17>

PCI_AD<7> PCI_AD<8>

PCI_AD<26> PCI_AD<27> PCI_AD<28> PCI_AD<29> PCI_AD<30>

RAM_ADDR<3>

RAM_ADDR<2>

RAM_CKE<3>

RAM_CKE<1> RAM_CKE<2>

MEM_DQS<2>

RAM_BA<1>

MEM_RAS_L RAM_RAS_L

RAM_WE_LMEM_WE_L

MEM_CAS_L RAM_CAS_L

RAM_BA<0>

RAM_ADDR<11>

RAM_ADDR<9>

RAM_ADDR<12>

RAM_ADDR<10>

RAM_ADDR<8>

MEM_ADDR<7>

RAM_ADDR<5>MEM_ADDR<5>

MEM_ADDR<3>

RAM_ADDR<1>MEM_ADDR<1>

RAM_ADDR<4>MEM_ADDR<4>

RAM_ADDR<0>

MEM_CKE<3>

MEM_CKE<1>

MEM_CS_L<3>

SYSCLK_DDRCLK_B0

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_A1_L

SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A0

SYSCLK_DDRCLK_A0_UF

SYSCLK_DDRCLK_A1

MEM_MUXSEL_MSB MEM_MUXSEL_LSB_L_TP

MEM_DATA<0> MEM_DATA<1> MEM_DATA<2> MEM_DATA<3> MEM_DATA<4> MEM_DATA<5> MEM_DATA<6> MEM_DATA<7> MEM_DATA<8> MEM_DATA<9> MEM_DATA<10> MEM_DATA<11> MEM_DATA<12> MEM_DATA<13> MEM_DATA<14>

MEM_DATA<16> MEM_DATA<17> MEM_DATA<18> MEM_DATA<19> MEM_DATA<20> MEM_DATA<21> MEM_DATA<22> MEM_DATA<23>

MEM_DATA<26> MEM_DATA<27> MEM_DATA<28>

MEM_DATA<30>

MEM_DATA<32> MEM_DATA<33> MEM_DATA<34> MEM_DATA<35> MEM_DATA<36>

MEM_DATA<40> MEM_DATA<41> MEM_DATA<42> MEM_DATA<43>

MEM_DATA<45>

MEM_DATA<47>

MEM_DATA<49>

MEM_DATA<53>

MEM_DATA<55> MEM_DATA<56> MEM_DATA<57> MEM_DATA<58> MEM_DATA<59> MEM_DATA<60> MEM_DATA<61> MEM_DATA<62> MEM_DATA<63>

MEM_DATA<15>

MEM_DATA<24> MEM_DATA<25>

MEM_DATA<29>

MEM_DATA<31>

MEM_DATA<54>

MEM_BA<0> MEM_BA<1>

MEM_CS_L<3>

MEM_CS_L<0>

MEM_CS_L<2>

MEM_DQS<0> MEM_DQS<1>

MEM_DQS<3> MEM_DQS<4> MEM_DQS<5> MEM_DQS<6> MEM_DQS<7>

MEM_DQM<2>

MEM_DQM<0> MEM_DQM<1>

MEM_DQM<3> MEM_DQM<4> MEM_DQM<5> MEM_DQM<6> MEM_DQM<7>

MEM_RAS_L MEM_CAS_L

MEM_WE_L MEM_CKE<0> MEM_CKE<1> MEM_CKE<2> MEM_CKE<3>

SYSCLK_DDRCLK_A0_UF SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A1_UF

INT_DDRCLK2_P_TP

SYSCLK_DDRCLK_B0_UF

INT_DDRCLK2_N_TP

SYSCLK_DDRCLK_B0_L_UF SYSCLK_DDRCLK_B1_UF SYSCLK_DDRCLK_B1_L_UF

INT_DDRCLK5_N_TP

INT_DDRCLK5_P_TP

INT_MEM_REF_H

MEM_MUXSEL_MSB_L_TP

MEM_MUXSEL_LSB

MEM_ADDR<0> MEM_ADDR<1> MEM_ADDR<2>

MEM_ADDR<4> MEM_ADDR<5>

MEM_ADDR<10> MEM_ADDR<11>

INT_MEM_VREF

RAM_CS_L<0>

RAM_ADDR<6>

RAM_ADDR<7>

MEM_BA<1>

MEM_ADDR<11>

MEM_BA<0>

MEM_ADDR<12>

MEM_ADDR<10>

MEM_ADDR<9>

MEM_ADDR<8>

MEM_ADDR<6>

MEM_ADDR<2>

MEM_ADDR<0>

MEM_CKE<2>

SYSCLK_DDRCLK_A1_UF

MEM_ADDR<9>

MEM_DATA<37> MEM_DATA<38> MEM_DATA<39>

MEM_DATA<44>

MEM_DATA<46>

MEM_DATA<48>

MEM_DATA<50> MEM_DATA<51> MEM_DATA<52>

+2_5V_INTREPID

RAM_CKE<0>

RAM_CKE<3>

RAM_CKE<1>

SYSCLK_DDRCLK_A0_L

MEM_CS_L<0>

RAM_CKE<2>

ROM_ONBOARD_CS_TP_L

MEM_ADDR<12>

MEM_CS_L<1>

MEM_CKE<0>

ROM_CS_TP_L

SYSCLK_DDRCLK_B1_L_UF

MEM_ADDR<7>

MEM_ADDR<6>

SYSCLK_DDRCLK_B0_UF

SYSCLK_DDRCLK_B1_UF

MEM_ADDR<3>

MEM_CS_L<1>

MEM_CS_L<2>

RAM_CS_L<3>

RAM_CS_L<2>

RAM_CS_L<1>

PCI_AD<25>

PCI_AD<10>

PCI_AD<9>

PCI_AD<24>

SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_B1_L

PCI_AD<3>

SYSCLK_DDRCLK_B0_L

PCI_AD<2>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<0>

PCI_AD<31>

PCI_AD<1>

INT_RESET_L

ROM_RW_TP_L

PCI_AD<18> PCI_AD<19> PCI_AD<20>

ROM_RW_L ROM_WP_L

ROM_ONBOARD_CS_L

ROM_CS_L

MEM_ADDR<8>

RAM_CKE<0>

39

37

24

38

24

18

35

16

35

18

35

39

38

35

17

35

11

35

35 35

35

35 35

35

35 35

35

35 35

35

38

35

15

11

35

11

35

17

35

17

35

17

29

17

39

35

11

12

24

9

12

11

9

10

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

10

9

10

9

38

10

9

11

9

10

9

11

9

24

9

24

9

11

12

9

11

12

11

12

13

24

12

39 12

9

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

16BIT 2:1 DDR MUXES

BIT 48..63BIT 32..47

BIT 16..31

BIT 0..15

SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND

20% 10V CERM 402

0.1uF

C727

1

2

402

CERM

10V

20%

0.1uF

C745

1

2

20% 10V CERM 402

0.1uF

C742

1

2

20% 10V CERM 402

0.1uF

C732

1

2

402

CERM

10V

20%

0.1uF

C733

1

2

20% 10V CERM 402

0.1uF

C741

1

2

402

CERM

10V

20%

0.1uF

C764

1

2

20% 10V CERM 402

0.1uF

C734

1

2

402

CERM

10V

20%

0.1uF

C726

1

2

20% 10V CERM 402

0.1uF

C730

1

2

20% 10V CERM 402

0.1uF

C758

1

2

20% 10V CERM 402

0.1uF

C757

1

2

CRITICAL

BGA

CBTV4020

U28

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7 K8

K10 H10 F10 D10 B10

A9 B7 A6 A4 A3 A1 C1 E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

CRITICAL

BGA

CBTV4020

U27

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7

K8 K10 H10 F10 D10 B10

A9

B7

A6

A4

A3

A1

C1

E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

CBTV4020

BGA

CRITICAL

U18

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7

K8 K10 H10 F10 D10 B10

A9

B7

A6

A4

A3

A1

C1

E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

CBTV4020

BGA

CRITICAL

U16

F1 H1 K1 K3 K4 K6 J7

K9 J10 G10 E10

C10 A10 A8 A7 A5 B4 A2 B1 D1

G1 J1 K2 J4 K5 K7

K8 K10 H10 F10 D10 B10

A9

B7

A6

A4

A3

A1

C1

E1

F2 H2 J2 J3 J5 J6 J8 J9 H9 F9 E9 C9 B9 B8 B6 B5 B3 B2 C2 E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

B

4410

051-6570

RAM_DATA_B<13>

MEM_DQS<3>

MEM_DATA<31>

RAM_DATA_B<25>

RAM_DATA_B<45>

RAM_DATA_B<47>

MEM_DATA<5>

MEM_DATA<7>

+2_5V_INTREPID +2_5V_INTREPID

+2_5V_INTREPID

RAM_DATA_A<57>

MEM_DQM<7>

RAM_DATA_A<56>

RAM_DATA_A<48>

RAM_DATA_A<50> RAM_DATA_A<51>

RAM_DATA_A<49>

RAM_DATA_A<53>

RAM_DATA_A<52>

RAM_DATA_A<54> RAM_DATA_A<55> RAM_DQS_A<6> RAM_DQM_A<6>

MEM_MUXSEL_MSB

MEM_DATA<63>

MEM_DQS<7>

MEM_DATA<62>

MEM_DATA<60> MEM_DATA<61>

MEM_DATA<57> MEM_DATA<58> MEM_DATA<59>

MEM_DATA<56>

MEM_DQM<6>

MEM_DATA<55>

MEM_DATA<54>

MEM_DQS<6>

MEM_DATA<52> MEM_DATA<53>

MEM_DATA<50>

MEM_DATA<49>

MEM_DATA<51>

RAM_DQM_A<7>

MEM_DATA<48>

RAM_DQS_A<7>

RAM_DATA_A<62> RAM_DATA_A<63>

RAM_DATA_A<60> RAM_DATA_A<61>

RAM_DATA_A<59>

RAM_DATA_A<58>

RAM_DATA_B<59> RAM_DATA_B<60> RAM_DATA_B<61> RAM_DATA_B<62> RAM_DATA_B<63> RAM_DQS_B<7> RAM_DQM_B<7>

RAM_DATA_B<53> RAM_DATA_B<54> RAM_DATA_B<55>

RAM_DATA_B<51> RAM_DATA_B<52>

RAM_DQS_B<6> RAM_DQM_B<6> RAM_DATA_B<56> RAM_DATA_B<57> RAM_DATA_B<58>

RAM_DATA_B<50>

RAM_DATA_B<49>

RAM_DATA_B<48>RAM_DATA_A<41>

MEM_DQM<5>

RAM_DATA_A<40>

RAM_DATA_A<32>

RAM_DATA_A<34> RAM_DATA_A<35>

RAM_DATA_A<33>

RAM_DATA_A<37>

RAM_DATA_A<36>

RAM_DATA_A<38> RAM_DATA_A<39> RAM_DQS_A<4> RAM_DQM_A<4>

MEM_MUXSEL_MSB

MEM_DATA<47>

MEM_DQS<5>

MEM_DATA<46>

MEM_DATA<44> MEM_DATA<45>

MEM_DATA<41> MEM_DATA<42> MEM_DATA<43>

MEM_DATA<40>

MEM_DQM<4>

MEM_DATA<39>

MEM_DATA<38>

MEM_DQS<4>

MEM_DATA<36> MEM_DATA<37>

MEM_DATA<34>

MEM_DATA<33>

MEM_DATA<35>

RAM_DQM_A<5>

MEM_DATA<32>

RAM_DQS_A<5>

RAM_DATA_A<46> RAM_DATA_A<47>

RAM_DATA_A<44> RAM_DATA_A<45>

RAM_DATA_A<43>

RAM_DATA_A<42>

RAM_DATA_B<43> RAM_DATA_B<44>

RAM_DATA_B<46>

RAM_DQS_B<5> RAM_DQM_B<5>

RAM_DATA_B<37> RAM_DATA_B<38> RAM_DATA_B<39>

RAM_DATA_B<35> RAM_DATA_B<36>

RAM_DQS_B<4> RAM_DQM_B<4> RAM_DATA_B<40> RAM_DATA_B<41> RAM_DATA_B<42>

RAM_DATA_B<34>

RAM_DATA_B<33>

RAM_DATA_B<32>

RAM_DATA_A<25>

MEM_DQM<3>

RAM_DATA_A<24>

RAM_DATA_A<16>

RAM_DATA_A<18> RAM_DATA_A<19>

RAM_DATA_A<17>

RAM_DATA_A<21>

RAM_DATA_A<20>

RAM_DATA_A<22> RAM_DATA_A<23> RAM_DQS_A<2> RAM_DQM_A<2>

MEM_MUXSEL_LSB

MEM_DATA<30>

MEM_DATA<28> MEM_DATA<29>

MEM_DATA<25> MEM_DATA<26> MEM_DATA<27>

MEM_DATA<24>

MEM_DQM<2>

MEM_DATA<23>

MEM_DATA<22>

MEM_DQS<2>

MEM_DATA<20> MEM_DATA<21>

MEM_DATA<18>

MEM_DATA<17>

MEM_DATA<19>

RAM_DQM_A<3>

MEM_DATA<16>

RAM_DQS_A<3>

RAM_DATA_A<30> RAM_DATA_A<31>

RAM_DATA_A<28> RAM_DATA_A<29>

RAM_DATA_A<27>

RAM_DATA_A<26>

RAM_DATA_B<27> RAM_DATA_B<28> RAM_DATA_B<29> RAM_DATA_B<30> RAM_DATA_B<31> RAM_DQS_B<3> RAM_DQM_B<3>

RAM_DATA_B<21> RAM_DATA_B<22> RAM_DATA_B<23>

RAM_DATA_B<19> RAM_DATA_B<20>

RAM_DQS_B<2> RAM_DQM_B<2> RAM_DATA_B<24>

RAM_DATA_B<26>

RAM_DATA_B<18>

RAM_DATA_B<17>

RAM_DATA_B<16>

RAM_DATA_A<9>

MEM_DQM<1>

RAM_DATA_A<8>

RAM_DATA_A<0>

RAM_DATA_A<2> RAM_DATA_A<3>

RAM_DATA_A<1>

RAM_DATA_A<5>

RAM_DATA_A<4>

RAM_DATA_A<6> RAM_DATA_A<7> RAM_DQS_A<0> RAM_DQM_A<0>

MEM_MUXSEL_LSB

MEM_DATA<15>

MEM_DQS<1>

MEM_DATA<14>

MEM_DATA<12> MEM_DATA<13>

MEM_DATA<9> MEM_DATA<10> MEM_DATA<11>

MEM_DATA<8>

MEM_DQM<0>

MEM_DATA<6>

MEM_DQS<0>

MEM_DATA<4>

MEM_DATA<2>

MEM_DATA<1>

MEM_DATA<3>

RAM_DQM_A<1>

MEM_DATA<0>

RAM_DQS_A<1>

RAM_DATA_A<14> RAM_DATA_A<15>

RAM_DATA_A<12> RAM_DATA_A<13>

RAM_DATA_A<11>

RAM_DATA_A<10>

RAM_DATA_B<11> RAM_DATA_B<12>

RAM_DATA_B<14> RAM_DATA_B<15> RAM_DQS_B<1> RAM_DQM_B<1>

RAM_DATA_B<5> RAM_DATA_B<6> RAM_DATA_B<7>

RAM_DATA_B<3> RAM_DATA_B<4>

RAM_DQS_B<0> RAM_DQM_B<0> RAM_DATA_B<8> RAM_DATA_B<9> RAM_DATA_B<10>

RAM_DATA_B<2>

RAM_DATA_B<1>

RAM_DATA_B<0>

38 38

38

16 16

16

15 15

15

35 35

35

10 10

10

35

10

35

35 35

35

10

35

10

35

10

35

11

9

11

9

9 9

9

11

9

11

9

11

9

11

11 11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

(1 OF 2)(2 OF 2)

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ONE 0.1UF PER SLOT

DDR VREF

DDR BYPASS

SLOT "A"

SLOT "B"

DDR SODIMM CONNS

NC NC

NC

NC NC

NC

CUSTOMER SLOT

UPPER SLOT

SLOT "B"

ADDR=0XA2(WR)/0XA3(RD)

NC

FACTORY SLOT

LOWER SLOT

SLOT "A"

NC

NC NC

ADDR=0XA0(WR)/0XA1(RD)

NC

NC NC

NC

NOTE: The SODIMM connector footprint has a through-hole slot

on the PCB for additional mounting

NC NC

NCNC

NC NC

CERM 402

10V

20%

0.1uF

C140

1

2

CERM 402

10V

20%

0.1uF

C156

1

2

20% CERM

402

10V

0.1uF

C132

1

2

DDR-SO-DIMM-DUAL

F-RT-SM

CRITICAL

J25

112B

115B

100B

99B

111B

110B109B

108B107B

106B105B

102B101B

117B

116B

120B

35B 37B

160B

158B

96B95B

12B

26B

48B

62B

134B

148B

170B

184B

5B

29B 31B

20B

24B

30B 32B

41B 43B

49B

53B

7B

42B 44B

50B

54B

55B

59B

65B 67B

56B

60B

13B

66B 68B

127B 129B

135B

139B

128B 130B

136B

140B

17B

141B

145B

151B 153B

142B

146B

152B 154B

163B 165B

6B

171B

175B

164B 166B

172B

176B

177B

181B

187B 189B

8B

178B

182B

188B 190B

14B

18B

19B

23B

11B

25B

47B

61B

133B

147B

169B

183B

401

402

118B

71B

85B 86B

89B 91B

97B 98B

123B 124B

199B 200B

72B

73B 74B

77B 78B 79B 80B

83B 84B

121B 122B

194B 196B 198B

195B

193B

9B

58B

69B 70B

81B 82B

92B

93B 94B

113B 114B

10B

131B 132B

143B 144B

155B 156B 157B

167B 168B

179B

21B

180B

191B 192B

22B

33B 34B

36B

45B 46B

57B

197B

1B 2B 3B

52B

63B 64B

75B 76B

87B 88B

90B

103B 104B

4B

125B 126B

137B 138B

149B 150B

159B 161B 162B

173B

15B

174B

185B 186B

16B

27B 28B

38B

39B 40B

51B

119B

DDR-SO-DIMM-DUAL

F-RT-SM

CRITICAL

J25

112A

115A

100A

99A

111A

110A109A

108A107A

106A105A

102A101A

117A

116A

120A

35A 37A

160A

158A

96A95A

12A

26A

48A

62A

134A

148A

170A

184A

5A

29A 31A

20A

24A

30A 32A

41A 43A

49A

53A

7A

42A 44A

50A

54A

55A

59A

65A 67A

56A

60A

13A

66A 68A

127A 129A

135A

139A

128A 130A

136A

140A

17A

141A

145A

151A 153A

142A

146A

152A 154A

163A 165A

6A

171A

175A

164A 166A

172A

176A

177A

181A

187A 189A

8A

178A

182A

188A 190A

14A

18A

19A

23A

11A

25A

47A

61A

133A

147A

169A

183A

403

404

118A

71A

85A 86A

89A 91A

97A 98A

123A 124A

199A 200A

72A

73A 74A

77A 78A 79A 80A

83A 84A

121A 122A

194A 196A 198A

195A

193A

9A

58A

69A 70A

81A 82A

92A

93A 94A

113A 114A

10A

131A 132A

143A 144A

155A 156A 157A

167A 168A

179A

21A

180A

191A 192A

22A

33A 34A

36A

45A 46A

57A

197A

1A 2A 3A

52A

63A 64A

75A 76A

87A 88A

90A

103A 104A

4A

125A 126A

137A 138A

149A 150A

159A 161A 162A

173A

15A

174A

185A 186A

16A

27A 28A

38A

39A 40A

51A

119A

805

CERM

6.3V

20%

10uF

C404

1

2

805

CERM

6.3V

20%

10uF

C128

1

2

1K

1% 1/16W MF 402

R299

1

2

402

MF

1/16W

1%

1K

R303

1

2

20% 10V CERM 402

0.1uF

C397

1

2

402

CERM

10V

20%

0.1uF

C403

1

2

+2_5V_MAIN+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN+2_5V_MAIN

+3V_MAIN +3V_MAIN

+3V_MAIN

0.1uF

20% 10V

402

CERM

C169

1

2

20% CERM

402

10V

0.1uF

C391

1

2

0.1uF

10V 402

CERM

20%

C356

1

2

CERM 402

10V

20%

0.1uF

C211

1

2

CERM 402

10V

20%

0.1uF

C127

1

2

+2_5V_MAIN

20%

6.3V CERM 805

10uF

C174

1

2

0.1uF

10V 402

CERM

20%

C150

1

2

20%

6.3V CERM 805

10uF

C157

1

2

CERM 402

10V

20%

0.1uF

C383

1

2

B

4411

051-6570

DDR_VREF

RAM_DATA_A<22>

RAM_RAS_L

RAM_DATA_A<0> RAM_DATA_A<1>

RAM_DQS_A<0> RAM_DATA_A<2>

RAM_DATA_A<3> RAM_DATA_A<8>

RAM_DATA_A<9> RAM_DQS_A<1>

RAM_DATA_A<10> RAM_DATA_A<11>

SYSCLK_DDRCLK_A0 SYSCLK_DDRCLK_A0_L

RAM_DATA_A<16> RAM_DATA_A<17>

RAM_DQS_A<2> RAM_DATA_A<18>

RAM_DATA_A<19> RAM_DATA_A<24>

RAM_DATA_A<25> RAM_DQS_A<3>

RAM_DATA_A<26> RAM_DATA_A<27>

RAM_CKE<1>

RAM_ADDR<12> RAM_ADDR<9>

RAM_ADDR<7> RAM_ADDR<5> RAM_ADDR<3> RAM_ADDR<1>

RAM_ADDR<10> RAM_BA<0> RAM_WE_L RAM_CS_L<0>

RAM_DATA_A<32> RAM_DATA_A<33>

RAM_DQS_A<4> RAM_DATA_A<34>

RAM_DATA_A<35> RAM_DATA_A<40>

RAM_DATA_A<41> RAM_DQS_A<5>

RAM_DATA_A<42> RAM_DATA_A<43>

RAM_DATA_A<48> RAM_DATA_A<49>

RAM_DQS_A<6>

RAM_DATA_A<51>

RAM_DATA_A<57> RAM_DQS_A<7>

RAM_DATA_A<58> RAM_DATA_A<59>

INT_I2C_DATA0 INT_I2C_CLK0

RAM_DATA_A<50>

RAM_DATA_A<56>

DDR_VREF

RAM_DATA_A<4> RAM_DATA_A<5>

RAM_DQM_A<0>

RAM_DATA_A<6>

RAM_DATA_A<7>

RAM_DATA_A<12>

RAM_DATA_A<13> RAM_DQM_A<1>

RAM_DATA_A<14>

RAM_DATA_A<20> RAM_DATA_A<21>

RAM_DQM_A<2>

RAM_DATA_A<23>

RAM_DATA_A<29> RAM_DQM_A<3>

RAM_DATA_A<30> RAM_DATA_A<31>

RAM_CKE<0>

RAM_ADDR<11>

RAM_ADDR<8>

RAM_ADDR<6> RAM_ADDR<4> RAM_ADDR<2> RAM_ADDR<0>

RAM_CAS_L

RAM_CS_L<1>

RAM_DATA_A<36> RAM_DATA_A<37>

RAM_DATA_A<39> RAM_DATA_A<44>

RAM_DATA_A<45> RAM_DQM_A<5>

RAM_DATA_A<46> RAM_DATA_A<47>

SYSCLK_DDRCLK_A1_L SYSCLK_DDRCLK_A1

RAM_DATA_A<52> RAM_DATA_A<53>

RAM_DQM_A<6> RAM_DATA_A<54>

RAM_DATA_A<55> RAM_DATA_A<60>

RAM_DATA_A<61> RAM_DQM_A<7>

RAM_DATA_A<62> RAM_DATA_A<63>

RAM_DATA_A<15>

RAM_DATA_A<28>

RAM_BA<1>

RAM_DQM_A<4> RAM_DATA_A<38>

RAM_DATA_B<23>

DDR_VREF

RAM_DATA_B<0> RAM_DATA_B<1>

RAM_DQS_B<0> RAM_DATA_B<2>

RAM_DATA_B<3> RAM_DATA_B<8>

RAM_DATA_B<9> RAM_DQS_B<1>

RAM_DATA_B<10> RAM_DATA_B<11>

SYSCLK_DDRCLK_B0 SYSCLK_DDRCLK_B0_L

RAM_DATA_B<16> RAM_DATA_B<17>

RAM_DQS_B<2> RAM_DATA_B<18>

RAM_DATA_B<19> RAM_DATA_B<24>

RAM_DATA_B<25> RAM_DQS_B<3>

RAM_DATA_B<26> RAM_DATA_B<27>

RAM_CKE<3>

RAM_ADDR<12> RAM_ADDR<9>

RAM_ADDR<7> RAM_ADDR<5> RAM_ADDR<3> RAM_ADDR<1>

RAM_ADDR<10> RAM_BA<0> RAM_WE_L RAM_CS_L<2>

RAM_DATA_B<32> RAM_DATA_B<33>

RAM_DQS_B<4> RAM_DATA_B<34>

RAM_DATA_B<35> RAM_DATA_B<40>

RAM_DATA_B<41> RAM_DQS_B<5>

RAM_DATA_B<42> RAM_DATA_B<43>

RAM_DATA_B<48> RAM_DATA_B<49>

RAM_DQS_B<6> RAM_DATA_B<50>

RAM_DATA_B<51> RAM_DATA_B<56>

RAM_DATA_B<57> RAM_DQS_B<7>

RAM_DATA_B<58> RAM_DATA_B<59>

INT_I2C_DATA0 INT_I2C_CLK0

DDR_VREF

RAM_DATA_B<4> RAM_DATA_B<5>

RAM_DQM_B<0>

RAM_DATA_B<6>

RAM_DATA_B<7>

RAM_DATA_B<12>

RAM_DATA_B<13> RAM_DQM_B<1>

RAM_DATA_B<14> RAM_DATA_B<15>

RAM_DATA_B<20> RAM_DATA_B<21>

RAM_DQM_B<2> RAM_DATA_B<22>

RAM_DATA_B<28>

RAM_DATA_B<29> RAM_DQM_B<3>

RAM_DATA_B<30> RAM_DATA_B<31>

RAM_CKE<2>

RAM_ADDR<11>

RAM_ADDR<8>

RAM_ADDR<6> RAM_ADDR<4> RAM_ADDR<2> RAM_ADDR<0>

RAM_BA<1> RAM_RAS_L RAM_CAS_L

RAM_CS_L<3>

RAM_DATA_B<36>

RAM_DQM_B<4> RAM_DATA_B<38>

RAM_DATA_B<39> RAM_DATA_B<44>

RAM_DATA_B<45> RAM_DQM_B<5>

RAM_DATA_B<46> RAM_DATA_B<47>

SYSCLK_DDRCLK_B1_L SYSCLK_DDRCLK_B1

RAM_DATA_B<52> RAM_DATA_B<53>

RAM_DQM_B<6> RAM_DATA_B<54>

RAM_DATA_B<55> RAM_DATA_B<60>

RAM_DATA_B<61> RAM_DQM_B<7>

RAM_DATA_B<62> RAM_DATA_B<63>

RAM_DATA_B<37>

39

23

35

13

35

13

35

38

35

11

35

11

35

11

35

38

35

11

35

11

35

38

35

11

35

11

38

35

11

35

11

10

9

10

9

10

9

10

6

10

11

10

9

10

9

10

9

10

11

10

9

10

9

10

6

11

10

9

10

9

10

(PLL4)

VDD15A_6

(PLL4) VSSA_6

ROM_WE

ROM_OE

PCI_STOP PCI_DEVSEL

PCI_CBE_3

PCI_CBE_2

PCI_CBE_1

PCI_CBE_0

ROM_CS

PCI_CLK_IN

PCI_CLK_OUT

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_FRAME

PCI_PAR

PCI_TRDY PCI_IRDY

PCI_REQ_2

PCI_REQ_1

PCI_REQ_0

PCI_GNT_0 PCI_GNT_1 PCI_GNT_2

PCI/ROM

INTERFACE

PCIAD_31

PCIAD_30

PCIAD_28

PCIAD_27

PCIAD_26

PCIAD_25

PCIAD_29

PCIAD_19

PCIAD_18

PCIAD_17

PCIAD_16

PCIAD_15

PCIAD_23 PCIAD_24

PCIAD_20 PCIAD_21 PCIAD_22

PCIAD_14

(7 OF 9)

PCIAD_11

PCIAD_10

PCIAD_12 PCIAD_13

PCIAD_9

PCIAD_6

PCIAD_5

PCIAD_7 PCIAD_8

PCIAD_4

PCIAD_3

PCIAD_1 PCIAD_2

PCIAD_0

ROM_OVRLY_EN

VSSA_5 (PLL5)

(PLL5)

VDD15A_5

STP_AGP AGPPVT AGPVREF0 AGPVREF1

AGP_BUSY AGP_CLK AGP_FB_IN AGP_FB_OUT

AGPAD0

AGPREQ AGPGNT

AGP_SBA3

AGP_SBA2

AGP_SBA1

AGP_SBA0

AGPCBE_3

AGPFRAME

AGPTRDY AGPIRDY AGPSTOP

AGPDEVSEL

AGPPAR

AGPAD31

AGPAD30

AGPCBE_0 AGPCBE_1 AGPCBE_2

AGP_ST2

AGP_AD_STB0_P AGP_AD_STB0_N AGP_AD_STB1_P AGP_AD_STB1_N

AGPPIPE

AGPRBF

AGP_ST1

AGP_SBA7

AGP_SB_STB_P AGP_SB_STB_N

AGP_ST0

AGP_WBF

AGP

INTERFACES

AGP_SBA6

AGP_SBA5

AGP_SBA4

AGPAD29

AGPAD28

AGPAD27

AGPAD26

AGPAD25

AGPAD24

AGPAD23

AGPAD22

AGPAD21

AGPAD20

AGPAD19

AGPAD18

AGPAD17

AGPAD16

AGPAD15

AGPAD14

AGPAD13

AGPAD12

AGPAD11

AGPAD10

AGPAD9

AGPAD8

AGPAD7

AGPAD6

AGPAD5

AGPAD4

AGPAD3

AGPAD2

AGPAD1

(3 OF 9)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SIMPLY PROVIDING REFERENCE TO CHIP

NEC USB2 REQ REMAINS ON +3V_MAIN BECAUSE THIS CHIP IS POWERED DURING SLEEP

use 52-ohm a resistor here.

PCI FEEDBACK CLOCK MATCHES

PLACE NEAR INTREPID

LONGEST PCI CLOCK ROUTE

AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP

Vout = AGPIO (1.5V)

INTREPID AGP/PCI

AGP PULL-UPS/PULL DOWNS

SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS

PLACE CLOSE TO INTREPID SIDE

Vin = Vcore (1.5V)

(PLACE CLOSE TO INTREPID AGP BALLS)

AGP I/O REFERENCE

BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS

NOTE: Designs using AGP slot should

PCI PULL-UPS

VOUT = 3.3V

VIN = 1.5V

402

4.7

5%

1/16W

MF

R197

1 2

402

5%

1/16W

MF

0

R246

1 2

60.4

402

MF

1/16W

1%

R245

1

2

SM1

1/16W

5%

10K

RP34

3 6

MF

1/16W

5%

4.7

402

R167

1 2

CERM

6.3V

20%

402

0.22uF

C190

1

2

INTREPID-REV2.1

BGA

CRITICAL

U51

AM10 AR8

AR10 AT9 AR11 AM12 AN12 AK11 AT11 AT10 AN13 AM13

AK12

AR12 AJ11 AT12 AM11 AR13 AK15 AH15 AN14 AT13 AK14

AJ8

AN15 AM15

AN10 AT8 AN11 AH13 AK13 AR9

AR14 AK16 AM16 AJ15

AR18 AH18 AT18

AJ19

AM18

AM17

AN16

AT16 AN18 AN17

AH16

AT14

AR17 AR16 AT17

AR15

AT15

AM9 AR7

AK17

AN9

J11

J10

33

402

MF

1/16W

5%

R272

1 2

33

5%

1/16W

MF

402

R230

1 2

402

5%

1/16W

MF

33

R264

1 2

47

5% 1/16W MF 402

R244

1

2

+3V_SLEEP

SM1

10K

5%

1/16W

RP33

2 7

SM1

10K

5%

1/16W

RP33

4 5

SM1

5%

10K

1/16W

RP36

4 5

SM1

1/16W

5%

10K

RP36

3 6

SM1

10K

5%

1/16W

RP36

1 8

SM1

1/16W

5%

10K

RP36

2 7

10K

5%

1/16W

SM1

RP33

3 6

SM1

1/16W

5%

10K

RP33

1 8

402

MF

1/16W

5%

22

R282

1 2

402

MF

1/16W

5%

22

R278

1 2

402

MF

1/16W

5%

22

R277

1 2

402

MF

1/16W

5%

33

R252

1 2

1/16W

5% MF

402

22

R273

1 2

NO STUFF

12PF

5%

50V

CERM

402

C311

1

2

NO STUFF

402

CERM

50V

5%

12PF

C362

1

2

NO STUFF

402

CERM

50V

5%

12PF

C372

1

2

10K

5%

1/16W

402

MF

R553

1 2

402

MF

1/16W

5%

10K

R318

1 2

10K

5%

1/16W

MF

402

R316

1 2

10K

5%

1/16W

MF

402

R314

1 2

10K

5%

1/16W

MF

402

R317

1 2

10K

5%

1/16W

MF

402

R552

1 2

10K

5%

1/16W

MF

402

R334

1 2

10K

5%

1/16W

MF

402

R308

1 2

+3V_MAIN

402

MF

1/16W

5%

10K

R255

1 2

402

MF

1/16W

10K

5%

R239

1 2

10K

5%

1/16W

MF

402

R254

1 2

402

MF

1/16W

5%

10K

R256

1 2

10K

5%

1/16W

MF

402

R253

1 2

402

MF

1/16W

10K

5%

R235

1 2

1K

402

MF

1/16W

1%

R225

1

2

1K

402

MF

1/16W

1%

R219

1

2

CERM 402

6.3V

20%

0.22uF

C291

1

2

SM1

1/16W

10K

5%

RP34

1 8

SM1

1/16W

5%

10K

RP34

4 5

SM1

1/16W

5%

10K

RP34

2 7

INTREPID-REV2.1

BGA

CRITICAL

U51

AR19 AM19

AR22 AN22 AM22 AN23 AR23 AT24 AM23 AR24 AT25 AR25

AT20

AM24 AN25 AL24 AR26 AT26 AM25 AN26 AM26 AR27 AT27

AR20

AR28 AN27

AT21 AN20 AR21 AN21 AM21 AT22

AM20 AT23 AN24 AL25

AM27

AN28

AM29

AT28

AT29

AJ29

AJ24

AK24

AT33

AM28

AR29

AB20 AB21

AK19

AK20

AK22

AK21

AT19

AK28 AK27 AK25

AT32 AR32 AM31 AN31 AR31 AT31 AM30 AN30

AG25

AH25

AN29 AT30 AR30

AK30

AN19

V14

V13

402

20%

6.3V CERM

0.22uF

C270

1

2

4412

051-6570

B

INT_PCI_FB_OUT

INT_ROM_RW_L

INT_ROM_CS_L INT_ROM_OE_L

PCI_CBE<3>

PCI_CBE<2>

PCI_CBE<1>

PCI_CBE<0>

PCI_DEVSEL_L

PCI_STOP_L

PCI_TRDY_L

PCI_FRAME_L

PCI_IRDY_L

PCI_PAR

CBUS_PCI_GNT_L

AIRPORT_PCI_GNT_L

NEC_PCI_GNT_L

NEC_PCI_REQ_L

CBUS_PCI_REQ_L

AIRPORT_PCI_REQ_L

PCI_AD<30> PCI_AD<31>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<23>

PCI_AD<22>

PCI_AD<21>

PCI_AD<20>

PCI_AD<17> PCI_AD<18>

PCI_AD<15>

PCI_AD<14>

PCI_AD<16>

PCI_AD<12> PCI_AD<13>

PCI_AD<9>

PCI_AD<11>

PCI_AD<10>

PCI_AD<7> PCI_AD<8>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<2>

PCI_AD<1>

PCI_AD<3>

PCI_AD<0>

PCI_STOP_L

PCI_DEVSEL_L

PCI_FRAME_L

+1_5V_AGP

INT_AGPPVT

INT_AGP_VREF

+1_5V_AGP

+1_5V_INTREPID_PLL5

AGP_SBA<1>

AGP_REQ_L AGP_GNT_L

STOP_AGP_L

INT_AGP_VREF

AGP_AD<0> AGP_AD<1> AGP_AD<2> AGP_AD<3> AGP_AD<4>

AGP_AD<10> AGP_AD<11> AGP_AD<12>

AGP_AD<14> AGP_AD<15> AGP_AD<16>

AGP_AD<18> AGP_AD<19>

AGP_AD<22> AGP_AD<23> AGP_AD<24> AGP_AD<25> AGP_AD<26> AGP_AD<27>

AGP_AD<29> AGP_AD<30> AGP_AD<31>

AGP_CBE<0> AGP_CBE<1> AGP_CBE<2> AGP_CBE<3>

AGP_PAR AGP_FRAME_L AGP_TRDY_L AGP_IRDY_L AGP_STOP_L AGP_DEVSEL_L

AGP_SBA<0>

AGP_SBA<2> AGP_SBA<3> AGP_SBA<4> AGP_SBA<5> AGP_SBA<6> AGP_SBA<7>

AGP_SB_STB AGP_SB_STB_L

AGP_ST<0>

AGP_ST<2>

AGP_ST<1>

AGP_AD_STB<1> AGP_AD_STB_L<1>

AGP_AD_STB<0> AGP_AD_STB_L<0>

AGP_PIPE_L AGP_RBF_L

AGP_WBF_L

+1_5V_INTREPID_PLL

ROM_OE_LINT_ROM_OE_L

ROM_CS_LINT_ROM_CS_L

ROM_RW_LINT_ROM_RW_L

AGP_REQ_L

AGP_AD_STB<1>

AGP_AD_STB_L<0>

AGP_IRDY_L

AGP_WBF_L

AGP_AD_STB<0>

AGP_SB_STB

AGP_AD_STB_L<1>

AGP_SB_STB_L

INT_AGP_FB_OUT

INT_AGP_FB_IN

AGP_BUSY_L CLK66M_AGP_1_5V_TP

CLK66M_GPU_AGP

CLK66M_GPU_AGP_UF

INT_PCI_FB_IN

AGP_AD<5>

AGP_AD<8>

AGP_AD<7>

AGP_TRDY_L

AGP_AD<17>

AGP_STOP_L

AGP_PIPE_L

PCI_AD<19>

AGP_AD<28>

AGP_AD<6>

AGP_AD<9>

AGP_AD<13>

AGP_FRAME_L

AGP_DEVSEL_L

+1_5V_AGP

AGP_RBF_L

AGP_BUSY_L

+3V_GPU

STOP_AGP_L

+1_5V_INTREPID_PLL6

CLK33M_AIRPORT_UF

CLK33M_AIRPORT

CLK33M_CBUS_UF

CLK33M_NEC

+1_5V_INTREPID_PLL

CLK33M_CBUS

CLK33M_NEC_UF

AIRPORT_PCI_REQ_L

AGP_AD<21>

AGP_GNT_L

AGP_AD<20>

NEC_PCI_REQ_L

PCI_TRDY_L

CBUS_PCI_REQ_L

PCI_IRDY_L

38

39

21

39

21

39

37

39

37

39

37

20

37

20

37

24

37

24

37

24

19

38

24

19

38

24

18

24

39

18

24

18

16

38

16

37

38

37

14

37

18

37

16

37

21

39

14

39

37

18

17

18

39

17

18

24

17

18

17

15

19

15

37

19

37

19

37

19

12

39

19

35

37

19

37

19

17

37

19

15

19

20

35

12

35

24

37

19

37

17

18

17

35

12

17

12

17

18

24

17

12

9

17

9

12

38

19

12

19

12

19

12

19

12

8

9

12

9

12

9

12

35

12

19

35

19

12

19

12

9

19

12

19

12

38

35

24

35

17

8

18

35

12

19

12

19

12

CS_CE2

CS_CE1

CS_IORD CS_IOWR

ATA_CS1

ATA_CS0

IDE

IDEINTRQ

IDECHRDY

IDECS0

IDECS1

IDEDMACK IDEDMARQ

IDERD

IDEWR

IDERST

IDEA9

IDEA8

IDEA7

IDEA6

IDEA5

IDEA4

IDEA3

IDEA2

IDEA1

IDEA0

IDEDD15

IDEDD14

IDEDD13

IDEDD12

IDEDD11

IDEDD10

IDEDD9

IDEDD8

IDEDD7

IDEDD6

IDEDD5

IDEDD4

IDEDD3

IDEDD2

IDEDD1

IDEDD0

CARDSLOT

CS_WAIT

CS_OE CS_WE

ATA_INTRQ

ATA_DMARQ

ATA_CHRDY

ATA_DMACK

ATA_RD

ATA_WR

ATA_RST

ATA_VREF

UATA100

ATA_A1 ATA_A2

ATA_A0

ATA_D12

ATA_D11

ATA_D15

ATA_D14

ATA_D13

ATA_D10

ATA_D9

ATA_D3

ATA_D2

ATA_D1

ATA_D0

ATA_D4

ATA_D8

ATA_D7

ATA_D6

ATA_D5

(5 OF 9)

IICDATA_1

IICCLK_1

IICCLK_0 IICDATA_0

TST_PLLEN

TST_MONOUT

TST_MONIN

TEI

TRSTN

TMS

TCK

TDO

TDI

TEST

MDC

GBE_REFCLK

MDIO

COL

CRS

GTX_CLK

RXD_6

RXD_4 RXD_5

RXD_3

RXD_7

RXD_2

RXD_1

RX_ER

RX_DV

RX_CLK

RXD_0

FW_PINT

FW_LINKON

FWR_LCLK

TX_ER

TX_EN

TX_CLK

TXD_0

RESET

PURESET

PHY_LPS PHY_CTL0 PHY_CTL1 PHY_LREQ FWR_PCLK

(4 OF 9)

MISC

TXD_3

TXD_2

TXD_1

TXD_4 TXD_5 TXD_6 TXD_7

GB ETHERNET

FIREWIRE

PHY_DATA0 PHY_DATA1 PHY_DATA2 PHY_DATA3

PHY_DATA5

PHY_DATA7

PHY_DATA4

PHY_DATA6

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

HW_PLL<BIT 0>

ENET_TXD SERIES TERMINATION

Keep C847 stub short

TEST PULL-UPS/DOWNS

I2C PULL-UPS

I2C-0

J3000 - PG 23

(LMU on RUX Brd.)

AF-RD 84-WR

N/A

FAN CONTROLLER

A3-RD AC-WR AD-WR

I2C-1

5D-RD

N/A

U51 - PG 6

N/A N/A

J14 - PG 25

DASH MODEM

J25 - PG 11

RAM - LOWER

NOT USING CARDSLOT INTERFACE

POSTSCALAR BYPASS

POSTSCALAR BYPASS FUNCTIONAL TEST WITH

FUNCTIONAL TEST IDDQ

FUNCTIONAL TEST WITHOUT

VIEW PLLS (HARDWARE)

TEST TRI-STATE

ATPG IDDQ

ATPG NORMAL

JTAG MODE

NORMAL OPERATION VIEW PLLS (SOFTWARE)

DESCRIPTION

X(I)

1(I)

0 0

0 1

1 1

1(I) 1(I) 1(I)

0(I) 0(I)

1 X

0

0(I)

0

1(I)

0(I)

BYPASS

SYNC/MEM DATA

MEMWE

0(I)

0 1

PLL OUTPUTS

1

(INPUT)

00

(OUTPUT)

TESTSEL5

HWPLL_

X

1

(I/O) (I/O)

JTG_TDI_HJTG_TDO_H

(OUTPUT)

0

JTG_RSTN_L

1 1

TST_TEI_H

X 0 0

X

EXTPLL

SHUTDOWN

TPDENABLE

TST_PLLEN_H

X

(OUTPUT)

DDR_

ANALYZER_CLK

(OUTPUT)

X

INT - ENET/FW/UATA

EIDE/I2C

CS_WAIT IS AN INPUT

UDMA - DEVICEDMARDY/DSTROBE

UDMA - HOSTDMARDY/HSTROBE

UDMA - STOP

PLL OUTPUTS

SELECTED

PMU

(SLEEP)

N/A N/A

N/A

(SLEEP)

I2C-2

N/A

(MAIN)

N/A N/A

(MAIN)

A2-WR

A0-WR

BUS

A1-RD

ADDR

N/A

SNAPPER SOUND

N/AN/A

RAM - UPPER

6B-RD

5C-WR

N/A

J25 - PG 11

J2 - PG 25

6A-WR

BOOTBANG EEPROM

LMU

U52 - PG 25

N/A

U30 - PG 14

ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES

CLOCK SLEW SSCG

N/A

85-RD

AE-WR

D2-WR D3-RD

402

MF

1/16W

5%

1K

R259

1 2

SM1

1/16W

5%

10K

RP35

1 8

10K

5% 1/16W MF 402

R232

1

2

22

1/16W

5%

SM1

RP16

4 5

22

1/16W

5%

SM1

RP10

3 6

22

5%

1/16W

SM1

RP10

1 8

22

1/16W

5%

SM1

RP10

4 5

22

1/16W

5%

SM1

RP10

2 7

22

5%

1/16W

SM1

RP16

3 6

22

1/16W

5%

SM1

RP16

1 8

22

5%

1/16W

SM1

RP16

2 7

+3V_MAIN

10K

5% MF

1/16W

402

R269

2 1

5%

1/16W

MF

402

10K

R270

1 2

5%

10pF

50V CERM 402

NO STUFF

C847

1

2

402

MF

1/16W

5%

10K

NO STUFF

R630

1 2

+3V_MAIN

402

MF

1/16W

5%

1K

R263

1 2

SM1

1/16W

5%

2.2K

RP32

2 7

1/16W

SM1

5%

2.2K

RP32

1 8

5%

1/16W

SM1

2.2K

RP32

4 5

SM1

5%

1/16W

2.2K

RP32

3 6

10K

5%

1/16W

SM1

RP35

2 7

SM1

10K

5%

1/16W

RP35

3 6

1/16W

5%

10K

SM1

RP35

4 5

402

MF

1/16W

1K

1%

R207

1

2

CRITICAL

BGA

INTREPID-REV2.1

U51

Y5 AB1 Y7

AA5

AA4 AB2

V5 T1

W4 W5 Y2 Y1 W7 Y8

U1 U2 V4 V2 W1 V1 W2 W8

AC1 AC2 AA8

AA2

Y4

Y15

AA1

AD1

AB4

AB5

AD2

AC4

AE2

AE1

AF5 AE7 AK1 AG5 AH4 AL1 AK2 AH5 AF7 AG7

AK4

AB7

AM1

AC5 AD4

AF4 AH2 AD7 AG4 AJ1 AJ2

AF1 AG1 AF2 AH1 AD5 AG2 AE4 AE5

AG8 AH7 AA7

AL2

AJ4

AM2

82

MF

1/16W

5%

402

R224

1 2

5%

1/16W

MF

82

402

R205

1 2

CRITICAL

INTREPID-REV2.1

BGA

U51

C5

E6

U14

T7

N2 N1

L13 H12

AN2

AK5

AN1

AM3

B6

B5

P5 L1

L4 M4 P7 N5 K1 K2 L2 N4

M1

M2

T2

U5

D3 E7 D6 B4 A4 D7 G9 E8

J12

C4 D2

AP5

AK8 AT5

AH10

AR5

AN6

AM7

AK10

AR6

H10

E9 D8 A6 B7

G10

D9

E10

H9 A7 A5

402

MF

1/16W

5%

22

R195

1 2

22

5%

1/16W

MF

402

R186

1 2

10

402

MF

1/16W

5%

R149

1 2

10

402

MF

1/16W

5%

R145

1 2

1/16W

402

MF

5%

10

R160

1 2

4413

051-6570

B

EIDE_DATA<1> EIDE_DATA<2>

INT_TST_PLLEN_PD

HD_INTRQ

ENET_PHY_TX_ER

CLKFW_LINK_PCLK

FW_LINK_CNTL<0> FW_LINK_CNTL<1>

FW_PHY_LPS

FW_LINK_DATA<7>

FW_LINK_DATA<0> FW_LINK_DATA<1>

ENET_LINK_TXD<7>

ENET_LINK_TXD<4>

ENET_LINK_TXD<2>

ENET_LINK_TXD<0> ENET_LINK_TXD<1>

CLKENET_LINK_TX

FW_LKON FW_PINT

CLKFW_LINK_LCLK

CLKENET_LINK_RX ENET_RX_DV ENET_RX_ER

ENET_LINK_RXD<0>

ENET_LINK_RXD<3>

ENET_LINK_RXD<2>

ENET_LINK_RXD<4> ENET_LINK_RXD<5> ENET_LINK_RXD<6> ENET_LINK_RXD<7> CLKENET_LINK_GBE_REF

ENET_CRS

INT_TST_MONIN_PD INT_TST_MONOUT_TP

INT_I2C_CLK0 INT_I2C_DATA0

INT_I2C_DATA1

INT_I2C_CLK1

JTAG_ASIC_TCK

JTAG_ASIC_TDI

INT_RESET_L

INT_PU_RESET_L

ENET_PHY_TXD<1>

ENET_LINK_TXD<1>

ENET_PHY_TXD<0>

ENET_LINK_TXD<0>

ENET_PHY_TXD<3>

ENET_LINK_TXD<3>

ENET_PHY_TXD<4>

ENET_LINK_TXD<4>

ENET_PHY_TXD<2>

ENET_LINK_TXD<2>

ENET_PHY_TXD<5>

ENET_LINK_TXD<5>

ENET_PHY_TXD<7>

ENET_LINK_TXD<7>

ENET_PHY_TXD<6>

ENET_LINK_TXD<6>

INT_I2C_CLK0

INT_I2C_DATA1

INT_I2C_CLK1

CLKFW_PHY_LCLK

FW_PHY_LREQ

CSLOT_CE2_L_SPN

NO_TEST=TRUE

CSLOT_CE1_L_SPN

NO_TEST=TRUE

UIDE_CS0_L

CSLOT_IOWR_L_SPN

NO_TEST=TRUE

CSLOT_IORD_L_SPN

NO_TEST=TRUE

EIDE_INT

EIDE_DMACK_L EIDE_DMARQ

EIDE_WR_L EIDE_RD_L

EIDE_RST_L

EIDE_IOCHRDY

CSLOT_ADDR9_SPN

NO_TEST=TRUE

CSLOT_ADDR8_SPN

NO_TEST=TRUE

CSLOT_ADDR7_SPN

NO_TEST=TRUE

CSLOT_ADDR6_SPN

NO_TEST=TRUE

CSLOT_ADDR5_SPN

NO_TEST=TRUE

CSLOT_ADDR4_SPN

NO_TEST=TRUE

CSLOT_ADDR3_SPN

NO_TEST=TRUE

EIDE_ADDR<2>

EIDE_ADDR<1>

EIDE_ADDR<0>

EIDE_DATA<14> EIDE_DATA<15>

EIDE_DATA<13>

EIDE_DATA<11> EIDE_DATA<12>

EIDE_DATA<9> EIDE_DATA<10>

EIDE_DATA<8>

EIDE_DATA<6> EIDE_DATA<7>

EIDE_DATA<4> EIDE_DATA<5>

EIDE_DATA<3>

EIDE_DATA<0>

CSLOT_IOWAIT_L_PU

CSLOT_WE_L_SPN

NO_TEST=TRUE

CSLOT_OE_L_SPN

NO_TEST=TRUE

UIDE_INTRQ

UIDE_DMARQ

UIDE_IOCHRDY

UIDE_DMACK_L

UIDE_DIOR_L

UIDE_DIOW_L

UIDE_RST_L

UIDE_REF

UIDE_ADDR<2>

UIDE_ADDR<1>

UIDE_ADDR<0>

UIDE_DATA<5>

UIDE_DATA<15>

UIDE_DATA<14>

UIDE_DATA<13>

UIDE_DATA<12>

UIDE_DATA<10>

UIDE_DATA<9>

UIDE_DATA<8>

UIDE_DATA<7>

UIDE_DATA<6>

UIDE_DATA<3>

UIDE_DATA<2>

UIDE_DATA<1>

UIDE_DATA<0>

EIDE_CS0_L EIDE_CS1_L

INT_I2C_DATA0

ENET_LINK_TXD<3>

ENET_LINK_TXD<5>

HD_DMARQ

ENET_PHY_TX_EN

ENET_LINK_TX_ER

ENET_LINK_TXD<6>

CLKENET_PHY_GTX

INT_JTAG_TEI

ENET_COL ENET_MDIO ENET_MDC

UIDE_CS1_L

ENET_LINK_RXD<1>

JTAG_ASIC_TDI

INT_TST_PLLEN_PD

JTAG_ASIC_TCK

JTAG_ASIC_TRST_L

INT_JTAG_TEI

INT_TST_MONIN_PD

FW_LINK_DATA<2> FW_LINK_DATA<3> FW_LINK_DATA<4> FW_LINK_DATA<5> FW_LINK_DATA<6>

INT_TDO

JTAG_ASIC_TRST_L

JTAG_ASIC_TMS

FW_LINK_LREQ

INT_TDO

JTAG_ASIC_TMS

ENET_LINK_TX_EN

UIDE_DATA<4>

UIDE_DATA<11>

CLKENET_LINK_GTX

39

23

39

23

39

23

13

25

39

13

25

13

39

26

39

26

39

37

39

37

35

37

35

37

35

37

35

37

39

11

14

26

39

29

37 37

11

14

35

37

11

37

35

39

37

39

26

39

37

14

26

14

26

37

24

13

24

26

27

13

26

27

35

26

13

39

6

13

9

25

26 13

6

13

27

24

37

24

38

24

6

13

24

26

37

13

26

13

26

24

26

13

27

13

37

13

37

24

35

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VSSA_8

VSSA4

VSSA3

VSSA2

VSSA1

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VDD15A_8

VDD15A_4

VDD15A_3

VDD15A_2

VDD15A_1

CPU_INT PCIPME

EXTINT12 EXTINT13 EXTINT14 EXTINT15 EXTINT16 EXTINT17

GPIO16

GPIO15

GPIO12

GPIO11

GPIO9

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

VSSU_2

VDDU33_2

VDDU33_1

(6 OF 9)

SCCRTSA

SCCTXDA

SCCDTRA

SCCRXDA SCCGPIOA SCCTRXCA

SCCTXDB

SCCGPIOB SCCTRXCB

SCCRXDB

SCCRTSB

PURPOSE

GENERAL

I/O’S

EXTINT8

EXTINT7

EXTINT6

EXTINT0

INTERRUPTS

EXTINT11

EXTINT4 EXTINT5

EXTINT10

EXTINT9

EXTINT3

EXTINT2

EXTINT1

AUD_DTO

AUD_DTI AUD_SYNC

MOD_DTO

AUD_BITCLK AUD_CLKOUT

IICCLK_2

MOD_SYNC

MOD_DTI

MOD_CLKOUT

IICDATA_2

MOD_BITCLK

IIC

AUDIO/I2S

CLOCKS

XTAL_OUT

PROCSLEEPREQ PENDPROCINT

XTAL_IN

SS_REF_CLK_IN

BUF_REF_CLK_OUT

STOPXTAL

WATCHDOG

PCI_

VSSU_1

PCI_

USB_VD0_P USB_VD0_N

USB_VD1_P USB_VD1_N

USB_VD2_N

USB_VD2_P

USB_PWRFLT0

USB_PRTPWR0

USB_VD3_N

USB_VD3_P

USB

USB_PRTPWR1 USB_PWRFLT1

USB_VD4_N

USB_VD4_P

USB_VD5_N

USB_VD5_P

USB_PRTPWR2 USB_PWRFLT2

ADJ

BYP GND

OUT

NC

SHDN

IN

CPU0

VDDA

VDD0

VDD1

VDDC

VDDQ

VSS1

VSS0

VSSA

VSSC

VSSQ

LOCK ODSEL

PD*

SDATA

SCLK

FSEL

CLKIN

RESET*

ADDRSEL

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_11_HEAD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_11_HEAD

REFERENCE DESIGNATOR(S)

BOM OPTION

QTY

DESCRIPTION

VALUE VOLT. WATT.

TOL.PART #

PACKAGE

DEVICE

GPIO/EXTINT PULLUPS

CRYSTAL LOAD CAPACITANCE IS 16PF

1

MOD_DTI_B_H JTG_TDO_H

2

INTERNAL 250K PULL-UP

INTERNAL 250K PULL-DOWN

OUTPUT IMPEDANCE ~18-20 OHMS

OPEN DRAIN OUTPUT

INTERNAL 250K PULL-UP

VCORE A/B SEL

SCK

PCI INTERRUPTS

PORT F/MODEM

PORT A - PORT D/UNUSED

USB PORT ASSIGNMENTS

POWERBOOK SPARE

REQ* MOSI ACK*

VIA

NC

MISO

CBUS_REG_L CBUS_IREQ_L

(SIGNAL FROM MODEM)

SIGNAL NAME

HWPLL_

5

0

4 3

INT - USB/GPIOS/I2S

NC

MOD_SYNC_B_H

MOD_DTO_B_H

MOD_CLKOUT_B_H

MOD_BITCLK_B_H

TESTMUXSEL

PORT E/BLUETOOTH

MINIMIZE OVERSHOOT

PLACE NEAR INTREPID TO

-> 1.55V OUTPUT

+3V_MAIN

CERM 805

20%

6.3V

10uF

C256

1

2

5%

1/16W

MF

402

100K

R166

1 2

+3V_MAIN

CERM

20% 10V

402

0.1uF

C246

1

2

20% CERM

402

0.01uF

16V

C235

1

2

402

5% MF

1/16W

22

R179

1 2

1/16W

MF

5%

22

402

R174

1 2

402

22

5% MF

1/16W

R192

1 2

1/16W

5%

47

SM1

RP13

4 5

47

5%

1/16W

SM1

RP13

3 6

1/16W

5%

SM1

47

RP13

1 8

47

5%

1/16W

SM1

RP13

2 7

402

22

1/16W

MF

5%

R188

1 2

INTREPID-REV2.1

BGA

CRITICAL

U51

P2 R5

R7

R4

T5

U15

D30

F33 E34

B32 E30

J9 F4 D1 E2 H7 G4

C33 D34 B33 A33 E31 G30 D31 C32

G5 E1

J5 K8 F1 K7

J7 F2 J8 H5 L9 H4

AL4 AH8

V8 P1

T4

R2

R1

AJ7

AA16

AJ12

AJ17

AJ18

AN8

AT6

AF10

AG9

AP4

AN3

AL5

AG11

AG10

AT4

AM5

AF9

AR4

K9

AN7

J4

J2

M5

K4

J1

N7

L7

L8

G1

G2

H1

H2

M8

M7

L5

K5

N8

P8

AG29

T8

U8

AA15

AJ13

AJ16

AK18

AH29

R9

R8

AT7

U4

V15

+3V_SLEEP

402

1/16W MF

5%

15K

R193

1

2

6.3V

20%

0.22uF

CERM

402

C387

1

2

402

4.7

5%

1/16W

MF

R201

1 2

0.22uF

CERM

6.3V

20%

402

C386

1

2

MF

1/16W

5%

4.7

402

R243

1 2

CERM

6.3V

20% 402

0.22uF

C388

1

2

5% MF

1/16W

4.7

402

R279

1 2

0.22uF

CERM

6.3V

20% 402

C337

1

2

15K

MF

1/16W

5%

402

R189

1

2

CERM

6.3V

20%

402

0.22uF

C389

1

2

MF

1/16W

5%

402

4.7

R240

1 2

MF

1/16W

5%

4.7

402

R280

1 2

10M

402

MF

5%

NO STUFF

1/16W

R144

12

CERM

22pF

5%

402

50V

C151

1

2

22pF

5%

50V

CERM

402

C152

1

2

0

NO STUFF

1/16W

5% MF

402

R134

1 2

F-ST-SM

NO STUFF

U.FL-R_SMT

J9

3

2

1

402

MF

1/16W

51

5%

NO STUFF

R113

1

2

402

MF

1/16W

5%

0

R143

1

2

1uF

10V 603

20%

CERM

C721

1

2

402

MF

68.1K

1%

1/16W

R567

1

2

1%

1/16W

402

18.7K

MF

R574

1

2

10uF

6.3V 805

CERM

20%

C723

1

2

NO STUFF

5%

1/16W

MF

0

603

R568

1 2

5%

1/16W

0

603

MF

R565

1 2

+2_5V_MAIN

+1_8V_MAIN

MSOP

LT1962-ADJ

U49

2

3 4

8

6

7

1

5

402

0.01uF

20%

CERM

16V

C392

1

2

402

5%

1/16W

MF

10K

R187

2 1

402

10K

MF

1/16W

5%

R191

2 1

5% 1/16W MF 402

1K

R258

2

1

1/16W MF

5%

402

1K

R241

2

1

SM1

5%

10K

1/16W

RP8

5 4

SM1

10K

1/16W

5%

RP8

8 1

5%

1/16W

10K

SM1

RP5

3 6

SM1

10K

1/16W

5%

RP6

4 5

10K

1/16W

5%

SM1

RP6

3 6

10K

5%

SM1

1/16W

RP6

2 7

10K

5%

1/16W

SM1

RP8

6 3

5%

1/16W

10K

SM1

RP7

7 2

10K

1/16W

5%

SM1

RP7

6 3

SM1

1/16W

5%

10K

RP4

5 4

10K

1/16W

5%

SM1

RP5

1 8

1/16W

SM1

5%

10K

RP6

1 8

SM1

10K

1/16W

5%

RP4

6 3

SM1

10K

1/16W

5%

RP8

7 2

FERR-EMI-100-OHM

SM

L13

1

2

+2_5V_MAIN

+3V_MAIN

SM-1

SSCG

400-OHM-EMI

L14

1

2

402

CERM

10V

20%

0.1uF

SSCG

C394

1

2

400-OHM-EMI

SM-1

SSCG

L15

1

2

SSCG

0.1uF

10V CERM

20% 402

C399

1

2

603

CERM

10V

20%

1uF

SSCG

C402

1

2

SSCG

5%

33

MF

1/16W

402

R293

1 2

SSCG

402

5% MF

75

1/16W

R292

2

1

20%

SSCG

402

CERM

10V

0.1uF

C400

1

2

1/16W

SSCG

10K

402

5% MF

R288

1

2

1/16W

MF

SSCG

0

402

5%

R284

1 2

15K

MF

1/16W

5%

402

R178

1

2

402

5% 1/16W MF

15K

R175

1

2

SSCG

MF

1/16W

0

402

5%

R142

1 2

5%

1/16W

MF

402

10K

R156

12

10K

402

MF

1/16W

5%

R157

12

5%

1/16W

MF

402

10K

R164

12

5%

1/16W

MF

402

10K

R165

12

5%

1/16W

MF

402

10K

R182

12

5%

1/16W

MF

402

10K

R180

12

10K

402

MF

1/16W

5%

R183

12

5%

1/16W

MF

402

10K

R181

12

10K

402

MF

5%

1/16W

R250

1 2

SM1

5%

1/16W

10K

RP11

5 4

10K

SM1

5%

1/16W

RP11

6 3

5%

1/16W

10K

SM1

RP11

7 2

SM1

5%

1/16W

10K

RP11

8 1

1/16W

10K

NO STUFF

402

5% MF

R295

2

1

402

10K

5% 1/16W MF

NO STUFF

R296

2

1

10K

402

MF

1/16W

5%

R153

1 2

10K

5% 1/16W MF 402

SSCG

R287

1

2

NO STUFF

5%

402

MF

1/16W

0

R286

1

2

MF

5%

402

1/16W

0

R218

1 2

+3V_SLEEP

10K

402

5%

1/16W

MF

R746

1 2

1/16W

MF

10K

5%

402

R158

1 2

10K

5% MF

1/16W

402

R148

1 2

+3V_MAIN

CRITICAL

CY28512D

OMIT

TSSOP

U31

14

20

16

3

2 4

13

17

9 8

11012

5

18

7

19

11

6

15

SOFT_MODEM

5%

1/16W

SM1

0K

RP47

1 8

SOFT_MODEM

5%

1/16W

SM1

0K

RP47

3 6

SOFT_MODEM

1/16W

5%

SM1

0K

RP47

4 5

SOFT_MODEM

5%

1/16W

SM1

0K

RP47

2 7

5%

1/16W

MF

402

10K

USB_MODEM

R206

1 2

10K

1/16W

5%

SM1

USB_MODEM

RP15

2 7

10K

1/16W

5%

SM1

USB_MODEM

RP15

3 6

SM1

10K

1/16W

5%

USB_MODEM

RP15

4 5

SM1

5%

1/16W

USB_MODEM

10K

RP15

1 8

18.432M

8X4.5MM-SM

CRITICAL

Y2

1 2

MF

SSCG

0

402

1/16W

5%

R450

1 2

0

5%

1/16W

MF

402

NO STUFF

R467

1 2

0

5%

1/16W

MF

402

R457

1 2

Alt. for Siward Part

Y2

197S0035197S0004

SSCGCRITICAL

U31

IC,CY28512-2

1

359S0086

116S1104

RES

RES-0402-V2

RESISTOR R292

NO_SSCG

5%

1/16W

1 10K

051-6570

14 44

B

USB_DFM

INT_I2S0_SND_MCLK_UF

USB_DDP

USB_DCM

INT_I2S0_SND_SCLK_UF

COMM_RESET_L FW_PHY_PD SND_HP_MUTE_L

INT_GPIO9_PU

SND_AMP_MUTE_L

INT_GPIO1_PU

CG_FSEL_INT

NEC_PCI_INT_L

+1_5V_INTREPID_PLL2

COMM_SHUTDOWN

SND_HW_RESET_L INT_GPIO12_PU INT_GPIO15_PU INT_ENET_RST_L

LT1962_INT_BYP

CG_SYSCLK_EN

INT_REF_CLK_OUT

CLK18M_INT_XOUT

INT_REF_CLK_IN

CG_FSEL

SYSTEM_CLK_EN

INT_TDO

INT_EXTINT13_PU

INT_GPIO12_PU

INT_MOD_DTI

INT_MOD_SYNC_UF

INT_MOD_SYNC

INT_GPIO9_PU

INT_MOD_BITCLK_UF

SND_HW_RESET_L

INT_MOD_BITCLK

INT_MOD_DTO

INT_MOD_CLKOUT

INT_EXTINT16_PU

INT_EXTINT12_PU

INT_EXTINT11_PU

PMU_REQ_L

PMU_INT_NMI

INT_I2S0_SND_TO_DAC

INT_I2S0_SND_LRCLK

INT_I2S0_SND_MCLK

INT_I2S0_SND_SCLK

CG_CLKOUT

LTC1962_INT_VIN

INT_EXTINT14_PU

USB_PWREN_EF_L

USB_OC_EF_L

USB_OC_AB_L

USB_PWREN_AB_L

INT_EXTINT8_PU

COMM_RING_DET_L

INT_GPIO15_PU

PMU_INT_L

CLK18M_INT_EXT

VCORE_VGATE

USB_DEP

BT_USB_DP

USB_DEM

BT_USB_DM

USB_DFP

MODEM_USB_DP

USB_DFM

MODEM_USB_DM

USB_DBP

USB_DBM

USB_DAP

USB_DAM

USB_DCM

USB_DCP

USB_DDM

USB_DDP

CBUS_INT_L

AIRPORT_PCI_INT_L

CLK18M_XTAL_IN

LT1962_INT_ADJ

MPIC_CPU_INT_L

PMU_PME_L

NEC_PCI_INT_L

INT_EXTINT16_PU

SND_HP_SENSE_L

INT_EXTINT14_PU

INT_EXTINT12_PU

+3V_INTREPID_USB

PMU_ACK_L

PMU_REQ_L

PMU_INT_L

COMM_RING_DET_L

AGP_ATI_INT_L INT_EXTINT3_PU SND_LIN_SENSE_L

CBUS_INT_L

AIRPORT_PCI_INT_L

ENET_ENERGY_DET

INT_EXTINT8_PU PMU_INT_NMI INT_EXTINT10_PU INT_EXTINT11_PU

INT_I2S0_SND_TO_DAC_UF

INT_I2S0_SND_LRCLK_UF

INT_I2S0_SND_FROM_ADC

INT_MOD_DTO_UF INT_MOD_DTI INT_MOD_SYNC_UF

INT_MOD_CLKOUT_UF

INT_MOD_BITCLK_UF

INT_I2C_DATA2

INT_I2C_CLK2

INT_PROC_SLEEP_REQ_L INT_PEND_PROC_INT

SYSTEM_CLK_EN

INT_WATCHDOG_L

INT_REF_CLK_OUT_UF

PMU_CLK

PMU_TO_INT

+1_5V_INTREPID_PLL3

+1_5V_INTREPID_PLL4

+1_5V_INTREPID_PLL8

USB_DAM

USB_DAP

USB_DBP USB_DBM

USB_DCP

USB_PWREN_AB_L USB_OC_AB_L

USB_DDM

USB_PWREN_CD_L USB_OC_CD_L

USB_DEP USB_DEM

USB_OC_EF_L

USB_PWREN_EF_L

USB_DFP

INT_EXTINT13_PU

INT_REF_CLK_IN

CG_FSEL

CG_LOCK

CG_SYSCLK_EN

CG_ADDRSEL

INT_I2C_DATA1

INT_I2C_CLK1

INT_REF_CLK_OUT

CG_RESET_L

COMM_TXD_L COMM_RTS_L COMM_DTR_L COMM_RXD COMM_GPIO_L COMM_TRXC

PMU_FROM_INT

+1_5V_INTREPID_PLL1

+1_5V_INTREPID_PLL

CLK18M_INT_XIN

INT_MOD_CLKOUT_UF

INT_MOD_DTO_UF

INT_EXTINT3_PU

INT_GPIO1_PU

INT_EXTINT10_PU

USB_PWREN_CD_L

USB_OC_CD_L

MAIN_RESET_L

+3V_CG_PLL_MAIN

+2_5V_CG_MAIN

39 29

39

24

39

29

38

39

29

39

38

19

37

39

33

17

39

25

35

29

26

25

29

39

35

39

25

29

33

37 37

18

24

17

39

29

25

39

18

24

29

39

25

39

29

37

35

25

35

39

12

33

18

14

25

27

25

14

25

14

38

25

14

26

14

35

14

13

14

25

14

25

14

25

38

14

35

14

14 25

14

35

5

17

14

25

14

38

29

14

19

14

25

14

26

14

25

14

25

29

14

29

35

29

38

14

13

14

25

29

38

8

35

14

17