Apple G4 MLB PB17 INCH 051-6531 Schematic

TABLE_5_ITEM

DESCRIPTION OF CHANGE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

Apple Computer Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

TITLE

DRAWING NUMBER

SHT

OF

METRIC

DRAFTER

ENG APPD

QA APPD

RELEASE

DESIGN CK

MFG APPD

DESIGNER

SCALE

NONE

MATERIAL/FINISH

NOTED AS

APPLICABLE

SIZE

D

THIRD ANGLE PROJECTION

DIMENSIONS ARE IN MILLIMETERS

XX

X.XX

X.XXX

DO NOT SCALE DRAWING

REV

ZONE

ECN

CK APPD

DATE

ENG APPD

DATE

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

ANGLES

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

09/04/2003

INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG

BATTERY CHARGER AND CONNECTOR

MARVELL GIGABIT ETHERNET PHY

SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)

SCHEM,MLB,PB17"

17

STUFF

EXT_TMDS

ATI_MEMIO_LO

ATI_MEMIO_HI

INTREPID_USB

NEC_USB

1_5V_MAXBUS

D3_HOT D3_COLD

FIREWIRE A/B CONNECTORS, PORT POWER LIMITER

25

24

5V_HD_LOGIC 3V_HD_LOGIC

NO_4XVCORE

INT_TMDS

NO_SSCG

SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON

DUAL-CHANNEL LVDS

CONTENTS

PAGE

INTREPID AGP 4X/PCI

INTREPID MEMORY INTERFACE / BOOT ROM

10

MPC7450 DATA

TITLE PAGE AND CONTENTS

CPU PLL AND CONFIGURATION STRAPS

200PIN DDR MEMORY SODIMM CONNECTORS

INTREPID ENET/FW/UATA/EIDE INTERFACES

2

BBANG NO_BBANG

32

30

1

4 5

13

11 12

14

9

18

SSCG

35

33

8

DDR MEMORY MUXES

INTREPID MAXBUS AND BOOT STRAPS

31

28

GPU_SS

NO STUFF

GPU_SWITCH SERIAL_DEBUG VCORE_OFFSET 1_8V_MAXBUS

BOM OPTIONS

3

SYSTEM BLOCK DIAGRAM

20

SIL1162 TMDS TRANSMITTER

39

PAGE

26 27

29

22 23

COMPONENT LOCATIONS

SIGNAL NAMES

FUNCTIONAL TEST POINTS

SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF

1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES

CPU CORE VOLTAGE POWER SUPPLY

3.3V / 5V SYSTEM POWER SUPPLIES

12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY

PMU (POWER MANAGEMENT UNIT)

INTERNAL CONNECTORS - DVD,

LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED

36 37 38

40

M10 ANALOG, POWER, GND

SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS

43-44

41-42

FAN CONTROLLER, MODEM, SOUND

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO

CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH

USB 2.0

SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK

REVISION HISTORY (1 OF 1)

M10 LVDS/TMDS/VGA/GPIO & GPU VCORE

M10 AGP & CLOCKS

CARDBUS CONTROLLER (PCI1510)

INTREPID DECOUPLING

INTREPID POWER RAILS

FIREWIRE A/B PHY

34

21

16

15

19

7

6

MPC7450 MAXBUS INTERFACE

PCB NOTES AND HOLES

POWER BLOCK DIAGRAM

CONTENTS

1

820-1524

PCBF,MLB,PB17 INCH

PCB1

PRODUCTION RELEASED

051-6531

44

?

293301B

1

09/11/03

SCHEM,MLB,PB17 INCH

B

051-6531

SCHEM,MLB,PB17 INCH

SCH1

1

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

P.28

P.26

P.25

P.33

P.25

P.22P.22P.22

P.22

P.18-21

P.25

P.27

P.24

P.26

P.32-36

P.24

P.32

P.31

P.32

P.26

P.25

P.29

P.30

P.28

4 DATA PAIRS

UIDE

Connector

32BITS

ATI M10

33MHZ

P.13

4X AGP

INTREPID

PCI

ULTRA ATA/100

66MHZ

1.5V/3.3V

33MHZ

AIRPOPT

SYSTEM BLOCK DIAGRAM

Connector

64MB

S-VIDEO

TMDS

DVI-I

Connector

P.14

BOOT ROM

USB 2.0

Connector

CARDSLOT

Ethernet

G/MII

P.11

100MHZ

800 MB/S

(MPC7457)

P.14

FIREWIREETHERNET

P.15

64BIT DATA

APOLLO

CPU

U42

U52

CONTROLLER

LIGHT SENSOR

KB LED

P.10

1M X 8

U17

LMU

SLEEP

LED

3.3V

SMBUS

Battery

Connector

I2C

LMU

PMU

TRACKPAD

OPTICAL DRIVE

TI PCI1510

Keyboard

USB PORT C

USB PORT F

Inverter

FireWire

BOOTROM

VIA/PMU

EIDEUATA 100

DDR MEMORY

DDR SDRAM DIMM 1

DDR SDRAM DIMM 0

SO-DIMM Connector

2:1 DDR MUXES

10/100/1000

MAXBUS

USB PORT B

USB PORT D

(INTERNAL MEM)

MEMORY

CH. C

MEMORY

(INTERNAL MEM)

CH. A

(INTERNAL MEM)

MEMORY CH. D

MEMORY

(INTERNAL MEM)

CH. B

Connector

CardBus

Controller

3.3V

32BITS

PCI BUS

P.7

P.5-6

P.12

P.9

P.10

P.13

P.15

P.14

P.15

64BITS

167MHZ

2.5V

(DDC TOO)

Connector

S-Video

EDID (I2C)

LVDS

Connector

LCD Panel

COMPOSITE

RGB

Connector

P.18

Connector

5V

SERIAL

& Charger

Power Supply

ConnectorConnector

SUTRO (PWR)

Connector

TUBA (SOUND)

Connector

Fan

Circuit

P.14

P.15

SCCA

Serial Debug

Connector

32BITS

PHY

Ethernet

10/100/1000

3.3V

8BIT TX 8BIT RX 125MHZ

FW - A

Connector

FW - B

PHY

2 DATA PAIRS @ 400MHZ

@ 200MHz

8BIT TX/RX

3.3V

1394 OHCI

EIDE

I2S

I2C

BlueTooth

LEFT USB

BACKUP BATTERY

NOT USED

32BIT ADDRESS

MAXBUS

1.8V

167MHZ

PMU

INTRPEID I2C

33MHZ 16/32 BITS

3.3V/5V

J18

U49

J24

J22

U28

J13

J11

J14

U48/J2/J4

J25

J19

U36

U39

J15

CARDBUS

J10

U26

J21

J5

U43

J8

J17

J7

J16

U11/U12/U13/U14

J20/J23

U44

J9

J3 (SHARE WITH LEFT USB)

J3 (SHARE WITH BLUETOOTH)

J12

USB 2.0

P.14 P.14

P.15

USB PORT A

AGP BUS

I2CI2S

MEMORY BUS

Config

CPU PLL

Modem Board

Connector

RIGHT USB

2 DATA PAIRS

USB PORT E

051-6531

B

44

2

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MAP31 DDR CORE

RC AT 1M*0.1UF @ 24V

RC AT 1M*0.047UF @ 24V

<100UA ALLOWED

STBYMD

+3.3V_MAIN

DC/DC

PG 35

(LTC3411)

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

(LTC1625)

SHUT-DOWN

+PBUS (12.8V)

SLEEP: D3HOT/D3COLD

BECOMES ’1’; MUCH LESS THAN THE

AFTER PMU IS UP AND RUNNING

EXT_VCC

TURNS ON AS LOW AS 0.8V/TYP 1.5V

RC CHARGING AT INT_VCC (5V)

MAP31 DDR I/O

+2.5V_MAIN

INTREPID CORE

+5V_MAIN

MAIN 2.5V/1.5V

SHUTDOWN: STOPPED

RUN: RUNNING

SLEEP: STOPPED

PG 34

PG 35

RUN: RUNNING

SLEEP: STOPPED

SHUTDOWN: STOPPED

PG 20

SHUTDOWN: STOPPED

(LTC1778)

DC/DC

PG 32

PG 33

PG 31

PG 32

PG 31

RUN

SHUT-DOWN

RUN

SLEEP

(D3COLD)

GPU_VCORE

(D3HOT)

GPU_VCORE

(AT LTC1778 RUN/SS)

1_5V_2_5V_OK

(MAX1715 OUTPUT)

1_5V_2_5V_OK

+1_5V_SLEEP

+2_5V_SLEEP

+2_5V_MAIN

SLEEP

SLEEP_L_LS5

3V_5V_OK

2.4V - ??? MS

+3V_SLEEP

+5V_SLEEP

+3V_MAIN

+5V_MAIN

DCDC_EN

DCDC_EN_L

(+1.4V/+1.5V)

CPU_VCORE

1M & 0.1UF @14V, IT TAKES ~5.88MS TO START SWITCHER

GPU_VCORE

SEQUENCING

DCDC_EN_L

1_5V_2_5V_OK

D3_HOT

RUN/SS

INTERNAL 1.2UA CURRENT SOURCE

1_5V_2_5V_OK WILL NOT PULL LOW UNTIL +5V_MAIN TURNS ON

DCDC_EN_L OR PMU_POWERUP_L

DCDC_EN

SLEEP

D3_COLD

VCC

RUN: RUNNING

+5V_MAIN

SEQUENCING

MAXBUS

DCDC_EN

SLEEP

VCC

SHDN

+5V_MAIN

(MAX1717)

DC/DC

BROADCOM

MAXBUS

AGP I/O

+1.5V_MAIN

+5V_MAIN

+4_6V_BU

ON1/ON2

PGOOD

3V_5V_OK

PGOOD

(MAX1715)

DC/DC

BACKLIGHT

INVERTER

TURNS CONTROL TO RUN/SS WHEN IT’S OPEN

NO INRUSH PROTECTION

WHEN ONLY BATTERY IS CONNECTED

+5V_MAIN

14V_PBUS

+3V_PMU

LDO

+3V_PMU

(MAX1772)

CHARGER

BATTERY

BUCK

<~13.44V SHUTS-OFF

>~13.44V TURNS-ON

INRUSH

LIMITER

ADAPTER

IN

AC

(UNTIL DRAINED)

POWER BLOCK DIAGRAM

3S 3P PRISMATIC CELLS

& BOOST OUTPUT

FEED-IN PATH

U21

-

+

1V20_REF

BACKUP BATTERY

BACKUP

BATTERY

CHARGER INPUT

24V IS OUTPUT ONLY FROM

SHUTDOWN: STOPPED

RUN: RUNNING

SLEEP: RUNNING

RUN/SS - 3V

SHUTDOWN: STOPPED

SLEEP: RUNNING

RUN: RUNNING

TURNS ON OUTPUT @ 2.4V

WHEN ONLY BATTERY IS CONNECTED

NO INRUSH PROTECTION

+24V_PBUS

+BATT

1_5V_2_5V_OK

VCC

+1.8V_MAIN

+5V_MAIN

LOW IN SHUTDOWN

DCDC_EN_L WILL PULL ON1/ON2

DCDC_EN_L

VCC

TURNS ON AT >1V

DC/DC

(LTC3707)

MAIN 3V/5V

<100UA ALLOWED

RUN/SS - 5V

TURNS ON AT >1V

INTERNAL ZENER CLAMP TO 6V

STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

BATTERY VOLTAGE

SHUTDOWN: RUNNING

SLEEP: RUNNING

RUN: RUNNING

NO AC: BATTERY VOLTAGE

1625 NOT RUNNING

~13.5MS

2.6 MS

~11MS

~???MS

+1_5V_MAIN

+1_8V_MAIN

2.6 MS

1.9 MS

PG 30

PG 31

+PBUS (12.8V)

AC: 12.8V

+PBUS

12.8V CHARGES BACKUP BATTERY

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS

AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

+PBUS

REGULATOR

HOLDS BOTH RUN/SS AT GND

RUN/SS

DDR POWER

HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

GPU_VCORE

POWER SYSTEM ARCHITECTURE

WHEN IT’S CONNECTED TO GND

+1.2V/+1.0V

44

3

B

051-6531

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PREPREG THICKNESS: 2-3 MILS

LAYER COUNT: 12

GROUND VIAS

ASICS HEATSINK MOUNTS

BOARD INFORMATION

SEE PCB CAD FILES FOR MORE SPECIFIC INFO.

IMPEDANCE : 50 OHMS +/- 10%

1.0 OZ CU THICKNESS: 1.4 MILS

1/2 OZ CU THICKNESS: 0.7 MILS

THICKNESS : 1.2 MM / 0.047 IN

DIELECTRIC: FR-4

BOARD STACK-UP AND CONSTRUCTION

SIGNAL (1/2 OZ)

20R10 TH VIA OR VIA IN PAD

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

SIGNAL (1/3 OZ + COPPER PLATING)

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

GROUND (1/2 OZ) CUT POWER PLANE(1 OZ)

CUT POWER PLANE(1 OZ)

PREPREG (2MIL)

LAMINATE (3MIL)

LAMINATE (4MIL)

PREPREG (3MIL)

SIGNAL (1/2 OZ)

LAMINATE (4MIL)

GROUND (1/2 OZ)

PREPREG (3MIL)

SIGNAL (1/3 OZ + COPPER PLATING)

SIGNAL TRACE WIDTH: 4 MILS SIGNAL TRACE SPACING: 4 MILS

PCB SPECS

LAMINATE (4MIL)

1

2

PREPREG (3MIL)

LAMINATE (4MIL)

3 4

5 6

7 8

10

9

11

PREPREG (3MIL)

12

INVERTER

CHASSIS MOUNTS

BOARD HOLES

SPEAKER CLIPS

CONDUCTIVE MOUNTS

I/O AREA

255R158

OMIT

1

ZT11

HOLE-VIA-20R10

1

ZT75

HOLE-VIA-20R10

1

ZT61

HOLE-VIA-20R10

1

ZT63

HOLE-VIA-20R10

1

ZT51

HOLE-VIA-20R10

1

ZT54

HOLE-VIA-20R10

1

ZT42

HOLE-VIA-20R10

1

ZT64

HOLE-VIA-20R10

1

ZT76

HOLE-VIA-20R10

1

ZT59

HOLE-VIA-20R10

1

ZT62

HOLE-VIA-20R10

1

ZT22

HOLE-VIA-20R10

1

ZT3

HOLE-VIA-20R10

1

ZT25

HOLE-VIA-20R10

1

ZT32

HOLE-VIA-20R10

1

ZT31

HOLE-VIA-20R10

1

ZT26

HOLE-VIA-20R10

1

ZT23

HOLE-VIA-20R10

1

ZT19

HOLE-VIA-20R10

1

ZT15

HOLE-VIA-20R10

1

ZT17

HOLE-VIA-20R10

1

ZT13

HOLE-VIA-20R10

1

ZT12

HOLE-VIA-20R10

1

ZT21

HOLE-VIA-20R10

1

ZT14

HOLE-VIA-20R10

1

ZT18

HOLE-VIA-20R10

1

ZT20

235R126

OMIT

1

ZT4

OMIT

146R126

1

ZT83

OMIT

146R126

1

ZT5

OG-503040

SHLD-SM

3

2

1

SH1

CHGND1

SPKR_CLIP_P84

1

SP6

SPKR_CLIP_P84

1

SP1

SPKR_CLIP_P84

1

SP3

SPKR_CLIP_P84

1

SP5

SPKR_CLIP_P84

1

SP2

STDOFF-217ODX150IDX35H-TH

1

BS1

SPKR_CLIP_P84

1

SP4

OMIT

235R126

1

ZT6

OMIT

235R126

1

ZT16

CHGND6

CHGND2

OMIT

255R158

1

ZT10

CHGND5

HOLE-VIA-20R10

1

ZT77

HOLE-VIA-20R10

1

ZT30

HOLE-VIA-20R10

1

ZT28

HOLE-VIA-20R10

1

ZT37

HOLE-VIA-20R10

1

ZT39

HOLE-VIA-20R10

1

ZT40

HOLE-VIA-20R10

1

ZT27

HOLE-VIA-20R10

1

ZT36

HOLE-VIA-20R10

1

ZT38

OMIT

255R158

1

ZT2

HOLE-VIA-20R10

1

ZT24

HOLE-VIA-20R10

1

ZT81

HOLE-VIA-20R10

1

ZT34

HOLE-VIA-20R10

1

ZT33

HOLE-VIA-20R10

1

ZT43

HOLE-VIA-20R10

1

ZT46

HOLE-VIA-20R10

1

ZT50

HOLE-VIA-20R10

1

ZT35

HOLE-VIA-20R10

1

ZT44

HOLE-VIA-20R10

1

ZT66

HOLE-VIA-20R10

1

ZT67

HOLE-VIA-20R10

1

ZT53

HOLE-VIA-20R10

1

ZT52

HOLE-VIA-20R10

1

ZT70

HOLE-VIA-20R10

1

ZT71

HOLE-VIA-20R10

1

ZT78

HOLE-VIA-20R10

1

ZT69

HOLE-VIA-20R10

1

ZT65

HOLE-VIA-20R10

1

ZT45

HOLE-VIA-20R10

1

ZT47

HOLE-VIA-20R10

1

ZT49

HOLE-VIA-20R10

1

ZT56

HOLE-VIA-20R10

1

ZT48

HOLE-VIA-20R10

1

ZT72

HOLE-VIA-20R10

1

ZT55

HOLE-VIA-20R10

1

ZT29

HOLE-VIA-20R10

1

ZT82

HOLE-VIA-20R10

1

ZT74

HOLE-VIA-20R10

1

ZT79

HOLE-VIA-20R10

1

ZT68

HOLE-VIA-20R10

1

ZT60

HOLE-VIA-20R10

1

ZT58

HOLE-VIA-20R10

1

ZT41

HOLE-VIA-20R10

1

ZT7

HOLE-VIA-20R10

1

ZT9

HOLE-VIA-20R10

1

ZT8

HOLE-VIA-20R10

1

ZT1

HOLE-VIA-20R10

1

ZT57

HOLE-VIA-20R10

1

ZT80

HOLE-VIA-20R10

1

ZT73

44

4

051-6531

B

(1 OF 3)

TEST4

TEST3

TEST2

TEST1

TEST0

EXT_QUAL

TBEN

L2TSTCLK

L1TSTCLK

TCK

TMS

TDO

TDI

DTI0 DTI1 DTI2 DTI3

PLL_EXT

PLLCFG3

PLLCFG2

PLLCFG1

PLLCFG0

CLKOUT

SYSCLK

BVSEL

TT3

TT2

TT1

TSIZ0

TSIZ2

TSIZ1

TT4

TT0

A33 A34 A35

AP0

AP3

AP2

AP4

AP1

A25

A24

A23

A26 A27 A28 A29 A30 A31 A32

A13 A14 A15 A16 A17 A18 A19 A20 A21 A22

A12

A10

A9

A8

A7

A6

A3 A4 A5

A11

A2

A0 A1

OVDD

VDD

GND

AVDD

BR* BG*

TS*

TRST*

LSSDMODE*

TA*

TEA*

QREQ* QACK*

CKSTP_IN*

CKSTP_OUT*

INT* SMI*

MCP* SRESET* HRESET*

PMON_IN*

PMON_OUT*

BMODE0*

BMODE1*

TBST*

GBL* WT* CI* AACK* ARTRY* SHD0*

HIT*

SHD1*

DRDY*

DBG*

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

CPU_VCORE DECOUPLING NETWORK

PLCAE SHORT CLOSE TO CENTER OF CPU

MORE 0805 10UF CAPS ON VCORE

POWER SUPPLY PAGE (PG 33)

470OHM FOR BOOT BANGER

IN FORMER L3 AREA

MPC7447

PLACE BELOW CPU

NC

MPC7447 MAXBUS

NC

NC NC NC NC NC

MPC7447 PULL-UPS

CPU_OVDD DECOUPLING NETWORK

470OHM FOR BOOT BANGER

CPU INTERNAL PLL FILTERING

10K

5%

1/16W

MF

402

21

R87

5%

1/16W

MF

402

10K

21

R139

MF

402

1/16W

5%

10K

21

R107

MF

1/16W

470

5%

402

21

R59

5%

1/16W

MF

402

10K

21

R97

MF

1/16W

5%

200

402

NO_BBANG

2

1

R85

MF

1/16W

10K

5%

402

21

R160

1K

1/16W

MF

402

5%

21

R57

1/16W

MF

402

5%

10K

21

R58

5%

10K

1/16W

MF

402

21

R129

10V 402

CERM

20%

0.1uF

2

1

C39

CERM

0.1uF

20% 10V

402

2

1

C203

10V 402

CERM

20%

0.1uF

2

1

C73

20% CERM

402

10V

0.1uF

2

1

C74

20%

402

10V CERM

0.1uF

2

1

C194

402

CERM

0.1uF

10V

20%

2

1

C40

20% CERM

10V 402

0.1uF

2

1

C191

CERM

20% 10V

402

0.1uF

2

1

C152

0.1uF

10V CERM

20%

402

2

1

C138

0.1uF

402

CERM

10V

20%

2

1

C113

0.1uF

402

10V CERM

20%

2

1

C104

402

20% 10V CERM

0.1uF

2

1

C115

20% CERM

402

10V

0.1uF

2

1

C38

0.1uF

20% CERM

10V 402

2

1

C224

0.1uF

20% CERM

402

10V

2

1

C48

0.1uF

20% 10V

402

CERM

2

1

C90

10V 402

CERM

20%

0.1uF

2

1

C72

CERM

20% 10V

402

0.1uF

2

1

C107

1/16W

5% MF

402

470

2

1

R206

20% CERM

10V 402

0.1uF

2

1

C114

10V CERM 402

20%

0.1uF

2

1

C154

10V

20% CERM

402

0.1uF

2

1

C91

CERM

0.1uF

20% 10V

402

2

1

C168

402

10V CERM

20%

0.1uF

2

1

C223

CERM

0.1uF

402

10V

20%

2

1

C112

402

MF

1/16W

5%

470

2

1

R241

5%

1/16W

MF

402

10K

21

R60

5%

1/16W

MF

402

470

21

R61

5%

402

1/16W

MF

10K

21

R148

5%

402

MF

1/16W

1K

21

R98

10uF

20%

6.3V CERM 805

C25

6.3V

20% CERM

805

10uF

2

1

C346

CERM

20%

6.3V

10uF

805

C342

20%

805

6.3V CERM

10uF

2

1

C8

402

MF

5%

1/16W

10K

21

R120

402

MF

5%

10K

1/16W

21

R109

1/16W MF 402

402

1%

1

2

R106

805

10V

20%

2.2uF

CERM

2

1

C340

10V 805

CERM

20%

2.2uF

2

1

C12

1/16W

MF

402

10K

5%

21

R73

MF

402

5%

1/16W

10K

21

R72

1/16W

1_5V_MAXBUS

603

MF

5%

0

21

R702

1_8V_MAXBUS

MF

5%

0

603

1/16W

21

R693

+1_5V_SLEEP

+1_8V_SLEEP

402

5%

470

1/16W MF

BBANG

2

1

R86

470

402

MF

1/16W

5%

21

R128

BGA

APOLLO_MPC7445_360

800MHZ

OMIT

D3

K10

K8

J13

J11

J9J7H12

H10

M12

M10

M8

L13

L11

L9L7K14

K12

H8

C5

E9

F6

E6

E5

E7

F7

G6

L4

A5

F1

D10

E10

B10

B6

A12

L1

A4

B9

C6

F11

E1

K6

A10

A2

F9

H5

E4

P4 G5

A9

D9

A7

D7

C7

C8

B8

J5H3G18

F2

E18

D5

C12

V14

V10

V7V4U16

U12

U2T9T6C2R16

R13

R4

P11

P8P2N6M3L5

K2

B4

C9

E8

B3

G8

D4

D8

B2

H7

H4

G17

F3

E17

V15

V11

V8

V5

U17

U13

U3

D13

T10

T7

R17

R14

R5

P12

P9P3N7

M13D6M11

M9M7M4

L12

L10

L8

L6

K13

K11

C3

K9K3K7

J12

J10

J8

J6

H13

H11

H9

B5

E2

A11

N1

P1

K1

G1

R3

M2

H2

B1

A3

J1

B7D2

F8

G9

M1

A8

N2

G7

F5

H6

E3

C1

R1

G2

C10

D1

D11

L2

F10

B11

G10

C4

B12

W1

N5

G3

U1

V2

T1

N3

P5

M5

J3

N4

K4

J2

C11

W2

K5

R2

J4

V1

F4

T2

G4

L3

D12

H1

E11

U43

402

10V CERM

20%

0.1uF

2

1

C103

402

20% CERM

10V

0.1uF

2

1

C149

0.1uF

10V 402

CERM

20%

2

1

C151

0.1uF

10V CERM

20%

402

2

1

C202

402

10V CERM

20%

0.1uF

2

1

C111

10V 402

CERM

20%

0.1uF

2

1

C110

0.1uF

10V 402

CERM

20%

2

1

C275

10V

20%

402

0.1uF

CERM

2

1

C257

0.1uF

402

CERM

20% 10V

2

1

C273

0.1uF

20% CERM

402

10V

2

1

C41

10V CERM 402

0.1uF

20%

2

1

C272

10V CERM 402

20%

0.1uF

2

1

C46

10K

5%

1/16W

MF

402

21

R65

5%

1/16W

MF

402

10K

21

R130

5%

1/16W

MF

402

10K

21

R79

5% MF

10K

402

1/16W

21

R108

402

10V CERM

20%

0.1uF

2

1

C190

402

10V CERM

20%

0.1uF

2

1

C150

20%

0.1uF

402

10V CERM

2

1

C201

402

0.1uF

10V CERM

20%

2

1

C193

CERM

0.1uF

402

10V

20%

2

1

C153

20% CERM

10uF

6.3V 805

2

1

C344

20% CERM

10V 402

0.1uF

2

1

C189

402

CERM

20%

0.1uF

10V

2

1

C105

10V 402

20%

0.1uF

CERM

2

1

C192

0.1UF

20% 10V CERM 402

2

1

C47

0.1UF

20% 10V CERM 402

2

1

C188

0.1UF

20% 10V CERM 402

2

1

C169

0.1UF

20% 10V CERM 402

2

1

C170

0.1UF

20% 10V CERM 402

2

1

C155

0.1UF

20% 10V CERM 402

2

1

C139

0.1UF

20% 10V CERM 402

2

1

C92

0.1UF

20% 10V CERM 402

2

1

C106

10UF

805

CERM

6.3V

20%

2

1

C195

805

CERM

6.3V

20%

10UF

2

1

C347

10UF

20%

6.3V CERM 805

2

1

C258

805

CERM

6.3V

20%

10UF

2

1

C345

805

CERM

6.3V

20%

10UF

2

1

C156

805

6.3V

20%

10UF

CERM

2

1

C341

10UF

20%

805

CERM

6.3V

2

1

C225

805

CERM

6.3V

20%

10UF

2

1

C343

SM

OMIT

21

XW31

402

10V

20% CERM

0.1uF

2

1

C137

805

CERM

10V

2.2uF

20%

2

1

C136

B

051-6531

5

44

IC,APOLLO7,1.X,1.3GHZ,1.XV CORE,85C

U43

1

337S2733 CRITICAL 1_30_VCORE

1_32_VCORE337S2807

1

IC,APOLLO7,1.X,1.33GHZ,1.32V VCORE,85C

U43

CRITICAL

CPU_ADDR<0>

CPU_AVDD

MAXBUS_SLEEP

CPU_CLKOUT_SPN

JTAG_CPU_TRST_L

CPU_QREQ_L

JTAG_CPU_TCK

CPU_DTI<2>

CPU_ADDR<9>

JTAG_CPU_TCK

CPU_L1TSTCLK

MPIC_CPU_INT_L

JTAG_CPU_TDI

JTAG_CPU_TMS

CPU_SMI_L

CPU_HRESET_L

CPU_SRWX_L

CPU_L2TSTCLK

CPU_PULLDOWN

CPU_EDTI

CPU_PULLUP

CPU_PMONIN_L

CPU_CHKSTP_OUT_L

CPU_LSSD_MODE

CPU_SHD0_L

CPU_TBEN

CPU_SHD1_L

CPU_CHKS_L

CPU_VCORE_SLEEP

CPU_TEA_L

CPU_BR_L

CPU_BUS_VSEL

SYSCLK_CPU

CPU_PULLUP

CPU_CHKS_L

CPU_EMODE1_L

CPU_EMODE0_L

CPU_PMONIN_L

CPU_CHKSTP_OUT_L

MPIC_CPU_INT_L

CPU_MCP_L

CPU_SMI_L

CPU_HRESET_L

CPU_SRESET_L

CPU_TBEN

JTAG_CPU_TDI JTAG_CPU_TDO_TP

JTAG_CPU_TRST_L

JTAG_CPU_TMS

CPU_L1TSTCLK

CPU_LSSD_MODE

CPU_L2TSTCLK

CPU_TA_L

CPU_PLL_CFG<3>

CPU_DBG_L

CPU_DTI<1>

CPU_DTI<0>

CPU_PLL_CFG<0>

MAXBUS_SLEEP

CPU_HIT_L

CPU_SHD1_L

CPU_SHD0_L

CPU_ARTRY_L

CPU_CI_L

CPU_WT_L

CPU_AACK_L

CPU_TSIZ<2> CPU_GBL_L

CPU_TBST_L CPU_TSIZ<0>

CPU_TT<2> CPU_TT<3> CPU_TT<4>

CPU_TT<1>

CPU_ADDR<31>

CPU_ADDR<30>

CPU_ADDR<29>

CPU_ADDR<28>

CPU_ADDR<26> CPU_ADDR<27>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25>

CPU_ADDR<21> CPU_ADDR<22>

CPU_ADDR<18> CPU_ADDR<19> CPU_ADDR<20>

CPU_ADDR<16> CPU_ADDR<17>

CPU_ADDR<13> CPU_ADDR<14> CPU_ADDR<15>

CPU_ADDR<12>

CPU_ADDR<8>

CPU_ADDR<10>

CPU_ADDR<7>

CPU_ADDR<4>

CPU_ADDR<3>

CPU_ADDR<2>

CPU_TS_L

CPU_BG_L

CPU_TT<0>

CPU_SRWX_L

CPU_PULLDOWN

CPU_EDTI

CPU_DRDY_L

CPU_PULLDOWN

CPU_TSIZ<1>

MAXBUS_SLEEP

CPU_EMODE1_L

CPU_MCP_L

CPU_SRESET_L

CPU_ADDR<6>

CPU_ADDR<5>

CPU_ADDR<11>

CPU_QACK_L

CPU_ADDR<1>

ADT7460_VCORE_MON

CPU_VCORE_SLEEP

CPU_PLL_CFG<4>

CPU_PLL_CFG<2>

CPU_PLL_CFG<1>

38

34

23

16

15

39

15

39

8

39

23

38

23

39

8

38

36

7

23

36

23

36

23

14

23

30

7

39

8

34

36

39

14

30

7

39

8

23

36

7

36

7

39

36

34

8

38

5

8

5

8

5

8

8 7

8

5

7

5

39

5

8

7

8

7

5

8

5

8

5

8

5

8

5

8

25

5

7

(2 OF 3)

D0

D60 D61 D62 D63

DP7

DP0 DP1 DP2 DP3 DP4 DP5 DP6

D59

D56 D57 D58

D55

D54

D53

D52

D50 D51

D49

D46

D45

D47 D48

D44

D43

D42

D41

D40

D39

D38

D37

D36

D35

D34

D33

D30 D31 D32

D29

D26

D25

D24

D23

D27 D28

D22

D21

D20

D19

D18

D17

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D1 D2 D3

(3 OF 3)

NC_B14

NC_B13

NC_E12

NC_B18

NC_N19

NC_K17

NC_N18

NC_N12

NC_A6

NC_C13

NC_G11

NC_A14

NC_F12

NC_A13

NC_A18

NC_C14

NC_A15

NC_B16

NC_E13

NC_F13

NC_F14

NC_G12

NC_A17

NC_C15

NC_G14

NC_H14

NC_E14

NC_G13

NC_C16

NC_C17

NC_B17

NC_B15

NC_E15

NC_D14

NC_A19

NC_B19

NC_A16

NC_C18

NC_G15

NC_D15

NC_C19

NC_K16

NC_J17

NC_K18

NC_L18

NC_L19

NC_M18

NC_P16

NC_L16

NC_H15

NC_J16

NC_K19

NC_J15

NC_J19

NC_J18

NC_J14

NC_K15

NC_L14

NC_L17

NC_M15

NC_N17

NC_P19

NC_M16

NC_M19

NC_N16

NC_N13

NC_M17

NC_M14

NC_N14

NC_P18

NC_N15

NC_D19 NC_F15 NC_G19 NC_E16 NC_D17 NC_D16

NC_P15 NC_L15

NC_H19 NC_H18 NC_H17 NC_H16 NC_E19 NC_D18 NC_F16 NC_G16

NC_F19

NC_F17

NC_F18

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

NC NC

NC

NC NC

NC

NC NC NC NC NC NC NC NC NC

NC NC NC

NC

MPC7447/BBANG

NC

BOOT BANGER - LMU PERORMS THIS FUNCTION IF NEEDED

SEE PAGE 22

APOLLO_MPC7445_360

BGA

800MHZ

OMIT

W6

N8

V3

M6

W9

T4

W4

T3

W13

V13

P14

T8

W8

R8

P6

U15

R7

U7

U8

U4

V17

W3

T17

T18

T16

W18

T15

W17

U18

W19

U19

T19

V19

R18

V18

R19

P17

W16

V6

P7

R6

W7

U5

T5

U6

W5

V9

U9

V16

W10

R9

U10

P10

N9

R10

T11

W11

U11

R11

T14

N10

N11

V12

W12

T12

R12

W14

U14

P13

T13

W15

R15

U43

OMIT

BGA

800MHZ

APOLLO_MPC7445_360

P19

P18

P16

P15

N19

N18

N17

N16

N15

N14

N13

N12

M19

M18

M17

M16

M15

M14

L19 L18

L17

L16

L15

L14

K19

K18

K17

K16

K15

J19

J18

J17

J16

J15

J14

H19 H18 H17 H16

H15

H14

G19

G16

G15

G14

G13

G12

G11

F19

F18 F17

F16

F15

F14 F13

F12

E19

E16

E15

E14

E13

E12

D19

D18

D17 D16

D15

D14

C19

C18

C17 C16

C15

C14

C13

B19

B18

B17

B16

B15

B14

B13

A6

A19

A18

A17

A16

A15

A14

A13

U43

6

44

051-6531

B

CPU_DATA<18>

CPU_DATA<0>

CPU_DATA<2>

CPU_DATA<1>

CPU_DATA<3>

CPU_DATA<5>

CPU_DATA<4>

CPU_DATA<6> CPU_DATA<7> CPU_DATA<8>

CPU_DATA<10>

CPU_DATA<9>

CPU_DATA<12>

CPU_DATA<11>

CPU_DATA<13>

CPU_DATA<15>

CPU_DATA<14>

CPU_DATA<17>

CPU_DATA<16>

CPU_DATA<19> CPU_DATA<20> CPU_DATA<21> CPU_DATA<22> CPU_DATA<23> CPU_DATA<24> CPU_DATA<25> CPU_DATA<26> CPU_DATA<27> CPU_DATA<28> CPU_DATA<29> CPU_DATA<30> CPU_DATA<31>

CPU_DATA<33>

CPU_DATA<32>

CPU_DATA<34> CPU_DATA<35> CPU_DATA<36> CPU_DATA<37> CPU_DATA<38> CPU_DATA<39> CPU_DATA<40> CPU_DATA<41> CPU_DATA<42> CPU_DATA<43> CPU_DATA<44>

CPU_DATA<46>

CPU_DATA<45>

CPU_DATA<47> CPU_DATA<48> CPU_DATA<49>

CPU_DATA<51>

CPU_DATA<50>

CPU_DATA<52> CPU_DATA<53> CPU_DATA<54>

CPU_DATA<56>

CPU_DATA<55>

CPU_DATA<57> CPU_DATA<58> CPU_DATA<59>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<62> CPU_DATA<63>

36

8

G

D

S

G

D

S

04

G

D

S

G

D

S

D

G

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

R01D

TRANSISTOR ON CPU_PLL_CFG<4> IS MET.

PLL DISABLE 1 X

STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC

R01B R00C

1417

1167

1083

1000

9.0X

11.0X

1500

R10B

MAXBUS VSEL

1.5V INTERFACE

BUSTYPE SELECT

APOLLO ONLY SUPPORTS MAXBUS

(PROCESSOR)

CPU_BUS_VSEL

SIGNAL

(PROCESSOR)

CPU_EMODE0_L

CPU_HRESET_L

CPU_HRESET_INV

CPU_HRESET_L

TIED

HIGH

LOW

1.8V INTERFACE

1.5V INTERFACE

2.5V INTERFACE

60X BUS MODE

APPLICATION

MAX BUS MODE

DESKTOP HAD PROBLEM USING

1.8V INTERFACE

933

267 400 533

867

800

733

667

0 1011 0B 0 1001 09

5.0X

5.5X

333 500 667

9.5X

8.0X

7.5X

7.0X

6.5X

6.0X

4.0X

3.0X

2.0X

1.0X

0.0X

APOLLO 7

PULLUP TO ENSURE THAT Vgs OF PASS

R10E R00ER10A R00D

LOW SPEED 0 0

R10D R01E

CPU FREQUENCY CONFIGURATION

(MHZ)

PLL OFF

133MHZ

(Bus-to-Core)

MULTIPLIER

0 1111 0F

CPU_PLL_CFG

(AT BUS FREQUENCY)

CORE FREQUENCY

167MHZ

PLL BYPASS 0 0011 03

0 0100 04 0 1000 08 0 1010 0A

0 1101 0D 0 0101 05 0 0010 02

0 1100 0C

0 0001 01

1000 1067

1 0110 16

32004000

3733466728.0X

24.0X

1 1010 1A

0 0000 00

1 1000 18 1 1001 19

1833

1667 1750

1917

1467

1333 1400

1533

1 1100 1C 1 0001 11 1 1101 1D

1 0101 15 0 1110 0E

1 0000 10 1 0010 12 1 0011 13

1 1011 1B 1 1111 1F

1 0100 14

1667

1600

2667

2400

2267

1800

1733

2133

2000

18672333 2500 2667

2083

2000

3333

3000

2833

2250

2167

3500 2800

16.0X

15.0X

14.0X

10.0X

10.5X

12.0X

11.5X

12.5X

13.0X

13.5X

17.0X

18.0X

20.0X

21.0X

1 0111 17

1200

1133

0 0110 06

1583 1267

0 0111 07

1 1110 1E

CPU CONFIGURATION

4 0123 E ABCD HEX

R10E, R01E, OR PULLUP STUFFED

STUFF PASS TRANSISTOR ONLY IF

HIGH SPEED 0 1

CPU PLL CONFIG CIRCUITRY

R00B R10C

INVERTED HRESET_L

R00A R01C

NEED TO CHARACTERIZE

INVERTER TO INVERT HRESET_L

CPU CONFIGURATION

1250 1333

833 917

8.5X

+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L

R01A

NO STUFF

0

MF 402

5% 1/16W

2

1

R23

NO STUFF

5%

402

MF

1/16W

0

2

1

R16

1/16W

10K

5% MF

402

2

1

R9

1/16W

10K

402

MF

5%

2

1

R10

10K

1/16W

5% MF

402

2

1

R11

402

10K

MF

1/16W

5%

2

1

R12

402

5%

1/16W

MF

47K

2

1

R3

1/16W 402

10K

5% MF

2

1

R48

402

82K

MF

1/16W

5%

2

1

R33

0

5% 1/16W MF 402

NO STUFF

2

1

R18

5%

0

1/16W MF 402

NO STUFF

2

1

R17

10K

5% 1/16W MF 402

NO STUFF

2

1

R2

2N7002DW

SOT-363

4

5

3

Q2

2N7002DW

SOT-363

1

2

6

Q2

SC70-5

SN74AUC1G04

1_5V_MAXBUS

CRITICAL

4

5

3

2

U1

402

MF

1/16W

5%

0

2

1

R27

2N7002DW

NO STUFF

SOT-363

1

2

6

Q1

2N7002DW

NO STUFF

SOT-363

4

5

3

Q1

+5V_SLEEP

1/16W

MF

5%

22

402

1_5V_MAXBUS

1 2

R4

22

1/16W

MF

5%

402

1 2

R149

10

MF

5%

1/16W

402

1_8V_MAXBUS

2

1

R5

2N7002

SM

2

1

3

Q3

SM

2N3904

2

3

1

Q4

249K

402

MF

1/16W

1%

21

R47

NO STUFF

5% 1/16W MF 402

0

2

1

R19

+3V_SLEEP

1/16W

NO STUFF

402

MF

5%

0

2

1

R20

MF 402

5%

0

NO STUFF

1/16W

2

1

R21

1/16W

NO STUFF

402

MF

5%

0

2

1

R22

MF

1/16W

0

402

5%

2

1

R24

1/16W MF

5%

402

0

2

1

R25

0

5% 1/16W MF 402

NO STUFF

2

1

R26

402

MF

5%

0

1/16W

2

1

R14

402

5%

NO STUFF

0

MF

1/16W

2

1

R13

NO STUFF

402

MF

1/16W

5%

0

2

1

R15

44

7

051-6531

B

CPU_PLL_CFG<0> CPU_PLL_CFG<1>

CPU_PLL_FS10

CPU_PLL_FS00

MAXBUS_SLEEP

CPU_VCORE_HI_OC

CPU_PLL_FS01

CPU_PLL_CFG<2> CPU_PLL_CFG<3>

CPU_PLL_STOP_BASE

CPU_PLL_CFGEXT CPU_PLL_CFG<4>

CPU_PLL_STOP_OC

PLL_STOP_L

CPU_PLL_STOP_OC

CPU_BUS_VSEL

MAXBUS_SLEEP

CPU_HRESET_INV

CPU_HRESET_L

CPU_HRESET_L CPU_EMODE0_L

PLL_STOP_L

38

34

23

16

15

39

8

23

7

34

30

7

5

30

5

7

5

5 5

7

(PLL6)

VSSA_7

(PLL6)

VDD15A_7

D_42

D_41

D_40

D_39

D_38

D_44

D_43

D_45 D_46 D_47 D_48

D_52

D_51

D_50

D_49

D_53

D_55

D_54

D_56 D_57 D_58

D_60

D_59

D_62

D_61

D_63

DBG

DRDY

DTI_0

TEA

TA

DTI_2

DTI_1

D_1

D_0

D_2

D_6

D_5

D_4

D_3

D_7

D_11

D_10

D_9

D_8

D_12

D_14

D_13

D_15 D_16 D_17

D_22

D_21

D_20

D_19

D_18

D_23 D_24 D_25 D_26 D_27

D_32

D_31

D_30

D_29

D_28

D_34

D_33

D_35 D_36 D_37

BR

(1 OF 9)

MAXBUS

INTERFACE

TS

BG

A_0 A_1 A_2 A_3 A_4 A_5

A_9

A_6 A_7 A_8

A_10

A_14

A_13

A_12

A_11

A_20

A_16 A_17 A_18 A_19

A_15

A_27

A_22

A_21

A_30

A_29

A_28

A_26

A_25

A_24

A_23

TT_2

TT_1

TT_0

A_31

TBST TSIZ_0 TSIZ_1 TSIZ_2

CI GBL

TT_4

AACK

QREQ

ARTRY

TT_3

WT

HIT

ANALYZER_CLK

SUSPENDACK

SUSPENDREQ

QACK

STOPCPUCLK

CPU_FB_OUT

CPU_FB_IN

CPU_CLK

TBEN

ACS_REF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DDR_TPDModeEnable_h

0: TDI input (JTAG)

1: TDI output

Spare

MODE C (2.0X) IS FOR CLOCK SLEW OPERATION

FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE

MAXBUS PULL-UPS

0: Legacy interface

1: B-mode interface

FireWire PHY interface

PCI1_REQ1_L / PCI1_GNT1_L

PCI1_REQ2_L / PCI1_GNT2_L

PCI1_REQ0_L / PCI1_GNT0_L

Spare

1: GPIOs

0: REQ/GNT

1: GPIOs

0: REQ/GNT

1: GPIOs

0: REQ/GNT

Processor Bus Mode

1: 60x bus (G3)

0: Max Bus (G4)

BIT 56 TO 63

INTREPID BOOT STRAPS

LONG = 1" LONGER THAN MATCHED LENGTH

SHORT = 1" SHORTER THAN MATCHED LENGTH

NO BUS KEEPER - ?

INPUT - PU

INPUT - PD

NO BUS KEEPER - PU

NO BUS KEEPER - PU NO BUS KEEPER - PU

INPUT - PU

NO BUS KEEPER - PU

NO BUS KEEPER

Vout = MaxBus rail (1.8V)

Vin = Intrepid Vcore (1.5V)

BIT2 BIT1 BIT0

BIT0BIT2

001: 50 ohm

101: 40 ohm

010: 100 ohm 100: 200 ohm 000: 200 ohm

110: 66.6 ohm

011: 33.3 ohm

111: 28.6 ohm

MaxBus output impedance

PLL4MODESEL_NXT[2:0]

1: External source

SelPLL4ExtSrc

1: Active

INTREPID OUTPUTS HIGH BY DEFAULT

BUF_REF_CLK_OUTEnable_h

1: Active

0: Normal 1394b

1: TI PHY workaround

TI 1394b workaround

Spare

0: Inactive

AnalyzerClk_En_h

0: Inactive

DDR_TPDEn_Pol

1: Active low

0: Active high

ExtPLL_SDwn_Pol

Spare

BIT 32 TO 39

Spare

NO BUS KEEPER - PU

Intrepid MaxBus

1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED 2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED 3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED 4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED 5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED 6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT

THE FOLLOWING STRAP BITS CAN BE CHANGED BY SOFTWARE:

IF A STRAP IS NOT LISTED, THEN IT CANNOT BE CHANGED BY SOFTWARE

INPUT

NO BUS KEEPER - PU

0: PLL5 (NO SPREAD)

1: PLL4

001: 149.76MHZ

000: 166.4MHZ (2.5X)

BIT1

0: PLL5 (NO SPREAD)

PCI0 Source Clock

010: 133.12MHZ (2.0X) 011: 99.84MHZ (1.5X) 100: 83.20MHZ

MODE A (2.5X) IS FOR STATIC OPERATION

INTREPID BOOT STRAPS

1: Active

Spare

1: Active low

0: Inactive

0: PLL5

BIT 48 TO 55

InternalSpreadEn

BIT 40 TO 47

1: PLL4

PCI1 Source Clock

402

MF

1/16W

1%

1K

2

1

R137

402

CERM

6.3V

20%

0.22UF

2

1

C308

4.7

5%

1/16W

MF

402

21

R227

0

402

MF

1/16W

5%

21

R144

10K

5%

1/16W

SM1

72

RP24

0

402

MF

1/16W

5%

2 1

R167

MF

1/16W

1%

402

511

2

1

R197

NO STUFF

5%

1/16W

MF

402

10K

2

1

R178

10K

402

MF

1/16W

5%

NO STUFF

2

1

R179

NO STUFF

10K

402

MF

1/16W

5%

2

1

R651

NO STUFF

5%

1/16W

MF

402

10K

2

1

R166

10K

402

MF

1/16W

5%

NO STUFF

2

1

R153

NO STUFF

5%

1/16W

MF

402

10K

2

1

R123

NO STUFF

10K

402

MF

1/16W

5%

2

1

R135

5%

1/16W

MF

402

10K

2

1

R674

10K

402

MF

1/16W

5%

2

1

R143

5% MF

402

1/16W

10K

2

1

R673

5%

1/16W

MF

402

10K

2

1

R664

10K

402

MF

5%

1/16W

2

1

R657

5%

402

10K

MF

1/16W

2

1

R639

10K

402

MF

5%

1/16W

2

1

R643

10K

402

MF

1/16W

5%

NO STUFF

2

1

R642

10K

402

MF

5%

1/16W

2

1

R136

MF

402

1/16W

5%

10K

NO_SSCG

2

1

R165

NO_SSCG

10K

402

1/16W

5% MF

2

1

R177

402

MF

1/16W

5%

NO_SSCG

10K

2

1

R152

5%

1/16W

MF

402

NO STUFF

10K

2

1

R184

402

MF

1/16W

5%

10K

SSCG

2

1

R134

NO STUFF

10K

402

MF

1/16W

5%

2

1

R164

10K

402

MF

1/16W

5%

NO STUFF

2

1

R142

10K

402

MF

1/16W

5%

NO STUFF

2

1

R122

5% MF

402

10K

SSCG

1/16W

2

1

R666

MF

5%

10K

1/16W

SSCG

402

2

1

R658

SSCG

10K

402

MF

1/16W

5%

2

1

R675

5% MF

402

10K

1/16W

2

1

R683

402

MF

1/16W

5%

10K

NO_SSCG

2

1

R644

5%

1/16W

MF

402

10K

2

1

R665

10K

402

MF

1/16W

5%

2

1

R652

10K

402

MF

1/16W

5%

2

1

R640

10K

402

MF

1/16W

5%

NO STUFF

2

1

R176

5%

1/16W

MF

402

10K

NO STUFF

2

1

R141

10K

402

MF

1/16W

5%

2

1

R183

10K

402

MF

1/16W

5%

NO STUFF

2

1

R162

5%

1/16W

MF

402

10K

NO STUFF

2

1

R151

10K

402

MF

1/16W

5%

2

1

R163

5%

1/16W

MF

402

10K

SSCG

2

1

R121

10K

402

MF

1/16W

5%

2

1

R676

NO STUFF

5%

1/16W

MF

402

10K

2

1

R684

5%

1/16W

MF

402

10K

2

1

R653

10K

402

MF

1/16W

5%

2

1

R667

5%

1/16W

MF

402

10K

2

1

R659

402

MF

1/16W

5%

NO STUFF

10K

2

1

R668

NO_SSCG

5% MF

402

10K

1/16W

2

1

R641

10K

402

MF

1/16W

5%

SSCG

2

1

R133

MF

1/16W

NO_SSCG

10K

5%

402

2

1

R645

5%

1/16W

MF

402

10K

NO STUFF

2

1

R182

10K

402

MF

1/16W

5%

2

1

R174

5%

1/16W

MF

402

10K

NO STUFF

2

1

R150

10K

402

MF

1/16W

5%

NO STUFF

2

1

R131

5%

1/16W

MF

402

10K

NO STUFF

2

1

R132

NO STUFF

10K

402

MF

1/16W

5%

2

1

R175

NO STUFF

10K

402

MF

1/16W

5%

2

1

R161

5%

1/16W

MF

402

10K

NO STUFF

2

1

R140

10K

402

MF

1/16W

5%

2

1

R685

10K

402

MF

1/16W

5%

2

1

R660

NO STUFF

5%

1/16W

MF

402

10K

2

1

R678

5%

1/16W

MF

402

10K

2

1

R647

10K

402

MF

1/16W

5%

2

1

R646

5%

1/16W

MF

402

10K

2

1

R677

10K

402

MF

1/16W

5%

2

1

R669

5%

1/16W

MF

402

10K

2

1

R654

INTREPID-REV2.1

BGA

CRITICAL

D28

H25

H26

J25

D27

B28

G25

E25

D26

H24

G24

B27

E28

A28

A31

E27

AK9 AM8

AH9

A32

G27

B31

A29

D11

E12

A8

G20

B20

G19

E19

A9

D19

A20

J19

B19

H19

A19

A18

D18

B18

E18

B8

B17

A17

G18

D17

H18

J18

A16

E17

B16

A15

B9

H17

B15

G17

E16

D16

A13

A14

D15

J16

E15

H11

G16

A12

B14

D14

H15

B13

G15

B12

E14

H14

E11

G14

A11

D13

B11

G13

E13

D12

A10

J13

B10

G12

D10

B30

D29

K25

G28

A30H16

J24

J15

G26

E29 E26

E23

A25

D23

A26

B26

G23

A21

D20

E24

B21

E20

A22

H21

B22

H20

A23

D21

A24

E21

A27

G21

J21

E22

B23

B24

D22

G22

H22

B25

J22

D25

D24

H23

G8

H13

B29

U45

402

MF

1/16W

5%

0

NO STUFF

2

1

R225

0

5%

1/16W

MF

402

21

R215

402

MF

1/16W

5%

0

2

1

R208

NO STUFF

0

5%

1/16W

MF

402

21

R207

402

MF

1/16W

5%

0

21

R226

NO STUFF

402

MF

1/16W

5%

0

21

R196

1/16W

5%

10K

SM1

63

RP24

10K

5%

1/16W

SM1

81

RP23

SM1

1/16W

5%

10K

54

RP23

SM1

10K

5%

1/16W

72

RP23

1/16W

5%

10K

SM1

72

RP21

SM1

10K

5%

1/16W

81

RP21

SM1

10K

1/16W

5%

63

RP21

10K

5%

1/16W

SM1

54

RP21

1/16W

5%

10K

SM1

54

RP24

SM1

10K

1/16W

5%

63

RP23

B

051-6531

448

CPU_DATA<43>

CPU_ADDR<26> CPU_ADDR<27>

CPU_DATA<47>

CPU_DATA<45> CPU_DATA<46>

MAXBUS_SLEEP

CPU_DATA<54>

CPU_DATA<52>

MAXBUS_SLEEP

CPU_CI_L

CPU_ADDR<31>

CPU_ADDR<29>

CPU_DATA<38>

CPU_DATA<42>

CPU_DATA<44>

CPU_GBL_L

+1_5V_INTREPID_PLL7

INTREPID_ACS_REF

CPU_TBEN

CPU_CLK_EN

SYSCLK_LA_TP

INT_CPUFB_OUT

INT_SUSPEND_ACK_L

INT_SUSPEND_REQ_L

CPU_QACK_L

CPU_QREQ_L

CPU_ARTRY_L CPU_HIT_L

CPU_AACK_L

CPU_WT_L

CPU_TT<3> CPU_TT<4>

CPU_TT<2>

CPU_TT<0> CPU_TT<1>

CPU_TSIZ<1> CPU_TSIZ<2>

CPU_TSIZ<0>

CPU_TBST_L

CPU_ADDR<30>

CPU_ADDR<28>

CPU_ADDR<25>

CPU_ADDR<23> CPU_ADDR<24>

CPU_ADDR<21> CPU_ADDR<22>

CPU_ADDR<20>

CPU_ADDR<18> CPU_ADDR<19>

CPU_ADDR<17>

CPU_ADDR<16>

CPU_ADDR<15>

CPU_ADDR<13> CPU_ADDR<14>

CPU_ADDR<11> CPU_ADDR<12>

CPU_ADDR<10>

CPU_ADDR<9>

CPU_ADDR<8>

CPU_ADDR<7>

CPU_ADDR<6>

CPU_ADDR<5>

CPU_ADDR<4>

CPU_ADDR<3>

CPU_ADDR<2>

CPU_ADDR<0> CPU_ADDR<1>

CPU_TS_L

CPU_BG_L

CPU_BR_L

CPU_DATA<1>

CPU_DATA<0>

CPU_DATA<3> CPU_DATA<4>

CPU_DATA<2>

CPU_DATA<5> CPU_DATA<6>

CPU_DATA<8> CPU_DATA<9>

CPU_DATA<7>

CPU_DATA<10> CPU_DATA<11>

CPU_DATA<13>

CPU_DATA<12>

CPU_DATA<14> CPU_DATA<15> CPU_DATA<16>

CPU_DATA<18>

CPU_DATA<17>

CPU_DATA<19>

CPU_DATA<21>

CPU_DATA<20>

CPU_DATA<22> CPU_DATA<23> CPU_DATA<24>

CPU_DATA<26>

CPU_DATA<25>

CPU_DATA<27> CPU_DATA<28> CPU_DATA<29>

CPU_DATA<31>

CPU_DATA<30>

CPU_DATA<32> CPU_DATA<33> CPU_DATA<34> CPU_DATA<35> CPU_DATA<36> CPU_DATA<37> CPU_DATA<38> CPU_DATA<39> CPU_DATA<40>

CPU_DATA<42>

CPU_DATA<41>

CPU_DATA<43>

CPU_DATA<45>

CPU_DATA<44>

CPU_DATA<46> CPU_DATA<47>

CPU_DATA<49> CPU_DATA<50>

CPU_DATA<48>

CPU_DATA<51> CPU_DATA<52>

CPU_DATA<54>

CPU_DATA<53>

CPU_DATA<55> CPU_DATA<56> CPU_DATA<57>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<60>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<63>

CPU_DBG_L

CPU_DRDY_L

CPU_DTI<0> CPU_DTI<1> CPU_DTI<2>

CPU_TA_L CPU_TEA_L

+1_5V_INTREPID_PLL

MAXBUS_SLEEP

CPU_DATA<39>

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<35>

CPU_DATA<34>

CPU_DATA<33>

CPU_DATA<55>

CPU_DATA<41>

CPU_DATA<40>

CPU_DATA<53>

CPU_DATA<51>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<48>

CPU_DATA<32>

INT_CPUFB_IN

INT_CPUFB_OUT_NORM

INT_CPUFB_IN_NORM

INT_CPUFB_LONG

CPU_DATA<63>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<59>

MAXBUS_SLEEP

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<56>

CPU_TA_L

CPU_TS_L

CPU_BR_L

CPU_ARTRY_L

CPU_DRDY_L

CPU_HIT_L

CPU_AACK_L

CPU_TEA_L

CPU_DBG_L

CPU_BG_L

MAXBUS_SLEEP

CPU_QREQ_L

INT_CPUFB_IN

SYSCLK_CPU_UF

SYSCLK_CPU

INT_CPUFB_OUT

INT_CPUFB_OUT_SHORT

38

34

23

16

15

36

8

36

8

36

38

8

36

8

36

8

36

8

36

8

7

8

7

36

8

36

8

36

8

36

8

36

8

14

7

8

36

8

7

8

7

8

36

6

5

6

5

6

5

6

5

38

5

30

8

30

5

6

5

12

5

6

8

36

6

5

6

5

8

36

5

8

36

A0 A1

A6

A2 A3 A4 A5

A9

A8

A7

A10 A11 A12 A13 A14 A15 A16

A20

A17 A18 A19

CE OE WE WP PWD

GND

DQ0 DQ1

DQ6

DQ5

DQ2 DQ3 DQ4

DQ7

VPP VCC

FEPR-1MX8

(2 OF 9)

DDR_VREF_1

DDR_VREF_0

DDR_DATA_0 DDR_DATA_1 DDR_DATA_2 DDR_DATA_3 DDR_DATA_4 DDR_DATA_5 DDR_DATA_6 DDR_DATA_7 DDR_DATA_8 DDR_DATA_9 DDR_DATA_10 DDR_DATA_11 DDR_DATA_12 DDR_DATA_13 DDR_DATA_14 DDR_DATA_15 DDR_DATA_16 DDR_DATA_17 DDR_DATA_18 DDR_DATA_19 DDR_DATA_20 DDR_DATA_21

DDR_DATA_25 DDR_DATA_26 DDR_DATA_27 DDR_DATA_28 DDR_DATA_29 DDR_DATA_30

DDR_DATA_33 DDR_DATA_34 DDR_DATA_35 DDR_DATA_36 DDR_DATA_37 DDR_DATA_38 DDR_DATA_39 DDR_DATA_40 DDR_DATA_41 DDR_DATA_42 DDR_DATA_43 DDR_DATA_44 DDR_DATA_45 DDR_DATA_46 DDR_DATA_47 DDR_DATA_48 DDR_DATA_49 DDR_DATA_50 DDR_DATA_51 DDR_DATA_52 DDR_DATA_53 DDR_DATA_54 DDR_DATA_55 DDR_DATA_56 DDR_DATA_57 DDR_DATA_58 DDR_DATA_59 DDR_DATA_60 DDR_DATA_61 DDR_DATA_62 DDR_DATA_63

DDR_DATA_22 DDR_DATA_23 DDR_DATA_24

DDR_DATA_31 DDR_DATA_32

DDR_BA_0 DDR_BA_1

DDRCS_3

DDRCS_2

DDRCS_1

DDRCS_0

DDR_DQS_7

DDR_DQS_6

DDR_DQS_5

DDR_DQS_4

DDR_DQS_3

DDR_DQS_2

DDR_DQS_1

DDR_DQS_0

DDR_DM_7

DDR_DM_6

DDR_DM_5

DDR_DM_4

DDR_DM_3

DDR_DM_2

DDR_DM_1

DDR_DM_0

DDRRAS DDRCAS

DDRWE DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3

DDR_MCLK_0_P DDR_MCLK_0_N DDR_MCLK_1_P DDR_MCLK_1_N DDR_MCLK_2_P DDR_MCLK_2_N DDR_MCLK_3_P DDR_MCLK_3_N DDR_MCLK_4_P DDR_MCLK_4_N DDR_MCLK_5_P DDR_MCLK_5_N

DDR_REF

DDR_SELHI_0 DDR_SELHI_1 DDR_SELLO_0 DDR_SELLO_1

MEMORY

DDR

INTERFACE

DDR_A_10 DDR_A_11 DDR_A_12

DDR_A_9

DDR_A_8

DDR_A_7

DDR_A_6

DDR_A_5

DDR_A_4

DDR_A_3

DDR_A_2

DDR_A_1

DDR_A_0

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

OVERRIDE ROM MODULE

PULL-DOWN RESISTORS TO ENSURE CKE STAYS LOW AFTER INTREPID

2.5V I/O SHUTS OFF

1MB BOOT ROM

INTERCEPTS ROM CHIP SELECT

MEM_VREF

’2’ & ’3’ GO TO SLOT B

’0’ & ’1’ GO TO SLOT A

’2’ & ’3’ GO TO SLOT B

’0’ & ’1’ GO TO SLOT A

’1’S ARE SAME POLARITY (ACTIVE-HI)

’0’S ARE SAME POLARITY (ACTIVE-LO)

CNTL

BA

ADDR

CKE

CS

PINS ARE SWAPABLE FOR RPAKS

CLOCKS

INT - DDR/BOOTROM

SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS

402

MF

1/16W

10K

5%

2

1

R387

402

MF

1/16W

5%

22

21

R238

402

MF

1/16W

1%

1K

2

1

R199

402

MF

1/16W

1%

10K

2

1

R198

402

CERM

10V

20%

0.1UF

2

1

C245

1%

1/16W

MF

402

10K

2

1

R191

OMIT

3.3V

TSOP

12

9

11 3130

10

24

3923

35

34

33

32

28

27

26

25

22

7

8

14

15

16

17

18

38

19

37

13

40

1

2

3

4

5

6

36

20

21

U17

10V CERM 805

20%

2.2UF

2

1

C460

20% 10V CERM 402

0.1UF

2

1

C470

20% 10V CERM 402

0.1UF

2

1

C479

402

MF

1/16W

10K

5%

2

1

R386

+3V_MAIN

INTREPID-REV2.1

CRITICAL

BGA

T22

Y22

T32

N30

AE29

AB32

AA22

W35 W36

V33 V32

W32 W33

Y30 W30

Y35 Y36

Y32 Y33

L32

N29

P32

V30

AB30

AD32

AH31

AJ31

L33

N32

T33

T35

AC35

AD33

AH33

AJ33

AG35

AG33

AJ36

K35

K36

J36

K33

AJ35

K32

J35

J33

J32

M30

N33

L36

M33

M35

L35

AJ32

M36

N35

R32

R33

R35

R36

P36

P35

R30

P33

AK36

T36

U35

U36

T30

V35

U32

U33

V36

AB33

AA32

AK35

AC36

AB35

AB36

AA33

AA35

AA36

AD35

AD36

AE33

AE35

AK31

AE36

AF36

AF35

AE32

AG31

AG32

AH32

AH36

AG36

AH35

AK33

AK32

M29

L30

H36

D36

G32

E36

E35

F35

F36

G36

D35

H33

G33

G35

H35

K30

L29

AL33

AL35

AN36

AN34

AL36

AM36

AM35

AN35

H32

U45

5%

10K

1/16W

MF

402

2

1

R338

1K

5%

1/16W

MF

402

21

R357

SM1

1/16W

5%

22

54

RP33

1/16W

5%

22

SM1

63

RP33

SM1

1/16W

5%

22

81

RP34

1/16W

5%

22

SM1

72

RP34

22

5%

1/16W

SM1

72

RP33

22

5%

1/16W

SM1

63

RP34

22

5%

1/16W

MF

402

21

R250

22

5%

1/16W

SM1

81

RP33

22

5%

1/16W

SM1

54

RP34

22

5%

1/16W

SM1

81

RP36

22

5%

1/16W

SM1

54

RP35

22

5%

1/16W

SM1

63

RP36

SM1

1/16W

5%

22

72

RP36

SM1

1/16W

5%

22

54

RP36

22

5%

1/16W

SM1

72

RP35

SM1

1/16W

5%

22

81

RP35

SM1

1/16W

5%

22

63

RP35

22

5%

1/16W

SM1

81

RP31

22

5%

1/16W

SM1

81

RP25

22

5%

1/16W

SM1

72

RP25

SM1

1/16W

5%

22

63

RP25

22

5%

1/16W

SM1

54

RP25

SM1

1/16W

5%

22

81

RP30

SM1

1/16W

5%

22

72

RP30

SM1

1/16W

5%

22

63

RP31

SM1

1/16W

5%

22

54

RP30

SM1

1/16W

5%

22

54

RP31

SM1

1/16W

5%

22

72

RP31

SM1

1/16W

5%

22

54

RP26

22

5%

1/16W

SM1

63

RP30

22

5%

1/16W

SM1

81

RP26

22

5%

1/16W

SM1

72

RP26

22

5%

1/16W

SM1

63

RP26

+3V_MAIN

402

MF

1/16W

10K

5%

2

1

R500

5%

10K

1/16W

MF

402

2

1

R439

402

MF

1/16W

10K

5%

2

1

R409

9 44

051-6531

B

341S1336 CRITICAL

1

BOOTROM,P84

U17

?

RAM_CKE<1>

RAM_CKE<2>

RAM_CKE<3>

+2_5V_INTREPID

MEM_RAS_L RAM_RAS_L

RAM_WE_LMEM_WE_L

MEM_CAS_L RAM_CAS_L

RAM_BA<1>MEM_BA<1>

RAM_BA<0>MEM_BA<0>

RAM_ADDR<11>MEM_ADDR<11>

RAM_ADDR<9>MEM_ADDR<9>

RAM_ADDR<12>MEM_ADDR<12>

RAM_ADDR<10>MEM_ADDR<10>

RAM_ADDR<8>MEM_ADDR<8>

RAM_ADDR<7>MEM_ADDR<7>

RAM_ADDR<5>MEM_ADDR<5>

RAM_ADDR<3>MEM_ADDR<3>

RAM_ADDR<1>MEM_ADDR<1>

RAM_ADDR<6>MEM_ADDR<6>

RAM_ADDR<4>MEM_ADDR<4>

RAM_ADDR<2>MEM_ADDR<2>

RAM_ADDR<0>MEM_ADDR<0>

RAM_CKE<3>MEM_CKE<3>

RAM_CKE<1>MEM_CKE<1>

RAM_CS_L<3>MEM_CS_L<3>

RAM_CKE<2>MEM_CKE<2>

RAM_CKE<0>MEM_CKE<0>

RAM_CS_L<2>MEM_CS_L<2>

RAM_CS_L<1>MEM_CS_L<1>

SYSCLK_DDRCLK_B0_L

SYSCLK_DDRCLK_B0_L_UF

SYSCLK_DDRCLK_B1_L

SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_A0_L_UF

RAM_CS_L<0>MEM_CS_L<0>

SYSCLK_DDRCLK_B0

SYSCLK_DDRCLK_B0_UF

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_A1_L

SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A0

SYSCLK_DDRCLK_A0_UF

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A1_UF

INT_MEM_VREF

MEM_ADDR<12>

MEM_ADDR<11>

MEM_ADDR<10>

MEM_ADDR<9>

MEM_ADDR<8>

MEM_ADDR<7>

MEM_ADDR<6>

MEM_ADDR<5>

MEM_ADDR<4>

MEM_ADDR<3>

MEM_ADDR<2>

MEM_ADDR<1>

MEM_ADDR<0>

MEM_MUXSEL_L<1>

MEM_MUXSEL_H<1>

MEM_MUXSEL_H<0>

MEM_CKE<3>

MEM_CKE<2>

MEM_CKE<1>

MEM_CKE<0>

MEM_WE_L

MEM_CAS_L

MEM_RAS_L

MEM_DQM<7>

MEM_DQM<6>

MEM_DQM<5>

MEM_DQM<4>

MEM_DQM<3>

MEM_DQM<1>

MEM_DQM<0>

MEM_DQM<2>

MEM_DQS<7>

MEM_DQS<6>

MEM_DQS<5>

MEM_DQS<4>

MEM_DQS<3>

MEM_DQS<2>

MEM_DQS<1>

MEM_DQS<0>

MEM_CS_L<2>

MEM_CS_L<1>

MEM_CS_L<0>

MEM_CS_L<3>

MEM_BA<1>

MEM_BA<0>

MEM_DATA<54>

MEM_DATA<31>

MEM_DATA<29>

MEM_DATA<25>

MEM_DATA<24>

MEM_DATA<15>

MEM_DATA<63>

MEM_DATA<62>

MEM_DATA<61>

MEM_DATA<60>

MEM_DATA<59>

MEM_DATA<58>

MEM_DATA<57>

MEM_DATA<56>

MEM_DATA<55>

MEM_DATA<53>

MEM_DATA<52>

MEM_DATA<51>

MEM_DATA<50>

MEM_DATA<49>

MEM_DATA<48>

MEM_DATA<47>

MEM_DATA<46>

MEM_DATA<45>

MEM_DATA<44>

MEM_DATA<43>

MEM_DATA<42>

MEM_DATA<41>

MEM_DATA<40>

MEM_DATA<39>

MEM_DATA<38>

MEM_DATA<37>

MEM_DATA<36>

MEM_DATA<35>

MEM_DATA<34>

MEM_DATA<33>

MEM_DATA<32>

MEM_DATA<30>

MEM_DATA<28>

MEM_DATA<27>

MEM_DATA<26>

MEM_DATA<23>

MEM_DATA<22>

MEM_DATA<21>

MEM_DATA<20>

MEM_DATA<19>

MEM_DATA<18>

MEM_DATA<17>

MEM_DATA<16>

MEM_DATA<14>

MEM_DATA<13>

MEM_DATA<12>

MEM_DATA<11>

MEM_DATA<10>

MEM_DATA<9>

MEM_DATA<8>

MEM_DATA<7>

MEM_DATA<6>

MEM_DATA<5>

MEM_DATA<4>

MEM_DATA<3>

MEM_DATA<2>

MEM_DATA<1>

MEM_DATA<0>

MEM_MUXSEL_L<0>

INT_DDRCLK5_N_TP

SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A1_UF

SYSCLK_DDRCLK_A0_UF SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_B0_L_UF

SYSCLK_DDRCLK_B0_UF

INT_DDRCLK5_P_TP

INT_DDRCLK2_P_TP INT_DDRCLK2_N_TP

INT_MEM_VREF

INT_MEM_REF_H

PCI_AD<31>

PCI_AD<30>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<9>

PCI_AD<8>

PCI_AD<7>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<3>

PCI_AD<20>

PCI_AD<2>

PCI_AD<19>

PCI_AD<18>

PCI_AD<17>

PCI_AD<16>

PCI_AD<15>

PCI_AD<14>

PCI_AD<13>

PCI_AD<12>

PCI_AD<11>

PCI_AD<10>

PCI_AD<1>

PCI_AD<0>

ROM_OE_L ROM_RW_L

INT_RESET_L

ROM_CS_L

ROM_ONBOARD_CS_L

ROM_WP_L

RAM_CKE<0>

39

37

38

26

36

16

36

24

39

36

11

15

36 36

11

9

11 36

36 36

11 36

36 36

38

36

38

17

24

30

24

39

11

9

10

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

36

9 9

11

9

9 9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

10

9

10

9

10

9

38

12

13

12

24

9

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW

BIT 0..15

BIT 16..31

BIT 32..47 BIT 48..63

16BIT 2:1 DDR MUXES

SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND

SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND

ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG

MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH

402

CERM

10V

20%

0.1UF

2

1

C742

20% 10V CERM 402

0.1UF

2

1

C748

402

CERM

10V

20%

0.1UF

2

1

C753

402

CERM

10V

20%

0.1UF

2

1

C737

20% 10V CERM 402

0.1UF

2

1

C738

402

CERM

10V

20%

0.1UF

2

1

C736

402

CERM

10V

20%

0.1UF

2

1

C752

20% 10V CERM 402

0.1UF

2

1

C747

402

CERM

10V

20%

0.1UF

2

1

C741

402

CERM

10V

20%

0.1UF

2

1

C743

402

CERM

10V

20%

0.1UF

2

1

C727

402

CERM

10V

20%

0.1UF

2

1

C735

CBTV4020

BGA

CRITICAL

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U13

CBTV4020

BGA

CRITICAL

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U12

CRITICAL

BGA

CBTV4020

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U10

CRITICAL

BGA

CBTV4020

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U9

NO STUFF

5%

0

402

MF

1/16W

21

R242

NO STUFF

1/16W

MF

402

0

5%

21

R252

1/16W

MF

402

0

5%

21

R243

5%

0

402

MF

1/16W

21

R239

051-6531

B

10 44

MEM_MUXSEL_H<0>

RAM_MUXSEL_H

MEM_MUXSEL_L<0>

RAM_MUXSEL_L

MEM_MUXSEL_H<1>

RAM_MUXSEL_H

MEM_MUXSEL_L<1>

RAM_MUXSEL_L

RAM_DATA_B<0> RAM_DATA_B<1> RAM_DATA_B<2>

RAM_DATA_B<10>

RAM_DATA_B<9>

RAM_DATA_B<8>

RAM_DQM_B<0>

RAM_DQS_B<0>

RAM_DATA_B<4>

RAM_DATA_B<3>

RAM_DATA_B<7>

RAM_DATA_B<6>

RAM_DATA_B<5>

RAM_DQM_B<1>

RAM_DQS_B<1>

RAM_DATA_B<15>

RAM_DATA_B<14>

RAM_DATA_B<13>

RAM_DATA_B<12>

RAM_DATA_B<11>

RAM_DATA_A<10> RAM_DATA_A<11>

RAM_DATA_A<13>

RAM_DATA_A<12>

RAM_DATA_A<15>

RAM_DATA_A<14>

RAM_DQS_A<1>

MEM_DATA<0>

RAM_DQM_A<1>

MEM_DATA<3>

MEM_DATA<1> MEM_DATA<2>

MEM_DATA<5>

MEM_DATA<4>

MEM_DQS<0>

MEM_DATA<6> MEM_DATA<7>

MEM_DQM<0>

MEM_DATA<8>

MEM_DATA<11>

MEM_DATA<10>

MEM_DATA<9>

MEM_DATA<13>

MEM_DATA<12>

MEM_DATA<14>

MEM_DQS<1>

MEM_DATA<15>

RAM_MUXSEL_L

RAM_DQM_A<0>

RAM_DQS_A<0>

RAM_DATA_A<7>

RAM_DATA_A<6>

RAM_DATA_A<4> RAM_DATA_A<5>

RAM_DATA_A<1>

RAM_DATA_A<3>

RAM_DATA_A<2>

RAM_DATA_A<0>

RAM_DATA_A<8>

MEM_DQM<1>

RAM_DATA_A<9>

RAM_DATA_B<16> RAM_DATA_B<17> RAM_DATA_B<18>

RAM_DATA_B<26>

RAM_DATA_B<25>

RAM_DATA_B<24>

RAM_DQM_B<2>

RAM_DQS_B<2>

RAM_DATA_B<20>

RAM_DATA_B<19>

RAM_DATA_B<23>

RAM_DATA_B<22>

RAM_DATA_B<21>

RAM_DQM_B<3>

RAM_DQS_B<3>

RAM_DATA_B<31>

RAM_DATA_B<30>

RAM_DATA_B<29>

RAM_DATA_B<28>

RAM_DATA_B<27>

RAM_DATA_A<26> RAM_DATA_A<27>

RAM_DATA_A<29>

RAM_DATA_A<28>

RAM_DATA_A<31>

RAM_DATA_A<30>

RAM_DQS_A<3>

MEM_DATA<16>

RAM_DQM_A<3>

MEM_DATA<19>

MEM_DATA<17> MEM_DATA<18>

MEM_DATA<21>

MEM_DATA<20>

MEM_DQS<2>

MEM_DATA<22> MEM_DATA<23>

MEM_DQM<2>

MEM_DATA<24>

MEM_DATA<27>

MEM_DATA<26>

MEM_DATA<25>

MEM_DATA<29>

MEM_DATA<28>

MEM_DATA<30>

MEM_DQS<3>

MEM_DATA<31>

RAM_MUXSEL_L

RAM_DQM_A<2>

RAM_DQS_A<2>

RAM_DATA_A<23>

RAM_DATA_A<22>

RAM_DATA_A<20> RAM_DATA_A<21>

RAM_DATA_A<17>

RAM_DATA_A<19>

RAM_DATA_A<18>

RAM_DATA_A<16>

RAM_DATA_A<24>

MEM_DQM<3>

RAM_DATA_A<25>

RAM_DATA_B<32> RAM_DATA_B<33> RAM_DATA_B<34>

RAM_DATA_B<42>

RAM_DATA_B<41>

RAM_DATA_B<40>

RAM_DQM_B<4>

RAM_DQS_B<4>

RAM_DATA_B<36>

RAM_DATA_B<35>

RAM_DATA_B<39>

RAM_DATA_B<38>

RAM_DATA_B<37>

RAM_DQM_B<5>

RAM_DQS_B<5>

RAM_DATA_B<47>

RAM_DATA_B<46>

RAM_DATA_B<45>

RAM_DATA_B<44>

RAM_DATA_B<43>

RAM_DATA_A<42> RAM_DATA_A<43>

RAM_DATA_A<45>

RAM_DATA_A<44>

RAM_DATA_A<47>

RAM_DATA_A<46>

RAM_DQS_A<5>

MEM_DATA<32>

RAM_DQM_A<5>

MEM_DATA<35>

MEM_DATA<33> MEM_DATA<34>

MEM_DATA<37>

MEM_DATA<36>

MEM_DQS<4>

MEM_DATA<38> MEM_DATA<39>

MEM_DQM<4>

MEM_DATA<40>

MEM_DATA<43>

MEM_DATA<42>

MEM_DATA<41>

MEM_DATA<45>

MEM_DATA<44>

MEM_DATA<46>

MEM_DQS<5>

MEM_DATA<47>

RAM_MUXSEL_H

RAM_DQM_A<4>

RAM_DQS_A<4>

RAM_DATA_A<39>

RAM_DATA_A<38>

RAM_DATA_A<36> RAM_DATA_A<37>

RAM_DATA_A<33>

RAM_DATA_A<35>

RAM_DATA_A<34>

RAM_DATA_A<32>

RAM_DATA_A<40>

MEM_DQM<5>

RAM_DATA_A<41> RAM_DATA_B<48>

RAM_DATA_B<49> RAM_DATA_B<50>

RAM_DATA_B<58>

RAM_DATA_B<57>

RAM_DATA_B<56>

RAM_DQM_B<6>

RAM_DQS_B<6>

RAM_DATA_B<52>

RAM_DATA_B<51>

RAM_DATA_B<55>

RAM_DATA_B<54>

RAM_DATA_B<53>

RAM_DQM_B<7>

RAM_DQS_B<7>

RAM_DATA_B<63>

RAM_DATA_B<62>

RAM_DATA_B<61>

RAM_DATA_B<60>

RAM_DATA_B<59>

RAM_DATA_A<58> RAM_DATA_A<59>

RAM_DATA_A<61>

RAM_DATA_A<60>

RAM_DATA_A<63>

RAM_DATA_A<62>

RAM_DQS_A<7>

MEM_DATA<48>

RAM_DQM_A<7>

MEM_DATA<51>

MEM_DATA<49> MEM_DATA<50>

MEM_DATA<53>

MEM_DATA<52>

MEM_DQS<6>

MEM_DATA<54> MEM_DATA<55>

MEM_DQM<6>

MEM_DATA<56>

MEM_DATA<59>

MEM_DATA<58>

MEM_DATA<57>

MEM_DATA<61>

MEM_DATA<60>

MEM_DATA<62>

MEM_DQS<7>

MEM_DATA<63>

RAM_MUXSEL_H

RAM_DQM_A<6>

RAM_DQS_A<6>

RAM_DATA_A<55>

RAM_DATA_A<54>

RAM_DATA_A<52> RAM_DATA_A<53>

RAM_DATA_A<49>

RAM_DATA_A<51>

RAM_DATA_A<50>

RAM_DATA_A<48>

RAM_DATA_A<56>

MEM_DQM<7>

RAM_DATA_A<57>

+2_5V_INTREPID

+2_5V_INTREPID +2_5V_INTREPID

38

38 38

16

16 16

15

15 15

36 36

36

36 36

36

10

10 10

9

10

9

10

9

10

9

10

11

9

11

9

10

11

9

11

9

11

9

10

11

9

11

9

11

9

10

11

9

11 11

11

9

11

9

10

11

9

11

9

9 9

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

DQ58

RFU18

KEY

VREF0

VDD0

DQ0 DQ1

VSS0

DQS0

VSS2

DQ3 DQ8

DQ2

VDD2

VSS4

DQS1

DQ10

DQ9

DQ11

CK0 CK0* VSS7

VDD4

DQ16

DQ18

VDD7

DQ17

DQS2

VSS9

DQ25

VDD9

DQ24

DQ19

DQS3

VDD11

DQ27

DQ26

VSS11

RFU0

VDD13

RFU4

VSS13

RFU2

RFU6

RFU13

RFU12

RFU8

RFU10 VSS15

A9

CKE1

RFU14

VDD16

A1

A5

A7

VSS18

A3

BA0

VDD18

S0*

WE*

A10_AP

DQ33

VSS20

DQ32

VDD20

RFU16

DQS4 DQ34

VSS22

DQ35 DQ40

VDD22

DQ41 DQS5

VSS24

DQ42 DQ43

DQ48

VSS26

VDD26

VDD24

VSS27

VSS29

DQ50

DQ49

DQS6

VDD27

DQS7

DQ51

VDD29

DQ56

DQ57

SDA

VDD31

VSS31

DQ59

VDDSPD

SCL

RFU19

VDD32

VSS28

CK1

DQ52

VDD28 DM6 DQ54 VSS30

DM7

DQ55 DQ60 VDD30 DQ61

DQ53

SA1 SA2

SA0

DQ63

DQ62

VSS32

VSS25

DM5

DQ45

VDD23

VDD21

VSS21 DQ36

RFU17

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RAS* CAS* S1*

DQ46 DQ47

CK1*

VDD25

RFU7

RFU5

VDD14

VSS17 VDD15

CKE0 RFU15

VDD17

A11 A8

RFU11 VSS16

RFU9

VSS19

A0

A2

A4

A6

BA1

VDD19

VDD12

VSS12

DQ31

DQ30

DM3

DQ22

DQ21 VDD8

DQ20

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

VSS6 VSS8

RFU1

VSS14

RFU3

VREF1

DQ5

DQ4

DM0 DQ6

DQ12

DQ7

VSS3

VSS1

VDD1

VDD3

DM1 VSS5 DQ14

DQ13

DQ15 VDD5 VDD6

A12

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

NC NC

NC

NC NC

NC

ONE 0.1UF PER SLOT

DDR VREF

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

DDR SODIMM CONNS

FACTORY SLOT

SLOT "A"

STANDARD

REVERSED SLOT "B" CUSTOMER SLOT

ADDR=0XA0(WR)/0XA1(RD)

ADDR=0XA2(WR)/0XA3(RD)

SLOT "A"

SLOT "B"

DDR BYPASS CAPS

FOR RETURN CURRENT

CRITICAL

F-RT-SM

AS0A42-D2S

119

51

4039

38

2827

186185

174

16

173

162161

159

150149

138137

126125

15

104103

90

8887

7675

6463

52

43

21

197

57

4645

36

3433

192191

180

22

179

168167

157

156155

144143

132131

21

114113

9493

92

8281

7069

58

10

9

193 195

198

196

194

122121

8483

8079

7877

7473

200199

124123

9897

91

89

8685

7271

118

202

201

183

169

147

133

61

47

25

11

23

19

18

190

188

182

178

14

189

187

181

177

176

172

166

164

175

171

8

165

163

154

152

146

142

153

151

145

141

6

140

136

130

128

139

135

129

127

68

66

17

60

56

67

65

59

55

54

50

44

42

13

53

49

43

41

32

30

24

20

31

29

7

5

184

170

148

134

62

48

26

12

95 96

158 160

37

35

120

116

117

101 102

105 106 107 108 109 110

99

100

115

111 112

J19

CERM

6.3V

20%

805

10UF

2

1

C602

805

CERM

6.3V

20%

10UF

2

1

C601

AS0A42-D2R

F-RT-SM

CRITICAL

119

51

40 39

38

28 27

186 185

174

16

173

162 161

159

150 149

138 137

126 125

15

104 103

90

88 87

76 75

64 63

52

4 3

2 1

197

57

46 45

36

34 33

192 191

180

22

179

168 167

157

156 155

144 143

132 131

21

114 113

94 93

92

82 81

70 69

58

10

9

193 195

198

196

194

122 121

84 83

80 79

78 77

74 73

200 199

124 123

98 97

91

89

86 85

72 71

118

202

201

183

169

147

133

61

47

25

11

23

19

18

190

188

182

178

14

189

187

181

177

176

172

166

164

175

171

8

165

163

154

152

146

142

153

151

145

141

6

140

136

130

128

139

135

129

127

68

66

17

60

56

67

65

59

55

54

50

44

42

13

53

49

43

41

32

30

24

20

31

29

7

5

184

170

148

134

62

48

26

12

9596

158 160

37

35

120

116

117

101102

105106 107108 109110

99

100

115

111112

J22

CERM

6.3V

20%

805

10UF

2

1

C530

805

CERM

6.3V

20%

10UF

2

1

C589

402

MF

1/16W

1%

1K

2

1

R449

1K

1% 1/16W MF 402

2

1

R440

20% 10V CERM 402

0.1UF

2

1

C542

20% 10V CERM 402

0.1UF

2

1

C482

+2_5V_MAIN+2_5V_MAIN

+2_5V_MAIN +2_5V_MAIN

+2_5V_MAIN

+3V_MAIN

402

CERM

10V

20%

0.1UF

2

1

C573

402

CERM

10V

20%

0.1UF

2

1

C526

20% 10V CERM 402

0.1UF

2

1

C525

+3V_MAIN

402

CERM

10V

20%

0.1UF

2

1

C490

20% 10V CERM 402

0.1UF

2

1

C527

402

CERM

10V

20%

0.1UF

2

1

C481

20% 10V CERM 402

0.1UF

2

1

C523

402

CERM

10V

20%

0.1UF

2

1

C549

20% 10V CERM 402

0.1UF

2

1

C524

20% 10V CERM 402

0.1UF

2

1

C595

20% 10V CERM 402

0.1UF

2

1

C522

402

CERM

10V

20%

0.1UF

2

1

C597

402

CERM

10V

20%

0.1UF

2

1

C489

+3V_MAIN

20% 10V CERM 402

0.1UF

2

1

C594

20% 10V CERM 402

0.1UF

2

1

C596

402

CERM

10V

20%

0.1UF

2

1

C548

20% 10V CERM 402

0.1UF

2

1

C565

402

CERM

10V

20%

0.1UF

2

1

C550

402

CERM

10V

20%

0.1UF

2

1

C551

20% 10V CERM 402

0.1UF

2

1

C761

4411

051-6531

B

DDR_VREF

RAM_DATA_B<4> RAM_DATA_B<5>

RAM_DQM_B<0> RAM_DATA_B<6>

RAM_DATA_B<7> RAM_DATA_B<12>

RAM_DQM_B<1>

RAM_DATA_B<13>

RAM_DATA_B<14> RAM_DATA_B<15>

RAM_DATA_B<20> RAM_DATA_B<21>

RAM_DATA_B<22>

RAM_DQM_B<2>

RAM_DATA_B<23> RAM_DATA_B<28>

RAM_DATA_B<29>

RAM_DATA_B<30>

RAM_DQM_B<3>

RAM_DATA_B<31>

RAM_CKE<2>

RAM_BA<1>

RAM_ADDR<2>

RAM_ADDR<11> RAM_ADDR<8>

RAM_ADDR<6>

RAM_ADDR<0>

RAM_ADDR<4>

RAM_CS_L<3>

RAM_RAS_L RAM_CAS_L

RAM_DATA_B<36> RAM_DATA_B<37>

RAM_DQM_B<4> RAM_DATA_B<38>

RAM_DATA_B<47>

RAM_DATA_B<46>

RAM_DATA_B<39> RAM_DATA_B<44>

RAM_DQM_B<5>

RAM_DATA_B<45>

SYSCLK_DDRCLK_B1_L SYSCLK_DDRCLK_B1

RAM_DATA_B<52> RAM_DATA_B<53>

RAM_DATA_B<54>

RAM_DQM_B<6>

RAM_DATA_B<55> RAM_DATA_B<60>

RAM_DATA_B<63>

RAM_DATA_B<61> RAM_DQM_B<7>

RAM_DATA_B<62>

INT_I2C_CLK0

INT_I2C_DATA0

RAM_DATA_B<59>

RAM_DATA_B<58>

RAM_DATA_B<57>

RAM_DQS_B<7>

RAM_DATA_B<51> RAM_DATA_B<56>

RAM_DQS_B<6>

RAM_DATA_B<50>

RAM_DATA_B<49>

RAM_DATA_B<48>

RAM_DATA_B<43>

RAM_DATA_B<42>

RAM_DQS_B<1>

RAM_DATA_B<9>

RAM_DATA_B<8>

RAM_DATA_B<3>

RAM_DATA_B<2>

RAM_DQS_B<0>

RAM_DATA_B<1>

RAM_DATA_B<0>

DDR_VREF

RAM_DATA_A<31>

RAM_DQM_A<2>

RAM_DATA_A<63>

DDR_VREF

RAM_DATA_A<0> RAM_DATA_A<1>

RAM_DQS_A<0> RAM_DATA_A<2>

RAM_DATA_A<8>

RAM_DATA_A<3>

RAM_DATA_A<9>

RAM_DATA_A<10>

RAM_DQS_A<1>

RAM_DATA_A<11>

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_A0

RAM_DATA_A<16> RAM_DATA_A<17>

RAM_DQS_A<2> RAM_DATA_A<18>

RAM_DATA_A<19>

RAM_DATA_A<25>

RAM_DATA_A<24>

RAM_DQS_A<3>

RAM_DATA_A<26> RAM_DATA_A<27>

RAM_CKE<1>

RAM_ADDR<12> RAM_ADDR<9>

RAM_ADDR<7>

RAM_ADDR<3>

RAM_ADDR<5>

RAM_ADDR<1>

RAM_ADDR<10>

RAM_WE_L

RAM_BA<0>

RAM_CS_L<0>

RAM_DATA_A<33>

RAM_DATA_A<32>

RAM_DATA_A<34>

RAM_DQS_A<4>

RAM_DATA_A<40>

RAM_DATA_A<35>

RAM_DATA_A<41>

RAM_DATA_A<42>

RAM_DQS_A<5>

RAM_DATA_A<43>

RAM_DATA_A<48> RAM_DATA_A<49>

RAM_DATA_A<50>

RAM_DQS_A<6>

RAM_DATA_A<51> RAM_DATA_A<56>

RAM_DATA_A<57> RAM_DQS_A<7>

RAM_DATA_A<58> RAM_DATA_A<59>

INT_I2C_DATA0 INT_I2C_CLK0

DDR_VREF

RAM_DATA_A<4> RAM_DATA_A<5>

RAM_DQM_A<0>

RAM_DATA_A<6>

RAM_DATA_A<12>

RAM_DATA_A<7>

RAM_DATA_A<13> RAM_DQM_A<1>

RAM_DATA_A<14> RAM_DATA_A<15>

RAM_DATA_A<20>

RAM_DATA_A<22>

RAM_DATA_A<23> RAM_DATA_A<28>

RAM_DATA_A<29> RAM_DQM_A<3>

RAM_DATA_A<30>

RAM_CKE<0>

RAM_ADDR<11>

RAM_ADDR<8>

RAM_ADDR<6>

RAM_ADDR<2>

RAM_ADDR<4>

RAM_ADDR<0>

RAM_BA<1>

RAM_CAS_L

RAM_RAS_L

RAM_CS_L<1>

RAM_DATA_A<37>

RAM_DATA_A<36>

RAM_DQM_A<4> RAM_DATA_A<38>

RAM_DATA_A<44>

RAM_DATA_A<39>

RAM_DATA_A<45> RAM_DQM_A<5>

RAM_DATA_A<46> RAM_DATA_A<47>

SYSCLK_DDRCLK_A1_L SYSCLK_DDRCLK_A1

RAM_DATA_A<52> RAM_DATA_A<53>

RAM_DATA_A<54>

RAM_DQM_A<6>

RAM_DATA_A<55> RAM_DATA_A<60>

RAM_DQM_A<7>

RAM_DATA_A<62>

RAM_DATA_A<61>

RAM_DATA_A<21>

DDR_VREF

RAM_DATA_B<40>

RAM_DATA_B<41>

RAM_DQS_B<5>

RAM_DATA_B<25>

RAM_DQS_B<3>

RAM_DATA_B<26> RAM_DATA_B<27>

RAM_CKE<3>

RAM_ADDR<9>

RAM_ADDR<7> RAM_ADDR<5> RAM_ADDR<3> RAM_ADDR<1>

RAM_ADDR<10>

RAM_BA<0>

RAM_CS_L<2>

RAM_WE_L

RAM_DATA_B<32> RAM_DATA_B<33>

RAM_DQS_B<4>

RAM_DATA_B<34>

RAM_DATA_B<35>

RAM_ADDR<12>

RAM_DATA_B<10> RAM_DATA_B<11>

SYSCLK_DDRCLK_B0

SYSCLK_DDRCLK_B0_L

RAM_DATA_B<16> RAM_DATA_B<17>

RAM_DQS_B<2>

RAM_DATA_B<18>

RAM_DATA_B<24>

RAM_DATA_B<19>

39

36

23

36

23

36

38

36

11

36

11

36

13

36

38

36

38

36

11

36

13

38

36

11

36

38

36

11

36

11

36

11

36

11

10

9

10

9

10

11

10

11

10

11

10

9

10

9

10

11

10

9

10

9

10

11

10

9

10

9

10

9

10

(PLL4)

VDD15A_6

(PLL4) VSSA_6

ROM_WE

ROM_OE

PCI_STOP PCI_DEVSEL

PCI_CBE_3

PCI_CBE_2

PCI_CBE_1

PCI_CBE_0

ROM_CS

PCI_CLK_IN

PCI_CLK_OUT

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_FRAME

PCI_PAR

PCI_TRDY PCI_IRDY

PCI_REQ_2

PCI_REQ_1

PCI_REQ_0

PCI_GNT_0 PCI_GNT_1 PCI_GNT_2

PCI/ROM

INTERFACE

PCIAD_31

PCIAD_30

PCIAD_28

PCIAD_27

PCIAD_26

PCIAD_25

PCIAD_29

PCIAD_19

PCIAD_18

PCIAD_17

PCIAD_16

PCIAD_15

PCIAD_23 PCIAD_24

PCIAD_20 PCIAD_21 PCIAD_22

PCIAD_14

(7 OF 9)

PCIAD_11

PCIAD_10

PCIAD_12 PCIAD_13

PCIAD_9

PCIAD_6

PCIAD_5

PCIAD_7 PCIAD_8

PCIAD_4

PCIAD_3

PCIAD_1 PCIAD_2

PCIAD_0

ROM_OVRLY_EN

VSSA_5 (PLL5)

(PLL5)

VDD15A_5

STP_AGP AGPPVT AGPVREF0 AGPVREF1

AGP_BUSY AGP_CLK AGP_FB_IN AGP_FB_OUT

AGPAD0

AGPREQ AGPGNT

AGP_SBA3

AGP_SBA2

AGP_SBA1

AGP_SBA0

AGPCBE_3

AGPFRAME

AGPTRDY AGPIRDY AGPSTOP

AGPDEVSEL

AGPPAR

AGPAD31

AGPAD30

AGPCBE_0 AGPCBE_1 AGPCBE_2

AGP_ST2

AGP_AD_STB0_P AGP_AD_STB0_N AGP_AD_STB1_P AGP_AD_STB1_N

AGPPIPE

AGPRBF

AGP_ST1

AGP_SBA7

AGP_SB_STB_P AGP_SB_STB_N

AGP_ST0

AGP_WBF

AGP

INTERFACES

AGP_SBA6

AGP_SBA5

AGP_SBA4

AGPAD29

AGPAD28

AGPAD27

AGPAD26

AGPAD25

AGPAD24

AGPAD23

AGPAD22

AGPAD21

AGPAD20

AGPAD19

AGPAD18

AGPAD17

AGPAD16

AGPAD15

AGPAD14

AGPAD13

AGPAD12

AGPAD11

AGPAD10

AGPAD9

AGPAD8

AGPAD7

AGPAD6

AGPAD5

AGPAD4

AGPAD3

AGPAD2

AGPAD1

(3 OF 9)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ARE POWERED IN SLEEP

+3V_MAIN BECAUSE THESE CHIPS

USB2 AND CBUS REQ REMAINS ON

AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP

PLACE CLOSE TO INTREPID SIDE

SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS

BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS

SIMPLY PROVIDING REFERENCE TO CHIP

(PLACE CLOSE TO INTREPID AGP BALLS)

AGP I/O REFERENCE

OUTPUT IMPEDANCE IS ABOUT 20OHM

Need divider for 3.3V slot!

INTREPID AGP/PCI

AGP PULL-UPS/PULL DOWNS

Vin = Vcore (1.5V) Vout = AGPIO (1.5V)

use 52-ohm a resistor here.

NOTE: Designs using AGP slot should

PCI PULL-UPS

VOUT = 3.3V

VIN = 1.5V (CORE)

PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE

MF

1/16W

5%

4.7

402

21

R146

0

402

5%

1/16W

MF

21

R217

1% 1/16W MF 402

60.4

2

1

R209

SM1

10K

5%

1/16W

81

RP22

SM1

1/16W

5%

10K

81

RP20

SM1

1/16W

5%

10K

81

RP19

SM1

1/16W

5%

10K

72

RP19

402

4.7

5%

1/16W

MF

21

R112

0.22UF

402

20%

6.3V CERM

2

1

C83

INTREPID-REV2.1

BGA

CRITICAL

J10

J11

AN9

AK17

AR7

AM9

AT15

AR15

AT17

AR16

AR17

AT14

AH16

AN17

AN18

AT16

AN16

AM17

AM18 AJ19

AT18

AH18

AR18

AJ15

AM16

AK16

AR14

AR9

AK13

AH13

AN11

AT8

AN10

AM15

AN15

AJ8

AK14

AT13

AN14

AH15

AK15

AR13

AM11

AT12

AJ11

AR12

AK12

AM13

AN13

AT10

AT11

AK11

AN12

AM12

AR11

AT9

AR10

AR8

AM10

U45

33

402

MF

1/16W

5%

21

R192

33

402

MF

1/16W

5%

21

R147

MF

1/16W

5%

402

33

21

R171

5% 1/16W MF 402

47

2

1

R186

+3V_SLEEP

SM1

1/16W

5%

10K

81

RP18

SM1

1/16W

5%

10K

63

RP17

SM1

1/16W

10K

5%

81

RP17

10K

5%

1/16W

SM1

72

RP17

SM1

1/16W

5%

10K

63

RP18

SM1

10K

5%

1/16W

54

RP17

1/16W

5%

10K

SM1

54

RP18

1/16W

5%

10K

SM1

72

RP18

402

MF

1/16W

5%

22

21

R77

402

MF

1/16W

5%

22

21

R82

402

MF

1/16W

5%

22

21

R103

33

402

MF

1/16W

5%

21

R169

NEC_USB

5%

1/16W

MF

402

22

21

R157

+3V_MAIN

10K

5%

1/16W

MF

402

21

R187

5%

10K

1/16W

MF

402

21

R230

402

MF

1/16W

5%

10K

21

R193

10K

5%

1/16W

MF

402

21

R170

402

MF

1/16W

5%

10K

21

R194

5%

10K

1/16W

MF

402

21

R216

4.99K

1%

1/16W

MF

402

2

1

R185

4.99K

1%

1/16W

MF

402

2

1

R180

0.22UF

6.3V 402

CERM

20%

2

1

C247

10K

5%

1/16W

SM1

54

RP20

10K

5%

1/16W

SM1

72

RP22

1/16W

5%

10K

SM1

72

RP20

SM1

10K

5%

1/16W

63

RP19

10K

5%

1/16W

SM1

54

RP19

10K

5%

1/16W

SM1

63

RP20

10K

5%

1/16W

SM1

54

RP22

10K

5%

1/16W

SM1

63

RP22

INTREPID-REV2.1

BGA

CRITICAL

V13

V14

AN19

AK30

AR30

AT30

AN29

AH25 AG25

AN30

AM30

AT31

AR31

AN31

AM31

AR32

AT32

AK25

AK27

AK28

AT19

AK21 AK22

AK20 AK19

AB21

AB20

AR29

AM28

AT33

AK24

AJ24

AJ29

AT29

AT28

AM29

AN28

AM27

AL25

AN24

AT23

AM20

AT22

AM21

AN21

AR21

AN20

AT21

AN27

AR28

AR20

AT27

AR27

AM26

AN26

AM25

AT26

AR26

AL24

AN25

AM24

AT20

AR25

AT25

AR24

AM23

AT24

AR23

AN23

AM22

AN22

AR22

AM19

AR19

U45

0.22UF

CERM

6.3V

20%

402

2

1

C160

B

051-6531

12 44

CLK33M_CBUS_UF

CLK66M_GPU_AGP

CLK66M_GPU_AGP_UF

CLK33M_USB2

CLK33M_USB2_UF

INT_PCI_FB_IN

INT_PCI_FB_OUT

CLK33M_CBUS

CLK33M_AIRPORT

CLK33M_AIRPORT_UF

INT_ROM_RW_L

INT_ROM_CS_L INT_ROM_OE_L

PCI_CBE<3>

PCI_CBE<2>

PCI_CBE<1>

PCI_CBE<0>

PCI_DEVSEL_L

PCI_STOP_L

PCI_TRDY_L

PCI_FRAME_L

PCI_IRDY_L

PCI_PAR

CBUS_PCI_GNT_L

AIRPORT_PCI_GNT_L

USB2_PCI_GNT_L

USB2_PCI_REQ_L

CBUS_PCI_REQ_L

AIRPORT_PCI_REQ_L

+1_5V_INTREPID_PLL6

PCI_AD<30> PCI_AD<31>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<23>

PCI_AD<22>

PCI_AD<19>

PCI_AD<21>

PCI_AD<20>

PCI_AD<17> PCI_AD<18>

PCI_AD<15>

PCI_AD<14>

PCI_AD<16>

PCI_AD<12> PCI_AD<13>

PCI_AD<9>

PCI_AD<11>

PCI_AD<10>

PCI_AD<7> PCI_AD<8>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<2>

PCI_AD<1>

PCI_AD<3>

PCI_AD<0>

+1_5V_INTREPID_PLL

PCI_STOP_L

PCI_TRDY_L

PCI_IRDY_L

PCI_DEVSEL_L

PCI_FRAME_L

+1_5V_AGP

INT_AGPPVT

+1_5V_INTREPID_PLL5

AGP_SBA<1>

AGP_REQ_L AGP_GNT_L

STOP_AGP_L

AGP_BUSY_L

INT_AGP_VREF

AGP_AD<0> AGP_AD<1> AGP_AD<2> AGP_AD<3> AGP_AD<4> AGP_AD<5> AGP_AD<6>

AGP_AD<8> AGP_AD<9> AGP_AD<10> AGP_AD<11> AGP_AD<12> AGP_AD<13> AGP_AD<14> AGP_AD<15> AGP_AD<16> AGP_AD<17> AGP_AD<18> AGP_AD<19> AGP_AD<20> AGP_AD<21> AGP_AD<22> AGP_AD<23> AGP_AD<24> AGP_AD<25> AGP_AD<26> AGP_AD<27> AGP_AD<28> AGP_AD<29> AGP_AD<30> AGP_AD<31>

AGP_AD<7>

AGP_CBE<0> AGP_CBE<1> AGP_CBE<2> AGP_CBE<3>

AGP_PAR AGP_FRAME_L AGP_TRDY_L AGP_IRDY_L AGP_STOP_L AGP_DEVSEL_L

AGP_SBA<0>

AGP_SBA<2> AGP_SBA<3> AGP_SBA<4> AGP_SBA<5> AGP_SBA<6> AGP_SBA<7>

AGP_SB_STB AGP_SB_STB_L

AGP_ST<0>

AGP_ST<2>

AGP_ST<1>

AGP_AD_STB<1> AGP_AD_STB_L<1>

AGP_AD_STB<0> AGP_AD_STB_L<0>

AGP_PIPE_L AGP_RBF_L

AGP_WBF_L

+1_5V_INTREPID_PLL

AGP_BUSY_L

AGP_GNT_L

STOP_AGP_L

+3V_GPU

AGP_FRAME_L

AGP_REQ_L

AGP_DEVSEL_L

AGP_TRDY_L

AGP_RBF_L

AGP_PIPE_L

AGP_AD_STB<1>

AGP_AD_STB_L<0>

AGP_IRDY_L

AGP_WBF_L

AGP_STOP_L

AGP_AD_STB<0>

+1_5V_AGP

AGP_SB_STB

AGP_AD_STB_L<1>

AGP_SB_STB_L

CLK66M_AGP_15V_TP INT_AGP_FB_IN INT_AGP_FB_OUT

+1_5V_AGP

INT_AGP_VREF

ROM_CS_L

INT_ROM_CS_L

ROM_OE_L

INT_ROM_OE_L

ROM_RW_L

INT_ROM_RW_L

AIRPORT_PCI_REQ_L

USB2_PCI_REQ_L

CBUS_PCI_REQ_L

38

39

21

39

37

39

37

39

37

39

37

19

37

26

37

26

37

26

37

26

38

26

18

38

18

39

26

24

26

39

24

26

24

26

24

14

24

16

37

38

37

14

37

21

37

16

37

16

38

39

36

24

17

24

39

26

17

24

17

24

17

24

17

12

17

15

37

18

37

18

37

18

12

18

19

18

15

18

15

18

24

26

17

36

18

36

26

36

17

24

36

12

17

12

17

24

26

12

38

9

17

9

17

9

8

12

38

18

12

18

12

18

12

18

12

8

12

18

12

36

12

9

12

9

12

9

12

CS_CE2

CS_CE1

CS_IORD CS_IOWR

ATA_CS1

ATA_CS0

IDE

IDEINTRQ

IDECHRDY

IDECS0

IDECS1

IDEDMACK IDEDMARQ

IDERD

IDEWR

IDERST

IDEA9

IDEA8

IDEA7

IDEA6

IDEA5

IDEA4

IDEA3

IDEA2

IDEA1

IDEA0

IDEDD15

IDEDD14

IDEDD13

IDEDD12

IDEDD11

IDEDD10

IDEDD9

IDEDD8

IDEDD7

IDEDD6

IDEDD5

IDEDD4

IDEDD3

IDEDD2

IDEDD1

IDEDD0

CARDSLOT

CS_WAIT

CS_OE CS_WE

ATA_INTRQ

ATA_DMARQ

ATA_CHRDY

ATA_DMACK

ATA_RD

ATA_WR

ATA_RST

ATA_VREF

UATA100

ATA_A1 ATA_A2

ATA_A0

ATA_D12

ATA_D11

ATA_D15

ATA_D14

ATA_D13

ATA_D10

ATA_D9

ATA_D3

ATA_D2

ATA_D1

ATA_D0

ATA_D4

ATA_D8

ATA_D7

ATA_D6

ATA_D5

(5 OF 9)

IICDATA_1

IICCLK_1

IICCLK_0 IICDATA_0

TST_PLLEN

TST_MONOUT

TST_MONIN

TEI

TRSTN

TMS

TCK

TDO

TDI

TEST

MDC

GBE_REFCLK

MDIO

COL

CRS

GTX_CLK

RXD_6

RXD_4 RXD_5

RXD_3

RXD_7

RXD_2

RXD_1

RX_ER

RX_DV

RX_CLK

RXD_0

FW_PINT

FW_LINKON

FWR_LCLK

TX_ER

TX_EN

TX_CLK

TXD_0

RESET

PURESET

PHY_LPS PHY_CTL0 PHY_CTL1 PHY_LREQ FWR_PCLK

(4 OF 9)

MISC

TXD_3

TXD_2

TXD_1

TXD_4 TXD_5 TXD_6 TXD_7

GB ETHERNET

FIREWIRE

PHY_DATA0 PHY_DATA1 PHY_DATA2 PHY_DATA3

PHY_DATA5

PHY_DATA7

PHY_DATA4

PHY_DATA6

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

D1-RD

D0-WR

6A-WR 6B-RD

59-RD

A1-RD

ADDR

84-WR 85-RD

A0-WR A2-WR

A3-RD

AE-WR AF-RD

BUS

LMU

(MAIN)

RAM - STANDARD

N/A

I2C-0

RAM - REVERSED

N/A

BOOTBANG E2PROM

N/A

FAN CONTROLLER

SNAPPER SOUND

N/A N/A N/A

N/A

(MAIN)

N/A N/A

I2C-1

N/A

(SLEEP)

I2C-2

N/A

DASH MODEM

N/A

(SLEEP)

N/A

0 0 0

0

0 0

1

0 0

JTG_RSTN_L

1 1

1

0(I)

1(I)

0(I)

1 X

0

1(I)

1

0(I)

1(I)

EXTPLL

X

0

X

TST_TEI_H

(I/O)

HWPLL_

0 1

SHUTDOWN (OUTPUT)

JTG_TDO_H

TESTSEL5

(OUTPUT)

(INPUT)

0(I)

X

(OUTPUT)

DDR_

TPDENABLE

1

X

1

0(I) 1(I)

0

(I/O)

JTG_TDI_H

TST_PLLEN_H

MEMWE

X(I) X(I) X(I) X(I) X(I)

ATPG IDDQ

POSTSCALAR BYPASS

PLL OUTPUTS

SELECTED

PLL OUTPUTS

X

(OUTPUT)

SYNC/MEM DATA

BYPASS

ANALYZER_CLK

JTAG MODE

DESCRIPTION

VIEW PLLS (SOFTWARE)

NORMAL OPERATION

TEST TRI-STATE

VIEW PLLS (HARDWARE)

FUNCTIONAL TEST WITHOUT

FUNCTIONAL TEST IDDQ

FUNCTIONAL TEST WITH

UDMA - STOP UDMA - HOSTDMARDY/HSTROBE UDMA - DEVICEDMARDY/DSTROBE

NOT USING CARDSLOT INTERFACE

EIDE/I2C

INT - ENET/FW/UATA

ENET_TXD SERIES TERMINATION

I2C PULL-UPS

TEST PULL-UPS/DOWNS

J20 - PG 12

J23 - PG 12

U37 - PG 23

U36 - PG 23

J9 - PG 25

0(I)

ATPG NORMAL

58-WR

AD-RD

AC-WR

ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES

U56 - PG 15

CLOCK SLEW SSCG

J12 - PG 24

U3 - PG 24

PMU

CS_WAIT IS AN INPUT

402

MF

1/16W

5%

1K

21

R629

10K

5%

1/16W

SM1

81

RP16

10K

402

MF

1/16W

5%

21

R621

402

MF

1/16W

5%

10K

2

1

R52

1/16W

5%

SM1

22

72

RP15

1/16W

5%

SM1

22

54

RP14

5%

1/16W

SM1

22

63

RP14

1/16W

5%

SM1

22

81

RP14

1/16W

5%

SM1

22

72

RP14

5%

1/16W

SM1

22

63

RP15

1/16W

5%

SM1

22

81

RP15

5%

1/16W

SM1

22

54

RP15

+3V_MAIN

10K

MF

1/16W

5%

402

12

R117

+3V_MAIN

402

MF

1/16W

5%

1K

21

R626

SM1

1/16W

5%

2.2K

72

RP12

SM1

1/16W

2.2K

5%

81

RP12

SM1

1/16W

5%

2.2K

54

RP12

1/16W

5%

SM1

2.2K

63

RP12

1/16W

5%

10K

SM1

63

RP16

SM1

10K

5%

1/16W

72

RP16

1/16W

5%

10K

SM1

54

RP16

1%

1K

1/16W MF 402

2

1

R154

BGA

CRITICAL

INTREPID-REV2.1

AM2

AJ4

AL2

AA7

AH7

AG8

AE5

AE4

AG2

AD5

AH1

AF2

AG1

AF1

AJ2

AJ1

AG4

AD7

AH2

AF4

AD4

AC5

AM1

AB7

AK4

AG7

AF7

AH5

AK2

AL1

AH4

AG5

AK1

AE7

AF5

AE1 AE2

AC4

AD2

AB5

AB4

AD1

AA1

Y15

Y4

AA2

AA8

AC2

AC1

W8

W2

V1

W1

V2

V4

U2

U1

Y8

W7

Y1

Y2

W5

W4

T1

V5

AB2

AA4

AA5

Y7

AB1

Y5

U45

402

5%

1/16W

MF

82

21

R51

402

82

MF

1/16W

5%

21

R92

BGA

INTREPID-REV2.1

CRITICAL

A5

A7

H9

E10

D9

G10

B7

A6

D8

E9

H10

AR6

AK10

AM7

AN6

AR5

AH10

AT5

AK8

AP5

D2

C4

J12

E8

G9

D7

A4

B4

D6

E7

D3

U5

T2

M2

M1

N4

L2

K2

K1

N5

P7

M4

L4

L1

P5

B5 B6

AM3

AN1

AK5

AN2

H12

L13

N1

N2

T7

U14 E6 C5

U45

22

5%

1/16W

MF

402

21

R145

402

MF

1/16W

5%

22

21

R34

402

MF

1/16W

5%

10

21

R624

402

MF

1/16W

10

5%

21

R630

402

MF

1/16W

5%

10

21

R124

051-6531

B

13 44

JTAG_ASIC_TCK

JTAG_ASIC_TMS

JTAG_ENET_TDI

JTAG_ASIC_TDI

INT_TST_PLLEN_PD

INT_TST_MONIN_PD

JTAG_ASIC_TRST_L

INT_JTAG_TEI

INT_I2C_CLK1

INT_I2C_DATA1

INT_I2C_CLK0

INT_I2C_DATA0

ENET_LINK_TXD<6>

ENET_PHY_TXD<6>

ENET_LINK_TXD<7>

ENET_PHY_TXD<7>

ENET_LINK_TXD<5>

ENET_PHY_TXD<5>

ENET_LINK_TXD<2>

ENET_PHY_TXD<2>

ENET_LINK_TXD<4>

ENET_PHY_TXD<4>

ENET_LINK_TXD<3>

ENET_PHY_TXD<3>

ENET_LINK_TXD<0>

ENET_PHY_TXD<0>

ENET_LINK_TXD<1>

ENET_PHY_TXD<1>

CLKENET_PHY_GTX

CLKENET_LINK_GTX

INT_PU_RESET_L

INT_RESET_L

JTAG_ASIC_TDI JTAG_ENET_TDI JTAG_ASIC_TCK JTAG_ASIC_TMS JTAG_ASIC_TRST_L INT_JTAG_TEI

INT_I2C_CLK1 INT_I2C_DATA1

INT_I2C_DATA0

INT_I2C_CLK0

INT_TST_MONOUT_TP INT_TST_PLLEN_PD

INT_TST_MONIN_PD

ENET_MDC

ENET_MDIO

ENET_COL

ENET_CRS

CLKENET_LINK_GBE_REF

ENET_LINK_RXD<7>

ENET_LINK_RXD<6>

ENET_LINK_RXD<5>

ENET_LINK_RXD<4>

ENET_LINK_RXD<2> ENET_LINK_RXD<3>

ENET_LINK_RXD<1>

ENET_LINK_RXD<0>

ENET_RX_ER

ENET_RX_DV

CLKENET_LINK_RX

CLKFW_LINK_LCLK

FW_PINT

FW_LKON

ENET_LINK_TX_ER

CLKENET_LINK_TX

ENET_LINK_TX_EN

ENET_LINK_TXD<1>

ENET_LINK_TXD<0>

ENET_LINK_TXD<2> ENET_LINK_TXD<3> ENET_LINK_TXD<4>

ENET_LINK_TXD<6>

ENET_LINK_TXD<5>

ENET_LINK_TXD<7>

FW_LINK_DATA<1>

FW_LINK_DATA<3>

FW_LINK_DATA<0>

FW_LINK_DATA<2>

FW_LINK_DATA<4> FW_LINK_DATA<5> FW_LINK_DATA<6> FW_LINK_DATA<7>

FW_PHY_LPS

FW_LINK_CNTL<1>

FW_LINK_CNTL<0>

FW_LINK_LREQ CLKFW_LINK_PCLK

ENET_PHY_TX_ER

ENET_PHY_TX_EN

CLKFW_PHY_LCLK

FW_PHY_LREQ

UIDE_REF

UIDE_CS1_L

UIDE_CS0_L

UIDE_IOCHRDY

UIDE_DMACK_L

UIDE_DIOR_L

UIDE_DIOW_L

UIDE_RST_L

UIDE_ADDR<2>

UIDE_ADDR<1>

UIDE_ADDR<0>

UIDE_DATA<5>

UIDE_DATA<15>

UIDE_DATA<14>

UIDE_DATA<13>

UIDE_DATA<12>

UIDE_DATA<11>

UIDE_DATA<10>

UIDE_DATA<9>

UIDE_DATA<8>

UIDE_DATA<7>

UIDE_DATA<6>

UIDE_DATA<4>

UIDE_DATA<3>

UIDE_DATA<2>

UIDE_DATA<1>

UIDE_DATA<0>

EIDE_DATA<11>

EIDE_DATA<13>

EIDE_DATA<15>

EIDE_DATA<14>

EIDE_ADDR<0> EIDE_ADDR<1>

EIDE_IOCHRDY

EIDE_ADDR<2>

EIDE_DATA<12>

EIDE_DATA<9> EIDE_DATA<10>

EIDE_DATA<8>

EIDE_DATA<6> EIDE_DATA<7>

EIDE_DATA<4> EIDE_DATA<5>

EIDE_DATA<3>

EIDE_DATA<2>

EIDE_DATA<1>

EIDE_DATA<0>

EIDE_CS0_L EIDE_CS1_L

EIDE_INT

EIDE_DMACK_L EIDE_DMARQ

EIDE_WR_L EIDE_RD_L

EIDE_RST_L

HD_DMARQ

UIDE_DMARQ

HD_INTRQUIDE_INTRQ

CSLOT_IOWAIT_L_PU

CSLOT_WE_L_SPN

CSLOT_OE_L_SPN

CSLOT_IOWR_L_SPN

CSLOT_IORD_L_SPN

CSLOT_CE2_L_SPN

CSLOT_CE1_L_SPN

CSLOT_ADDR9_SPN

CSLOT_ADDR8_SPN

CSLOT_ADDR7_SPN

CSLOT_ADDR6_SPN

CSLOT_ADDR5_SPN

CSLOT_ADDR4_SPN

CSLOT_ADDR3_SPN

39

25

23

39

25

23

27

39

27

14

13

37 37

36

30

39

27

14

13

37

36

37

36

37

36

37

36

37

36

37

13

11

13 27

27

36

25

9

13

11

13

27

36

28

37

27

37

13

28

37

28

27

28

38

24

37

24

37

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VSSA_8

VSSA4

VSSA3

VSSA2

VSSA1

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VDD15A_8

VDD15A_4

VDD15A_3

VDD15A_2

VDD15A_1

CPU_INT PCIPME

EXTINT12 EXTINT13 EXTINT14 EXTINT15 EXTINT16 EXTINT17

GPIO16

GPIO15

GPIO12

GPIO11

GPIO9

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

VSSU_2

VDDU33_2

VDDU33_1

(6 OF 9)

SCCRTSA

SCCTXDA

SCCDTRA

SCCRXDA SCCGPIOA SCCTRXCA

SCCTXDB

SCCGPIOB SCCTRXCB

SCCRXDB

SCCRTSB

PURPOSE

GENERAL

I/O’S

EXTINT8

EXTINT7

EXTINT6

EXTINT0

INTERRUPTS

EXTINT11

EXTINT4 EXTINT5

EXTINT10

EXTINT9

EXTINT3

EXTINT2

EXTINT1

AUD_DTO

AUD_DTI AUD_SYNC

MOD_DTO

AUD_BITCLK AUD_CLKOUT

IICCLK_2

MOD_SYNC

MOD_DTI

MOD_CLKOUT

IICDATA_2

MOD_BITCLK

IIC

AUDIO/I2S

CLOCKS

XTAL_OUT

PROCSLEEPREQ PENDPROCINT

XTAL_IN

SS_REF_CLK_IN

BUF_REF_CLK_OUT

STOPXTAL

WATCHDOG

PCI_

VSSU_1

PCI_

USB_VD0_P USB_VD0_N

USB_VD1_P USB_VD1_N

USB_VD2_N

USB_VD2_P

USB_PWRFLT0

USB_PRTPWR0

USB_VD3_N

USB_VD3_P

USB

USB_PRTPWR1 USB_PWRFLT1

USB_VD4_N

USB_VD4_P

USB_VD5_N

USB_VD5_P

USB_PRTPWR2 USB_PWRFLT2

ADJ

BYP GND

OUT

NC

SHDN

IN

CPU0

VDDA

VDD0

VDD1

VDDC

VDDQ

VSS1

VSS0

VSSA

VSSC

VSSQ

LOCK ODSEL

PD*

SDATA

SCLK

FSEL

CLKIN

RESET*

ADDRSEL

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_ALT_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

CRYSTAL LOAD CAPACITANCE IS 16PF

INTERNAL 250K PULL-DOWN

INT - USB/GPIOS/I2S

BRIGHTNESS PWM CONTRAST PWM

USB POWER FAULT SIGNALS

OTHERWISE A LOT OF OVERSHOOT/UNDERSHOOT

5

TESTMUXSEL

HWPLL_

MOD_DTO_B_H

MOD_SYNC_B_H

1 0

2

3

4

SIGNAL NAME

MOD_BITCLK_B_H

MOD_CLKOUT_B_H

MOD_DTI_B_H

JTG_TDO_H

INTERNAL 250K PULL-UP

FAN PWM

POWERBOOK SPARE

MISO REQ* MOSI ACK* SCK

VIA

USB PORT ASSIGNMENTS

VGATE/LOCK INTERRUPT

VCORE_A/B SEL

OPEN-DRAIN OUTPUT

PLACE R68 CLOSE TO INTREPID SIDE

OUTPUT IMPEDANCE ~18-20OHM

INTERNAL 250K PULL-UP

PORT A - RIGHT USB 1

NC

PORT E - BLUETOOTH

PORT F - MODEM

PORT C - LEFT USB

PORT D - UNUSED

CBUS_IREQ_L

PORT B - UNUSED

+3V_MAIN

10UF

CERM 805

20%

6.3V

2

1

C97

5%

1/16W

MF

402

100K

21

R111

+3V_MAIN

0.1UF

CERM

20% 10V

402

2

1

C85

0.01UF

20% CERM

16V 402

2

1

C84

402

22

1/16W

MF

5%

21

R50

402

22

5% MF

1/16W

21

R67

402

22

5% MF

1/16W

21

R91

47

5%

1/16W

SM1

72

RP8

1/16W

SM1

5%

47

63

RP8

47

5%

1/16W

SM1

54

RP8

47

SM1

1/16W

5%

81

RP8

402

22

1/16W

MF

5%

21

R90

INTREPID-REV2.1

BGA

CRITICAL

V15

U4

AT7

R8

R9

AH29

AK18

AJ16

AJ13

AA15

U8

T8

AG29

P8 N8

K5 L5

M7 M8

H2 H1

G2 G1

L8 L7

N7

J1

K4

M5

J2

J4

AN7

K9

AR4

AF9

AM5

AT4

AG10

AG11

AL5

AN3

AP4

AG9

AF10

AT6

AN8

AJ18

AJ17

AJ12

AA16

AJ7

R1

R2 T4

P1

V8

AH8

AL4

H4

L9

H5

J8

F2

J7

K7

F1

K8

J5

E1

G5

C32

D31

G30

E31

A33

B33

D34

C33

G4

H7

E2

D1

F4

J9

E30

B32

E34

F33

D30

U15

T5

R4 R7

R5

P2

U45

+3V_SLEEP

INTREPID_USB

402

MF

1/16W

5%

24

21

R614

402

1/16W MF

5%

15K

2

1

R115

INTREPID_USB

24

5%

1/16W

MF

402

21

R609

24

5%

1/16W

MF

402

INTREPID_USB

21

R89

402

MF

1/16W

5%

24

INTREPID_USB

21

R80

0.22UF

CERM

6.3V

20%

402

2

1

C198

402

4.7

5%

1/16W

MF

21

R155

0.22UF

CERM

6.3V

20%

402

2

1

C148

MF

1/16W

5%

4.7

402

21

R125

0.22UF

CERM

6.3V

20%

402

2

1

C182

4.7

MF

1/16W

5%

402

21

R156

0.22UF

CERM

6.3V

20%

402

2

1

C353

402

5%

1/16W

MF

15K

2

1

R114

0.22UF

CERM

6.3V

20%

402

2

1

C200

MF

1/16W

5%

402

4.7

21

R244

MF

1/16W

5%

4.7

402

21

R168

18.432M

CRITICAL

8X4.5MM-SM

21

Y1

1/16W

10M

MF

5%

402

NO STUFF

2 1

R622

22PF

402

CERM

5% 50V

2

1

C140

402

CERM

50V

5%

22PF

2

1

C15

1/16W

NO STUFF

402

0

5% MF

21

R49

U.FL-R_SMT

F-ST-SM

NO STUFF

CRITICAL

1

2

3

J1

402

NO STUFF

5%

51

1/16W MF

2

1

R28

0

402

MF

1/16W

5%

2

1

R632

1UF

603

CERM

10V

20%

2

1

C433

402

68.1K

1%

1/16W

MF

2

1

R277

402

15.8K

1%

1/16W

MF

2

1

R278

10UF

805

20%

6.3V CERM

2

1

C419

603

5%

1/16W

0

MF

NO STUFF

21

R291

5%

1/16W

MF

603

0

21

R264

+2_5V_MAIN

+1_8V_MAIN

LT1962-ADJ

MSOP

CRITICAL

5

1

7

6

8

4

3

2

U7

CERM

0.01UF

402

20% 16V

2

1

C424

402

5%

1/16W

MF

10K

12

R7

402

10K

MF

1/16W

5%

12

R113

402

5% 1/16W MF

1K

1

2

R29

402

5% 1/16W MF

1K

1

2

R102

10K

5%

1/16W

SM1

36

RP48

10K

5%

1/16W

SM1

45

RP7

10K

5%

1/16W

SM1

27

RP46

10K

5%

1/16W

SM1

18

RP46

5%

1/16W

SM1

10K

18

RP47

SM1

10K

1/16W

5%

36

RP47

5%

1/16W

SM1

10K

81

RP7

SM1

5%

1/16W

10K

27

RP47

5%

1/16W

SM1

10K

81

RP48

10K

SM1

1/16W

5%

54

RP6

SM1

5%

1/16W

10K

72

RP29

5%

1/16W

SM1

10K

54

RP29

5%

1/16W

SM1

10K

72

RP51

SM1

5%

1/16W

10K

45

RP47

5%

1/16W

10K

SM1

63

RP46

10K

SM1

1/16W

5%

54

RP51

10K

1/16W

5%

SM1

81

RP51

10K

SM1

1/16W

5%

81

RP29

5%

1/16W

SM1

10K

81

RP1

10K

SM1

1/16W

5%

72

RP6

SM1

10K

1/16W

5%

54

RP48

10K

SM1

1/16W

5%

63

RP6

10K

SM1

1/16W

5%

72

RP48

5%

1/16W

10K

SM1

63

RP29

5%

1/16W

10K

SM1

81

RP24

5%

1/16W

10K

SM1

63

RP7

5%

1/16W

10K

SM1

81

RP6

75

SSCG

MF

1/16W

5%

402

1

2

R100

10K

1/16W

5%

SM1

54

RP46

5%

10K

1/16W

SM1

54

RP1

5%

SM1

1/16W

10K

63

RP1

SM1

5%

1/16W

10K

72

RP1

SSCG

MF

1/16W

0

402

5%

21

R636

1/16W

5%

10K

402

MF

2

1

R638

0.1UF

SSCG

20% 10V CERM 402

2

1

C691

1UF

603

20% 10V CERM

SSCG

2

1

C692

CERM

0.1UF

402

10V

20%

SSCG

2

1

C698

SSCG

SM-1

400-OHM-EMI

2

1

L22

+3V_MAIN

400-OHM-EMI

SM-1

SSCG

2

1

L18

0.1UF

SSCG

402

CERM

10V

20%

2

1

C686

+2_5V_MAIN

402

SSCG

MF

1/16W

0

5%

21

R281

NO STUFF

402

10K

5% 1/16W MF

2

1

R656

10K

MF

5%

402

1/16W

NO STUFF

2

1

R682

10K

1/16W

5%

SM1

63

RP51

CRITICAL

TSSOP

SSCG

CY28512D

15

6

11

19

7

18

5

12

10

1

8

9

17

13

4

2

3

16

20

14

U42

SSCG

5%

33

402

MF

1/16W

21

R634

402

10K

SSCG

1/16W

5% MF

2

1

R625

5%

0

MF

402

1/16W

NO STUFF

2

1

R631

+3V_SLEEP

47

1/16W

SM1

5%

72

RP56

1/16W

5%

47

SM1

63

RP56

MOD_BITCLK

47

5%

SM1

1/16W

81

RP56

SM1

1/16W

5%

47

54

RP56

NEC_USB

5%

10K

1/16W MF 402

2

1

R701

NEC_USB

402

MF

1/16W

5%

10K

2

1

R708

NEC_USB

402

MF

1/16W

10K

5%

2

1

R699

NEC_USB

5%

10K

1/16W MF 402

2

1

R707

0

5%

1/16W

MF

402

21

R698

402

MF

1/16W

5%

10K

21

R720

FERR-EMI-100-OHM

SM

1

2

L1

R100

RES,METAL FILM,10 K OHM,5,1/16W,0402,SM

NO_SSCG

116S1104

1

B

051-6531

14 44

Y1

ALT FOR SIWARD

197S0035197S0004

CLK18M_INT_EXT

INT_I2C_CLK1

+2_5V_CG_MAIN

FW_PHY_PD

FW_PHY_PD_INT

SND_HP_MUTE_L

COMM_RESET_L

COMM_RING_DET_L

AGP_INT_L

USB_DAP

USB_DAM

USB_DBM

USB_DCP

USB_D2M

USB_D2P

USB_DBP

USB_DCM USB_D1M

USB_D1P

USB_DDM

USB_DDP

USB_DFM

USB_DFP

USB_DEM

BT_USB_DM

USB_DEP

BT_USB_DP

MODEM_USB_DM

MODEM_USB_DP

USB_OC_AB_L

INT_I2C_CLK2

INT_I2C_DATA2

+3V_CG_PLL_MAIN

LTC1962_INT_VIN

INT_I2C_DATA1

INT_REF_CLK_OUT

CG_CLKOUT

VCORE_VGATE

INT_EXTINT10_PU

LT1962_INT_BYP

LT1962_INT_ADJ

+3V_INTREPID_USB

+1_5V_INTREPID_PLL2

+1_5V_INTREPID_PLL3

+1_5V_INTREPID_PLL1

COMM_TXD_L COMM_RTS_L

COMM_GPIO_L

COMM_DTR_L

PMU_FROM_INT

PMU_ACK_L

PMU_REQ_L

INT_GPIO12_PU

SND_HW_RESET_L

INT_GPIO9_PU

PMU_INT_L

INT_EXTINT3_PU SND_LIN_SENSE_L

CBUS_INT_L

AIRPORT_PCI_INT_L

ENET_ENERGY_DET

PMU_INT_NMI

INT_EXTINT11_PU

INT_PROC_SLEEP_REQ_L INT_PEND_PROC_INT

SYSTEM_CLK_EN

INT_WATCHDOG_L

INT_REF_CLK_OUT INT_REF_CLK_IN

COMM_TRXC

COMM_RXD

PMU_CLK

PMU_TO_INT

USB_DAM

USB_DAP

USB_DCM

USB_PWREN_AB_L

USB_DDP USB_DDM

USB_PWREN_CD_L

USB_DEP USB_DEM

USB_DFP

SND_AMP_MUTE_L

INT_GPIO15_PU INT_ENET_RST_L

PMU_PME_L

MPIC_CPU_INT_L

SND_HP_SENSE_L

USB2_PCI_INT_L

INT_EXTINT16_PU

INT_EXTINT14_PU

INT_EXTINT13_PU

INT_EXTINT12_PU

CLK18M_XTAL_IN

CLK18M_INT_XOUT

+1_5V_INTREPID_PLL8

+1_5V_INTREPID_PLL4

SND_TO_AUDIO

USB_DCP

USB_DBM

USB_PWREN_EF_L

USB_DFM

USB_OC_CD_L

INT_AUDIO_TO_SND

INT_MOD_DTI

USB_OC_EF_L

MOD_DTO

MOD_CLKOUT

MOD_SYNC

SND_CLKOUT

INT_SND_CLKOUT

INT_SND_SCLK

INT_SND_TO_AUDIO

INT_SND_SYNC

SND_SCLK

+1_5V_INTREPID_PLL

CG_LOCK

INT_EXTINT8_PU

USB_DBP

INT_GPIO1_PU

CG_FSEL

INT_REF_CLK_IN

MAIN_RESET_L

AIRPORT_PCI_INT_L

USB_PWREN_EF_L

USB_OC_AB_L

USB_OC_EF_L

USB_PWREN_CD_L

USB_PWREN_AB_L

USB2_PCI_INT_L

INT_EXTINT8_PU

COMM_RING_DET_L

USB_OC_CD_L

INT_EXTINT14_PU

INT_GPIO1_PU

INT_GPIO15_PU

INT_MOD_CLKOUT_UF

CBUS_INT_L

PMU_REQ_L

INT_GPIO12_PU

PMU_INT_L

PMU_INT_NMI

INT_MOD_DTO_UF

INT_EXTINT3_PU

INT_EXTINT13_PU

INT_EXTINT11_PU

INT_EXTINT16_PU

INT_EXTINT10_PU

INT_GPIO9_PU

INT_MOD_DTI_UF

INT_MOD_BITCLK_UF

COMM_SHUTDOWN

CG_RESET_L

FW_PHY_PD_INT

INT_MOD_SYNC_UF

SND_SYNC

INT_MOD_CLKOUT_UF

INT_MOD_BITCLK_UF

INT_MOD_DTO_UF

SND_HW_RESET_L

CG_ADDRSEL

CG_FSEL

SYSTEM_CLK_EN

CLK18M_INT_XIN

INT_EXTINT12_PU

39 30 26

39

24

39

30

39

38

39

38

20

39

30

39

25

39

25

26

37

37 37

37

39

25

36

34

39

30

25

30

39

17

24

30

36

39

26

37

30

39

26

39

26

37

39

36

12

34

36

18

24

26

25

34

17

30

39

25

30

25

36

13

38

28

14

25

14

18

14

26

14

14 26

26

14

14 24

25

14

25

38

13

14

38

25

30

14

25

14

27

14

30

14

30

14

25

30

14

25

14

27

26

5

25

14

36

38

25

14

25

14

25

8

14

17

14

25

14

25

14

36

14

Apple G4 MLB PB17 INCH 051-6531 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual