HP HFBR-5105T, HFBR-5105, HFBR-5104T, HFBR-5104, HFBR-5103T Datasheet
...
FDDI, 100 Mbps ATM, and
Fast Ethernet Transceivers
in Low Cost 1x9 Package Style
Technical Data
Features
•Full Compliance with the Optical Performance Requirements of the FDDI PMD Standard
•Full Compliance with the FDDI LCF-PMD Standard
•Full Compliance with the Optical Performance Requirements of the ATM 100 Mbps Physical Layer
•Full Compliance with the Optical Performance Requirements of
100 Base-FX Version of IEEE 802.3u
•Very Low Cost 800 nm Alternative with FDDI and ATM Compliant Signaling
•Multisourced 1x9 Package Style with Choice of Duplex SC or Duplex ST* Receptacle
•Wave Solder and Aqueous Wash Process Compatible
•Manufactured in an ISO 9002 Certified Facility
Applications
•Multimode Fiber Backbone Links
•Multimode Fiber Wiring Closet to Desktop Links
•Very Low Cost Multimode Fiber 800 nm Links from Wiring Closet to Desktop
Description
The HFBR-5100 family of transceivers from Hewlett-Packard provide the system designer with products to implement a range of FDDI and ATM (Asynchronous Transfer Mode) designs at the 100 Mbps/125 MBd rate.
The transceivers are all supplied in the new industry standard 1x9 SIP package style with either a duplex SC or a duplex ST* connector interface.
FDDI PMD, ATM and Fast
Ethernet 2000 m Backbone
Links
The HFBR-5103/-5103T are 1300 nm products with optical performance compliant with the FDDI PMD standard. The FDDI PMD standard is ISO/IEC 9314-3: 1990 and ANSI X3.166 - 1990.
These transceivers for 2000 meter multimode fiber backbones are supplied in the small 1x9 duplex SC or ST package style for those designers who want to avoid the larger MIC/R (Media Interface Connector/Receptacle) defined in the FDDI PMD standard.
Hewlett-Packard also provides several other FDDI products compliant with the PMD and SMPMD standards. These products
HFBR-5103/-5103T 1300 nm 2000 m HFBR-5104/-5104T 800 nm 500 m HFBR-5105/-5105T 1300nm 500 m
are available with MIC/R, ST© and FC connector styles. They are available in the 1x13 and 2x11 transceiver and 16 pin transmitter/receiver package styles for those designs that require these alternate configurations.
The HFBR-5103/-5103T is also useful for both ATM 100 Mbps interfaces and Fast Ethernet 100 Base-FX interfaces. The ATM Forum User-Network Interface (UNI) Standard, Version 3.0, defines the Physical Layer for 100 Mbps Multimode Fiber Interface for ATM in Section 2.3 to be the FDDI PMD Standard. Likewise, the Fast Ethernet Alliance defines the Physical Layer for 100 Base-FX for Fast Ethernet to be the FDDI PMD Standard.
Note: The “T” in the product numbers indicates a transceiver with a duplex ST connector receptacle.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
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Product numbers without a “T” indicate transceivers with a duplex SC connector receptacle.
ATM applications for physical layers other than 100 Mbps Multimode Fiber Interface are supported by Hewlett-Packard. Products are available for both the single mode and the multimode fiber SONET OC-3c (STS-3c) ATM interfaces and the 155 Mbps/194 MBd multimode fiber ATM interface as specified in the ATM Forum UNI.
Contact your Hewlett-Packard sales representative for information on these alternative FDDI and ATM products.
Low Cost 500 m Desktop
Links
The HFBR-5105/-5105T are 1300 nm products which are fully compliant with the requirements of the FDDI LCF-PMD standard. The FDDI LCF-PMD standard is in the final approval stage as ISO/ IEC WD 9314-9 and ANSI LCFPMD Revision 1.3.
These multimode fiber transceivers can be used for 500 meter backbone and desktop links for FDDI, Fast Ethernet, or ATM 100 Mbps traffic.
required 1x10-12 Bit Error Rate over distances up to 500 meters using 62.5/125 μm multimode fiber cables.
This product is intended for use in cost sensitive applications where the benefits of fiber optic links are important.
Transmitter Sections
The transmitter sections of the HFBR-5103 and HFBR-5105 series utilize 1300 nm Surface Emitting InGaAsP LEDs and the HFBR-5104 series uses a low cost 820 nm AlGaAs LED. These LEDs are packaged in the optical subassembly portion of the transmitter section. They are driven by a custom silicon IC which converts differential PECL logic signals, ECL referenced (shifted) to a +5 Volt supply, into an analog LED drive current.
Receiver Sections
The receiver sections of the HFBR-5103 and HFBR-5105 series utilize InGaAs PIN photodiodes coupled to a custom silicon transimpedance preamplifier IC. The HFBR-5104 series
uses the same preamplifier IC in conjunction with an inexpensive silicon PIN photodiode. These are packaged in the optical subassembly portion of the receiver.
These PIN/preamplifier combinations are coupled to a custom quantizer IC which provides the final pulse shaping for the logic output and the Signal Detect function. The data output is differential. The signal detect output is single-ended. Both data and signal detect outputs are PECL compatible, ECL referenced (shifted) to a +5 Volt power supply.
Package
The overall package concept for the HP transceivers consists of the following basic elements; two optical subassemblies, an electrical subassembly and the housing as illustrated in Figure 1 and Figure 1a.
The package outline drawing and pin out are shown in Figures 2, 2a and 3. The details of this package outline and pin out are compliant with the multisource
The HFBR-5105 transceiver utilizes the duplex SC connector receptacle specified in the FDDI LCF-PMD standard.
Alternative 800 nm Low Cost 500 m Desktop Links
The HFBR-5104/-5104T are very low cost 800 nm alternative to the HFBR-5105/-5105T for FDDI, ATM or Fast Ethernet links from the wiring closet to the desktop. They comply with the performance requirements of the draft FDDI LCF-PMD document as translated by Hewlett-Packard to the 800 nm wavelength. This transceiver will transfer the full range of FDDI signals at the
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TOP VIEW
Figure 1. Block Diagram.
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Figure 1a. ST Block Diagram.
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NOTE 1: THE SOLDER POSTS AND ELECTRICAL PINS ARE PHOSPHOR BRONZE WITH TIN LEAD OVER NICKEL PLATING.
DIMENSIONS ARE IN MILLIMETERS (INCHES).
HFBR-5103 fig 2
Figure 2. Package Outline Drawing.
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(1.000)25.4 MAX.
HFBR-5103T
DATE CODE (YYWW)
SINGAPORE
(0.471)12.0 MAX.
42 MAX. 
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NOTE 1: PHOSPHOR BRONZE IS THE BASE MATERIAL FOR THE POSTS & PINS WITH TIN LEAD OVER NICKEL PLATING.
DIMENSIONS IN MILLIMETERS (INCHES).
Figure 2a. ST Package Outline Drawing.
1 = VEE
N/C
2 = RD
3 = RD
4 = SD
5 = VCC
6 = VCC
7 = TD
8 = TD
N/C
9 = VEE
TOP VIEW
definition of the 1x9 SIP. The low profile of the Hewlett-Packard transceiver design complies with the maximum height allowed for the duplex SC connector over the entire length of the package.
The optical subassemblies utilize a high volume assembly process together with low cost lens elements which result in a cost effective building block.
The electrical subassembly consists of a high volume multilayer printed circuit board on which the IC chips and various surface-
Figure 3. Pin Out Diagram.
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mounted passive circuit elements are attached.
The package includes internal shields for the electrical and optical subassemblies to ensure low EMI emissions and high immunity to external EMI fields.
The outer housing including the duplex SC connector receptacle or the duplex ST ports is molded of filled non-conductive plastic to provide mechanical strength and electrical isolation. The solder posts of the Hewlett-Packard design are isolated from the circuit design of the transceiver and do not require connection to a ground plane on the circuit board.
The transceiver is attached to a printed circuit board with the nine signal pins and the two solder posts which exit the bottom of the housing. The two solder posts provide the primary mechanical strength to withstand the loads imposed on the transceiver by mating with duplex or simplex SC or ST connectored fiber cables.
Application Information
The Applications Engineering group in the Hewlett-Packard Optical Communication Division is available to assist you with the technical understanding and design trade-offs associated with these transceivers. You can contact them through your Hewlett-Packard sales representative.
The following information is provided to answer some of the most common questions about the use of these parts.
Transceiver Optical Power Budget versus Link Length
Optical Power Budget (OPB) is the available optical power for a fiber optic link to accommodate fiber cable losses plus losses due to in-line connectors, splices, optical switches, and to provide margin for link aging and unplanned losses due to cable plant reconfiguration or repair.
Figure 4 illustrates the predicted OPB associated with the three transceiver series specified in this data sheet at the Beginning of Life (BOL). These curves represent the attenuation and chromatic plus modal dispersion losses associated with the 62.5/ 125 μm and 50/125 μm fiber cables only. The area under the curves represents the remaining OPB at any link length, which is available for overcoming nonfiber cable related losses.
Hewlett-Packard LED technology has produced 800 nm LED and 1300 nm LED devices with lower aging characteristics than normally associated with these
technologies in the industry. The industry convention is 3 dB aging for 800 nm and 1.5 dB aging for 1300 nm LEDs. The HP 1300 nm LEDs will experience less than
1 dB of aging over normal commercial equipment mission life periods. Contact your HewlettPackard sales representative for additional details.
Figure 4 was generated with a Hewlett-Packard fiber optic link model containing the current industry conventions for fiber cable specifications and the FDDI PMD and LCF-PMD optical parameters. These parameters are reflected in the guaranteed performance of the transceiver specifications in this data sheet. This same model has been used extensively in the ANSI and IEEE committees, including the ANSI X3T9.5 committee, to establish the optical performance requirements for various fiber optic interface standards. The cable parameters used come from the ISO/IEC JTC1/SC 25/WG3 Generic Cabling for Customer Premises per DIS 11801 docu-
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FIBER OPTIC CABLE LENGTH (km)
Figure 4. Optical Power Budget at BOL versus Fiber Optic Cable Length.
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ment and the EIA/TIA-568-A Commercial Building Telecommunications Cabling Standard per SP-2840.
The HFBR-5104 series 800 nm transceiver curve in Figure 4 was generated based on extensive empirical test data of typical 800 nm transmitter and receiver performance. The curve includes the effect of typical fiber attenuation, plus receiver sensitivity loss due to chromatic and metal dispersion losses through the fiber.
Transceiver Signaling
Operating Rate Range and
BER Performance
For purposes of definition, the symbol (Baud) rate, also called signaling rate, is the reciprocal of the shortest symbol time. Data rate (bits/sec) is the symbol rate divided by the encoding factor
used to encode the data (symbols/ bit).
When used in FDDI and ATM 100 Mbps applications the performance of the 1300 nm transceivers is guaranteed over the signaling rate of 10 MBd to 125 MBd to the full conditions listed in individual product specification tables.
The transceivers may be used for other applications at signaling rates outside of the 10 MBd to 125 MBd range with some penalty in the link optical power budget primarily caused by a reduction of receiver sensitivity. Figure 5 gives an indication of the typical performance of these 1300 nm products at different rates.
These transceivers can also be used for applications which require different Bit Error Rate (BER) performance. Figure 6
illustrates the typical trade-off between link BER and the receivers input optical power level.
Transceiver Jitter
Performance
The Hewlett-Packard 1300 nm transceivers are designed to operate per the system jitter allocations stated in Tables E1 of Annexes E of the FDDI PMD and LCF-PMD standards.
The HP 1300 nm transmitters will tolerate the worst case input electrical jitter allowed in these tables without violating the worst case output jitter requirements of Sections 8.1 Active Output Interface of the FDDI PMD and LCF-PMD standards.
The HP 1300 nm receivers will tolerate the worst case input optical jitter allowed in Sections 8.2 Active Input Interface of the
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OPTICALRELATIVETRANSCEIVERPOWER |
BERCONSTANTAT(dB) |
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SIGNAL RATE (MBd)
CONDITIONS:
1.PRBS 27-1
2.DATA SAMPLED AT CENTER OF DATA SYMBOL.
3.BER = 10-6
4.TA = 25° C
5.VCC = 5 Vdc
6.INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Figure 5. Transceiver Relative Optical Power Budget at Constant BER vs. Signaling Rate.
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RELATIVE INPUT OPTICAL POWER – dB
CONDITIONS:
1.125 MBd
2.PRBS 27-1
3.CENTER OF SYMBOL SAMPLING.
4.TA = 25° C
5.VCC = 5 Vdc
6.INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Figure 6. Bit Error Rate vs. Relative Receiver Input Optical Power.
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FDDI PMD and LCF-PMD standards without violating the worst case output electrical jitter allowed in the Tables E1 of the Annexes E.
The jitter specifications stated in the following 1300 nm transceiver specification tables are derived from the values in Tables E1 of Annexes E. They represent the worst case jitter contribution that the transceivers are allowed to make to the overall system jitter without violating the Annex E allocation example. In practice the typical contribution of the HP transceivers is well below these maximum allowed amounts.
Recommended Handling
Precautions
Hewlett-Packard recommends that normal static precautions be taken in the handling and assembly of these transceivers to prevent damage which may be induced by electrostatic discharge (ESD). The HFBR5100 series of transceivers meet MIL-STD-883C Method 3015.4 Class 2 products.
Care should be used to avoid shorting the receiver data or signal detect outputs directly to ground without proper current limiting impedance.
Solder and Wash Process
Compatibility
The transceivers are delivered with protective process plugs inserted into the duplex SC or duplex ST connector receptacle. This process plug protects the optical subassemblies during wave solder and aqueous wash processing and acts as a dust cover during shipping.
These transceivers are compatible with either industry standard wave or hand solder processes.
Shipping Container
The transceiver is packaged in a shipping container designed to protect it from mechanical and ESD damage during shipment or storage.
Board Layout - Decoupling
Circuit and Ground Planes
It is important to take care in the layout of your circuit board to achieve optimum performance from these transceivers. Figure 7 provides a good example of a schematic for a power supply decoupling circuit that works well with these parts. It is further recommended that a contiguous
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NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 OHMS.
R2 = R3 = R5 = R7 = R9 = 82 OHMS.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
Figure 7. Recommended Decoupling and Termination Circuits
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