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FUJITSU SEMICONDUCTOR |
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DS07-16801-1E |
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DATA SHEET |
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32-bit Proprietary Microcontroller
CMOS
FR60Lite MB91270/280 Series
MB91F272/F272S/V280
The MB91270/280 series is single chip microcontroller that builds various I/O resources and the bus control mechanisms into by using 32-bit efficient RISC CPU for the built-in control being demanded for CPU processing high performance/high-speed. Because the vast address space that 32-bit CPU accesses is supported, the external bus access is basically. To speed up CPU instruction execution, MB91270/280 has built-in RAM of 16 Kbytes (for data) .
It is best specification for the built-in usage in which efficient CPU processing power such as the digital video camera, navigation systems, and DVD players is demanded.
The MB91270/280 series power-up the bus access based on FR30/40 family CPU, and is FR60 Lite family corresponding to use at high speed.
•FR CPU characteristics
•32-bit RISC, load/store architecture with a five-stage pipeline
•Maximum operating frequency: 32 MHz (using the PLL at an oscillation frequency of 4 MHz)
•16-bit fixed length instructions (basic instructions), 1 instruction per cycle
(Continued)
401-pin ceramic PGA |
100-pin plastic LQFP |
(PGA-401C-A02) |
(FPT-100P-M05) |
MB91270/280 Series
• Instruction optimized for embedded applications:
Memory-to-memory transfer, bit manipulation, barrel shift instruction etc.
• Instructions adapted for high - level languages:
Function entry/exit instructions, multiple - register load/store instructions
•Register interlock functions: Facilitating coding in assemblers
•Built-in multiplier supported at the instruction level. Signed 32-bit multiplication: 5 cycles.
Signed 16-bit multiplication: 3 cycles.
•Interrupt (PC, PS save): 6 cycles, 16 priority levels
•Harvard architecture allowing program access and data access to be executed simultaneously
•Instruction compatible with FR family
•External bus interface
•Maximum operating frequency: 16 MHz
•Can output full 24-bit address range (16 Mbyte space)
•8,16-bit data output
•Unused data/address pin can be used as general-purpose I/O ports.
•Capable of chip select output for completely independent four areas settable in 64 Kbytes minimum.
•Supports the following memory interfaces SRAM, ROM/Flash
•Basic bus cycle: 2 cycles
•Programmable automatic wait cycle generation function capable of inserting wait cycles for each area
•RDY input for external wait cycles
•Built-in memory
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MB91V280 |
MB91F272 (S) |
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ROM/Flash |
External SRAM |
Flash 256 Kbytes |
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F-bus RAM |
48 Kbytes |
10 Kbytes |
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The peripheral circuits are described below.
See “■PRODUCT LINEUP” for the number of available channels on each model.
•DMAC (DMA Controller)
•Capable of simultaneous operation of up to five channels
•Two forwarding factors (internal peripheral/software)
•Bit search module (for REALOS)
Search for the position of the bit “1”/“0”-changed first in one word from the MSB
•LIN UARTs (LIN-UART) : Up to 7 channels
•Asynchronous (start-stop synchronous) communications, clock synchronous communications
•Synch-Break detection
•Built-in baud rate generator on each channel
•Supports SPI (mode 2: Clock synchronous communication mode)
•CAN CONTROLLERS : 3 channels (Max)
•High-speed transfer : 1 Mbps
•32 message buffer (128 message buffer on the MB91V280)
(Continued)
2
MB91270/280 Series
•Various timers
•16-bit reload timer : 3 channels (including one channel for use by REALOS) The internal clock can be divided by 2, 8, or 32
•16-bit free-running timer: 4 channels Output compare module: 8 channels Input capture module: 8 channels
•8/16-bit PPG timer: 8-bit x 16 channels or 16-bit x 8 channels
•Interrupt controller
•Interrupt from internal peripheral
•Software-selectable priority level (16 levels)
•D/A converter : 2 channels
8-bit or 10-bit resolution, R-2R type
•A/D converter: 24 channels (MB91V280 has an additional module with eight more channels)
•10-bit resolution
•Successive approximation conversion type Conversion time : 3 µs
•Conversion mode (single conversion mode, continuous conversion mode)
•Activation source (software, external trigger, peripheral interrupt)
•Other interval timer/counter
•8/16-bit up down counter :
8 bits × 4 channels or 16 bits × 2 channels
•16-bit timebase timer / watchdog timer
•I2C bus interface* (400 Kbps): 3 channels
•Master/slave sending and receiving
•Arbitration and clock synchronization
•Hardware watchdog
Interval time: 569 ms (Min), 771 ms (Max)
(Using a self-oscillation circuit (100 kHz) with a trimming function.)
•I/O port
•Pull-up/pull-down can be controlled independently for each pin.
•The input level for each pin can be set to either CMOS Schmitt trigger levels or CMOS automotive Schmitt trigger levels.
•The pin level can be read directly.
•Max 120 ports
•Other features
•Internal oscillator circuit as clock source, allowing PLL multiplication to be selected
•INITX is prepared as a reset pin.
•Watchdog timer reset, software reset
•Available low-power consumption modes are stop mode, sleep mode, and real time clock mode. Supports low-power consumption operation with CPU operating at 32 kHz (MB91F272 only).
•Gear function
•Built-in timebase timer
•Output clock (clock monitor)
(Continued)
3
MB91270/280 Series
(Continued)
•Clock Modulator
•Clock monitor function
Uses an internal self-oscillation circuit to monitor whether the main clock halts.
• Package |
PGA-401, LQFP-100 |
•CMOS technology (0.35 m)
•Power supply voltage: 3.5 V to 5.5 V
The 3.3 V supply to internal circuits is generated by an internal step-down circuit.
*: I2C license
Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips.
4
MB91270/280 Series
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Kind |
MB91F272 (S) |
MB91V280 |
Parameter |
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Package |
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LQFP-100 |
PGA-401 |
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Built - in ROM/Flash |
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Flash 256 Kbytes |
External SRAM |
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RAM |
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10 Kbytes |
48 Kbytes |
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Address : 24 bits |
Address : 24 bits |
External bus |
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Data : 16 bits |
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Data : 16 bits |
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(Multiplex only) |
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External interrupt |
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16 channels |
40 channels |
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DMAC (DMA Controller) |
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5 channels |
5 channels |
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Clock modulator |
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Yes |
Yes |
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Clock monitor function |
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Yes |
Yes |
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Clock monitor |
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Yes |
Yes |
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32 kHz sub-clock |
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Option |
Yes |
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(MB91F272 only) |
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Real time clock |
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Yes |
Yes |
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CAN controllers |
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1 channel (32 message buffer) |
3 channels (128 message buffer) |
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LIN UARTs (LIN-UART) |
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7 channels |
7 channels |
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I2C interface |
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3 channels |
3 channels |
16 - bit reload timer |
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3 channels |
3 channels |
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8/16-bit up down counter |
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2 channels |
2 channels |
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16 - bit free - run timer |
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4 channels |
4 channels |
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Input capture |
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8 channels |
8 channels |
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Output compare |
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8 channels |
8 channels |
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8/16-bit PPG |
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16-bit x 8 channels |
16-bit x 8 channels |
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8-bit x 16 channels |
8-bit x 16 channels |
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10-bit A/D converter |
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24 channels |
24 channels + 8 channels |
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8/10-bit D/A converter |
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No |
2 channels |
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Pin pull-up/down |
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See “■PIN FUNCTION” |
All pins |
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Input level selector |
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See “■PIN FUNCTION” |
All pins |
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Debugging support |
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Wild register |
DSU4 |
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5
MB91270/280 Series
(TOP VIEW)
P26/A22/IN2 1
P27/A23/IN3 2
P30/ASX/IN4 3
P31/RDX/IN5 4 P32/WR0X/RX2/INT10R 5 P33/WR1X/TX2 6 P34/BRQ/OUT4 7 P35/BGRNTX/OUT5 8 P36/RDY/OUT6 9 P37/SYSCLK/OUT7 10 P40/(X0A) 11 P41/(X1A) 12
VCC 13
VSS 14
C 15 P42/IN6/RX1/INT9R 16 P43/IN7/TX1 17 P44/SDA0/FRCK0 18 P45/AIN2/SCL0/FRCK1 19 P46/BIN2/SDA1 20 P47/ZIN2/SCL1 21 P50/AN8/SIN2 22 P51/AN9/SOT2 23 P52/AN10/SCK2 24 P53/AN11/BIN1 25
P25/A21/IN1 |
P24/A20/IN0 |
P23/A19/PPGF |
P22/A18/PPGD |
P21/A17/PPGB |
P20/A16/PPG9 |
P17/AD15/SCK4 |
P16/AD14/SOT4 |
P15/AD13/SIN4 |
X0 |
X1 |
VSS |
VCC |
P14/AD12/SCK3 |
P13/AD11/SOT3 |
P12/AD10/SIN3/INT11R |
P11/AD09/TOT1 |
P10/AD08/TIN1 |
P07/AD07/INT15 |
P06/AD06/INT14 |
P05/AD05/SCK6/INT13 |
P04/AD04/SOT6/INT12 |
P03/AD03/SIN6/INT11 |
P02/AD02/SCK5/INT10 |
P01/AD01/SOT5/INT9 |
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100 |
99 |
98 |
97 |
96 |
95 |
94 |
93 |
92 |
91 |
90 |
89 |
88 |
87 |
86 |
85 |
84 |
83 |
82 |
81 |
80 |
79 |
78 |
77 |
76 |
LQFP-100
26 |
27 |
28 |
29 |
30 |
31 |
32 |
33 |
34 |
35 |
36 |
37 |
38 |
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
50 |
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P54/AN12/AIN1 |
P55/AN13/ZIN1 |
P56/AN14 |
P57/AN15 |
AVCC |
AVRH |
AVRL |
AVSS |
P60/AN0/PPG0 |
P61/AN1/PPG2 |
P62/AN2/PPG4 |
P63/AN3/PPG6 |
P64/AN4/PPG8 |
P65/AN5/PPGA |
P66/AN6/PPGC |
P67/AN7/PPGE |
VSS |
P70/AN16/INT0 |
P71/AN17/INT1 |
P72/AN18/INT2 |
P73/AN19/INT3 |
P74/AN20/INT4 |
P75/AN21/INT5 |
MD2 |
MD1 |
75 |
P00/AD00/SIN5/INT8 |
74 |
PA1/TX0 |
73 |
PA0/RX0/INT8R |
72 |
P97/OUT3 |
71 |
P96/OUT2/ZIN0 |
70 |
P95/OUT1/BIN0 |
69 |
P94/OUT0/AIN0 |
68 |
P93/PPG7/ZIN3/CS3X |
67 |
P92/PPG5/BIN3/CS2X |
66 |
P91/PPG3/AIN3/CS1X |
65 |
P90/PPG1/CS0X |
64 |
VSS |
63 |
VCC |
62 |
P87/SCK1 |
61 |
P86/SOT1 |
60 |
P85/SIN1 |
59 |
P84/SCK0/INT15R |
58 |
P83/TOT2/SOT0 |
57 |
P82/TIN2/SIN0/INT14R |
56 |
P81/TOT0/INT13R/CKOT |
55 |
P80/TIN0/INT12R/ADTG |
54 |
P77/AN23/INT7/SCL2 |
53 |
P76/AN22/INT6/SDA2 |
52 |
INITX |
51 |
MD0 |
(FPT-100P-M05)
6
MB91270/280 Series
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
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name |
type* |
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90 |
X1 |
X1 |
OB |
Oscillator output pin |
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91 |
X0 |
X0 |
OA |
Oscillator input pin |
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52 |
INITX |
INITX |
N |
Reset input pin (“L” active) |
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49 to 51 |
MD2 to MD0 |
MD2 to MD0 |
J |
Operation mode select input pin. |
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Connect to VCC or VSS directly. |
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Port 0 |
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P00 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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75 |
P00/AD00/ |
AD00 |
T |
External address/data bus I/O pin bit 0 |
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SIN5/INT8 |
This function is enabled when the external bus is enabled. |
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INT8 |
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External interrupt request 8 input pin |
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SIN5 |
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Serial data input pin for LIN-UART5 |
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P01 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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76 |
P01/AD01/ |
AD01 |
T |
External address/data bus I/O pin bit 1 |
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SOT5/INT9 |
This function is enabled when the external bus is enabled. |
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INT9 |
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External interrupt request 9 input pin |
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SOT5 |
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Serial data output pin for LIN-UART5 |
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P02 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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77 |
P02/AD02/ |
AD02 |
T |
External address/data bus I/O pin bit 2 |
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SCK5/INT10 |
This function is enabled when the external bus is enabled. |
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INT10 |
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External interrupt request 10 input pin |
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SCK5 |
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Clock I/O pin for LIN-UART5 |
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P03 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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78 |
P03/AD03/ |
AD03 |
T |
External address/data bus I/O pin bit 3 |
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SIN6/INT11 |
This function is enabled when the external bus is enabled. |
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INT11 |
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External interrupt request 11 input pin |
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SIN6 |
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Serial data input pin for LIN-UART6 |
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P04 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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79 |
P04/AD04/ |
AD04 |
T |
External address/data bus I/O pin bit 4 |
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SOT6/INT12 |
This function is enabled when the external bus is enabled. |
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INT12 |
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External interrupt request 12 input pin |
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SOT6 |
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Serial data output pin for LIN-UART6 |
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* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
7
MB91270/280 Series
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Pin No. |
Pin name |
Function |
I/O circuit |
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Function |
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name |
type* |
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P05 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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80 |
P05/AD05/ |
AD05 |
T |
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External address/data bus I/O pin bit 5 |
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SCK6/INT13 |
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This function is enabled when the external bus is enabled. |
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INT13 |
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External interrupt request 13 input pin |
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SCK6 |
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Clock I/O pin for LIN-UART6 |
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P06 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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P06/AD06/ |
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81 |
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T |
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External address/data bus I/O pin bit 6 |
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INT14 |
AD06 |
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This function is enabled when the external bus is enabled. |
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INT14 |
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External interrupt request 14 input pin |
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P07 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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P07/AD07/ |
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82 |
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T |
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External address/data bus I/O pin bit 7 |
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INT15 |
AD07 |
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This function is enabled when the external bus is enabled. |
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INT15 |
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External interrupt request 15 input pin |
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Port 1 |
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P10 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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P10/AD08/ |
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83 |
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T |
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External address/data bus I/O pin bit 8 |
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TIN1 |
AD08 |
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This function is enabled when the external bus is enabled. |
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TIN1 |
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Event input pin for reload timer 1 |
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P11 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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P11/AD09/ |
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84 |
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T |
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External address/data bus I/O pin bit 9 |
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TOT1 |
AD09 |
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This function is enabled when the external bus is enabled. |
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TOT1 |
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Output pin for reload timer 1 |
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P12 |
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General-purpose I/O ports. |
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This function is enabled in single-chip mode. |
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P12/AD10/ |
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AD10 |
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External address/data bus I/O pin bit 10 |
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85 |
SIN3/ |
T |
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This function is enabled when the external bus is enabled. |
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INT11R |
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SIN3 |
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Serial data input pin for LIN-UART3 |
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INT11R |
|
|
External interrupt request 11 input pin (Set by EISSR) |
|
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P13 |
|
|
General-purpose I/O ports. |
|
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|
This function is enabled in single-chip mode. |
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P13/AD11/ |
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|
86 |
AD11 |
T |
|
External address/data bus I/O pin bit 11 |
|
|
|
SOT3 |
|
|
||||
|
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|
|
This function is enabled when the external bus is enabled. |
|
||
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SOT3 |
|
|
Serial data output pin for LIN-UART3 |
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|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
8
MB91270/280 Series
|
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|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
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||
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P14 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P14/AD12/ |
|
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|
|
|
87 |
|
T |
|
|
|
|
|
External address/data bus I/O pin bit 12 |
|
|||
|
SCK3 |
AD12 |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
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SCK3 |
|
Clock I/O pin for LIN-UART3 |
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P15 |
|
General-purpose I/O ports. |
|
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|
|
This function is enabled in single-chip mode. |
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P15/AD13/ |
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92 |
|
T |
External address/data bus I/O pin bit 13 |
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|
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SIN4 |
AD13 |
|
|||
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|
|
This function is enabled when the external bus is enabled. |
|
||
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SIN4 |
|
Serial data input pin for LIN-UART4 |
|
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|
|
P16 |
|
General-purpose I/O ports. |
|
|
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|
|
This function is enabled in single-chip mode. |
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P16/AD14/ |
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93 |
|
T |
External address/data bus I/O pin bit 14 |
|
|
|
SOT4 |
AD14 |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
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SOT4 |
|
Serial data output pin for LIN-UART4 |
|
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|
P17 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P17/AD15/ |
|
|
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|
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|
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|
94 |
|
T |
External address/data bus I/O pin bit 15 |
|
|
|
SCK4 |
AD15 |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
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SCK4 |
|
Clock I/O pin for LIN-UART4 |
|
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Port 2 |
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|
|
P20 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P20/A16/ |
|
|
|
|
|
|
|
|
|
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|
|
95 |
|
A |
External address bus output pin bit 16 |
|
|
|
PPG9 |
A16 |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
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|
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PPG9 |
|
Output pin for PPG9 |
|
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|
|
|
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|
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P21 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P21/A17/ |
|
|
|
|
|
|
|
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|
|
96 |
|
A |
External address bus output pin bit 17 |
|
|
|
PPGB |
A17 |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
|
|
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|
|
|
PPGB |
|
Output pin for PPGB |
|
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|
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|
|
|
|
|
|
|
P22 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P22/A18/ |
|
|
|
|
|
|
|
|
|
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|
|
97 |
|
A |
External address bus output pin bit 18 |
|
|
|
PPGD |
A18 |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
|
|
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|
|
|
PPGD |
|
Output pin for PPGD |
|
|
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
9
MB91270/280 Series
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
P23 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P23/A19/ |
|
|
|
|
|
98 |
|
A |
|
|
|
|
|
External address bus output pin bit 19 |
|
|||
|
PPGF |
A19 |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
|
|
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|
|
PPGF |
|
Output pin for PPGF |
|
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|
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|
|
|
|
P24 to P27 |
|
General-purpose I/O ports. |
|
|
|
P24/A20/IN0 |
|
This function is enabled in single-chip mode. |
|
|
|
99, 100, |
|
|
|
||
|
|
|
|
|
||
|
|
A |
External address bus output pin bits 20 to 23 |
|
||
|
1, 2 |
to |
A20 to A23 |
|
||
|
P27/A23/IN3 |
|
This function is enabled when the external bus is enabled. |
|
||
|
|
|
|
|
|
|
|
|
|
IN0 to IN3 |
|
Data sample input pins for input capture ICU0 to ICU3 |
|
|
|
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|
|
|
|
Port 3 |
|
|
|
|
|
|
|
|
|
|
|
P30 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P30/ASX/ |
|
|
|
|
|
|
|
|
|
|
|
|
3 |
|
A |
External address strobe output pin |
|
|
|
IN4 |
ASX |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IN4 |
|
Data sample input pin for input capture ICU4 |
|
|
|
|
|
|
|
|
|
|
|
P31 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P31/RDX/ |
|
|
|
|
|
|
|
|
|
|
|
|
4 |
|
A |
External read strobe output pin |
|
|
|
IN5 |
RDX |
|
|||
|
|
|
This function is enabled when the external bus is enabled. |
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IN5 |
|
Data sample input pin for input capture ICU5 |
|
|
|
|
|
|
|
|
|
|
|
P32 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
P32/WR0X/ |
|
|
External data bus write strobe output pin. Enabled when the |
|
|
|
WR0X |
|
external bus is enabled. |
|
|
|
5 |
RX2/ |
A |
|
||
|
WR0X is used as the data write strobe for 8-bit access and |
|
||||
|
|
INT10R |
|
|
|
|
|
|
|
|
as the upper 8 bits of the data in 16-bit access. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RX2 |
|
CAN2 RX input pin (MB91V280 only) |
|
|
|
|
|
|
|
|
|
|
|
INT10R |
|
External interrupt request 10 input pin (Set by EISSR) |
|
|
|
|
|
|
|
|
|
|
|
P33 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
P33/WR1X/ |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Write strobe output pin for lower 8 bits in external data bus |
|
|
|
6 |
TX2 |
|
A |
|
|
|
WR1X |
Enabled when the external bus is enabled and external bus |
|
|||
|
|
|
|
|
||
|
|
|
|
|
16-bit mode is selected. |
|
|
|
|
|
|
|
|
|
|
|
TX2 |
|
CAN2 TX output pin (MB91V280 only) |
|
|
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
10
MB91270/280 Series
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
P34 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
P34/BRQ/ |
|
T |
External bus request input pin |
|
|
7 |
|
Enabled when the external bus and the bus request func- |
|
||
|
OUT4 |
BRQ |
(A) |
|
||
|
|
tions are enabled. |
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
(MB91V280 only) |
|
|
|
|
|
|
|
|
|
|
|
OUT4 |
|
Waveform output pin for output compare OCU4. |
|
|
|
|
|
|
|
|
|
|
|
P35 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
P35/ |
|
|
External bus acknowledge output pin |
|
|
8 |
BGRNTX/ |
BGRNTX |
A |
Enabled when the external bus and the bus request |
|
|
|
OUT5 |
|
functions are enabled. |
|
|
|
|
|
|
|
||
|
|
|
|
|
(MB91V280 only) |
|
|
|
|
|
|
|
|
|
|
|
OUT5 |
|
Waveform output pin for output compare OCU5. |
|
|
|
|
|
|
|
|
|
|
|
P36 |
|
General-purpose I/O ports. |
|
|
|
|
|
This function is enabled in single-chip mode. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
9 |
P36/RDY/ |
|
T |
External ready input pin |
|
|
OUT6 |
RDY |
Enabled when the external bus and the bus request func- |
|
||
|
|
|
|
|||
|
|
|
|
|
tions are enabled. |
|
|
|
|
|
|
|
|
|
|
|
OUT6 |
|
Waveform output pin for output compare OCU6. |
|
|
|
|
|
|
|
|
|
|
|
P37 |
|
General-purpose I/O ports. |
|
|
|
P37/ |
|
This function is enabled in single-chip mode. |
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
10 |
SYSCLK/ |
SYSCLK |
A |
External clock output pin |
|
|
|
OUT7 |
|
This function is enabled when the external bus is enabled. |
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
OUT7 |
|
Waveform output pin for output compare OCU7. |
|
|
|
|
|
|
|
|
|
|
|
|
|
Port 4 |
|
|
|
|
|
|
|
|
|
|
|
P40, P41 |
A |
General-purpose I/O ports |
|
|
|
P40/ (X0A) , |
(S-suffix models) |
|
||
|
11, 12 |
|
|
|
||
|
P41/ (X1A) |
|
|
|
|
|
|
X0A, X1A |
WA |
sub-clock oscillator input pin |
|
||
|
|
|
||||
|
|
|
WB |
(without S-suffix models) |
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
P42 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
16 |
P42/IN6/ |
IN6 |
A |
Data sample input pin for input capture ICU6 |
|
|
RX1/INT9R |
|
|
|
||
|
RX1 |
CAN1 RX input pin (MB91V280 only) |
|
|||
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
INT9R |
|
External interrupt request 9 input pin (Set by EISSR) |
|
|
|
|
|
|
|
|
|
|
P43/IN7/ |
P43 |
|
General-purpose I/O ports |
|
|
17 |
|
|
|
|
|
|
IN7 |
A |
Data sample input pin for input capture ICU7 |
|
||
|
TX1 |
|
||||
|
|
|
|
|
|
|
|
|
|
TX1 |
|
CAN1 TX output pin (MB91V280 only) |
|
|
|
|
|
|
|
|
|
|
P44/SDA0/ |
P44 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
18 |
SDA0 |
C |
Serial data I/O pin for I2C0 |
|
|
|
FRCK0 |
|
||||
|
|
|
FRCK0 |
|
16-bit input/output timer 0 input pin |
|
|
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
11
MB91270/280 Series
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
P45 |
|
General-purpose I/O ports |
|
|
|
P45/AIN2/ |
|
|
|
|
|
|
SCL0 |
|
Serial clock I/O pin for I2C0 |
|
|
|
19 |
SCL0/ |
|
C |
|
|
|
FRCK1 |
16-bit input/output timer 1 input pin |
|
|||
|
|
FRCK1 |
|
|
||
|
|
|
|
|
|
|
|
|
|
AIN2 |
|
16/8-bit up-count input pin for up down counter 2/3 |
|
|
|
|
|
|
|
|
|
|
P46/BIN2/ |
P46 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
20 |
SDA1 |
C |
Serial clock I/O pin for I2C1 |
|
|
|
SDA1 |
|
||||
|
|
|
BIN2 |
|
16/8-bit down-count input pin for up down counter 2/3 |
|
|
|
|
|
|
|
|
|
|
P47/ZIN2/ |
P47 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
21 |
SCL1 |
C |
Serial clock I/O pin for I2C1 |
|
|
|
SCL1 |
|
||||
|
|
|
ZIN2 |
|
16/8-bit reset input pin for up down counter 2/3 |
|
|
|
|
|
|
|
|
|
|
|
|
|
Port 5 |
|
|
|
|
|
|
|
|
|
|
P50/AN8/ |
P50 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
22 |
AN8 |
D |
Analog input pin of A/D converter |
|
|
|
SIN2 |
|
||||
|
|
|
|
|
|
|
|
|
|
SIN2 |
|
Serial data input pin for LIN-UART2 |
|
|
|
|
|
|
|
|
|
|
P51/AN9/ |
P51 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
23 |
AN9 |
D |
Analog input pin of A/D converter |
|
|
|
SOT2 |
|
||||
|
|
|
|
|
|
|
|
|
|
SOT2 |
|
Serial data output pin for LIN-UART2 |
|
|
|
|
|
|
|
|
|
|
P52/AN10/ |
P52 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
24 |
AN10 |
D |
Analog input pin of A/D converter |
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SCK2 |
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SCK2 |
|
Clock I/O pin for LIN-UART2 |
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P53/AN11/ |
P53 |
|
General-purpose I/O ports |
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25 |
AN11 |
D |
Analog input pin of A/D converter |
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BIN1 |
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BIN1 |
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8-bit down-count input pin for 16-bit up down counter 1 |
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P54/AN12/ |
P54 |
|
General-purpose I/O ports |
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26 |
AN12 |
D |
Analog input pin of A/D converter |
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AIN1 |
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AIN1 |
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8-bit up-count input pin for 16-bit up down counter 1 |
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P55/AN13/ |
P55 |
|
General-purpose I/O ports |
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27 |
AN13 |
D |
Analog input pin of A/D converter |
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ZIN1 |
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ZIN1 |
|
8-bit reset input pin for 16-bit up down counter 1 |
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P56/AN14/ |
P56 |
|
General-purpose I/O ports |
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28 |
DAO0 |
AN14 |
E |
Analog input pin of A/D converter |
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DAO0 |
|
Analog output pin 0 for D/A converter (MB91V280 only) |
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P57/AN15/ |
P57 |
|
General-purpose I/O ports |
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29 |
AN15 |
E |
Analog input pin of A/D converter |
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DAO1 |
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DAO1 |
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Analog output pin 1 for D/A converter (MB91V280 only) |
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* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
12
MB91270/280 Series
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Pin No. |
Pin name |
Function |
I/O circuit |
Function |
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name |
type* |
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Port 6 |
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P60 to P67 |
|
General-purpose I/O ports |
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AN0 to AN7 |
|
Analog input pin of A/D converter |
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P60/AN0/ |
PPG0 |
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PPG0 |
PPG2 |
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34 to 41 |
to |
PPG4 |
D |
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P67/AN7/ |
PPG6 |
|
Output pin for PPG |
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PPGE |
PPG8 |
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PPGA |
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PPGC |
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PPGE |
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Port 7 |
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P70/AN16/ |
P70 to P75 |
|
General-purpose I/O ports |
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INT0 |
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AN16 to |
|
Analog input pin of A/D converter |
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43 to 48 |
to |
D |
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AN21 |
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P75/AN21/ |
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INT0 to INT5 |
|
External interrupt request 0 to 5 input pin |
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INT5 |
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P76 |
|
General-purpose I/O ports |
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53 |
P76/AN22/ |
AN22 |
CA |
Analog input pin of A/D converter |
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INT6/SDA2 |
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INT6 |
External interrupt request 6 input pin |
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SDA2 |
|
Serial clock I/O pin for I2C2 |
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P77 |
|
General-purpose I/O ports |
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54 |
P77/AN23/ |
AN23 |
CA |
Analog input pin of A/D converter |
|
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INT7/SCL2 |
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||
|
INT7 |
External interrupt request 7 input pin |
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SCL2 |
|
Serial clock I/O pin for I2C2 |
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Port 8 |
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P80 |
|
General-purpose I/O ports |
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P80/TIN0/ |
|
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TIN0 |
|
Event input pin for reload timer 0 |
|
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55 |
INT12R/ |
A |
|
||
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|||
|
ADTG |
Trigger input pin for A/D converter |
|
|||
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ADTG |
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||
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INT12R |
|
External interrupt request 12 input pin (Set by EISSR) |
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P81 |
|
General-purpose I/O ports |
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P81/TOT0/ |
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TOT0 |
|
Output pin for reload timer 0 |
|
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56 |
INT13R/ |
A |
|
||
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|||
|
CKOT |
Output pin for clock monitor |
|
|||
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|
CKOT |
|
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||
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INT13R |
|
External interrupt request 13 input pin (Set by EISSR) |
|
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|
P82 |
|
General-purpose I/O ports |
|
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|
57 |
P82/TIN2/ |
SIN0 |
A |
Serial data input pin for LIN-UART0 |
|
|
SIN0/INT14R |
|
|
|
||
|
TIN2 |
Event input pin for reload timer 2 |
|
|||
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|
|||
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INT14R |
|
External interrupt request 14 input pin (Set by EISSR) |
|
|
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
13
MB91270/280 Series
|
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|
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|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
|
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|
||
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|
P83/TOT2/ |
P83 |
|
General-purpose I/O ports |
|
|
|
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|
|
58 |
SOT0 |
A |
Serial data output pin for LIN-UART0 |
|
|
|
SOT0 |
|
||||
|
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|
|
TOT2 |
|
Output pin for reload timer 2 |
|
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|
P84/SCK0/ |
P84 |
|
General-purpose I/O ports |
|
|
|
|
|
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|
|
59 |
SCK0 |
A |
Clock I/O pin for LIN-UART0 |
|
|
|
INT15R |
|
||||
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|
|
INT15R |
|
External interrupt request 15 input pin (Set by EISSR) |
|
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|
60 |
P85/SIN1 |
P85 |
A |
General-purpose I/O ports |
|
|
|
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|
|||
|
SIN1 |
Serial data input pin for LIN-UART1 |
|
|||
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|
||
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|
61 |
P86/SOT1 |
P86 |
A |
General-purpose I/O ports |
|
|
|
|
|
|||
|
SOT1 |
Serial data output pin for LIN-UART1 |
|
|||
|
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|
||
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|
|
62 |
P87/SCK1 |
P87 |
A |
General-purpose I/O ports |
|
|
|
|
|
|||
|
SCK1 |
Clock I/O pin for LIN-UART1 |
|
|||
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|
||
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|
|
Port 9 |
|
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|
|
P90 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
65 |
P90/PPG1/ |
CS0X |
A |
External chip select 0 |
|
|
CS0X |
This function is enabled when the external bus is enabled. |
|
|||
|
|
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|
||
|
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|
|
PPG1 |
|
Output pin for PPG1 |
|
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|
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|
|
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|
|
|
P91 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
|
P91/PPG3/ |
CS1X |
|
External chip select 1 |
|
|
66 |
A |
This function is enabled when the external bus is enabled. |
|
||
|
AIN3/CS1X |
|
|
|||
|
|
|
|
|
|
|
|
|
PPG3 |
|
Output pin for PPG3 |
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
AIN3 |
|
8-bit up-count input pin for up down counter 3 |
|
|
|
|
|
|
|
|
|
|
|
P92 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
|
P92/PPG5/ |
CS2X |
|
External chip select 2 |
|
|
67 |
A |
This function is enabled when the external bus is enabled. |
|
||
|
BIN3/CS2X |
|
|
|||
|
|
|
|
|
|
|
|
|
PPG5 |
|
Output pin for PPG5 |
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
BIN3 |
|
8-bit down-count input pin for up down counter 3 |
|
|
|
|
|
|
|
|
|
|
|
P93 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
|
P93/PPG7/ |
CS3X |
|
External chip select 3 |
|
|
68 |
A |
This function is enabled when the external bus is enabled. |
|
||
|
ZIN3/CS3X |
|
|
|||
|
|
|
|
|
|
|
|
|
PPG7 |
|
Output pin for PPG7 |
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
ZIN3 |
|
8-bit reset input pin for up down counter 3 |
|
|
|
|
|
|
|
|
|
|
P94/OUT0/ |
P94 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
69 |
OUT0 |
A |
Waveform output pin for output compare OCU0 |
|
|
|
AIN0 |
|
||||
|
|
|
|
|
|
|
|
|
|
AIN0 |
|
16/8-bit up-count input pin for up down counter 0/1 |
|
|
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
14
MB91270/280 Series
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
P95/OUT1/ |
P95 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
70 |
OUT1 |
A |
Waveform output pin for output compare OCU1 |
|
|
|
BIN0 |
|
||||
|
|
|
|
|
|
|
|
|
|
BIN0 |
|
16/8-bit down-count input pin for up down counter 0/1 |
|
|
|
|
|
|
|
|
|
|
P96/OUT2/ |
P96 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
71 |
OUT2 |
A |
Waveform output pin for output compare OCU2 |
|
|
|
ZIN0 |
|
||||
|
|
|
|
|
|
|
|
|
|
ZIN0 |
|
16/8-bit reset input pin for up down counter 0/1 |
|
|
|
|
|
|
|
|
|
72 |
P97/OUT3 |
P97 |
A |
General-purpose I/O ports |
|
|
|
|
|
|||
|
OUT3 |
Waveform output pin for output compare OCU3 |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
Port A |
|
|
|
|
|
|
|
|
|
|
PA0/RX0/ |
PA0 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
73 |
RX0 |
A |
RX input pin for CAN0 |
|
|
|
INT8R |
|
||||
|
|
|
|
|
|
|
|
|
|
INT8R |
|
External interrupt request 8 input pin (Set by EISSR) |
|
|
|
|
|
|
|
|
|
74 |
PA1/TX0 |
PA1 |
A |
General-purpose I/O ports |
|
|
|
|
|
|||
|
TX0 |
TX output pin for CAN0 |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
Port B (MB91V280 only) |
|
|
|
|
|
|
|
|
|
|
|
|
PB0 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PB0 |
INT8-2 |
A |
External interrupt request 8 input pin (Set by EPFRB) |
|
|
|
|
|
|
|
|
|
|
|
|
SIN5-2 |
|
Serial data input pin for LIN-UART5 (Set by PFRB) |
|
|
|
|
|
|
|
|
|
|
|
PB1 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PB1 |
INT9-2 |
A |
External interrupt request 9 input pin (Set by EPFRB) |
|
|
|
|
|
|
|
|
|
|
|
|
SOT5-2 |
|
Serial data output pin for LIN-UART5 |
|
|
|
|
|
|
|
|
|
|
|
PB2 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PB2 |
INT10-2 |
A |
External interrupt request 10 input pin (Set by EPFRB) |
|
|
|
|
|
|
|
|
|
|
|
|
SCK5-2 |
|
Clock I/O pin for LIN-UART5 (set by PFRB) |
|
|
|
|
|
|
|
|
|
|
|
PB3 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PB3 |
INT11-2 |
A |
External interrupt request 11 input pin (Set by EPFEB) |
|
|
|
|
|
|
|
|
|
|
|
|
SIN6-2 |
|
Serial data input pin for LIN-UART6 (Set by PFRB) |
|
|
|
|
|
|
|
|
|
|
|
PB4 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PB4 |
INT12-2 |
A |
External interrupt request 12 input pin (Set by EPFRB) |
|
|
|
|
|
|
|
|
|
|
|
|
SOT6-2 |
|
Serial data output pin for LIN-UART6 |
|
|
|
|
|
|
|
|
|
|
|
PB5 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PB5 |
INT13-2 |
A |
External interrupt request 13 input pin (Set by EPFRB) |
|
|
|
|
|
|
|
|
|
|
|
|
SCK6-2 |
|
Clock I/O pin for LIN-UART6 (set by PFRB) |
|
|
|
|
|
|
|
|
|
|
|
|
Port C (MB91V280 only) |
|
|
|
|
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type. |
|||||
|
|
|
|
|
(Continued) |
15
MB91270/280 Series
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
PC0 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PC0 |
OUT4-2 |
A |
Output pin for output compare 4 |
|
|
|
|
|
|
|
|
|
|
|
|
INT0R |
|
External interrupt request 0 input pin (Set by EISSR) |
|
|
|
|
|
|
|
|
|
|
|
PC1 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PC1 |
OUT5-2 |
A |
Output pin for output compare 5 |
|
|
|
|
|
|
|
|
|
|
|
|
INT1R |
|
External interrupt request 1 input pin (Set by EISSR) |
|
|
|
|
|
|
|
|
|
|
|
PC2 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
PC2 |
SIN3-2 |
A |
Serial data input pin for LIN-UART3 (Set by PFRC) |
|
|
|
|
|
|
|
|
|
|
|
|
INT2R |
|
External interrupt request 2 input pin (Set by EISSR) |
|
|
|
|
|
|
|
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PC3 |
|
General-purpose I/O ports |
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|
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PC3 |
SOT3-2 |
A |
Serial data output pin for LIN-UART3 |
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INT3R |
|
External interrupt request 3 input pin (Set by EISSR) |
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PC4 |
|
General-purpose I/O ports |
|
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PC4 |
SCK3-2 |
A |
Clock I/O pin for LIN-UART3 (set by PFRC) |
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INT4R |
|
External interrupt request 4 input pin (Set by EISSR) |
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PC5 |
|
General-purpose I/O ports |
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PC5 |
SIN4-2 |
A |
Serial data input pin for LIN-UART4 (Set by PFRC) |
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INT5R |
|
External interrupt request 5 input pin (Set by EISSR) |
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PC6 |
|
General-purpose I/O ports |
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PC6 |
SOT4-2 |
A |
Serial data output pin for LIN-UART4 |
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INT6R |
|
External interrupt request 6 input pin (Set by EISSR) |
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PC7 |
|
General-purpose I/O ports |
|
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|
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PC7 |
SCK4-2 |
A |
Clock I/O pin for LIN-UART4 (set by PFRC) |
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INT7R |
|
External interrupt request 7 input pin (Set by EISSR) |
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Port D (MB91V280 only) |
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PD0 |
|
General-purpose I/O ports |
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PD0 |
INT16 |
A |
External interrupt request 16 input pin |
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PPG9-2 |
|
Output pin for PPG9 (8) |
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PD1 |
|
General-purpose I/O ports |
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PD1 |
INT17 |
A |
External interrupt request 17 input pin |
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PPGB-2 |
|
Output pin for PPGB (A) |
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PD2 |
|
General-purpose I/O ports |
|
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PD2 |
INT18 |
A |
External interrupt request 18 input pin |
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PPGD-2 |
|
Output pin for PPGD (C) |
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|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
16
MB91270/280 Series
|
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|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
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|||
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||
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PD3 |
|
General-purpose I/O ports |
|
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PD3 |
INT19 |
A |
External interrupt request 19 input pin |
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PPGF-2 |
|
Output pin for PPGF (E) |
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PD4 |
|
General-purpose I/O ports |
|
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PD4 |
INT20 |
A |
External interrupt request 20 input pin |
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IN0-2 |
|
Input pin for input capture ICU0 (set by PFRD) |
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PD5 |
|
General-purpose I/O ports |
|
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PD5 |
INT21 |
A |
External interrupt request 21 input pin |
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IN1-2 |
|
Input pin for input capture ICU1 (set by PFRD) |
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PD6 |
|
General-purpose I/O ports |
|
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PD6 |
INT22 |
A |
External interrupt request 22 input pin |
|
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IN2-2 |
|
Input pin for input capture ICU2 (set by PFRD) |
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PD7 |
|
General-purpose I/O ports |
|
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PD7 |
INT23 |
A |
External interrupt request 23 input pin |
|
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IN3-2 |
|
Input pin for input capture ICU3 (set by PFRD) |
|
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Port E (MB91V280 only) |
|
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PE0 |
|
General-purpose I/O ports |
|
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|
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PE0 |
A00 |
A |
External address bus output pin bit 0 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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INT24 |
|
External interrupt request 24 input pin |
|
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|
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PE1 |
|
General-purpose I/O ports |
|
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|
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PE1 |
A01 |
A |
External address bus output pin bit 1 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
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INT25 |
|
External interrupt request 25 input pin |
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PE2 |
|
General-purpose I/O ports |
|
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|
|
PE2 |
A02 |
A |
External address bus output pin bit 2 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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INT26 |
|
External interrupt request 26 input pin |
|
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PE3 |
|
General-purpose I/O ports |
|
|
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|
|
PE3 |
A03 |
A |
External address bus output pin bit 3 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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INT27 |
|
External interrupt request 27 input pin |
|
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PE4 |
|
General-purpose I/O ports |
|
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|
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PE4 |
A04 |
A |
External address bus output pin bit 4 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
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INT28 |
|
External interrupt request 28 input pin |
|
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|
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|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
17
MB91270/280 Series
|
|
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|
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|
|
|
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
|
name |
type* |
|
|||
|
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||
|
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|
|
PE5 |
|
General-purpose I/O ports |
|
|
|
|
|
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|
|
PE5 |
A05 |
A |
External address bus output pin bit 5 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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INT29 |
|
External interrupt request 29 input pin |
|
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PE6 |
|
General-purpose I/O ports |
|
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|
|
PE6 |
A06 |
A |
External address bus output pin bit 6 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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INT30 |
|
External interrupt request 30 input pin |
|
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PE7 |
|
General-purpose I/O ports |
|
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|
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PE7 |
A07 |
A |
External address bus output pin bit 7 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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INT31 |
|
External interrupt request 31 input pin |
|
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|
|
Port F (MB91V280 only) |
|
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PF0 |
|
General-purpose I/O ports |
|
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|
|
PF0 |
A08 |
A |
External address bus output pin bit 8 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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INT32 |
|
External interrupt request 32 input pin |
|
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|
|
PF1 |
|
General-purpose I/O ports |
|
|
|
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|
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|
|
PF1 |
A09 |
A |
External address bus output pin bit 9 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
|
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|
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|
|
INT33 |
|
External interrupt request 33 input pin |
|
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|
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|
|
|
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|
|
PF2 |
|
General-purpose I/O ports |
|
|
|
|
|
|
|
|
|
|
PF2 |
A10 |
A |
External address bus output pin bit 10 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
|
|
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|
|
INT34 |
|
External interrupt request 34 input pin |
|
|
|
|
|
|
|
|
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|
|
PF3 |
|
General-purpose I/O ports |
|
|
|
|
|
|
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|
|
|
PF3 |
A11 |
A |
External address bus output pin bit 11 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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|
|
INT35 |
|
External interrupt request 35 input pin |
|
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|
|
PF4 |
|
General-purpose I/O ports |
|
|
|
|
|
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|
|
PF4 |
A12 |
A |
External address bus output pin bit 12 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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|
|
INT36 |
|
External interrupt request 36 input pin |
|
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|
|
PF5 |
|
General-purpose I/O ports |
|
|
|
|
|
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|
|
PF5 |
A13 |
A |
External address bus output pin bit 13 |
|
|
This function is enabled when the external bus is enabled. |
|
||||
|
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|
|
INT37 |
|
External interrupt request 37 input pin |
|
|
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
(Continued)
18
MB91270/280 Series
(Continued)
Pin No. |
Pin name |
Function |
I/O circuit |
Function |
|
name |
type* |
||||
|
|
|
|||
|
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|
|
|
PF6 |
|
General-purpose I/O ports |
|
|
|
|
|
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|
|
PF6 |
A14 |
A |
External address bus output pin bit 14 |
|
This function is enabled when the external bus is enabled. |
|||||
|
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|
||
|
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|
|
INT38 |
|
External interrupt request 38 input pin |
|
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|
|
PF7 |
|
General-purpose I/O ports |
|
|
|
|
|
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|
|
PF7 |
A15 |
A |
External address bus output pin bit 15 |
|
This function is enabled when the external bus is enabled. |
|||||
|
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|
||
|
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|
|
INT39 |
|
External interrupt request 39 input pin |
|
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|
|
Port G (MB91V280 only) |
||
|
|
|
|
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|
|
PG0 |
PG0 |
D |
General-purpose I/O ports |
|
|
|
||||
AN24 |
Analog input pin of A/D converter |
||||
|
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|
|||
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|
|
PG1 |
PG1 |
D |
General-purpose I/O ports |
|
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|
||||
AN25 |
Analog input pin of A/D converter |
||||
|
|
|
|||
|
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|
|
PG2 |
PG2 |
D |
General-purpose I/O ports |
|
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|
||||
AN26 |
Analog input pin of A/D converter |
||||
|
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|
|||
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|
|
PG3 |
PG3 |
D |
General-purpose I/O ports |
|
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|
||||
AN27 |
Analog input pin of A/D converter |
||||
|
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|||
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|
|
PG4 |
PG4 |
D |
General-purpose I/O ports |
|
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|
||||
AN28 |
Analog input pin of A/D converter |
||||
|
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|
|||
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|
|
PG5 |
PG5 |
D |
General-purpose I/O ports |
|
|
|
||||
AN29 |
Analog input pin of A/D converter |
||||
|
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|
|||
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|
|
PG6 |
PG6 |
D |
General-purpose I/O ports |
|
|
|
||||
AN30 |
Analog input pin of A/D converter |
||||
|
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|
|||
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|
|
PG7 |
PG7 |
D |
General-purpose I/O ports |
|
|
|
||||
AN31 |
Analog input pin of A/D converter |
||||
|
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|
|||
|
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|
|
Power supply pin |
||
|
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|
|
|
|
13, 63, 88 |
VCC |
|
|
Power supply (5 V) input pin |
|
|
|
|
|
|
|
14, 42, |
VSS |
|
|
Power supply (0 V) input pin |
|
64, 89 |
|||||
|
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|
||
|
|
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|
|
15 |
C |
|
|
Power stabilization capacitance pin |
|
|
|
|
|
|
|
30 |
AVCC |
|
|
Analog power supply input pin |
|
|
|
|
|
|
|
|
|
|
|
Reference voltage input pin for the A/D converter |
|
31 |
AVRH |
Ensure that a voltage greater than AVRH is applied to AVCC |
|||
|
|
|
|
when turning this power supply on or off. |
|
|
|
|
|
|
|
32 |
AVRL |
|
|
Low reference voltage input pin for the A/D converter |
|
|
|
|
|
|
|
33 |
AVSS |
|
|
Analog VSS input pin |
|
|
|
|
|
|
* : See “■ I/O CIRCUIT TYPE” for the I/O circuit type.
19
MB91270/280 Series
Type |
Circuit |
Remarks |
|
|
Pull-up control |
• CMOS level output |
|
|
|
(IOL = 4 mA, IOH = −4 mA) |
||
|
|
|
||
|
|
|
• CMOS hysteresis input |
|
|
|
|
(With function to disconnect |
|
P-ch |
P-ch |
Pout |
input during standby mode. ) |
|
• Automotive input |
||||
|
|
|
||
N-ch |
N-ch |
Nout |
(With function to disconnect |
|
|
|
|
input during standby mode. ) |
|
A |
|
|
• Resistor that can be set |
|
|
|
Pull-down control |
pull-up resistor : Approx. 50 Ω |
|
|
|
|
||
|
|
CMOS hysteresis input |
|
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Automotive input |
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Standby control for |
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disconnect input |
|
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|
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• CMOS level output |
|
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(IOL = 4 mA, IOH = −4 mA) |
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• CMOS hysteresis input |
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P-ch |
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Pout |
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Nout |
(With function to disconnect |
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N-ch |
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input during standby mode. ) |
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B |
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• Automotive input |
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CMOS hysteresis input |
(With function to disconnect |
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input during standby mode. ) |
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Automotive input |
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Standby control for |
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disconnect input |
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• CMOS level output |
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(IOL = 3 mA, IOH = −3 mA) |
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• CMOS hysteresis input |
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P-ch |
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Pout |
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Nout |
(With function to disconnect |
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N-ch |
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input during standby mode. ) |
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C |
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• Automotive input |
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CMOS hysteresis input |
(With function to disconnect |
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input during standby mode. ) |
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Automotive input
Standby control for disconnect input
(Continued)
20
MB91270/280 Series
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Type |
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Circuit |
Remarks |
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• CMOS level output |
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(IOL = 3 mA, IOH = −3 mA) |
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Pout |
• CMOS hysteresis input |
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P-ch |
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Nout |
(With function to disconnect |
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N-ch |
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input during standby mode. ) |
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• Automotive input |
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CMOS hysteresis input |
(With function to disconnect |
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CA |
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input during standby mode. ) |
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Automotive input |
• A/D analog input |
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Standby control for |
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disconnect input |
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Analog input |
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Pull-up control |
• CMOS level output |
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(IOL = 4 mA, IOH = −4 mA) |
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• CMOS hysteresis input |
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(With function to disconnect |
P-ch |
P-ch |
Pout |
input during standby mode. ) |
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• Automotive input |
N-ch |
N-ch |
Nout |
(With function to disconnect |
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input during standby mode. ) |
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• Resistor that can be set |
D |
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Pull-down control |
pull-up resistor : Approx. 50 Ω |
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• A/D analog input |
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CMOS hysteresis input |
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Automotive input |
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Standby control for |
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disconnect input |
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Analog input |
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(Continued) |
21
MB91270/280 Series
Type |
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Circuit |
Remarks |
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• CMOS level output |
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P-ch |
Pout |
(IOL = 4 mA, IOH = −4 mA) |
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• CMOS hysteresis input |
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N-ch |
Nout |
(With function to disconnect |
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input during standby mode. ) |
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• Automotive input |
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CMOS hysteresis input |
(With function to disconnect |
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input during standby mode. ) |
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E |
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Automotive input |
• A/D analog input |
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• D/A analog output |
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Standby control for |
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disconnect input |
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Analog input |
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Analog output |
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CMOS hysteresis input |
J |
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CMOS hysteresis input |
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• CMOS hysteresis input |
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• Pull-up resistor value : |
Pull-up resistor |
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Approx. 50 kΩ |
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N |
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CMOS hysteresis input |
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Pull-up control |
• CMOS level output |
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(IOL = 4 mA, IOH = −4 mA) |
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• CMOS hysteresis input |
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(With function to disconnect |
P-ch |
P-ch |
Pout |
input during standby mode. ) |
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• Automotive input |
N-ch |
N-ch |
Nout |
(With function to disconnect |
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input during standby mode. ) |
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• TTL |
T |
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Pull-down control |
(With function to disconnect |
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input during standby mode. ) |
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CMOS hysteresis input |
• Resistor that can be set |
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pull-up resistor : Approx. 50 kΩ |
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Automotive input |
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TTL input
Standby control for disconnect input
(Continued)
22
MB91270/280 Series
(Continued) |
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Type |
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Circuit |
Remarks |
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Oscillation circuit |
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X1 |
Xout |
High speed oscillation feed- |
OA |
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back resistance = |
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Approx. 1 MΩ |
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OB |
X0 |
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Standby control signal |
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Oscillation circuit |
X1A |
Xout |
Low speed oscillation feed- |
WA |
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back |
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resistance = Approx. 10 MΩ |
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WB X0A |
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Standby control signal |
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23
MB91270/280 Series
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Input |
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Output Driv- |
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Type |
Pull Up/Down |
CMOS (C) |
Input Stop |
Analog Line |
Remarks |
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CMOS Schmitt (CS) |
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er |
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(50 kΩ) |
Automotive (A) |
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A |
Up/Down switch |
CS/A switch |
Stop |
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4 mA |
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B |
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CS/A switch |
Stop |
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4 mA |
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C* |
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CS/A switch |
Stop |
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3 mA |
I2C |
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CA* |
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CS/A switch |
Stop |
Input |
3 mA |
I2C + ADC |
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D |
Up/Down switch |
CS/A switch |
Stop |
Input |
4 mA |
ADC |
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E |
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CS/A switch |
Stop |
I/O |
4 mA |
ADC + DAC |
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J |
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C |
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MD[2 : 0] |
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N |
Up |
CS (initx) |
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INITX |
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T |
Up/Down switch |
CS/A/TTL switch |
Stop |
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4 mA |
Has TTL |
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input |
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OA |
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Stop |
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4 MHz |
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OB |
Oscillator |
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WA |
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Stop |
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32 kHz |
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WB |
Oscillator |
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* : When the C and CA ports are set for use as an I2C interface, the outputs are Nch open drain outputs. Otherwise, functions as a CMOS output.
Form |
Type |
VIL |
VIH |
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C |
CMOS input |
VSS + 0.3 V |
VCC − 0.3 V |
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CS (initx) |
CMOS Schmitt trigger input (for INITX pin) |
0.2 VCC |
0.8 VCC |
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CS |
CMOS Schmitt trigger input |
0.3 VCC |
0.7 VCC |
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A |
CMOS automotive Schmitt trigger input |
0.5 VCC |
0.8 VCC |
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T |
TTL input |
0.8 V |
2.1 V |
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24
MB91270/280 Series
• Preventing Latch-up
Latch-up may occur in a CMOS IC if a voltage greater than VCC or less than VSS is applied to an input or output pin or if an above-rating voltage is applied between VCC pin and VSS pin. A latch-up, if it occurs, significantly increases the power supply current and may cause thermal destruction of an element. When you use a CMOS IC, do not exceed the maximum rating.
• Treatment of Unused Pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, for example, using a pullup or pull-down resistor.
• About Power Supply Pins
In products with multiple VCC or VSS pins, the pins of the same potential are internally connected in the device to avoid abnormal operations including latch-up. However, you must connect the pins to external power supply and a ground line to lower the electro-magnetic emission level, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating.
Moreover, connect the current supply source with the VCC and VSS pins of this device at the low impedance.
It is also advisable to connect a ceramic bypass capacitor of approximately 0.1 F between VCC and VSS near this device.
• About Crystal Oscillator Circuit
Noise near the X0, X1, X0A and X1A pins may cause the device to malfunction. Design the printed circuit board so that X0, X1, X0A and X1A the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible.
It is strongly recommended to design the PC board artwork with the X0, X1, X0A and X1A pins surrounded by ground plane because stable operation can be expected with such a layout.
Please ask the crystal maker to evaluate the oscillational characteristics of the crystal and this device.
• Notes on Using External Clock
When external clock is selected, supply it to X0 pin generally, and simultaneously the opposite phase clock to X0 must be supplied to X1 pin. However, in this case the stop mode (oscillation stop mode) must not be used. (This is because the X1 pin stops at High level output in STOP mode.)
Using an external clock (normal)
X0
X1
Note : The STOP mode (oscillation stop mode) cannot be used.
• Notes when using no sub-clock
Use a single-clock model if not using the sub-clock.
25
MB91270/280 Series
Always connect a resonator of 100 kHz or less on dual clock models.
• Treatment of N.C. or OPEN pins
Pins marked as N.C. and OPEN must be left open - circuit.
• About Mode pins (MD0 to MD2)
These pins should be connected directly to VCC or VSS. To prevent the device erroneously switching to test mode due to noise, design the printed circuit board such that the distance between the mode pins and VCC or VSS is as short as possible and the connection impedance is low.
• Operation at start-up
The INITX pin must be held at the “L”level when turning on the power.
• Source oscillation input at power on
When turning the power on, maintain clock input until the device is released from the oscillation stabilization wait state.
• Caution on Operations during PLL Clock Mode
Even if the oscillator comes off or the clock input stops with the PLL clock selected for this microcontroller, the microcontroller may continue to operate at the free-running frequency of the PLL’s internal self-oscillating oscillator circuit.
Performance of this operation, however, cannot be guaranteed.
• External bus setting
This device is guaranteed for use with a 16 MHz external bus.
If the base clock is set to 32 MHz with DIVR1 (external bus base clock division setting register) set to its initial value, the external bus also operates at 32 MHz. When changing the base clock, first set the external bus so that it will not exceed 16 MHz.
• Pull-up control
The AC characteristics cannot be guaranteed if pull-up resistors are used for pins used as external bus pins.
26