Apple A1278 Schematic RevA

TABLE_TABLEOFCONTENTS_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

APPLE INC.

6

DESIGNER

DESCRIPTION OF CHANGE

REV.

A

D

C

B

A

D

C

B

8 7

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

TITLE

DRAWING NUMBER

SHT

OF

METRIC

DRAFTER

ENG APPD

QA APPD

RELEASE

DESIGN CK

MFG APPD

SCALE

NONE

MATERIAL/FINISH

NOTED AS

APPLICABLE

SIZE

D

THIRD ANGLE PROJECTION

DIMENSIONS ARE IN MILLIMETERS

XX

X.XX

X.XXX

DO NOT SCALE DRAWING

REV

ZONE

ECN

CK APPD

DATE

ENG APPD

DATE

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

ANGLES

TABLE_TABLEOFCONTENTS_ITEM

REFERENCED FROM T18

M97 MLB SCHEMATIC

08/27/2008

PVT BUILD

Schematic / PCB #’s

SUMA

ETHERNET CONNECTOR

39

35

04/04/2008

SUMA

Ethernet & AirPort Support

38

34

07/01/2008

SUMA

Ethernet PHY (RTL8211CL)

37

33

05/23/2008

YITE

VENICE CONNECTOR

35

32

03/13/2008

YITE

Right Clutch Connector

34

31

04/22/2008

T18_MLB

DDR3 Support

33

30

04/04/2008

BEN

DDR3 SO-DIMM Connector B

32

29

05/09/2008

BEN

DDR3 SO-DIMM Connector A

31

28

06/30/2008

BEN

FSB/DDR3 Vref Margining

29

27

03/31/2008

RAYMOND

SB Misc

28

26

04/05/2008

T18_MLB

MCP Graphics Support

26

25

12/12/2007

T18_MLB

MCP Standard Decoupling

25

24

04/04/2008

T18_MLB

MCP79 A01 Silicon Support

24

23

03/08/2008

T18_MLB

MCP Power & Ground

22

04/04/2008

T18_MLB

MCP HDA & MISC

21

06/26/2008

T18_MLB

MCP SATA & USB

20

04/04/2008

T18_MLB

MCP PCI & LPC

19

04/04/2008

T18_MLB

MCP Ethernet & Graphics

18

04/04/2008

T18_MLB

MCP PCIe Interfaces

17

04/04/2008

T18_MLB

MCP Memory Misc

16

04/04/2008

T18_MLB

MCP Memory Interface

15

04/04/2008

T18_MLB

MCP CPU Interface

14

04/04/2008

T18_MLB

eXtended Debug Port (XDP)

13

12/12/2007

RAYMOND

CPU Decoupling

12

03/31/2008

T18_MLB

CPU Power & Ground

11

12/12/2007

T18_MLB

CPU FSB

10

12/12/2007

M97_MLB

SIGNAL ALIAS

9

BEN

Power Aliases

8

04/21/2008

M97_MLB

FUNC TEST

7

BEN

JTAG Scan Chain

6

04/04/2008

M97_MLB

Revision History

5

M97_MLB

BOM Configuration

4

DRAGON

Power Block Diagram

3

03/13/2008

T18_MLB

System Block Diagram

2

12/12/2007

LCD Backlight Support

70

YITE

06/30/2008

98

LCD BACKLIGHT DRIVER

69

YITE

08/12/2008

97

DisplayPort Connector

68

AMASON

06/30/2008

94

DISPLAYPORT SUPPORT

67

AMASON

04/18/2008

93

LVDS CONNECTOR

66

NMARTIN

04/04/2008

90

POWER FETS

65

YUAN.MA

04/04/2008

79

POWER SEQUENCING

64

YUAN.MA

04/22/2008

78

MISC POWER SUPPLIES

63

RAYMOND

01/23/2008

77

CPU VTT(1.05V) SUPPLY

62

RAYMOND

02/08/2008

76

MCP VCORE REGULATOR

61

RAYMOND

01/31/2008

75

IMVP6 CPU VCore Regulator

60

RAYMOND

01/31/2008

74

1.5V/0.75V DDR3 SUPPLY

59

RAYMOND

01/31/2008

73

5V/3.3V SUPPLY

58

RAYMOND

02/08/2008

72

PBUS Supply/Battery Charger

57

RAYMOND

01/31/2008

70

DC-In & Battery Connectors

56

JACK

03/13/2008

69

AUDIO: JACK TRANSLATORS

55

AUDIO

07/01/2008

68

AUDIO: JACK

54

AUDIO

07/01/2008

67

AUDI0: SPEAKER AMP

53

AUDIO

07/01/2008

66

AUDI0: MIKEY

52

AUDIO

07/03/2008

63

AUDIO: CODEC

51

AUDIO

07/01/2008

62

SPI ROM50

CHANGZHANG

05/02/2008

61

SMS49

YUNWU

06/26/2008

59

WELLSPRING 2

48

YUAN.MA

05/09/2008

58

WELLSPRING 1

47

YUAN.MA

04/22/2008

57

Fan46

CHANGZHANG

01/18/2008

56

Thermal Sensors

45

YUNWU

03/20/2008

55

Current Sensing

44

YUNWU

04/07/2008

54

VOLTAGE SENSING

43

YUNWU

02/04/2008

53

M97 SMBUS CONNECTIONS

42

BEN

04/21/2008

52

LPC+SPI Debug Connector

41

CHANGZHANG

05/09/2008

51

SMC Support

40

YUAN.MA

05/28/2008

50

SMC39

T18_MLB

06/26/2008

49

Front Flex Support

38

YUAN.MA

05/28/2008

48

External USB Connectors

37

YUAN.MA

01/18/2008

46

109

M97_MLB

78

M97 RULE DEFINITIONS

107

M97_MLB

77

M97 SPECIAL CONSTRAINTS

106

01/04/2008

T18_MLB

76

SMC Constraints

104

03/19/2008

T18_MLB

75

Ethernet Constraints

103

12/14/2007

T18_MLB

74

MCP Constraints 2

102

01/04/2008

T18_MLB

73

MCP Constraints 1

101

01/04/2008

T18_MLB

72

Memory Constraints

100

01/04/2008

T18_MLB

71

CPU/FSB Constraints

Page

Contents

Date

(.csa)

Sync

SATA Connectors

36

CHANGZHANG

04/14/2008

45

Page

Contents

Date

(.csa)

Sync

051-7537

SCH1

CRITICAL

SCHEM,MLB,M97

T17_MLB

Table of Contents

1

08/22/2007

CRITICAL

PCB1

820-2327 PCBF,MLB,M97

Page

Date

(.csa)

Sync

Contents

109

625211

PRODUCTION RELEASED

A

?

08/29/08

1

051-7537

SCHEM,MLB,M97

A

Preliminary

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

J9400

DISPLAY PORT

J9000

CONN

LVDS

PG 71

CONN

PG 71

Conn

J4520

PG 17

(UP TO 12 DEVICES)

4

TMDS OUT

Line Out

2

CTRL

IR

J4710

CLK

SATA

(UP TO FOUR PORTS)

Conns

J6800,6801,6802,6803

PG 41

MCP79

PG 19

PCI

PG 19

LPC

3 8 9

PG 40

SATA

U6301 U6500U6400

PG 59

PG 56PG 55

HEADPHONE

Audio

Codec

FSB

64-Bit

2 UDIMMs

XDP CONN

POWER SUPPLY

PG 28

J3400 U3900

PG 33

Conn

88E1116

PG 31

GB

E-NET

Amp

Speaker

Amps

PG 54

PG 53

U6200

J4720

PG 57

J4710

U4900

J6950

PG 12

U1000

U1300

J4510

U6600,6605,6610,6620

PG 40

J4700

PG 40

HD

E-NET

ODD

Conn

SYNTH

PG 39

U6100

J3900,4635,4655

EXTERNAL

USB

PG 40

KEYBOARD

TRACKPAD/

USB

PG 45

POWER SENSE

J5650,5600,5610,5611,5660,5720,5730,5750

PG 48,49

J4900

DC/BATT

PENRYN

2.X OR 3.X GHZ

INTEL CPU

SPI

PG 20

PG 18

MEMORY

MAIN

800/1067/1333 MHz

DDR2-800MHZ DDR3-1067/1333MHZ

J2900

DIMM

PG 25,26

SPI

TEMP SENSOR

FAN CONN AND CONTROL

J5100

PG 43

Ser

FanADC

SMC

B,0

Prt

BSB

PWR

Misc

PG 14

Port80,serial

LPC Conn

GPIOs

SATA

1.05V/3GHZ.

RGB OUT

PG 38

PG 13

FSB INTERFACE

PG 24

SMB

PG 20

HDA

NVIDIA

PG 41

CAMERA

Connectors

PG 44

CONN

SMB

DIMM’s

10 5 6 7

Bluetooth

PG 52

Boot ROM

U1400

DVI OUT

PCI-E

PG 16

UP TO 20 LANES3

PG 17

LVDS OUT

DP OUT

HDMI OUT

RGMII

PG 18

AirPort

Mini PCI-E

U3700

Line In

Amp Amp

PG 60

PG 9

SYNC_MASTER=T18_MLB

051-7537

109

2

A

SYNC_DATE=12/12/2007

System Block Diagram

Preliminary

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

CPU_RESET#

FSB_CPURST_L

MCP_PS_PWRGD

29

CPUPWRGD(GPIO49)

PS_PWRGD

RSMRST*

CHGR_EN

M97 POWER SYSTEM ARCHITECTURE

(44A MAX CURRENT)

PP1V05_S0_FET

PP1V05_S5_REG

U7760

V

PPVBAT_G3H_CHGR_OUT

PP1V2_ENET_REG

(0.8A MAX CURRENT)

S5 S3

TPS51116

ADAPTER

SMC_PM_G2_EN

PPCPUVTT_S0

LPC_RESET_L

RSMRST_OUT(P15)

IMVP_VR_ON(P16)

RSMRST_IN(P13)

PLT_RST*

PWR_BUTTON(P90)

P17(BTN_OUT)

RST*

PP1V05_S0

PP3V3_S0

19-1

S0PGOOD_PWROK

SLP_S3_L(P93)

U4900

MCPCORESO_PGOOD

P5V3V3_PGOOD

RSMRST_PWRGD

1.05V (S5)

IMVP_VR_ON

U5480

28

P5V3V3_PGOOD

P3V3ENET_EN_L

PP1V5_S0

TPS79918DRV

PP1V8_S0_REG

SLP_S4_L(P94)

PM_RSMRST_L

U1400

04

U5000

RN5VD30A-F

SMC PWRGD

4.6V AUDIO MAX8902A

U6201

VOUT

EN

VIN

PPVIN_G3H_P3V42G3H

3.425V G3HOT LT3470

PP4V6_AUDIO_ANALOG

U1000

SLP_S3_L

ALL_SYS_PWRGD

25

SMC

PPVOUT_ENET_AVDD_REG

(1.9V)

1.2V YUKON

PP1V5_S0_FET

U7200

PPVOUT_S0_LCDBKLT

PP3V3_S0_FET

13

SMC_CPU_ISENSE

VOUT

25

02

VIN

EN1

PPVBAT_G3H_CHGR_REG

U5403

SMC_BATT_ISENSE

BATTERY CHARGER

P5VRTS0_EN_L

PBUS SUPPLY/

U7970

32

PWRGOOD

U2850

CPU

30

31

06-1

17

16-3

03

PP3V42_G3H_REG

16-2

10

05

09

24

18

16-2

MCP_CORE

PPVCORE_S0_MCP_REG_R

(1A MAX CURRENT)

07

PP5VRT_S0

08

VOUT

12

20

21

02

14

11-2

02

04

P60

(S5)

SMC_PM_G2_EN

16

SMC_ADAPTER_EN

04-1

=DDTVTT_EN

16-1

16-2

16-4

16-3

16-2

15

15-1

15

11-2

11-3

DELAY

RC

11-1

11

MCP79

A

SMC_DCIN_ISENSE

BATT_POS_F

3S2P

05

06

Q7800

P3V3S5_EN_L

P16

PPBUS_G3H

ENETADD_EN

Q7050

P1V05_S5_EN

3.3V

TPS51125

26

22

06

02

23

V

PPCPUVTT_S0_REG_R

(8A MAX CURRENT)

(1.05V)

CPUVTTS0_EN

PPBUS_G3H

D6905

02

Q5315

01

ENABLES

02

PWRBTN*

PLTRST*

R5492

PP1V5_S0

R5491

(12A MAX CURRENT)

(Q7901 & Q7971)

S3 TO S0

FETS

PPVCORE_S0_MCP

R5490

PP0V75_S0_REG

PP1V5_S3_REG

U4900

PP5VLT_S3_REG

(25A MAX CURRENT)

PP5VLT_S3

(7A MAX CURRENT)

PPVCORE_CPU_S0_REG

PP5VRT_S0_REG

P1V05S0_EN

P5V_LT_S3_PGOOD

CPUVTTS0_PGOOD

P1V05S0_EN

P5VRTS0_EN_L

BKLT_EN

CHGR_BGATE

SMC

V3

WOL_EN

VR_PWRGOOD_DELAY

PM_SLP_S3_L

DELAY

RC

(S0)

P3V3S0_EN

PBUSVSENS_EN

MCPCORES0_EN

CPUVTTS0_EN

MCPDDR_EN

P1V8S0_EN

CPUVTTS0_PGOOD

(S0)

DCIN(16.5V)

1.8V LDO

P3V3_ENET_FET

MCPCORES0_EN

VOUT1

EN1

EN2

VIN

SMC_CPU_VSENSE

A

CPU_PWRGD

VIN

ENABLE

7A FUSE

SMC_ONOFF_L

SLP_S5_L SLP_S4_L

SLP_S5_L(P95)

PWRGD(P12)

IMVP_VR_ON

SMC_RESET_L

VREG3

PGOOD1,2

VIN

RESET*

VOUT2

PM_PWRBTN_L

99ms DLY

IN

AC

(S5)

A

V1 V2

MCP79

DELAY

PP3V3_S5

PP3V3_S3_FET

CURRENT)

PP3V3_S5_REG

D6905

P5VLTS3_EN

VOUT2

=DDRREG_EN

(0.8A MAX CURRENT)

P1V2ENET_EN

PBUS_VSENSE

(4A MAX CURRENT)

P3V3S3_EN

P3V3S0_EN

P3V3S3_EN

DDRREG_EN

P5VLTS3_EN

DELAY

RC

(4A MAX

VOUT

1.05V SO

FETS

(Q7951 TO Q7953)

TPS62510

U7750

CPU VCORE

ISL9504B

VR_ON

U7400

PGOOD

5V

(RT)

VOUT1

VOUT2

EN2

GOSHAWK6P

VIN

U9701

ENA

VOUT

U3850

VOUT1

RUN1

DELAY

RC

LTC34074

RUN2

Q7930

Q7910

Q3810

RST*

VIN

PM_ENET_EN_L

PM_SLP_S3_L

Q3802

Q3801

U6990

VOUT

EN_PSV

VOUT

CPUVTT

TPS51117

U7600

PGOOD

VIN

ISL6258A

U7000

U7870

5V (LT)

ISL6236

U7500

U7300

VOUT2

0.75V

1.5V

VOUT1

VIN

J6950

(9 TO 12.6V)

6A FUSE

PM_SLP_S4_L

SLP_S3#

U1400

PCI_RESET0#

LTC2909

3

A

Power Block Diagram

109

051-7537

SYNC_MASTER=DRAGON

SYNC_DATE=03/13/2008

Preliminary

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

BOM Variants

Programmable Parts

Bar Code Labels / EEE #’s

Alternate Parts

M97 BOARD STACK-UP

SIGNAL(High Speed)

POWER

SIGNAL

GROUND

SIGNAL(High Speed)

GROUND

SIGNAL

SIGNAL(High Speed)

POWER

GROUND

7

6

5

4

3

2

Top

BOTTOM

9

8

11

10

GROUND

BOM Groups

Module Parts

BOM Configuration

4

051-7537

A

109

SYNC_MASTER=M97_MLB

PDC,SL3BU,PRQ,2.26,25W,1066,C0,3M,BGA

337S3653 CRITICAL

1

U1000

CPU_2_26GHZ

PDC,SLG8E,PRQ,2.0,25W,1066,M0,3M,BGA

U1000 CPU_2_0GHZ

CRITICAL

1

337S3646

PDC,QDYJ,QS,2.4,25W,1066,M0,3M,BGA

337S3625 CRITICAL

1

U1000

CPU_2_4GHZ_QS

PDC,QJGL,QS,2.0,25W,1066,M0,3M,BGA

U1000

CPU_2_0GHZ_QS

CRITICAL

1

337S3622

SMC_DEBUG_YES,XDP,LPCPLUS,NO_VREFMRGN

M97_DEBUG_PVT

M97_DEBUG_ENG

SMC_DEBUG_YES,XDP,XDP_CONN,LPCPLUS,VREFMRGN,TPAD_DEBUG

SMC_DEBUG_YES,XDP,LPCPLUS_NOT,NO_VREFMRGN

M97_DEBUG_PROD

338S0540

IC,GMCP,MCP79,35X35MM,BGA1437,A01

U1400

CRITICAL

MCP_A01

1

338S0603

IC,GMCP,MCP79,35X35MM,BGA1437,A01Q

CRITICAL

U1400

1

MCP_A01Q

338S0600

IC,GMCP,MCP79,35X35MM,BGA1437,B01

CRITICAL

U1400

1

MCP_B01

PDC,SLB4N,PRQ,2.4,25W,1066,M0,3M,BGA

337S3639

U1000 CPU_2_4GHZ

CRITICAL

1

BOOTROM_BLANK

CRITICAL

U6100

IC,FLASH,SPI,32MBIT,3.3V,86MHZ,8-SOP

1

335S0610

IC,PRGRM,EFI BOOTROM,UNLOCK,M97

341S2285

1

BOOTROM_PROG

CRITICAL

U6100

630-9554

PCBA,MLB,BETTER,M97

M97_COMMON,CPU_2_0GHZ,EEE_2KA

PCBA,MLB,BEST,M97

630-9314

M97_COMMON,CPU_2_4GHZ,EEE_1DJ

MCP_B02,MCP_PROD,MEMRESET_HW,MEMRESET_MCP,BOOT_MODE_USER,MCPSEQ_SMC,MCP_CS1_NO

M97_MCP

ALL

128S0218128S0093

KEMET AS ALTERNATE

ALL

104S0018 104S0023

DALE/VISHAY AS ALTERNATE

DELTA AS ALTERNATE

157S0058

ALL

157S0055

ALL

152S0796 152S0685

CYNTEC AS ALTERNATE

IC,WELLSPRING CONTROLLER,M97

1

WELLSPRING_PROG

CRITICAL

U5701

341S2348

ALL

MAGLAYERS AS ALTERNATE

152S0516152S0874

152S0586152S0847

ALL

MAGLAYERS AS ALTERNATE

FOXLINK AS ALTERNATE

514-0607514-0612

ALL

514-0608514-0613

ALL

FOXLINK AS ALTERNATE

1

341S2287 CRITICAL SMC_PROG

U4900

IC,SMC,M97

152S0693

ALL

CYNTEC AS ALTERNATE

152S0778

IC,PSOC+ W/ USB,56 PIN,MLF,CY8C24794

337S2983

U5701

1

CRITICAL

WELLSPRING_BLANK

IC,RTL8211CL,GIGE TRANSCEIVER,48P,TQFP

CRITICAL

U3700

338S0570

1

338S0635

IC,GMCP,MCP79,35X35MM,BGA1437,B02

1

U1400

CRITICAL

MCP_B02

ONEWIRE_PU,BKLT_PLL_NOT,DP_ESD,ENG_BMON,MIKEY

M97_MISC

PDC,QDYD,QS,2.26,25W,1066,M0,3M,BGA

1

U1000

337S3624 CRITICAL

CPU_2_26GHZ_QS

826-4393

1

CRITICAL

[EEE:2KA]

EEE_2KA

LBL,P/N LABEL,PCB,28MM X 6 MM

826-4393

1

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEE:1DJ]

CRITICAL

EEE_1DJ

IC,CY7C63833,ENCORE II,USB CONTROLLER

1

CRITICAL IR_BLANK

U4800

338S0375

IC,IR CONTROLLER,M97

IR_PROG

CRITICAL

U4800

341S2093

1

826-4393

1

LBL,P/N LABEL,PCB,28MM X 6 MM

CRITICAL

[EEE:2K9]

EEE_2K9

ALL

152S0694 152S0138

MAGLAYERS AS ALTERNATE

338S0591

IC,GMCP,MCP79,35X35MM,BGA1437,A01P

U1400

MCP_A01P

1

CRITICAL

338S0563

IC,SMC,HS8/2117,9X9MM,TLP,HF

1

SMC_BLANK

U4900

CRITICAL

COMMON,ALTERNATE,M97_MCP,M97_MISC,M97_DEBUG_PVT,M97_PROGPARTS

M97_COMMON

M97_PROGPARTS

BOOTROM_PROG,SMC_PROG,IR_PROG,WELLSPRING_PROG

Preliminary

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

NOTE: All page numbers are .csa, not PDF. See page 1 for .csa -> PDF mapping.

Revision History

5

109

051-7537

A

SYNC_MASTER=M97_MLB

Preliminary

IN

B1

OE*

VCCB

B2 B3 B4

GND

A4

A3

A2

A1

VCCA

OUT

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

and/or level translator

To XDP connector

U1000

CPU

From XDP connector

or via level translator

From XDP connector

XDP connector

1.05V TO 3.3V LEVEL TRANSLATOR (M97: ON ICT FIXTURE)

XDP connector

U1400

MCP

6C7

10A6 10C6 13B3 71A3

NLSV4T244

JTAG_ALLDEV

U0600

10

7

8

9

1

12

6

5

4

3

2

UQFN

11

JTAG_ALLDEV

C0601

1

0.1UF

20%

2

CERM 402

10V

JTAG_ALLDEV

2

402

1

C0602

CERM

10V

20%

0.1UF

402

5%

MF-LF

1/16W

0

R0603

XDP

13B3

2

1

R0602

0

1/16W

5%

MF-LF

402

NOSTUFF

JTAG_ALLDEV

5%

10K

1/16W MF-LF

R0601

1

2

402

13C3

402

5%

MF-LF

1/16W

0

R0604

XDP

6C7

10B6 10C6 13B3 71A3

6C7

10A6 10C6 13B6 71A3

JTAG Scan Chain

SYNC_DATE=04/04/2008

SYNC_MASTER=BEN

6

109

A

051-7537

JTAG_MCP_TDO

JTAG_MCP_TDO_CONN

JTAG_MCP_TRST_L

JTAG_MCP_TMS

JTAG_MCP_TCK

XDP_TDO

XDP_TDO_CONN

JTAG_MCP_TDI

XDP_TMS

XDP_TRST_L

XDP_TMS

XDP_TCK XDP_TDI

=PP3V3_S0_XDP

XDP_TRST_L

XDP_TCK

=PP1V05_S0_CPU

JTAG_LVL_TRANS_EN_L

71A3

13D6

13B3

13B6

12B6

23C5

71A3

23C5

10C6

11C6

21B7

10C6

21B7

10B6

13D6

10A6

10D5

21B7 13C3

13C3

13B6

10B6

13C3

6C6

8C5

6C6

8D7

Preliminary

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

(NEED 4 TP)

RIGHT CLUTCH CONN

IPD_FLEX_CONN

DEBUG VOLTAGE

(NEED TO ADD 4 GND TP)

(NEED TO ADD 3 GND TP)

KBD BACKLIGHT CONN

(NEED TO ADD 2 GND TP)

KEYBOARD CONN

(NEED TO ADD 1 GND TP)

SATA HDD CONN

SPEAKER FUNC_TEST

(NEED TO ADD 2 GND TP)

(NEED 3 TP)

FRONT FLEX CONN

(NEED 3 TP)

SATA ODD CONN

THERMAL FUNC_TEST

(NEED 3 TP)

Functional Test Points

MIC FUNC_TEST

Fan Connectors

(NEED TO ADD 3 GND TP)

LVDS FUNC_TEST

(NEED TO ADD 5 GND TP)

(NEED 4 TP)

(NEED TO ADD 4 GND TP)

DC POWER CONN

BATT POWER CONN

BATT SIGNAL CONN

(NEED TO ADD 4 GND TP)

(NEED TO ADD 3 GND TP)

I12 I15 I16

I226

I227

I228

I229

I230

I231

I232 I233

I237

I238

I239

I245

I246 I247

I248

I249

I250

I251

I252

I253 I254

I255

I256 I257

I258

I259

I260

I261

I262

I264

I265

I266

I267

I268

I269

I270

I271

I272

I273 I274

I275

I276

I278

I279

I280

I281 I282

I283

I284

I285

I286

I287

I288

I289

I290

I291

I292

I293

I294

I295

I296

I297

I298

I299

I300

I301 I302

I303

I304

I305

I306

I307

I308

I309

I310 I311

I312

I313

I314

I315

I316

I317

I318

I319

I320

I321

I322

I323 I324

I325

I326

I327

I328 I329

I330 I331

I332

I333

I334

I335

I336

I337

I338

I339

I340

I341

I342

I343

I344 I345

I346

I347

I348

I349

I350

I351

I352

I353

I354 I355

I356

I357

I358

I359

I360

I361

I362

I363

I364

I365

I366

I367

I368

I369

I370 I371

I372

I373

I374

I375

I376

I377

I378

I379

I380

I381

I382

I383

I384

I385

I386

I387

I388

I389

I390

I391

I392

I393

7

A

109

051-7537

SYNC_MASTER=M97_MLB

FUNC TEST

SMC_BS_ALRT_L

TRUE

SMBUS_SMC_BSA_SCL

TRUE

SMBUS_SMC_BSA_SCL

TRUE

GND_BATT_CONN

TRUE

PP18V5_DCIN_FUSE

TRUE

SATA_ODD_R2D_N

TRUE

SATA_ODD_R2D_P

TRUE

SATA_ODD_D2R_C_N

TRUE

ADAPTER_SENSE

TRUE

SATA_ODD_D2R_C_P

TRUE

LED_RETURN_6

TRUE

LED_RETURN_5

TRUE

LED_RETURN_4

TRUE

LED_RETURN_3

TRUE

LED_RETURN_1

TRUE

LVDS_IG_A_CLK_F_P

TRUE

PP3V3_S0_LCD_F

TRUE

PPVOUT_S0_LCDBKLT

TRUE

LVDS_IG_A_DATA_N<1>

TRUE

LVDS_IG_A_DATA_N<2>

TRUE

LVDS_IG_A_DATA_P<0>

TRUE

LVDS_IG_A_DATA_N<0>

TRUE

PP3V3_LCDVDD_SW_F

TRUE

LVDS_IG_DDC_CLK

TRUE

LVDS_IG_DDC_DATA

TRUE

MCPTHMSNS_D2_N

TRUE

MCPTHMSNS_D2_P

TRUE

SPKRAMP_SUB_P_OUT

TRUE

SPKRAMP_SUB_N_OUT

TRUE

MIC_LO_CONN

TRUE

MIC_HI_CONN

TRUE

FAN_RT_PWM

TRUE

PP5VRT_S0

TRUE

FAN_RT_TACH

TRUE

PP3V42_G3H

PP5V_SW_ODD

TRUE

LED_RETURN_2

TRUE

IR_RX_OUT

TRUE

PP5V_S3_IR_R

TRUE

SMC_LID_R

TRUE

SYS_LED_ANODE_R

TRUE

PP3V42_G3H_LIDSWITCH_R

PPVBAT_G3H_CONN_F

TRUE

SMC_BIL_BUTTON_DB_L

TRUE

SMBUS_SMC_BSA_SCL

TRUE

SMBUS_SMC_BSA_SCL

SPKRAMP_R_P_OUT

TRUE

SPKRAMP_R_N_OUT

TRUE

LVDS_IG_A_DATA_P<2>

TRUE

LVDS_IG_A_CLK_F_N

TRUE

SMC_ODD_DETECT

TRUE

LVDS_IG_A_DATA_P<1>

TRUE

PCIE_MINI_R2D_N

TRUE

PCIE_CLK100M_MINI_CONN_P

TRUE

PCIE_CLK100M_MINI_CONN_N

TRUE

USB_CAMERA_CONN_P

TRUE

SMBUS_SMC_A_S3_SDA

TRUE

CONN_USB2_BT_P

TRUE

CONN_USB2_BT_N

TRUE

MINI_RESET_CONN_L

TRUE

SMBUS_SMC_A_S3_SCL

TRUE

PCIE_MINI_D2R_N

TRUE TRUE

PCIE_MINI_R2D_P

TRUE

PCIE_MINI_D2R_P

TRUE

PP5V_S3_BTCAMERA_F

SPKRAMP_L_P_OUT

TRUE

USB_CAMERA_CONN_N

PP5V_WLAN

TRUE

SPKRAMP_L_N_OUT

TRUE

MIC_SHLD_CONN

TRUE

SATA_HDD_R2D_P

TRUE TRUE

SATA_HDD_R2D_N

SATA_HDD_D2R_C_P

TRUE

Z2_CS_L

TRUE

TPAD_GND_F

TRUE

PP18V5_S3

TRUE

PP3V3_S3_LDO

Z2_MOSI

TRUE

Z2_DEBUG3

TRUE

Z2_MISO

TRUE TRUE

Z2_BOOST_EN Z2_HOST_INTN

TRUE TRUE

Z2_BOOT_CFG1

TRUE

Z2_CLKIN Z2_KEY_ACT_L

TRUE

Z2_RESET

TRUE

PSOC_MOSI

TRUE

PSOC_MISO

TRUE

PSOC_SCLK

TRUE

SMBUS_SMC_A_S3_SDA

TRUE

SMBUS_SMC_A_S3_SCL

TRUE TRUE

PSOC_F_CS_L

PICKB_L

TRUE

PP3V3_S3

TRUE

WS_KBD1

TRUE

PP3V42_G3H

TRUE

WS_KBD2

TRUE

WS_KBD3

TRUE

WS_KBD4

TRUE

WS_KBD6

TRUE

WS_KBD5

TRUE

WS_KBD7

TRUE

WS_KBD9

TRUE

WS_KBD8

TRUE

WS_KBD11

TRUE

WS_KBD10

TRUE

WS_KBD12

TRUE

WS_KBD13

WS_KBD14

TRUE TRUE

WS_KBD15_CAP

TRUE

WS_KBD17

TRUE

WS_KBD16_NUM

TRUE

WS_KBD19

TRUE

WS_KBD18

TRUE

WS_KBD20

TRUE

WS_KBD22

TRUE

WS_KBD21

TRUE

WS_KBD_ONOFF_L

TRUE

WS_KBD23

TRUE

WS_LEFT_SHIFT_KBD

TRUE

WS_LEFT_OPTION_KBD

TRUE

WS_CONTROL_KBD

TRUE

KBDLED_ANODE

Z2_SCLK

TRUE

SATA_HDD_D2R_C_N

PPCPUVTT_S0

TRUE

PP1V8_S0

TRUE

PP3V3_S0

TRUE

PP1V5_S3

TRUE

PP5VLT_S3

TRUE

PP1V1R1V05_S5

TRUE

PP3V3_S5

TRUE

PP3V42_G3H

TRUE TRUE

PP3V3_ENET_PHY

PPBUS_G3H

TRUE

PP1V2R1V05_ENET

TRUE

PP5V_WLAN

TRUE

PP5V_SW_ODD

TRUE

PP3V3_S5_AVREF_SMC

TRUE

PP18V5_S3

TRUE

PP3V3_S3_LDO

TRUE TRUE

PP3V3_LCDVDD_SW_F PPVOUT_S0_LCDBKLT

TRUE TRUE

BKL_VREF_4V9

PPVCORE_S0_CPU

TRUE

PM_SLP_S3_L

PP3V3_S3

TRUE

PP1V5_S0

TRUE

SATA_ODD_R2D_N

PP0V75_S0

TRUE

PPVCORE_S0_MCP

TRUE

SMC_PM_G2_EN

TRUE

PP5V_S0_HDD_FLT

PCIE_WAKE_L

TRUE

MINI_CLKREQ_Q_L

TRUE

PP3V3_G3_RTC

TRUE

PP5V_S0_HDD_FLT

TRUE

PP4V6_AUDIO_ANALOG

TRUE

PM_SLP_S4_L

PP5VRT_S0

TRUE

PP1V05_S0

TRUE

68D8 64D5

69C1

48C7

69C1

69C8

41A5

64C8

56A8

76D3

73A3

69B3

73B3

8D1

76D3

73B3

76D3

73D3

48C4

48D3

48C3

76D3

8D1

47C2

8D1

48D3

48C3

69B3

69C4

39C5

73A3

31C7

26D4

52D6

40A2

40B2

42C5

36B5

73A3

69B1

69C1

73B3

66B2

66C2

66C5

66B5

77D3

54C2

54D2

8D5

7C3

36D3

69B1

38C4

42C5

54C2

66C2

73B3

39B8

66C2

73D3

74C3

42D2

74B3

42D2

31C7

73D3

31C7

54C2

74C3

31C5

54C2

55A6

73A3

48C3

48C1

48B4

48C3

48C5

48C3

48C1

42D2

48C1

8D3

47D2

7C3

47D2

47C6

47D2

47C6

47D7

47B5

48C3

73A3

7B5

31C5

36D3

40B6

48C1

48B4

66C2

66B2

69B6

34B7

8D3

36B5

64D8

36A7

23C5

22A5

36A7

51D3

39C5

8D5

39C5

7A7

56A8

56D6

7C5

36B5

56D7

36B5

66B3

66B2

66C3

7C3

18B3

7C3

18A3

45B5

53B2

54B1

46B4

7D3

46C4

7B5

7C3

66B3

38A4

38B6

56A8

56A5

7A7

53C3

18B3

66B2

36B7

18B3

31C7

31C8

31B7

7B5

31B7

31A7

7B5

17B6

31C7

17B6

31B7

53B2

31B7

7C3

53A2

54D2

36A7

47C8

48B4

7C3

47C8

48C3

47D8

47C8

47B6

47C8

7C5

7D5

47C8

47D8

7D3

47C6

7A7

47C6

47C2

47C6

47C2

47B3

48A4

47C8

36A7

8D7

8B7

8C5

8D3

8C3

8B3

7A7

8B1

8C1

8B1

7D5

7B7

39D4

7C5

7C7

69A8

8D7

21C3

7B5

8B7

7B7

8C7

39D5

7C3

17B6

31C7

21C8

7C5

51A3

21C3

7D7

8C7

Preliminary

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

"G3H" RAILS

(MCP VCORE REG. OUTPUT)

"S0,S0M" RAILS

(DDR PWR AFTER SENSE RES.)

(CPU VCORE PWR)

(MCP VCORE AFTER SENSE RES)

206 mA (A01)

PEX & SATA AVDD/DVDD aliases

(DDR PWR REG. OUTPUT)

"S3" RAILS

43 mA (A01)

57 mA (A01)

127 mA (A01)

206 mA (A01)

127 mA (A01)

"ENET" RAILS

(BEFORE HIGH SIDE SENSING RES.)

(AFTER HIGH SIDE CPU VCORE

& CPU VTT SENSING RES.)

"S5" RAILS

Power Aliases

SYNC_MASTER=BEN

A

109

8

051-7537

=PP3V3_S5_SMBUS_MCP_1

=PP1V05_S5_REG

=PP3V3_S5_MCPPWRGD

=PP3V3_S5_ROM

=PP3V3_S5_MCP

=PP3V3_S5_LCD

=PP1V05_S0_MCP_PEX_DVDD

=PP3V3_S3_SMS

=PP3V3_S3_TPAD

=PP3V3_S3_MCP_GPIO

=PP3V3_S3_WLAN

=PP3V3_S3_VREFMRGN

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V

PP3V3_S3

=PP5V_S0_CPU_IMVP

=PP5V_S3_EXTUSB

=PPBUS_S0_LCDBKLT =PPVIN_S0_MCPCORES0

=PPVIN_S5_1V5S30V75S0

=PPVIN_S5_CPU_IMVP

=PPVIN_S0_CPUVTTS0

=PPCPUVCORE_VTT_ISNS

=PPCPUVCORE_VTT_ISNS_R

=PPBUS_G3HRS5

=PPVIN_S3_5VLTS3

=PPVIN_S0_5VRTS0

=PPVIN_S5_3V3S5

=PPBUS_G3H

=PPVIN_S0_MCPREG_VIN

=PP18V5_G3H_CHGR

=PP18V5_DCIN_CONN

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.3 MM

MAKE_BASE=TRUE

VOLTAGE=12.6V

PPBUS_G3H_CPU_ISNS

VOLTAGE=12.6V

PPBUS_G3H

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.3 MM

MAKE_BASE=TRUE

PP18V5_G3H

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.3 MM

MAKE_BASE=TRUE

VOLTAGE=18.5V

=PP3V42_G3H_RTC_D

=PP3V42_G3H_BMON_ISNS

=PP1V05_S0_MCP_FSB

MAKE_BASE=TRUE

VOLTAGE=1.1V

MIN_LINE_WIDTH=0.6 MM

PP1V05_S0

MIN_NECK_WIDTH=0.2 MM

=PPVCORE_S0_CPU_VSENSE

=PP1V5_S3_MEM_A =PP1V5_S3_MEM_B

VOLTAGE=1.5V

PP1V5_S3

MIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mm

=PP1V5_FC_CON

MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.2 mm

MAKE_BASE=TRUE

VOLTAGE=1.5V

PP1V5_S0_R

=PP1V5_S0_VMON

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MM

PP1V1R1V05_S5

MIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

=PP1V05_S0_MCP_SATA_DVDD1

=PP1V05_S0_MCP_SATA_DVDD0

=PP1V05_S0_MCP_SATA_AVDD1

=PP1V05_S0_MCP_SATA_AVDD0

=PP1V05_S0_MCP_PEX_DVDD1

=PP1V05_S0_MCP_PEX_DVDD0

=PP1V05_S0_MCP_PEX_AVDD1

=PP1V05_S0_MCP_PEX_AVDD0

=PP3V3_S5_MCP_GPIO

=PP1V05_S5_P1V05S0FET

=PP1V05_ENET_P1V05ENETFET

=PP3V42_G3H_TPAD =PP3V42_G3H_BATT

=PP5V_S0_HDD

=PP0V75_S0_MEM_VTT_B

=PP1V05_S0_MCP_PEX_DVDD

=PP1V5_S3_MEMRESET

=PP3V42_G3H_SMCUSBMUX

=PP1V5_S0_CPU

=PP1V8R1V5_S0_MCP_MEM

=PPVCORE_S0_CPU

=PP3V3_S0_ODD

=PPVIN_S5_SMCVREF =PP3V42_G3H_SMBUS_SMC_BSA =PP3V42_G3H_PWRCTL =PP3V42_G3H_CHGR

=PP3V42_G3H_REG

=PP3V42_G3H_LIDSWITCH

=PP1V5_S3_REG

=PP3V3_S3_FET

=PP1V05_S0_MCP_SATA_DVDD

=PP1V05_S0_MCP_PLL_UF

=PP1V5_S0_FET_R

=PP3V3R1V8_S0_MCP_IFP_VDD

=PP1V05_S0_FET

=PP1V5_S3_P1V5S0FET

=PP0V75_S0_MEM_VTT_A

=PP1V05_S0_MCP_HDMI_VDD =PP1V05_S0_VMON

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.4 mm

PP0V75_S0

MAKE_BASE=TRUE

VOLTAGE=0.75V

=PPVTT_S0_VTTCLAMP

=PP1V5_S0_FET

=PP5V_S0_LPCPLUS

=PP1V8_S0_REG

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 MM VOLTAGE=1.8V

PP1V8_S0

MIN_NECK_WIDTH=0.2 mm

=PP0V75_S0_REG

=PP1V05_S0_MCP_AVDD_UF

=PP1V05_S0_MCP_SATA_DVDD

PP1V05_S0_MCP_SATA_AVDD

MAKE_BASE=TRUE

=PP3V3_S5_LPCPLUS

=PP3V3_S5_SMC

=PP5V_S3_MCPDDRFET

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

PP3V3_ENET_PHY

VOLTAGE=3.3V

PP1V2R1V05_ENET

VOLTAGE=1.05V MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

=PP3V3_ENET_MCP_RMGT

=PP3V3_ENET_FET

=PP3V3_ENET_PHY

=PP1V05_ENET_FET

=PP1V05_ENET_MCP_PLL_MAC =PP1V05_ENET_MCP_RMGT =PP1V05_ENET_PHY

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.3 MM

PPVCORE_S0_CPU

VOLTAGE=1.25V

MIN_LINE_WIDTH=0.6 MM

=PP1V05_S0_CPU

=PPCPUVTT_S0_REG

VOLTAGE=1.05V

MIN_LINE_WIDTH=0.6 MM

PPVCORE_S0_MCP_R

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MM

=PPVCORE_S0_MCP_REG_R

PPVCORE_S0_MCP

MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM

=PPVCORE_S0_MCP

PP1V05_S0_MCP_PEX_AVDD

MAKE_BASE=TRUE

=PPVCORE_S0_CPU_REG

=PP1V5_S0

=PP1V5_S0_MEM_MCP

MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.2 mm

PP1V5_S0

MAKE_BASE=TRUE

VOLTAGE=1.5V

=PP5V_S3_AUDIO_AMP

=PP5V_S3_AUDIO

=PP5V_S3_1V5S30V75S0

=PP5V_S3_BTCAMERA

=PP5V_S3_SYSLED =PP5V_S3_TPAD

=PP5VLT_S3_REG

=PP3V3_S5_MCP_A01 =PP3V3_S5_PWRCTL

=PP3V3_S5_P3V3S3FET

=PP3V3_S5_P1V05ENETFET

=PP3V3_S5_P3V3S0FET =PP3V3_S5_P1V05S5 =PP3V3_S5_P1V05FET

=PP3V3_S5_MEMRESET

MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mm VOLTAGE=1.05V

PPCPUVTT_S0

=PP5VRT_S0_REG

PP5VRT_S0

MIN_LINE_WIDTH=0.6 mm VOLTAGE=5V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mm

=PP1V05_S5_MCP_VDD_AUXC

=PP3V3_S5_REG

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.3 MM VOLTAGE=0.75V

PPVTT_S3_DDR_BUF

MIN_NECK_WIDTH=0.2 MM

=PP5V_S3_WLAN

=PP5V_S3_VTTCLAMP

=PP5V_S3_IR

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.6 mm

PP5VLT_S3

VOLTAGE=5V MAKE_BASE=TRUE

=PP3V3_S3_SMBUS_SMC_MGMT

=PP3V3_S3_PDCISENS

PP3V42_G3H

VOLTAGE=3.42V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

=PP3V3_S3_SMBUS_SMC_A_S3

=PP5V_S0_FAN_RT

=PP3V3_S5_P3V3ENETFET

=PP5V_S0_ODD

=PP3V3_S0_MCP_VPLL_UF

=PP3V3_S0_HDCPROM

=PP3V3R1V5_S0_MCP_HDA

=PP3V3_S0_FET

=PPVCORE_S0_MCP_VSENSE

=PP1V05_S0_SMC_LS

=PP3V3_S0_XDP =PP3V3_S0_MCP =PP3V3_S0_MCP_DAC_UF

=PP3V3_S0_LPCPLUS =PP3V3_S0_SMBUS_SMC_0_S0

=PP3V3_S0_MCP_PLL_UF

=PPVTT_S3_DDR_BUF

=PP5V_S3_P1V05S0FET

=PP3V3_S0_SMC =PP3V3_S0_MCPTHMSNS =PP3V3_S0_CPUTHMSNS

=PPMCPCORE_S0_REG

=PP5V_S0_CPUVTTS0

=PP5V_S0_DP_AUX_MUX

=PP5V_S0_KBDLED

=PP3V3_S0_SMBUS_SMC_B_S0 =PP3V3_S0_SMBUS_MCP_0 =PP3V3_S0_FAN_RT =PP3V3_S0_AUDIO

=PP3V3_S0_IMVP

=PP3V3_S0_LCD =PP3V3_S0_MCP_GPIO

=PP5VR3V3_S0_MCPCOREISNS

=PP3V3_S5_DP_PORT_PWR

MIN_LINE_WIDTH=0.6 mm

PP3V3_S5

MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE

VOLTAGE=3.3V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mm VOLTAGE=3.3V

PP3V3_S0

MIN_NECK_WIDTH=0.2 mm

=PP3V3_S0_DPCONN

=PPSPD_S0_MEM_B

=PPSPD_S0_MEM_A

=PP3V3_S0_VMON

=PP3V3_S0_PWRCTL

=PP3V3_S0_MCPDDRISNS =PP3V3_S0_CPUVTTISNS =PPVIN_S0_P1V8S0 =PP3V3_FC_CON =PP3V3_S0_TPAD

=PP3V3_S0_SMBUS_MCP_1

24C8

49D7

13D6

55B5

47D2

22D3

47C5

41D5

40D8

24B6

12B6

61B1

54D8

50C6

47C5

60D8

14B7

47C2

24C8

12D6

64D8

57D5

41C7

40C7

24A6

11C6

44D7

53D8

7C3

24A8

24B8

52D6

21A4

41C7

24B8

24D8

49D6

47B5

7D3

60D4

58C6

56D1

14A2

20C1

47B5

56B3

24D8

12B6

16C7

11D6

36D5

64D3

57C6

24D6

25D7

24D6

41C3

40C1

18D3

24C6

10D5

65A6

24D8

53C8

55D4

41B4

64C4

7D7

24C8

38D7

7B5

21D8

13D6

22B3

59D7

40D2

51D8

19D1

68B8

42C7

63B4

26B8

41B5

22B3

66C8

8B7

49B7

47A6

21A3

31A6

27D8

7B5

60D8

37C7

70D8

61C3

59C2

60C2

62C6

44B7

44B8

43B8

61D8

58B6

58B3

57C1

61C6

57D8

56B8

7C3

26D8

44A8

9C2

7D3

43D8

28D7

29D7

7D3

32C3

64A8

7C3

20B6

20A6

20B6

17A6

17B6

17A3

17B3

18C7

65B6

34C4

47B3

56A3

36A5

29A4

8A8

30C6

37B8

11B6

16C3

11B5

36B7

40B8

42C5

64B3

57A8

56B4

38B4

59B1

65D6

8A8

24C4

44C8

18B6

65A5

65D3

28A4

18A6

64A8

7D3

65B3

65D1

41D5

63C2

7D3

59C8

24D4

8B7

24C2

41B7

39D4

65D4

7C3

18C7

34D2

33D7

34B2

24A8

18D3

33D2

7D3

6D8

62C2

44D8

7D3

22D5

24D1

60D1

44C7

29B3

7D3

53B8

51A7

59C5

31B3

40B8

48C8

61C8

23C4

64B3

65D8

34C5

65C8

63B7

65A8

30C6

7D3

58B8

7D3

22A3

58B1

31C1

65A3

38B4

7D3

42B5

59B3

7A7

42D3

46C5

34D5

36D5

25B7

25B8

21D3

65C6

43D8

40D3

6D8

21C2

25D4

41C3

42D5

24B6

27D3

65B8

40A1

45C6

45D6

61C1

62C8

67B6

48A5

42C3

42D8

46C5

51A7

60D8

66C5

18C1

44D7

68D8

7C3

7D3

68A8

29A8

28A8

64B8

64A5

44C7

44B7

63C5

32C3

48A6

42C8

Preliminary

OUT

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

VENICE BOARD STANDOFFS

DP HOTPLUG PULL-DOWN

FOR VENICE CARD

PCI-E ALIASES

UNUSED GPU LANES

UNUSED CRT & TV-OUT INTERFACE

UNUSED USB PORTS

AIRPORT CARD PRESENT SIGNAL

Extra FSB Pull-ups

Exist in MRB but not Intel designs. Here for CYA.

If found to be necessary, will move to page14.csa

LVDS ALIASES

UNUSED LVDS SIGNALS

1 1 1

(RSVD)

BSEL<2..0>

0 1 0

0 0 0

0 1 1 1 0 0

0 0 1

1 0 1 1 1 0

FSB MHZ

100

266 133

333

200

(166)

(400)

CPU FSB FREQUENCY STRAPS

BELOW CPU

LEFT OF CPU

BELOW MCP

UNUSED FW LANE

UNUSED EXPRESS CARD LANE

ETHERNET ALIASES

UNUSED ADDRESS PINS

SO-DIMM ALIASES

ABOVE CPU

DACS ALIASES

MISC MCP79 ALIASES

FAN STANDOFF

HEATSINK STANDOFFS

AUDIO CHASSIS GND

MLB MOUNTING SCREW HOLES

LAN ALIASES

USB ALIASES

EMI IO POGO PINS

EMI POGO PINS

1

3R2P5

Z0912

OMIT

Z0909

1

3R2P5

OMIT

1

OMIT

Z0911

3R2P5

1

3R2P5

OMIT

Z0908

STDOFF-4.5OD.98H-1.1-3.48-TH

1

Z0901

STDOFF-4.5OD.98H-1.1-3.48-TH

Z0904

1

STDOFF-4.5OD.98H-1.1-3.48-TH

Z0902

1

Z0903

STDOFF-4.5OD.98H-1.1-3.48-TH

R0930

47K

402

MF-LF

5% 1/16W

2

1

14A7 10A4 10B4 71C3

402

20K

1/16W

5% MF-LF

2

1

R0940

3R2P5

OMIT

1

Z0913

10B8 14A3 71C3

10D6 13B2 14A3 71C3

10D6 14B6 71C3

10B2 14A3 60C7 71B3

MF-LF

1/16W

NO STUFF

62

1

402

5%

2

R0960

MCP_A01&MCP_A01P&MCP_A01Q

1

5%

2

MF-LF

1/16W

402

220

R0950

1

2

200

MF-LF

5%

1/16W

NO STUFF

402

R0970

1/16W MF-LF

NO STUFF

150

1

402

5%

2

R0980

1

2

MF-LF

5%

1/16W

150

402

NO STUFF

R0990

STDOFF-4.5OD.98H-1.1-3.48-TH

Z0905

1

VENICE

Z0916

1

STDOFF-4.0OD3.0H-TH

VENICE

Z0915

1

STDOFF-4.0OD3.0H-TH

VENICE

Z0914

1

STDOFF-4.0OD3.0H-TH

1

TH

OMIT

Z0906

SL-3.10X2.70

1

3R2P5

OMIT

Z0910

1

SM

ZS0901

1.4DIA-SHORT-EMI-MLB-M97-M98

1

SM

ZS0905

2.0DIA-TALL-EMI-MLB-M97-M98

1

SM

2.0DIA-TALL-EMI-MLB-M97-M98

ZS0906

1

SM

2.0DIA-TALL-EMI-MLB-M97-M98

ZS0904

1

SM

ZS0907

2.0DIA-TALL-EMI-MLB-M97-M98

1

SM

1.4DIA-SHORT-EMI-MLB-M97-M98

ZS0902

1

SM

ZS0900

1.4DIA-SHORT-EMI-MLB-M97-M98

1

SM

ZS0903

1.4DIA-SHORT-EMI-MLB-M97-M98

SIGNAL ALIAS

SYNC_MASTER=M97_MLB

9

A

109

051-7537

MAKE_BASE=TRUE

VOLTAGE=0V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

PCIE_CLK100M_FC_P

MAKE_BASE=TRUE

USB_EXTC_N

=GND_CHASSIS_AUDIO_JACK

GND_CHASSIS_AUDIO

MAKE_BASE=TRUE

FW_PME_L

TP_FW_PME_L

MAKE_BASE=TRUE

TP_GMUX_JTAG_TCK_L

MAKE_BASE=TRUE

TP_GMUX_JTAG_TDO

MAKE_BASE=TRUE

TP_USB_EXCARD_N

MAKE_BASE=TRUE

TP_USB_MINI_N

MEM_B_A<15>

MAKE_BASE=TRUE

PM_SLP_RMGT_L

=RTL8211_REGOUT

MAKE_BASE=TRUE

TP_FW_CLKREQ_L

CRT_IG_HSYNC

CRT_IG_B_COMP_PB

CRT_IG_R_C_PR

PCIE_EXCARD_R2D_C_N PCIE_EXCARD_PRSNT_L

MAKE_BASE=TRUE

TP_PCIE_EXCARD_R2D_C_N

PEG_CLK100M_P

MAKE_BASE=TRUE

TP_PEG_CLK100M_N

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_D2R_P<15:0>

=PEG_D2R_P<15:0>

FW_CLKREQ_L

PCIE_FW_R2D_C_N

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_P<15:0>

PCIE_CLK100M_FW_P

=GND_CHASSIS_AUDIO_MIC

TP_MEM_A_A15

MAKE_BASE=TRUE MAKE_BASE=TRUE

TP_MEM_B_A15

TP_PCIE_FW_R2D_C_P

MAKE_BASE=TRUE

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_C_N<15:0>

MCP_TV_DAC_VREF

MCP_CLK27M_XTALOUT

MAKE_BASE=TRUE

TP_PCIE_EXCARD_D2R_N

PCIE_FW_D2R_P

MEM_A_A<15>

CRT_IG_VSYNC

NC_CRT_IG_VSYNC

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_CRT_IG_HSYNC

MAKE_BASE=TRUE

CRT_IG_G_Y_Y

NC_CRT_IG_G_Y_Y

MAKE_BASE=TRUE

NO_TEST=TRUE

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_MCP_CLK27M_XTALIN

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_MCP_TV_DAC_VREF

MCP_TV_DAC_RSET

MAKE_BASE=TRUE

NC_MCP_TV_DAC_RSET

NO_TEST=TRUE

PEG_PRSNT_L

=P3V3ENET_EN

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_CRT_IG_R_C_PR

=PEG_R2D_C_P<15:0>

=P1V05ENET_EN

TP_PP3V3_ENET_PHY_VDDREG

MAKE_BASE=TRUE

=PP3V3_ENET_PHY_VDDREG

MAKE_BASE=TRUE

NC_RTL8211_REGOUT

=RTL8211_ENSWREG

MAKE_BASE=TRUE

TP_PEG_PRSNT_L

CPU_DPRSTP_L

FSB_CPURST_L

=PP1V05_S0_MCP_FSB

LVDS_IG_B_CLK_N

NC_LVDS_IG_B_DATA_P<3:0>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_B_CLK_N

NO_TEST=TRUE

NC_LVDS_IG_B_DATA_N<3:0>

MAKE_BASE=TRUE

LVDS_IG_A_DATA_P<3> LVDS_IG_A_DATA_N<3> LVDS_IG_B_CLK_P

NO_TEST=TRUE

NC_LVDS_IG_B_CLK_P

MAKE_BASE=TRUE

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_A_DATA_P3

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_A_DATA_N3

=MCP_BSEL<0:2>

CPU_BSEL<0:2>

MAKE_BASE=TRUE

PEG_CLK100M_N

MAKE_BASE=TRUE

TP_PEG_CLK100M_P

MAKE_BASE=TRUE

TP_PCIE_FW_D2R_P

MAKE_BASE=TRUE

TP_PCIE_FW_D2R_N

PCIE_FW_D2R_N PCIE_FW_R2D_C_P

MAKE_BASE=TRUE

TP_PCIE_FW_PRSNT_L

PCIE_FW_PRSNT_L

MAKE_BASE=TRUE

TP_PCIE_FW_R2D_C_N

TP_PCIE_CLK100M_FW_N

MAKE_BASE=TRUE

PCIE_CLK100M_FW_N

PCIE_EXCARD_D2R_P PCIE_EXCARD_D2R_N

TP_PCIE_EXCARD_R2D_C_P

MAKE_BASE=TRUE

PCIE_EXCARD_R2D_C_P

EXCARD_CLKREQ_L

PCIE_CLK100M_EXCARD_P

PCIE_CLK100M_EXCARD_N

PCIE_MINI_PRSNT_L

USB_EXCARD_N

TP_USB_EXTD_N

MAKE_BASE=TRUE

TP_USB_EXCARD_P

MAKE_BASE=TRUE

USB_EXCARD_P

TP_PE4_PRSNT_L

TP_PCIE_PE4_D2RP TP_PCIE_PE4_D2RN

TP_PCIE_PE4_R2D_CN

MAKE_BASE=TRUE

TP_USB_EXTC_N

TP_USB_EXTC_P

MAKE_BASE=TRUE

TP_PCIE_CLK100M_FW_P

=PEG_R2D_C_N<15:0>

USB_MINI_P

USB_EXTC_P

PCIE_FC_D2R_P

MAKE_BASE=TRUE

USB_MINI_N

TP_USB_MINI_P

MAKE_BASE=TRUE

TP_USB_EXTD_P

MAKE_BASE=TRUE

USB_EXTD_N

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_CRT_IG_B_COMP_PB

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_MCP_CLK27M_XTALOUT

MCP_CLK27M_XTALIN

MAKE_BASE=TRUE

NC_PEG_D2R_N<15:0>

NO_TEST=TRUE

=PEG_D2R_N<15:0>

CPU_NMI

CPU_INTR

FSB_BREQ0_L

LVDS_IG_B_DATA_N<3:0>

LVDS_IG_B_DATA_P<3:0>

GMUX_JTAG_TMS

FC_PRSNT_L

MAKE_BASE=TRUE

TP_PCIE_EXCARD_PRSNT_L

MAKE_BASE=TRUE

TP_PCIE_EXCARD_D2R_P

MAKE_BASE=TRUE

TP_EXCARD_CLKREQ_L

MAKE_BASE=TRUE

TP_PCIE_CLK100M_PE4P

TP_PE4_CLKREQ_L

TP_PCIE_CLK100M_PE4N

TP_PCIE_PE4_R2D_CP

TP_PCIE_CLK100M_EXCARD_P

MAKE_BASE=TRUE

PCIE_CLK100M_FC_N

MAKE_BASE=TRUE

PCIE_FC_D2R_N

MAKE_BASE=TRUE

PCIE_FC_R2D_C_N

MAKE_BASE=TRUE

PCIE_FC_R2D_C_P

MAKE_BASE=TRUE

FC_CLKREQ_L

MAKE_BASE=TRUE

TP_PCIE_CLK100M_EXCARD_N

MAKE_BASE=TRUE

GMUX_JTAG_TCK_L GMUX_JTAG_TDO

MCP_MII_PD

MAKE_BASE=TRUE

HPLUG_DET2

MAKE_BASE=TRUE

=MCP_MII_RXER =MCP_MII_COL =MCP_MII_CRS

=DVI_HPD_GMUX_INT

MAKE_BASE=TRUE

TP_CPU_PECI_MCP

CPU_PECI_MCP

TP_GMUX_JTAG_TMS

MAKE_BASE=TRUE

TP_GMUX_JTAG_TDI

MAKE_BASE=TRUE

GMUX_JTAG_TDI

USB_EXTD_P

24C8 22D3 14B7

73D3

54B8

17D6

55A4

17D3

14A2

31D7

17D3

73D3

17D6

73C3

73D3

32C5

20C3

54A8

19B7

29C5

21C3

33C2

18B3

18C3

17B3

17C6

17C3

17C6

17B3

17C3

54A3

18C6

17B6

28C5

18B3

18C3

18C6

17C6

34C5

17C3

34B5

33C2

33C6

8D7

18B3

17C3

17B6

17B3

17C6

17C3

17B6

17B3

17C6

17C3

17C6

20C3

17B6

17B3

17C3

20D3

20C3

32B5

20D3

18C6

17C6

18B3

19D4

32B3

17B3

17B6

17B3

32C5

32B5

32C6

32C5

17B6

18D6

18C6

18B6

14B6

19D4

20D3

Preliminary

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

IN IN IN

IN

OUT

IN

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT

OUT

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

BI BI BI

BI

BI BI

BI BI BI BI BI

BI

OUT

IN

IN IN IN IN IN

IN IN

OUT

IN IN

IN

IN IN

IN

OUT

BI BI BI BI

TEST7

TEST6

DSTBP1* DINV1*

D31*

D30*

D25*

D11* D12* D13* D14*

DSTBP0* DINV0*

D9*

D8*

D7*

D6*

D19*

D18*

D0*

D32* D1* D2*

D5*

D16*

D20* D21* D22* D23* D24*

D26* D27* D28* D29*

DSTBN1*

GTLREF

TEST3 TEST4 TEST5

BSEL0 BSEL1 BSEL2

D33*

D34*

D35*

D36*

D37*

D38*

D39*

D40*

D41*

D42*

D43*

D44*

D45*

D46*

D47*

DSTBN2* DSTBP2*

DINV2*

D48*

D49*

D50*

D51*

D52*

D53*

D54*

D55*

D56*

D57*

D58*

D59*

D60*

D61*

D62*

D63*

DSTBN3* DSTBP3*

DINV3*

COMP0 COMP1 COMP2 COMP3

DPRSTP*

DPSLP*

DPWR*

PWRGOOD

SLP*

PSI*

D17*

D4*

D3*

DSTBN0*

D15*

D10*

TEST2

TEST1

2 OF 4

DATA GRP 3 DATA GRP 2

MISC

DATA GRP 0DATA GRP 1

LOCK*

INIT*

A20M*

A6*

A3* A4*

A14*

A16*

REQ0* REQ1* REQ2* REQ3* REQ4*

BCLK1

BCLK0

THERMTRIP*

THERMDA

PROCHOT*

DBR*

TRST*

TMS

TDO

TDI

TCK

PREQ*

PRDY*

BPM3*

BPM2*

BPM1*

BPM0*

HITM*

HIT*

TRDY*

RS2*

RS1*

RS0*

RESET*

IERR*

BR0*

DBSY*

DRDY*

DEFER*

BNR*

RSVD4

RSVD3

RSVD2

RSVD1

RSVD0

SMI*

LINT1

LINT0

STPCLK*

FERR*

ADSTB1*

A35*

A34*

A33*

A32*

A31*

A30*

A29*

A28*

A19*

A18*

A17*

ADSTB0*

A13*

A12*

BPRI*

A20* A21* A22* A23* A24*

A26* A27*

A9*

A8*

A7*

A11*

A25*

THERMDC

IGNNE*

ADS*

A10*

A15*

A5*

RSVD5 RSVD6 RSVD7 RSVD8

1 OF 4

CONTROL

THERMAL

XDP/ITP SIGNALS

H CLK

ADDR GROUP1

ICH

RESERVED

ADDR GROUP0

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

CHANGE CPU FROM SOCKET TO BGA SYMBOL

SYNC FROM T18

CPU JTAG Support

PLACEMENT_NOTE (all 4 resistors):

402

MF-LF

54.9

1/16W

1%

2

1

R1000

402

MF-LF

1/16W

5%

68

2

1

R1002

1/16W

1%

MF-LF

1K

402

PLACEMENT_NOTE=Place R1005 within 12.7mm of CPU.

2

1

R1005

402

1/16W

2.0K

MF-LF

1%

PLACEMENT_NOTE=Place R1006 within 12.7mm of CPU.

2

1

R1006

402

MF-LF

1/16W

1%

54.9

Place within 12.7mm of CPU

2

1

R1023

402

MF-LF

1/16W

1%

27.4

Place within 12.7mm of CPU

2

1

R1022

54.9

1% 1/16W MF-LF

402

Place within 12.7mm of CPU

2

1

R1021

402

MF-LF

1/16W

1%

27.4

Place within 12.7mm of CPU

2

1

R1020

14C3 71D3

14B3 71D3

14D6 71D3

14B3 71D3

14D6 71D3

9B2

14A3 60C7 71B3

14A3 71B3

60C7

13C7 14A3 71B3

14D3 71D3

14D6 71D3

14D3 71D3

14C3 71D3

14D6 71D3

9C2

71C3

9C2

71C3

9C2

71C3

14D6 71D3

14C6 71D3

14B6 71C3

14C6 71C3

14B6 71C3

14B3 71C3

14B6 71C3

9B2

14B6 71C3

13C6 71A3

6C4

10B6 71A3

13B3 26A3

14B6 40D4 60C8 71B3

45D5 77D3

14B7 40C4 71B3

14A3 71C3

9B2

13B2 14A3 71C3

14A6 71C3

14B6 71C3

6C6 6C7

10A6 13B6 71A3

6C6

10B6 13B3 71A3

6C6 6C7

10B6 13B3 71A3

6C6 6C7

10A6 13B3 71A3

45D5 77D3

14B3 71B3

14A3 71C3

9B2

14A3 71C3

9B2

14A3 71C3

14A3 71B3

14B7 71C3

402

0

1/16W MF-LF

5%

NO STUFF

21

R1010

402

1K

MF-LF

5%

1/16W

NO STUFF

2

1

R1011

1/16W

1%

MF-LF

402

54.9

2

1

R1001

402

1%

MF-LF

1/16W

54.9

21

R1090

402

54.9

1/16W MF-LF

1%

21

R1091

402

54.9

1/16W MF-LF

1%

21

R1093

14C6 71C3

14B6 71C3

402

649

1/16W MF-LF

1%

21

R1094

NO STUFF

1/16W

5%

1K

MF-LF 402

2

1

R1012

402

16V

10%

0.1uF

X5R

NO STUFF

PLACEMENT_NOTE=Place C1014 within 12.7mm of CPU.

2

1

C1014

OMIT

PENRYN

FCBGA

C3

A26

AF1

AF26

C24

D25

C23

D7

D6

AE6

AD26

AF24

AA26

M26

H26

AE25

Y26

L26

J26

D24

B5

E5

AC20

U22

N24

H25

G24

K24

E23

AC23

AF22

AD23

AC22

E25

AD21

AE21

AC25

AF23

AE22

AD20

AC26

AB21

AB22

AA21

G25

AD24

AE24

AB25

AA24

AA23

W25

W24

Y23

W22

Y25

F23

U23

U25

T22

V23

V26

V24

AB24

Y22

N25

T25

G22

L25

R24

T24

P22

P23

P25

M23

L22

M24

L23

E26

R23

P26

K25

N22

H23

K22

F26

H22

J23

J24

F24

E22

Y1

AA1

U26

R26

C21

B23

B22

U1000

402

1%

MF-LF

1/16W

54.9

PLACEMENT_NOTE=Place R1092 near ITP connector (if present)

21

R1092

PENRYN

OMIT

FCBGA

AB6

G2

AB5

C7

B25

A24

AB3

AA6

AC5

D5

A3

D3

D22

D2

F6

B2

V3

T2

N5

M4

G3

F4

F3

C1

L1

J3

K2

H2

K3

D21

AC1

AC2

H4

B4

C6

B3

C4

D20

E4

G6

A5

F21

H5

E1

C20

F1

G5

AC4

AD1

AD3

AD4

E2

A21

A22

V1

M1

H1

J1

N2

M3

K5

L4

L5

AA3

AB2

AA4

W3

V4

U2

J4

Y4

W5

W2

T3

T5

R4

U1

Y5

U4

A6

W6

R3

U5

Y2

R1

P1

P4

L2

P2

P5

N3

U1000

109

051-7537

A

10

CPU FSB

SYNC_MASTER=T18_MLB

SYNC_DATE=12/12/2007

XDP_TDI

XDP_TDO

XDP_TMS

FSB_D_L<0> FSB_D_L<1> FSB_D_L<2> FSB_D_L<3> FSB_D_L<4> FSB_D_L<5> FSB_D_L<6> FSB_D_L<7> FSB_D_L<8> FSB_D_L<9> FSB_D_L<10> FSB_D_L<11> FSB_D_L<12> FSB_D_L<13> FSB_D_L<14> FSB_D_L<15> FSB_DSTB_L_N<0> FSB_DSTB_L_P<0> FSB_DINV_L<0>

FSB_D_L<16> FSB_D_L<17> FSB_D_L<18> FSB_D_L<19> FSB_D_L<20> FSB_D_L<21> FSB_D_L<22> FSB_D_L<23> FSB_D_L<24> FSB_D_L<25> FSB_D_L<26> FSB_D_L<27> FSB_D_L<28> FSB_D_L<29> FSB_D_L<30> FSB_D_L<31> FSB_DSTB_L_N<1> FSB_DSTB_L_P<1> FSB_DINV_L<1>

CPU_BSEL<0> CPU_BSEL<1> CPU_BSEL<2>

TP_CPU_TEST5

TP_CPU_TEST3

TP_CPU_TEST6

TP_CPU_TEST7

FSB_CPUSLP_L CPU_PSI_L

CPU_PWRGD

FSB_DPWR_L

CPU_DPSLP_L

CPU_DPRSTP_L

FSB_DINV_L<3>

FSB_DSTB_L_N<3> FSB_DSTB_L_P<3>

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<57>

FSB_D_L<56>

FSB_D_L<55>

FSB_D_L<54>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_DINV_L<2>

FSB_DSTB_L_P<2>

FSB_DSTB_L_N<2>

FSB_D_L<47>

FSB_D_L<46>

FSB_D_L<45>

FSB_D_L<44>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

FSB_D_L<32>

XDP_TRST_L

XDP_TCK

CPU_GTLREF CPU_TEST1 CPU_TEST2

CPU_TEST4

CPU_COMP<1>

CPU_COMP<0>

CPU_COMP<2> CPU_COMP<3>

=PP1V05_S0_CPU

FSB_LOCK_L

CPU_INIT_L

FSB_A_L<3> FSB_A_L<4>

FSB_A_L<14>

FSB_A_L<16>

FSB_REQ_L<0> FSB_REQ_L<1> FSB_REQ_L<2> FSB_REQ_L<3> FSB_REQ_L<4>

FSB_CLK_CPU_N

FSB_CLK_CPU_P

PM_THRMTRIP_L

CPU_THERMD_P

CPU_PROCHOT_L

XDP_DBRESET_L

XDP_TRST_L

XDP_TMS

XDP_TDO

XDP_TDI

XDP_TCK

XDP_BPM_L<5>

XDP_BPM_L<4>

XDP_BPM_L<3>

XDP_BPM_L<2>

XDP_BPM_L<1>

XDP_BPM_L<0>

FSB_HITM_L

FSB_HIT_L

FSB_TRDY_L

FSB_RS_L<2>

FSB_RS_L<1>

FSB_RS_L<0>

FSB_CPURST_L

CPU_IERR_L

FSB_BREQ0_L

FSB_DBSY_L

FSB_DRDY_L

FSB_DEFER_L

FSB_BNR_L

TP_CPU_RSVD_B2

TP_CPU_RSVD_V3

TP_CPU_RSVD_T2

TP_CPU_RSVD_N5

TP_CPU_RSVD_M4

FSB_ADSTB_L<0>

FSB_A_L<13>

FSB_A_L<12>

FSB_BPRI_L

FSB_A_L<9>

FSB_A_L<8>

FSB_A_L<7>

FSB_A_L<11>

CPU_THERMD_N

FSB_ADS_L

FSB_A_L<10>

FSB_A_L<15>

FSB_A_L<5>

TP_CPU_RSVD_F6 TP_CPU_RSVD_D2 TP_CPU_RSVD_D22 TP_CPU_RSVD_D3

FSB_A_L<17> FSB_A_L<18> FSB_A_L<19>

FSB_A_L<21>

FSB_A_L<20>

FSB_A_L<22> FSB_A_L<23> FSB_A_L<24>

FSB_A_L<26>

FSB_A_L<25>

FSB_A_L<27> FSB_A_L<28> FSB_A_L<29> FSB_A_L<30> FSB_A_L<31> FSB_A_L<32> FSB_A_L<33> FSB_A_L<34> FSB_A_L<35> FSB_ADSTB_L<1>

CPU_A20M_L CPU_FERR_L CPU_IGNNE_L

CPU_STPCLK_L

CPU_SMI_L

CPU_NMI

CPU_INTR

FSB_A_L<6>

71A3

13D6

71A3

13B3

13B6

12B6

13B3

71A3

10C6

11C6

10C6

6C7

71B3

8D7

6C6

6C4

6C6

27B1

71A3

71B3

6D8

71B3

Preliminary

OUT OUT OUT OUT OUT OUT OUT

OUT

VCC

VCCP

VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCSENSE

VSSSENSE

VCC

3 OF 4

VSS VSS

4 OF 4

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

2500 mA (after VCC stable)

4500 mA (before VCC stable)

(Socket-P KEY)

41 A (SV HFM)

130 mA

(CPU CORE POWER)

(CPU INTERNAL PLL POWER 1.5V)

(CPU IO POWER 1.05V)

23 A (LV Design Target)

44 A (SV Design Target)

(BR1#)

CHANGE CPU FROM SOCKET TO BGA SYMBOL

SYNC FROM T18

Current numbers from Merom for Santa Rosa EMTS, doc #20905.

30.4 A (SV LFM)

60C7 71A3

R1101

1

2

MF-LF 402

100

1% 1/16W

PLACEMENT_NOTE=Place R1101 within 25.4mm of CPU, no stubs.

60C7 71A3

60A5 71A3

U1000

A7

A9

B9 B10

B12

B14 B15

B17

B18 B20

C9 C10

A10

C12

C13 C15

C17

C18

D9

D10

D12 D14

D15

A12

D17

D18

E7

E9

E10

E12 E13

E15

E17 E18

A13

E20

F7

F9

F10 F12

F14

F15 F17

F18

F20

A15

AA7

AA9

AA10

AA12

AA13 AA15

AA17

AA18 AA20

AB9

A17

AC10 AB10

AB12 AB14

AB15

AB17 AB18

AB20

AB7

AC7

A18

AC9

AC12

AC13 AC15

AC17 AC18

AD7

AD9 AD10

AD12

A20

AD14 AD15

AD17

AD18 AE9

AE10 AE12

AE13

AE15 AE17

B7

AE18

AE20 AF9

AF10 AF12

AF14 AF15

AF17

AF18 AF20

B26 C26

G21 V6

R21

R6

T21 T6

V21

W21

J6

K6 M6

J21 K21

M21

N21 N6

AF7

AD6 AF5

AE5

AF4 AE3

AF3

AE2

AE7

FCBGA

OMIT

PENRYN

U1000

A4 A8

B11

W1

W4 W23

W26 Y3

Y6 Y21

Y24

AA2 AA5

B13

AA8

AA11 AA14

AA16

AA19 AA22

AA25 AB1

AB4

AB8

B16

AB11

AB13

AB16 AB19

AB23

AB26 AC3

AC6

AC8

AC11

B19

AC14

AC16 AC19

AC21

AC24 AD2 AD5 AD8

AD11 AD13

B21

AD16

AD19 AD22

AD25

AE1

AE4 AE8

AE11

AE14 AE16

B24

AE19

AE23 AE26

A2 AF6

AF8

AF11 AF13

AF16

AF19

C5

AF21

A25

AF25

B1

C8

C11

C14

A11

C16

C19

C2 C22

C25

D1

D4

D8 D11

D13

A14

D16 D19

D23

D26

E3

E6

E8

E11 E14

E16

A16

E19

E21 E24

F5

F8 F11

F13 F16

F19

F2

A19

F22

F25

G4

G1

G23

G26

H3

H6 H21

H24

A23

J2

J5

J22

J25

K1

K4

K23 K26

L3

L6

AF2

L21

L24

M2

M5

M22 M25

N1

N4 N23

N26

B6

P3

P6

P21 P24

R2

R5 R22

R25 T1

T4

B8

T23 T26

U3 U6

U21 U24

V2

V5

V22 V25

FCBGA

PENRYN

OMIT

R1100

1

2

MF-LF 402

100

1% 1/16W

PLACEMENT_NOTE=Place R1100 within 25.4mm of CPU, no stubs.

CPU Power & Ground

SYNC_MASTER=T18_MLB

SYNC_DATE=12/12/2007

051-7537

A

11

109

=PPVCORE_S0_CPU

CPU_VID<6>

CPU_VID<5>

CPU_VID<4>

CPU_VID<3>

=PP1V5_S0_CPU

=PP1V05_S0_CPU

CPU_VID<2>

CPU_VID<1>

CPU_VID<0>

=PPVCORE_S0_CPU

CPU_VCCSENSE_P

CPU_VCCSENSE_N

13D6 12B6

12D6

10D5

12D6

11B5

12B6

8D7

11D6

8D7

8B7

6D8

8D7

Preliminary

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

PLACEMENT_NOTE (C1200-C1219):

1x 10uF, 1x 0.01uF

VCCA (CPU AVdd) DECOUPLING

VCCP (CPU I/O) DECOUPLING

1x 330uF, 6x 0.1uF 0402

SYNC FROM T18 REMOVE NO STUFF CAPS C1220 TO C1231

CPU VCore HF and Bulk Decoupling

REMOVE C1244 & C1245 CHANGE C1240-C1243 AND C1260 FROM 128S0241(9 MILLI-OHM) TO 128S0231(6 MILLI-OHM)

PLACEMENT_NOTE (C1240-C1243):

4X 330UF. 20X 22UF 0805

805

Place inside socket cavity on secondary side.

2

1

C1206

22UF

20%

6.3V CERM-X5R

CRITICAL

32

1

C1260

20%

330UF

CRITICAL

POLY-TANT

PLACEMENT_NOTE=Place C1260 between CPU & NB.

D2T-SM2

2.0V

1

C1204

805

22UF

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

2

CRITICAL

2

1

C1216

805

22UF

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

22UF

2

1

C1214

805

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1208

805

22UF

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1203

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1207

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

22UF

2

1

C1202

805

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

C1201

2

1

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1213

CERM-X5R

6.3V

20%

805

22UF

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1212

22UF

805

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1211

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1219

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1200

805

22UF

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

22UF

C1210

2

1

805

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

2

CERM

1

C1261

20%

0.1UF

402

10V

2

1

C1205

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1209

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1215

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1217

CERM-X5R

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1262

20% CERM

0.1UF

402

10V

2

1

C1263

20% CERM

0.1UF

402

10V

2

1

C1264

20% CERM

0.1UF

402

10V

2

1

C1265

20% CERM

0.1UF

402

10V

2

1

C1266

20% CERM

0.1UF

402

10V

2

1

C1218

805

22UF

20%

6.3V CERM-X5R

Place inside socket cavity on secondary side.

CRITICAL

2

1

C1251

PLACEMENT_NOTE=Place C1281 near CPU pin B26.

0.01UF

16V CERM 402

10%

2

1

C1250

10uF

20% X5R

603

6.3V

3 2

1

C1240

Place on secondary side.

POLY-TANT

330UF

20%

CRITICAL

D2T-SM2

2.0V 2.0V

D2T-SM2

20%

330UF

CRITICAL

POLY-TANT

Place on secondary side.

C1241

1

23

2.0V

Place on secondary side.

1

23

CRITICAL

C1242

330UF

20%

POLY-TANT D2T-SM2

2.0V

D2T-SM2

20%

330UF

CRITICAL

POLY-TANT

Place on secondary side.

C1243

1

23

051-7537

A

12

109

SYNC_MASTER=RAYMOND

SYNC_DATE=03/31/2008

CPU Decoupling

=PP1V5_S0_CPU

=PPVCORE_S0_CPU

=PP1V05_S0_CPU

13D6 11C6

11D6

10D5

11B6

11B5

8D7

8B7

8D7

6D8

Preliminary

IN

BI

BI BI

OUT

IN

BI

IN

IN IN

OUT

OUT OUT

BI BI

OUT

IN

IN IN

IN OUT OUT OUT

OUT

NC

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

RENAME XDP_TDO TO XDP_TDO_CONN

RENAME JTAG_MCP_TDO TO JTAG_MCP_TDO_CONN

CHANGE STANDARD XDP CONNECTOR TO SMALLER ONE 516S0625

VCC_OBS_CD

TCK0

VCC_OBS_AB

HOOK3

516S0625

MCP79-specific pinout

SYNC FROM T18

OBSDATA_C0

OBSDATA_D3

TDO

TDI

ITPCLK/HOOK4 ITPCLK#/HOOK5

RESET#/HOOK6 DBR#/HOOK7

OBSFN_C0

OBSFN_D0

SCL

SDA

OBSFN_B1

OBSDATA_A0

OBSFN_A1

OBSFN_A0

OBSFN_B0

TRSTn

HOOK2

HOOK1

TMS XDP_PRESENT#

OBSDATA_B0 OBSDATA_D0

OBSDATA_A3

OBSDATA_D2

OBSDATA_C2

OBSFN_C1

OBSDATA_A2

TCK1

PWRGD/HOOK0

OBSDATA_B3

NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.

OBSDATA_C3

OBSDATA_C1

OBSDATA_B1

OBSDATA_B2

OBSDATA_D1

OBSFN_D1

OBSDATA_A1

10B2 14A3 71B3

1K

402

MF-LF

XDP

5%

1/16W

21

R1399

21C3 42D8 74B3

XDP

1%

MF-LF

54.9

402

1/16W

2

1

R1315

402

16V

10%

0.1uF

X5R

XDP

2

1

C1300

CRITICAL

6-1747769-0

F-ST-SM

9

87

60

6

59

58

5655

5453

5251

50

5

49

4847

4645

4443

4241

40

4

39

3837

3635

3433

3231

3029

2827

2625

2423

2221

2019

1817

1615

1413

1211

10

1

64

63

62

61

J1300

XDP_CONN

2

3

57

402

16V

10%

0.1uF

X5R

XDP

2

1

C1301

10C5 71A3

10C6 71A3

6C6 6C7

10A6 10C6 71A3

9B2

10D6 14A3 71C3

XDP

402

MF-LF

1/16W

5%

1K

PLACEMENT_NOTE=Place close to CPU to minimize stub.

21

R1303

10C6 71A3

6C5

21B7

6C5

21B7 23C5

6C5

21B7 23C5

19D7 74D3

6C5

21B7

6C3

14A3 71B3

6C3

6C6 6C7

10A6 10C6 71A3

6C6

10B6 10C6 71A3

6C6 6C7

10B6 10C6 71A3

10C6 26A3

19C4 23C5

SYNC_DATE=12/12/2007

051-7537

SYNC_MASTER=T18_MLB

13

A

109

eXtended Debug Port (XDP)

TP_XDP_OBSDATA_B0

XDP_BPM_L<2>

=PP3V3_S0_XDP =PP1V05_S0_CPU

FSB_CLK_ITP_P FSB_CLK_ITP_N

FSB_CPURST_L

CPU_PWRGD

XDP_BPM_L<4>

XDP_OBS20

XDP_DBRESET_L

XDP_TDO_CONN XDP_TRST_L XDP_TDI XDP_TMS

XDP_BPM_L<1>

XDP_BPM_L<5>

XDP_BPM_L<3>

XDP_BPM_L<0>

TP_XDP_OBSFN_B0 TP_XDP_OBSFN_B1

TP_XDP_OBSDATA_B1

TP_XDP_OBSDATA_B2 TP_XDP_OBSDATA_B3

XDP_PWRGD

PM_LATRIGGER_L JTAG_MCP_TCK

SMBUS_MCP_0_DATA SMBUS_MCP_0_CLK

XDP_TCK

XDP_CPURST_L

MCP_DEBUG<7>

MCP_DEBUG<6>

MCP_DEBUG<5>

JTAG_MCP_TMS

JTAG_MCP_TDI

MCP_DEBUG<3>

JTAG_MCP_TRST_L

JTAG_MCP_TDO_CONN

MCP_DEBUG<0> MCP_DEBUG<1>

MCP_DEBUG<2>

MCP_DEBUG<4>

12B6 11C6 10D5

8C5

8D7

6D8

71A3

Preliminary

IN IN IN

IN

OUT

BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI

BI BI

BI

BI BI BI

BI

IN

BI

OUT

OUT OUT OUT

OUT OUT

OUT OUT OUT OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT OUT

IN

BI BI

CPU_BR0#

CPU_BNR#

BCLK_OUT_NB_N

CPU_BR1#

CPU_REQ4#

CPU_ADS#

CPU_A27#

CPU_A26#

CPU_A25#

CPU_A34#

CPU_D62#

CPU_D61#

CPU_D60#

CPU_A28# CPU_A29# CPU_A30# CPU_A31# CPU_A32#

CPU_A22# CPU_A23# CPU_A24#

CPU_REQ3#

CPU_REQ2#

CPU_DBI3#

CPU_D14#

CPU_D13#

CPU_D12#

CPU_D11#

CPU_D10#

CPU_DPWR#

CPU_RS1#

BCLK_VML_COMP_GND

CPU_COMP_VCC

CPU_TRDY#

CPU_PROCHOT#

CPU_BSEL0

CPU_RS2#

CPU_BSEL1

BCLK_IN_P

BCLK_OUT_CPU_N

CPU_PWRGD

CPU_DSTBP0#

CPU_DSTBP1#

CPU_DBI1#

CPU_DBI0#

CPU_DSTBN1#

CPU_DSTBN0#

CPU_DBI2#

CPU_DSTBP2# CPU_DSTBN2#

CPU_DSTBP3#

CPU_A4#

CPU_DSTBN3#

CPU_A3#

CPU_A5#

CPU_A9#

CPU_A8#

CPU_A6# CPU_A7#

CPU_A12#

CPU_A14#

CPU_A13#

CPU_A11#

CPU_A15# CPU_A16#

CPU_A19#

CPU_A17# CPU_A18#

CPU_A20# CPU_A21#

CPU_A35#

CPU_A33#

CPU_ADSTB0#

CPU_REQ0#

CPU_LOCK#

CPU_HIT# CPU_HITM#

CPU_FERR#

CPU_THERMTRIP#

CPU_PECI

CPU_COMP_GND

CPU_D0# CPU_D1#

CPU_D3#

CPU_D2#

CPU_D4# CPU_D5# CPU_D6#

CPU_D8#

CPU_D7#

CPU_D9#

CPU_D15#

CPU_D17# CPU_D18#

CPU_D16#

CPU_D19# CPU_D20# CPU_D21#

CPU_D23#

CPU_D22#

CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31# CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36#

CPU_D38#

CPU_D37#

CPU_D39# CPU_D40# CPU_D41#

CPU_D43#

CPU_D42#

CPU_D44# CPU_D45# CPU_D46# CPU_D47#

CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59#

CPU_D63#

CPU_BPRI#

CPU_DEFER#

BCLK_OUT_CPU_P

BCLK_OUT_ITP_P BCLK_OUT_ITP_N

BCLK_OUT_NB_P

BCLK_IN_N

CPU_A20M#

CPU_NMI

CPU_INTR

CPU_SMI#

CPU_RESET#

CPU_SLP#

CPU_DPSLP#

CPU_STPCLK# CPU_DPRSTP#

CPU_D51#

CPU_D50#

CPU_D49#

CPU_D48#

CPU_ADSTB1#

CPU_IGNNE#

CPU_INIT#

BCLK_VML_COMP_VDD

CPU_RS0#

+V_DLL_DLCELL_AVDD +V_PLL_MCLK +V_PLL_FSB +V_PLL_CPU

CPU_A10#

CPU_BSEL2

CPU_DBSY# CPU_DRDY#

CPU_REQ1#

FSB

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Loop-back clock for delay matching.

(MCP_BSEL<2>) (MCP_BSEL<1>) (MCP_BSEL<0>)

20 mA 29 mA 15 mA

206 mA

270 mA (A01)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

9C1

10C8 71C3

9B2

10D6 13B2 71C3

10B2 71D3

10C4 71D3

10B4 71D3

10C2 71D3

10B2 71D3

10D8 71D3

10C8 71C3

10C4 71D3

10B4 71D3

10C2 71D3

10B2 71D3

10D8 71C3

10C8 71C3

10D8 71C3

10D6 71C3

9B2

10D6 71C3

10C6 71C3

10D6 71C3

10C6 71C3

10D6 71C3

10B6 71B3

13C3 71B3

13B3 71B3

10D6 71C3

10C8 71C3

10D6 71C3

9B2

10B8 71C3

9B2

10B8 71C3

10B8 71B3

10B2 13C7 71B3

10A2 71B3

10B2 71B3

10B8 71B3

9B2

10B2 60C7 71B3

9C4

10C5 40D4 60C8 71B3

10C6 40C4 71B3

10C8 71C3

49.9

1/16W

1%

402

MF-LF

R1436

1

2

1/16W

1%

402

MF-LF

49.9

R1431

1

2

49.9

MF-LF

402

1%

1/16W

R1430

1

2

49.9

1/16W

1%

402

MF-LF

R1435

1

2

NO STUFF

1K

402

5% 1/16W MF-LF

R1422

1

2

1K

NO STUFF

402

MF-LF

5%

1/16W

R1421

1

2

1K

5%

402

MF-LF

NO STUFF

1/16W

R1420

1

2

1/16W

402

MF-LF

62

5%

R1415

1

2

1/16W

402

MF-LF

54.9

1%

R1410

1

2

NO STUFF

150

1/16W

402

MF-LF

5%

R1440

1

2

OMIT

MCP79-TOPO-B

(1 OF 11)

BGA

U1400

AK41

AJ40

G41

G42

AL42

AL43

AK42

AL41

AM40

AM39

AF35

AG35

AG39 AE33

AG37 AG38

AG34

AN38 AL39

AG33

AL33

AF41

AJ33

AN36

AJ35 AJ37

AJ36 AJ38

AL37

AL34 AN37

AC34

AJ34

AL38 AL35

AN34

AR39 AN35

AE38

AE34

AC37 AE37

AE35

AB35

AD42

AE36

AK35

AD43

AA41

AE40

AL32

F41

D42

F42

AM42

AM43

Y43

W42

R42 T39

T42 T41

R41

T43 W35

AA37

W33 W34

Y40

AA36

AA34 AA38

AA35 U38

U36

U35 U33

U34

W38

W41

R33

U37

N34 N33

R34 R35

P35

R39 R37

R38

Y39

L37 L39

L38

N36 N38

J39 J38

J37

L42 M42

V42

P41

N41 N40

M40

H40 K42

H41 L41

H43

H42

Y41

K41

J40

H39 M43

Y42 P42

U41

V41

V35

N35

J41

AD39

AA40

AN32

AN33 AM32

AD41

U40

W37

L36

M41

T40

W39

N37

M39

AH40

AB42 AD40

AH39

AH42 AF42

AC43

AG41

E41

AJ41

AH43

AC38

AA33 AC39

AC33

AC35

H38

AC41 AB41

AC42

AM33

AH41

AG42

AG43

AE41

AG27

AH28

AG28

AH27

1/16W

402

MF-LF

62

5%

R1416

1

2

A

SYNC_DATE=04/04/2008

MCP CPU Interface

051-7537

109

14

SYNC_MASTER=T18_MLB

PM_THRMTRIP_L

FSB_D_L<13>

MCP_BCLK_VML_COMP_GND

FSB_DPWR_L

CPU_DPSLP_L

FSB_D_L<38>

FSB_D_L<43>

FSB_D_L<45>

CPU_DPRSTP_L

CPU_STPCLK_L

FSB_CPUSLP_L

FSB_CPURST_L

CPU_PWRGD

CPU_SMI_L

CPU_NMI

CPU_INTR

CPU_INIT_L

CPU_IGNNE_L

CPU_A20M_L

FSB_CLK_MCP_P FSB_CLK_MCP_N

FSB_CLK_ITP_N

FSB_CLK_ITP_P

FSB_CLK_CPU_N

FSB_CLK_CPU_P

FSB_DEFER_L

FSB_BPRI_L

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<57>

FSB_D_L<56>

FSB_D_L<55>

FSB_D_L<54>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_D_L<47>

FSB_D_L<46>

FSB_D_L<44>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

FSB_D_L<32>

FSB_D_L<31>

FSB_D_L<30>

FSB_D_L<29>

FSB_D_L<28>

FSB_D_L<27>

FSB_D_L<26>

FSB_D_L<25>

FSB_D_L<24>

FSB_D_L<23>

FSB_D_L<22>

FSB_D_L<21>

FSB_D_L<20>

FSB_D_L<19>

FSB_D_L<18>

FSB_D_L<17>

FSB_D_L<16>

FSB_D_L<15>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<10>

FSB_D_L<9>

FSB_D_L<8>

FSB_D_L<6>

FSB_D_L<5>

FSB_D_L<4>

FSB_D_L<3>

FSB_D_L<2>

FSB_D_L<1>

FSB_D_L<0>

MCP_CPU_COMP_GND

MCP_CPU_COMP_VCC

MCP_BCLK_VML_COMP_VDD

FSB_RS_L<2>

FSB_RS_L<1>

CPU_PROCHOT_L

CPU_PECI_MCP

FSB_TRDY_L

FSB_LOCK_L

FSB_HITM_L

FSB_HIT_L

FSB_REQ_L<4>

FSB_REQ_L<3>

FSB_REQ_L<2>

FSB_REQ_L<1>

FSB_REQ_L<0>

FSB_ADSTB_L<1>

FSB_ADSTB_L<0>

FSB_A_L<35>

FSB_A_L<32>

FSB_A_L<31>

FSB_A_L<30>

FSB_A_L<29>

FSB_A_L<28>

FSB_A_L<27>

FSB_A_L<26>

FSB_A_L<24>

FSB_A_L<23>

FSB_A_L<22>

FSB_A_L<21>

FSB_A_L<20>

FSB_A_L<19>

FSB_A_L<18>

FSB_A_L<17>

FSB_A_L<16>

FSB_A_L<15>

FSB_A_L<14>

FSB_A_L<13>

FSB_A_L<12>

FSB_A_L<11>

FSB_A_L<9>

FSB_A_L<8>

FSB_A_L<7>

FSB_A_L<6>

FSB_A_L<5>

FSB_A_L<4>

FSB_A_L<3>

FSB_DINV_L<3>

FSB_DSTB_L_N<3>

FSB_DSTB_L_P<3>

FSB_DINV_L<2>

FSB_DSTB_L_N<2>

FSB_DSTB_L_P<2>

FSB_DINV_L<1>

FSB_DSTB_L_N<1>

FSB_DSTB_L_P<1>

FSB_DINV_L<0>

FSB_DSTB_L_N<0>

FSB_DSTB_L_P<0>

=PP1V05_S0_MCP_FSB

PP1V05_S0_MCP_PLL_FSB

FSB_D_L<14>

FSB_D_L<7>

FSB_A_L<10>

FSB_A_L<25>

FSB_A_L<34>

FSB_A_L<33>

FSB_DBSY_L FSB_DRDY_L

FSB_BNR_L

FSB_RS_L<0>

CPU_FERR_L

FSB_BREQ0_L

FSB_ADS_L

FSB_BREQ1_L

=PP1V05_S0_MCP_FSB

=MCP_BSEL<2>

=MCP_BSEL<0>

=MCP_BSEL<1>

24C8

22D3

14B7

14A2

9C2

71B3

8D7

24C2

71C3

8D7

Preliminary

0A

MEMORY

MEMORY PARTITION 0

CONTROL

MCKE0A_1 MCKE0A_0

MODT0A_1 MODT0A_0

MCS0A_0#

MCS0A_1#

MCLK0A_0_N

MCLK0A_0_P

MCLK0A_1_N

MCLK0A_2_N

MCLK0A_1_P

MCLK0A_2_P

MA0_0

MA0_1

MA0_2

MA0_3

MA0_4

MA0_5

MA0_6

MA0_8 MA0_7

MA0_9

MA0_10

MA0_11

MA0_13 MA0_12

MA0_14

MBA0_2

MBA0_0

MBA0_1

MWE0#

MCAS0#

MRAS0#

MDQS0_0_P MDQS0_0_N

MDQS0_1_P

MDQS0_2_N

MDQS0_1_N

MDQS0_2_P

MDQS0_3_N

MDQS0_4_P

MDQS0_3_P

MDQS0_4_N

MDQS0_5_N

MDQS0_5_P

MDQS0_6_N

MDQS0_6_P

MDQS0_7_N

MDQS0_7_P

MDQM0_2 MDQM0_1 MDQM0_0

MDQM0_3

MDQM0_4

MDQ0_0

MDQM0_7

MDQM0_5

MDQM0_6

MDQ0_1

MDQ0_4 MDQ0_3 MDQ0_2

MDQ0_5

MDQ0_6

MDQ0_9 MDQ0_8 MDQ0_7

MDQ0_10

MDQ0_11

MDQ0_15 MDQ0_14 MDQ0_13 MDQ0_12

MDQ0_16

MDQ0_21 MDQ0_20

MDQ0_18

MDQ0_19

MDQ0_17

MDQ0_25 MDQ0_24 MDQ0_23 MDQ0_22

MDQ0_26

MDQ0_29 MDQ0_28 MDQ0_27

MDQ0_30

MDQ0_31

MDQ0_35 MDQ0_34

MDQ0_32

MDQ0_36

MDQ0_33

MDQ0_41

MDQ0_37

MDQ0_38

MDQ0_40 MDQ0_39

MDQ0_42

MDQ0_47 MDQ0_46

MDQ0_43

MDQ0_45 MDQ0_44

MDQ0_51 MDQ0_50 MDQ0_49

MDQ0_52

MDQ0_48

MDQ0_55 MDQ0_54 MDQ0_53

MDQ0_56

MDQ0_57

MDQ0_61 MDQ0_60

MDQ0_58

MDQ0_59

MDQ0_62

MDQ0_63

OUT

OUT OUT OUT OUT OUT OUT

BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT OUT

OUT OUT

BI BI

BI

BI BI

BI

BI BI BI BI

BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

MEMORY

CONTROL

1A

MEMORY PARTITION 1

MDQ1_63

MDQ1_60 MDQ1_59

MDQ1_62

MDQ1_58

MDQ1_61

MDQ1_57

MDQ1_53

MDQ1_56 MDQ1_55 MDQ1_54

MDQ1_52

MDQ1_49

MDQ1_51 MDQ1_50

MDQ1_48 MDQ1_47 MDQ1_46

MDQ1_43

MDQ1_44

MDQ1_45

MDQ1_42 MDQ1_41

MDQ1_37

MDQ1_38

MDQ1_39

MDQ1_36 MDQ1_35

MDQ1_32

MDQ1_33

MDQ1_34

MDQ1_31 MDQ1_30

MDQ1_27

MDQ1_28

MDQ1_29

MDQ1_22

MDQ1_26 MDQ1_25 MDQ1_24 MDQ1_23

MDQ1_17

MDQ1_19

MDQ1_20

MDQ1_18

MDQ1_21

MDQ1_16

MDQ1_12

MDQ1_13

MDQ1_14

MDQ1_15

MDQ1_11 MDQ1_10

MDQ1_7

MDQ1_8

MDQ1_9

MDQ1_3

MDQ1_6

MDQ1_2

MDQ1_4

MDQ1_5

MDQ1_1

MDQM1_6 MDQM1_5

MDQ1_0

MDQM1_7

MDQM1_4 MDQM1_3

MDQM1_0

MDQM1_1

MDQM1_2

MDQ1_40

MDQS1_7_P

MDQS1_6_N

MDQS1_6_P

MDQS1_7_N

MDQS1_5_N

MDQS1_5_P

MDQS1_4_P

MDQS1_3_P

MDQS1_4_N

MDQS1_2_P

MDQS1_3_N

MDQS1_1_P

MDQS1_2_N

MDQS1_1_N MDQS1_0_P MDQS1_0_N

MRAS1# MCAS1#

MWE1#

MBA1_2 MBA1_1 MBA1_0

MA1_14 MA1_13 MA1_12 MA1_11 MA1_10

MA1_9 MA1_8 MA1_7 MA1_6 MA1_5 MA1_4 MA1_3 MA1_2 MA1_1 MA1_0

MCLK1A_2_P

MCLK1A_1_P

MCLK1A_2_N

MCLK1A_0_P

MCLK1A_1_N

MCS1A_1# MCS1A_0#

MCLK1A_0_N

MODT1A_1 MODT1A_0

MCKE1A_0

MCKE1A_1

BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

OUT

BI

OUT OUT OUT OUT OUT OUT OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

BGA

MCP79-TOPO-B

OMIT

(2 OF 11)

U1400

AR19

AT19

AN19

AW21

AN23

AU15

AR23

AU19

AV19

AN21

AR21

AP21

AU21

AR22

AV21

AW17

AP19

AP23

AP17

AT23

AU23

BC20

BB20

AY24

BA24

AV33

AW33

AR18

AT15

AP35

AR35

AV31

AT31

AW37

AV37

AR33

AU31

AN31

AV29

AN29

AV27

AW38

AR31

AP31

AR29

AP29

AR27

AP27

AR25

AP25

AU27

AT27

AV38

AU25

AR26

AU13

AR14

AT11

AR11

AW13

AV13

AV11

AU11

AR38

AV9

AU9

AY5

AW6

AP11

AW9

AU8

AU7

AV5

AU6

AR37

AR5

AN10

AW5

AV6

AR7

AR6

AN7

AN6

AL7

AL6

AV39

AN9

AP9

AL9

AL8

AW39

AU37

AT37

AR34

AV35

AW29

AN27

AN13

AR10

AU5

AN5

AT39

AU39

AU35

AT35

AU29

AU30

AW25

AV25

AR13

AP13

AW8

AW7

AR9

AR8

AL11

AL10

AV15

AP15

AV17

AR17

28B5 72C3

28A7 72C3

28B7 72C3

28B5 72C3

28C2 72C3

28B4 72C3

28C2 72C3

28C4 72C3

28D4 72D3

28A5 72D3

28A7 72D3

28A5 72D3

28B5 72D3

28B7 72D3

28B5 72D3

28B7 72D3

28B5 72D3

28B7 72D3

28B5 72D3

28B7 72D3

28B5 72D3

28B7 72D3

28B5 72D3

28B7 72D3

28C2 72D3

28C4 72D3

28C2 72D3

28C4 72D3

28B4 72D3

28B2 72D3

28B4 72D3

28C4 72D3

28B2 72D3

28C2 72D3

28B4 72D3

28C4 72D3

28C2 72D3

28C4 72D3

28C2 72D3

28C4 72D3

28C2 72D3

28C4 72D3

28D2 72D3

28C2 72D3

28C4 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28C7 72D3

28C5 72D3

28D5 72D3

28D7 72D3

28A5 72C3

28B7 72C3

28B5 72C3

28B7 72C3

28C4 72C3

28B2 72C3

28C4 72C3

28C2 72C3

29A5 72A3

29B7 72A3

29B5 72A3

29B7 72A3

29B2 72A3

29B7 72A3

29B2 72A3

29C4 72A3

29C2 72A3

29A5 72B3

29A7 72B3

29A5 72B3

29A7 72B3

29A5 72B3

29B7 72B3

29A7 72B3

29B7 72B3

29B5 72B3

29B7 72B3

29B5 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29C7 72B3

29C5 72B3

29D5 72B3

29D7 72B3

BGA

MCP79-TOPO-B

OMIT

(3 OF 11)

U1400

BA18

BB25

BA17

BC28

AW28

BA14

BA29

BA25

BB26

BA26

BA27

AY27

BA28

AY28

BB28

BB17

BB18

BB29

BA15

BB30

AY31

AY19

BA19

BA22

BB22

BB42

BA42

BB16

BB14

AP42

AR41

BC40

BA40

AV41

AV42

AW40

BB40

AY39

BA38

BB36

BA36

AU41

AY40

BA39

AW36

BC36

AY35

BA34

BB32

BA32

AY36

BA35

AU40

AW32

BC32

BA12

AY12

BB9

BB8

AW12

BB12

BB10

BA9

AN40

AY8

BA7

BC4

BB4

BC8

BA8

BA5

BB5

BB2

BA3

AP41

AW3

AW4

BC3

BB3

AY3

AY4

AU3

AU2

AR3

AR4

AT41

AV3

AV2

AT3

AT4

AT40

AW41

AW42

AR42

AY43

BB38

BB34

BA11

AY7

BA2

AT5

AT43

AT42

AY42

BA43

BA37

BB37

BA33

BB33

AY11

BA10

BA6

BB6

AY1

AY2

AT1

AT2

AY15

BB13

AW16

BA16

29B7 72B3

29B5 72B3

29B7 72B3

29B5 72B3

29B7 72B3

29B5 72B3

29B7 72B3

29B5 72B3

29B7 72B3

29B5 72B3

29B4 72B3

29B2 72B3

29C2 72B3

29B4 72B3

29B2 72B3

29B4 72B3

29C4 72B3

29C2 72B3

29C4 72B3

29C2 72B3

29C4 72B3

29C2 72B3

29C4 72B3

29C2 72B3

29C4 72B3

29C2 72B3

29C4 72B3

29C2 72B3

29C4 72B3

29D2 72B3

29C4 72B3

29D4 72B3

29C2 72B3

29A7 72A3

29C4 72B3

29B5 72A3

29B7 72B3

29B5 72B3

29B4 72B3

29C2 72B3

29C4 72B3

109

051-7537

A

15

SYNC_MASTER=T18_MLB

SYNC_DATE=04/04/2008

MCP Memory Interface

MEM_B_DM<0>

MEM_B_DM<1>

MEM_B_DM<2>

MEM_B_DM<3>

MEM_B_DM<4>

MEM_B_DM<5>

MEM_B_DM<6>

MEM_B_DM<7>

MEM_B_DQ<0>

MEM_B_DQ<1>

MEM_B_DQ<2>

MEM_B_DQ<3>

MEM_B_DQ<4>

MEM_B_DQ<5>

MEM_B_DQ<6>

MEM_B_DQ<7>

MEM_B_DQ<8>

MEM_B_DQ<9>

MEM_B_DQ<10>

MEM_B_DQ<11>

MEM_B_DQ<12>

MEM_B_DQ<13>

MEM_B_DQ<14>

MEM_B_DQ<15>

MEM_B_DQ<16>

MEM_B_DQ<17>

MEM_B_DQ<18>

MEM_B_DQ<19>

MEM_B_DQ<20>

MEM_B_DQ<21>

MEM_B_DQ<22>

MEM_B_DQ<23>

MEM_B_DQ<24>

MEM_B_DQ<25>

MEM_B_DQ<26>

MEM_B_DQ<27>

MEM_B_DQ<28>

MEM_B_DQ<29>

MEM_B_DQ<30>

MEM_B_DQ<31>

MEM_B_DQ<32>

MEM_B_DQ<33>

MEM_B_DQ<34>

MEM_B_DQ<35>

MEM_B_DQ<36>

MEM_B_DQ<37>

MEM_B_DQ<38>

MEM_B_DQ<39>

MEM_B_DQ<40>

MEM_B_DQ<41>

MEM_B_DQ<42>

MEM_B_DQ<43>

MEM_B_DQ<44>

MEM_B_DQ<45>

MEM_B_DQ<46>

MEM_B_DQ<47>

MEM_B_DQ<48>

MEM_B_DQ<49>

MEM_B_DQ<50>

MEM_B_DQ<51>

MEM_B_DQ<52>

MEM_B_DQ<53>

MEM_B_DQ<54>

MEM_B_DQ<55>

MEM_B_DQ<56>

MEM_B_DQ<57>

MEM_B_DQ<58>

MEM_B_DQ<59>

MEM_B_DQ<60>

MEM_B_DQ<61>

MEM_B_DQ<62>

MEM_B_DQ<63>

MEM_A_DM<0>

MEM_A_DM<1>

MEM_A_DM<2>

MEM_A_DM<3>

MEM_A_DM<4>

MEM_A_DM<5>

MEM_A_DM<6>

MEM_A_DM<7>

MEM_A_DQ<0>

MEM_A_DQ<1>

MEM_A_DQ<2>

MEM_A_DQ<3>

MEM_A_DQ<4>

MEM_A_DQ<5>

MEM_A_DQ<6>

MEM_A_DQ<7>

MEM_A_DQ<8>

MEM_A_DQ<9>

MEM_A_DQ<10>

MEM_A_DQ<11>

MEM_A_DQ<12>

MEM_A_DQ<13>

MEM_A_DQ<14>

MEM_A_DQ<15>

MEM_A_DQ<16>

MEM_A_DQ<17>

MEM_A_DQ<18>

MEM_A_DQ<19>

MEM_A_DQ<20>

MEM_A_DQ<21>

MEM_A_DQ<22>

MEM_A_DQ<23>

MEM_A_DQ<24>

MEM_A_DQ<25>

MEM_A_DQ<26>

MEM_A_DQ<27>

MEM_A_DQ<28>

MEM_A_DQ<29>

MEM_A_DQ<30>

MEM_A_DQ<31>

MEM_A_DQ<32>

MEM_A_DQ<33>

MEM_A_DQ<34>

MEM_A_DQ<35>

MEM_A_DQ<36>

MEM_A_DQ<37>

MEM_A_DQ<38>

MEM_A_DQ<39>

MEM_A_DQ<40>

MEM_A_DQ<41>

MEM_A_DQ<42>

MEM_A_DQ<43>

MEM_A_DQ<44>

MEM_A_DQ<45>

MEM_A_DQ<46>

MEM_A_DQ<47>

MEM_A_DQ<48>

MEM_A_DQ<49>

MEM_A_DQ<50>

MEM_A_DQ<51>

MEM_A_DQ<52>

MEM_A_DQ<53>

MEM_A_DQ<54>

MEM_A_DQ<55>

MEM_A_DQ<56>

MEM_A_DQ<57>

MEM_A_DQ<58>

MEM_A_DQ<59>

MEM_A_DQ<60>

MEM_A_DQ<61>

MEM_A_DQ<62>

MEM_A_DQ<63>

MEM_B_CKE<0>

MEM_B_CKE<1>

MEM_B_ODT<0>

MEM_B_ODT<1>

MEM_B_CS_L<0>

MEM_B_CS_L<1>

MEM_B_CLK_N<0>

MEM_B_CLK_P<0>

MEM_B_CLK_N<1>

MEM_B_CLK_P<1>

TP_MEM_B_CLK2N

TP_MEM_B_CLK2P

MEM_B_A<0>

MEM_B_A<1>

MEM_B_A<2>

MEM_B_A<3>

MEM_B_A<4>

MEM_B_A<5>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<8>

MEM_B_A<9>

MEM_B_A<10>

MEM_B_A<11>

MEM_B_A<12>

MEM_B_A<13>

MEM_B_A<14>

MEM_B_BA<0>

MEM_B_BA<1>

MEM_B_BA<2>

MEM_B_WE_L

MEM_B_CAS_L

MEM_B_RAS_L

MEM_B_DQS_N<0>

MEM_B_DQS_P<0>

MEM_B_DQS_N<1>

MEM_B_DQS_P<1>

MEM_B_DQS_N<2>

MEM_B_DQS_P<2>

MEM_B_DQS_N<3>

MEM_B_DQS_P<3>

MEM_B_DQS_N<4>

MEM_B_DQS_P<4>

MEM_B_DQS_N<5>

MEM_B_DQS_P<5>

MEM_B_DQS_N<6>

MEM_B_DQS_P<6>

MEM_B_DQS_N<7>

MEM_B_DQS_P<7>

MEM_A_CKE<0>

MEM_A_CKE<1>

MEM_A_ODT<0>

MEM_A_ODT<1>

MEM_A_CS_L<0>

MEM_A_CS_L<1>

MEM_A_CLK_N<0>

MEM_A_CLK_P<0>

MEM_A_CLK_N<1>

MEM_A_CLK_P<1>

TP_MEM_A_CLK2N

TP_MEM_A_CLK2P

MEM_A_A<0>

MEM_A_A<1>

MEM_A_A<2>

MEM_A_A<3>

MEM_A_A<4>

MEM_A_A<5>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<10>

MEM_A_A<11>

MEM_A_A<12>

MEM_A_A<13>

MEM_A_A<14>

MEM_A_BA<0>

MEM_A_BA<1>

MEM_A_BA<2>

MEM_A_WE_L

MEM_A_CAS_L

MEM_A_RAS_L

MEM_A_DQS_N<0>

MEM_A_DQS_P<0>

MEM_A_DQS_N<1>

MEM_A_DQS_P<1>

MEM_A_DQS_N<2>

MEM_A_DQS_P<2>

MEM_A_DQS_N<3>

MEM_A_DQS_P<3>

MEM_A_DQS_N<4>

MEM_A_DQS_P<4>

MEM_A_DQS_N<5>

MEM_A_DQS_P<5>

MEM_A_DQS_N<6>

MEM_A_DQS_P<6>

MEM_A_DQS_N<7>

MEM_A_DQS_P<7>

Preliminary

MCLK1B_2_P

MCLK1B_1_N

MCLK1B_0_P

MCLK1B_1_P

MCLK1B_2_N

MCS1B_1#

MCS1B_0#

MCLK1B_0_N

MODT1B_0

MCKE1B_1

MCKE1B_0

MODT1B_1

MRESET0#

GND55 GND56 GND57 GND58

GND60

GND59

GND61 GND62 GND63 GND64

GND52 GND53 GND54

GND51

GND49 GND50

GND48

GND47

GND46

GND44 GND45

GND43

GND42

GND41

GND39 GND40

GND38

GND37

GND36

GND35

GND33 GND34

GND32

GND31

GND30

GND28 GND29

GND27

GND26

GND25

GND24

GND18 GND19

GND17

GND16

GND15

GND13 GND14

GND10

GND12

GND11

GND8 GND9

GND7

GND6

GND5

GND2 GND3 GND4

GND1

MEM_COMP_VDD MEM_COMP_GND

MODT0B_0 MODT0B_1

MCKE0B_1

MCKE0B_0

MCLK0B_0_N

MCS0B_0# MCS0B_1#

MCLK0B_2_N

MCLK0B_1_P

MCLK0B_0_P

MCLK0B_1_N

MCLK0B_2_P

+V_PLL_XREF_XS

+V_PLL_CORE +V_VPLL

+VDD_MEM1 +VDD_MEM2 +VDD_MEM3 +VDD_MEM4 +VDD_MEM5 +VDD_MEM6 +VDD_MEM7 +VDD_MEM8

+VDD_MEM9 +VDD_MEM10 +VDD_MEM11

+VDD_MEM14 +VDD_MEM15 +VDD_MEM16 +VDD_MEM17 +VDD_MEM18 +VDD_MEM19 +VDD_MEM20

+VDD_MEM22

+VDD_MEM21

+VDD_MEM23 +VDD_MEM24 +VDD_MEM25 +VDD_MEM26

+VDD_MEM30

+VDD_MEM27

+VDD_MEM29

+VDD_MEM31 +VDD_MEM32 +VDD_MEM33 +VDD_MEM34

+VDD_MEM38 +VDD_MEM39 +VDD_MEM40 +VDD_MEM41

+VDD_MEM43 +VDD_MEM44 +VDD_MEM45

+VDD_MEM42

+V_PLL_DP

+VDD_MEM13

+VDD_MEM12

+VDD_MEM28

+VDD_MEM37

+VDD_MEM36

+VDD_MEM35

GND21

GND20

GND22 GND23

MEMORY CONTROL 0B

MEMORY CONTROL 1B

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

4771 mA (A01, DDR3)

17 mA 12 mA

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

19 mA

TP or NC for DDR2.

39 mA

87 mA (A01)

1%

40.2

1/16W

402

MF-LF

R1610

1

2

MF-LF

402

1%

1/16W

40.2

R1611

1

2

(4 OF 11)

MCP79-TOPO-B

OMIT

BGA

U1400

AA22

AA39

AB22

AB7

AD22

AE20 AF24

AG24 AH35

AK7

AM28

AP12

AT25

AP30

AR36 AU10

F28

BC21

AY9

BC9 D34

F24

G30

G32 H31

K7

M38

M5

M6

M7 M9

N39

N8

P10

P33

P34 P37

P4

P40

P7

R36

R40 R43

R5

T10

T18

T20

AK11

T24

T26

T33

T34

T35 T37

T38

T6

T7

T9

U18 U20

U22

V10

V34

W5

AV23

AN25

BA30

BA31

BB21

BA21

BC24

BB24

AU34

AU33

AY20

BA20

BA23

AY23

BB41

BA41

AU17 AR15

BC16 BA13

AM41

AN41

AN17

AN15

AY16

BC13

AY32

U27

U28

T27

T28

AM17

AN20 AN24

AT17

AP16 AN22

AP20

AP24 AV16

AR16 AR20

AM19

AR24

AW15 AP22

AP18

AU16 AN18

AU24

AT21 AY29

AV24

AM21

AU20

AU22

AW27 BC17

AV20

AY17 AY18

AM15

AU18 AY25

AM23

AY26 AW19

AW24

BC25 AL30

AM31

AM25 AM27

AM29 AN16

BC29

30B6

MCP Memory Misc

16

109

A

051-7537

SYNC_DATE=04/04/2008

SYNC_MASTER=T18_MLB

TP_MEM_B_CKE<3>

TP_MEM_B_CKE<2>

TP_MEM_B_CS_L<2>

MCP_MEM_RESET_L

=PP1V8R1V5_S0_MCP_MEM

MCP_MEM_COMP_GND

TP_MEM_A_CLK4N

TP_MEM_A_CLK3P

TP_MEM_A_ODT<2> TP_MEM_A_ODT<3>

TP_MEM_A_CKE<2> TP_MEM_A_CKE<3>

TP_MEM_A_CLK5P TP_MEM_A_CLK5N

TP_MEM_A_CLK4P

TP_MEM_A_CLK3N

TP_MEM_A_CS_L<2> TP_MEM_A_CS_L<3>

PP1V05_S0_MCP_PLL_CORE

TP_MEM_B_CLK5P TP_MEM_B_CLK5N

TP_MEM_B_CLK4P TP_MEM_B_CLK4N

TP_MEM_B_CLK3P TP_MEM_B_CLK3N

TP_MEM_B_CS_L<3>

TP_MEM_B_ODT<2> TP_MEM_B_ODT<3>

=PP1V8R1V5_S0_MCP_MEM

MCP_MEM_COMP_VDD

24C8

16C7

16C3

8B7

72A3

24B2

8B7

72A3

Preliminary

PE0_RX0_P

PE0_RX2_N

+AVDD0_PEX11

+AVDD0_PEX7 +AVDD0_PEX8

+AVDD1_PEX3

+AVDD1_PEX2

+AVDD1_PEX1

+AVDD0_PEX13

+AVDD0_PEX12

+AVDD0_PEX10

+AVDD0_PEX9

+AVDD0_PEX6

+AVDD0_PEX5

+AVDD0_PEX4

+AVDD0_PEX3

+AVDD0_PEX2

+AVDD0_PEX1

+V_PLL_PEX

+DVDD1_PEX2

+DVDD1_PEX1

+DVDD0_PEX8

+DVDD0_PEX7

+DVDD0_PEX6

+DVDD0_PEX5

+DVDD0_PEX4

+DVDD0_PEX3

+DVDD0_PEX2

+DVDD0_PEX1

PE0_RX0_N

PE0_RX2_P

PE0_RX4_P

PE0_RX6_P

PEB_PRSNT#

PE1_TX3_N

PE1_TX3_P

PE1_TX2_N

PE1_TX1_N

PE1_TX2_P

PE1_TX0_N

PE1_TX1_P

PE6_REFCLK_N

PEX_RST0#

PE1_TX0_P

PE5_REFCLK_N

PE5_REFCLK_P

PE6_REFCLK_P

PE4_REFCLK_N

PE4_REFCLK_P

PE3_REFCLK_N

PE2_REFCLK_N

PE1_REFCLK_N

PE2_REFCLK_P

PE0_REFCLK_N

PE0_REFCLK_P

PE1_REFCLK_P

PE0_TX15_N

PE0_TX14_N PE0_TX15_P

PE0_TX13_N PE0_TX14_P

PE0_TX12_N

PE0_TX12_P

PE0_TX13_P

PE0_TX11_N

PE0_TX11_P

PE0_TX10_N

PE0_TX9_N PE0_TX10_P

PE0_TX8_N

PE0_TX8_P

PE0_TX9_P

PE0_TX7_N

PE0_TX7_P

PE0_TX6_N

PE0_TX5_N

PE0_TX6_P

PE0_TX4_N

PE0_TX5_P

PE0_TX3_N

PE0_TX3_P

PE0_TX4_P

PE0_TX2_N

PE0_TX2_P

PE0_TX0_N

PE0_TX1_N

PE0_TX1_P

PE0_TX0_P

PEX_CLK_COMP

PE1_RX3_N

PE1_RX3_P

PE1_RX2_N

PE1_RX0_N

PE1_RX1_P

PE1_RX2_P

PE1_RX1_N

PE_WAKE#

PE1_RX0_P

PE0_PRSNT_16#

PE0_RX13_N PE0_RX14_P

PE0_RX15_P

PE0_RX14_N

PE0_RX15_N

PE0_RX12_P

PE0_RX11_P

PE0_RX13_P

PE0_RX11_N

PE0_RX12_N

PE0_RX10_N

PE0_RX8_P

PE0_RX9_P

PE0_RX10_P

PE0_RX8_N

PE0_RX9_N

PE0_RX5_N

PE0_RX7_P

PE0_RX6_N

PE0_RX7_N

PE0_RX3_P

PE0_RX5_P

PE0_RX3_N

PE0_RX4_N

PE0_RX1_P PE0_RX1_N

PEC_PRSNT#

PEC_CLKREQ#/GPIO_50

PE3_REFCLK_P

PED_CLKREQ#/GPIO_51

PED_PRSNT#

PEB_CLKREQ#/GPIO_49

PEE_CLKREQ#/GPIO_16 PEE_PRSNT#/GPIO_46

PEF_CLKREQ#/GPIO_17 PEF_PRSNT#/GPIO_47

PEG_CLKREQ#/GPIO_18 PEG_PRSNT#/GPIO_48

PCI EXPRESS

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

OUT

OUT OUT

OUT

IN IN

IN

IN IN

OUT

OUT OUT

OUT

IN

OUT

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Int PU

84 mA (A01)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

Int PU

206 mA (A01, AVDD0 & 1)

If PE0 interface is not used, ground DVDD0_PEX and AVDD0_PEX. If PE1 interface is not used, ground DVDD1_PEX and AVDD1_PEX.

57 mA (A01, DVDD0 & 1)

Int PU (S5)

MCP79-TOPO-B

(5 OF 11)

OMIT

BGA

U1400

Y12

AC12 AD12

V12

W12

AA12 AB12

M12 P12

R12

N12 T12

U12

M13 N13

P13

T17

W19 U17

V19 W16

W17

W18 U16

T19 U19

T16

C9

D11

E11

E7

F7

L8

L9

L6

L7

N10

N11

P9

N9

N6

N7

N4

N5

C7

D7

F6

E6

F5

E5

E3

E4

D3

C3

H5

G5

J6

J7

J4

J5

L10

L11

D4

C5

J1

H1

J3

J2

K3

K2

L3

L4

M3

M4

M1

M2

B4

C4

A3

A4

B2

B3

D1

C1

E1

D2

F2

E2

F4

F3

H4

G3

H2

H3

F11

G11

J9

K9

G9

H9

E9

F9

G7

H7

C8

D8

A8

B8

B7

A7

C6

B6

J10

J11

F13

G13

H13

J13

K14

L14

M14

N14

F17

D5 D9

E8

C10

M15 B10

L16 L18

M16

M18

M17

M19

A11

K11

9D6

7D5

31C7 73D3

7D5

31C7 73D3

9D6

7D5

23C5 31C7

9D6

9C6

31D7

9C6

31D7

9C6

31C5 73D3

9D6

9C6

31C5 73D3

9C6

9D6

2.37K

402

MF-LF

1% 1/16W

NO STUFF

PLACEMENT_NOTE=Place within 12.7mm of U1400

R1710

1

2

26C4

9C4

SYNC_MASTER=T18_MLB

MCP PCIe Interfaces

17

109

A

051-7537

SYNC_DATE=04/04/2008

TP_MCP_GPIO_18

PCIE_EXCARD_PRSNT_L

MINI_CLKREQ_L

=PP1V05_S0_MCP_PEX_AVDD1

=PP1V05_S0_MCP_PEX_AVDD0

=PP1V05_S0_MCP_PEX_DVDD1

=PP1V05_S0_MCP_PEX_DVDD0

PCIE_FW_D2R_N

=PEG_D2R_P<0>

=PEG_D2R_N<2>

PP1V05_S0_MCP_PLL_PEX

=PEG_D2R_N<0>

=PEG_D2R_P<2>

=PEG_D2R_P<4>

=PEG_D2R_P<6>

PCIE_MINI_PRSNT_L

TP_PCIE_PE4_R2D_CN

TP_PCIE_PE4_R2D_CP

PCIE_EXCARD_R2D_C_N

PCIE_FW_R2D_C_N

PCIE_EXCARD_R2D_C_P

PCIE_MINI_R2D_C_N

PCIE_FW_R2D_C_P

TP_PCIE_CLK100M_PE6N

PCIE_RESET_L

PCIE_MINI_R2D_C_P

TP_PCIE_CLK100M_PE5N

TP_PCIE_CLK100M_PE5P

TP_PCIE_CLK100M_PE6P

TP_PCIE_CLK100M_PE4N

TP_PCIE_CLK100M_PE4P

PCIE_CLK100M_EXCARD_N

PCIE_CLK100M_FW_N

PCIE_CLK100M_MINI_N

PCIE_CLK100M_FW_P

PEG_CLK100M_N

PEG_CLK100M_P

PCIE_CLK100M_MINI_P

=PEG_R2D_C_N<15>

=PEG_R2D_C_N<14> =PEG_R2D_C_P<15>

=PEG_R2D_C_N<13> =PEG_R2D_C_P<14>

=PEG_R2D_C_N<12>

=PEG_R2D_C_P<12>

=PEG_R2D_C_P<13>

=PEG_R2D_C_N<11>

=PEG_R2D_C_P<11>

=PEG_R2D_C_N<10>

=PEG_R2D_C_N<9> =PEG_R2D_C_P<10>

=PEG_R2D_C_N<8>

=PEG_R2D_C_P<8>

=PEG_R2D_C_P<9>

=PEG_R2D_C_N<7>

=PEG_R2D_C_P<7>

=PEG_R2D_C_N<6>

=PEG_R2D_C_N<5> =PEG_R2D_C_P<6>

=PEG_R2D_C_N<4> =PEG_R2D_C_P<5>

=PEG_R2D_C_N<3>

=PEG_R2D_C_P<3>

=PEG_R2D_C_P<4>

=PEG_R2D_C_N<2>

=PEG_R2D_C_P<2>

=PEG_R2D_C_N<0>

=PEG_R2D_C_N<1>

=PEG_R2D_C_P<1>

=PEG_R2D_C_P<0>

MCP_PEX_CLK_COMP

TP_PCIE_PE4_D2RN

TP_PCIE_PE4_D2RP

PCIE_EXCARD_D2R_N

PCIE_MINI_D2R_N

PCIE_FW_D2R_P

PCIE_EXCARD_D2R_P

PCIE_WAKE_L

PCIE_MINI_D2R_P

PEG_PRSNT_L

=PEG_D2R_N<13> =PEG_D2R_P<14>

=PEG_D2R_P<15>

=PEG_D2R_N<14>

=PEG_D2R_N<15>

=PEG_D2R_P<12>

=PEG_D2R_P<11>

=PEG_D2R_P<13>

=PEG_D2R_N<11>

=PEG_D2R_N<12>

=PEG_D2R_N<10>

=PEG_D2R_P<8>

=PEG_D2R_P<9>

=PEG_D2R_P<10>

=PEG_D2R_N<8>

=PEG_D2R_N<9>

=PEG_D2R_N<5>

=PEG_D2R_P<7>

=PEG_D2R_N<6>

=PEG_D2R_N<7>

=PEG_D2R_P<3>

=PEG_D2R_P<5>

=PEG_D2R_N<3>

=PEG_D2R_N<4>

=PEG_D2R_P<1> =PEG_D2R_N<1>

PCIE_FW_PRSNT_L

FW_CLKREQ_L

PCIE_CLK100M_EXCARD_P

EXCARD_CLKREQ_L

TP_PE4_CLKREQ_L

TP_MCP_GPIO_17

TP_PE4_PRSNT_L

GMUX_JTAG_TCK_L

GMUX_JTAG_TDO

8A6

24C2

9B6

73C3

9B6

9C6

Preliminary

IN

BI

OUT

IN IN IN IN

IN IN

OUT

OUT OUT

OUT

OUT OUT OUT OUT OUT OUT

OUT OUT

IN IN

OUT OUT

OUT OUT OUT

OUT OUT

IN

OUT

IN IN IN

GPIO_7/NFERR*/IGPU_GPIO_7

+V_DUAL_MACPLL

+VDD_HDMI

+V_PLL_HDMI

+V_PLL_IFPAB

+VDD_IFPB

+VDD_IFPA

+V_TV_DAC

+V_RGB_DAC

+V_DUAL_RMGT2

MII_COMP_GND

MII_COMP_VDD

LCD_PANEL_PWR/GPIO_58

LCD_BKL_ON/GPIO_59

LCD_BKL_CTL/GPIO_57

XTALOUT_TV

GPIO_6/FERR*/IGPU_GPIO_6

HDMI_TXC_P/ML0_LANE3_P HDMI_TXC_N/ML0_LANE3_N

HDMI_TXD0_P/ML0_LANE2_P HDMI_TXD0_N/ML0_LANE2_N HDMI_TXD1_P/ML0_LANE1_P HDMI_TXD1_N/ML0_LANE1_N HDMI_TXD2_P/ML0_LANE0_P HDMI_TXD2_N/ML0_LANE0_N

HPLUG_DET2/GPIO_22

IFPA_TXC_N

XTALIN_TV

DDC_DATA2/GPIO_24

DDC_CLK2/GPIO_23

RGB_DAC_RSET RGB_DAC_VREF

TV_DAC_VREF

DP_AUX_CH0_P DP_AUX_CH0_N

HPLUG_DET3

HDMI_RSET HDMI_VPROBE

RGMII_MDIO

BUF_25MHZ

DDC_DATA0

DDC_CLK0

RGB_DAC_RED

RGB_DAC_GREEN

RGB_DAC_BLUE

RGB_DAC_HSYNC RGB_DAC_VSYNC

TV_DAC_RED

TV_DAC_GREEN

IFPA_TXC_P

IFPA_TXD0_P IFPA_TXD0_N

IFPA_TXD2_P

IFPA_TXD1_P IFPA_TXD1_N

IFPA_TXD3_P

IFPA_TXD2_N

IFPB_TXC_P IFPB_TXC_N

IFPB_TXD5_P

IFPB_TXD4_P IFPB_TXD4_N

IFPB_TXD6_P

IFPB_TXD5_N

IFPB_TXD6_N IFPB_TXD7_P IFPB_TXD7_N

DDC_DATA3

DDC_CLK3

IFPAB_RSET

IFPAB_VPROBE

TV_DAC_RSET

RGMII_RXD0

RGMII_INTR/GPIO_35

RGMII_RXD3

RGMII_RXCTL/MII_RXDV

RGMII_RXC/MII_RXCLK

RGMII_RXD2

RGMII_RXD1

MII_RESET#

RGMII_MDC

RGMII_PWRDWN/GPIO_37

MII_RXER/GPIO_36 MII_COL/GPIO_20/MSMB_DATA MII_CRS/GPIO_21/MSMB_CLK

TV_DAC_BLUE

TV_DAC_HSYNC/GPIO_44 TV_DAC_VSYNC/GPIO_45

+V_DUAL_RMGT1

MII_VREF

RGMII_TXCTL/MII_TXEN

RGMII_TXC/MII_TXCLK

RGMII_TXD3

RGMII_TXD2

RGMII_TXD1

RGMII_TXD0

+3.3V_DUAL_RMGT1 +3.3V_DUAL_RMGT2

IFPA_TXD3_N

LAN

DACS

FLAT PANEL

BI

OUT

OUT OUT

OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT OUT

OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT

BI

OUT

BI

OUT

OUT OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

In MCP79 these pins have undocumented internal

GPIOs 57-59 (if LCD panel is used):

by default, pull-downs (1K or stronger) must be used.

pull-ups (~10K to 3.3V S0). To ensure pins are low

Alias to GMUX_INT for systems with GMUX. Alias to HPLUG_DET2 for other systems. Pull-down (20k) required in all cases.

=DVI_HPD_GMUX_INT:

Alias to DVI_HPD for systems using IFP for DVI.

(See below)

NOTE: 1K pull-down required on DP_IG_AUX_CH_N if DP is used.

NOTE: 20K pull-down required on DP_HPD_DET.

level-shifters.

NOTE: HDMI port requires level-shifting. IFP interface can be used to provide HDMI or dual-channel TMDS without

Interface Mode

DP_IG_ML_P/N<0>

DP_IG_DDC_DATA DP_IG_HPD DP_IG_AUX_CH_P/N

NOTE: 1M pull-down required on DP_IG_CA_DET if DP not used.

Dual-channel TMDS: Power +VDD_IFPx at 3.3V

131 mA (A01)

83 mA (A01)

MII, RGMII products will enable

WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliases

RGB DAC Disable:

TV / Component

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

LVDS: Power +VDD_IFPx at 1.8V

95 mA (A01)

16 mA (A01)

8 mA

DP_IG_AUX_CH_P/N

=MCP_HDMI_HPD

TMDS_IG_HPD

=MCP_HDMI_DDC_DATA

=MCP_HDMI_TXD_P/N<2>

=MCP_HDMI_TXD_P/N<1>

=MCP_HDMI_DDC_CLK

MCP Signal

=MCP_HDMI_TXD_P/N<0>

=MCP_HDMI_TXC_P/N

TMDS/HDMI

TMDS_IG_TXC_P/N TMDS_IG_TXD_P/N<0>

TMDS_IG_DDC_CLK

TMDS_IG_TXD_P/N<1> TMDS_IG_TXD_P/N<2>

TMDS_IG_DDC_DATA

TP_DP_IG_AUX_CHP/N

DP_IG_DDC_CLK

DP_IG_ML_P/N<2> DP_IG_ML_P/N<1>

DP_IG_ML_P/N<3>

DisplayPort

5 mA (A01)

RGB ONLY

avoids a leakage issue since

feature via software. This

NOTE: All Apple products set strap to

Network Interface Select

Interface

RGMII

MII 0

1

ENET_TXD<0>

DDC_CLK0/DDC_DATA0 pull-ups still required.

Okay to float all TV_DAC signals.

TV DAC Disable:

Y / Y

DDC_CLK0/DDC_DATA0 pull-ups still required.

Okay to float all RGB_DAC signals.

Okay to float XTALIN_TV and XTALOUT_TV.

103 mA 103 mA

206 mA (A01)

Comp / Pb

MCP79 requires a S5 pull-up.

C / Pr

190 mA (A01, 1.8V)

24A4

33B6 75D3

34A5 75D3

33C1 75D3

33B1 75D3

33C1 75D3

33B1 75D3

33B7 75C3

9D4

69A8 70A7

66B8

70B7 70C8

67D3

67C7 73B3

67B7 73B3

9B4

67D3

25C7 73B3

9D4

1% 1/16W MF-LF

402

49.9

R1810

1

2

1/16W MF-LF

49.9

402

1%

R1811

1

2

67A5

9D4

9C4

(6 OF 11)

BGA

MCP79-TOPO-B

OMIT

U1400

E23

B31

C30

D31

A31

B30

E31

C43

D43

E16

B15

J31

E35

D35

F35

G35

G33

F33

H33

J33

J30

C31 F31

C35

B35

A32

B32

C32

D32

C33

D33

C34

B34

E32

G31

K31

L31

H29

J29

K29

L29

K30

L30

M30

N30

G39

E37 F40

B26

B27

C27

B22

J23

F23

E28

J24

K24

T23

U23

V23

M29

M28

J32

K32

T25

M27 M26

B40

A39

A40

B39

C39

B38

A41

J22

D21

C21

G23

A23

C22

C23

B23

E24 A24

D24 C26

B24

C24 C25

D25

C36

B36

D36

A36

E36 A35

C37

C38

D38

10K

402

1/16W

5%

MF-LF

R1850

1

2

402

5%

100K

1/16W MF-LF

R1861

1

2

402

MF-LF

5%

1/16W

100K

R1860

1

2

41C3

5%

47K

402

MF-LF

1/16W

R1820

1

2

33C6 75C3

66B3 73B3

7C7

66C2 73B3

7C7

66C2 73B3

7C7

66C2 73B3

33C6 75C3

7C7

66C2 73B3

7C7

66C2 73B3

7C7

66C2 73B3

9D4

9C4

33C6 75C3

9C4

7C7

66C5

7C7

66B5

67D3

25C6 73A3

33B6 75C3

25C6 73A3

33C8 75D3

33B6 75C3

33B6 75D3

18

109

A

051-7537

SYNC_DATE=04/04/2008

SYNC_MASTER=T18_MLB

MCP Ethernet & Graphics

=DVI_HPD_GMUX_INT

LVDS_IG_BKL_PWM

MCP_CLK27M_XTALOUT

TP_MCP_RGB_DAC_RSET TP_MCP_RGB_DAC_VREF

LPCPLUS_GPIO

=PP1V05_ENET_MCP_RMGT

=PP3V3_S5_MCP_GPIO

=PP3V3_ENET_MCP_RMGT

=PP3V3_S0_MCP_GPIO

=PP3V3_ENET_MCP_RMGT

ENET_TXD<0> ENET_TXD<1> ENET_TXD<2> ENET_TXD<3>

ENET_CLK125M_TXCLK ENET_TX_CTRL

MCP_MII_VREF

CRT_IG_VSYNC

CRT_IG_HSYNC

CRT_IG_B_COMP_PB

=MCP_MII_CRS

=MCP_MII_COL

=MCP_MII_RXER

TP_ENET_PWRDWN_L

ENET_MDC

ENET_RESET_L

ENET_RXD<1> ENET_RXD<2>

ENET_CLK125M_RXCLK ENET_RX_CTRL

ENET_RXD<3>

TP_ENET_INTR_L

ENET_RXD<0>

MCP_TV_DAC_RSET

MCP_IFPAB_VPROBE

MCP_IFPAB_RSET

=MCP_HDMI_DDC_CLK =MCP_HDMI_DDC_DATA

LVDS_IG_B_DATA_N<3>

LVDS_IG_B_DATA_P<3>

LVDS_IG_B_DATA_N<2>

LVDS_IG_B_DATA_N<1> LVDS_IG_B_DATA_P<2>

LVDS_IG_B_DATA_N<0>

LVDS_IG_B_DATA_P<0>

LVDS_IG_B_DATA_P<1>

LVDS_IG_B_CLK_N

LVDS_IG_B_CLK_P

LVDS_IG_A_DATA_N<2> LVDS_IG_A_DATA_P<3>

LVDS_IG_A_DATA_N<1>

LVDS_IG_A_DATA_P<1>

LVDS_IG_A_DATA_P<2>

LVDS_IG_A_DATA_N<0>

LVDS_IG_A_DATA_P<0>

LVDS_IG_A_CLK_P

CRT_IG_G_Y_Y

CRT_IG_R_C_PR

TP_MCP_RGB_VSYNC

TP_MCP_RGB_HSYNC

TP_MCP_RGB_BLUE

TP_MCP_RGB_GREEN

TP_MCP_RGB_RED

MCP_DDC_CLK0 MCP_DDC_DATA0

MCP_CLK25M_BUF0_R

ENET_MDIO

=MCP_HDMI_HPD

DP_IG_AUX_CH_N

DP_IG_AUX_CH_P

MCP_TV_DAC_VREF

LVDS_IG_DDC_CLK LVDS_IG_DDC_DATA

MCP_CLK27M_XTALIN

=MCP_HDMI_TXD_N<2>

=MCP_HDMI_TXC_P

LVDS_IG_BKL_ON LVDS_IG_PANEL_PWR

MCP_MII_COMP_VDD MCP_MII_COMP_GND

PP3V3_S0_MCP_DAC

=PP3V3R1V8_S0_MCP_IFP_VDD

PP3V3_S0_MCP_VPLL

=PP1V05_S0_MCP_HDMI_VDD

PP1V05_ENET_MCP_PLL_MAC

DP_IG_CA_DET

MCP_HDMI_VPROBE

MCP_HDMI_RSET

LVDS_IG_A_DATA_N<3>

LVDS_IG_A_CLK_N

=MCP_HDMI_TXD_P<2>

=MCP_HDMI_TXD_N<1>

=MCP_HDMI_TXD_P<1>

=MCP_HDMI_TXD_P<0>

=MCP_HDMI_TXC_N

=MCP_HDMI_TXD_N<0>

24B6

24A6

21A4

24A6

24C6

20C1

18D3

19D1

18C7

25D7

8B1

8A3

8B1

8C5

8B1

75D3

25D2

8A7

25B5

8B7

24A6

Preliminary

OUT

BI BI BI BI

LPC PCIGND

PCI_INTW# PCI_INTX# PCI_INTY# PCI_INTZ#

GND65

LPC_DRQ1#/GPIO_19

LPC_PWRDWN#/GPIO_54/EXT_NMI#

PCI_TRDY#

LPC_DRQ0# LPC_SERIRQ

PCI_AD4

PCI_AD0

PCI_AD3

PCI_AD2

PCI_AD1

PCI_AD5 PCI_AD6

PCI_AD9

PCI_AD8

PCI_AD7

PCI_AD10 PCI_AD11

PCI_AD14

PCI_AD13

PCI_AD12

PCI_AD15 PCI_AD16 PCI_AD17

PCI_AD20

PCI_AD19

PCI_AD18

PCI_AD21 PCI_AD22

PCI_AD25

PCI_AD23

PCI_AD26

PCI_AD29

PCI_AD31

GND66 GND67

GND69

GND68

GND70 GND71 GND72

GND74

GND73

GND75 GND76 GND77

GND79

GND78

GND80 GND81

GND84

GND83

GND82

GND85 GND86 GND87

GND89

GND88

GND90 GND91 GND92

GND94

GND93

GND95 GND96 GND97

PCI_GNT0#

PCI_CBE2#

PCI_CBE0#

PCI_CBE3#

PCI_IRDY#

PCI_FRAME#

PCI_DEVSEL#

PCI_PAR

PCI_SERR# PCI_STOP#

PCI_RESET0# PCI_RESET1#

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_CLKIN

LPC_FRAME#

LPC_AD1

LPC_AD0

LPC_RESET0#

LPC_CLK0

LPC_AD3

LPC_AD2

GND99

GND98

GND100

GND102

GND101

GND104

GND103

GND105 GND106 GND107

GND109

GND108

GND110 GND111 GND112

GND115

GND114

GND113

GND116 GND117

GND120

GND119

GND118

GND121 GND122 GND123

GND125

GND124

GND126 GND127 GND128

GND130

GND129

PCI_AD30

PCI_AD27

PCI_AD24

PCI_CLKRUN#/GPIO_42

PCI_AD28

PCI_GNT2#/GPIO_41/RS232_DTR# PCI_GNT3#/GPIO_39/RS232_RTS#

PCI_GNT4#/GPIO_53/RS232_SOUT#

PCI_GNT1#/FANCTL2

PCI_CBE1#

PCI_PERR#/GPIO_43/RS232_DCD#

PCI_REQ3#/GPIO_38/RS232_CTS# PCI_REQ4#/GPIO_52/RS232_SIN#

PCI_PME#/GPIO_30

PCI_REQ2#/GPIO_40/RS232_DSR#

PCI_REQ0# PCI_REQ1#/FANRPM2

IN

BI

OUT

IN

OUT

BI BI BI BI BI BI BI BI

OUT

OUT OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Int PU (S5)

Int PU

Strap for Boot ROM Selection (See HDA_SDOUT)

39C8 41D5 74C3

26D4 74C3

39C8 41D5 74C3

39C8 41D3 74C3

BGA

(7 OF 11)

MCP79-TOPO-B

OMIT

U1400

AB18 H34

AB20 AB21

AB23

AB24 AB25

AB26

AB27 AB28

AB34

AB37 AB4

AB40 AC22

AC36

AC40 AB33

AC5

AD16 AD17

AD18

AD19 AD20

AD24 AD25

AD26

AD27 AD28

AD33

AD34

U24

U26

U39

U4

U8 V16

V17

V18 V20

V22

V24 V26

V27

V28 V33

V37

V4

V40

V7 W20

W22

W24 W36

W40

W43 Y16

Y17 Y18

Y19

Y20 Y22

Y24

Y25

Y26

Y27

AD3 AD2

AD1 AD5

AE9

AE1

AE2

AD4 AE12

AE5

AE6

AC3

AE10

AC9

AC10 AC11

AA1

AA5

Y5

W3

W6

W4

W7

AC4

V3

W8

V2

W9

U3

W11

U2

U5

U1

U6

AE11

T5

U7

AB3

AC6

AB2 AC7

AC8 AA2

AA3 AA6

AA11

W10

R6 R7

R8

R9

AD11

AA9

Y4

R3

U10 R4

U11 P3

P2

N3

N2

N1

AA10

Y1 AB9

T1

T2

V9

T3

U9

T4

R10

R11

AA7

Y2

Y3

39C5 41D5

39C8 41D3 26C4 74C3

39C5 41D3

PLACEMENT_NOTE=Place close to pin R8

MF-LF 402

1/16W

5%

22

R1910

1

2

402

MF-LF1/16W

5%

8.2K

R1989

1 2

402

MF-LF1/16W

5%

8.2K

R1991

1 2

402

MF-LF1/16W

5%

8.2K

R1990

1 2

402

MF-LF1/16W

5%

8.2K

R1994

1 2

8.2K

5%

1/16W MF-LF

402

R1992

1 2

19D2

MF-LF 402

1/16W

5%

10K

R1961

1

2

1/16W MF-LF

402

22

5%

R1960

1 2

5%

1/16W MF-LF22402

R1950

1 2

5%

1/16W MF-LF22402

R1951

1 2

22

5%

1/16W MF-LF

402

R1952

1 2

402

MF-LF1/16W

5%

22

R1953

1 2

26C4

9C4

19D2

13B6 23C5

13C3 74D3

52C7

9C4

051-7537

A

109

19

MCP PCI & LPC

SYNC_DATE=04/04/2008

SYNC_MASTER=T18_MLB

GMUX_JTAG_TDI

GMUX_JTAG_TMS

TP_PCI_INTX_L

TP_PCI_INTZ_L

FW_PME_L TP_LPC_DRQ0_L LPC_SERIRQ

PM_CLKRUN_L

=PP3V3_S0_MCP_GPIO

MCP_RS232_SIN_L

MCP_DEBUG<7>

MCP_DEBUG<6>

MCP_DEBUG<5>

MCP_DEBUG<4>

MCP_DEBUG<3>

MCP_DEBUG<2>

MCP_DEBUG<1>

MCP_DEBUG<0>

MCP_RS232_SIN_L

AUD_IPHS_SWITCH_EN

CRTMUX_SEL_TV_L

TP_PCI_AD<12> TP_PCI_AD<13> TP_PCI_AD<14>

TP_PCI_AD<16> TP_PCI_AD<17> TP_PCI_AD<18> TP_PCI_AD<19> TP_PCI_AD<20> TP_PCI_AD<21> TP_PCI_AD<22> TP_PCI_AD<23> TP_PCI_AD<24> TP_PCI_AD<25> TP_PCI_AD<26> TP_PCI_AD<27> TP_PCI_AD<28> TP_PCI_AD<29> TP_PCI_AD<30> TP_PCI_AD<31>

TP_PCI_INTW_L

TP_PCI_TRDY_L

TP_PCI_INTY_L

TP_PCI_AD<15>

PCI_REQ0_L PCI_REQ1_L

TP_PCI_AD<8>

TP_PCI_AD<10> TP_PCI_AD<11>

TP_PCI_AD<9>

TP_PCI_PERR_L

MEM_VTT_EN_R

PCI_CLK33M_MCP

TP_PCI_CLK1 PCI_CLK33M_MCP_R

LPC_PWRDWN_L

LPC_RESET_L

LPC_FRAME_R_L

LPC_CLK33M_SMC_R

LPC_AD_R<3>

LPC_AD_R<2>

LPC_AD_R<1>

LPC_AD_R<0>

TP_PCI_CLK0

TP_PCI_RESET1_L

PM_LATRIGGER_L

TP_PCI_STOP_L

TP_PCI_SERR_L

TP_PCI_PAR

TP_PCI_IRDY_L

TP_PCI_FRAME_L

TP_PCI_DEVSEL_L

TP_PCI_C_BE_L<3>

TP_PCI_C_BE_L<2>

TP_PCI_C_BE_L<1>

TP_PCI_C_BE_L<0>

MCP_RS232_SOUT_L

TP_PCI_GNT1_L

TP_PCI_GNT0_L

LPC_AD<0>

LPC_FRAME_L

LPC_AD<2> LPC_AD<3>

LPC_AD<1>

MCP_RS232_SOUT_L

PCI_REQ0_L PCI_REQ1_L CRTMUX_SEL_TV_L

21A4 18C1

74D3

8C5

19D7

19D2

74C3

41C1

19D4

19D7

Preliminary

BI BI

IN IN IN IN

SATA_B0_RX_N

SATA_A0_RX_P

SATA_A1_TX_P

GND160

GND158 GND159

GND157

GND156

GND155

GND153 GND154

GND152

GND151

GND150

GND148 GND149

GND147

GND146

GND145

GND143 GND144

GND142

GND141

GND140

GND139

GND136

GND133 GND134

GND132

GND131

USB_RBIAS_GND

USB11_N

USB11_P

USB10_N

USB10_P

USB9_N

USB9_P

USB7_N

USB8_N

USB8_P

USB7_P

USB6_N

USB6_P

USB5_N

USB4_N

USB4_P

USB5_P

USB2_N

USB2_P

USB0_N

USB1_N

USB1_P

USB0_P

SATA_TERMP

SATA_LED#

SATA_C1_RX_N SATA_C1_RX_P

SATA_C0_TX_P

SATA_B1_RX_N SATA_B1_RX_P

SATA_B1_TX_N

SATA_B1_TX_P

SATA_B0_TX_N

SATA_B0_RX_P

SATA_B0_TX_P

SATA_A1_RX_N SATA_A1_RX_P

SATA_A1_TX_N

SATA_A0_TX_P

GND138

GND137

GND135

USB3_P USB3_N

USB_OC0#/GPIO_25

USB_OC1#/GPIO_26 USB_OC2#/GPIO_27/MGPIO USB_OC3#/GPIO_28/MGPIO

SATA_A0_RX_N

SATA_A0_TX_N

SATA_C1_TX_N

SATA_C1_TX_P

SATA_C0_RX_P

SATA_C0_RX_N

SATA_C0_TX_N

+V_PLL_USB

+V_PLL_SATA

+DVDD0_SATA1 +DVDD0_SATA2 +DVDD0_SATA3 +DVDD0_SATA4

+DVDD1_SATA2

+AVDD0_SATA1 +AVDD0_SATA2 +AVDD0_SATA3 +AVDD0_SATA4 +AVDD0_SATA5 +AVDD0_SATA6 +AVDD0_SATA7 +AVDD0_SATA8 +AVDD0_SATA9

+AVDD1_SATA1 +AVDD1_SATA2 +AVDD1_SATA3 +AVDD1_SATA4

+DVDD1_SATA1

SATA

USB

OUT OUT

IN

OUT OUT

IN IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

19 mA (A01)

84 mA (A01)

External C

ExpressCard

External B

IR

Bluetooth

Camera

External A

External D

AirPort (PCIe Mini-Card)

Geyser Trackpad/Keyboard

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

43 mA (A01, DVDD0 & 1)

127 mA (A01, AVDD0 & 1)

If all SATA_Ax & Bx pins are not used, ground DVDD0_SATA and AVDD0_SATA. If all SATA_Cx pins are not used, ground DVDD1_SATA and AVDD1_SATA.

37A8 74C3

9B6

31B5 74C3

38C7 74B3

47B8 74B3

31B5 74B3

37A4 74B3

9B6

37C7

40B4

MF-LF

1% 1/16W

402

2.49K

R2010

1

2

806

MF-LF

1%

1/16W

402

R2060

1

2

5%

8.2K

MF-LF

1/16W

402

R2053

1

2

402

1/16W MF-LF

5%

8.2K

R2052

1

2

5%

8.2K

1/16W

402

MF-LF

R2051

1

2

402

1/16W MF-LF

5%

8.2K

R2050

1

2

(8 OF 11)

MCP79-TOPO-B

OMIT

BGA

U1400

AD35

AD37 AD38

AE22

AE24 AE39

AE4

AD6 AF16

AF17 AF18

AF20

AF22 AF26

AF27

AF28 AF33

AF34

AF37 AF40

AG18 AG20

AG22

AG26 AG36

AG40

AH18 AH20

AH22

AH24

AJ12

AN11 AK12

AK13

AL12 AM11

AM12 AN12

AL13

AN14

AL14

AM13 AM14

AF19 AG16

AG17

AG19

AH17 AH19

AE16

L28

AJ5

AJ4

AJ6

AJ7

AJ9 AK9

AJ10

AJ11

AJ2 AJ1

AJ3

AK2

AL4 AK3

AL3

AM4

AM2 AM3

AM1

AN1

AN3

AN2

AP2

AP3

E12

AE3

D29

C29

G25

F25

L23

K23

D28

C28

B28

A28

G29

F29

L27

K27

J27

J26

G27

F27

E27

D27

L25

K25

J25

H25

L21

K21 J21

H21

A27

36A3 73A3

36C2 73A3

36B2 73A3

SYNC_MASTER=T18_MLB

MCP SATA & USB

051-7537

A

109

20

SYNC_DATE=04/04/2008

=PP1V05_S0_MCP_SATA_AVDD1

=PP1V05_S0_MCP_SATA_AVDD0

=PP1V05_S0_MCP_SATA_DVDD1

=PP1V05_S0_MCP_SATA_DVDD0

SATA_ODD_D2R_P

SATA_ODD_D2R_N

SATA_ODD_R2D_C_N

SATA_ODD_R2D_C_P

SATA_HDD_D2R_N SATA_HDD_D2R_P

SATA_HDD_R2D_C_N

SATA_HDD_R2D_C_P

TP_SATA_C_D2RP

TP_SATA_C_D2RN

PP1V05_S0_MCP_PLL_SATA

=PP3V3_S5_MCP_GPIO

USB_EXTC_OC_L

USB_EXTB_OC_L

USB_EXTA_OC_L

TP_USB_11N

TP_USB_11P

TP_USB_10P

USB_EXTC_N

USB_EXCARD_N

USB_EXCARD_P

USB_EXTB_N

USB_EXTB_P

USB_BT_N

USB_BT_P

USB_TPAD_N

USB_TPAD_P

USB_IR_N

USB_IR_P

USB_CAMERA_N

USB_CAMERA_P

USB_EXTD_N

USB_EXTD_P

USB_MINI_N

USB_MINI_P

USB_EXTA_N

USB_EXTA_P

MCP_SATA_TERMP

TP_SATA_F_D2RP

TP_SATA_F_D2RN

TP_SATA_F_R2D_CN

TP_SATA_F_R2D_CP

TP_SATA_E_D2RN

TP_SATA_E_R2D_CN

TP_SATA_E_R2D_CP

TP_SATA_D_D2RP

TP_SATA_D_D2RN

TP_SATA_D_R2D_CN

TP_SATA_D_R2D_CP

TP_SATA_C_R2D_CN

TP_SATA_C_R2D_CP

TP_SATA_E_D2RP

TP_MCP_SATALED_L

TP_USB_10N

USB_EXTC_P

EXCARD_OC_L

MCP_USB_RBIAS_GND

PP3V3_S0_MCP_PLL_USB

18C7

8A6

24B2

8A3

73A3

74B3

24B4

Preliminary

OUT

BI

OUT

OUT OUT

OUT

IN

OUT

IN

OUT

IN IN

OUT

IN

IN IN IN

OUT

HDA_SDATA_IN1/GPIO_2/PS2_KB_CLK

HDA_SDATA_IN2/GPIO_3/PS2_KB_DATA

MCP_VID2/GPIO_15

MCP_VID1/GPIO_14

MCP_VID0/GPIO_13

THERM_DIODE_N

EXT_SMI/GPIO_32#

FANCTL1/GPIO_62

FANRPM1/GPIO_63

FANCTL0/GPIO_61

FANRPM0/GPIO_60

SIO_PME#

KBRDRSTIN#

PKG_TEST

TEST_MODE_EN

BUF_SIO_CLK

CPUVDD_EN

SMB_DATA0

SMB_CLK0

SPKR

HDA_RESET#

HDA_SYNC

HDA_BITCLK

HDA_SDATA_OUT

XTALIN_RTC

XTALOUT

XTALOUT_RTC

JTAG_TRST#

XTALIN

JTAG_TCK

JTAG_TMS

CPU_VLD

JTAG_TDI JTAG_TDO

RTC_RST#

PS_PWRGD

PWRGD_SB

INTRUDER#

LID# LLB#

PWRBTN# RSTBTN#

CPU_DPRSLPVR

SLP_S5#

SLP_S3#

HDA_DOCK_RST#/GPIO_5/PS2_MS_DATA

HDA_DOCK_EN#/GPIO_4/PS2_MS_CLK

A20GATE

GPIO_12/SUS_STAT#/ACCLMTR

HDA_SDATA_IN0

GPIO_1/PWRDN_OK/SPI_CS1

HDA_PULLDN_COMP

THERM_DIODE_P

SLP_RMGT#

SMB_CLK1/MSMB_CLK

SMB_DATA1/MSMB_DATA

SMB_ALERT#/GPIO_64

SPI_CS0/GPIO_10 SPI_CLK/GPIO_11

SPI_DI/GPIO_8 SPI_DO/GPIO_9

SUS_CLK/GPIO_34

+V_DUAL_HDA1 +V_DUAL_HDA2

+V_PLL_NV_H +V_PLL_SP_SPREF

HDA

MISC

OUT

IN

OUT

IN

OUT

IN

OUT

IN

IN IN

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

(MGPIO2)

(MGPIO3)

Int PU (S5)

17 mA

20 mA

37 mA (A01)

7 mA (A01)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

HDA Output Caps

For EMI Reduction on HDA interface

PCI

not use LPC for BootROM override.

LPC_FRAME# high for SPI1 ROM override.

SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_L

Int PU

Int PU (S5)

Int PU

25 MHz

42 MHz 0

LPC ROMs. So Apple designs will

0

1

HDA_SYNC

24 MHz

0

1

0

SPI_CLKSPI_DO

0

1

14.31818 MHz

BUF_SIO_CLK Frequency

Frequency

31 MHz

NOTE: Straps not provided on this page.

1 MHz

SPI Frequency Select

Frequency

NOTE: MCP79 does not support FWH, only

LPC

SPI0

SPI1

I/F

HDA_SDOUT

BIOS Boot Select

R1961 and R2160 selects SPI0 ROM by default, LPC+ debug card pulls

1

0

LPC_FRAME#

0

1

0

1

Int PU

Int PD

Int PU (S5)

NOTE: MCP79 rev A01 does not support SPI1 option. Rev B01 will.

Int PU

Int PU (S5)

(MXM_OK for MXM systems)

SAFE mode: For ROMSIP recovery

USER mode: Normal

Connects to SMC for automatic recovery.

41A5 41C8 74A3

7C3

34B7 39C5 41A5 64D5 68D8

7C3

39C5 40A2 64C8

13B6 42D8 74B3

42C8 74B3

13B6 42D8 74B3

42C8 74B3

21A3 61A8

45C5 77D3

21A3 61A8

21A3 31D5 34C7

45B5 77D3

9D1

60D8 71B3

23B5 39B8

51C7 74A3

51C7 74B3

51B7 74A3

51C7 74A3

49.9K

402

1% 1/16W MF-LF

R2121

1

2

1/16W

402

MF-LF

49.9K

1%

R2120

1

2

402

1/16W

1%

MF-LF

1K

R2190

1

2

26B4 74A3

23C5 39C5

23C5 39B8

1/16W

22

5%

402

MF-LF

R2170

1 2

22

402

1/16W

5%

MF-LF

R2171

1 2

402

1/16W MF-LF

22

5%

R2173

1 2

1/16W MF-LF

10K

5%

402

R2163

1

2

402

1/16W

5%

8.2K

MF-LF

R2160

1

2

1/16W

402

BOOT_MODE_SAFE

MF-LF

10K

5%

R2180

1

2

1/16W

BOOT_MODE_USER

MF-LF 402

10K

5%

R2181

1

2

MF-LF

1/16W

22

5%

402

R2172

1 2

41B1

402

1% 1/16W MF-LF

49.9

R2110

1

2

10K

5%

MF-LF

1/16W

402

R2150

1

2

6C5

13C3 23C5

6C5

13C3 23C5

6C5

13C3

6C5

13B6

6C4

CERM 402

5% 50V

10PF

C2171

1

2

CERM 402

5%

10PF

50V

C2173

1

2

CERM

402

5%

10PF

50V

C2170

1

2

CERM

402

5%

10PF

50V

C2172

1

2

OMIT

MCP79-TOPO-B

(9 OF 11)

BGA

U1400

K13

AE7

M22

C17 D17

C18

A12

C12

B12

D12

L26

L24

E15

K17

L17

A15

K15

G15

J14

J15

F15

L15

B20

G19

E19 F19

J19

J18

L13

M25

M24

L20

M20

M21

J16

K16

AE18

AE17

L22

E20

C16

D20

D16

C20

C19

J17

G17

H17

M23

L19

G21

K19

F21

D13

C14

C15

B14

C13

B18

K22

C11

B11

A16

A19

B16

B19

36C6

21A4 52C7

26A5 26A8

34B7 39D5 40B2

21A4 28A5 29A5 39B8

100K

5%

MF-LF

1/16W

402

R2147

1

2

MF-LF 402

1/16W

5%

10K

R2142

1

2

10K

5%

MF-LF

1/16W

402

R2141

1

2

402

1/16W MF-LF

5%

22K

R2157

1

2

402

1/16W MF-LF

5%

22K

R2156

1

2

MF-LF

5%

22K

1/16W

402

R2155

1

2

100K

1/16W

5%

MF-LF 402

R2151

1

2

402

100K

5%

MF-LF

1/16W

R2154

2

1

10K

5% 1/16W

402

MF-LF

R2143

1

2

402

1/16W MF-LF

5%

10K

R2140

1

2

23B5

21A4 40D4

26C7

26B7

26C7

26A5

39C8

23C5 39C8

23C5 26A1

41A5 41B7 74A3

41A5 41C7 74A3

41B7 74A3

051-7537

A

109

21

SYNC_MASTER=T18_MLB

SYNC_DATE=06/26/2008

MCP HDA & MISC

MCP_SPKR

=PP3V3_S0_MCP

PM_SLP_S4_L

PM_SLP_S3_L

AUD_I2C_INT_L

HDA_SYNC_R

TP_MLB_RAM_SIZE

TP_MLB_RAM_VENDOR

SMC_ADAPTER_EN

SMC_IG_THROTTLE_L

MEM_EVENT_L

=PP3V3_S0_MCP_GPIO

SMC_WAKE_SCI_L

MEM_EVENT_L ODD_PWR_EN_L

HDA_RST_R_L

HDA_SYNC

ARB_DETECT

SM_INTRUDER_L

PM_RSMRST_L

JTAG_MCP_TRST_L

MCP_TEST_MODE_EN

JTAG_MCP_TMS

MCP_VID<1> MCP_VID<2>

HDA_BIT_CLK_R

HDA_RST_R_L

HDA_SDOUT_R

HDA_SYNC_R

=PP3V3R1V5_S0_MCP_HDA

PP3V3_G3_RTC

HDA_SDOUT

HDA_BIT_CLK

HDA_RST_L

TP_MCP_KBDRSTIN_L

PM_SYSRST_DEBOUNCE_L

MCP_THMDIODE_N

SMBUS_MCP_0_CLK

SPI_MOSI_R

SPI_MISO

PM_CLK32K_SUSCLK_R

JTAG_MCP_TCK

MCP_CLK25M_XTALIN MCP_CLK25M_XTALOUT

RTC_CLK32K_XTALIN RTC_CLK32K_XTALOUT

SPI_CS0_R_L

PP1V05_S0_MCP_PLL_NV

MCP_HDA_PULLDN_COMP

TP_SB_A20GATE

PM_SLP_RMGT_L

MCP_VID<1>

SMC_RUNTIME_SCI_L

SPI_CLK_R

=SPI_CS1_R_L_USE_MLB

HDA_BIT_CLK_R

HDA_SDOUT_R

PM_BATLOW_L

SMBUS_MCP_0_DATA

MCP_VID<2>

AP_PWR_EN

SMBUS_MCP_1_DATA

JTAG_MCP_TDO

JTAG_MCP_TDI

MCP_PS_PWRGD

RTC_RST_L

PM_PWRBTN_L

TP_MCP_LID_L

SMBUS_MCP_1_CLK

MCP_THMDIODE_P

MCP_VID<0>

MCP_CPUVDD_EN

HDA_SDIN0

PM_DPRSLPVR

MCP_VID<0>

MCP_CPU_VLD

MCP_GPIO_4 AUD_I2C_INT_L

=PP3V3_S3_MCP_GPIO

AP_PWR_EN

MCP_GPIO_4

=PP3V3R1V5_S0_MCP_HDA

ARB_DETECT

TP_MCP_BUF_SIO_CLK

SMC_IG_THROTTLE_L

39B8

24B8

29A5

19D1

24A8

26D4

34C7

24A8

22B3

74A3

40D4

28A5

18C1

74A3

61A8

74B3

74A3

21D3

22A5

74B3

74A3

61A8

52C7

31D5

21D8

8C5

21A7

21B3

8C5

21A7

21B3

21C3

21D4

21C4

8B5

7C3

24A2

74A3

21A7

23C5

21C3

8D3

21B3

21A4

8B5

21A4

Preliminary

GND

GND161

GND165 GND166

GND164

GND163

GND162

GND167 GND168

GND171

GND170

GND169

GND172 GND173

GND176

GND175

GND174

GND177 GND178

GND181

GND180

GND179

GND182 GND183 GND184

GND187

GND186

GND185

GND188 GND189

GND192

GND191

GND190

GND193 GND194

GND197

GND196

GND195

GND198

GND202

GND201

GND200

GND199

GND203

GND206 GND207

GND205

GND204

GND208

GND212

GND211

GND210

GND209

GND213 GND214

GND217

GND216

GND215

GND218 GND219

GND222

GND221

GND220

GND223 GND224 GND225

GND228

GND227

GND226

GND229 GND230

GND233

GND232

GND231

GND234 GND235

GND238

GND237

GND236

GND239 GND240

GND243

GND242

GND241

GND244

GND248

GND247

GND246

GND245

GND249

GND252

GND251

GND250 GND342

GND341

GND343

GND340

GND339

GND338

GND337

GND336

GND335

GND334

GND333

GND331 GND332

GND330

GND329

GND328

GND326 GND327

GND325

GND324

GND323

GND321 GND322

GND320

GND319

GND318

GND316 GND317

GND315

GND314

GND313

GND311

GND310

GND312

GND309

GND308

GND305 GND306 GND307

GND304

GND303

GND301

GND300

GND302

GND299

GND298

GND296

GND295

GND297

GND294

GND293

GND292

GND291

GND290

GND289

GND288

GND287

GND285 GND286

GND284

GND283

GND282

GND280 GND281

GND279

GND278

GND277

GND275 GND276

GND274

GND273

GND272

GND270

GND269

GND271

GND268

GND267

GND264 GND265 GND266

GND263

GND262

GND259 GND260 GND261

GND258

GND257

GND255

GND254

GND256

GND253

+VTT_CPUCLK

+VDD_CORE42

+3.3V_DUAL_USB2

+VTT_CPU17

+VTT_CPU16

+VTT_CPU15

+VTT_CPU14

+VTT_CPU13

+VTT_CPU12

+VTT_CPU11

+VTT_CPU10

+VTT_CPU1

+VDD_CORE7

+VDD_CORE1 +VDD_CORE2 +VDD_CORE3 +VDD_CORE4 +VDD_CORE5 +VDD_CORE6

+VDD_CORE13 +VDD_CORE14 +VDD_CORE15 +VDD_CORE16 +VDD_CORE17 +VDD_CORE18 +VDD_CORE19

+VDD_CORE21 +VDD_CORE22 +VDD_CORE23 +VDD_CORE24 +VDD_CORE25 +VDD_CORE26 +VDD_CORE27 +VDD_CORE28 +VDD_CORE29 +VDD_CORE30

+VDD_CORE32 +VDD_CORE33 +VDD_CORE34 +VDD_CORE35 +VDD_CORE36 +VDD_CORE37

+VDD_CORE39 +VDD_CORE40 +VDD_CORE41

+VDD_CORE47 +VDD_CORE48 +VDD_CORE49 +VDD_CORE50 +VDD_CORE51 +VDD_CORE52 +VDD_CORE53 +VDD_CORE54

+VTT_CPU51

+VTT_CPU50

+VTT_CPU47

+VTT_CPU46

+VTT_CPU45

+VTT_CPU43

+VTT_CPU42

+VTT_CPU41

+VTT_CPU40

+VTT_CPU39

+VTT_CPU38

+VTT_CPU37

+VTT_CPU36

+VTT_CPU35

+VTT_CPU34

+VTT_CPU32

+VTT_CPU31

+VTT_CPU30

+VTT_CPU29

+VTT_CPU28

+VTT_CPU26

+VTT_CPU25

+VTT_CPU24

+VTT_CPU23

+VTT_CPU22

+VTT_CPU21

+VTT_CPU20

+VTT_CPU19

+VTT_CPU18

+VTT_CPU9

+VTT_CPU8

+VTT_CPU7

+VTT_CPU6

+VTT_CPU5

+VTT_CPU4

+VTT_CPU3

+VDD_CORE38

+VTT_CPU33

+VTT_CPU27

+VDD_CORE55 +VDD_CORE56 +VDD_CORE57 +VDD_CORE58 +VDD_CORE59 +VDD_CORE60 +VDD_CORE61 +VDD_CORE62 +VDD_CORE63 +VDD_CORE64 +VDD_CORE65 +VDD_CORE66 +VDD_CORE67 +VDD_CORE68 +VDD_CORE69 +VDD_CORE70 +VDD_CORE71 +VDD_CORE72 +VDD_CORE73 +VDD_CORE74 +VDD_CORE75 +VDD_CORE76 +VDD_CORE77 +VDD_CORE78 +VDD_CORE79 +VDD_CORE80 +VDD_CORE81

+VBAT

+3.3V_1

+3.3V_8

+3.3V_DUAL1 +3.3V_DUAL2 +3.3V_DUAL3 +3.3V_DUAL4

+3.3V_DUAL_USB1

+3.3V_DUAL_USB3 +3.3V_DUAL_USB4

+VDD_AUXC1

+VDD_AUXC3

+VDD_AUXC2

+VDD_CORE43

+VTT_CPU2

+VDD_CORE46

+VDD_CORE45

+VDD_CORE44

+VTT_CPU52

+VDD_CORE31

+VTT_CPU49

+VTT_CPU48

+VTT_CPU44

+3.3V_7

+3.3V_6

+3.3V_5

+3.3V_4

+3.3V_3

+3.3V_2

+VDD_CORE20

+VDD_CORE12

+VDD_CORE11

+VDD_CORE10

+VDD_CORE9

+VDD_CORE8

POWER

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

1182 mA (A01)

450 mA (A01)

266 mA (A01)

16 mA

10 uA (G3)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

80 uA (S0)

23065 mA (A01, 1.2V) 16996 mA (A01, 1.0V)

250 mA

1139 mA

43 mA

105 mA (A01)

BGA

OMIT

MCP79-TOPO-B

(11 OF 11)

U1400

AH26 AH33

AH34 AH37

AH38

AJ39

AJ8

AK10

AK33 AK34

AK37

AK4 AK40

AL36 AL40

AL5

AM10 AM16

AM18

AM20 AM22

AM24

AM26 AM30

AM34 AM35

AM37

AM38

AM5

AM6

AM7

AM9

AP26

AN28 AN30

AN39

AN4

Y7

AP10 AU26

AP14

AU14 AP28

AP32

AP34 AP36

AP37

AP4

AP40

AP7 AW23

AR28

AR32 AR40

AT10

AR12 AT13

AT29 AT33

AT6

AT7

AT9

AY21

AY22

L12

AU12

AU28 AP33

AU32 AR30

AU36

AU38

AU4

G28

F20 AV28

AV32

AV36

AV4

AV7 AW11

G20

AR43 AW43

AY10

AV12 AY30

AY33

AY34 AY37

AY38 AY41

AV40 BA1

BA4 AW31

AY6

L35 BC33

BC37

BC41 AY14

BC5

C2 D10

D14 D15

D18

D19 D22

D23

D26 D30

D37

D6 E13

E17 E21

E25

E29 E33

F12

F16 F32

F8

G10 G12

G14 G16

BC12

G22 G24

AW20

G34 G4

G43

G6 G8

H11 H15

AW35

H23 AN8

G40

J12 J8

K10

K12 K18

K26 K37

K4

K40 K8

AU1

L40 L43

L5

M10 M34

M35 M37

Y28

Y33 Y34

Y35

Y37 Y38

AB17

AB16 AN26

AD7 M11

AA4

AB19 AY13

P11

Y6 T11

V11

Y11 AH16

T22

(10 OF 11)

BGA

MCP79-TOPO-B

OMIT

U1400

AD10

AE8 AB10

AD9

Y10 AB11

AA8

Y9

G18

H19

J20 K20

G26 H27

J28

K28

A20

T21

U21

V21

AA25

AA26

AA27

AA28 AC16

AC17 AC18

AC19

AC20 AC21

AA17

AC23

AC24 AC25

AC26

AC27 AC28

AD21 AD23

W27

V25

AA18

U25

AE19

AE21 AE23

AE25

AE26 AE27

AE28 AF10

AF11

AA19

AH12

AF2

AF21

AF23 AF25

AF3

AF4 AF7

AH23

AF9

AA20

AG10

AG11 AG12

AG21

AG23 AG25

AG3

AG4

AA21

AG6 AG7

AG5

AG8

AG9 AH1

AH10

AH11

W26

AH2

AA23

W28

AH25

Y21

AH21

AH3

AH4 AH5

AH6

AH7 AH9

AA24

W21 W23

Y23

W25

AF12

AA16

R32

P31

AF32

AE32 AH32

AJ32 AK31

AK32

AD32 AL31

AB32

AC32

B41 B42

C40

C41 C42

D39 D40

D41

E38 E39

E40

F37

F38 F39

G36

G37 G38

H35 H37

J34

J35

J36

K33

K34

K35 L32

L33

L34 M31

M32 M33

N31

N32

P32 Y32

AA32

T32 U32

V32

W32

AG32

SYNC_DATE=04/04/2008

SYNC_MASTER=T18_MLB

051-7537

A

109

22

MCP Power & Ground

=PP1V05_S0_MCP_FSB

=PPVCORE_S0_MCP

PP3V3_G3_RTC

=PP3V3_S0_MCP

=PP1V05_S5_MCP_VDD_AUXC

=PP3V3_S5_MCP

24C8 14B7 61B1 14A2 44D7

26D4

24B8

9C2

24D8

21C8

21C2

24C8

24B8

8D7 8C8

7C3

8C5

8B3

8A3

Preliminary

OUT

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

These internal pull-ups are missing in Revs A01 & A01P.

3.3V Interface Pull-ups

RADAR 5925345

MCP_SAFE_MODE SIGNAL TO SUPPORT ROM FAILURE OVERRIDE

1

MCP_A01&MCP_A01P&MCP_A01Q

402

MF-LF1/16W

5%

10K

R2402

2

21

R2401

402

MF-LF1/16W

5%

10K

MCP_A01&MCP_A01P&MCP_A01Q

21

R2400

MCP_A01&MCP_A01P&MCP_A01Q

5%

1/16W MF-LF

402

10K

21

R2404

5%

1/16W MF-LF

402

10K

MCP_A01&MCP_A01P&MCP_A01Q

21

R2413

MCP_A01&MCP_A01P&MCP_A01Q

5%

1/16W MF-LF

402

10K

21

R2405

MCP_A01&MCP_A01P&MCP_A01Q

1/16W MF-LF

402

10K

5%

13B6 19C4

7D5

17B6 31C7

6C5

13C3 21B7

6C5

13C3 21B7

21B7 26A1

21C7

21C7 39C5

21C7 39B8

21B7 39C8

21C7 39B8

R2430

402

21

5%

MF-LF

1/16W

0

39B5

21

R2412

5%

1/16W MF-LF

402

10K

MCP_A01&MCP_A01P&MCP_A01Q

21

R2411

402

MF-LF1/16W

5%

10K

21

R2410

MCP_A01&MCP_A01P&MCP_A01Q

10K

402

MF-LF1/16W

5%

2

R2403

5%

1/16W MF-LF

402

10K

1

MCP_A01&MCP_A01P&MCP_A01Q

SYNC_DATE=03/08/2008

SYNC_MASTER=T18_MLB

MCP79 A01 Silicon Support

051-7537

A

109

24

SMC_MCP_SAFE_MODE

MCP_SPKR

=PP3V3_S5_MCP_A01

JTAG_MCP_TMS

JTAG_MCP_TDI

SMC_RUNTIME_SCI_L

PM_PWRBTN_L

TP_MCP_LID_L

MAKE_BASE=TRUE

MCP_LID_L

PCIE_WAKE_L

PM_BATLOW_L

SMC_WAKE_SCI_L

PM_SYSRST_DEBOUNCE_L

PM_LATRIGGER_L

41B4

21C3

8A3

Preliminary

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Apple: 4x 4.7uF 0402, 4x 1uF 0402, 6x 0.1uF 0402 (23.4 uF)

NV: 1x 10uF 0805, 2x 4.7uF 0402, 3x 1uF 0402, 9x 0.1uF 0402 (23.3 uF)

5 mA (A01)

MCP SATA (DVDD) Power

NV: 1x 4.7uF 0603, 4x 0.1uF 0402 (5.1 uF) Apple: 4x 2.2uF 0402 (8.8 uF)

1182 mA (A01)

7 mA (A01)

19 mA (A01)

333 mA (A01)

4771 mA (A01, DDR3)

MCP Core Power

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

MCP 3.3V Power

MCP Memory Power

MCP FSB (VTT) Power

Apple: 1x 2.2uF 0402 (2.2 uF)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF) Apple: 7x 2.2uF 0402 (15.4 uF)

Apple: 2x 2.2uF 0402 (4.4 uF)

Apple: 5x 2.2uF 0402 (11 uF)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 1uF 0402, 2x 0.1uF 0402 (16.9 uF)

Apple: 1x 2.2uF 0402 (2.2 uF)

MCP 1.05V AUX Power

5 mA (A01)

MCP 3.3V/1.5V HDA Power

266 mA (A01)

MCP 3.3V AUX/USB Power

Apple: 1x 2.2uF 0402 (2.2 uF)

MCP79 Ethernet VRef

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

MCP 3.3V Ethernet Power

270 mA (A01)

MCP 1.05V RMGT Power

(No IG vs. EG data)

23065 mA (A01, 1.2V) 16996 mA (A01, 1.0V)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

MCP PCIE (DVDD) Power

105 mA (A01) 131 mA (A01)

83 mA (A01)

84 mA (A01)

87 mA (A01)

37 mA (A01)

562 mA (A01)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)

206 mA (A01)

127 mA (A01)

43 mA (A01)57 mA (A01)

450 mA (A01)

19 mA (A01)

4V

4.7UF

20% X5R

402

C2582

1

2

20%

4.7UF

4V X5R 402

C2588

1

2

4.7UF

20%

4V X5R 402

C2584

1

2

4V

4.7UF

20% X5R

402

C2586

1

2

CERM 402-LF

20%

2.2UF

6.3V

C2555

1

2

4.7UF

4V

20% X5R

402

C2502

1

2

X5R 402-1

1UF

10% 10V

C2507

1

2

X5R 402-1

1UF

10% 10V

C2506

1

2

X5R 402-1

1UF

10% 10V

C2505

1

2

X5R 402-1

1UF

10% 10V

C2504

1

2

0.1UF

CERM

20%

402

10V

C2511

1

2

0.1UF

CERM

20%

402

10V

C2510

1

2

0.1UF

CERM

20%

402

10V

C2509

1

2

0.1UF

CERM

20%

402

10V

C2508

1

2

0.1UF

CERM

20%

402

10V

C2513

1

2

0.1UF

CERM

20%

402

10V

C2512

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2536

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2535

1

2

2.2UF

6.3V

20%

402-LF

CERM

C2534

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2533

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2532

1

2

20%

2.2UF

6.3V

402-LF

CERM

C2531

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2530

1

2

X5R 402-1

1UF

10% 10V

C2517

1

2

X5R 402-1

1UF

10% 10V

C2516

1

2

4.7UF

4V

20% X5R

402

C2515

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2572

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2571

1

2

4V

4.7UF

20% X5R

402

C2520

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2570

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2574

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2573

1

2

CERM 402-LF

20%

2.2UF

6.3V

C2576

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2575

1

2

2.2UF

6.3V

20%

402-LF

CERM

C2553

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2552

1

2

2.2UF

6.3V

20%

402-LF

CERM

C2551

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2550

1

2

0.1UF

20% CERM

402

10V

C2549

1

2

0.1UF

20% CERM

402

10V

C2548

1

2

0.1UF

20% CERM

402

10V

C2547

1

2

0.1UF

20% CERM

402

10V

C2546

1

2

0.1UF

20% CERM

402

10V

C2545

1

2

0.1UF

20% CERM

402

10V

C2544

1

2

0.1UF

20% CERM

402

10V

C2543

1

2

20% CERM

0.1UF

402

10V

C2542

1

2

0.1UF

CERM

20%

402

10V

C2541

1

2

20%

4.7UF

4V X5R 402

C2540

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2562

1

2

CERM 402-LF

20%

2.2UF

6.3V

C2564

1

2

4.7UF

20%

4V X5R 402

C2580

1

2

0603

30-OHM-5A

L2570

1 2

30-OHM-5A

0603

L2575

1 2

30-OHM-1.7A

0402

L2582

1 2

30-OHM-1.7A

0402

L2584

1 2

30-OHM-1.7A

0402

L2588

1 2

0402

30-OHM-1.7A

L2586

1 2

0402

30-OHM-1.7A

L2555

1 2

4.7UF

4V

20% X5R

402

C2500

1

2

4.7UF

4V

20% X5R

402

C2501

1

2

30-OHM-1.7A

0402

L2580

1 2

CERM

20%

0.1uF

402

10V

C2526

1

2

CERM

20%

0.1uF

402

10V

C2525

1

2

6.3V

2.2UF

20%

402-LF

CERM

C2560

1

2

CERM

0.1UF

20%

402

10V

C2589

1

2

CERM

0.1UF

20%

402

10V

C2590

1

2

20%

4.7UF

4V X5R 402

C2595

1

2

30-OHM-1.7A

0402

L2595

1 2

1.47K

1/16W

1%

MF-LF

402

R2590

1

2

0.1UF

CERM

20%

402

10V

C2591

1

2

MF-LF

1%

1/16W

1.47K

402

R2591

1

2

18D3

CERM

20%

0.1uF

402

10V

C2521

1

2

0.1uF

20% CERM

402

10V

C2518

1

2

0.1uF

CERM

20%

402

10V

C2519

1

2

20% CERM

0.1UF

402

10V

C2581

1

2

CERM

0.1UF

20%

402

10V

C2583

1

2

20% CERM

0.1UF

402

10V

C2585

1

2

20% CERM

0.1UF

402

10V

C2587

1

2

CERM

20%

0.1UF

402

10V

C2596

1

2

CERM

20%

0.1uF

402

10V

C2529

1

2

20%

4.7uF

4V X5R 402

C2528

1

2

4.7UF

4V

20% X5R

402

C2503

1

2

SYNC_DATE=04/04/2008

SYNC_MASTER=T18_MLB

MCP Standard Decoupling

25

A

051-7537

109

=PP1V05_S0_MCP_PLL_UF

=PP1V05_S0_MCP_PEX_DVDD

=PP1V05_S0_MCP_SATA_DVDD

=PP3V3_ENET_MCP_RMGT

=PPVCORE_S0_MCP

=PP3V3_S0_MCP_PLL_UF

=PP1V05_ENET_MCP_RMGT

=PP1V05_S5_MCP_VDD_AUXC

=PP1V8R1V5_S0_MCP_MEM

=PP1V05_S0_MCP_FSB

=PP1V05_S0_MCP_AVDD_UF

=PP3V3_S5_MCP

=PP3V3R1V5_S0_MCP_HDA

=PP3V3_S0_MCP

MCP_MII_VREF

=PP3V3_ENET_MCP_RMGT

=PP1V05_ENET_MCP_PLL_MAC

PP1V05_ENET_MCP_PLL_MAC

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

PP1V05_S0_MCP_PLL_FSB

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.05V

PP1V05_S0_MCP_PLL_SATA

PP1V05_S0_MCP_PLL_PEX

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

PP3V3_S0_MCP_PLL_USB

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.05V

PP1V05_S0_MCP_PEX_AVDD

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.05V

PP1V05_S0_MCP_SATA_AVDD

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

PP1V05_S0_MCP_PLL_CORE

VOLTAGE=1.05V

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM

PP1V05_S0_MCP_PLL_NV

VOLTAGE=1.05V

22D3

24A6

61B1

14B7

24B6

18D3

44D7

16C7

14A2

21D8

22B3

18D3

8B7 8B7

18C7

22D5

18D3 22A3

16C3

9C2

22B3

21D3

21C2

18C7

8B7

8A8 8A8

8B1

8C8

8B5

8B1 8B3

8B7

8D7

8B7

8A3

8B5

8C5

8B1

18C6

14A6

20B6

17A6

20C3

8A8

16C6

21C7

Preliminary

Apple A1278 Schematic RevA

Specifications and Main Features

Frequently Asked Questions

User Manual