SAAK-188
Table of contents
Loading...
: +B SIGNAL LINE
30
29
22 28272625
7 6 5 4 3 2 1
23 24
2120
1915 16 17 18
14 13 12 11 10
9 8
IC703
IC703
AN8739SBE2
FOCUS COIL/
TRACKING COIL/
TRAVERSE MOTOR/
SPINDLE MOTOR DRIVE
R729
3.9K
R728
3.9K
R727
6.8K
R749
4.7K
R723
6.8K
R731
6.8K
R725
390
R715
1K
R724
18K
R735
100
R736
10
R701
4.7
R704
1K
R744
120K
R705
150K
R702
10K
R706
1K
R707
39K
R708
22K
C752
1500P
C739
1500P
C715
2700P
C704
0.1
C742
0.027
C747
180P
C710
120P
C749
1800P
C713
0.1
C707
0.027
C702
0.1
C706
2700P
C712
0.1
C711
0.1
C736
0.1
C737
0.1
C735
0.1
C
C
C
C
C
C738
0.01
C703
6.3V100
C701
6.3V33
C714
6.3V100
C734
10V220
M
M701
M
M702
1
3
5
7
9
8
6
4
2
10
11
12
13
14
15
16
CN701
1
3
5
7
9
8
6
4
2
10
11
12
13
14
15
16
Q701
Q701
2SA1037AKSTX
LASER POWER DRIVE
15
21
20
19
18
17
16
24
23 2228
27
26
25
14
1312
11
10
9
8
7
6
5
4
3
2
1
IC701
IC701
AN8885SBE1
SERVO AMP
8
1
2
3
4
5
6
7
VCC
NC
38
37
35
36
29
30
GND
TEN
FEN
FEOUT
FBAL
TBAL
TEOUT
CEA
RF
LPD
LD
RFIN
PDF
PDE
PDB
PDA
VREF
ENV
OFTR
/RFDET
GND
LDON
BDO
VCC
SP MOTOR
TRV MOTOR
NC
RSTIN
IN3
IN4
VREF
NC
/RST
GND
GND
PVCC2
PGND2
D4+
D4-
D3+
D3-
PGND1
PVCC1
NC
D2+
D2-
D1+
D1-
IN1
NC
PC2
NC
IN2
GND
CSBRT
LASER DIODE
11
12
10
6
8
5
4
9
2
3
GND
VCC
AIN
BIN
VREF
NAOUT
GND
NBOUT
F+
F-
T+
T-
LPD
VREF
NA
NB
GND
LD GND
LD
PDE
PDF
VCC
NC
PDOWN
NC
NC
NC
28
R750
5.6
33
SCHEMATIC DIAGRAM -1
CD SERVO CIRCUIT
OPTICAL PICKUP CIRCUIT
C770
0.1
C750
0.1
C751
0.1
324042
313941 34
: CD-DA SIGNAL LINE
: +B SIGNAL LINE
: CD SIGNAL LINE
40
41
42
43
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
20
19
18
44
17
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78
79
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
80
1
R714
120
R717
100
R709
33K
R711
120K
R721
100
R718
R712
470
R741
47K
R742
220K
R753
10
C722
10P
C724
0.1
C744
0.022
C730
0.1
C733
0.1
C718
0.47
C716
1200P
C745
1000P
C753
470P
C743
0.1
C731
6.3V220
C723
10V220
C732
6.3V220
S701
X701
RSXB16M9J02T
1
3
5
7
9
8
6
4
2
10
11
12
13
14
15
16
17
18
19
CN702
RESY
SSEL
BYTCK
DEMPH
DVSS1
DVDD1
VDD
AVSS2
AVDD2
/CLDCK
FCLK
IPFLAG
FLAG
CLVS
CRC
/TEST
AVDD1
AVSS1
RSEL
PSEL
MSEL
BCLK
LRCK
SRDATA
TX
MCLK
MDATA
MLD
SENSE
/FLOCK
/TLOCK
BLKCK
SQCK
SUBQ
DMUTE
STAT
/RST
SMCK
TVD
PC
ECM
ECS
TRD
FOD
VREF
FBAL
TBAL
FE
TE
RFENV
VDET
OFT
TRCRS
/RFDET
BDO
LDON
WVEL
ARF
IREF
DRF
DSLF
PLLF
EFM
PCK
SUBC
SBCK
VSS
X1 IN
X2 OUT
OUTR
OUTL
15
16
23
20
24
21
RESET SW
PLLF2
VCOF
VCOF2
IOSEL
IOVDD
CSEL
DSLF2
RESET
SW
2
KICK
TRV
/RST
STAT
SUBQ
SQCK
BLKCK
MLD
MDATA
MCLK
P.GND
+7.5V
TX
D.GND
+3.3V
RCH OUT
A.GND
LCH OUT
IC702
MN662790RSC
SERVO PROCESSOR/
DIGITAL SIGNAL PROCESSOR/
DIGITAL FILTER/
D/A CONVERTER
TJ702
20
21
22
23
24
25
26
27
28
29
30
49
SUBC
4
5
SBCK
678
1314
EFM
R713
17
100
IPFLAG
27
25
L701
RLBN102V-Y
L704
L702-L704
RLBN102V-Y
LDVDD
L703
L702
LRCK
SRDATA
BCLK
444345
R716
10
18
DIDATA
DILRCK
DISCK
4847
SCHEMATIC DIAGRAM - 2
CD SERVO CIRCUIT
100
C721
10P
C725
1000P
C717
0.1
C726
1000P
VCOF
TO
VCD CIRCUIT
(CN802) ON
SCHEMATIC
DIAGRAM-6
3
12
22
46
: CD-DA SIGNAL LINE
1
17
18
36
35
34
33
32
31
30
29
28
27
26
25
19
20
21
22
23
24
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
40
39
38
37
45
44
43
42
41
64
63
62
6160
59
58
57
56
55
54
53
5251
50
4948
47
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
128
97
98
99
100
101
102
103104
105
106
108
107
109
110
111
112
113
114
115
116
117
118
120
121122
123
124
125
126127
1
1 2 3 4
5 6
7
8
9 10
11
12
13
14
15
16
18
32
31
30
29
28
27
26
25
19
20
21
22
23
24
17
1 2 3 4
5 6
7
8
9 10
13
14
15
16
18
32
31
30
29
28
27
26
25
19
20
21
22
23
24
17
36
35
40
39
38
37
44
43
42
41
IC 1001
IC 1002
46
VCC
NC
A17
A14
A13
A8
A9
A11
OE
A10
CE
D7
D6
D5
D4
D3
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
C1002 0.1µ
MD08
MD03
MD02
MA8
MA9
MD00
MA10
MCE
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MD01
MD04
MD05
VSS
DQ16
DQ15
DQ14
DQ13
VSS
DQ12
DQ11
DQ10
DQ9
NC
/LCAS
/UCAS
OE
A8
A7
A6
A5
A4
VSS
MD07
MD06
MD05
MD04
MD03
MD02
MD01
MD00
CAS
RAS0
MA8
MA7
MA6
MA5
MA4
VCC
DQ1
DQ2
DQ3
DQ4
DQ5
VCC
DQ6
DQ7
D8Q
NC
NC
/WE
/RAS
NC
A0
A1
A2
A3
VCC
C1003
0.1µ
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MWE
RAS
MA0
MA1
MA2
MA3
C1004
0.1µ
NC
VSS
CD BCK
CD DATA
CD LRCK
CD C2PO
MD1
MD0
NC
NC
NC
MD2
MD3
MD4
MD5
VSS
MD6
VDD3
MD7
I/O VSS
MD8
VDD3
MD9
MD10
MD11
MD12
MD13
MD14
MD15
NC
NC
NC
C1005
0.1µ
NC
NC
NC
NC
MCE
MWE
VSS
VDD3
CAS
RAS0
RAS1
MA10
MA9
MA8
VSS
MA7
MA6
VDD3
MA5
MA4
MA3
VSS
MA2
MA1
VDD3
MA0
RESERVED
RESET
VDDMAX-IN
NC
NC
NC
NC
AVDD
CVOUT
Y-OUT
NC
NC
NC
PIO2
RESERVED
RESERVED
RESERVED
RESERVED
PIO0
AVDD
DAXCK
AGND
VDD3
RESERVED
RESERVED
CLK SEL(3)
CLK SEL(2)
CLK SEL(0)
CLK SEL(1)
VSS
AGND
C-OUT
AVDD
VREF
VGAIN
AGND
AVDD
AGND
NC
NC
NC
NC
CDG-SOS1
CDG-VFSY
CDG-SDATA
HSEL
VDD3
HD-IN
VDD3
HCK
119
VSS
CDG-SCK
HINT
HRDY
HDO-OUT
DA-BCK
DA-DATA
VDDMAX-OUT
DA-LRCK
DA-EMP
VCK
GCK
VSS
VCKPIO1
VDD3
PIO3
NC
NC
NC
VSS
C1006
0.1µ
C1021
100P
C1019
R1008
10K
C1008
0.1µ
R1020
2.2K
R1021
4.7K
C1011
0.1µ
R1001
100
C1000
10P
R1000
5.6K
IC1003
TC7WU04FUT2L
INVERTER
IC1004
TC7W14FUTE1L
INVERTER
C1001
10P
C1017
0.1µ
A+3.3V
CVOUT
COUT
YOUT
VGND
VGND
R.+5V
D.+3.3V
D.+3.3V
D.GND
D.GND
XCK
EMPH
DILRCK
HRDY
DISCK
DIDATA
HINT
SBCK
VRST
HCK
HDIO
CDSCK
CDDATA
CDLRCK
IPFLG
HSEL
SUBC
CLOCK
BLKCK
R1006
10K
R1010
10K
R1011
10K
R1004 10K
C1010
0.1µ
R1009
9.1K
R1012
3.3K
R1007
5.6K
C1016
0.1µ
C1020
0.1µ
R1013
75
R1014
75
R1005
75
C1015
270P
C1018
330P
C1014
150P
L1002
L1000
CDSCK
CDDATA
CDLRCK
IPFLG
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD00
MD01
MD02
MD03
MD04
MD05
MD06
MD07
BLKCK
CLOCK
SUBC
HSEL
HCK
SBCK
HINT
HRDY
HDI0
DISCK
DIDATA
DILRCK
EMPH
XCK
COUT
YOUT
CVOUT
MPEGHCK
CDSCK0
CDSCK1
CN1000
SCHEMATIC DIAGRAM - 3
VIDEO MODULE CIRCUIT
C1009
0.1µ
VRST
MA3
MA2
MA1
MA0
MA10
MA9
MA8
MA7
MA6
MA5
MA4
MCE
MWE
CAS
RAS0
C1007
0.1µ
R1003 100
R1002 100
IC 1001
LH532KU1
2M ROM
IC 1002
M44260CTP7
4M DRAM
HDI0
IC1000
MN89103M2
MPEG VIDEO
AUDIO DECODER
25
23
29
13
18
6
17
19
3
11
5
12
27
24
8
47
22
20
15
16
21
28
26
1
9
2
10
17
18
30
29
28
27
26
25
19
20
21
22
23
24
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
TO
VCD CIRCUIT
(CN801) ON
SCHEMATIC
DIAGRAM-6
C1013
100P
100P
14
L1000
RLQP1R8KT2-Y
L1002
RLQP2R7KT2-Y
X1000
RSXC27M0S02T
C1012
0.1µ
: +B SIGNAL LINE
: CD-DA SIGNAL LINE : VCD VIDEO SIGNAL LINE : VCD AUDIO SIGNAL LINE
2
3
4
5
6
7
8
1
VCC
GND
IC1004
2
3
4
5
6
7
8
1
VCC
GND
IC1003
22
23
24
25
26
27
28
29
30
31
32
33
34
21
35
20
36
19
37
18
38
17
39
16
40
15
41
14
42
13
43
12
11
10
9
8
7
6
5
4
3
2
44
1
IC1001
MN101C427MA2
MP3 MICROPROCESSOR
100
99
98 97
96
95
94
93
92
34
33
32
31
30
29
28
2726
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
21
20
1918
17
16
15
14
13
12
11
10
98
7
6
5
4
3
2
1
22
24
23
32
31
30
29
28 27
26
25
33
3435
363738
39
40
41
42
43
44
IC1002
R1000
10K
R1005
4.7K
R1004
4.7K
R1006
4.7K
R1008
4.7K
R1001
680
C1011
0.022
C1007
0.1
C1008
0.1
C1006
0.1
C1012
0.022
C1002
0.1
C1003
0.1
C1001
0.1
C1000
0.47
RST
HCS
P4
P5
P6
P7
ERROR
PIBE
/PCS
/PRE
P3 /PWE
P2 /STOP
P1 ACK
A3
A2
A1
A0
/CS
/DW
/DR
D15
P0 DSPRST
POBF
NEXT
A4
A5
A6
A7
A8
A9
A10
OSCF0
BCLK
HDOUT
HDIN
HCLK
A11
A12
A13
A14
/STOP
DSPRST
A5
A6
A7
/DR
D15
D14
D13
D12
D11
D10
D9
D8
A8
A9
A10
A11
OSCF0
A4
A3
A2
A1
A0
/CS
D0
D1
D2
D3
D4
D5
D6
D7
/DW
A15
A14
A13
A12
ACK
LRCK
NC
P10
P06
P02
P01
P00
VSS
OSC1
OSC2
VDD
AN7
P27
MMOD
LED7
LED6
LED5
LED4
P70
P67
P66
P65
P64
P21
P20
P14
P13
P12
P11
P22
P60
P61
P62
P63
AN6
AN0
AN1
AN2
AN3
AN4
AN5
LED1
LED2
LED0
LED3
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
I/O16
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8 /IO9
A11
A10
A9
A8
NC
VCC
VSS
/BLE
/OE
/BHE
A7
A6
A5
NC
NC
A12
A13
A14
A15
/WE
VSS
VCC
/CE
A0
A1
A2
A3
A4
AMD0
/CS
VSS
AMD1
AMD2
AMD3
/DW
/DR
DMD15
MODE3
MODE2
MODE1
MODE0
GI3
GI2
GI1
GI0
VDD
OSCS0
OSCF0
VSS
AVSS
PCOUT
VCOIN
AVDD
VDD
/RST
/STOP
VSS
PLLSLEEP
AMD15
AMD14
AMD13
AMD12
AMD11
AMD10
AMD9
AMD8
AMD7
AMD6
AMD4
AMD5
VDD
MP3 MODULE CIRCUIT
SCHEMATIC DIAGRAM - 4
IC1002
C3BBHG000048
64K x 16 SRAM
R1050
10
: +B SIGNAL LINE
1
3
5
7
9
8
6
4
2
10
11
12
13
14
15
16
17
18
19
20
CN1000
5
4
3 2 1
IC1005
91 90
89 88
87
86
85
76
77
7879
80
81
82
8384
64
63
65
66
67
68
69
70
71
72
73
74
75
51
52
53
54
55
56
57
58
59
60
61
62
43
44
45
46 47
48
49
50
42
41
40
39
38
37
36
35
IC1000
MN1933222MD1
MP3 DIGITAL SIGNAL PROCESSOR
R1002
4.7K
C1004
0.1
C1010
0.1
C1005
0.1
C1009
0.1
8
9
10
11
12
13
14
76
5
43
2
1
IC1004
Q1000
Q1000
UN5211TX
TURN ON
IC1003 RESET
9
10
11
12
13
14
15
16
8
7
6
5
4
3
2
1
IC1003
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
BCLK
HCS
HDIN
HDOUT
HCLK
RST
SINH
BCLK
P7
LRCK
P6
SRDATA
P5
P4
P3
IBCLK
P2
LRCK_1D
P1
TXD1
P0
LRCK
POBF
PIBE
LRCK_1D
/PRE
/PWE
/PCS
BCLK
TXD1
RXD0
BCLK
SINH
A15
ERROR
NEXT
IBCLK
SRDATA
BCLK
RXD0
OSCF0
DGND
FCLK
DIDATA
DILRCK
DISCK
DGND
IPFLG
CDDATA
CDLRCK
CDSCK
DGND
RST
HCLK
HDOUT
HDIN
HCS
DGND
D+3.3V
D+3.3V
/SINH0
GND
/1Q
1Q
1PR
1CK
1D
1CLR
/2Q
2Q
2PR
2CK
2CLR
2D
VCC
GND
Q2
Q3
Q4
Q7
Q5
Q6
Q12
Q1
CLOCK
RESET
Q9
Q8
Q10
Q11
VCC
VSS
VDD
DMD1
DMD14
DMD13
DMD12
DMD11
DMD10
DMD9
DMD8
DMD7
DMD6
DMD5
DMD4
DMD3
DMD2
DMD0
VSS
P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
P0
POBF
PIBE
/PRE
/PWE
/PCS
TCLK
TOUT
VDD
/SINH1
SCLK1
SCLK0
RXD1
RXD0
TXD1
TXD0
SRDY1
SRDY0
GO4
GO3
GO2
GO1
GO0
IC1004
C0BAF000184
DUAL D FLIP FLOP
IC1005
C0BAB000007
INVERTER
IC1003
C0JBAK000133
RIPPLE-CARRY BINARY
COUNTER
TO
VCD CIRCUIT
(CN800) ON
SCHEMATIC
DIAGRAM-6
SCHEMATIC DIAGRAM - 5
MP3 MODULE CIRCUIT
VCC
OUT Y
NCIN AGND
BCLK
L1001
VLP0157-T
: MP3 SIGNAL LINE
: CD-DA SIGNAL LINE
: +B SIGNAL LINE
C827
10V220
Q808
Q807
Q805-Q808
KRC101STA
SWITCH
Q805
Q806
R797
1K
R896
4.7K
R894 4.7K
R780
10K
R791
10K
R787
10K
R782
10K
R786
10K
R784
10K
R783
10K
R781
10K
R898
4.7K
R897
4.7K
R895 4.7K
1K
C826
D800-D801
1SS355TE17
Q802-Q804
2SC2712GRT5T
SWITCH
Q801
Q801
KRC102STA
SWITCH (PCONT)
CBLKCK
CSUBQ
CRESTSW
EECS
EECLK
EEDA
VMUTE
EMPHA
HRDY
HINT
VRST
HCLK
HDIO
HSEL
MP3RST
MCLK
VMODE
SW5V
EEDA
R773
R774
R772
R771
47K
47K
47K
47K
3
R812
COUT
VRST
HCK
1K
CDRST
CSQCK
CMLD
CMDATA
CMCLK
0.1
CMCLK
CMDATA
CMLD
CCDSTAT
CDRST
CRESTSW
32
33
34
35
36 37
38
39
40
41
42 43
44
45
46
47
48
49
31
50
30
51
29
52
28
53
27
54
26
55
25
56
24
57
23
58
22
59
21
60
20
61
19
62
18
63
17
16 15 14 13
12
11
10
9
8
7
6
5
4
3 2
64
1
IC802
C2BBGF000281
MICROPROCESSOR
MP3RST
MP3ERR
HSEL
HDO
HDI
HCLK
VRST
HINT
HRDY
EMPHA
VMODE
VMUTE
NC
EEDA
EECLK
EECS
OPEN
CLAMP
BOTTOMSW
POSITION
NC
NC
CSQCK
SOUT
SUBQ
S-CS
S-CLK
SDATA_O
SDATA_I
S-REQ
MP3HCS
MP3CLK
MP3DOT
MP3DIN
CCDSTAT
CMLD
CMDATA
CMCLK
VCC
VREF
AVSS
NC
DACSEL
CRESTSW
CDRST
NC
NC
SEL(H : PM141/L :111)
NC
CHG_CCW
CHG_CW
CHG_PLGR
CHG_HALF
CDPCNT
VSS
XOUT
XIN
NC
NC
RST
CNVSS
BLKCK
100
100
100
100
100
100
POSITION
BOTTOMSW
CLAMP
OPEN
CHG_SW2
CHG_SW1
CSQCK
CSUBQ
R854
100
R853 100
R852
100
R851
100
R768
R833
47K
47K
CHG_HALF
CHG_PLGR
CHG_CW
CHG_CCW
R769
47K
R770
47K
R837
R799
1K
CDR
A.GND
CDL
CD3.3V
VMUTE
VMODE
CHG_HALF
CHG_PLGR
CHG_CW
CHG_CCW
SW5V
NCD
CVOUT
CD7.5V
PGND
MM_RST
MM_REQ
MM_CLK
MM_IO
MM_CS
CHG_SW1
CHG_SW2
OPEN
CLAMP
BOTTOMSW
POSITION
DGND
CD5V2
VGND
C816
6.3V100
L803
RLL500050T-Y
NCD
R845
10K
R848
47K
R843
22K
D800
D801
Q802
Q804
SW5V
MM_IO
MM_CS
MM_REQ
L801-L802
RLL500050T-Y
2
1
A+3.3V
CVOUT
19
18
17
16
15
14
13
12
11
10
4
6
8
9
7
5
R810
R809
R808
R807
R806
R805
R811
C804
1000P
TO
VIDEO
MODULE
CIRCUIT
(CN1000) ON
SCHEMATIC
DIAGRAM-3
XCK
D.GND
R.+5V
D.+3.3V
D.+3.3V
YOUT
VGND
VGND
D.GND
EMPH
DILRCK
HINT
SBCK
DISCK
DIDATA
HRDY
1K
1K
1K
1K
1K
1K
1K
30
29
28
27
26
25
24
23
22
CN801
R815
1K
R814 1K
R813
1K
DGND
BLKCK
SUBC
HDIO
CDSCK
CDDATA
CDLRCK
IPFLG
HSEL
CLOCK
21
20
MM_RST
CBLKCK
IC803
TC7W14FTE12L
INVERTER
DILRCK
R825
100
R826
100
DISCK
DACSEL
R828
1.8K
R827
1.8K
SBCK
DIDATA
L801
L802
CN803
30
2928272625242322212019181716151413121110
2 4 6 8 9753
1
TO
MAIN CIRCUIT (CN305)
ON SCHEMATIC DIAGRAM-9
VDD
4
3
2
1
GND
5
6
7
8
R821
47
R766
0
R820
1K
R880
R873
R875
R877
R878
R879
Q803
MM_CLK
R883
R882
R884
R885
R886
R887
4.7K
4.7K
47K
4.7K
4.7K
4.7K
IN
GND
OUT
Q800
CN800
R881
10K
R790 10K
R789
10K
RESTSW
STAT
SUBQ
BLKCK
CCDSTAT
R793
0
R891
47K
MP3CLK
MP3DOT
MP3DIN
DACSEL
MP3HCS
R776
10K
C820
10V100
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
24689 7 5 3 1
CN802
R871 1K
R864 1K
R866
1K
R867 1K
R869
1K
R876
1K
R874
2.2K
R872
1K
R870
1K
R862 1K
R858
100
R857
1K
R850 100
R849
100
68
R842
100
R838
100
R836
100
L803
C813
0.1
TX
EFM
VCOF
RESET SW
SUBC
/RST
STAT
SBCK
SUBQ
SQCK
BLKCK
MLD
MDATA
MCLK
P.GND
+7.5V
IPFLAG
CLOCK
D.GND
LRCK
SRDATA
BCLK
+3.3V
DISCK
DILRCK
DIDATA
+3.3V
RCH OUT
A. GND
LCH OUT
R868
10K
R888
100K
R890
47K
R889
22K
R892
22K
SW5V
EECS
EECLK
CDDATA
C809
0.47
R804
220
BCLK
3
2
1
19
18
17
16
15
14
13
12
11
10
4
6
8
9
7
5
20
C802
6.3V100
C806
6.3V100
R785
10K
C808
6.3V100
TO
MP3
MODULE
CIRCUIT
(CN1000) ON
SCHEMATIC
DIAGRAM-5
R777
0
R778
0
CDR
CDL
+3.3V
R846
CD7.5V
SCHEMATIC DIAGRAM - 6
VCD CIRCUIT
C828
470P
R899
10K
R893
22K
C824
33P
C825
33P
CHG_SW1
CHG_SW2
TO
CD SERVO CIRCUIT (CN702)
ON SCHEMATIC DIAGRAM-2
R765
47K
C850
0.01
R856
47K
R834
10K
R831
1.5K
X800
RSXY6M00D01T
R841
10K
0.01
C851
R835
47K
R844
4.7K
R779
0
C812
0.1
: +B SIGNAL LINE
C810
0.1
R840
1K
C815
0.01
C803
1000P
0
R761
0
R763
R822
1.8K
R823
1.8K
R830
1K
R829
100
C811
0.1
MP3SCK
MP3LRCK
MP3DATA
L800
C800
6.3V100
C801
1000P
R801 100
R802 100
R803
100
C830
82P
C805
1000P
R795
1K
C807
0.1
R816
100
R824
100
MHCS
MHDIN
MHCLK
MRST
CDLRCK
CDDATA
MP3SCK
MP3LRCK
MP3DATA
R800
10K
R794
1.8K
R818
100
R817
100
R767
0
R762
0
R760
0
CVOUT
R819
10K
MHDIN
MHCS
MHCLK
MRST
R859
1K
R860
100
R863 4.7K
R865
100
R861 4.7K
100P
C817
C819 10P
C818
10P
R839
1K
R847
4.7K
C814
10P
R855
1K
MP3RST
SW5V
MP3DIN
MP3HCS
MP3CLK
IC801
TC74HC157AFT
MULTIPLEXOR/
QUAD 2 CHANNEL
MP3DOT
L800
RLL500050T-Y
Q800
KRC101STA
SWITCH
MDATA
MLD
SQCK
/RST
C829
50V0.47
C821
1000P
R788
220
C822
330P
C823
0.022
HDOUT
CDSCK
CDLRCK
CDDATA
DILRCK
DIDATA
OSCFO
D+3.3V
D+3.3V
DGND
HCS
HDIN
HCLK
RST
DGND
IPFLG
DGND
DISCK
FCLK
DGND
IPFLG
IC801
IC800
TC74HC4050EL
HEX NON-INVERTING BUFFER/
LEVEL SHIFTER (GATE BUFFER)
IC800
: CD-DA SIGNAL LINE
: CD SIGNAL LINE
: VCD VIDEO SIGNAL LINE
: MP3 SIGNAL LINE : VCD AUDIO SIGNAL LINE
4Y
6A
NC
6Y
NC
5Y
5A
4A
VSS
3A
3Y
2A
2Y
IA
IY
VDD
9
10
11
12
13
14
15
16
8
7
6
5
3
4
2
1
10
11
12
13
14
15
16
9
1
8
7
6
5
3
4
2
3B
4A
VCC
G
4B
4Y
3A
3Y
GND
2Y
2B
2A
IY
IB
IA
L:A/H:B
Loading...