9. PARTS LOCATION ............................................................................................................39
10. EXPLODED VIEW AND PARTS LIST ............................................................................... 57
11. MICROPROCESSOR AND IC DATA .................................................................................. 67
12. ELECTRICAL PARTS LIST ................................................................................................ 93
13. ABOUT REPLACE THE MICROPROCESSOR WITH A NEW ONE .............................133
SHOCK, FIRE HAZARD SERVICE TEST :
CAUTION : After servicing this appliance and prior to returning to customer, measure the resistance between either primary AC
cord connector pins ( with unit NOT connected to AC mains and its Power switch ON ), and the face or Front Panel of product
and controls and chassis bottom.
Any resistance measurement less than 1 Megohms should cause unit to be repaired or corrected before AC power is applied,
and verifi ed before it is return to the user/customer.
Ref. UL Standard No. 1492.
SAFETY PRECAUTIONS
The following check should be performed for the continued protection of the customer and service technician.
LEAKAGE CURRENT CHECK
Before returning the unit to the customer, make sure you make either (1) a leakage current check or (2) a line to chassis
resistance check. If the leakage current exceeds 0.5 milliamps, or if the resistance from chassis to either side of the power
cord is less than 460 kohms, the unit is defective.
CAUTION
Please heed the points listed below during servicing and inspection.
◎ Heed the cautions!
Spots requiring particular attention when servicing, such as
the cabinet, parts, chassis, etc., have cautions indicated on
labels or seals. Be sure to heed these cautions and the cautions indicated in the handling instructions.
◎ Caution concerning electric shock!
(1) An AC voltage is impressed on this set, so touching inter-
nal metal parts when the set is energized could cause
electric shock. Take care to avoid electric shock, by for example using an isolating transformer and gloves when
servicing while the set is energized, unplugging the power
cord when replacing parts, etc.
(2)There are high voltage parts inside. Handle with extra care
when the set is energized.
◎
Caution concerning disassembly and assembly!
Though great care is taken when manufacturing parts from
sheet metal, there may in some rare cases be burrs on the
edges of parts which could cause injury if fingers are moved
across them. Use gloves to protect your hands.
◎ Only use designated parts!
The set's parts have specific safety properties (fire resistance, voltage resistance, etc.). For replacement parts, be
sure to use parts which have the same properties. In particular, for the important safety parts that are marked ! on wiring
diagrams and parts lists, be sure to use the designated parts.
◎ Be sure to mount parts and arrange the
wires as they were originally!
For safety reasons, some parts use tape, tubes or other insulating materials, and some parts are mounted away from the
surface of printed circuit boards. Care is also taken with the
positions of the wires inside and clamps are used to keep
wires away from heating and high voltage parts, so be sure to
set everything back as it was originally.
◎ Inspect for safety after servicing!
Check that all screws, parts and wires removed or disconnected for servicing have been put back in their original positions, inspect that no parts around the area that has been
serviced have been negatively affected, conduct an insulation
check on the external metal connectors and between the
blades of the power plug, and otherwise check that safety is
ensured.
(Insulation check procedure)
Unplug the power cord from the power outlet, disconnect the
antenna, plugs, etc., and turn the power switch on. Using a
500V insulation resistance tester, check that the insulation resistance between the terminals of the power plug and the externally exposed metal parts (antenna terminal, headphones
terminal, microphone terminal, input terminal, etc.) is 1MΩ or
greater. If it is less, the set must be inspected and repaired.
CAUTION
Many of the electric and structural parts used in the set have
special safety properties. In most cases these properties are
difficult to distinguish by sight, and using replacement parts
with higher ratings (rated power and withstand voltage) does
not necessarily guarantee that safety performance will be preserved. Parts with safety properties are indicated as shown
below on the wiring diagrams and parts lists is this service
manual. Be sure to replace them with parts with the designated part number.
(1) Schematic diagrams ... Indicated by the ! mark.
(2) Parts lists ... Indicated by the ! mark.
Concerning important safety parts
Using parts other than the designated parts
could result in electric shock, fires or other
dangerous situations.
Dolby Surr. EXDolby Digital EXOOOOO
Dolby D (5.1ch) Dolby Digital 5.1OOO -O
Dolby D(2ch)Dolby Digital 2.0O----
Dolby D (2ch Surr)Pro Logic IIx movieOOOO DTS-ESDTS-ESOOOOOdts, ESL, C, R, SL, SR, S, LFE
DTS 96/24DTS 96/24OOO -O dts 96/24L, C, R, SL, SR, LFE
DTS (5.1ch) DTS 5.1OOO -O dts L, C, R, SL, SR, LFE
Multi Ch-PCMMulti Ch-PCMOOO -O PCML, C, R, SL, SR, LFE
Multi Ch-PCM 96kHzMulti Ch-PCM 96kHzOOO -O PCML, C, R, SL, SR, LFE
PCM(Audio)PCM (Stereo)O----PCML, R
PCM 96kHzPCM (96kHz Stereo)O----PCML, R
HDCDPCM (Stereo)O---- PCM HDCDL, R
AnalogStereoO---- ANALOGDolby D Surr. EXDolby Digital EXOOOOO
Dolby D (5.1ch) Dolby Digital 5.1OOO -O
Dolby D (2ch)Dolby Digital 2.0O----
Dolby D (2ch Surr)Pro Logic IIx movieOOOO DTS-ESDTS-ESOOOOOdts, ESL, C, R, SL, SR, S, LFE
DTS 96/24DTS 96/24OOO -O dts 96/24L, C, R, SL, SR, LFE
DTS (5.1ch) DTS 5.1OOO -O dts L, C, R, SL, SR, LFE
Multi Ch-PCMMulti Ch-PCMOOO -O PCML, C, R, SL, SR, LFE
Multi Ch-PCM 96kHzMulti Ch-PCM 96kHzOOO -O PCML, C, R, SL, SR, LFE
PCM (Audio)PCM (Stereo)O----PCML, R
PCM 96kHzPCM (96kHz Stereo)O----PCML, R
HDCDPCM (Stereo)O---- PCM HDCDL, R
AnalogStereoO---- ANALOGDolby D Surr. EXDolby Digital EXOOOOO
Dolby D (5.1ch) Dolby Digital EXOOOOO
DTS-ESDTS-ESOOOOOdts , ESL, C, R, SL, SR, S, LFE
DTS(5.1ch) DTS-ESOOOOOdts L, C, R, SL, SR, LFE
Multi-PCM
AAC (5.1ch)AAC EXOOO -O AACL, C, R, SL, SR, LFE
Dolby D Surr. EXDolby Digital 5.1OOOOO
Dolby D (5.1ch) Dolby Digital 5.1OOOOO
Dolby D (2ch)Pro Logic II xOOOO -
Dolby D (2ch Surr)Pro Logic IIxOOOO -
Multi Ch-PCMMulti Ch-PCM + PLIIxOOOOOPCML, C, R, SL, SR, LFE
PCM (Audio)Pro Logic II xOOOO - PCML, R
AnalogPro Logic IIxOOOO -ANALOG-
DTS-ESDTS 5.1OOO -O dts, ESL, C, R, SL, SR, S, LFE
DTS 96/24DTS 96/24OOO -O dts 96/24L, C, R, SL, SR, LFE
DTS (5.1ch) DTS 5.1OOO -O dts L, C, R, SL, SR, LFE
PCM (Audio)Neo:6OOOO - PCML, R
AnalogNeo:6OOOO -ANALOGDolby D (2ch)Neo:6OOOO -
Dolby D (2ch Surr)Neo:6OOOO -
PCM (Audio)CS IIOOOOOPCML, R
AnalogCS IIOOOOOANALOG-
Dolby D (2ch)CS IIOOOOO
Dolby D (2ch Surr)CS IIOOOOO
Dolby Surr. EXStereoO---O
Dolby D (5.1ch) StereoO---O
Dolby D (2ch)StereoO---Dolby D (2ch Surr)StereoO---DTS-ESStereoO---O dts, ESL, C, R, SL, SR, S, LFE
DTS 96/24StereoO---O dts 96/24L, C, R, SL, SR, LFE
DTS (5.1ch) StereoO---O dts L, C, R, SL, SR, LFE
Multi Ch-PCMStereoO---O PCML, C, R, SL, SR, LFE
PCM (Audio)StereoO----PCML, R
PCM 96kHzStereoO----PCML, R
HDCDPCM (Stereo)O---- PCM HDCDL, R
AnalogStereoO----ANALOGDolby Surr. EXVirtualO----
Dolby D (5.1ch) VirtualO----
Dolby D (2ch)VirtualO---Dolby D (2ch Surr)VirtualO----
DTS-ESVirtualO----dts, ESL, C, R, SL, SR, S, LFE
DTS (5.1ch) VirtualO----dts L, C, R, SL, SR, LFE
PCM (Audio)VirtualO----PCML, R
AnalogVirtualO----ANALOGDolby Surr. EXDolby Digital EXOOOOO
Dolby D (5.1ch) Dolby Digital 5.1OOO -O
Dolby D (2ch)Multi Channel StereoOOOO Dolby D (2ch Surr)Multi Channel StereoOOOO -
DTS-ESDTS-ESOOOOOdts, ESL, C, R, SL, SR, S, LFE
DTS (5.1ch) DTS 5.1OOO -O dts L, C, R, SL, SR, LFE
Multi Ch-PCMMulti Ch-PCMOOO -O PCML, C, R, SL, SR, LFE
Multi Ch-PCM 96kHzMulti Ch-PCM 96kHzOOO -O PCML, C, R, SL, SR, LFE
PCM (Audio)Multi Channel StereoOOOO - PCML, R
AnalogMulti Channel StereoOOOO - ANALOG-
Multi Ch-PCM + Dolby EX
Output ChannelFront information display
SLSRSBL
L/R C
OOOOOPCML, C, R, SL, SR, LFE
Signal format indicatorsChannel status
SubW
SBR
2 DIGITAL
2 DIGITAL
2 DIGITAL
2 DIGITAL , 2 SURROUND
2 DIGITAL
2 DIGITAL
2 DIGITAL
2 DIGITAL , 2 SURROUND
2 DIGITAL
2 DIGITAL
2 DIGITAL
2 DIGITAL
2 DIGITAL
2 DIGITAL , 2 SURROUND
2 DIGITAL
2 DIGITAL ,
2 DIGITAL
2 DIGITAL , 2 SURROUND
2 DIGITAL
2 DIGITAL
2 DIGITAL
2DIGITAL , 2 SURROUND
2 DIGITAL
2 DIGITAL
2 DIGITAL
2 DIGITAL , 2 SURROUND
2 DIGITAL
2 DIGITAL
2 DIGITAL
2 DIGITAL , 2 SURROUND
2 SURROUND
L, C, R, SL, SR, S, LFE
L, C, R, SL, SR, LFE
L, R
L, R, S
L, C, R, SL, SR, S, LFE
L, C, R, SL, SR, LFE
L, R
L, R, S
L, C, R, SL, SR, S, LFE
L, C, R, SL, SR, LFE
L, C, R, SL, SR, S, LFE
L, C, R, SL, SR, LFE
L, R
L, R, S
L, R
L, R, S
L, R
L, R, S
L, C, R, SL, SR, S, LFE
L, C, R, SL, SR, LFE
L, R
L, R, S
L, C, R, SL, SR, S, LFE
L, C, R, SL, SR, LFE
L, R
L, R, S
L, C, R, SL, SR, S, LFE
L, C, R, SL, SR, LFE
L, R
Notes:
• Dolby Digital (2 ch: Lt/Rt): signal with Dolby
Surround fl ag Speakers are full set.
• No sound outputs from the surround speaker, center
speaker and subwoofer if the DVD disc has no
surround data.
Abbreviations
L/R : Front speakers
C : Center speaker
SL/SR : Surround speakers
SBL/SBR : Surround Back speakers
SubW : Sub woofer speaker
4
2. TECHNICAL DESCRIPTION
DTS was introduced in 1994 to provide 5.1 channels of
discrete digital audio into home theater systems.
DTS brings you premium quality discrete multichannel
digital sound to both movies and music.
DTS is a multichannel sound system designed to
create full range digital sound reproduction.
The no compromise DTS digital process sets the
standard of quality for cinema sound by delivering
an exact copy of the studio master recordings to
neighborhood and home theaters.
Now, every moviegoer can hear the sound exactly as
the moviemaker intended.
DTS can be enjoyed in the home for either movies or
music on of DVD’s, LD’s, and CD’s.
“DTS” and “DTS Digital Surround” are registered
trademarks of Digital Theater Systems, Inc.
The advantages of discrete multichannel systems
over matrix are well known.
But even in homes equipped for discrete multichannel,
there remains a need for high-quality matrix decoding.
This is because of the large library of matrix surround
motion pictures available on disc and on VHS tape; and
analog television broadcasts.
The typical matrix decoder of today derives a center
channel and a mono surround channel from twochannel matrix stereo material. It is better than a
simple matrix in that it includes steering logic to
improve separation, but because of its mono, bandlimited surround it can be disappointing to users
accustomed to discrete multichannel.
Neo:6 offers several important improvements as
follow,
• Neo:6 provides up to six full-band channels of
matrix decoding from stereo matrix material. Users
with 6.1 and 5.1 systems will derive six and fi ve
separate channels, respectively, corresponding to
the standard home-theater speaker layouts.
Neo:6 technology allows various sound elements
•
within a channel or channels to be steered
separately, and in a way which follows naturally
from the original presentation.
•
Neo:6 offers a music mode to expand stereo nonmatrix
recordings into the fi ve- or six-channel layout, in a way
which does not diminish the subtlety and integrity of
the original stereo recording.
DTS-ES Extended Surround is a new multichannel
digital signal format developed by Digital Theater
Systems Inc. While offering high compatibility with
the conventional DTS Digital Surround format, DTSES Extended Surround greatly improves the 360degree surround impression and space expression
thanks to further expanded surround signals. This
format has been used professionally in movie
theaters since 1999.
In addition to the 5.1 surround channels (FL, FR, C,
SL, SR and LFE), DTS-ES Extended Surround also
offers the SB (Surround Back) channel for surround
playback with a total of 6.1 channels. DTS-ES
Extended Surround includes two signal formats with
different surround signal recording methods, as DTSES Discrete 6.1 and DTS-ES Matrix 6.1.
“DTS”, “DTS-ES” and “Neo:6” are trademarks of
Digital Theater Systems, Inc.
The stereo CD is a 16-bit medium with sampling at
44.1 kHz. Professional audio has been 20- or 24bit for some time, and there is increasing interest
in higher sampling rates both for recording and for
delivery into the home. Greater bit depths provide
extended dynamic range. Higher sampling rates
allow wider frequency response and the use of antialias and reconstruction fi lters with more favorable
aural characteristics.
DTS 96/24 allows for 5.1channel sound tracks to be
encoded at a rate of 96kHz/24bits on DVD-Video
titles.
When DVD-video appeared, it became possible to
deliver 24-bit, 96 kHz audio into the home, but only in
two channels, and with serious limitations on picture.
This capability has had little use.
DVD-audio allows 96/24 in six channels, but a
new player is needed, and only analog outputs are
provided, necessitating the use of the D/A converters
and analog electronics provided in the player.
DTS 96/24 offers the following:
1. Sound quality transparent to the original 96/24
master.
2.
Full backward compatibility with all existing
decoders. (Existing decoders will output a 48 kHz
signal)
3. No new player required: DTS 96/24 can be carried
on DVD-video, or in the video zone of DVD-audio,
accessible to all DVD players.
4. 96/24 5.1-channel sound with full-quality fullmotion video, for music programs and motion
picture soundtracks on DVD-video.
“DTS” and “DTS 96/24” are trademarks of Digital
Theater Systems, Inc.
5
Dolby Digital identifi es the use of Dolby Digital audio
coding for such consumer formats as DVD and DTV.
As with fi lm sound, Dolby Digital can provide up
to fi ve full-range channels for left, center, and right
screen channels, independent left and right surround
channels, and a sixth (“.1”) channel for low-frequency
effects.
Dolby Surround Pro Logic II is an improved matrix
decoding technology that provides better spatiality
and directionality on Dolby Surround program
material; provides a convincing three-dimensional
soundfi eld on conventional stereo music recordings;
and is ideally suited to bring the surround experience
to automotive sound. While conventional surround
programming is fully compatible with Dolby Surround
Pro Logic II decoders, soundtracks will be able to be
encoded specifi cally to take full advantage of Pro
Logic II playback, including separate left and right
surround channels. (Such material is also compatible
with conventional Pro Logic decoders.)
Dolby Digital EX creates six full-bandwidth output
channels from 5.1-channel sources. This is done
using a matrix decoder that derives three surround
channels from the two in the original recording. For
best results, Dolby Digital EX should be used with
movies soundtracks recorded with Dolby Digital
Surround EX.
Circle Surround II (CS-II ) is a powerful and versatile
multichannel technology. CS-II is designed to enable
up to 6.1 multichannel surround sound playback
from mono, stereo, CS encoded sources and other
matrix encoded sources. In all cases the decoder
extends it into 6 channels of surround audio and a
LFE/subwoofer signal. The CS-II decoder creates a
listening environment that places the listener “inside”
music performances and dramatically improves
both hi-fi audio conventional surround-encoded
video material. CS-II provides composite stereo rear
channels to greatly improve separation and image
positioning – adding a heightened sense of realism
to both audio and A/V productions.
CS-II is packed with other useful feature like dialog
clarity (SRS Dialog) for movies and cinema-like bass
enrichment (TruBass). CS-II can enable the dialog
to become clearer and more discernable in movies
and it enables the bass frequencies contained in
the original programming to more closely achieve
low frequencies – overcoming the low frequency
limitations of the speakers by full octave.
Circle Surround II , Dialog Clarity, TruBass, SRS and
symbol are trademarks of SRS Labs, Inc.
Circle Surround II, Dialog Clarity and TruBass
technology are incorporated under license from SRS
Labs, Inc.
About Dolby Pro Logic IIx
Dolby Pro Logic II x technology delivers a natural
and immersing 7.1-channel listening experience
to the home theater environment. A product of
Dolby’s expertise in surround sound and matrix
decoding technologies, Dolby Pro Logic II x is a
complete surround sound solution that maximizes
the entertainment experience from stereo as well as
5.1-channel encoded sources.
Dolby Pro Logic II x is fully compatible with Dolby
Surround Pro Logic technology and can optimally
decode the thousands of commercially available
Dolby Surround encoded video cassettes and
television programs with enhanced depth and
spatiality. It can also process any high-quality
stereo or Advanced Resolution 5.1-channel music
content into a seamless 6.1- or 7.1-channel listening
experience.
6
HDCD® (High Defi nition Compatible Digital ®) is a
patented process for delivering on Compact Disc the
full richness and details of the original microphone
feed.
HDCD encoded CDs sound better because they are
encoded with 20-bits of real musical information as
compared to 16-bits for all other CDs.
HDCD overcomes the limitation of the 16-bit CD
format by using a sophisticated system to encode
the additional four bits onto the CD while remaining
completely compatible with the CD format.
When listening to HDCD recordings, you hear more
dynamic range, a focused 3-D sound stage, and
extremely natural vocal and musical timbre. With
HDCD, you get the body, depth and emotion of the
original performance not a fl at, digital imitation.
HDCD system manufactured under license from
Microsoft. This product is covered by one or more
of the following: In the United States 5,479,168
5,638,074 5,640,161 5,808,574 5,838,274 5,854,600
5,864,311 5,872,531 and in Australia 669,114 with
other patents pending.
XM Satellite Radio Ready
The XM name and related logos are registered
trademarks of XM Satellite Radio Inc.
HDMI, the and High-Defi nition Multimedia
Interface are trademarks or registered trademarks of
HDMI Licensing LLC.
7
3. SERVICE MODE
3. SERVICE MODE
Microprocessor (IC11), DSP(IC40 )Version and FLD Segment
Check Mode.
1. While the power is on, MUTE, EXIT and KEY-LOCK
buttons simultaneously more than 3 seconds.
The FL display shows "SERVICE MODE" for 2 seconds
then shows the model name.
SERV I CEMODE
DN - A 7 1 0 0
2. Press KEY-LOCK button, The software version of the
microprocessor (IC11) is displayed in the format below.
V0607111U
Year
MonthDateDest.
(Dest. : Destination)
3. Press KEY-LOCK button again, The software Serial
Number that is wirtten in the factory is displayed.
Microprocessor (IC11), DSP(IC40 ) の Version 表示及び FL
点燈を確認するモードです。
1. セットの電源を入れます。
タンを同時に約
3 秒以上押します。
MUTE, EXIT, KEY-LOCK
のボ
"SERVICE MODE" と表示が出ます。更に約 2 秒後に機種
名が表示されます。
SERV I CEMODE
DN - A 7 1 0 0
2.
KEY-LOCK
ジョンが次のように表示されます。
ボタンを押します。マイコン(IC11)のバー
V0607111U
MonthDateDest.Year
(Dest. : 仕向け)
KEY-LOCK
3.
ボタンを押します。工場で書き込み済みの
Software Serial No. が表示されます
MZXXXXXXXXXXXMZXXXXXXXXXXX
4. Press KEY-LOCK button again, The software Type
Number is displayed.
SOF TTYPEXX
(XX is displayed in Hex)
5. Press KEY-LOCK button again, The Code Group Type
Number is displayed.
CODETYPEXXXX
(XXXX is displayed in Hex)
6. Press KEY-LOCK button again, The left half, right half
and center of the label area in the FLD light on and off
each other.
7. Press KEY-LOCK button again, The segments of the
character area in the FLD fl ick in checker pattern.
8. Press KEY-LOCK button again, All the FL segments
turns off.
9. Press KEY-LOCK button again. Every time KEY-LOCK
button is pressed, DSP code is indicated in turn from
NO.1 to NO.10.
4.
KEY-LOCK
ボタンを押します。マイコン(IC11)の
Soft ware Type が表示されます。
SOFTTYPEXX
(XX: Hex数字表示)
5.
KEY-LOCK
されます。
ボタンを押します。Code Group Type が表示
CODETYPEXXXX
(XXXX: Hex数字表示)
6.
KEY-LOCK
分が交互に点燈を繰り返します。
7.
KEY-LOCK
点滅します。
8.
KEY-LOCK
9.
KEY-LOCK
す度に
れます。
ボタンを押します。FL 表示の右、左、中央部
ボタンを押します。FL の Character 部分が
ボタンを押します。FL が全消灯します。
ボタンを押します。
KEY-LOCK
ボタンを押
DSP Code ID が NO.1 から NO.10 まで順に表示さ
CD0102060105
SIGDev.TYPVer.No.
No. : DISP CODE ID Dev. : Device ID SIG. : CODE SIG ID
TYP. : CODE TYPE ID Ver. : Version
10. Press KEY-LOCK button again to quit this mode.
CD0102060105
SIGDev.TYPVer.No.
No. : DISP CODE ID Dev. : Device ID SIG. : CODE SIG ID
TYP. : CODE TYPE ID Ver. : Version
KEY-LOCK
10.
れます。
ボタンを押します。サービスモードは解除さ
8
Note: Step4, 5 is to check if CPU software is capable of
DSP code. "Software Type No" is to show what "DSP
Code Group" CPU is capable of. And vice versa.
Step 9 is to manage the 16 codes for DSP.
• When the unit is once turned into Service Mode, the
unit keeps this mode until the main power is turned
off. (Turning into stand-by mode does not make it
quit from Service Mode.) When the unit quits from
Service Mode, Information in the memory is also
cleared and the unit returns to the status when it is
out from the factory.
Product Reset
To reset the back up memory of the unit into the default
status, follow the procedure below.
Should the operation or display seem to be abnormal,
reset the unit with the following procedure.
To turn on the DN-A7100, press and hold the KEY-
LOCK and CLEAR buttons simultaneously for 3
seconds or more.
Remember that the procedure will reset the settings
of the SOURCE, Surround mode, delay time, TUNER
PRESET etc., to their initial settings.
Personal notes:
9
4. SYSTEM ERROR
4. SYSTEM ERROR
When the microcomputer detects a trouble, the following
information is displayed on the FLD.
• After the error contents indication, Surround Mode is
initialized and returned Factory mode.
• The contents of the ERROR indication are the
製品内部での異常発生時に処理、表示を行います。主に各
Device
との通信異常を検出します。
ERROR
・
状態に戻ります。
ERROR
・
表示後、
表示の内容は下記です。
Surround Mode
は初期化され工場出荷の
followings.
1. Trouble in DSP
If communication with DSP is troubled more than 2
1. DSP 異常検出表示
DSP
との通信上の不具合を約
2 秒検出した時。
seconds.
CHECKDSPCHECKDSP
2. Trouble in DSP Code
The trouble of DSP Code was found.
2. DSP Code 異常検出表示
DSP Code
の異常を検出した時。
CHECKDSPROM CHECKDSPROM
3. Trouble in EEP-ROM
If data from EEPROM does not match.
3. EEP-ROM 異常検出表示
EEP-ROM Data
の不整合を検出した時。
CHECKE2PCHECKE 2 P
4. Trouble in EEP-ROM IF
If communication with EEPROM is troubled more than 2
4. EEP-ROM IF 異常検出表示
EEP-ROM
との通信不具合が約
2 秒以上生じた時。
seconds.
CHECKE2PI FCHECKE 2 PI F
5. Trouble in RS-232C
If communication of Panja with RS232C is troubled more
than 2 seconds.
5. RS-232C
Panja
通信時に
出した時。
異常検出表示
RS
-232
C
との通信不具合を約
2 秒以上検
CHECK2 3 2CCHECK2 3 2 C
6. Trouble in 5V Supply
If 5V supply to DATA DIR is troubled.
6. 5V 異常検出表示
D ATA DIR
. の異常を検出した時。
CHECKPOW5CHECKPOW5
7. Trouble in Protection
CPU turns off the speaker output.
7. Protection 信号異常検出表示
Speaker
からを出力を止めます。
PROTECTPROTECT
8. Trouble in ADC
When ADC input was chosen and CAL signal continued
8. AD コンバータ異常検出表示
CAL 信号 High 状態を 2 秒以上検出した時。
High about 2 seconds after the ADC Calibration start.
CHECKADC
CHECKADC
10
5. UPDATE FIRMWARE
5. UPDATE FIRMWARE
Software for CPU and DSP can be updated.
Have update application software. ("UpgradeDSP.exe" and
"H8Download.exe")
There are two mode of download, regarding to the target of
software as bellow.
Mode 1: Update DSP’s software to Flash-ROM.
This mode is to update the software for DSP.
The target devise is Flash-ROM (IC40) on CUP11942
(INPUT PWB).
The Unit needs to be set update condition, by three front
keys.
Mode 2: Update CPU’s software to internal Flash-ROM.
This mode is to update the software for CPU.
The target devise is internal fl ash ROM of CPU (IC11) on
CUP11942 (INPUT PWB).
The Unit needs to be set to writing condition, by pushing
internal switch from back-panel.
The following items are required for updating.
RS232C Dsub-9 pin cable (female to female/Straight type)
Windows PC (98, NT, ME, 2000, XP) with RS-232C port.
Update software to CPU.
Update software to DSP.
Use RS232C Dsub-9 pin cable (female to female/Straight
type) to connect PC and the unit.
COM port on PC needs to be set by dialog box for each
program. COM port can be set from COM1 to COM5.
CPU および DSP ソフトウェアのアップデートを行います .
ソフトウェアのアップデートには UpgradeDSP.exe と
H8Download.exe が必要です。
アップデートには次の二つのモードがあります。
Mode 1:DSP 用 Flash-ROM のアップデート
このモードは DSP のソフトウェアをアップデートするモー
ドです。
CUP11942 (INPUT PWB) の基板上にある Flash-ROM
のソフトウェアをアップデートします。
(IC40)
本機、フロントパネルにある 3 つのボタンを押してアップ
デートモードにします。
Mode 2:CPU の内部 Flash-ROM のアップデート
このモードは CPU のソフトウェアをアップデートするモー
ドです。
CUP11942 (INPUT PWB) の基板上にある CPU(IC11) の
内部
Flash-ROM のソフトウェアをアップデートします。
本機のリアパネルから内部スイッチを押してアップデート
モードにします。
アップデートには下記の機器が必要です。
RS-232C
Windows PC Serial Port
CPU
ストレートケーブル (9Pin メス -9Pin メス )
付き (OS: 98, NT, ME, 2000, XP)
用アップデートソフトウェア
( 必要機器 )
DSP 用アップデートソフトウェア
RS-232C ケーブルで本機と接続する PC の COM ポート番号
を設定してください。
COM ポート番号は COM1 から COM5 まで設定できます。
Download Firmware for DSP (Mode 1)
1. Put the "DSP upgrade" folder into anywhere on your PC’
s hard disc.
2. Connect PC and the unit with the RS-232C cable.
DSP アップデート方法 (Mode 1)
1. "DSP upgrade"
します。
フォルダを PC のハードディスクにコピー
2. 本機と PC を RS-232C で接続します。
3. Turn on the unit.
3. 本機の電源を入れます。
11
4. Press ENTER, MUTE and T-MODE buttons
simultaneously more than 5 seconds to turn the unit into
Loading Mode.
5. "LOADING MODE" will be shown on FLD.
4. ENTER, MUTE, T-MODE の 3 つのボタンを同時に 5 秒以
上押し続けて
ディスプレイに "LOADING MODE" と表示されます。
5. FL
Loading Mode にします。
6. Launch "UpgradeDSP.exe" on PC.
Note : yy_mm_dd is release date of software.
6. PC から "UpgradeDSP.exe" をダブルクリックして起動し
ます。
注記
: ファイル名の yy_mm_dd はソフトウェアの発行日をあ
らわします。
7. Click Port setting, and select the COM Port No.
7. Port setting をクリックし、COMポート番号を選択します。
12
8. Set the Baud rate to 38400 then click Start
communication button.
8. Baud rate を 38400 に設定し、Start communication を
クリックします。
9. If the connection is made successfully, a dialog
box saying "Success to connect" appears and
“CONNECTED” is displayed on FLD.
10. Click Send the DSP codes button on the dialog box.
Progress status of updating will be shown on PC and
LOADING is displayed on FLD.
9. 通信接続に成功すると下記のダイアログボックスが表示さ
れ、
FL ディスプレイには "CONNECTED" が表示されます。
10. Send the DSP codes をクリックします。アップデー
トのステータスバーが表示され、
FL ディスプレイには
"LOADING" が表示されます。
11. If updating is completed successfully, "COMPLETED" is
displayed on FLD. And a dialog box saying "Finished the
DSP code transmitting" appears.
12. Click OK and then Application is closed automatically.
13. Turn off the unit.
11. アップデートが成功すると FL ディスプレイに
"COMPLETED" と表示されます。同時に "Finished the
DSP code transmitting"
ます。
のダイアログボックスが表示され
12. OK をクリックすると自動的にアプリケーションが閉じま
す。
13. 本機の電源を切ります。
13
Download Firmware for CPU (Mode 2)
1. Put the "CPU update" folder into anywhere on your PC’s
hard disc.
CPU のアップデート方法 (Mode 2)
1. "CPU update"
します。
フォルダを PC のハードディスクにコピー
2. Connect PC and the unit with the RS-232C cable.
RS-232C cable
3. Insert a thin rot to the hole and push the switch (SW99)
inside to turn on the switch.
2. 本機と PC を RS-232C ケーブルで接続します。
SW99
Hole of rear panel
リアパネルにある穴
3. 細い棒を使い本機のリアパネルにある穴からスイッチ
(SW99) を押します。
4. Turn on the power of the unit.
Note : When the unit is into boot mode, stand-by LED is
not lights up.
4. 本機の電源を入れます。
注記
: 本機はブートモードになり、Stand-by LED は点灯しま
せん。
14
5. Launch "H8Download.exe" on PC.
H8FW2505
H8FW2505
H8FW2505
5. PC から "H8Download.exe" をダブルクリックして起動し
ます。
6. Click Set Ports, and select the COM Port No.
7. Click other fi les... button in the dialog box to specify the
fi le (DNA7100_yymmdd.mot) to be uploading. yymmdd
in fi le name is release date of software.
6. Set Ports をクリックし、COM ポート番号を選択します。
7. other files…をクリックして、アップデートファイル
(DNA7100_yymmdd.mot) を選択し開きます。
H8FW2505
DNA7100_yymmdd.mot
15
DNA7100_yymmdd.mot
8. Click Connect button. If the connection with the H8 µ-P
is successfully made, a dialogue box saying "Success
to the H8 micro processor connection" appears. (If the
connection fails, error message will appear.)
8. Connect をクリックします。H8 u-P と通信接続に成功す
ると
"Success to the H8 micro processor connection" の
ダイアログが表示されます。
セージが表示されます。
( 通信に失敗するとエラーメッ
)
9. Click Send button to start update.
h82505_38400.inf
10. If the fi rmware is updated successfully, a dialog box
saying "Finished the fi rmware program sending"
appears.
9. Send
をクリックしアップデートを開始します。
10. ソフトウェアのアップデートが成功すると、"Finished the
firmware program sending"
されます。
のダイアログボックスが表示
16
11. Click Close button to close the application.
h82505_38400.inf
11. Close をクリックしてアプリケーションを閉じます。
12. Disconnect Mains power cord.
13. Turn off the internal switch (SW99) that has been turned
on at step 3.
14. Turn on the unit.
Firmware Version Check
To check the versions of the fi rmware, see "Microprocessor
(CPU), DSP Version and FLD Segment Check Mode" in
"SERVICE MODE" section.
12. 本機の電源を切ります。
13. 手順 3 のスイッチ(SW99)を押してブートモードを解除
します。
14. 電源を入れます。
バージョンの確認
ソフトウェアのバージョンを確認します。確認方法は
"SERVICE MODE" 内の "Microprocessor (CPU), DSP
Version and FLD Segment Check Mode"
を参照してください。
17
Personal notes:
18
6. WIRING DIAGRAM
AC INLET
(CHASSIS)
[E3]Ver.only
XM RADIO PWB
HDMI PWB
COMPONENT
2
PWB
TUNER MODULE
VIDEO PWB
DOWNLOADER
CONNECTOT
PWB
INPUT PWB
TRANSF.
PWB
MAIN PWB
SUB
TRANSF.
PWB
REGULATOR
PWB
FRONT PWB
POWER ON / OFF
PUSH SW PWB
[E3]Ver.only[E2]Ver.only
H / P PWB
TACT SW PWB
1920
7. BLOCK DIAGRAM
TO A/D CONVERTER
AUX1 IN
TUNER IN
XM IN
TUNER
MODULE
TUNER IN
7.1 CH INPUT
(AUX2)
IC : R2S15205FP
Front L
Front R
Surround L
Surround R
Center
Subwoofer
Surround Back L
[ E3 ] Ver. only
Surround Back R
PRE_RELAY
Subwoofer
XM IN
PRE_RELAY
2221
8. SCHEMATIC DIAGRAM
).05407"
./53%$
$#42)''%2
4/&2/.407"
4/6)$%/07"
$/7.,/!$%2#/..%#4/407"
4/-!).07"
4/($-)07"
4/($-)07"
($&
&2/--!).07"
4/8-2!$)/07"
4/).054
07"
2324
).05407"
/.,9$.!%
./53%$
-5,4)02%/5430+
./53%$
&2/-).054
07"
./53%$
./53%$
4/).054
07"
4/6)$%/07"
&2/-6)$%/07"
&2
&,
4/-!).07"
32
&2/-).054
07"
./53%$
37
#4
3"2
3",
3,
02%
02%
3"230+?#2
3"230+?#2
02%
02%
3",30+?#,
3",30+?#,
./53%$
&2/--!).07"
4/).054
07"
2625
).05407"
&2/-).05407"
)#
&,
&2
3,
32
4/).054
07"
4/).054
07"
$)')4!,).
$)')4!,/54
&2/-).054
07"
&2/-).054
07"
37
#4
3",
3",
4/).054
07"
4/).054
07"
2728
E3 Ver. Only
8-2!$)/07"
4/).05407"
8-
&2/-).05407"
./53%$
3029
-!).07"
&2/-).05407"
4/).05407"
,
!58).
2
&,
#4
&2
#4
&2
3,
D"D"
(%!$0(/.%0!24
3,
3",
32
3"2
35"42!.3&07"
;%=6ER
&,
#4
3"2
3",
&2
&,
#4
32
3,
3"2
!58).
/04
4/(007"
4/).05407"
02%?2%,!9
&2/-).0
2%'5,!4/207"
/-42!.3&07"
&2
#/-0/.%.407"
4/6)$%/07"
4/6)$%/07"
5407"
$/7.,/!$%2#/..%#4/407"
23#
407"
4/).05
#/-0/.%.4
-/.)4/2/54
;%=6ER
4/
053(3707"
&2/-
42!.3&07"
!#).,%4
32
37
3",
37
37/54
3132
&2/-).05407"
($-)07"
&2/-).05407"
($-)).054
($-)/54054
3433
&2/--!).07"
6)$%/07"
4/).054
07"
-/$5,%
&2/-45.%2
4/).05407"
#/-0/.%.4
6)$%/
#/-0/.%.40!24
&2/-
).05407"
4/#/-0/.%.407"
3536
&2/-).05407"
;%=6ERONLY
4!#43707"
&2/.407"
-!).
42!.3&
4/2%'5,!4/207"
4/-!).07"
42!.3&07"
(007"
053(3707"
;%=6ERONLY
&2/--!).07"
&2/--!).07"
3837
9. PARTS LOCATION
鉛フリー半田
($-)07"!
)#)#
)#)#
)#)#
)#
11
)#)#)#
11
1
($-)07""
3940
鉛フリー半田
半田付けには、鉛フリー半田
(Sn-Ag-Cu)
を使用してください。
Lead-free Solder
When soldering, use the Lead-free Solder (Sn-Ag-Cu).
1 PE5I/OIIHINBSY--DSP Busy Signal
2 PE6I/OOIEV_DATAHLR2S15205FP DATA
3 PE7I/OOIEV_CLKHLR2S15205FP CLOCK
4 PD0I/OOIHDMI_RSTLHRESET for HDMI
5 PD1I/OOIHD+5V SWHL+5V SW for HPD
6 PD2I/OOIMULTIMUTEHHMULTI ROOM MUTE
7 PD3I/OOISWMUTEHHSUB W MUTE
8 PD4I/OOICNTMUTEHHCENTER SP MUTE
9 PD5I/OOISBMUTEHHSRR B MUTE
10 PD6I/OOISL/SRMUTEHHSL SR MUTE
11 PD7I/OOIL/RMUTEHHFRONT L R MUTE
12 VssI-IVSS--GND
13 PC0I/OOI_RSTDACLLDAC
14 P1VccIYESIVCC--+5V’
15 PC1I/OOIDFSHLDAC
16 PC2I/OOI_ATTLHPULL DOWN
17 PC3I/OOI_RSTADCLHADC
18 PC4I/OOID_A=LDIR or _ADC sel
19 PC5I/OIIXSTATE--DIR
20 PC6I/OOI_CEDIRLLDIR CHIP ENABLE
21 PC7I/OOI_XMODELLDIR RESET
22 PB0I/OOOIICCLK-LI2C for E2PROM
23 PB1I/OI/OI/OIICDATA-LI2C for E2PROM
24 PB2I/OII_TU_SDLTuned
25 PB3I/OIITU_STHStereo Tune/_MONO
26 PB4I/OOITU_MUTEHHTuner MUTE
27 PB5I/OOI_CE_TULLTuner Pack
28 PB6I/OOIHDMI LEDLHHDMI LED On
29 PB7I/OII_P_AMP_FAILL-Power amp Dectect
30 PA0I/OOITUDOUT-LTuner Pack
31 PA1I/OOITUCLK-LTuner Pack
32 PA2I/OIITUDIN-Tuner Pack
33 PA3I/OIIRDSDIN-Tuner Pack(RDS)
34 PA4I/OOIP0_HPRMVHLIN0 HPD SWITCH HDMI 1 HP
35 PA5I/OOIP1_HPRMVHLIN1 HPD SWITCH HDMI 2 HP
36 PA6I/OOIWP0HLWRITE PROTECT IN0
37 PA7I/OOIWP1HLWRITE PROTECT IN1
38 PH7I/OOIFLRA_ONHLSPK A SELECT
39 PH6I/OOIFLRB_ONHLSPK B SELECT
40 PH5I/OOISURR_ONHLSURR/CNT SPK ON
41 PH4I/OOIHEATHLPower Amp±B_L_Sel
42 PH3I/OII_HEAT_DETH-Power Amp Heat sink TempDetect
43 PH2I/OOI_STANDBYLLStandby Power
44 PH1I/OII_HP_DETL-HP Jack Detect
45 PH0I/OOIHP_ONHLHEAD PHONE ON
46 PJ7I/OOXM_CMD
47 PJ6I/OOXM_RST
48 PJ5I/OOXM_DAC_RST
49 PJ4I/OOXM_MUTE
50 PJ3I/OOXM_ON
51 PJ2I/OOISB_ONHL
52 PJ1I/OOO_STBY LEDLHStandby LED On
53 PJ0I/OOI_RSFLLLFront FL Driver
54 VssI-IVSS--GND
I/OuseSTBYName
Port Setting
Act.init
Note
“SB Relay Control,
SB ON:H SB OFF:L”
67
IC11 : HD64F2505
pinNoPort Name
100 ~RESIYESI_RESL-RESET
101 P20/TIOCA3 I/O,I/OIIPULL DOWN
102 P21/TIOCB3 I/O,I/OIIPULL DOWN
103 P22/TIOCC3 I/O,I/OIIPULL DOWN
104 P23/TIOCD3 I/O,I/OIISPKC_SW--Speaker C Switch
105 P24/TIOCA4 I/O,I/OOISPKC_CONTC-Relay Control
106 P25/TIOCB4 I/O,I/OOIKILLFLASHKill Flasher OUT
107 P26/TIOCA5 I/O,I/OT_OUTORC_OUTLRC BUS OUT
108 P27/TIOCB5 I/O,I/OT_OUTOM_RC_OUTLRC BUS MULT OUT
Mode7
P97/AN15/
55
DA1
P96/AN14/
56
DA0
57 P95/AN13I,IIIHDMI_SCDTH-SCDT IN from HDMI
58 P94/AN12I,IIISEL---Front Select Encoder
59 P93/AN11I,IIISEL+--Front Select Encoder
60 P92/AN10I,IIIVOL---Front Vol. Encoder
61 P91/AN9I,IIIVOL+--Front Vol. Encoder
62 P90/AN8I,IADAD MODEL_SEL--Model Select
63 P47/AN7I,IADAD TV_AUTO--TV Video Detect
64 P46/AN6I,III_OVFL--Peak Indicater
65 P45/AN5I,IADAD VER_SEL--VERSION SELECT
66 P44/AN4I,IADAD P_LINE_FAIL--Emergency Protection
67 AVssI-IAVSS--GND
68 P43/AN3I,IADAD _5V_DOWN--Detect 5V
69 P42/AN2I,IADAD KEY2--Front Key
70 P41/AN1I,IADAD KEY1--Front Key
71 P40/AN0I,IADAD KEY0--Front Key
72 VrefIYESIVCC--+5V’
73 AVccIYESIAVCC--+5V’
74 P50/TxD2I/O,OSOSO DSPOUTDSP, DIR Control Data OUT
75 P51/RxD2I/O,ISISIDSPINDSP, DIR Control Data IN
76 P52/SCK2I/O,OSCSC DSPCLKDSP, DIR Control CLOCK
77 PF0/~IRQ2I/O,IINTIRERRH-DIR ERROR
78 PF1/BUZZI/O,OOICP_SEL1NJM2584 1/3
79 PF2I/OIIPULL DOWN
1 I/O UHS0, GPIO18 Mode Select Bit 0, General Purpose I/O
2 I/O UHS1, GPIO19 Mode Select Bit 1, General Purpose I/O
3INTREQControl Port Interrupt Request
4 I FA1, FSCDIN Host Address Bit One or SPI Serial Control Data Input
5 I/O GPIO20General Purpose I/O
6 I FA0, FSCCLK Host Parallel Address Bit Zero or Serial Control Port Clock
7 I/O FHS2,
FSCDIO,
FSCDOUT
Mode Select Bit 2 or Serial Control Port Data Input and
Output, Parallel Port Type Select
8 I/O GPIO21General Purpose I/O
9FDAT7DSP AB Bidirectional Data Bus
10VDD62.5V Supply Voltage
11VSS62.5V Ground
12FHS0, FWR,
FDS
13 O FHS1, FRD,
FR/W
Mode Select Bit 0 or Host Write Strobe or Host Data Strobe
Mode Select Bit 1 or Host Parallel Output Enable or Host
Parallel R/W
14FDAT6DSP AB Bidirectional Data Bus
15 I FCSHost Parallel Chip Select, Host Serial SPI Chip Select
16 O FINTREQControl Port Interrupt Request
17FDBCKReserved
18FDAT5DSP AB Bidirectional Data Bus
19FDAT4DSP AB Bidirectional Data Bus
20VDD72.5V Supply Voltage
21VSS72.5V Ground
22FDAT3DSP AB Bidirectional Data Bus
23FDBDAReserved
24FDAT2DSP AB Bidirectional Data Bus
25DBDADebug Data
26DBCKDebug Clock
27FDAT1DSP AB Bidirectional Data Bus
28TESTReserved
29FDAT0DSP AB Bidirectional Data Bus
30 I/O NV_WE,
122PLLVSSPLL Ground Voltage
123FILT2Phase Locked Loop Filter
124FILT1Phase-Locked Loop Filter
125PLLVDDPLL Supply Voltage
126 O CLKOUT,
127 I CLKIN, XTALI External Clock Input/Crystal Oscillator Input
128CLKSELDSP Clock Select
129 I/O CS, GPIO9Host Parallel Chip Select, General Purpose I/O
130 I/O A0, GPIO13Host Parallel Address Bit 0, General Purpose I/O
131 I FSDATAN1PCM Audio Data Input One
132VDD42.5V Supply Voltage
133VSS42.5V Ground
134 I FSCLKN1,
135SCSHost Serial SPI Chip Select
136 I SCDINSPI Serial Control Data Input
137VSS52.5V Ground
138VDD52.5V Supply Voltage
139 I/O A1, GPIO12Host Address Bit 1, General Purpose I/O
140 I/O SCDOUT,
141 I/O HINBSY,
142SCCLKSerial Control Port Clock
143 I/O UHS2,
144 I RESETMaster Reset Input
External Memory
Interface
Internal Bus
Parallel or Serial
GPIO28
GPIO4
GPIO3
XMT958A
FSCLKN2
GPIO2
GPIO1
GPIO0
FLRCLKN2
FSDATAN2
GPIO10
GPIO11
XTALO
STCCLK2
SCDIO
GPIO8
CS_OUT,
GPIO17
Interface
Digital
Audio
GPIO and I/O
Controller
Host Interface
DAO 0
DAO 1
Digital Audio Output 4, General Purpose I/O
DSP C Bidirectional Data Bus, General Purpose I/O
DSP C Bidirectional Data Bus, General Purpose I/O
Digital Audio Output 3, S/PDIF Transmitter
PCM Audio Input Bit Clock
DSP C Bidirectional Data Bus, General Purpose I/O
DSP C Bidirectional Data Bus, General Purpose I/O
DSP C Bidirectional Data Bus, General Purpose I/O
Frame Clock Data Request Out
PCM Audio Data Input Number Two
Host Write Strobe, Host Data Strobe, General Purpose I/O
Host Parallel Output Enable, Host Parallel R/W, General
Purpose I/O
Crystal Oscillator Output
PCM Audio Input Bit Clock
Serial Control Port Data Input and Output
Input Host Message Status, General Purpose I/O
Mode Select Bit 2, External Serial Memory Chip Select,
General Purpose I/O
73
IC28 : LC89057WVF4E
LC89057W-VF4-E
1
RXOUT
2
RX0
3
RX1
4
RX2
RX3
RX4
RX5/VI
RX6/UI
LPF
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
5
8
9
10
13
44
45
46
47
48
Input
Selector
Modulation
or
Parallel Port
LC89057W
No. Port nameI/O Description
1 RXOUTO Data Output
2 RX0I Digital data Input (TTL)
3 RX1I Digital data Input (Coaxial)
4 RX2I Digital data Input (TTL)
5 RX3I Digital data Input (TTL)
6 DGNDDigital GND
7 DVDDDigital VDD
8 RX4I Digital data Input (TTL)
9 RX5/VII Digital data Input (TTL)
10 RX6/UII Digital data Input (TTL)
11 DVDDDigital GND for PLL
12 DGNDDigital VDD for PLL
13 LPFO Loop filter for PLL
14 AVDDAnalog VDD for PLL
15 AGNDAnalog GND for PLL
16 RMCKO System clock Output for R (256fs, 512fs, XIN, VCO)
17 RBCKO/I Bit clock Output for R (64fs)
18 DGNDDigital GND
19 DVDDDigital VDD
20 RLRCKO/I LR clock Input/Output for R
21 RDATAO Serial Audio data Input
22 SBCKO Bit clock Output for S (32fs, 64fs, 128fs)
23 SLRCKO LR clock Output for S (fs/2, fs, 2fs)
24 SDINI Serial Audio data Input
25 DGNDDigital GND
26 DVDDDigital VDD
27 XMCKO Oscillation amplifier
28 XOUTO XOUT
29 XINI XIN or External clock Input (24.576MHz or 12.288MHz)
30 DVDDDigital VDD
31 DGNDDigital GND
32 EMPHA/UOI/O Emphasis Information / U data Output / Set for chip address
33 AUDIO/VOI/O Detected non-PCM / V flag Output / Set for chip address
34 CKSTI/O Clock timing Output / Switch to master or slave for demodulation
35 INTI/O Interrupt Output / Switch to Modulation or general-purpose I/O
36 RERRO Error Output (PLL lock, data error)
37 DOO IF, Read out data Output
38 DII IF, Write data Input
39 CEI IF, Chip enable Input
40 CLI IF, Clock Input
41 XMODEI System reset Input
42 DGNDDigital GND
43 DVDDDigital VDD
44 TMCK/PIO0I/O 256fs system-clock Input for modulation / General-purpose I/O input/output
45 TBCK/PIO1I/O 64fs bit-clock Input for modulation / General-purpose I/O input/output
46 TLRCK/PIO2I/O Fs clock Input for modulation / General-purpose I/O input/output
47 TDATA/PIO3I/O Serial audio data for modulation / General-purpose I/O input/output
48 TXO/PIOENO/I Modulation data Output / General-purpose I/O enable input
EMPHA/UO32AUDIO
C bit , Ubit
Demodulation
&
Lock detect
PLL
29
28
XIN
XOUT
/VO
33
Clock
Selector
2734
XMCKCKST
CL40CE39DI
INT
35
Microcontroller
I/F
Data
Selector
1/N
XMODE
38
41
37
36
21
24
16
17
20
22
23
DO
RERR
RDATA
SDIN
RMCK
RBCK
RLRCK
SBCK
SLRCK
XMODE
DGND
DVDD
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
RERR
37
DO
38
DI
39
CE
40
CL
41
42
43
44
45
46
47
48
RXOUT
/VO
XMCK
XOUT
XIN
DVDD
DGND
EMPHA/UO
AUDIO
CKST
INT
353633343132293027282526
LC89057W-VF4-E
RX0
****
RX1
RX2
RX3
DGND
DVDD
RX4
RX5/VI
**
RX6/UI
1110987654321
DVDD
DVDD
DGND
12
DGND
24
23
22
21
20
19
18
17
16
15
14
13
SDIN
SLRCK
SBCK
RDATA
RLRCK
DVDD
DGND
RBCK
RMCK
AGND
AVDD
LPF
74
IC29 : CS4382A-CQ
114 dB, 192 kHz 8-Channel D/A Converter
Features
z 24-bit Conversion
z Up to 192 kHz Sample Rates
z 114 dB Dynamic Range
z -100 dB THD+N
z Supports PCM and DSD Data Formats
z Selectable Digital Filters
z Volume Control with Soft Ramp
– 1 dB Step Size
– Zero Crossing Click-free Transitions
z Dedicated DSD inputs
z Low Clock Jitter Sensitivity
z Simultaneous Support for Two Synchronous
Sample Rates for DVD Audio
z μC or Stand-alone Operation
I
SDA/CDIN(M2) A D0/CS(M0)
Control Port(Stand-Alone Mode Select)
Interp olatio n F ilterA nalog Filter
Mixer
Interp olatio n F ilter
Int er p o lati on F ilterA n alo g Filte r
Mixer
Interp olatio n Filter
Int er p o lati on F ilterA n alo g Filte r
Mixer
Interp olatio n Filter
Int er p o lati on F ilterA n alo g Filte r
Mixer
Interp olatio n Filter
GNDVD
GND
RST
VLS
SCLK
LR
CK
SCLK
LRCK2
SD IN1
SD IN2
SD IN3
SD IN4
MCLK
DSDxx
1
1
2
8
DSD_SCLK(M3)
2
÷
SCL/CCLK(M1)
Serial Port
Volume Control
Volume Control
Volume Control
Volume Control
Volume Control
Volume Control
Volume Control
Volume Control
Description
The CS4382 is a complete 8-channel digital-to-analog
system including digital interpolation, fifth-order deltasigma digital-to-analog conversion, digital de-emphasis,
volume control and analog filtering. The advantages of
this architecture include: ideal differential linearity, no
distortion mechanisms due to resistor matching errors,
no linearity drift over time and temperature and a high
tolerance to clock jitter.
The CS4382 accepts PCM data at sample rates from
4 kHz to 192 kHz, DSD audio data, and operates over a
wide power supply range. These features are ideal for
multi-channel audio systems including DVD players,
SACD players, A/V receivers, digital TV’s, mixing consoles, effects processors, and automotive audio
systems.
ORDERING INFORMATION
CS4382-KQZ, Lead Free -10 to 70 °C48-pin LQFP
CDB4382Evaluation Board
VLC
VA
MUTEC1
Mute Control
ΔΣ
DAC
ΔΣ
DAC
ΔΣ
DAC
ΔΣ
DAC
ΔΣ
DAC
ΔΣ
DAC
ΔΣ
DAC
ΔΣ
DAC
External
MUTEC234
Analog Filter
Analog Filter
Analog Filter
Analog Filter
AO UTA1+
AO UTA1-
AO UTB1+
AO UTB1-
AO UTA2+
AO UTA2-
AO UTB2+
AO UTB2-
AO UTA3+
AO UTA3-
AO UTB3+
AO UTB3-
AO UTA4+
AO UTA4-
B4+
AO UT
AO UTB4-
VQ
FILT+
75
IC29 : CS4382A-CQ
AOUTA1-
VQ
AOUTB1-
AOUTB1+
AOUTA1+
36
AOUTA2-
35
AOUTA2+
AOUTB2+
34
33
AOUTB2-
32
VA
31
GND
AOUTA3-
30
AOUTA3+
29
AOUTB3+
28
27
AOUTB3-
AOUTA4-
26
AOUTA4+
25
AOUTB4-
AOUTB4+
MUTEC234
DSDA2
DSDB1
DSDA1
VD
GND
MCLK
LRCK1(DSD_EN)
SDIN1
SCLK1
LRCK2
SDIN2
SCLK2
MUTEC1
VLS
M3(DSD_SCLK)
DSDB4
DSDA4
DSDB3
DSDB2
DSDA3
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
CS4382
RST
VLC
SDIN4
SDIN3
M1(SDA/CDIN)
M2(SCL/CCLK)
FILT+
M0(AD0/CS)
Pin Name#Pin Description
VD4
GND531Ground (Input) - Ground reference. Should be connected to analog ground.
MCLK6Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters. Table 5 illustrates
LRCK1
LRCK2
SDIN1
SDIN2
SDIN3
SDIN4
SCLK1
SCLK2
VLC18Control Port Power (Input) - Determines the required signal level for the control port. Refer to the Rec-
RST
FILT+20Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
VQ21
Digital Power (Input) - Positive power supply for the digital section. Refer to the Recommended Operat-
ing Conditions for appropriate voltages.
several standard audio sample rates and the required master clock frequency.
7
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial audio
10
data line. The frequency of the left/right clock must be at the audio sample rate, Fs.
8
Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
11
13
14
9
Serial Clock (Input) - Serial clock for the serial audio interface.
12
ommended Operating Conditions for appropriate voltages.
19Reset (Input) - The device enters a low power mode and all internal registers are reset to their default
settings when low.
Requires the capacitive decoupling to analog ground, as shown in the Typical Connection Diagram.
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage. VQ must be capacitively
coupled to analog ground, as shown in the Typical Connection Diagram. The nominal voltage level is
specified in the Analog Characteristics and Specifications section. VQ presents an appreciable source
impedance and any current drawn from this pin will alter device performance. However, VQ can be
used to bias the analog circuitry assuming there is no AC signal component and the DC current is less
than the maximum specified in the Analog Characteristics and Specifications section.
VLS43Serial Audio Interface Power (Input) - Determines the required signal level for the serial audio inter-
41
Mute Control (Output) - The Mute Control pins go high during power-up initialization, reset, muting,
22
power-down or if the master clock to left/right clock frequency ratio is incorrect. These pins are intended
to be used as a control for external mute circuits to prevent the clicks and pops that can occur in any single supply system. The use of external mute circuits are not mandatory but may be desired for designs
requiring the absolute minimum in extraneous clicks and pops.
39, 40
Differential Analog Output (Output) - The full scale differential analog output level is specified in the
Analog Power (Input) - Positive power supply for the analog section. Refer to the Recommended Oper-
ating Conditions for appropriate voltages.
face. Refer to the Recommended Operating Conditions for appropriate voltages.
Control Port Definitions
SCL/CCLK15Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external pull-up
SDA/CDIN16Serial Control Data (Input/Output) - SDA is a data I/O line in I
AD0/CS
resistor to the logic interface voltage in I
resistor to the logic interface voltage, as shown in the Typical Connection Diagram. CDIN is the input
data line for the control port interface in SPI mode.
Address Bit 0 (I2C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I
17
CS is the chip select signal for SPI format.
2
C mode as shown in the Typical Connection Diagram.
2
C mode and requires an external pull-up
2
C mode;
Stand-Alone Definitions
M0
M1
M2
M3
17
Mode Selection (Input) - Determines the operational mode of the device as detailed in Tables 6 and 7.
16
15
42
DSD Definitions
DSD_SCLK42DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital audio interface.
DSD_EN
DSDA1
DSDB1
DSDA2
DSDB2
DSDA3
DSDB3
DSDA4
DSDB4
DSD-Enable (Input) - When held at logic ‘1’ the device will enter DSD mode (Stand-Alone mode only).
7
3
Direct Stream Digital Input (Input) - Input for Direct Stream Digital serial audio data.
2
1
48
47
46
45
44
77
IC30 : CS5361-KS
114 dB, 192 kHz, Multi-Bit Audio A/D Converter
Features
z Advanced Multi-bit Delta-sigma Architecture
z 24-bit Conversion
z 114 dB Dynamic Range
z -105 dB THD+N
z System Sampling Rates up to 192 kHz
z 135 mW Power Consumption
z High-pass Filter and DC Offset Calibration
z Supports Logic Levels Between 5 and 2.5 V
z Differential Analog Architecture
z Overflow Detection
z Pin-compatible with the CS5381
General Description
The CS5361 is a complete analog-to-digital converter for
digital audio systems. It performs sampling, analog-todigital conversion, and anti-alias filtering. The CS5361
generates 24-bit values for both left and right inputs in
serial form at sample rates up to 192 kHz per channel.
The CS5361 uses a 5th-order, multi-bit, delta-sigma
modulator followed by digital filtering and decimation.
This removes the need for an external anti-alias filter.
The ADC uses a differential architecture which provides
excellent noise rejection.
The CS5361 is ideal for audio systems requiring wide dynamic range, negligible distortion, and low noise. These
applications include A/V receivers, DVD-R, CD-R, digital
mixing consoles, and effects processors.
ORDERING INFORMATION
CS5361-KSZ -10° to 70°C 24-pin SOICLead Free
CS5361-KZZ -10° to 70°C 24-pin TSSOP Lead Free
CS5361-DZZ -40° to 85°C 24-pin TSSOP Lead Free
CDB5361Evaluation Board
FILT+
AINL-
AINL+
AINR-
AINR+
VQLRCK
Voltage Reference
S/H
S/H
+
-
+
-
REFGND
LP Filter
DAC
LP Filter
DAC
OVFL
V
L
Serial Output Interface
ΔΣ
ΔΣ
Digital
Decimation
Digital
Decimation
Filter
Filter
SCLK
SDOUT MCLK
High
Pass
Filter
High
Pass
Filter
RST
I2S/LJ
M/S
HPF
MDIV
MODE0
MODE1
78
IC30 : CS5361-KS
Pin Name#Pin Description
RST
M/S
LRCK
SCLK
MCLK
VD
GND
VL
SDOUT
MDIV
HPF
2
S/LJ
I
M0
M1
OVFL
AINL+
AINLVA
AINR-
AINR+
VQ
REF_GND
FILT+
Reset (Input) - The device enters a low power mode when low.
1
Master/Slave Mode (Input) - Selects operation as either clock master or slave.
2
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
3
serial audio data line.
Serial Clock (Input/Output) - Serial clock for the serial audio interface.
4
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
5
6Digital Power (Input) - Positive power supply for the digital section.
Ground (Input) - Ground reference. Must be connected to analog ground.
7,18
Logic Power (Input) - Positive power for the digital input/output.
8
Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
9
MCLK Divider (Input) - Enables a master clock divide by two function.
10
High-pass Filter Enable (Input) - Enables the Digital High-Pass Filter.
11
Serial Audio Interface Format Select (Input) -Selects either the left-justified or I
12
13,
Mode Selection (Input) - Determines the operational mode of the device.
14
Overflow (Output, open drain) - Detects an overflow condition on both left and right channels.
15
Differential Left Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
16,
modulators via the AINL+/- pins.
17
19 Analog Power (Input) - Positive power supply for the analog section.
Differential Right Channel Analog Input (Input) -Signals are presented differentially to the delta-sigma
20,
modulators via the AINR+/- pins.
21
Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.
22
Reference Ground (Input) - Ground reference for the internal sampling circuits.
23
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
L MUTE MUTE Vin1
H Vin2 Vin2 MUTE
L MUTE Vin2 MUTE
H Vin3 Vin3 Vin3
L MUTE Vin3 Vin3
L MUTE Vin4 MUTE
L MUTE Vin5 MUTE
GND V
-
80
Pin No. SymbolFunctionDescription
1V
SS
1GroundGround connection (digital system ground)
2Xtal
IN
Crystal oscillator connection
Used to connect the crystal oscillator and capacitor used to generate the internal
3Xtal
OUT
synchronization signal, or to input an external clock (2fsc or 4fsc).
4CTRL1Crystal oscillator input switching
Switches between external clock input mode and crystal oscillator mode.
Low = crystal oscillator mode, high = external clock mode
Outputs the blank signal (the OR of the character and border signals). (Outputs a composite
5BLANKBlanking outputsync signal when MOD0 is high.) Outputs the crystal oscillator clock during reset (when the
RST pin is low), but can be set up to not output this signal by microprocessor command.
6OSC
IN
LC oscillator connection
Connections for the coil and capacitor that form the oscillator that generates the character
7OSC
OUT
output dot clock.
Outputs the character signal. (Functions as the external synchronization signal discrimination
signal output pin when MOD0 is high, and outputs the state of the judgment as to whether the
8CHARACharacter outputexternal synchronization signal is present or not. Outputs a high level when the synchronization
signal is present.) Outputs the dot clock (LC oscillator) during reset, but can be set up to not
output this signal by microprocessor command.
9CSEnable input
Serial data input enable input. Serial data input is enabled when low. A pull-up resistor is built in
(hysteresis input).
10SCLKClock input
Serial data input clock input.
A pull-up resistor is built in (hysteresis input).
11SINData inputSerial data input. A pull-up resistor is built in (hysteresis input).
12V
DD
2Power supplyComposite video signal level adjustment power supply pin (analog system power supply).
13CV
OUT
Video signal outputComposite video signal output
14NCMust be either connected to ground or left open.
15CV
IN
Video signal inputComposite video signal input
16V
DD
1Power supplyPower supply (+5 V: digital system power supply)
Video signal input for the built-in sync separator circuit (Used for either horizontal
17SYN
IN
Sync separator circuit inputsynchronization signal or composite sync signal input when the built-in sync separator circuit is
not used.)
18SEPCSync separator circuit bias voltage Built-in sync separator circuit bias voltage monitor pin
Built-in sync separator circuit composite sync signal output. (When MOD1 is high, outputs a high
19SEP
OUT
Composite sync signal outputlevel during internal synchronization and a low level during external synchronization.) (Outputs
the SYN
IN
input signal when the internal sync separator circuit is not used.)
20SEP
IN
Vertical synchronization Inputs a vertical synchronization signal created by integrating the SEP
OUT
pin output signal. An
signal inputintegrator must be attached at the SEP
OUT
pin. This pin must be tied to VDD1 if unused.
The setting indicated by this pin takes priority in switching between the NTSC, PAL, PAL-M and
21CTRL2NTSC/PAL-M switching inputPAL-N formats. A low level selects NTSC after a reset. The microprocessor command NTSC,
PAL, PAL-M, or PAL-N setting is valid. High = PAL-M format.
22CTRL3SEP
IN
input control
Controls whether or not the VSYNC signal is input to the SEP
IN
input. Low = VSYNC input,
high = VSYNC not input.
23RSTReset inputSystem reset input. A pull-up resistor is built in (hysteresis input).
24V
DD
1Power supply (+5 V)Power supply (+5 V: digital system power supply)
IC47 : LC74782M8A13
81
IC51 : XMDTIC
82
IC51 : XMDTIC
83
IC51 : XMDTIC
84
IC61 : CS4392KZZ
1. PIN DESCRIPTION - PCM DATA MODE
RSTAMUTEC
VLAOUTA-
SDATAAOUTA+
SCLKVA
LRCKAGND
MCLKAOUTB+
M3AOUTB-
(SCL/CCLK) M2BMUTEC
(SDA/CDIN) M 1CMOUT
(AD0/CS) M0FILT+
RST1Reset (Input) - Powers down device and resets all internal registers to their default settings.
VL2Logic Power (Input) - Positive power f or the digital input/output.
SDATA3Serial Audio Data (Input) - Input for two’s complement serial audio data.
SCLK4Serial Clock (Input/Output) - Serial clock for the serial audio interface.
LRCK5Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
MCLK6Master Clock (Input) - Clock source f or the delta-sigma modulator and digital filters.
FILT+11Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
CMOUT12Common Mode Voltage (Output) - Filter connection for internal quiescent voltage.
AMUTEC
BMUTEC
AOUTBAOUTB+
AOUTA+
AOUTA
AGND16Ground (Input)
VA
Control Port Mode Definitions
M3
SCL/CCLK
SDA/CDIN9Serial Control Data (Input/Output) - SDA i s a data I/O line in I
AD0/CS10Address Bit 0 (I
Stand-Alone Mode D efinitions
M3
M2
M1
M0
serial audio data line.
2013Mute Control (Output) - The Mute Control pin goes high dur ing power-up initialization, reset, muting,
power-down or if the master clock to left/right clock frequency ratio is incorrect.
14
Differential Analog Output (Outputs) - The full scale differential analog output level is specified in the
15
Analog Characteristics specification table.
18
19
17Analog Power (Input) - Positive power for the analog section.
7Mode Selection (Input) - This pins should be tied to GND level during control port mode.
8Serial Control Port Clock (Input) - Serial clock for the serial control port.
the control port interface in SPI mode.
mode; CS
7
Mode Selection (Input) - Determines the operational mode of the device.
8
9
10
2
C) / Control Port Chip Select ( SPI) (Input/Output) - AD0 is a chip address pin in I2C
is the chip select signal for SPI format.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
2
C mode. CDIN is the input data line for
85
IC71 : TC90A49PG
86
IC74 : TA1270BF
87
IC81 : NJU3430F
OSC1
OSC
RST
SI
CS
CLK
RS
2
VDD
V
V
SS
FDP
RESET
8bits
Shift
Reg.
Timing
CR
Gen.
OSC.
Instruction
Dec oder
State
Display
Reg.
Control
Line
Address
Address
Read
Address
Counter
Selector
Counter
MK RAM
16x2bit
CG RAM
35x8bit
CG ROM
8,400bit
DD RAM
16x8bit
No.SYMBOLI/OF U N C T I O N
Icon
Segment
Port
Timing
Driver
Driver
Driver
Driver
MK1~MK2
S
1~S35
P 1
T
1~T16
57VDD-Power Source: VDD=+3.0 to 5.5V
49VSS-GND: VSS =0V
48VFDP-
50OSC1I
51OSC2O
VFD Driving Power Sourse
V
DD-20V to V DD-45V
CR Oscillation Terminal
External R and C connect to these terminals.
(Target f
OSC=360kHz)
Serial Clock Input Terminal
54CLKI
The serial data input synchronizing the rise edge of this
terminal.
Chip Select Terminal
53CSI
When the CS terminal is "H" the serial data input is not
available.
55SII
Serial Data Input Terminal
The data input is MSB first.
Register Selection Signal Input Terminal
56RSI
RS="0" : Instruction Register
RS="1" : Data Register
1
2V+Doubled Voltage Terminal
3
4
5
6V-Inverted Voltage Terminal
7
8
9
10
11
12
13
14
15GNDGround
16
+Positive Terminal for the first Charge Pump Capacitor
C
1
-Negative Terminal for the first Charge Pump Capacitor
C
1
+Positive Terminal for the second Charge Pump Capacitor
C
2
-Negative Terminal for the second Charge Pump Capacitor
C
2
T2
R2
R1
T1
R2
T2
T1
R1
V
OUT
IN
OUT
IN
IN
OUT
IN
OUT
CC
Second Transmitter Output Voltage
Second Receiver Input Voltage
Second Receiver Output Voltage
Second Transmitter Input Voltage
First Transmitter Input Voltage
First Receiver Output Voltage
First Receiver Input Voltage
First Transmitter Output Voltage
Supply Voltage
89
X
IC95 : TC7MZ4052FK
IC96 : TC7MZ4052FK
OUT IN
C
-COM
0X
A
B
Logic Level Converter
INH
Control Inputs “ON” Channel
Inhibit C* B A MZ4051FK MZ4052FK MZ4053FK
L L L L 0 0X, 0Y 0X, 0Y, 0Z
L L L H 1 1X, 1Y 1X, 0Y, 0Z
L L H L 2 2X, 2Y 0X, 1Y, 0Z
L L H H 3 3X, 3Y 1X, 1Y, 0Z
L H L L 4 ¾0X, 0Y, 1Z
L H L H 5 ¾1X, 0Y, 1Z
L H H L 6 ¾0X, 1Y, 1Z
L H H H 7 ¾1X, 1Y, 1Z
H X X X None None None
OUT IN
C
1X
2X
3X
0Y
1Y
2Y
3Y
Y-COM
X: Don't care, *: Except MZ4052FK
90
IC98 : SII9031CTU7
INT
XTAL
SiI9031 Features
PanelLink Cinema Receiver
Industry-Standard
Compliance
• HDMI 1.0
• DVI 1.0
• EIA /CEA-861B
• HDCP 1.1
Digital Video Output
• Dual integrated PanelLink®cores
• Suppor ts DTV (480i/576i/480p/
576p/720p/1080i/1080p) and PC
(VGA/XGA/SXGA/WSXGA) resolutions