DADD DDU222C-50M, DDU222C-50, DDU222C-250M, DDU222C-20M, DDU222C-200M Datasheet
...
DDU222C
5-TAP, HCMOS-INTERFACED
data
3
2345678
1
FIXED DELAY LINE
(SERIES DDU222C)
delay
devices, inc.
FEATURES PACKAGES
• Five equally spaced outputs
• Very narrow device (SIP package)
• Stackable for PC board economy
• Input & outputs fully CMOS interfaced & buffered
• 10 T2L fan-out capability
FUNCTIONAL DESCRIPTION
The DDU222C-series device is a 5-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
amount given by the device dash number. For dash numbers less than
40, the total delay of the line is measured from T1 to T5, with the nominal
value given by the dash number. The nominal tap-to-tap delay increment
is given by 1/4 of this number. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers
greater than or equal to 40, the total delay of the line is measured from IN to T5, with the nominal value
given by the dash number. The nominal tap-to-tap delay increment is given by 1/5 of this number.
VCC IN T1 T2 T3 T4 T5 GND
DDU222F-xx Commercial
DDU222F-xxM Military
PIN DESCRIPTIONS
IN Signal Input
T1-T5 Tap Outputs
VDD +5 Volts
GND Ground
SERIES SPECIFICATIONS
• Minimum input pulse width: 40% of total delay
• Output rise time: 8ns typical
• Supply voltage: 5VDC ± 5%
• Supply current: I
I
• Operating temperature: 0° to 70° C
• Temp. coefficient of total delay: 300 PPM/°C
8.0ns
VCC GNDIN T1 T2 T3 T4 T5
Functional diagram for dash numbers < 40
20% 20% 20% 20% 20%
VCC GNDIN T1 T2 T3 T4 T5
Functional diagram for dash numbers >= 40
25% 25% 25% 25%
= 40µa typical
CCL
= 10ma typical
CCH
DASH NUMBER SPECIFICATIONS
Part
Number
DDU222C-10
DDU222C-20
DDU222C-50
DDU222C-60
DDU222C-75
DDU222C-100
DDU222C-125
DDU222C-150
DDU222C-175
DDU222C-200
DDU222C-250
* Total delay is referenced to first tap output
Input to first tap = 8.0ns ±± 2ns
NOTE: Any dash number between 10 and 250 not
shown is also available.
Total
Delay (ns)
10 ± 2.0 * 2.5 ± 1.0
20 ± 2.0 * 5.0 ± 2.0
50 ± 3.0 10.0 ± 3.0
60 ± 3.0 12.0 ± 3.0
75 ± 4.0 15.0 ± 3.0
100 ± 5.0 20.0 ± 3.0
125 ± 6.5 25.0 ± 3.0
150 ± 7.5 30.0 ± 3.0
175 ± 8.0 35.0 ± 4.0
200 ± 10.0 40.0 ± 4.0
250 ± 12.5 50.0 ± 5.0
1997 Data Delay Devices
Delay Per
Tap (ns)
Doc #97014 DATA DELAY DEVICES, INC. 1
1/28/97 3 Mt. Prospect Ave. Clifton, NJ 07013
DDU222C
APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU222C tolerances are guaranteed for
input pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 40% of the total delay and periods as
small as 80% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL MIN MAX UNITS NOTES
DC Supply Voltage V
Input Pin Voltage V
Storage Temperature T
Lead Temperature T
DD
IN
STRG
LEAD
Delay Devices if your application requires device
testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU222C relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VDD to GND,
located as close as possible to the VDD pin, is
recommended. A wide VDD trace and a clean
ground plane should be used.
-0.3 7.0 V
-0.3 VDD+0.3 V
-55 150 C
300 C 10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
High Level Output Voltage V
Low Level Output Voltage V
High Level Output Current I
Low Level Output Current I
High Level Input Voltage V
Low Level Input Voltage V
Input Current I
(0C to 70C, 4.75V to 5.25V)
OH
OL
OH
OL
IH
IL
IH
3.98 4.4 V VDD = 5.0, IOH = MAX
0.15 0.26 V VDD = 5.0, IOL = MAX
3.15 V
-4.0 mA
4.0 mA
1.35 V
0.10
µA
VIH = MIN, VIL = MAX
VIH = MIN, VIL = MAX
VDD = 5.0
Doc #97014 DATA DELAY DEVICES, INC. 2
1/28/97 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
Loading...