DADD 1507-50G, 1507-50C, 1507-50B, 1507-50A, 1507-500G Datasheet
...
1507
10-TAP SIP DELAY LINE
1.455 TYP.
.020 TYP.
1.300 TYP.
data
3
267
1
453
891011121314
TD/TR = 5
(SERIES 1507)
delay
devices,
FEATURES PACKAGES
• 10 taps of equal delay increment
• Very narrow device (SIP package)
• Stackable for PC board economy
• Low profile
• Epoxy encapsulated
GND IN T5
T1 T2 T3 T4
NC T10T6 T7 T8 T9 GND
• Meets or exceeds MIL-D-23859C
FUNCTIONAL DESCRIPTION
The 1507-series device is a fixed, single-input, ten-output, passive delay
line. The signal input (IN) is reproduced at the outputs (T1-T10) in equal
increments. The delay from IN to T10 (TD) is given by the device dash
number. The characteristic impedance of the line is given by the letter
code that follows the dash number (See Table). The rise time (TR) of the
line is 10% of TD, and the 3dB bandwidth is given by 3.5 / TD.
SERIES SPECIFICATIONS
• Dielectric breakdown: 50 Vdc
• Distortion @ output: 10% max.
• Operating temperature: -55°C to +125°C
• Storage temperature: -55°C to +125°C
• Temperature coefficient: 100 PPM/°C
T1 T2 T3 T4 T6 T7 T8 T9T5
IN T10
GND
Functional Diagram
GND
DASH NUMBER SPECIFICATIONS
Part
Number
1507-20A
1507-40A
1507-50A
1507-100A
1507-150A
1507-200A
1507-20B
1507-50B
1507-100B
1507-200B
1507-250B
1507-20C
1507-50C
1507-100C
1507-200C
1507-50G
1507-100G
1507-200G
1507-300G
1507-500G
T
D
(ns)
20.0 ± 2.0 2.0 ± 0.4
40.0 ± 2.0 4.0 ± 1.0
50.0 ± 2.5 5.0 ± 1.5
100 ± 5.0 10.0 ± 2.0
150 ± 7.5 15.0 ± 2.0
200 ± 10.0 20.0 ± 3.0
20.0 ± 2.0 2.0 ± 0.4
50.0 ± 2.5 5.0 ± 1.5
100 ± 5.0 10.0 ± 2.0
200 ± 10.0 20.0 ± 3.0
250 ± 13.0 25.0 ± 4.0
20.0 ± 2.0 2.0 ± 0.4
50.0 ± 2.5 5.0 ± 1.5
100 ± 5.0 10.0 ± 2.0
200 ± 13.0 20.0 ± 3.0
50.0 ± 2.5 5.0 ± 1.5
100 ± 5.0 10.0 ± 2.0
200 ± 10.0 20.0 ± 3.0
300 ± 15.0 30.0 ± 4.0
500 ± 25.0 50.0 ± 5.0
Delay per
Tap (ns)
1507-xxz
xx = Delay (TD)
z = Impedance Code
PIN DESCRIPTIONS
IN Signal Input
T1-T10 Tap Outputs
GND Ground
T
R
(ns)
4.0 50 1.0
8.0 50 1.5
9.0 50 1.5
18.0 50 2.0
28.0 50 3.0
38.0 50 4.0
4.0 100 1.5
9.0 100 2.0
18.0 100 4.0
38.0 100 6.0
48.0 100 7.0
4.0 200 3.0
9.0 200 4.5
18.0 200 6.0
38.0 200 9.0
9.0 500 6.0
18.0 500 10.0
38.0 500 30.0
58.0 500 30.0
98.0 500 55.0
inc.
Impedance
(ΩΩ)
R
(ΩΩ)
DC
.200
.100
TYP.
.020
TYP.
MAX.
.100
MIN.
.250
MAX.
.010
TYP.
1 2 3 4 5 6 7
8 9 10 11 12 13 14
Package Dimensions
1997 Data Delay Devices
Doc #97025 DATA DELAY DEVICES, INC. 1
2/6/97 3 Mt. Prospect Ave. Clifton, NJ 07013
1507
PASSIVE DELAY LINE TEST SPECIFICATIONS
TEST CONDITIONS
INPUT: OUTPUT:
Ambient Temperature: 25oC ± 3oC R
Input Pulse: High = 3.0V typical C
Low = 0.0V typical Threshold: 50% (Rising & Falling)
Source Impedance: 50Ω Max.
Rise/Fall Time: 3.0 ns Max. (measured
at 10% and 90% levels)
Pulse Width (TD <= 75ns): PWIN = 100ns
Period (TD <= 75ns): PERIN = 1000ns
Pulse Width (TD > 75ns): PWIN = 2 x T
Period (TD > 75ns): PERIN = 10 x T
D
D
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PER
PW
IN
T
RISE
: 10MΩ
load
: 10pf
load
IN
T
FALL
INPUT
SIGNAL
OUTPUT
SIGNAL
PULSE
GENERATOR
OUT
TRIG
V
90% 90%
T
RISE
IH
T
RISE
90% 90%
Timing Diagram For Testing
R
IN
50 Ω
IN
DEVICE UNDER
TEST (DUT)
50%50%
10%10%
V
OH
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T
FALL
V
IL
T
FALL
50%50%
10%10%
TRIG
V
OL
IN
OSCILLOSCOPE
R
OUT
RIN = R
OUT
= Z
LINE
Test Setup
Doc #97025 DATA DELAY DEVICES, INC. 2
2/6/97 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
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