TOSHIBA TC74ACT164P, TC74ACT164F, TC74ACT164FN Technical data

TC74ACT164P/F/FN

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74ACT164P,TC74ACT164F,TC74ACT164FN

8-Bit Shift Register (S-IN, P-OUT)

The TC74ACT164 is an advanced high speed CMOS 8-BIT SERIAL-IN PARALLEL-OUT SHIFT REGISTER fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS output voltage levels.

It consists of a serial-in, parallel-out 8-bit shift register with a CLOCK input and an overriding CLEAR input.

Two serial data inputs (A, B) are provided so that one may be used as a data enable.

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

Features

•High speed: fmax = 200 MHz (typ.) at VCC = 5 V

•Low power dissipation: ICC = 8 μA (max) at Ta = 25°C

•Compatible with TTL outputs: VIL = 0.8 V (max)

VIH = 2.0 V (max)

•Symmetrical output impedance: |IOH| = IOL = 24 mA (min)

Capability of driving 50 Ω transmission lines.

•Balanced propagation delays: tpLH − tpHL

•Pin and function compatible with 74F164

Note: xxxFN (JEDEC SOP) is not available in Japan.

TC74ACT164P

TC74ACT164F

TC74ACT164FN

Weight
DIP14-P-300-2.54	: 0.96 g (typ.)
SOP14-P-300-1.27A	: 0.18 g (typ.)
SOL14-P-150-1.27	: 0.12 g (typ.)

1	2007-10-01

TC74ACT164P/F/FN

Pin Assignment

IEC Logic Symbol

(9)

R SRG8

A

1

14

VCC

CLR

B

2

13

QH

CK

(8)

C1/→

QA

3

12

QG

A

(1)

&

1D

(2)

QB

4

11

QF

B

QC

5

10

QE

QD

6

9

CLR

GND

7

8

CK

Truth Table

(top view)

Inputs

Outputs

Serial IN

CLR

CK

QA

QB

…

QH

A

B

L

X

X

X

L

L

…

L

H

X

X

No change

H

L

X

L

QAn

…

QGn

H

X

L

L

QAn

…

QGn

H

H

H

H

QAn

…

QGn

X

: Don’t care

QAn~QGn: The level of QA~QG, respectively, before the most recent positive edge of the clock.

(3)QA

(4)QB

(5)QC

(6)QD

(10)QE

(11)QF

(12)QG

(13)QH

2	2007-10-01

TC74ACT164P/F/FN

System Diagram

CLR

9

A

1

R

R

R

R

R

R

R

R

Serial

D Q D Q D Q D Q D Q D Q D Q D Q

inputs

2

B

CK

Q

CK

Q

CK

Q

CK

Q

CK

Q

CK

Q

CK

Q

CK Q

CK

8

3

4

5

6

10

11

12

13

QA

QB

QC

QD

QE

QF

QG

QH

Timing Chart

CLR

A

Serial

inputs

B

CK

QA

QB

QC

QD

Outputs

QE

QF

QG

QH

Clear

Clear

3

2007-10-01