NP84N04CHE
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP84N04EHE, NP84N04KHE
NP84N04CHE, NP84N04DHE, NP84N04MHE, NP84N04NHE
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
These products are N-channel MOS Field Effect Transistors designed for high current switching applications.
<R> ORDERING INFORMATION
PART NUMBER |
LEAD PLATING |
PACKING |
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PACKAGE |
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NP84N04EHE-E1-AY Note1, 2 |
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TO-263 (MP-25ZJ) typ. 1.4 g |
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NP84N04EHE-E2-AY Note1, 2 |
Pure Sn (Tin) |
Tape 800 p/reel |
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NP84N04KHE-E1-AY Note1 |
TO-263 (MP-25ZK) typ. 1.5 g |
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NP84N04KHE-E2-AY Note1 |
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NP84N04CHE-S12-AZ Note1, 2 |
Sn-Ag-Cu |
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TO-220 |
(MP-25) typ. 1.9 g |
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NP84N04DHE-S12-AY Note1, 2 |
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Tube 50 p/tube |
TO-262 |
(MP-25 Fin Cut) typ. 1.8 g |
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NP84N04MHE-S18-AY Note1 |
Pure Sn (Tin) |
TO-220 |
(MP-25K) typ. 1.9 g |
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NP84N04NHE-S18-AY Note1 |
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TO-262 |
(MP-25SK) typ. 1.8 g |
Notes 1. Pb-free (This product does not contain Pb in the external electrode.)
(TO-220)
2. Not for new design
FEATURES
• Channel temperature 175 degree rated |
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• Super low on-state resistance |
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RDS(on) = 5.2 mΩ MAX. (VGS = 10 V, ID = 42 A) |
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• Low input capacitance |
(TO-262) |
Ciss = 4410 pF TYP. |
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• Built-in gate protection diode |
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(TO-263)
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. D14240EJ7V0DS00 (7th edition) |
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1999, 2000, 2007 |
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Date Published October 2007 NS |
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Printed in Japan
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
NP84N04EHE,NP84N04KHE,NP84N04CHE, NP84N04DHE, NP84N04MHE,NP84N04NHE
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V) |
VDSS |
40 |
V |
Gate to Source Voltage (VDS = 0 V) |
VGSS |
±20 |
V |
Drain Current (DC) (TC = 25°C) Note1 |
ID(DC) |
±84 |
A |
Drain Current (Pulse) Note2 |
ID(pulse) |
±336 |
A |
Total Power Dissipation (TC = 25°C) |
PT |
200 |
W |
Total Power Dissipation (TA = 25°C) |
PT |
1.8 |
W |
Channel Temperature |
Tch |
175 |
°C |
Storage Temperature |
Tstg |
−55 to +175 |
°C |
Single Avalanche Current Note3 |
IAS |
84/61/22 |
A |
Single Avalanche Energy Note3 |
EAS |
70/372/484 |
mJ |
Notes 1. Calculated constant current according to MAX. allowable channel temperature.
2.PW ≤ 10 μs, Duty cycle ≤ 1%
3.Starting Tch = 25°C, VDD = 20 V, RG = 25 Ω, VGS = 20 → 0 V (see Figure 4.)
THERMAL RESISTANCE
Channel to Case Thermal Resistance |
Rth(ch-C) |
0.75 |
°C/W |
Channel to Ambient Thermal Resistance |
Rth(ch-A) |
83.3 |
°C/W |
2 |
Data Sheet D14240EJ7V0DS |
NP84N04EHE,NP84N04KHE,NP84N04CHE, NP84N04DHE, NP84N04MHE,NP84N04NHE
ELECTRICAL CHARACTERISTICS (TA = 25°C) |
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CHARACTERISTICS |
SYMBOL |
TEST CONDITIONS |
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MIN. |
TYP. |
MAX. |
UNIT |
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Zero Gate Voltage Drain Current |
IDSS |
VDS = 40 V, VGS = 0 V |
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10 |
μA |
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Gate Leakage Current |
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IGSS |
VGS = ±20 V, VDS = 0 V |
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±10 |
μA |
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Gate to Source Threshold Voltage |
VGS(th) |
VDS = VGS, ID = 250 μA |
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2.0 |
3.0 |
4.0 |
V |
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Forward Transfer Admittance |
| yfs | |
VDS = 10 V, ID = 42 A |
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20 |
47 |
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S |
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Drain to Source On-state Resistance |
RDS(on) |
VGS = 10 V, ID = 42 A |
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4.6 |
5.2 |
mΩ |
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Input Capacitance |
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Ciss |
VDS = 25 V, |
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4410 |
6620 |
pF |
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Output Capacitance |
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Coss |
VGS = 0 V, |
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950 |
1430 |
pF |
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Reverse Transfer Capacitance |
Crss |
f = 1 MHz |
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490 |
890 |
pF |
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Turn-on Delay Time |
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td(on) |
VDD = 20 V, ID = 42 A, |
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36 |
79 |
ns |
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Rise Time |
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tr |
VGS = 10 V, |
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25 |
62 |
ns |
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Turn-off Delay Time |
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td(off) |
RG = 1 Ω |
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77 |
150 |
ns |
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Fall Time |
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tf |
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28 |
69 |
ns |
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Total Gate Charge |
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QG |
VDD = 32 V, |
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87 |
130 |
nC |
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Gate to Source Charge |
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QGS |
VGS = 10 V, |
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20 |
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nC |
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Gate to Drain Charge |
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QGD |
ID = 84 A |
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32 |
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nC |
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Body Diode Forward Voltage |
VF(S-D) |
IF = 84 A, VGS = 0 V |
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1.0 |
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V |
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Reverse Recovery Time |
trr |
IF = 84 A, VGS = 0 V, |
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49 |
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ns |
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Reverse Recovery Charge |
Qrr |
di/dt = 100 A/μs |
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60 |
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nC |
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TEST CIRCUIT 1 AVALANCHE CAPABILITY |
TEST CIRCUIT 2 SWITCHING TIME |
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D.U.T. |
L |
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D.U.T. |
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VGS |
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RG = 25 Ω |
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RL |
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VGS |
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90 % |
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10 % |
VGS |
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RG |
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Wave Form |
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PG. |
50 Ω |
VDD |
PG. |
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0 |
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VDD |
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VGS = 20 → 0 V |
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VDS |
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90 % |
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90 % |
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BVDSS |
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VGS |
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VDS |
10 % |
10 % |
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0 |
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VDS |
0 |
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IAS |
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ID |
VDS |
τ |
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Wave Form |
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td(on) |
tr |
td(off) |
tf |
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VDD |
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τ = 1 μ s |
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ton |
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toff |
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Starting Tch |
Duty Cycle ≤ 1 % |
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TEST CIRCUIT 3 GATE CHARGE
D.U.T.
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IG = 2 mA |
RL |
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PG. |
50 |
Ω |
VDD |
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Data Sheet D14240EJ7V0DS |
3 |