MOTOROLA MC10E452, MC100E452 Technical data
Q
0
V
CCO
D
0
D
0
D
1
D
1
D3D
3
D4D4V
CCOQ4
Q
4
Q
0
LOGIC DIAGRAM
25 24 23 22 21 20 19
18
17
16
15
14
13
12
5 6 7 8 9 10 11
26
27
28
2
3
4
Q
3
Q
3
V
CC
Q
2
Q
2
Q
1
Q
1
MR
CLK
CLK
V
EE
V
BB
D
2
D
2
D
0
D
0
D
1
D
1
D
2
D
2
D
3
D
3
D
4
D
4
Q
0
Q
0
CLK
CLK
MR
V
BB
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
D
Q
R
D Q
R
D
Q
R
D
Q
R
D Q
R
1
Pinout: 28-Lead PLCC (Top View)
* All VCC and V
CCO
pins are tied together on the die.
SEMICONDUCTOR TECHNICAL DATA
2–1
REV 2
Motorola, Inc. 1996
12/93
The MC10E/100E452 is a 5-bit differential register with differential data
(inputs and outputs) and clock. The registers are triggered by a positive
transition of the positive clock (CLK) input. A high on the Master Reset
(MR) asynchronously resets all registers so that the Q outputs go LOW.
The differential input structures are clamped so that the inputs of
unused registers can be left open without upsetting the bias network of
the device. The clamping action will assert the D
and the CLK sides of the
inputs. Because of the edge triggered flip-flop nature of the device
simultaneously opening both the clock and data inputs will result in an
output which reaches an unidentified but valid state. Note that the input
clamps only operate when both inputs fall to 2.5V below VCC.
The fully differential design of the device makes it ideal for very high
frequency applications where a registered data path is necessary.
• Differential D, CLK and Q; V
BB
Reference Available
• 1100MHz Min. Toggle Frequency
• Asynchronous Master Reset
• Extended 100E V
EE
Range of – 4.2V to – 5.46V
PIN NAMES
Pin Function
D[0:4], D[0:4] Differential Data Inputs
MR Master Reset Input
CLK, CLK Differential Clock Input
VBB VBB Reference Output
Q[0:4], Q[0:4] Differential Data Outputs
5-BIT DIFFERENTIAL
REGISTER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
MC10E452 MC100E452
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–2
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
–40°C 0°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit Cond
V
BB
Output Reference
Voltage 10E
100E
–1.43
–1.38
–1.30
–1.26
–1.38
–1.38
–1.27
–1.26
–1.35
–1.38
–1.25
–1.26
–1.31
–1.38
–1.19
–1.26
V
I
IH
Input HIGH
Current
150 150 150 150 µA
I
EE
Power Supply
Current 10E
100E
747489
89
747489
89
747489
89
748589
102
mA
V
CMR
Common Mode
Range
–2.0 –0.4 –2.0 –0.4 –2.0 –0.4 –2.0 –0.4 V 1
1. V
CMR
is referenced to the most positive side of the differential input signal. Normal specified operation is obtained when the input signals are
within the V
CMR
range and the input swing is greater than VPP.
AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
–40°C 0°C to 85°C
Symbol Characteristic Min Typ Max Min Typ Max Unit Condition
f
MAX
Maximum Toggle Frequency 1000 1400 1100 1400 MHz
t
PLH
t
PHL
Propagation Delay to Output CLK (Diff)
CLK (SE)
MR
425
375
375
600
600
625
850
900
900
475
425
425
600
600
625
800
850
850
ps
t
S
Setup Time D 175 –50 150 –50 ps
t
H
Hold Time D 225 50 200 50 ps
t
RR
Reset Recovery Time 750 450 700 450
t
PW
Minimum Pulse Width CLKMR400
400
400
400
ps
t
skew
Within-Device Skew 50 50 ps 1
V
PP
Minimum Input Swing 150 150 mV 2
tr/t
f
Rise/Fall Times 250 475 725 275 475 675 ps 20–80%
1. Within-device skew is defined as identical transitions on similar paths through a device.
2. Minimum input swing for which AC parameters are guaranteed.
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