Motorola MC100LVEL56DWR2, MC100EL56, MC100EL56DW, MC100EL56DWR2, MC100LVEL56DW Datasheet
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SEMICONDUCTOR TECHNICAL DATA
4–1
REV 1
Motorola, Inc. 1996
4/95
The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The
MC100EL56 is pin and functionally equivalent to the MC100LVEL56 but
is specified for operation at the standard 100E ECL voltage supply. The
differential data path makes the device ideal for multiplexing low skew
clock or other skew sensitive signals. Multiple VBB pins are provided to
ease AC coupling input signals (for more information on AC coupling ECL
signals refer to the interfacing section of the ECLinPS data book
DL140/D).
The device features both individual and common select inputs to
address both data path and random logic applications.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs are left
open the D input will pull down to VEE, The D
input will bias around VCC/2
forcing the Q output LOW.
• Differential Inputs and Outputs
• 20–Lead SOIC Packaging
• 440ps Typical Propagation Delays
• Separate and Common Select
• Supports Both Standard and Low Voltage 100K ECL
• Internal Input Pulldowns
• >2000V ESD Protection
Logic Diagram and Pinout: 20-Lead SOIC (Top View)
D0b D1a V
BB1
1718 16 15 14 13 12
43 5 6 7 8 9
Q0
11
10
SEL0 SEL1 VCCQ1 Q1 V
EE
D0a
1920
21
V
CC
Q0
V
BB0
D1a D1b D1bD0a
COM_SEL
SEL
H
L
TRUTH TABLE
Data
a
b
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
1
20
PIN NAMES
Function
Input Data a
Input Data b
Individual Select Input
Common Select Input
True Outputs
Inverted Outputs
Pins
D0a–D1a
D0b–D1b
SEL0–SEL1
COM_SEL
Q0–Q1
Q0
–Q1
D0b
MC100LVEL56 MC100EL56
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 3
4–2
MC100LVEL56
DC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND)
–40°C 0°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 20 24 20 24 20 24 20 24 mA
V
BB
Output Reference Voltage –1.38 –1.26 –1.38 –1.26 –1.38 –1.26 –1.38 –1.26 V
I
IH
Input HIGH Current 150 150 150 150 µA
I
INL
Input LOW Current DnDn0.5
–600
0.5
–600
0.5
–600
0.5
–600
µA
VPP(DC) Input Sensitivity
1
50 50 50 50 V
1. Differential input voltage required to obtain a full ECL swing on the outputs.
MC100LVEL56
AC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND)
–40°C 0°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
t
PLH
t
PHL
Propagation D (Diff)
Delay D (SE)
to Output SEL
COMSEL
340
290
430
430
540
590
730
730
350
300
440
440
550
600
740
740
360
310
440
440
560
610
740
740
380
330
450
450
580
630
750
750
ps
t
SKEW
Within–Device Skew
1
40 80 40 80 40 80 40 80 ps
t
SKEW
Duty Cycle Skew
2
100 100 100 100 ps
VPP(AC) Minimum Input Swing
3
150 1000 150 1000 150 1000 150 1000 mV
V
CMR
Common Mode Range
4
VPP < 500mV
VPP ≥ 500mV
–2.0
–1.8
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
V
t
r
t
f
Output Rise/Fall Times Q
(20% – 80%)
200 540 200 540 200 540 200 540 ps
1. Within-device skew is defined as identical transitions on similar paths through a device.
2. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point
of the outputs.
3. Minimum input swing for which AC parameters are guaranteed.
4. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within
the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the spec table assume a nominal VEE = –3.3V. Note for PECL operation, the V
CMR
(min) will be fixed at 3.3V – |V
CMR
(min)|.
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