LG GM76C8128CLL-70, GM76C8128CLL-55, GM76C8128CLLE-55, GM76C8128CLL-85, GM76C8128CLLI-85 Datasheet

LG Semicon Co.,Ltd.	GM76C8128CL/CLL
	131,072 WORDS x 8 BIT
	CMOS STATIC RAM

Description

The GM76C8128CL/CLL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits. Using a 0.6um advanced CMOS technology and it provides high speed operation with minimum cycle time of 55/70/85ns. The device is placed in a low power standby mode with /CS1 high or CS2 low and the output enable (/OE) allows fast memory access. Thus it is suitable for high speed and low power applications, especially where battery back-up is required.

Features

*Fast Speed : 55/70/85ns

*Low Power Standby and Low Power Operation

Standby : 0.275mW Max. at TA = - 40 ~ 85C(LLE/LLI) 0.55mW Max. at TA = - 40 ~ 85C(LE/LI) 0.11mW Max. at TA = 0 ~ 70C(LL)

0.55mW Max. at TA = 0 ~ 70C(L) Operation : 385mW (Max)

*Completely Static RAM : No Clock or Timing Strobe Required

*Equal Access and Cycle Time

*TTL compatible inputs and outputs

*Capability of Battery Back-up Operation

*Single + 5V+/-10% Operation

*Standard 32 DIP, SOP and TSOP-I,STSOP-I

	* Temperature Range		A0					.
	Commercial(0¡-70C) : GM76C8128C		A1					. .
	Extended (-25 ~ 85C) : GM76C8128C-E		A2					. .
	Industrial (-40 ~ 85C) : GM76C8128C-I							. . .
Pin Description								Address
								Buffer
	Pin	Function	A14
			A15
	A0-A16	Address Inputs
			A16
	/WE	Write Enable Input
	/CS1, CS2	Chip Select Input
								/CS1, CS2
			/CS1					Chip
	/OE	Output Enable Input
			CS2					Control
	I/O0-I/O7	Data Inputs/Outputs
			/OE					/OE, /WE
	VCC	Power Supply (4.5V ~5.5V)	/WE					Chip
								Control
	VSS	Ground
	NC	No Connection

Pin Configuration

NC				VCC
	1		32
A16				A15
	2		31
A14	3		30	CS2
A12	4		29	/WE
A7	5		28	A13
A6	6		27	A8
A5				A9
	7		26
A4	8		25	A11
A3				/OE
	9		24
A2	10		23	A10
A1	11		22	/CS1
A0	12		21	I/O7
I/O0				I/O6
	13		20
I/O1				I/O5
	14		19
I/O2	15		18	I/O4
VSS	16		17	I/O3

(Top View)

		Block		Diagram
	10	X	1024		MEMORY CELL ARRAY
					1024 x 128 x 8
		Decoder
					(128K x 8)
					128 x 8
	7		128
		Y			Column Select
		Decorder
					8

I/O Buffer

I/O0

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

85

GM76C8128CL/CLL

Absolute Maximum Ratings*

	Symbol	Parameter		Rating		Unit
			GM76C8128C	0 ~ 70		C
	TA	Ambient Temperature under Bias
			GM76C8128C-E	-25	~ 85	C
			GM76C8128C-I	-40	~ 85	C
	TSTG	Storage Temperature		-55	~ 150	C
	TSOL	Soldering Temperature and Time		260, 10 (at lead)		C, S
	VCC	Supply Voltage		-0.3 ~ 7.0		V
	VIN	Input Voltage		-0.3 ~ 7.0		V
	VI/O	Input and Output Voltage		-0.5 ~ VCC + 0.5		V
	PD	Power Dissipation		1.0		W

*: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Recommended DC Operating Conditions (TA = - 40 ~ 85C)

Symbol	Parameter	Min	Typ	Max	Unit
VCC	Supply Voltage	4.5	5.0	5.5	V
VIH	Input High Voltage	2.2	-	VCC + 0.3	V
VIL	Input Low Voltage	-0.3*	-	0.8	V

*Note :VIL(min) = -3.0V for <= 10ns pulse

Truth Table

	/CS1	CS2	/OE	/WE	A0 to A16	DATA I/O	MODE
	L	H	L	H	Stable	Output Data	Read
	L	H	X	L	Stable	Input Data	Write
	L	H	H	H	Stable	Hi-Z	Output Disable
	H	X	X	X	-	Hi-Z	Standby
	X	L	X	X	-	Hi-Z

*Note: X means don't care

Capacitance (f = 1MHZ, TA = 25C)

Symbol	Parameter	Test Conditions	Min	Max	Unit
CIN	Input Capacitance	VI = 0V	-	6	pF
CI/O	Output Capacitance	VO = 0V	-	8	pF

*Note: This parameter is sampled and not 100% tested.

86

GM76C8128CL/CLL

DC Operating Characteristics (VCC = 5V+/-10%, TA = - 40 ~ 85C)

Symbol

Parameter

Conditions

Min

*Typ

Max

Unit

II(L)

Input Leakage Current

VIN = 0 to VCC

-1

-

1

uA

IO(L)

Output Leakage Current

/CS1 = VIH or CS2 = VIL

-1

-

1

uA

/OE = VIH, VSS <=VOUT<=VCC

VOH

High Level Output Voltage

IOH = -1.0mA

2.4

-

-

V

VOL

Low Level Output Voltage

IOL = 2.1mA

-

-

0.4

V

ICC

Operating Supply Current

/CS1 = VIL and CS2 = VIH

-

-

15

mA

VIN = VIH/VIL, IOUT = 0mA

ICC1

/CS1 = VIL and CS2 = VIH

VIN = VIH/VIL

-

-

70

mA

IOUT = 0mA

Average Operating Current

tcycle = Min, cycle

ICC2

/CS1 = 0.2V, CS2 = VCC-0.2V

VIN = VCC - 0.2V/0.2V

-

-

10

mA

IOUT = 0mA

tcycle = 1us

ICCS1

Standby Current(TTL)

/CS1 = VIH, CS2 = VIL

-

-

2

mA

CCS2

Standby

L - Version

-

-

100

I

GM76C8128C

/CS1 = VCC-0.2V LL - Version

-

uA

Current(CMOS)

-

20

GM76C8128C-E

CS2 = 0.2V

L - Version

-

-

100

uA

GM76C8128C-I

LL - Version

-

-

50

*Typ. Values are measured at 25C

AC Operating Characteristics

Test Conditions (VCC = 5V+/-10%, TA = - 40 ~ 85C, unless otherwise noted.)

Parameter

Value

Input Pulse Level

0.6V to 2.4V

Input Rise and Fall Time

5ns

Input and Output Timing Reference Levels

1.5V

Output Load

See below

Output Load (A)

Output Load (B) (for tCHZ, tCLZ, tWHZ, tOW, tOLZ & tOHZ)

+5V

+5V

DOUT

1.8K§Ù

DOUT

1.8K§Ù

5 §Ü*

990§Ù

100 §Ü*

990§Ù

87

GM76C8128CL/CLL

AC Operating Characteristics (VCC = 5V+/-10%, TA = - 40 ~ 85C)

Read Cycle

	Symbol	Parameter	GM76C8128C-55		GM76C8128C-70		GM76C8128C-85		Unit
			Min	Max	Min	Max	Min	Max
	tRC	Read Cycle Time	55	-	70	-	85	-	ns
	tAA	Address Access Time	-	55	-	70	-	85	ns
	tACS1	Chip Select 1 Access Time	-	55	-	70	-	85	ns
	tACS2	Chip Select 2 Access Time	-	55	-	70	-	85	ns
	tOE	Output Enable Access Time	-	30	-	35	-	45	ns
	tCLZ1	Chip Select 1 Output Setup Time	5	-	5	-	10	-	ns
	tCHZ1	Chip Select 1 Output Floating	-	20	-	25	-	30	ns
	tCLZ2	Chip Select 2 Output Setup Time	5	-	5	-	10	-	ns
	tCHZ2	Chip Select 2 Output Floating	-	20	-	25	-	30	ns
	tOLZ	Output Enable Output Setup Time	0	-	0	-	0	-	ns
	tOHZ	Output Enable Output Floating	-	20	-	25	-	30	ns
	tOH	Output Hold Time	5	-	10	-	10	-	ns

Write Cycle

Symbol	Parameter	GM76C8128C-55			GM76C8128C-70			GM76C8128C-85			Unit
		Min		Max	Min		Max	Min		Max
tWC	Write Cycle Time	55		-	70		-	85		-	ns
tCW1	Chip Select Time 1	50		-	65		-	75		-	ns
tCW2	Chip Select Time 2	50		-	65		-	75		-	ns
tAW	Address Enable Time	50		-	60		-	70		-	ns
tAS	Address Setup Time	0		-	0		-	0		-	ns
tWP	Write Pulse Width	45		-	50		-	60		-	ns
tWR	Address Hold Time	0		-	0		-	0		-	ns
tDW	Input Data Setup Time	25		-	30		-	35		-	ns
tDH	Input Data Hold Time	0		-	0		-	0		-	ns
tWHZ	Write to Output in High-Z	-		20	-		25	-		30	ns
tOW	Output Active from End of Write	0		-	0		-	0		-	ns

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