Supply voltageV
Power dissipationPd750mW1
Operating temperatureTopr–30 to +75°C
Storage temperatureTstg–55 to +125°C
Note: For Ta is higher than 65°C, reduce Pd at the rate of 12.5 mW/°C.
* Input limit of VRI is more than 12dB on Vo max, and not variable range.
2.4k
MPX
VRI 1
NRINVREF
IAOUT
IA
E. VOL
VRI 2
VRI 3
14k
6k
RPI
Rev.3, Jun. 1997, page 16 of 73
–0.4dBs
0
–5.2dBs
–5
43mVrms
–25.2dBsRPI
–24.3
VRI*
–10
–15
dBs
–20
–25
–30
PB Mode (1 kHz NR-OFF)
HA12167FB/HA12169FB
EQOUT
EQIN
RECOUT
PBOUT
BIAS TRAP
TP
5.6k
E. VOLREC EQ
+
+
DOLBY - NR
1.5k
–1dBs
775mVrms
0dBs
(HA12167)
–5dBs
580mVrms
–2.5dBs
(HA12169)
–8.2dBs
–8.2dBs
–9dBs
300mVrms
0dBs = 775mVrms
–26dBs
2.4k
MPX
VRI 1
NRINVREF
IAOUT
IA
E. VOL
VRI 2
VRI 3
RPI
14k
6k
–5.2dBs
–25.2
dBs
43mVrms
RPI
–28.2
–22.2dBs
0
–5
–10
–15
–20
dBs
–25
VRI
–34.2
dBs
–30
–35
Rev.3, Jun. 1997, page 17 of 73
HA12167FB/HA12169FB
Application Note
Power Supply Range
HA12167FB/HA12169FB are designed to operate on either single supply or split supply.
The operating range of the supply voltage is shown in table 1.
Table 1Supply Voltage
Type No.Single SupplySplit Supply
HA12167FB12 V to 15 V±6.0 V to 7.5 V
HA12169FB11 V to 15 V±6.0 V to 7.5 V
The lower limit of supply voltage depends on the line output reference level.
The minimum value of the overload margin is specified as 12 dB by Dolby Laboratories. HA12167 series
are provided with two line output level, which will permit an optimum overload margin for power supply
conditions.
Reference Voltage
For the single supply operation these devices provide the reference voltage of half the supply voltage that is
the signal grounds. As the peculiarity of these devices, the capacitor for the ripple filter is very small about
1/100 compared with their usual value. The Reference voltage are provided for the left channel and the
right channel separately. The block diagram is shown as figure 1.
V
CC
+
–
77
+
1 µF
–
+
61
L channel
reference
R channel
reference
80
Figure 1 The Block Diagram of Reference Voltage Supply
Rev.3, Jun. 1997, page 18 of 73
HA12167FB/HA12169FB
Operating Mode Control
HA12167FB/HA12169FB provides fully electronic switching circuits. All switches are controlled by serial
data.
Table 2Threshold Voltage (VTH)
Pin No.LoHiUnit
42–0.2 to 1.53.5 to 5.3V
39, 40, 41–0.2 to 1.04.0 to 5.3V
Notes: 1. Voltages shown above are determined by internal circuits of LSI when take pin 47 (DGND pin) as
reference pin. On split supply use, same VTH can be offered by connecting DGND pin to GND
pin.
This means that it can be controlled directly by micro processor.
2. Each pins are on pulled down with 100 kΩ internal resistor .
Therefore, it will be low-level when each pins are open.
3. Note on serial data inputting
(a)The clock frequency on CLK must be less than 500 kHz.
(b)Over shoot level and under shoot level of input signal must be the value shown below.
When connecting microcomputer or Logic-IC with HA12167FB/HA12169FB directly, there is
apprehension of rash-current under some transition timming of raising voltag e or falling voltage at V
ON/OFF.
CC
For this countermeasure, connect 10 kΩ to 20 kΩ resistor with each pins. It is shown in test circuit on this
data sheet.
In case of changing NR-ON/OFF at the C-mode, for the countermeasure of the noise of pop, perform the
following processes.
In case of changing NR-OFF to NR-ON at C-mode. C-mode, NR-OFF → B-mode, NR-OFF → B-mode,
NR-ON → C-mode, NR-ON.
In case of changing NR-ON to NR-OFF at C-mode. C-mode, NR-ON → B-mode, NR-ON → B-mode,
NR-OFF → C-mode, NR-OFF.
Under 5.3 V
0
Within –0.2 V
Figure 2 Input Level
Rev.3, Jun. 1997, page 19 of 73
HA12167FB/HA12169FB
Serial Data Formatting
14 bit shift register is employed.
CLK and data are stored during STB being high and data is latched when STB goes high to low.
Reset goes reset a state when reset low and high releasles reset. (High fixed at use time)
Attention Point of Serial Interface
• Reset goes low condition when a power supply is ON or OFF.
• Characteristics select of Bias DAC is connected with equalizer tape selector.
• Bias DAC register is all low when a time of tape select.
• Bias DAC register is all low and Bias DAC out is dropped low level at compulsion by force.
• Input pin select, REC/PB select and Input volume gain select does not select at the same time.
• Input volume must go mute condition when selected of RPI is input pin select.
CLK
DATA
STB
RESET
012345678910111213
Reset release
Figure 3 Serial Data Timming Chart Figure
MUTE
DAC
Buff
BIAS CONT
+
DACOUT
Figure 4 Bias DAC Output Circuit
Latch of data
Rev.3, Jun. 1997, page 20 of 73
HA12167FB/HA12169FB
Serial Data Formatting
Bit Mode ControlInput VoltageEaqualizer VoltageBasic DAC
No.ResetResetResetReset
0Tape
selector 1
1Tape
selector 2
2Tape
speed
3Meter
sensitivity
4Input
selector 1
5Input
selector 2
6REC/PBH PB mode selectionHR
7Input
voltage
gain
8MPXH ONLI-bit 2 LE-bit 2 LB-bit 2 L
9NRH ONLI-bit 3 LE-bit 3 LB-bit 3 L
10 B/CH CLI-bit 4 LE-bit 4 LB-bit 4 L
11 ———I-bit 5 H——B-bit 5 L
12 Registor
selector 1
13 Registor
selector 2
bit 0
bit 1 HL
HMetalNormal
LCromNormal
H Hi speed selectionLI-bit 2 LE-bit 2 LB-bit 2 L
L Normal speed selection
H Meter sensitivity 20 dBupLI-bit 3 LE-bit 3 LB-bit 3 L
L Meter sensitinity normal
bit 4
bit 5 HL
HVRI3RPI
LVRI2VRI1
L REC mode selection
H PB mode volume gain HI-bit 1 LE-bit 1 LB-bit 1 L
L Rec mode volume gain
L OFF
L OFF
L B
bit 12
bit 13 HL
HBias DACInput volume
LEqualizer volume Mode control
LL
channel
LI-bit 1 LE-bit 1 LB-bit 1 L
LI=bit 4 LE-bit 4 LB-bit 4 L
LI-bit 5 H——B-bit 5 L
channel
I-bit 0 LL
I-bit 0 LR
channel
channel
E-bit 0 LL
E-bit 0 LR
channel
B-bit o L
B-bit 0
channel
Rev.3, Jun. 1997, page 21 of 73
HA12167FB/HA12169FB
Input Volume Register
I-bit 5I-bit 4I-bit 3I-bit 2I-bit 1I-bit 0Gain
LLLLLLIncrease
LLLLLH↑
LLLLHL:
LLLLHH:
:::::::
::::::↓
HHHHHLDecrease
HHHHHHMute
Equalizer Volume Register
E-bit 4E-bit 3E-bit 2E-bit 1E-bit 0Gain
LLLLLIncrease
LLLLH↑
LLLHL:
LLLHH:
::::::
:::::↓
HHHHLDecrease
HHHHHMute
Bias DAC Register
B-bit 5B-bit 4B-bit 3B-bit 2B-bit 1B-bit 0Bias
LLLLLLMute
LLLLLHDecrease
LLLLHL↑
LLLLHH:
:::::::
:::::::
HHHHHL↓
HHHHHHIncrease
Rev.3, Jun. 1997, page 22 of 73
HA12167FB/HA12169FB
MPX ON/OFF Switch
MPX-OFF mode means that signal from input amp doesn’t go through the MPX filter, but signal goes
through the NR circuit after being attenuated 3 dB by internal resistor. Refer to figure 5. For not cause any
level difference between MPX-ON mode and MPX-OFF mode, it is requested to use MPX-filter which has
definitely 3 dB attenuated. And when applying other usage except figure 5,
take consideration to give bias voltage to NR-IN terminal by resistor or so on because internal of NR-IN
terminal has no bias resistor.
Application as for the Dubbing Cassette Deck
HA12167FB/HA12169FB series has unprocessor signal from recording out terminals during playback
mode. So, it is simply applied for dubbing cassette decks.
MPX
filter
2.4 k
IA OUTNR INTPVref
IA
MPX ON
6 k
14 k
MPX OFF
3 dB ATT
Figure 5 MPX ON/OFF Switch Block Diagram
5.6 k
X 1
10 mH 220 P
1.5 k
BIAS TRAP
NR
processer
Rev.3, Jun. 1997, page 23 of 73
HA12167FB/HA12169FB
A deck
PB EQ
PB EQ
B deck
Compensation
of low
frequency
reagion
VRI 2 VRI 3REC OUT
PBREC
EQ IN
REC IN VRI 1
HA12167/9
EQ OUT
PB OUT
Figure 6 Application for Dubbing Deck
Injector Current
2
HA12167FB/HA12169FB has logic circuit which is fabricated by I
L into IC. To operate this circuit, it is
required enough injector current. Injector current goes into from the INJ pin (pin 38) and external resistor
is required to connect to this pin for adequate current. The value of external resistor is obtained by using
following equations. And put them with ±10% tolerance value which is calculated. V
connect to V
shown below. Large injector current fear to cause mis-operation of Logic under the
CC
can allow to
INJ
condition of high temperature. Also, small injector current fear to cause mis-operation (stop operation).
Under the condition of low temperature. Therefore, pay attention to have good stability of V
.
INJ
R
=
INJ
V
INJ
=
R
INJ
3.6
+
V
3.6
EE
k
Ω[]
–0.7
Ω
[]
k
Single supply
Split supply
– 0.7
V
INJ
Gain Control of Electronic Volume
HA12167FB/HA12169FB is designed in order to change the gain by DAC fabricated into IC. To reduce
the click noise when changing volume gain instantaneously, required to connect the capacitor and resistor
(CR time constant) to CONT pin (pin 13, 48, 68, 73). These terminals are also be used as output pin of
DAC. Therefore, by forcing voltage and current to these terminals, it is applicable to control volume gain
directly. But, voltage forced to these terminals must be f rom V
/2 –2 V to VCC/2 (for split supply use, –2 V
CC
to 0 V) in this case. And, this case, change of a gain depending on a temperature gets large.
Rev.3, Jun. 1997, page 24 of 73
HA12167FB/HA12169FB
R
INJ
38
3.6 mA
V
INJ
a) Single supply useb) Split supply use
HA12167/9
70
71
34
R
INJ
38
3.6 mA
V
INJ
V
EE
HA12167/9
70
71
34
Figure 7 Injector Current Application
The Tolerances of External Components for Dolby NR-Block
For adequate Dolby NR tracking response, take external components shown below.
For C5, C6, C24, and C25, please employ a few object of the leak, though you can be useful for an
electrolytic-capacitor.
C27
2200 p
±5%
C28
2200 p
±5%
Unit R :
C : F
Ω
BIAS
R31
18 k
±2%
R24
22 k
±2%
59585756555464
PB OUT
(L)
PB OUT
(R)
234567
C2
2200 p
±5%
SS1
(L)
HA12167/9 (REC 1 Chip)
SS1
(R)
R2
22 k
±2%
C3
2200 p
±5%
R26
560
±2%
SS2
(L)
SS2
(R)
R3
560
±2%
C26
2200 p
±5%
CCR
(L)
CCR
(R)
C4
2200 p
±5%
C25
0.1
±10%
HLS
DET(L)
HLS
DET(R)
C5
0.1
±10%
Figure 8 Tolerances of External Components
µ
LLS
DET(L)
LLS
DET(R)
µ
C24
0.1
±10%
C6
0.1
±10%
µ
µ
Rev.3, Jun. 1997, page 25 of 73
HA12167FB/HA12169FB
BIAS DAC
The full-scale of DAC is computed by the formula mentioned below.
2.4
=
V
29
=
V
32
R14:Normal Tape (pin 35)
:Metal Tape (pin 36)
R
15
R
:Chrome Tape (pin 37)
16
The maximum source current of DAC output (pin 29, 32) is 2 mA. Therefor the Bias-osc is drived through
external transisitor of emitter-follower.
Level Meter
The coupling capacitor of LMIN pin (9 pin and 52 pin).
R
R
14 to 16
2.4
14 to 16
×
R V
10
×
R V
13
[]
[]
For these capacitors, please employ a small object of the leak.
Rev.3, Jun. 1997, page 26 of 73
The Application of Equalizer Frequency Response
HA12167FB/HA12169FB
EQ
IN
EQ
VR
R1
Transfer Function:
F/Q
GP
+
Gm 1
–
+
Gm 4
–
R4
C3
+
OP 2
–
R5
+
OP 7
–
–
Gm 2
+
OP 6
+
–
–
Gm 5
+
–
Gm 6
+
GLFM
GH
Figure 9 REC Equalizer Block Diagram
C2
–
OP 5
+
C1
Gm 3
+
OP 3
–
R8
R6
R7
+
–
R10
EQ
OUT
R9
–
OP 4
+
Vout
=
Vin
=
Note: R
R
⋅
Gm5
G
V
9
R
GL
R
REF
....14 pin bias resistance
REF
G
......Gain of EQ-VR
V
1+
⋅
R
8
10
⋅
R
9
1+6.67×10
⋅
1+6.67×10
C3
Gm4
1+
Gm4
–10 FM
C3
Gm6
⋅
Gm5
R
–10
C2
2
⋅
S
2
S
⋅
S
+
Gm1
⋅
S
⋅
R
GH
⋅
S
R
GL
⋅
S
R
FM
+
R
⋅
R
R
GP
⋅
R
4
10
⋅
+
R
6
7
⋅
1+4.5×10
R
R
4
7
⋅
1+
+
R
R
R
5
6
3.0×10
–11
⋅
R
FQ
C3
Gm4
C2
⋅
Gm3
7
–10
⋅
S+ 2.5×10
⋅
S
C1
R
4
⋅
⋅
5
Gm2
⋅
R
FQ
⋅
⋅
R
Gm3
F/Q
S+
R
⋅
⋅
S
R
FQ
–20
Rev.3, Jun. 1997, page 27 of 73
HA12167FB/HA12169FB
Gain
g1
g2
g3
f1f2f3f
Figure 10 REC Equalizer Frequency Response
3dB
BW
g1=
g2
=
g3
=
f1=
f2 =
f3=
BW =
Q=
9
6.67
()
R
REF
9×R
GL
R
REF
9×R
GH
R
REF
+
×
R
R
GP
GH
1
π
×
2
6.67
π
×
2
6.67
1
⋅
2
π
2.25
–10
×
×
10
R
FM
GL
R
–10
×
×
10
×
R
R
FM
GH
0.3
–21
×
×
10
×
R
R
FQ
1
–10
×
×
10
R
F/Q
R
F/Q
×
R
FQ
f3
BW
4
2.78
π
×
3.51
=
when Gain of EQ- VR is center
F/Q
Rev.3, Jun. 1997, page 28 of 73
HA12167FB/HA12169FB
Equalizer Characteristics Control Using a Bias DAC
When only one of the bias DAC channels is used, any one of the six parameters (FM, fQ, f/Q, GH, GL, and
GP) that set the equalizer’s chara cteristics can controlled by the unused bias DAC.
The figure below gives one example.
R
ADJ
37
BIAS ADJ (C)
6 bit
DAC
6 bit
DAC
EQ-
controller
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
FM
fQ
f/Q
GH
GL
GP
HM
BIAS ADJ (M)
BIAS ADJ (N)
GND
BIAS CONT
DAC OUT
V
CC
R’
GP
1617181920
NNNCNM HNHC
Figure 11 Bias DAC Control of the GP Parameter
63 R
R = R’ //
GPGP
n: DAC step
ADJ
2 n
Rev.3, Jun. 1997, page 29 of 73
HA12167FB/HA12169FB
Figures 12, 13, and 14 show the characteristics when GP is controlled by a bias DAC.
60
50
40
Gain (dB)
30
20
1001 k10 k30 k
Frequency (Hz)
Figure 12 Equalizer Gain vs. Frequency
B_DAC
0
16
30
46
63
E_DAC = 0 step
VCC = 14 V
RFM = 100 k
RFQ = 51 k
R
F/Q
RGH = 33 k
RGL = 33 k
R’GP = 510 k
R
ADJ
= 51 k
= 20 k
Ω
Ω
Ω
Ω
Ω
Ω
Ω
60
55
50
R’
R’
R’
= 510 k
GP
= 120 k
GP
= 47 k
GP
Ω
Ω
Ω
45
EQ peak gain (dB)
40
35
30
0 10203040506070
B_DAC step
Figure 13 Equalizer Peak Gain vs. DAC Step Characteristics (1)
E_DAC = 0 step
V
= 14 V
CC
R
FM
R
FQ
R
F/Q
R
GH
R
GL
R
ADJ
= 100 k
= 51 k
= 51 k
= 33 k
= 33 k
= 20 k
Ω
Ω
Ω
Ω
Ω
Ω
Rev.3, Jun. 1997, page 30 of 73
HA12167FB/HA12169FB
60
= 33 k (Normal)
R
55
ADJ
R
ADJ
R
ADJ
50
45
EQ peak gain (dB)
40
35
0 10203040506070
B_DAC step
Figure 14 Equalizer Peak Gain vs. DAC Step Characteristics (2)
Ω
= 24 k (Chrome)
Ω
Ω
= 20 k (Metal)
E_DAC = 0 step
= 14 V
V
CC
R
R
R
R
R
R’
FM
FQ
F/Q
GH
GL
= 100 k
= 51 k
= 51 k
= 33 k
= 33 k
= 510 k
GP
Ω
Ω
Ω
Ω
Ω
Ω
When the (variable) width of the DAC step is to be changed, the gain at step 0 or at step 63 must be
changed. The step 0 gain can be changed using R’
as shown in figure 13. Also, R’GP can be switched
GP
using the tape selector, as shown in figure 15. However, it is necessary to take into account that the value
, which sets the step 63 gain, is also used for the output bias. When the load resistance on pin 33 is
of R
ADJ
R
, the following formula gives the output bias, V
L
V
= 2.4 × RL / R
BMAX
ADJ
Therefore, it is possible to compensate the output bias, V
f=100 kHz PBmode
VRI2in PBOUTout
V =14 V 80 kHz LPF
CC
+10 dB
0 dB
–10 dB
1.0
–10 dB
0.1
0 dB
Total Harmonic Distortion T.H.D. (%)
+10 dB
0.01
0 102030405060
DAC Step
Rev.3, Jun. 1997, page 55 of 73
HA12167FB/HA12169FB
10
1.0
0.1
Total Harmonic Distortion T.H.D. (%)
0.01
0102030405060
Total Harmonic Distortion vs. DAC Step (5)
f=1 kHz PBmode
VRI2in PBOUTout
V =14 V 80 kHz LPF
CC
–10 dB
0 dB
+10 dB
DAC Step
Total Harmonic Distortion vs. DAC Step (6)
10
f=10 kHz PBmode
VRI2in PBOUTout
V =14 V 80 kHz LPF
CC
1.0
–10 dB
0.1
0 dB
Total Harmonic Distortion T.H.D. (%)
+10 dB
0.01
0 102030405060
DAC Step
Rev.3, Jun. 1997, page 56 of 73
HA12167FB/HA12169FB
REC Volume Maximam Input
Level vs. Supply Voltage
15
10
5
RECVol I.DAC Step=42
VRI1in PBOUTout f=1 kHz
REC Volume Maximam Input Level Vin Max (dBs)
0
810121416
Supply Voltage (V)
Volume Gain vs. Frequency (1) HA12167FB
I.DAC 0
20
0
–20
–40
Volume Gain (dB)
–60
–70
VRI1 PBOUT RECVolume V =14 V
101001 k10 k100 k1 M
CC
Frequency (Hz)
I.DAC 10
I.DAC 20
I.DAC 30
I.DAC 40
I.DAC 50
I.DAC 62
Rev.3, Jun. 1997, page 57 of 73
HA12167FB/HA12169FB
Volume Gain vs. Frequency (2) HA12167FB
50
40
I.DAC 0
30
20
Volume Gain (dB)
10
VRI 2 PBOUT PBVolume V =14 V
0
101001 k10 k100 k1 M
Volume Gain vs. Frequency (3) HA12169FB
STEP 0
20
0
–20
STEP 10
I.DAC 32
I.DAC 62
CC
Frequency (Hz)
STEP 20
STEP 30
STEP 40
STEP 50
–40
Volume Gain (dB)
–60
–70
VRI1 PBOUT RECVolume V =14 V
101001 k10 k100 k1 M
Rev.3, Jun. 1997, page 58 of 73
STEP 60
STEP 62
CC
Frequency (Hz)
40
HA12167FB/HA12169FB
Volume Gain vs. Frequency (4) HA12169FB
32
24
16
STEP 0
STEP 32
STEP 62
Volume Gain (dB)
8
VRI 2 PBOUT PBVolume V =14 V
0
101001 k10 k100 k1 M
CC
Frequency (Hz)
Input Volume Gain vs.
Input Volume Gain vs.
Temperature (1) HA12167FB
Temperature (2) HA12167FB
35
20
30
0
RECVol
VRI1in PBOUTout
V =14 V
CC
20
f=1 kHz
400 Hz HPF
80 kHz LPF
Input Volume Gain (dB)
40
60
4020020406080
Temperature Ta (
: 0 step
: 10 step
: 20 step
: 30 step
: 62 step
C)
25
Input Volume Gain (dB)
PBVol
20
VRI2in PBOUTout
f=1 kHz
V =14 V
CC
400 Hz HPF
80 kHz LPF
15
4020020406080
Temperature Ta (
Rev.3, Jun. 1997, page 59 of 73
: 0 step
: 32 step
: 62 step
C)
HA12167FB/HA12169FB
Maximum Output Level vs. Temperature (1)
20
15
10
RECVol
VRI1in PBOUTout
V =14 V T.H.D.=1%
CC
5
400 Hz HPF
Maximum Output Level Vomax (dBs)
80 kHz LPF
: 0 step
: 16 step
: 25 step
: 30 step
0
4020020406080
Temperature Ta (
C)
Maximum Output Level vs. Temperature (2)
20
15
10
PBVol
VRI2in PBOUTout
V =14 V T.H.D.=1%
CC
5
400 Hz HPF
Maximum Output Level Vomax (dBs)
80 kHz LPF
: 0 step
: 32 step
: 62 step
0
4020020406080
Temperature Ta (
C)
Level Meter Output vs. Input Level
V = 14 V
4.0
CC
fin = 1 kHz
0 dB = 775
mVrms
3.0
2.0
Level Meter Output (V)
1.0
0
–80 –60 –40 –2002040
Input Level Vin (dB)
Level Meter Output vs.
Supply Voltage (1) HA12167FB
4
3
2
: 0 dB range Vin=+12 dB
: 0 dB range Vin=0 dB
: 0 dB range Vin=–20 dB
Level Meter Output (V)
: 20 dB range Vin=–20 dB
1
0
8 1012141618
Supply Voltage (V)
Rev.3, Jun. 1997, page 60 of 73
HA12167FB/HA12169FB
Level Meter Output vs.
Supply Voltage (2) HA12169FB
4
3
2
: 0 dB range Vin=+12 dB
: 0 dB range Vin=0 dB
: 0 dB range Vin=–20 dB
Level Meter Output (V)
: 20 dB range Vin=–20 dB
1
0
8 1012141618
Supply Voltage (V)
Level Meter Output vs. Temperature
4.0
3.0
2.0
: 0 dB range 0 dB
: 0 dB range 12 dB
: 20 dB range5 dB
Level Meter Output LMout (V)
1.0
: 20 dB range 20 dB
f = 1 kHz V = 14 V
0
4020020406080
Temperature Ta (
CC
C)
Level Meter Output vs. Frequency
3.2
: Normal range Vin=0 dB
3.0
2.8
2.6
2.4
Level Meter Output (V)
2.2
2.0
201001 k10 k50 k
Frequency (Hz)
: 20 dBup range Vin=–20 dB
V = 14 V
CC
Rev.3, Jun. 1997, page 61 of 73
HA12167FB/HA12169FB
55
Equalizer Gain vs. Frequency (1)
50
40
30
20
Equalizer Gain (dB)
10
(1) (2) (3) (4) (5) (6)
NN HN NC HC NM HM
RGP
33 k 33 k 33 k 33 k 47 k 47 k
RGL
33 k 33 k 51 k 51 k 51 k 51 k
33 k 33 k 51 k 51 k 51 k 51 k
RGH
51 k 20 k 51 k 20 k 51 k 20 k
RF/Q
51 k 27 k 51 k 27 k 51 k 27 k
RFQ
100 k 100 k 100 k 100 k 100 k 100 k
RFM
EQin EQout V =14 V EQ.DAC=0 Vin=–38 dBS
CC
(5)
(3)
(1)
(4)
(2)
(6)
5
101001 k10 k100 k1 M
Frequency (Hz)
Equalizer Gain vs. Frequancy (2)
50
40
30
20
Equalizer Gain (dB)
DAC 16
DAC 0
DAC 30
10
EQin EQout V =14 V Vin=–36 dBS
0
101001 k10 k100 k1 M
CC
Frequency (Hz)
Equalizer Gain vs. Frequancy (3)
40
0
DAC 30
–40
–80
Equalizer Gain
DAC 31
–120
EQin EQout V =14 V Vin=–36 dBS
–160
101001 k10 k100 k1 M
CC
Frequency (Hz)
Rev.3, Jun. 1997, page 62 of 73
Total Harmonic Distortion vs.
50
Equalizer Output Level (1)
EQin EQout 0 step
V
= 14 V, 0 dB = –1 dBs
CC
HA12167FB/HA12169FB
3.5 kHz
10
1.0
350 Hz
Total Harmonic DIstortion T.H.D. (%)
0.1
–30–20–100102030
Equalizer Output Level (dB)
Total Harmonic Distortion vs.
50
10
Equalizer Output Level (2)
EQin EQout 16 step
V
= 14 V, 0 dB = –4 dBs
CC
10 kHz
15 kHz
315 Hz
1 kHz
15 kHz
6.3 kHz
3.15 kHz
6.3 kHz
1.0
Total Harmonic DIstortion T.H.D. (%)
0.1
–30–20–100102030
Equalizer Output Level (dB)
10 kHz
1 kHz
Rev.3, Jun. 1997, page 63 of 73
HA12167FB/HA12169FB
50
10
Total Harmonic Distortion vs.
Equalizer Output Level (3)
EQin EQout 30 step
V
= 14 V, 0 dB = –8 dBs
CC
315 Hz
1.0
15 kHz
10 kHz
Total Harminic Distortion T.H.D. (%)
0.1
–30–20–100102030
Equalizer Output Level (dB)
Equalizer Amp. Gain vs. R
45
EQin EQout V = 14 V
Vin = –46 dBS = 0 dB
EQ.DAC = 0 Step
40
R = R = 33 k
GHGP
R = R = 51 k
FQF/Q
R = 100 k
FM
CC
35
30
1 kHz
6.3 kHz
3.15 kHz
GL
25
Equalizer Amp. Gain GL (dB)
20
15
Rev.3, Jun. 1997, page 64 of 73
: 316 Hz
: 1 kHz
5 k10 k30 k100 k300 k1 M
GL
)
R (
HA12167FB/HA12169FB
45
Equalizer Amp. Gain vs. R
EQin EQout V = 14 V
CC
GH
Vin = –46 dBS = 0 dB
EQ.DAC = 0 Step
40
R = 33 k
GL
R = 16 k
GP
35
R = R = 24 k
R = 390 k
FQ
FM
F/Q
f = 6.3 kHz
30
25
Equalizer Amp. Gain GH (dB)
20
15
5 k10 k30 k100 k300 k1 M
GH
)
GP
R (
Equalizer Amp. Gain vs. R
65
60
EQin EQout
Vcc = 14 V
EQ.DAC = 0 Step
55
50
R = R = 33 k
R = R = 51 k
R = 100 k
f = 19 kHz
GL
FQ
FM
GH
F/Q
45
Equalizer Amp. Gain GP (dB)
40
35
5 k10 k30 k100 k300 k1 M
R ( )
GP
Rev.3, Jun. 1997, page 65 of 73
HA12167FB/HA12169FB
100 k
Equalizer Cutoff Frequency vs. R
EQin EQout
Vcc = 14 V
EQ.DAC=0 Step
10 k
1 k
Equalizer Cutoff Frequency (Hz)
R = 120 k
GL
R = 7.5 k
GH
R = R = 24k
FQF/Q
R = 16 k
GP
100
5 k 10 k30 k100 k300 k 500 k
RFM ( )
FM
1 M
Equalizer Peak Frequency vs. R
EQin EQout
Vcc = 14 V
EQ.DAC = 0 Step
100 k
10 k
R
Equalizer Peak Frequency fo (Hz)
F/Q
: 12 k
: 24 k
: 51 k
: 100 k
: 200 k
: 390 k
1 k
5 k 10 k30 k100 k300 k 500 k
RFQ ( )
FQ
Rev.3, Jun. 1997, page 66 of 73
HA12167FB/HA12169FB
Equalizer Quality Factor vs. R
FQ
15
EQin EQout
Vcc = 14 V
EQ.DAC = 0 Step
Vin = - 50 dBs
R =
10
F/Q
: 390 k
: 200 k
: 100 k
: 51 k
: 24 k
: 12 k
5
Equalizer Quality Factor Q.
0
5 k10 k30 k100 k300 k1 M
( )
R
FQ
Equalizer Gain vs. DAC Step
31
V
= 14 V
CC
EQin EQOUTout
f = 1 kHz
Vin = –26dBs
26
EQ. Gain (dB)
21
16
0102030
DAC Step
Rev.3, Jun. 1997, page 67 of 73
HA12167FB/HA12169FB
–60
–65
EQ. Noise (dBs)
–70
–75
0102030
15
Equalizer Vo max, Vin max vs. DAC Step
Equalizer Noise vs. DAC Step
V
CC
JIS-A filter
DAC Step
Vo max
= 14 V
0
10
5
Equalizer Vo max (dBs)
0
Rev.3, Jun. 1997, page 68 of 73
Vin max
EQin EQout
f = 1 kHz V
T.H.D. = 1%
102030
DAC Step
= 14 V
cc
–5
–10
Equalizer Vin max (dBs)
–15
HA12167FB/HA12169FB
Equalizer Vo max, Vin max vs. Supply Voltage
15
EQin EQout
0
f = 1 kHz
T.H.D.=1%
10
5
Equalizer Vo max (dBs)
0
–3
Vo max
: 0 Step
: 16 Step
: 30 Step
Vin max
: 0 Step
: 16 Step
: 30 Step
–5
–10
–15
–18
8 10121416
Supply Voltage (V)
Equalizer Vo max, Vin max vs. Temperature
150
Vo max
Equalizer Gain vs. Temperature
30
25
20
Gain (dB)
Equalizer Vin max (dBs)
15
10
4020020406080
0 step
16 step
30 step
V = 14 V, Vin = 26 dBs
CC
f = 1 kHz
Temperature Ta (°C)
10
5
Vin max
Equalizer Vo max (dBs)
EQin EQout V = 14 V
0
CC
0 step f = 1 kHz
3
4020020406080
Temperature Ta (°C)
5
10
Equalizer Vin max (dBs)
15
18
90
Rev.3, Jun. 1997, page 69 of 73
HA12167FB/HA12169FB
Maximum Output Level vs. BIAS Adjust Register
14
12
10
8
6
4
Maximum Output Level (V)
2
0
5 k10 k100 k1 M
V = 14 V
CC
B. DAC = 63 Step
Normal
Crom
Metal
BIAS Adjust Register R
ADJ
(Ω)
14
12
10
8
6
4
DAC Output Level (V)
2
DAC Output Level vs. DAC Step
V =14 V
CC
Metal : 20 k
Crom : 24 k
Normal : 33 k
0 102030405060
Ω
Ω
Ω
Metal
DAC Step
Crom
Normal
Rev.3, Jun. 1997, page 70 of 73
Bias Vomax vs. Supply Voltage
20
Metal
18
16
14
12
Bias Vo max (V)
10
Crom
Normal
HA12167FB/HA12169FB
VCC Line
8
6
4
810121416
Supply Voltage (V)
B.DAC=63 step
R =10 k
ADJ
Ω
Rev.3, Jun. 1997, page 71 of 73
HA12167FB/HA12169FB
Package Dimensions
17.2 ± 0.3
14
60
41
Unit: mm
61
17.2 ± 0.3
80
1
0.32 ± 0.08
0.30 ± 0.06
0.12
0.83
0.10
20
40
0.65
21
M
2.70
3.05 Max
0.17 ± 0.05
0.15 ± 0.04
1.6
0˚ – 8˚
+0.15
–0.10
0.10
Hitachi Code
JEDEC Code
EIAJ Code
Weight
0.8 ± 0.3
FP-80A
—
ED-7404A
1.2 g
Rev.3, Jun. 1997, page 72 of 73
HA12167FB/HA12169FB
Disclaimer
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, in cluding
intellectual property rights, in connection with u se of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Sales Offices
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
Hitachi Semiconductor
(America) Inc.
179 East Tasman Drive,
San Jose,CA 95134
Tel: <1> (408) 433-1990
Fax: <1>(408) 433-0223
Europe: http://www.hitachi-eu.com/hel/ecg
Asia : http://sicapac.hitachi-asia.com
Japan: http://www.hitachi.co.jp/Sicd/indx.htm
Hitachi Europe GmbH
Electronic Components Group
Dornacher Straße 3
D-85622 Feldkirchen, Munich
Germany
Tel: <49> (89) 9 9180-0
Fax: <49> (89) 9 29 30 00
Hitachi Europe Ltd.
Electronic Components Group.
Whitebrook Park
Lower Cookham Road
Maidenhead
Berkshire SL6 8YA, United Kingdom
Tel: <44> (1628) 585000
Fax: <44> (1628) 585160
Hitachi Asia Ltd.
Hitachi Tower
16 Collyer Quay #20-00,
Singapore 049318
Tel : <65>-538-6533/538-8577
Fax : <65>-538-6933/538-3877
URL : http://www.hitachi.com.sg
Hitachi Asia Ltd.
(Taipei Branch Office)
4/F, No. 167, Tun Hwa North Road,
Hung-Kuo Building,
Taipei (105), Taiwan
Tel : <886>-(2)-2718-3666
Fax : <886>-(2)-2718-8180
Telex : 23222 HAS-TP
URL : http://www.hitachi.com.tw
Hitachi Asia (Hong Kong) Ltd.
Group III (Electronic Components)
7/F., North Tower,
World Finance Centre,
Harbour City, Canton Road
Tsim Sha Tsui, Kowloon,
Hong Kong
Tel : <852>-(2)-735-9218
Fax : <852>-(2)-730-0281
URL : http://www.hitachi.com.hk
Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
Colophon 2.0
Rev.3, Jun. 1997, page 73 of 73
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.