HIT HA12220F Datasheet
HA12220F
CD-ROM Drive Head Amplifier IC
ADE-207-230 (Z)
Target Specification
1st. Edition
April 1997
Functions
•RF amplifier (Built-in equalizer changing circuit)
•Focus error amplifier (fc = 60kHz Typ)
•Tracking error amplifier (Built-in cut-off frequency changing circuit fc = 30kHz, 60kHz, 100kHz, 200kHz Typ)
•FOK detection circuit (Built-in Vth changing circuit)
•Mirror detection circuit
•Defect detection circuit
•APC amplifier
•RFAGC amplifier
Features
•Built-in variable resistors (+14 to –16% 2% steps) for adjusting tracking error EF balance
•Built-in variable resistors (–8 to +8dB 4dB steps) for rough adjusting tracking gain
•Built-in variable resistors (–8 to +8dB 4dB steps) for rough adjusting focus gain
•Built-in focus offset insertion circuit (–0.7 to +0.7V in 0.1V steps)
•RF amplifier frequency characteristics 30MHz (–3dB) in case of peaking off
•High-speed access support (The mirror circuit internal time constant can be switched between normal,
4× and 8× modes.)
•Support for CD-RW playback
•Few external components
•Available to set the stand-by mode
•FP-28TB package
HA12220F
Block Diagram
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0.1 |
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10 |
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1 |
0.1 |
HD49250 |
0.015 |
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28 |
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GND |
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RF1 |
VCC |
BYPS |
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VCF |
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RFC |
AGCF |
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AGCO |
DFH |
DFT |
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AGC |
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BIAS |
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DEFECT |
20 |
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Gain changing |
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+ |
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HD49250 |
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RF2 |
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– |
VCB |
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1 |
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EQ |
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– |
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MIRH |
RF3 |
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19 |
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+ |
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2 |
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0.033 |
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RFS |
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– |
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FOK |
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+ |
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RF4 |
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+ |
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– |
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3 |
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FSA |
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MIRR |
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MIRR |
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HD49250 |
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– |
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+FA2 |
Gain=12dB Typ |
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GND |
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GND |
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FE |
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– |
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+FA |
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FVR2 |
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– |
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FOK |
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FVR |
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17 |
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HD49250 |
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Offset |
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TR1 |
+TR1 |
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TE |
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+TA |
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TVR |
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– |
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4 |
– |
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TLPF |
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– |
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TVR2 |
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BAL |
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– |
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XLT |
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IIL |
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TR2 |
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16 |
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TR2 |
+ |
TVR |
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HD49250 |
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Gain=8dB Typ |
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5 |
– |
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DATA |
MD |
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15 |
6 |
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HD49250 |
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– + |
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BUF |
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Interface |
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APC |
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+ – |
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LD |
TE |
FE |
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CI |
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CO |
VC |
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XRST |
CLK |
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7 |
8 |
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9 |
10 |
GND |
11 |
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13 |
14 |
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HD49250 HD49250 |
-COM |
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-COM 100 + |
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-COM HD49250 |
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ADC |
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DAC |
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Rev.1, Apr. 1997, page 2 of 20 |
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HA12220F
Pin Description and Equivalent Circuit
Pin No. Pin Name Equivalent Circuit |
Function |
1 |
RF2 |
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4k |
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28 |
12k |
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120k |
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160k |
5p |
600k |
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1 |
12k |
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120k |
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160k |
10p |
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2 |
12k |
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160k |
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120k |
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160k |
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3 |
12k |
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120k |
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160k |
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RF FE FSA amplifier input2
160k
10p
2 |
RF3 |
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RF FE FSA amplifier input3 |
3 |
RF4 |
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RF FE FSA amplifier input4 |
28 |
RF1 |
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RF FE FSA amplifier input1 |
4 |
TR1 |
4k |
TR1 amplifier input |
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1.2p |
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80k |
32k |
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40k |
11.4k |
5 |
TR2 |
4k |
TR2 amplifier input |
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1.2p |
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80k |
32k |
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40k |
11.4k |
6 |
MD |
4k |
APC amplifier input |
7 |
LD |
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APC amplifier output |
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1k |
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150k |
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8 |
TE |
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Tracking error signal output |
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40k
9 |
FE |
Focus error signal output |
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Rev.1, Apr. 1997, page 3 of 20
HA12220F
Pin Description and Equivalent Circuit (cont)
Pin No. Pin Name Equivalent Circuit |
Function |
10CI
11CO
2.5k |
FSA amplifier output monitor |
10k |
Setting FOK reference voltage |
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12 |
VC |
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Reference voltage output |
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20k
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13 |
XRST |
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4k |
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Reset input |
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14 |
CLK |
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Serial data synchronous clock |
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input |
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15 |
DATA |
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Serial data input |
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16 |
XLT |
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Serial data latch input |
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17 |
FOK |
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VCC |
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FOK detection signal output |
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20k |
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18 MIRR
VCC
10k
Mirror detection signal output
19 |
MIRH |
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Mirror envelope hold signal |
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output |
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100k
20 DFT
VCC
20k
Defect detection signal output
Rev.1, Apr. 1997, page 4 of 20
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HA12220F |
Pin Description and Equivalent Circuit (cont) |
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Pin No. |
Pin Name Equivalent Circuit |
Function |
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21 |
DFH |
Defect envelope hold signal |
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output |
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22 |
AGCO |
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AGC amplifier output |
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5k |
5k |
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23 |
AGCF |
100k |
4k |
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Capacitor connection for AGC |
24 |
RFC |
2k |
4k |
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Capacitor connection for AGC |
25 |
VCF |
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VCC |
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Capacitor connection for |
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40k |
4k |
reference voltage ripple filter |
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40k |
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GND |
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26 |
BYPS |
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VCC |
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Capacitor connection for ripple |
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20k |
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filter |
27 |
VCC |
— |
V CC |
Rev.1, Apr. 1997, page 5 of 20
HA12220F
Operation
Control by Serial Data
The IC’s internal switches can be operated by sending control data from the HD49250.
The signal timing is shown in figure 1, and the control commands are listed in table 1 and 2.
Pin 15 DATA |
0 1 2 3 4 |
5 6 |
7 |
T1 
T2
Pin 14 CLK
T3 
T4
Pin 16 XLT
Item |
Symbol |
Min |
Typ |
Max |
Unit |
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Clock frequency |
fCLK |
— |
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520 |
kHz |
Clock pulse width |
T1, T2 |
0.96 |
— |
— |
s |
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Delay time |
T3 |
1 |
— |
— |
s |
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Latch pulse width |
T4 |
2 |
— |
— |
s |
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Figure 1 Timing Diagram for Serial Data Control
Signals from the HD49250 are input at pins 14 to 16. Pin13 is connected to the microcomputer. A low input at the XRST pin resets the IC. Normally this pin should be kept high.
The serial data from the HD49250 switches the following settings.
1.Tracking error EF balance
2.Focus offset
3.Tracking gain, Focus gain
4.FOK Vth
5.Mirror circuit, defect circuit normal speed / 4× speed / 8× speed mode
6.Tracking error cut-off frequency
7.APC amplifier ON/OFF
8.RF equalizer
9.Stand-by mode (cleared by setting XRST on)
Rev.1, Apr. 1997, page 6 of 20
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