HIT HA12206NT Datasheet

HA12206NT
Audio Signal Processor for Cassette Deck
ADE-207-198B (Z)
3rd Edition
Jun. 1999
Description
HA12206NT is silicon monolithic bipolar IC providing music sensor system, ALC, REC equalizer system and each electronic control switch in one chip.
REC equalizer × 2 channel
Line Amp. × 2 channel
ALC (Automatic Level Control)
MS (Music Sensor)
Each electronic control switch to change REC equalizer, bias, etc.
REC mute
Features
REC equalizer is very small number of extern al parts, built-in 2 types of frequency characteristics.
Correspondence with normal position (TYPE I) / high position (TYPE II).
TYPE I / TYPE II and PB equalizer fully electronic control switching built- in.
Controllable from direct micro-computer output.
Available to reduce substrate-area because of high integration and small external parts.
HA12206NT
Pin Description, Equivalent Circuit (VCC = 7.0V, VEE = –7.0V, Ta = 25°C, No signal,
The value in the table show typical value.)
Pin No. Pin Name Note Equivalent Circuit Pin Description
2 PB-Ain (R) V=0
V
100k
29 PB-Ain (L) 4 PB-Bin (R) B Deck PB input 27 PB-Bin (L) 5 REC-in (R) REC input 26 REC-in (L) 9 EQ-in (R) Equalizer input 22 EQ-in (L) 12 MIMS MS Gain control 3 AB out (R) V = 0
14.9k 10.6k V
A Deck PB input
Time constant for NAB standard
28 AB out (L) 6 ATT (R) V = 0
25 ATT (L) 7RPOUT (R)
24 RPOUT (L)
Variable
V
V
CC
V
EE
impedance for attenuation
REC or PB output
Rev.3, Jun. 1999, page 2 of 32
HA12206NT
Pin Description, Equivalent Circuit (VCC = 7.0V, VEE = –7.0V, Ta = 25°C, No signal,
The value in the table show typical value.) (cont)
Pin No. Pin Name Note Equivalent Circuit Pin Description
8 ADD in (R)
23
100k
100k
100k
Adder input
23 ADD in (L) 10 EQOUT (R) V = 0V
21 EQOUT (L) 11 IREF V = 1.2V
13 DET MS V = VCC – 4.2V
8
100k
100k
Equalizer output
100k
V
Equalizer reference current input
V
V
Time constant for rectifier
15 DET ALC V = 2.3V 16 MS MS output
Rev.3, Jun. 1999, page 3 of 32
HA12206NT
Pin Description, Equivalent Circuit (VCC = 7.0V, VEE = –7.0V, Ta = 25°C, No signal,
The value in the table show typical value.) (cont)
Pin No. Pin Name Note Equivalent Circuit Pin Description
17 Acr V = 0V
22k
100k
V
V
CC
18 Bcr 19 REC MUTE 20 REC / A / B V = 2.5V 1V 14 V
EE
CC
30 GND GND pin
Mode control
VEE pin VCC pin
Rev.3, Jun. 1999, page 4 of 32
Block Diagram
HA12206NT
C : F
Acr
Bcr
RECMUTE
or
(L)
RECOUT
5V
C/N
(SW2)
C/N
(SW2)
(SW3)
ON/OFF
(SW1)
REC/A/B
(L)
EQOUT
(L)
PBOUT
(L)
REC in
(L)
PB Bin
(L)
PB Ain
R3L
GND
R8
R2L
R1L
3.9k
C4L
2.2k
15k
0.1µ +
C3L
C2L
C1L
0.1µ
4700p
16
BCR ACR MS
RECMUTE
100k
25 24 23 22 21 20 19 18 17
30dBs−30dBs 30dBs
AINL ABOUTL BINL RECINL ATTL RPOUTL ADDINL EQINL EQOL RECAB
30 29 28 27 26
SW4L
Mute
SW3L
14.9k
100k
RECEQ
20dB
10.6k
22.7k
1k
100k
67k
2.5dBs
(580mV)
+
C
+
REC
B
100k
N
27.5dB
SW2L
SW1L
A
ALC
DET
ADDER
SW2R
27.5dB +
SW1R
A
2.5dBs
+
N
B
MS
+
67k
(580mV)
C
REC
100k
DET
20dB
(1.64Vpp)
10.6k
22.7k
1k
100k
100k
RECEQ
SW3R
14.9k
100k
Unit R :
R7
1M
15
C7
10µ
CC
+7V
V
R6
330k
+ +
C6
0.33µ C5
R5
68k
MIMS DETMS DETALC
IREF
(436mV)(38.8mV)
SW4R
Mute
100k
ADDINR EQINR EQOR
RPOUTR
67891011121314
30dBs 26dBs 5dBs
30dBs
BINR RECINR ATTR
ABOUTR
AINR
30dBs
(24.5mV)
12345
R4
C2R
C1R
0.1µ
C4R
+
C3R
0.1µ
4700p
R2R
R1R
2.2k
15k
2200p
EE
V
R3R
EE
V
(R)
EQOUT
(R)
RECOUT
(R)
REC in
(R)
PB Bin
(R)
PB Ain
7V
or
(R)
PBOUT
(180mV)
12.7dBs
Rev.3, Jun. 1999, page 5 of 32
HA12206NT

Truth Table

Parallel Data Format

NAB SW Position (SW 2) REC / AAAA / BBBB (Pin 20)
Acr (Pin 17) Bcr (Pin 18) L M H REC-EQ Mode
L L TYPE L H TYPE II TYPE I TYPE I TYPE II H L TYPE H H TYPE
Line Amp (SW 1) B A REC ALC OFF OFF *1 REC-EQ Behind (SW 4) OFF ON ON Note: 1. Follow the position of REC-MUTE pin.
I
I II
TYPE
TYPE TYPE
I
II II
TYPE
TYPE TYPE
I
I I
TYPE
TYPE TYPE
I
I II
REC-MUTE (Pin 19) REC-EQ Before (SW 3) ALC
LActiveON HMUTEOFF
Control Pin Position Under the Open Case
Acr (Pin 17) L Bcr (Pin 18) L REC-MUTE (Pin 19) L REC / A / B (Pin 20) M
Rev.3, Jun. 1999, page 6 of 32

Test Conditions

(0.5dB)
(0.5dB)
V(DC SOURCE 1)
IL
V
0.3dB
V(DC SOURCE 1)
IM
V
IM
V
60dB
(dB)
V(AC VM2)
(0.5dB)
V(DC SOURCE 1)
IH
(RECAB)
V
IH
V
(REC-MUTE)
V(DC SOURCE 1)
IH
V
(Acr, Bcr)
HA12206NT
=20 log {V(AC VM2 / Vi)}
V
=I (DC SOURCE 3)
Q
V(AC VM2)
I
Measure
AC VM2
AC VM2
AC VM2
PBOUT
PBOUT
EQOUT
Ain
Bin
EQin
10kHz, –30dBs
10kHz, –30dBs
1kHz, –26dBs
123
Q
I
Acr
4
Bcr
REC-MUTE
(dB)
(dB)
V(AC VM2)
AC VM2
AC VM2
RPOUT
RPOUT
Bin
Ain
1kHz, –30dBs
1kHz, –30dBs
5
5
RECAB
RECAB
(dB)
V(AC VM2)
AC VM2
AC VM2
AC VM2
AC VM2
EQOUT
RPOUT
RPOUT
RPOUT
Ain
Bin
EQin
RECin
10kHz, –30dBs
10kHz, –30dBs
1kHz, –26dBs
1kHz, –30dBs
234
Acr
Bcr
REC-MUTE
5
RECAB
=20 log {V(AC VM2) / V(AC VM1)}
=20 log {V(AC VM2) / V(AC VM1)}
V
G
AC VM1
AC VM2
RPOUT
Ain
1kHz, –30dBs
6
(1)
V
G
=20 log {V(AC VM2) / V(AC VM1)}
V
V
G
G
Vi=V(AC VM2) at SW5, SW6=REC
AC VM1
AC VM2
AC VM1
AC VM2
AC VM2 G
RPOUT
RPOUT
RPOUT
Bin
Bin
1kHz, –30dBs
10kHz, –30dBs
1kHz, –30dBs
7
8
9 RECin
(2)
(3)
V
G
(4)
V
G
Vo=V(AC VM2) at T.H.D=1% Vomax=20 log (Vo / 580mV)
AC VM2
RPOUT
Ain
1kHz
6
V
Vomax
400 to 30kHz BPF
400 to 30kHz BPF
Distortion
Distortion
Analyzer
RPOUT
RPOUT5-2 THD(2)
RECin
1kHz, –30dBs
1kHz, –0.7dBs
9
6
Analyzer
Test No. Set No.Symbol SG. Input Output Other12-1
(VIL)
2-2
(VIM)
2-3
(VIH)
3-1
3-2
3-3
4
5-1 THD(1) Ain
3-4 G
Rev.3, Jun. 1999, page 7 of 32
HA12206NT

Test Conditions (cont)

=20 log {V(AC VM2) / 580mV} at DC VM=
S/N=20 log {580mV / V(Noise)} CCIR / ARM
CT=20 log {580mV / V(AC VM2)}
——AC VM2
RPOUT
RPOUT
RPOUT
——Ain
Input Output Measure
——1kHz, –18dBs*
69101112
S/N (1) S/N=20 log {580mV / V(Noise)} CCIR / ARM
S/N (2)
CT R/L
Test No. Set No.Symbol SG. Other
6-1
6-278910
ON
CT=20 log {580mV / V(AC VM2)}
ALC=20 log {V(AC VM2) / 580mV}
V
AC VM2
AC VM2
AC VM2
RPOUT
RPOUT
RPOUT
Ain/Bin
RECin
Ain
1kHz, –18dBs*
1kHz, –0.7dBs
5kHz
6
ONVOL
CT A/B
ALC
V
REC=20 log {V(AC VM2) / V(AC VM1)}
REC=20 log {V(AC VM2) / V(AC VM1)}
REC=20 log {V(AC VM2) / V(AC VM1)}
V
V
V
G
G
G
DC VM
DC VM
AC VM2
AC VM2
AC VM2
EQout
RPOUT
EQout
EQout
Ain
EQin
EQin
EQin
1kHz, –30dBs
1kHz, –46dBs
8kHz, –46dBs
12kHz, –46dBs
6131313131313
REC N1
REC N2
REC N3
V
V
V
G
G
G
11
12-1
12-2
12-3
REC=20 log {V(AC VM2) / V(AC VM1)}
REC=20 log {V(AC VM2) / V(AC VM1)}
REC=20 log {V(AC VM2) / V(AC VM1)}
V
V
V
G
G
G
AC VM2
AC VM2
EQout
EQout
EQin
EQin
1kHz, –46dBs
8kHz, –46dBs
at T.H.D=1%
R-MUTE ATT=20 log {436mV / V(AC VM2)}
400 to 30kHz BPF
S/N=20 log {436mV / V(AC VM2)}
AC VM2
AC VM2
EQout
EQout
EQin
1kHz, –14dBs*
12kHz, –46dBs
AC VM2
EQout
EQin
1kHz
Noise
Distortion
Analyzer
EQout
EQout17 S/N REC 13
1kHz, 26dBs
Meter
13
REC C1
REC C2
REC C3
V
V
V
G
G
G
Vomax REC
13-1
13-2
13-3
15
16 THD REC 13 EQin
14 R-MUTE ATT 14 EQin
Note: or large level without dipping
Rev.3, Jun. 1999, page 8 of 32

Test Conditions (cont)

SW Position (Pre-Set for Each TEST)

4
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
3
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
7V
6V
6V
HA12206NT
6V
6V
25V5V5V5V5V5V5V5V5V5V5V5V
CC
DC-SOURCE(V)
1
2.5V
0 to V
0 to VCC0 to VCC0 to VCC2.5V*1*1*12.5V
10MOFFLHMMLLHM
9LLLMLHHHHHHL
8LLMLLLLHLLLL
LMLLLLLLLLL
*1RPRPEQRPRPRPRPRPRPRP
67
5*1RPRPEQRPRPRPRPRPRPRPRP
5V5V5V
5V
2.5V*12.5V
2.5V
LM
H
M
M
HLH
L
LLL
L
L
LLL
L
RP
EQEQRP
EQ
EQEQRP
EQ
2.5V
M
2.5V
M
*1*2*2*2*2*2*2*2*2
*1ABEQBABBRECAAB
34
2*1ABEQBABB
SW-Position
1
OFF*2*2*2*2*2*2*2*2
Set No.1234567891011121513
LR*2*2
RECAAB
RL*2*2
REC
REC
*2
EQ
EQ
*2
*2*2*2
EQ
EQ
*2*2*2
14
EQ
A
A
EQ
16
2. Measured channel Lch or Rch
Note: 1. Either will do
Rev.3, Jun. 1999, page 9 of 32
HA12206NT

Functional Description

Power Supply Range

Table 1 Supply Voltage
Power Supply Range
Item V
CC
Single Supply 6.0V to 7.5V –7.5V to –6.0V Inside 1.0V Note: HA12206NT is designed to operate on split supply.
As VEE pin is joined the substrate of chip, there is the possibility of latch-up in such case that the other pin is supplied a voltage and V
pin is open.
EE
V
EE
| VCC | – | VEE |
Therefore please use as V
pin become the lowest voltage of low impedance all the time. When power
EE
supply is thrown into this IC, that caution is necessary especially.

Operating Mode Control

HA12206NT provides fully electronic switching circuits. And each operating mode control is controlled by parallel data (DC voltage).
Table 2 shows the control voltage of each control input pin.
Table 2 Control Voltage
Pin No. Lo Mid Hi Unit Test Condition
17, 18, 19 0.0 to 1.0 4.0 to V
20 0.0 to 1.0 2.0 to 3.0 4.0 to V
V
CC
V
CC
Note: 1. Each pin is pulled down with 100k internal resistor. 17 to 19 pins are low-level, 20 pin is mid-
level, when each pin is open.
2. Over shoot level and under shoot level of input signal must be the standardi ze d. (High: Less than V
, Low: More than –0.2V)
CC
Input Pin Measure
Rev.3, Jun. 1999, page 10 of 32
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