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A/D, D/C Converters for Image Signal Processing
MN6576H
Low Power 9-Bit CMOS A/D Converter for Image Processing
Overview
The MN6576H is a high-speed 9-bit CMOS analog-to-
digital converter for image processing applications.
It uses a half flash structure based on chopper comparators and achieves both high speed and low power
consumption with multiplexing.
It provides separate power supply pins for the circuits
driving the low-voltage digital output pins.
Features
Maximum conversion rate: 16 MSPS (min.)
Linearity error: ±2.5 LSB (typ.)
Differential linearity error: ±0.6 LSB (typ.)
Power supply voltage: 5.0 V or 3.3 V
Power consumption: 120 mW (typ.) (f
=16 MHz)
CLK
Applications
Digital television receivers
Digital video equipment
Digital image processing equipment
Pin Assignment
D6D5D4
D7
D8
OVF
DV
DV
CLK
NOE
POWD
SS
DD
24232221201918
25
26
27
28
29
30
31
32
1
2
SS
AV
QFH032-P-0707
DDLDVSS
DV
3
4
SS
RT
RTS
V
V
AV
(TOP VIEW)
5
DD
AV
D3D2D1
6
7
DD
RM
V
AV
17
D0
16
TEST
15
AV
14
13
12
11
10
9
8
IN
V
AV
AV
V
V
AV
DD
DD
SS
RBS
RB
SS
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MN6576H A/D, D/C Converters for Image Signal Processing
Block Diagram
SS
RBSVRB
AVDDAVDDAV
1413121110
AVSSAVDDAVDDAV
V
9
31
Upper comparator (5 bits)
31
Upper encoder (5 bits)
SS
RM
IN
V
V
8
7
6
5
4
3
31
31
Clock generator
VRTV
2
RTS
SS
AV
1
31
Lower comparator A (4 bits)
Lower encoder A (4 bits)
Lower comparator B (4 bits)
31
55
Error
Lower encoder B (4 bits)
correction
5
and
data latch
15
161718
TEST
D0(LSB)
D1
D2
19
D3
202122
SS
DDL
DV
DV
23
242526
D4D5D6
D7
27
2829303132
SS
D8
OVF
DV
DD
DV
CLK
NOE
POWD
2
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A/D, D/C Converters for Image Signal Processing MN6576H
Pin Descriptions
Pin No. Symbol Function Description
1AVSSGround for analog circuits
2V
RTS
3VRTReference voltage input (TOP)
4AVSSGround for analog circuits
5AVDDPower supply for analog circuits
6VRMIntermediate reference voltage
7AVDDPower supply for analog circuits
8VINAnalog signal input
9AVSSGround for analog circuits
10 V
11 V
12 AV
13 AV
14 AV
RB
RBS
SS
DD
DD
15 TEST Test mode selection
16 D0 Digital code output (LSB)
17 D1 Digital code output
18 D2 Digital code output
19 D3 Digital code output
20 DV
21 DV
SS
DDL
22 D4 Digital code output
23 D5 Digital code output
24 D6 Digital code output
25 D7 Digital code output
26 D8 Digital code output (MSB)
27 OVF Overflow output
28 DV
29 DV
SS
DD
30 CLK Sampling clock
31 NOE Output enable
32 POWD Power down mode selection
Reference voltage power supply (TOP)
Reference voltage power supply (BOTTOM)
Reference voltage input (BOTTOM)
Ground for analog circuits
Power supply for analog circuits
Power supply for analog circuits
Ground for digital circuits
Power supply for low-voltage digital outputs
Ground for digital circuits
Power supply for digital circuits
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MN6576H A/D, D/C Converters for Image Signal Processing
Absolute Maximum Ratings Ta=25˚C
Parameter Symbol Rating Unit
Power supply voltage V
Power supply voltage for digital output circuits DV
Input voltage V
Output voltage V
Operating ambient temperature T
Storage temperature T
DD
DDL
I
O
opr
stg
– 0.3 to +7.0 V
– 0.3 to V
– 0.3 to V
– 0.3 to V
+0.3 V
DD
+0.3 V
DD
+0.3 V
DD
–20 to +70 ˚C
–55 to +125 ˚C
Recommended Operating Conditions
VDD=AVDD=DVDD=4.5V, DV
=3.0V, VSS=AVSS=DVSS=0V, Ta=25˚C
DDL
Parameter Symbol min typ max Unit
Power supply voltage V
Power supply voltage for digital output circuits DV
Digital input "H" level V
voltage "L" level V
Reference voltage "H" level V
"L" level V
Clock "H" level pulse width t
"L" level pulse width t
Analog input voltage V
Electrical Characteristics
VDD=AVDD=DVDD=4.5V, DV
DD
DDL
IH
IL
RT
RB
WH
WL
AIN
4.50 5.00 5.25 V
3.0 3.6 V
2.4 V
V
SS
3.0 V
V
SS
DD
0.8 V
DD
2.0 V
25 ns
25 ns
V
SS
=3.0V, AVSS=DVSS=0V, Ta=25˚C
DDL
V
DD
V
V
V
Parameter Symbol Conditions min typ max Unit
Power consumption P
VDD=5.0V, DV
C
f
=16MSPS
CLK
DDL
=3.3V,
120 150 mW
(not including reference current)
Resolution RES 9 bit
Linearity error E
Differential linearity error E
Maximum conversion rate F
C(max.)
Clock frequency f
Analog input dynamic range D
Output "H" level I
current VDD=5.0V, DV
"L" level I
Output delay time t
Analog input capacitance C
f
L
D
=16MSPS ±2.5 ±3.5 LSB
CLK
VRT=3.3V
VRB=1.3V
±0.6 ±1.0 LSB
16 MSPS
CLK
R
VOH=DV
OH
VOL=0.4V, VDD=5.0V
OL
DV
DDL
VDD=5.0V, DV
d
DDL
=3.3V
– 0.8V,
DDL
DDL
=3.3V
=3.3V,
CL=10pF
VDD=5.0V 26 pF
I
1 16 MHz
2V
2mA
10 30 45 ns
RT –VRB
–2 mA
V
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A/D, D/C Converters for Image Signal Processing MN6576H
Timing Chart
The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital
output 2.5 clock cycles later at the rising edge of the clock signal.
t
WHtWL
Clock
Analog input
Data output
N
N+1
N+2
N–3 N–2 N–1 N+1N
(30ns)
t
d
Note: The circles indicate analog signal sampling points.
N+3
N+4
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MN6576H A/D, D/C Converters for Image Signal Processing
Package Dimensions (Unit:mm)
QFH032-P-0707
9.2
±0.2
±0.2
7.0
24 17
25
32
(1.225)
16
(1.225)
±0.2
7.0
9
18
0.65
0.1
SEATING PLANE
0.3
±0.1
±0.2
2.5
±0.1
0.1
2.9 max.
±0.2
9.2
0.05
-
+0.10
0.5
0.15
±0.2
1.1
±0.2
0 to 10°
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