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A/D, D/C Converters for Image Signal Processing
MN655431SH
Low Power 8-Bit CMOS A/D Converter for Image Processing
Overview
The MN655431SH is an 8-bit CMOS analog-to-digital
converter with a maximum conversion rate of 15 MSPS.
It uses a half flash structure based on chopper comparators and achieves both high speed and low power consumption with multiplex processing.
It provides separate power supply pins for the circuits
driving the low-voltage digital output pins.
Features
Maximum conversion rate: 15 MSPS (min.)
Linearity error: ±0.5 LSB (typ.)
Differential linearity error: ±0.4 LSB (typ.)
Power supply voltage: 4.40 to 5.25 V
Power consumption: 90 mW (typ.)
Applications
Digital television receivers
Digital video equipment
Digital image processing equipment
Pin Assignment
DV
DDL
DV
(LSB) D0
D1
D2
D3
D4
D5
D6
(MSB) D7
DV
CLK
SS
DD
1
2
3
4
5
6
7
8
9
10
11
12
SSOP024-P-0300
(TOP VIEW)
24
DV
V
V
AV
AV
V
AV
V
V
AV
AV
DV
SS
RB
RBS
SS
SS
IN
DD
RT
RTS
DD
DD
DD
23
22
21
20
19
18
17
16
15
14
13
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MN655431SH A/D, D/C Converters for Image Signal Processing
Block Diagram
SS
RB
V
DV
23
24
Lower comparator
(4 bits)
Encoder (4 bits)
Data latch
2
1
SS
DDL
DV
DV
RBS
V
22
3
D0(LSB)
SSAVSS
AV
21
IN
V
19
20
Reference
resistor
Lower comparator (4 bits)
Encoder (4 bits)
4
5
6
D1
D2
D3
DD
DD
RT
V
AV
17
18
DD
RTS
V
AV
16
15
DD
AV
DV
13
14
Lower comparator
(4 bits)
Encoder (4 bits)
Clock generator
7
8
D4
D5
9
D6
11
10
DD
DV
12
CLK
D7(MSB)
2
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A/D, D/C Converters for Image Signal Processing MN655431SH
Pin Descriptions
Pin No. Symbol Function Description
1DV
DDL
2DVSSGround for digital circuits
3 D0 Digital output (LSB)
4 D1 Digital output
5 D2 Digital output
6 D3 Digital output
7 D4 Digital output
8 D5 Digital output
9 D6 Digital output
10 D7 Digital output (MSB)
11 DV
DD
12 CLK Sampling clock
13 DV
14 AV
15 AV
16 V
17 V
18 AV
19 V
20 AV
21 AV
22 V
23 V
24 DV
DD
DD
DD
RTS
RT
DD
IN
SS
SS
RBS
RB
SS
Power supply for digital output circuits
Power supply for digital circuits
Power supply for digital circuits
Power supply for analog circuits
Power supply for analog circuits
Power supply for reference voltage (TOP)
Reference voltage (TOP)
Power supply for analog circuits
Analog input
Ground for analog circuits
Ground for analog circuits
Power supply for reference voltage (BOTTOM)
Reference voltage (BOTTOM)
Ground for digital circuits
Absolute Maximum Ratings Ta=25˚C
Parameter Symbol Rating Unit
Power supply voltage V
Power supply voltage for digital outputs DV
Input voltage V
Output voltage V
Operating ambient temperature T
Storage temperature T
DD
DDL
opr
stg
– 0.3 to +7.0 V
– 0.3 to +V
AV
DV
– 0.3 to V
SS
– 0.3 to V
SS
I
O
+0.3 V
DD
+0.3 V
DD
+0.3 V
DD
–20 to +70 ˚C
–55 to +125 ˚C
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MN655431SH A/D, D/C Converters for Image Signal Processing
Recommended Operating Conditions V
=AVDD=DVDD=5.0V, DV
DD
=3.5V, VSS=AVSS=DVSS=0V, Ta=25˚C
DDL
Parameter Symbol min typ max Unit
Power supply voltage V
Power supply voltage for digital outputs DV
Digital input "H" level V
voltage "L" level V
Reference voltage "H" level V
"L" level V
Clock "H" level pulse width t
"L" level pulse width t
Analog input voltage V
Electrical Characteristics V
=AVDD=DVDD=5.0V, DV
DD
DD
DDL
IH
IL
RT
RB
WH
WL
AIN
4.50 5.00 5.25 V
3.4 3.6 V
2.4 V
V
SS
3.3 V
V
SS
DD
0.8 V
DD
1.5 V
30 ns
30 ns
V
SS
=3.5V, AVSS=DVSS=0V, Ta=25˚C
DDL
V
DD
V
V
V
Parameter Symbol Conditions min typ max Unit
Power supply voltage I
f
DD
= 15 MHz
CLK
(includes reference power supply)
18 26 mA
Resolution RES 8 bit
Linearity error E
Differential linearity error E
Maximum conversion rate F
Clock frequency f
Analog input dynamic range D
Output "H" level I
current "L" level I
Output delay time t
Analog input capacitance C
f
L
D
c(max.)
CLK
R
OH
OL
d
I
=15MHz ±0.5 ±1.3 LSB
CLK
VRT=3.5V VRB=1.5V ±0.4 ±0.7 LSB
15 MSPS
1 15 MHz
2V
VOH=DV
– 0.8V –2 mA
DDL
VOL= 0.4V 2 mA
30 45 ns
18 pF
RT –VRB
V
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A/D, D/C Converters for Image Signal Processing MN655431SH
Timing Chart
The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital
output 2.5 clock cycles later at the rising edge of the clock signal.
t
WHtWL
Clock
Analog input
Data output
N
N+1
N–3 N–2 N–1 N+1N
(30ns)
t
d
Note: The circles indicate analog signal sampling points.
N+2
N+3
N+4
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MN655431SH A/D, D/C Converters for Image Signal Processing
Package Dimensions (Unit:mm)
SSOP024-P-0300
6.5±0.2
24
13
5.5±0.2
+0.10
112
1.6±0.3 7.5±0.2
1.5±0.2
(0.5)
0.5
0.2±0.1
0.1±0.1
SEATING PLANE
0.05
-
0.15
1.0±0.2
0 to 10°
0.5±0.2
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