Apple iMac G4 800 Schematic

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

DRAWING

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

NVIDIA DAC/DVI, CLOCKS & STRAPS (SECTIONS 2 & 5)

14-15

WIRELESS PCI

INTREPID ETHERNET & FIREWIRE (SECTION 4)

PAGE

DVT

CPU LA CONNECTORS, ESP, CPU BYPASS

BLOCK DIAGRAM, SYSTEM, POWER & PCB INFO

TABLE OF CONTENTS

MODEM, BLUETOOTH, KITCHEN SINK & SERIAL DOWNLOAD

INTREPID MAX IF (SECTION 1)

8

AUDIO CODEC & VOLTAGE REGS

35

37

LINE IN/OUT BUFFERS

36

TMDS & EXTERNAL VGA CONNECTORS

INTREPID POWER & BYPASS (SECTION 8 & 9)

24-25

INTREPID AGP (SECTION 3)

NVIDIA POWER-ON RESET CONFIGURATION STRAPS

USB2 CONTROLLER

SCHEMATIC AND PCB SUPPORT

PCB,UL RECOGNIZED, MIN.130 DEG. C TEMP. RATING AND V-0 FLAME RATING PER UL 796
& UL 94. PCB TO BE SILK-SCREENED WITH UL/CUL RECOGNITION MARK, MANUFACTURER’S UL
FILE NUMBER, UL PCB MATERIAL DESIGNATION, TEMPERATURE RATING AND FLAME RATING.

COVER PAGE

MPC7450 MAXBUS

DDR MUXES

1
2,3
4,5
6,7

10-11

12
13

SO-DIMM, BIG DIMM
16
17
18
19

22-23

26-27

28

32

31

30

INTREPID GPIOS, INTERRUPTS & SERIAL PORTS (SECTION 6)

USB POWER & CONNECTORS

INTREPID UATA/IDE (SECTION 5)

+5V/+12V, AUDIO, FW & TMDS POWER CONVERTERS

ETHERNET PHY
FIREWIRE PHY

38

33
34

NET TABLES

POWER MANAGER UNIT

SPEAKER/MIC AMPS

60-64

52-59

45-51

44

42-43

40-41

65-69

PART TABLES

ATA CD/HD CONNECTORS

9

OFF

OFF

SHUTDOWN

RUN

ON

ON

+1.8V_SLEEP

FW_PWR

+12V_SLEEP

+12V_MAIN

+5V_SLEEP

+5V_MAIN

+MAXBUS_SLEEP

+3V_MAIN

+2_5V_MAIN

OFF

OFF

OFF

OFF

OFF
OFF

ON
ON
ON
ON
ON
ON
ON

SLEEP

POWER RAIL DEFINITIONS

ON
ON

ON

ON

ON
OFF

OFF

OFF
OFF

ON

20-21

GRAPHICS MEMORIES

NVIDIA FB SERIES TERMS, CLK DELAYS

NVIDIA FRAME BUFFER (SECTIONS 3 & 4)

Q59 MLB

29

INTREPID PCI, ROM (SECTION 7)

CONSTRAINT TABLES

39

NVIDIA AGP (SECTION 1)

INTREPID DDR CONTROL

CPU SPEED & CONFIG OPTIONS

<XR_PAGE_TITLE>

051-6497 SCHEM,MLB,Q59 SCH1

1

CRITICAL

1

PCB1

LBL,SER #,BARCODE

825-2029

1

PCB1

CRITICAL

DESIGN GUIDE,MCO,IMACG4

056-1158

PCB1

1

CRITICAL

DFM,PNLZN DWG,MLB,Q59

057-0085

820-1550

1

PCB1

CRITICAL

PCB,MLB,IMACG4

630-XXXX,PCBA,H,Q59,EEE XXX

1

HYNIX OMIT630-XXXX

630-XXXX,PCBA,S,Q59,EEE XXX

OMIT

1

SAMSUNG630-XXXX

SCHEM,MLB,Q59

13

01

1

69

ENGINEERING RELEASED

279015

06/06/03

?

051-6497

LAST_MODIFIED=Wed Sep 17 12:11:39 2003

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWING

P.34

SYSTEM BLOCK

P.31

P.44

P.30

P.6

P.14

P.15

P.13

P.4-5

P.34P.12

P.34

P.16

P.9

P.30

P.30

P.29

P.32

P.28

1394 OHCI

8BIT TX/RX

3.3V

USB

USB2

CONTROL

MODEM

BLUETOOTH

CONN(QTY3)

USB

P.20

P.21

P.31

P.25

VGA

Connector

EDID (I2C)

64MB

NV18B

P.17-27

P.35P.36

P.36 P.35

P.24P.29P.36

KITCHEN

Inverter

DDR SDRAM DIMM 1

DDR SDRAM DIMM 0

DDR MUXES

2.5V

MEMORY BUS

64BITS

167MHZ

FireWire

PHY

Ethernet

DDR MEMORY

400 MB/S

FIREWIRE

I2C

PHY

10/100

INTREPID

ETHERNET

I2C

CPU

64BIT DATA

32BIT ADDRESS

APOLLO

167MHZ

MAXBUS

Config

CPU PLL

MAXBUS

4X AGP

BOOTROM

PCI

66MHZ

NVIDIA

32BITS

1.5V/3.3V

AGP BUS

PCI BUS

BOOT ROM

1M X 8

MEMORY

GRAPHICS

GRAPHICS

MEMORY

(EXTERNAL MEM)

(EXTERNAL MEM)

Connector

Connector

FW - A

Ethernet

Connector

TMDS

Connector

LCD Panel

RGB

VGA/SVIDEO OUT

PMU

WIRELESS

32BITS

SO-DIMM Connector

FW - B

13

2

69

051-6497

<XR_PAGE_TITLE>

LAST_MODIFIED=Wed Sep 17 12:11:39 2003

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWING

================

8 - SIGNAL-BOTTOM

TOTAL

PREPREG

7 - GROUND2

5 - POWER

1 - SIGNAL-TOP

2 - GROUND1

LAYER

4 - POWER

3 - SIGNAL

6 - SIGNAL

PREPREG

PREPREG

FILLER

FILLER

PREPREG

3

3

0.7

3

4

2.8

3

2.8

17.4

17.4

0.7

1.4

============

62.0

0.7

1.4

0.5

---

---

========

0.5

---

1

0.5

---

---

---

0.5

--­1

2

2

---

---

---

4

4

---

=============

------------

--------

(OZ)

(MILS)

THICKNESS COPPER

(MILS)

TRACE WIDTH

3.3V

1.6V

12V

(SC2602)

DC/DC

GRAPHIC

(SWITCH)

FW

CPU

1.55V

2.5V

(SC2602)

(OZ960)

INVERTER

BACKLIGHT

(LTC3707)

DC/DC

DC/DC

DDR

5.1V

(LTC3707)

DUAL

DC/DC

PWR BLOCK,PCB INFO

3.65V

1.5V

1.8V

1.7V

5.1V

5.1V

5.1V

5.1V

LDO

TMDS

(EZ1582)

USB

EXTERNAL

VIDEO

(SWITCH)

HARD

DRIVE

(SWITCH)

OPTICAL

DRIVE

(SWITCH)

INTREPID

(SC2602)

DC/DC

MAXBUS I/O

AGP

(EZ1582)

LDO

LDO

3.3V
(EZ1582)

600V RMS

POWER SYSTEM ARCHITECTURE

+12V

(SWITCH)

--------------

4

4

---

0.7

---

PREPREG

----------------

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

HOLE-VIA-20R10

NOSTUFF

NOSTUFF

HOLE-VIA-20R10

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

NOSTUFF

HOLE-VIA-20R10

HOLE-VIA-20R10

NOSTUFF

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

HOLE-VIA-20R10

NOSTUFF

NOSTUFF

HOLE-VIA-20R10HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

NOSTUFF

HOLE-VIA-20R10

NOSTUFF

HOLE-VIA-20R10

051-6497

13

69

3

<XR_PAGE_TITLE>

ZT46

1

ZT47

1

ZT48

1

ZT49

1

ZT50

1

ZT43

1

ZT42

1

ZT41

1

ZT40

1

ZT39

1

ZT53

1

ZT54

1

ZT55

1

ZT56

1

ZT57

1

ZT63

1

ZT62

1

ZT61

1

ZT60

1

ZT59

1

ZT64

1

ZT65

1

ZT66

1

ZT67

1

ZT68

1

ZT58

1

ZT51

1

ZT44

1

ZT52

1

ZT45

1

LAST_MODIFIED=Wed Sep 17 12:15:39 2003

(1 OF 3)

TEST4

TEST3

TEST2

TEST1

TEST0

EXT_QUAL

TBEN

L2TSTCLK

L1TSTCLK

TCK

TMS

TDO

TDI

DTI0
DTI1
DTI2
DTI3

PLL_EXT

PLLCFG3

PLLCFG2

PLLCFG1

PLLCFG0

CLKOUT

SYSCLK

BVSEL

TT3

TT2

TT1

TSIZ0

TSIZ2

TSIZ1

TT4

TT0

A33
A34
A35

AP0

AP3

AP2

AP4

AP1

A25

A24

A23

A26
A27
A28
A29
A30
A31
A32

A13
A14
A15
A16
A17
A18
A19
A20
A21
A22

A12

A10

A9

A8

A7

A6

A3
A4
A5

A11

A2

A0
A1

OVDD

VDD

GND

AVDD

BR*
BG*

TS*

TRST*

LSSDMODE*

TA*

TEA*

QREQ*
QACK*

CKSTP_IN*

CKSTP_OUT*

INT*
SMI*

MCP*
SRESET*
HRESET*

PMON_IN*

PMON_OUT*

BMODE0*

BMODE1*

TBST*

GBL*
WT*
CI*
AACK*
ARTRY*
SHD0*

HIT*

SHD1*

DRDY*

DBG*

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

DRAWING

MPC7450 MAXBUS

CPU MECHANICAL PARTS SUPPORT

CPU INTERNAL PLL FILTERING

IBORG PULLS THIS UP, SPEC SAYS TO GROUND IT FOR SW CONTROL

DOWN HARD FOR SNOOPING.

CUT THE TRACE AND YANK

ALL THE TIME. NEED TO

FIXED IN INTREPID VERSION 2.

INTREPID VERSION 1 PULLS GBL

IF NECESSARY

FILTERS A WAKE FROM SLEEP GLITCH

RC GLITCH FILTER

PLACE CLOSE TO PIN

5%

1/16W

MF

402

470

NOSTUFF

402

5%
50V
CERM

10PF

5%

1/16W

MF

402

0

APOLLO_MPC7445_360

SEE_TABLE

BGA

800MHZ

NOSTUFF

402

MF

1/16W

5%

47

INT_V1

1%
1/16W
MF
402

100

INT_V2

5%

1/16W

MF

402

0

1%
1/16W
MF
603

10

275R138

275R138

402

10V

20%
CERM

0.1UF

CERM

20%
10V

402

0.1UF

CERM

20%
10V

402

0.1UF

402

10V

20%
CERM

0.1UF

TH

SL-138X272-292

TH

SL-138X272-292

CERM

20%
10V

402

0.1UF

N20P80%
16V
CERM
805

2.2UF

13

051-6497

4

69

U341

1

875-1475

PAD,THERMAL,CPU,U34

?

870-1113

1

DEVU342

HEAT SINK,CPU,Q26,U34

?

U343870-1114

1

DEV

CLIP,HEAT SINK,CPU,Q26.U34

?

U344

1

DEV

SCREW,MACH,3MM W,8MM L,U34

412-0042

?

835-0251

1

DEVU345NUT,3MM,U34

?

SYSCLK_CPU

NO_TEST

NC_CPU_CLKOUT

NO_TEST

NC_PMON_OUT_L

NO_TEST

NC_CPUAP<0>

NO_TEST

NC_CPUAP<1>

NO_TEST

NC_CPUAP<2>

NO_TEST

NC_CPUAP<3>

NO_TEST

NC_CPUAP<4>

CPU_PULLUP
CPU_PULLDOWN

CPU_PULLDOWN

+MAXBUS_SLEEP

CPU_AVDD

CPU_BUS_VSEL

CPU_PLL_CFG<0>
CPU_PLL_CFG<1>

CPU_PLL_CFG<3>

CPU_PLL_CFG<2>

CPU_DBG_L
CPU_DRDY_L_UF

CPU_PLL_CFGEXT

CPU_EDTI
CPU_DTI<0>
CPU_DTI<1>
CPU_DTI<2>

JTAG_CPU_TDI
JTAG_CPU_TDO

JTAG_CPU_TCK

JTAG_CPU_TMS

JTAG_CPU_TRST_L
CPU_LSSD_MODE
CPU_L1TSTCLK
CPU_L2TSTCLK

CPU_TA_L
CPU_TEA_L

CPU_TBEN

CPU_QACK_L

CPU_QREQ_L

CPU_CHKSTP_IN_L
CPU_CHKSTP_OUT_L

MPIC_CPU_INT_L
CPU_SMI_L
CPU_MCP_L

CPU_HRESET_L

CPU_SRESET_L

CPU_PMONIN_L

CPU_EMODE0_L
CPU_EMODE1_L

CPU_ARTRY_L

CPU_SHD0_L

CPU_HIT_L

CPU_SHD1_L

CPU_BR_L
CPU_BG_L

CPU_TS_L

CPU_ADDR<1>
CPU_ADDR<2>
CPU_ADDR<3>
CPU_ADDR<4>

CPU_ADDR<6>

CPU_ADDR<5>

CPU_ADDR<7>

CPU_ADDR<9>

CPU_ADDR<8>

CPU_ADDR<11>

CPU_ADDR<10>

CPU_ADDR<12>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<16>

CPU_ADDR<15>

CPU_ADDR<17>

CPU_ADDR<19>

CPU_ADDR<18>

CPU_ADDR<21>

CPU_ADDR<20>

CPU_ADDR<22>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<28>
CPU_ADDR<29>

CPU_ADDR<31>

CPU_ADDR<30>

CPU_TT<0>
CPU_TT<1>

CPU_TT<3>

CPU_TT<2>

CPU_TBST_L

CPU_TSIZ<0>

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_WT_L

CPU_GBL_L

CPU_CI_L

CPU_AACK_L

CPU_INT_GBL_L

ZT10P1

ZT9P1

ZT8P1

ZT11P1

CPU_DRDY_L

CPU_ADDR<0>

CPU_TT<4>

CPU_VCORE_SLEEP

CPU_VCORE_SLEEP

<XR_PAGE_TITLE>

C1036

1

2

C1035

1

2

R891

1

2

C954

1

2

R850

1 2

U34

E11

H1

D12

L3
G4
T2
F4
V1
J4
R2
K5
W2

C11

J2
K4
N4
J3
M5
P5
N3
T1
V2
U1

G3

N5
W1

B12

C4
G10
B11

F10

L2
D11

D1
C10

G2

R1

C1

E3

H6

F5

G7

N2

A8

M1

G9
F8

D2 B7

J1

A3
B1

H2

M2

R3
G1
K1
P1
N1

A11

E2

B5

H9

H11

H13

J6

J8

J10

J12

K7K3K9

C3

K11

K13

L6

L8

L10

L12

M4M7M9

M11D6M13

N7P3P9

P12R5R14

R17T7T10

D13

U3

U13

U17

V5

V8

V11

V15

E17F3G17

H4

H7

B2

D8

D4

G8
B3

E8

C9

B4

K2L5M3N6P2P8P11R4R13

R16C2T6T9U2

U12

U16V4V7

V10

V14

C12D5E18F2G18H3J5

B8
C8
C7
D7
A7

D9

A9

G5

P4

E4
H5

F9

A2

A10

K6

E1

F11

C6

B9
A4

L1

A12
B6
B10
E10
D10

F1

A5

L4

G6
F7
E7

E5
E6
F6
E9
C5

H8

K12

K14L7L9

L11

L13M8M10

M12

H10

H12J7J9

J11

J13K8K10

D3

R895

1

2

R312

1

2

R311

1 2

R901

1

2

ZH4

1

ZH7

1

C345

1

2

C370

1

2

C369

1

2

C352

1

2

ZH6

1

ZH5

1

LAST_MODIFIED=Wed Sep 17 12:15:40 2003

59C8> 52C6> 46D4<

45D2<>

44D2< 44D1< 44B7<

9D8< 9B7<

8D4< 8D1<

8A3<>

7C7<

59C8>

59D8>

59D8>

7C5<

44D2<

59B6>

59B6>

7C3<

44C2<

52C6>

52C6>

7B3<

56C3>

56C3>

56C3>

56C3>

59C8>

8A3<>

56C3>

56C3>

56D3>

56D3>

56D3>

56D3>
56D3>

56D3>

56D3>

56D3>

56C3>
56C3>

56C3>

56C3>

56D3>

45D2<>

45D2<>

7A3<

9B1<>

56C3>
56C3>
56C3>

59C8>

59C8>

59C8>

59C8>

9A1<>

9A1<>

56C3>

9B3<

8D5<>

28B5>

7B3<

59C6>

9B3<>

9B3<

9D3<

9D3<>

9D3<>

56D3>
56D3>
56D3>
56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>
56D3>
56D3>
56D3>
56D3>

56D3>

56D3>

9B3<>
9B3<>

9B3<>

9B3<>

9B3<>

56D3>

56D3>

56D3>

9B3<>
9C3<>

9B3<>

56C3>

9B1<

56D3>

9B3<>

8C1<

8C1<

56C3>

7C5<

7C5<

6D6<

8A8<>
8A8<>

8A8<>

8A8<>

8B8<>

8A8<>

9A1<>
9A1<>
9A1<>

8A3<>

59C8>

8A3<>

8A3<>

8A3<>

8C4<>

8B5<>

9A3<>

9B3<>

8B7<>

59C8>

8A3<>

8D7<>

44C4<>

7A5<

8A3<>

8B8<>

8B8<>

8B4<>
8B4<>

8B7<>

9D3<>
9D3<>
9D3<>
9D3<>

9D3<>

9D3<>

9D3<>

9C3<>

9D3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>

9C3<>
9C3<>
9C3<>
9C3<>
9C3<>

9C3<>

9C3<>

8B4<>
8B5<>

8B5<>

8B4<>

8B4<>

9B3<>

9B3<>

9B3<>

8B5<>

56C3>

8C5<>

8B5<>

9C3<>

8B5<>

9D3<>

8B4<>

8B7<

8B7<

9A4<

7A5<

4D7<>

4A3<

6C5<

52C6>

7C4<

6C6<
6C6<

6C6<

6C6<

7B7<

56C3>

6C6<

7C5<

8B7<>
8B4<>
8B4<>

7A5<
8A3<>

7D5<

7A5<

7C5<

7B5<
7B4<
7C4<

7C7<

7B7<

7C5<

8B4<>

7D5<

7B5<

7B5<

7A5<
7A5<
7B5<

7A3<

7A5<

7C5<

7A4<
7A4<

7C7<

7B5<

7C7<

7B5<

7C7<
7B7<

7C7<

8B5<>
8B4<>
8B8<>
8B5<>

8C4<>

8B7<>

8B7<>

8B8<>

8C5<>

8C4<>

8B8<>

8B7<>

8B7<>

8B8<>

8B8<>

8B7<>

8B8<>

8B7<>

8C8<>

8C7<>

8B8<>

8C7<>

8B7<>

8C8<>

8B8<>
8C8<>
8C8<>
8C7<>
8C8<>

8C7<>

8C7<>

7A7<
7A7<

7A7<

7A7<

7B7<

8B5<>

8B7<

8B5<>

7A7<

8B5<>

7A7<

7B7<

7B7<

7B7<

8B4<>

7A7<

4D3<

4D7<

(2 OF 3)

D0

D60
D61
D62
D63

DP7

DP0
DP1
DP2
DP3
DP4
DP5
DP6

D59

D56
D57
D58

D55

D54

D53

D52

D50
D51

D49

D46

D45

D47
D48

D44

D43

D42

D41

D40

D39

D38

D37

D36

D35

D34

D33

D30
D31
D32

D29

D26

D25

D24

D23

D27
D28

D22

D21

D20

D19

D18

D17

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D1
D2
D3

(3 OF 3)

NC_B14

NC_B13

NC_E12

NC_B18

NC_N19

NC_K17

NC_N18

NC_N12

NC_A6

NC_C13

NC_G11

NC_A14

NC_F12

NC_A13

NC_A18

NC_C14

NC_A15

NC_B16

NC_E13

NC_F13

NC_F14

NC_G12

NC_A17

NC_C15

NC_G14

NC_H14

NC_E14

NC_G13

NC_C16

NC_C17

NC_B17

NC_B15

NC_E15

NC_D14

NC_A19

NC_B19

NC_A16

NC_C18

NC_G15

NC_D15

NC_C19

NC_K16

NC_J17

NC_K18

NC_L18

NC_L19

NC_M18

NC_P16

NC_L16

NC_H15

NC_J16

NC_K19

NC_J15

NC_J19

NC_J18

NC_J14

NC_K15

NC_L14

NC_L17

NC_M15

NC_N17

NC_P19

NC_M16

NC_M19

NC_N16

NC_N13

NC_M17

NC_M14

NC_N14

NC_P18

NC_N15

NC_D19
NC_F15
NC_G19
NC_E16
NC_D17
NC_D16

NC_P15
NC_L15

NC_H19
NC_H18
NC_H17
NC_H16
NC_E19
NC_D18
NC_F16
NC_G16

NC_F19

NC_F17

NC_F18

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWING

MPC7450 - 2

BGA

APOLLO_MPC7445_360

800MHZ

APOLLO_MPC7445_360

BGA

800MHZ

5

69

051-6497

13

NO_TEST

NC_CPUCRUD<0>

NO_TEST

NC_CPUCRUD<1>

NO_TEST

NC_CPUCRUD<2>

NO_TEST

NC_CPUCRUD<3>

NC_CPUCRUD<7>

NO_TEST

NO_TEST

NC_CPUCRUD<15>

NO_TEST

NC_CPUCRUD<16>

NO_TEST

NC_CPUCRUD<18>

NC_CPUCRUD<20>

NO_TEST
NO_TEST

NC_CPUCRUD<21>

NO_TEST

NC_CPUCRUD<22>

NO_TEST

NC_CPUCRUD<23>

NO_TEST

NC_CPUCRUD<25>

NO_TEST

NC_CPUCRUD<26>

NO_TEST

NC_CPUCRUD<27>

NO_TEST

NC_CPUCRUD<28>

NO_TEST

NC_CPUCRUD<29>

NO_TEST

NC_CPUCRUD<31>

NO_TEST

NC_CPUCRUD<32>

NO_TEST

NC_CPUCRUD<33>

NO_TEST

NC_CPUCRUD<37>

NO_TEST

NC_CPUCRUD<38>

NO_TEST

NC_CPUCRUD<40>

NO_TEST

NC_CPUCRUD<41>

NO_TEST

NC_CPUCRUD<42>

NO_TEST

NC_CPUCRUD<44>

NO_TEST

NC_CPUCRUD<45>

NO_TEST

NC_CPUCRUD<46>

NO_TEST

NC_CPUCRUD<47>

NO_TEST

NC_CPUCRUD<48>

NO_TEST

NC_CPUCRUD<49>
NC_CPUCRUD<50>

NO_TEST
NO_TEST

NC_CPUCRUD<51>

NO_TEST

NC_CPUCRUD<52>

NO_TEST

NC_CPUCRUD<53>

NO_TEST

NC_CPUCRUD<55>

NO_TEST

NC_CPUCRUD<56>

NO_TEST

NC_CPUCRUD<58>

NC_CPUCRUD<60>

NO_TEST
NO_TEST

NC_CPUCRUD<61>

NO_TEST

NC_CPUCRUD<62>

NO_TEST

NC_CPUCRUD<63>
NC_CPUCRUD<64>

NO_TEST
NO_TEST

NC_CPUCRUD<65>

NO_TEST

NC_CPUCRUD<66>

NO_TEST

NC_CPUCRUD<67>
NC_CPUCRUD<68>

NO_TEST
NO_TEST

NC_CPUCRUD<69>

NO_TEST

NC_CPUCRUD<70>
NC_CPUCRUD<71>

NO_TEST

NO_TEST

NC_CPUCRUD<74>

NO_TEST

NC_CPUCRUD<75>
NC_CPUCRUD<76>

NO_TEST
NO_TEST

NC_CPUCRUD<77>

NO_TEST

NC_CPUCRUD<78>
NC_CPUCRUD<79>

NO_TEST
NO_TEST

NC_CPUCRUD<80>

NC_CPUCRUD<81>

NO_TEST

NO_TEST

NC_CPUCRUD<85>
NC_CPUCRUD<86>

NO_TEST

NO_TEST

NC_CPUDP<0>

NO_TEST

NC_CPUDP<1>

NO_TEST

NC_CPUDP<2>

NO_TEST

NC_CPUDP<3>

NO_TEST

NC_CPUDP<4>

NO_TEST

NC_CPUDP<5>

NO_TEST

NC_CPUDP<6>

NO_TEST

NC_CPUDP<7>

CPU_DATA<63>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<55>

CPU_DATA<53>
CPU_DATA<54>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<48>

CPU_DATA<46>
CPU_DATA<47>

CPU_DATA<45>

CPU_DATA<44>

CPU_DATA<43>

CPU_DATA<41>
CPU_DATA<42>

CPU_DATA<40>

CPU_DATA<38>
CPU_DATA<39>

CPU_DATA<36>
CPU_DATA<37>

CPU_DATA<35>

CPU_DATA<33>
CPU_DATA<34>

CPU_DATA<32>

CPU_DATA<31>

CPU_DATA<30>

CPU_DATA<29>

CPU_DATA<28>

CPU_DATA<27>

CPU_DATA<26>

CPU_DATA<25>

CPU_DATA<24>

CPU_DATA<23>

CPU_DATA<22>

CPU_DATA<21>

CPU_DATA<20>

CPU_DATA<19>

CPU_DATA<18>

CPU_DATA<17>

CPU_DATA<16>

CPU_DATA<15>

CPU_DATA<14>

CPU_DATA<13>

CPU_DATA<12>

CPU_DATA<11>

CPU_DATA<10>

CPU_DATA<9>

CPU_DATA<7>
CPU_DATA<8>

CPU_DATA<5>
CPU_DATA<6>

CPU_DATA<4>

CPU_DATA<3>

CPU_DATA<2>

CPU_DATA<1>

CPU_DATA<0>

NO_TEST

NC_CPUCRUD<36>

NO_TEST

NC_CPUCRUD<34>

NO_TEST

NC_CPUCRUD<30>

NO_TEST

NC_CPUCRUD<24>

NO_TEST

NC_CPUCRUD<9>

NO_TEST

NC_CPUCRUD<8>

NO_TEST

NC_CPUCRUD<17>

NC_CPUCRUD<10>

NO_TEST

NO_TEST

NC_CPUCRUD<6>

NC_CPUCRUD<14>

NO_TEST

NO_TEST

NC_CPUCRUD<12>

NO_TEST

NC_CPUCRUD<5>

NO_TEST

NC_CPUCRUD<11>

NO_TEST

NC_CPUCRUD<4>

NO_TEST

NC_CPUCRUD<13>

NC_CPUCRUD<19>

NO_TEST

NO_TEST

NC_CPUCRUD<35>

NO_TEST

NC_CPUCRUD<39>

NO_TEST

NC_CPUCRUD<43>

NO_TEST

NC_CPUCRUD<54>

NO_TEST

NC_CPUCRUD<57>

NC_CPUCRUD<59>

NO_TEST

NC_CPUCRUD<72>

NO_TEST

NC_CPUCRUD<73>

NO_TEST

NC_CPUCRUD<82>

NO_TEST

NC_CPUCRUD<84>

NO_TEST

NC_CPUCRUD<87>

NO_TEST

NC_CPUCRUD<89>

NO_TEST

NC_CPUCRUD<88>

NO_TEST

NO_TEST

NC_CPUCRUD<83>

<XR_PAGE_TITLE>

U34

R15
W15

T13
P13
U14
W14
R12
T12
W12
V12
N11
N10

T14

R11
U11
W11
T11
R10

N9
P10
U10

R9
W10

V16

U9

V9

W5

U6

T5

U5

W7

R6

P7

V6

W16

P17
R19
V18
R18
V19
T19
U19
W19
U18
W17

T15

W18
T16
T18
T17

W3
V17

U4

U8

U7

R7

U15

P6

R8

W8

T8

P14
V13
W13

T3

W4

T4

W9

M6

V3

N8

W6

U34

A13

A14

A15

A16

A17

A18

A19

A6

B13
B14

B15

B16

B17

B18

B19

C13

C14

C15

C16

C17

C18

C19

D14

D15

D16

D17

D18

D19

E12

E13

E14

E15

E16

E19

F12

F13

F14

F15

F16

F17

F18

F19

G11

G12

G13

G14

G15

G16

G19

H14

H15

H16

H17

H18

H19

J14

J15

J16

J17

J18
J19

K15

K16

K17

K18

K19

L14

L15

L16

L17

L18

L19

M14

M15

M16

M17

M18

M19

N12

N13

N14

N15

N16

N17

N18

N19

P15

P16

P18

P19

LAST_MODIFIED=Wed Sep 17 12:15:41 2003

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>
56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>
56D3>

56D3>

56D3>

56D3>

56D3>
56D3>

56D3>

9C5<

9C5<

9C5<

9D5<

9D5<

9D5<

9D5<

56D3>

9C8<

9C8<
9C8<

9C8<

9D8<

9D8<

9D8<

9D8<

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9C1<>
9B1<>

9C1<>

56D3>
56D3>

9C1<>

56D3>

9C1<>

9C1<>
9C1<>

9C1<>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>
56D3>

56D3>
56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>
9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

8C4<>

8C7<

8C7<>

8C8<>

8C4<

8C4<>
8C5<>

8D7<>

9C1<>
9C1<>

9A7<

9C1<>

9B7<

9B7<
9B7<

9B7<

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9C1<>

9D1<>

9D1<>

9D1<>

9D1<>

9D1<>

9D1<>

9D1<>

9D1<>
9D1<>

9D1<>
9D1<>

9D1<>

9D1<>

9D1<>

9D1<>

9D1<>

8D5<>

8D4<>

8D4<>

8D8<>

8D8<>

8D4<>

8D5<>

8D8<>

8C5<>

8C7<>
8D7<>

8C5<>

8C8<>

8C8<>

8C4<>

8C5<>

6C4<
6C4<

6C4<

6C4<

6C4<

6C4<
6C4<

6C4<

8D5<>
8D5<>

8D4<>
8D5<>

8D7<>

8D8<>
8D8<>

8D7<>

8D7<>

8C5<>

8C8<>

8D8<>

8C7<>

8C5<>

8D7<>

8D4<>

8C8<>

8C7<>

8C8<>

8C4<>

8C4<>

8C4<>

8C7<>

8C4<>

8C5<>

8C8<>

8C7<>

8C5<>

8C5<>

8C7<>

8C4<>

8C8<>
8C5<>

8C8<>
8C4<>

8C7<>

8C5<>

8C8<>

8C7<>

8C4<>

DRAWING

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

BOMOPTIONS FOR UPPER-SET OF RESISTORS

12.0X

(STUFF FOR 133 AND 167)

(STUFF FOR 133 AND 167)

000: 166.4 MHZ

010: 133.12 MHZ
011: 99.84 MHZ
100: 83.20 MHZ

INTREPID BOOT STRAPS

BITS 40 - 47

(SUPPORTED CPU & BUS SPEEDS)

CPU FREQUENCY CONFIGURATION

PCI0 SOURCE CLOCK

0: PLL4

1: PLL5 (NO SPREAD)

0: PLL4

1: PLL5 (NO SPREAD)

PCI1 SOURCE CLOCK

1: ACTIVE

0: INACTIVE

INTERNALSPREADEN

001: 149.76 MHZ

PLL4MODESEL_NXT[2:0]

SPARE

SPARE

CPU BUS RATIO BITS

CPU_PLL_CFG

133MHZ

(AT BUS FREQUENCY)

CORE FREQUENCY

167MHZ

MULTIPLIER

1 1001 19

1 0001 11
1 1101 1D

1 1100 1C

1 0101 15

1 1011 1B

E 0123 HEX

1 0111 17

0 0101 05

0 1101 0D

0 1001 09

0 1100 0C

1 1010 1A

0 0001 01

0 0010 02

0 1011 0B

1000
1067

933

867

1200

733
800

1333

667

(MHZ)

1333

1250

833
917
1000

1667

1083

1500

1167

1467
1600

2000

1733
1867

2133

2000

1833

2167
2333
2500
2667

(BUS-TO-CORE)

6.5X

6.0X

5.5X

5.0X

8.0X

10.0X

9.0X

7.5X

7.0X

15.0X

13.0X

14.0X

11.0X

16.0X

ARE AUTOMATICALLY SELECTED

WHEN THE ENGINEER SELECTS THE APPROPRIATE CPU AND

BUS SPEED BOM OPTION, THE APPROPRIATE RESISTORS ARE

THE CONFIGURATION RESISTORS BELOW ARE SELF CONFIGURING

CPU SPEED & BUS RATIO SUPPORT

667@133&833@167&733@133&917@167&800@133&1000@167&1067@133&1333@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&1867@133&2333@167&2133@133&2667@167

10K

402

1/16W
MF

1%

SPECIAL CONFIG

1K

MF

1/16W
402

SPECIAL CONFIG

1%

667@133&833@167&733@133&917@167&800@133&1000@167&867@133&1083@167&933@133&1167@167&1000@133&1250@167&1067@133&1333@167

10K

1/16W

MF

402

1%

NOSTUFF

10K

402

MF

1/16W

1%

NOSTUFF

4.7K

5%
MF

402

1/16W

10K

MF

402

1/16W

1%

NOSTUFF

10K

1%

402

1/16W

MF

667@133&733@133&800@133&867@133&933@133&1000@133&1067@133&1200@133&1333@133&1467@133&1600@133&1733@133&1867@133&2000@133&2133@133

10K

402

MF

1/16W

1%

NOSTUFF

4.7K

1/16W

5%
MF

402

10K

1/16W

MF

402

1%

NOSTUFF

4.7K

402

MF

1/16W

5%

833@167&917@167&1000@167&1083@167&1167@167&1250@167&1333@167&1500@167&1667@167&1833@167&2000@167&2167@167&2333@167&2500@167&2667@167

867@133&1083@167&933@133&1167@167&1000@133&1250@167&1200@133&1500@167&1733@133&2167@167&2000@133&2500@167

1K

402

1/16W
MF

SPECIAL CONFIG

1%

10K

NOSTUFF

1%
MF

1/16W

402

10K

NOSTUFF

1%

1/16W

MF

402

4.7K

402

MF

5%

1/16W

4.7K

5%

1/16W

MF

402

4.7K

402

MF

1/16W

5%

4.7K

402

MF

1/16W

5%

4.7K

MF

5%

402

1/16W

800@133&1000@167&867@133&1083@167&1067@133&1333@167&1200@133&1500@167&1733@133&2167@167&1867@133&2333@167&2133@133&2667@167

MF

10K

SPECIAL CONFIG

1%
1/16W

402

10K

SPECIAL CONFIG

1%

402

1/16W
MF

667@133&833@167&933@133&1167@167&1200@133&1500@167&1333@133&1667@167&1600@133&2000@167

667@133&833@167&733@133&917@167&933@133&1167@167&1000@133&1250@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&2000@133&2500@167

1K

402

1/16W
MF

SPECIAL CONFIG

1%

733@133&917@167&800@133&1000@167&867@133&1083@167&1000@133&1250@167&1067@133&1333@167&1467@133&1833@167&1733@133&2167@167&1867@133&2333@167&2000@133&2500@167&2133@133&2667@167

1K

MF

1/16W
402

SPECIAL CONFIG

1%

10K

402

1/16W
MF

1%

667@133&833@167&733@133&917@167&800@133&1000@167&867@133&1083@167&1000@133&1250@167&1200@133&1500@167&1467@133&1833@167&1600@133&2000@167&1733@133&2167@167&2000@133&2500@167&2133@133&2667@167

SPECIAL CONFIG

1K

933@133&1167@167&1067@133&1333@167&1333@133&1667@167&1867@133&2333@167

402

1/16W
MF

SPECIAL CONFIG

1%

10K

MF

1/16W
402

1%

SPECIAL CONFIG

1200@133&1500@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&1733@133&2167@167&1867@133&2333@167&2000@133&2500@167&2133@133&2667@167

13

051-6497

69

6

IC,APOLLO6,SICOH,1.0GHZ,1.5V+30/-130MV,28W,85C

1

1000@167CRITICALU34337S2799

1

IC,APOLLO6,SICOH,1.25GHZ,1.57V+70/-70MV,35W,85C

1250@167CRITICALU34337S2801

CPU_PLL_CFGEXT

CPU_PLL_CFG<1>

CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>

CPU_DATA<46>

CPU_DATA<41>

CPU_DATA<45>

CPU_DATA<47>

+MAXBUS_SLEEP

CPU_DATA<40>

+MAXBUS_SLEEP

CPU_PLL_CFG<3>
CPU_PLL_CFG<2>

CPU_PLL_CFG<0>

CPU_PLL_STOP

<XR_PAGE_TITLE>

R379

1

2

R381

1

2

R378

1

2

R376

1

2

R380

1

2

R377

1

2

R374

1

2

R375

1

2

R382

1

2

R383

1

2

R867

1

2

R875

1

2

R356

1

2

R877

1

2

R866

1

2

R874

1

2

R365

1

2

R889

1

2

R357

1

2

R878

1

2

R879

1

2

R364

1

2

R367

1

2

R368

1

2

R887

1

2

R363

1

2

LAST_MODIFIED=Wed Sep 17 12:15:42 2003

59C8>

59C8>

52C6>

52C6>

46D4<

46D4<

45D2<>

45D2<>

44D2<

44D2<

44D1<

44D1<

44B7<

44B7<

9D8<

9D8<

9B7<

9B7<

8D4<

8D4<

8D1<

8D1<

8A3<>

8A3<>

7C7<

7C7<

7C5<

7C5<

7C3<

7C3<

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

7B3<

56D3>

7B3<

9B1<>

9B1<>

9B1<>

9B1<>

9C1<>

9B1<>

9B1<>

7A3<

9C1<>

7A3<

8A8<>

8A8<>

8C5<>
8C4<
8C8<>

8C4<>

8C4<>

8C7<>

8C7<

6C5<

8D7<>

6D6<

8A8<>

8A8<>

8A8<>

4C3<

4D3<

5B4<>
5B4<>
5B4<>

5B4<>

5B4<>

5B4<>

5B4<>

4D5<

5B4<>

4D5<

4C3<

4D3<

4D3<

44B8<

DRAWING

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DO NOT USE UNLESS FIX INVERTER BUFFER

BUS MODE

OVDD 2.5V BUS MODE

INV_HRESET 1.5V BUS MODE

0V 1.8V BUS MODE

!hr L | 0 1 | MB+ | 01 | yes unavail
!hr hr | 0 1 | MB+ | 00 | yes unavail

---------+---------+-----+------+------

L H | 1 0 | Max | 00 | yes unavail

<- DEFAULT

L hr | 1 1 | ??? | 00 | yes unavail

H hr | 0 1 | MB+ | 00 | norm unavail

H L | 0 1 | MB+ | 01 | norm unavail

hr hr | 1 1 | ??? | 00 | norm unavail

hr L | 1 1 | ??? | 01 | norm unavail

!hr H | 0 0 | 60x | 00 | yes unavail

!hr !hr | 0 0 | 60x | 01 | yes unavail

L L | 1 1 | ??? | 01 | yes unavail
L !hr | 1 0 | Max | 01 | yes unavail

---------+---------+-----+------+------

BMODE | MSSCR0 | Sys | Vger | Addr
<0> <1> | <16:17> | Bus | ID | Drve
=========+=========+=====+======+======

hr !hr | 1 0 | Max | 01 | norm

H H | 0 0 | 60x | 00 | norm

H !hr | 0 0 | 60x | 01 | norm

---------+---------+-----+------+------

HR H | 1 0 | MAX | 00 | NORM

MAXBUS PULL-UPS

MPC7450 PULL-UPS

CPU_HRESET_H

CPU_L3_VSEL LOW

SIGNAL

CPU_BUS_VSEL

CPU_EMODE0_L

CPU_HRESET_L

CPU_HRESET_L

CPU_HRESET_H

TIED

HIGH

LOW

CPU_HRESET_L or L3_OVDD

1.5V INTERFACE

1.8V INTERFACE

MAX BUS MODE

2.5V INTERFACE

60X BUS MODE

APPLICATION

2.5V INTERFACE

1.5V INTERFACE

1.8V INTERFACE

CPU CONFIG OPTIONS

10K

1/16W

MF

402

1%

1%

1/16W

MF

402

10K

1%

1/16W

MF

402

10K

1%

402

MF

1/16W

10K

1/16W

NOSTUFF

1K

402

MF

1%

402

MF

1K

1/16W

1%

1%

1/16W

MF

402

10K

402

MF

1/16W

1K

1%

5%

SM1

1/16W

10K

5%

1/16W

10K

SM1

1%

402

MF

1/16W

10K

SM1

1/16W

5%

10K

1%

1/16W

MF

402

10K

10K

402

MF

1/16W

1%

10K

1/16W

MF

402

1%

10K

MF

1/16W

402

1%

10K

1/16W

MF

402

1%

10K

402

MF

1/16W

1%

10K

1/16W

MF

402

1%

10K

402

MF

1/16W

1%

10K

1/16W

MF

402

1%

402

MF

1/16W

5%

200

10K

1/16W

MF

402

1%

10K

1/16W

MF

402

1%

10K

402

MF

1/16W

1%

10K

402

MF

1/16W

1%

10K

1/16W

SM1

5%

10K

SM1

5%

1/16W

10K

1/16W

MF

402

1%

10K

5%

1/16W

SM1

10K

1/16W

MF

402

1%

10K

SM1

1/16W

5%

10K

1/16W

MF

402

1%

10K

402

MF

1/16W

1%

5%

1/16W

MF

402

NOSTUFF

10K

402

MF

1/16W

10K

1%

402

MF

1/16W

5%

NOSTUFF

0

402

MF

1/16W

5%

NOSTUFF

10K

MF

1/16W

5%

402

NOSTUFF

0

1/16W

MF

402

5%

CPUBUS_60X

1K

SM1

10K

5%

1/16W

402

MF

1/16W

1K

1%

5%

1/16W

MF

402

NOSTUFF

0

402

MF

1/16W

5%

200

5%
MF

NOSTUFF

0

402

1/16W

5%

1/16W

MF

402

NOSTUFF

200

MF

1/16W

5%

402

NOSTUFF

0

402

MF

1/16W

5%

200

402

MF

1/16W

5%

CPUBUS_MAX

200

5%

1/16W

MF

402

NOSTUFF

200

10K

402

MF

1/16W

1%

402

MF

1/16W

5%

470

1/16W

MF

402

10K

1%

1%

1/16W

MF

402

10K

13

051-6497

69

7

CPU_EMODE1_L

CPU_CHKSTP_IN_L

JTAG_CPU_TMS

JTAG_CPU_TDI

CPU_SMI_L

CPU_PULLUP

CPU_SRESET_L

MPIC_CPU_INT_L

CPU_HRESET_L

CPU_CHKSTP_OUT_L

CPU_MCP_L

CPU_LSSD_MODE

CPU_SHD1_L

CPU_SHD0_L

CPU_TBEN

+MAXBUS_SLEEP

VGER_INV_HRESET

+MAXBUS_SLEEP

CPU_HRESET_L

+MAXBUS_SLEEP

VGER_INV_HRESET

CPU_HRESET_L

+MAXBUS_SLEEP

VGER_INV_HRESET

CPU_HRESET_L

+MAXBUS_SLEEP

+MAXBUS_SLEEP

VGER_INV_HRESET

CPU_EMODE0_L

CPU_L1TSTCLK

CPU_L2TSTCLK

CPU_BUS_VSEL

+MAXBUS_SLEEP

CPU_TS_L

CPU_TA_L

CPU_BR_L

CPU_ARTRY_L

CPU_DRDY_L

CPU_HIT_L

CPU_TEA_L

CPU_AACK_L

CPU_DBG_L

CPU_BG_L

CPU_INT_GBL_L

CPU_TBST_L

CPU_WT_L

CPU_TT<0>

CPU_CI_L

CPU_TT<1>

CPU_TT<2>

CPU_TT<3>

CPU_TT<4>

CPU_QREQ_L

JTAG_CPU_TRST_L

JTAG_CPU_TCK

CPU_EDTI

CPU_PULLDOWN

CPU_PMONIN_L

<XR_PAGE_TITLE>

R848

1 2

R925

1 2

R924

1 2

RP79

4 5

R858

1 2

R859

1 2

R856

1 2

R860

1 2

R857

1 2

R910

1 2

R911

1 2

R921

1 2

R882

1 2

R922

1 2

R909

1 2

RP79

2 7

RP79

3 6

R912

1 2

RP79

1 8

R923

1 2

R347

1 2

R348

1 2

R841

1 2

R346

1 2

R851

1 2

R840

1 2

R845

1 2

R849

1 2

R847

1 2

R846

1 2

R842

1 2

R349

1 2

RP78

2 7

RP78

1 8

R844

1 2

RP78

3 6

R843

1 2

RP78

4 5

R350

1 2

R913

1 2

R918

1 2

R919

1 2

R907

1 2

R916

1 2

R904

1 2

R903

1 2

R915

1 2

R914

1 2

R926

1 2

R920

1 2

R906

1 2

R917

1 2

R905

1 2

R902

1 2

LAST_MODIFIED=Wed Sep 17 12:15:43 2003

59C8>

59C8>

59C8>

59C8>

59C8>

52C6>

52C6>

59C8>

52C6>

52C6>

59C8>

52C6>

46D4<

46D4<

52C6>

46D4<

46D4<

52C6>

46D4<

45D2<>

45D2<>

46D4<

45D2<>

45D2<>

46D4<

45D2<>

44D2<

44D2<

45D2<>

44D2<

44D2<

45D2<>

44D2<

44D1<

44D1<

44D2<

44D1<

44D1<

44D2<

44D1<

44B7<

44B7<

44D1<

44B7<

44B7<

44D1<

44B7<

9D8<

9D8<

44B7<

9D8<

9D8<

44B7<

9D8<

9B7<

9B7<

9D8<

9B7<

9B7<

9D8<

9B7<

8D4<

8D4<

9B7<

8D4<

8D4<

9B7<

8D4<

8D1<

8D1<

8D4<

8D1<

8D1<

8D4<

8D1<

8A3<>

8A3<>

8D1<

8A3<>

8A3<>

8D1<

8A3<>

7C7<

7C7<

59C8>

8A3<>

59C8>

7C7<

7C7<

8A3<>

59C8>

7C7<

7C5<

59C8>

7C5<

44D2<

7C7<

44D2<

7C5<

7C5<

7C5<

44D2<

7C3<

7C3<

44D2<

7C3<

44C2<

7C5<

44C2<

7C3<

7C3<

7C3<

44C2<

7B3<

7B3<

44C2<

7B3<

8A3<>

7C3<

8A3<>

7B3<

7B3<

7B3<

8A3<>

59C8>

7A3<

7A3<

8A3<>

7A3<

44D1>

7B3<

7A3<

44D1>

7B3<

7A3<

7A3<

7A3<

56D3>

56C3>

56D3>

56C3>

56C3>

56C3>

56C3>

56C3>

56C3>

56D3>

56D3>

56C3>

56D3>

56C3>

56D3>

56D3>

56D3>

56D3>

56C3>

59C8>

59C8>

59C6>

28B5>

7B3<

8D5<>

6D6<

44D1>

6D6<

7B3<

6D6<

7C3<

7A5<

6D6<

7C3<

7A5<

6D6<

6D6<

44D1>

6D6<

9D3<>

9A1<>

9D3<

9B3<>

9B1<

9B3<

9A1<>

9B3<>

9B1<>

9D3<>

56C3>

9B3<>

9B3<>

9B3<>

9C3<>

9B3<>

9B3<>

9B3<>

9B3<>

9B3<

59C8>

59C8>

59C8>

8A3<>

8A3<>

44C4<>

8A3<>

8D7<>

7A3<

8A3<>

9A3<>

6C5<

7C3<

6C5<

7A5<

6C5<

7B3<

7A3<

6C5<

7B3<

7A3<

6C5<

6C5<

7B3<

6C5<

8B7<>

8C4<>

8B4<>

8B8<>

8B5<>

8B8<>

8B5<>

8B5<>

8B8<>

8B4<>

9C3<>

8B4<>

8B5<>

8B4<>

8C5<>

8B5<>

8B4<>

8B5<>

8B4<>

8B7<>

8A3<>

8A3<>

4D7<>

4B3<

4B3<

4C3<

4C3<

4B3<

4A3<

4B3<

4B3<

4B3<

4B3>

4B3<

4C3<

4A7<>

4A7<>

4C3<

4D5<

7B3<

4D5<

4B3<

4D5<

7A3<

4B3<

4D5<

7A3<

4B3<

4D5<

4D5<

7A3<

4B3<

4C3<

4C3<

4D3<

4D5<

4D7<>

4C3<

4D7>

4A7<>

4C2<

4A7>

4C3<

4A7<

4C3<

4D7<

4B8<

4B7>

4B7>

4B7<>

4A7>

4B7<>

4B7<>

4B7<>

4B7<>

4C3>

4C3<

4C3<

4C3<

4A3<

4B3<

E0_0

E0_1

E0_2

E0_3

E0_4

E0_5

E0_6

E0_7

E1_0

E1_1

E1_2

E1_3

E1_4

E1_5

E1_6

E1_7

Q2

EPROBE

SYM_VER5

E2_0

E2_1

E2_2

E2_3

E2_4

E2_5

E2_6

E2_7

E3_0

E3_1

E3_2

E3_3

E3_4

E3_5

E3_6

E3_7

Q3

GND

GND

GND
GND

GND

GND

GND

GND
GND

GND

SYM_VER3

CPROBE

CLK3
C3_7
C3_6
C3_5
C3_4
C3_3
C3_2
C3_1
C3_0
C2_7
C2_6
C2_5
C2_4
C2_3
C2_2
C2_1
C2_0

Q1
C1_7
C1_6
C1_5
C1_4
C1_3
C1_2
C1_1
C1_0
C0_7
C0_6
C0_5
C0_4
C0_3
C0_2
C0_1
C0_0

A3_6

A3_7

CLK0

GND

A3_1

A3_2

A3_3

A3_4

A3_5

A3_0
A2_7
A2_6
A2_5
A2_4
A2_3
A2_2

GND

A2_0

GND

GND
CLK1
A1_7
A1_6
A1_5
A1_4
A1_3
A1_2
A1_1
A1_0
A0_7
A0_6
A0_5
A0_4
A0_3

A0_1
A0_0

GND

APROBE

SYM_VER2

A0_2

A2_1

SYM_VER1

GND

GND

GND

GND
Q0
D3_7
D3_6
D3_5
D3_4
D3_3
D3_2
D3_1
D3_0
D2_7
D2_6
D2_5
D2_4
D2_3
D2_2
D2_1
D2_0

CLK2
D1_7
D1_6
D1_5
D1_4
D1_3
D1_2
D1_1
D1_0
D0_7
D0_6
D0_5
D0_4
D0_3
D0_2
D0_1
D0_0

DPROBE

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

DRAWING

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PULLDOWN ON TRST* STRONGER TO OVERCOME POSSIBLE LEAKAGE

CPU CORE DECOUPLING

MAXBUS LOGIC ANALYZER SUPPORT

TO 1K OR LOGIC ANALYZER MAY AFFECT STRAP VALUES

NOTE: INTREPID MAXBUS CONFIG STRAPS MUST DROP

(519-0698)

CLOSE TO INTREPID

PLACE BOTH RESISTORS

INTREPID CLOCK OUTPUT

(518S0104)

(511S0018)

(518S0105)

LA CONS & ESP

FMAX DEBUG CONNECTOR

CPU CORE DECOUPLING

1%

1K

402

MF

1/16W

10K

MF

402

1/16W

1% SM-1

NOSTUFF

CERM

10%

402

6.3V

1UF

SEE_TABLE

10%
CERM

402

1UF

SEE_TABLE

6.3V

10%
CERM

402

6.3V

1UF

SEE_TABLE

6.3V

10%
CERM

402

1UF

SEE_TABLE

10%

402

CERM

6.3V

1UF

SEE_TABLE

6.3V

10%

402

CERM

1UF

SEE_TABLE

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

CERM
402

SEE_TABLE

10%

6.3V

1UF

CERM
402

6.3V

10%

1UF

SEE_TABLE

10%

6.3V
CERM
402

1UF

SEE_TABLE

10%
CERM

402

6.3V

1UF

SEE_TABLE

1UF

10%
CERM

402

6.3V

SEE_TABLE

402

6.3V

1UF

10%

CERM

SEE_TABLE

6.3V

1UF

402

CERM

10%

SEE_TABLE

1UF

6.3V
402

CERM

10%

SEE_TABLE

1UF

6.3V
CERM

10%

SEE_TABLE

402

CERM

10%

1UF

SEE_TABLE

402

6.3V

SEE_TABLE

1UF

6.3V

10%
CERM

402

SEE_TABLE

CERM

402

10%

6.3V

1UF

805

N20P80%

10UF

10V
Y5V

805

10UF

10V

N20P80%
Y5V

805

10UF

10V

N20P80%
Y5V

805

Y5V

10V

N20P80%

10UF

2.2UF

16V

N20P80%

805

CERM

2.2UF

16V

N20P80%

805

CERM

N20P80%
10V
Y5V

10UF

805

N20P80%
10V
Y5V

10UF

805

Y5V

N20P80%
10V

10UF

805

N20P80%
10V
Y5V

10UF

805

10UF

10V
Y5V

N20P80%

805

10UF

10V
Y5V

N20P80%

805

10UF

10V
Y5V

N20P80%

805

10UF

10V
Y5V

N20P80%

805

CON_38SM_MICTOR

OMIT

SM

CON_38SM_MICTOR

OMIT

SM

CON_38SM_MICTOR

CPU_ADDR<19>

OMIT

SM

CPU_QREQ_L

F-ST-SM

NOSTUFF

U.FL-R_SMT

47

NOSTUFF

402

MF

1/16W

5%

NOSTUFF

402

MF

1/16W

5%

0

5%

1/16W

MF

402

NOSTUFF

22

+3V_MAIN

NOSTUFF

SM12B-SRSS-TB

F-RT-SM

10K

1/16W
MF
402

1%

0.1UF

402

20%
10V
CERM

0.1UF

CERM

10V

20%

402

0.1UF

402

20%
10V
CERM

0.1UF

CERM

10V

20%

402

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

10V

0.1UF

402

20%
CERM

0.1UF

402

20%
10V
CERM

10V

0.1UF

CERM

20%

402

10V

0.1UF

402

20%
CERM

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

CON_37SM_MICTOR

OMIT

F-ST-SM

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402402

CERM

0.1UF

10V

20%20%

0.1UF

CERM

10V
402

N20P80%
10V
Y5V

10UF

805

N20P80%
10V
Y5V

10UF

805

N20P80%
10V
Y5V

10UF

805

10UF

N20P80%
10V
Y5V
805

10V
Y5V
805

N20P80%

10UF

10V
Y5V
805

N20P80%

10UF

10V
Y5V
805

N20P80%

10UF

10V
Y5V
805

10UF

N20P80%

10V
Y5V
805

N20P80%

10UF

10V
Y5V
805

N20P80%

10UF

SEE_TABLE

6.3V
CERM
402

1UF

10%

CERM
402

SEE_TABLE

1UF

10%

6.3V

CERM
402

SEE_TABLE

1UF

10%

6.3V

CAP,CER,.22UF,20%,6.3V,0402,X5R

1GHZ_DECOUP

132S0013

C1022,C1027,C1011,C1008,C1010,C1025,C1009,C1002,C1023,C1017,C1031,C997,C996,C1012,C1024,C1001,C1028,C1018,C1096,C1097,C1098

21

1_25GHZ_DECOUP

CAP,CER,1UF,10%,6.3V,0402,X5R

C1022,C1027,C1011,C1008,C1010,C1025,C1009,C1002,C1023,C1017,C1031,C997,C996,C1012,C1024,C1001,C1028,C1018,C1096,C1097,C1098

138S0541 21

8 69

051-6497

13

CPU_VCORE_SLEEP

+MAXBUS_SLEEP

JTAG_ASIC_TRST_L

JTAG_ASIC_TCK

JTAG_ASIC_TMS

JTAG_ASIC_TDO

CPU_BR_L

CPU_DATA<54>

CPU_ADDR<31>
CPU_ADDR<28>
CPU_ADDR<22>
CPU_ADDR<21>
CPU_ADDR<24>
CPU_TS_L
CPU_ADDR<15>

CPU_ADDR<14>
CPU_DTI<0>
CPU_ADDR<7>
CPU_ADDR<12>

CPU_TSIZ<2>
CPU_ADDR<5>

CPU_ADDR<17>
CPU_ADDR<20>
CPU_ADDR<16>

CPU_ARTRY_L
CPU_ADDR<10>
CPU_ADDR<13>

CPU_HIT_L
CPU_ADDR<3>
CPU_ADDR<9>

CPU_ADDR<26>
CPU_ADDR<29>
CPU_ADDR<27>
CPU_ADDR<18>
CPU_ADDR<23>
CPU_ADDR<25>

CPU_DBG_L

MPIC_CPU_INT_L
CPU_DATA<35>

CPU_DATA<32>
CPU_DATA<40>
CPU_DATA<31>
CPU_DATA<25>
CPU_DATA<27>
CPU_DATA<22>
CPU_DATA<17>
CPU_DATA<10>
CPU_DATA<13>
CPU_DATA<1>
CPU_DATA<4>
CPU_DATA<53>
CPU_DATA<47>
CPU_DATA<45>

CPU_DATA<23>
CPU_DATA<21>
CPU_DATA<14>
CPU_DATA<50>

CPU_DATA<2>
CPU_DATA<5>

CPU_DATA<51>

CPU_DATA<7>

CPU_DATA<44>

SYSCLK_LA

CPU_DATA<34>
CPU_DATA<56>
CPU_DATA<59>
CPU_DATA<33>
CPU_DATA<60>
CPU_DATA<28>
CPU_DATA<29>

CPU_TT<1>

CPU_TEA_L

CPU_ADDR<4>

CPU_TSIZ<1>

CPU_CI_L

CPU_ADDR<8>

CPU_AACK_L

CPU_GBL_L

CPU_DRDY_L

CPU_TT<3>

CPU_WT_L

CPU_TSIZ<0>

CPU_ADDR<1>

CPU_DTI<2>

CPU_QACK_L

CPU_BG_L

CPU_TT<2>

CPU_DTI<1>

CPU_TBST_L

CPU_ADDR<0>

CPU_TT<4>

CPU_ADDR<2>

CPU_TT<0>

CPU_TA_L

CPU_ADDR<6>

CPU_ADDR<11>

CPU_DATA<58>
CPU_DATA<36>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<24>
CPU_DATA<41>
CPU_DATA<9>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<16>
CPU_DATA<18>
CPU_DATA<49>
CPU_DATA<6>
CPU_DATA<0>
CPU_DATA<43>
CPU_DATA<46>

CPU_DATA<8>
CPU_DATA<15>
CPU_DATA<55>
CPU_DATA<11>

CPU_DATA<3>
CPU_DATA<12>
CPU_DATA<52>
CPU_DATA<42>
CPU_DATA<48>

CPU_CHKSTP_OUT_L

CPU_DATA<37>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<63>
CPU_DATA<57>
CPU_DATA<30>
CPU_DATA<26>

INT_CLOCK_OUT

SYSCLK_LA

INT_ANALYZER_CLK

JTAG_CPU_TRST_L

JTAG_CPU_TCK

JTAG_CPU_TDO

JTAG_CPU_TDI

JTAG_CPU_TMS

NC_JTAG10

NO_TEST

CPU_SRESET_L

CPU_HRESET_L

CPU_CHKSTP_OUT_L

NO_TEST

NC_JTAG7

+MAXBUS_SLEEP

NC_FMAX8

NO_TEST

NC_FMAX7

NO_TEST

NC_RESET_BUTTON_L

NO_TEST

+MAXBUS_SLEEP

CPU_ADDR<30>

CPU_PLL_CFGEXT

CPU_PLL_CFG<1>
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>

CPU_PLL_CFG<0>

PWR_SWITCH*
PMU_RST*

CPU_VCORE_SLEEP

NO_TEST

NC_LCENABLE

NO_TEST

NC_TESTMODE

JTAG_ASIC_TDI

<XR_PAGE_TITLE>

R940

1

2

R937

1

2

J22

1

10
11 12
13 14
15 16
17 18
19

2

20

3 4
5 6
7 8
9

C1022

1

2

C1027

1

2

C1011

1

2

C1008

1

2

C1010

1

2

C1025

1

2

C972

1

2

C981

1

2

C980

1

2

C973

1

2

C993

1

2

C990

1

2

C994

1

2

C1007

1

2

C961

1

2

C1020

1

2

C1021

1

2

C967

1

2

C997

1

2

C1031

1

2

C1017

1

2

C1023

1

2

C1002

1

2

C1009

1

2

C1018

1

2

C1028

1

2

C1001

1

2

C1024

1

2

C1012

1

2

C996

1

2

C350

1

2

C958

1

2

C983

1

2

C992

1

2

C969

1

2

C353

1

2

C1033

1

2

C1037

1

2

C976

1

2

C1040

1

2

C1042

1

2

C1032

1

2

C364

1

2

C1016

1

2

J30

39404142434445

1

10
11
12
13
14
15
16
17
18
19

2

20

21

22

23

24

25

26

27

28

29

3

30

31

32

33

34

35

36

37

38

4
5
6
7
8
9

J20

39404142434445

1

10
11
12
13
14
15
16
17
18
19

2

20

21

22

23

24

25

26

27

28

29

3

30

31

32

33

34

35

36

37

38

4
5
6
7
8
9

J31

39404142434445

1

10
11
12
13
14
15
16
17
18
19

2

20

21

22

23

24

25

26

27

28

29

3

30

31

32

33

34

35

36

37

38

4
5
6
7
8
9

J27

3

2

1

R308

1

2

R314

1 2

R313

2 1

J32

14

13

1

10
11
12

2
3
4
5
6
7
8
9

R939

1

2

C999

1

2

C991

1

2

C1013

1

2

C995

1

2

C982

1

2

C998

1

2

C1043

1

2

C987

1

2

C1026

1

2

C1014

1

2

C988

1

2

C1041

1

2

C974

1

2

C1003

1

2

C977

1

2

J19

39 40 41 42 43 44 45

10
11
12
13
14
15
16
17
18
19

2

20

21

22

23

24

25

26

27

28

29

3

30

31

32

33

34

35

36

37

38

4
5
6
7
8
9

C1910

1

2

C1904

1

2

C1903

1

2

C1902

1

2

C1901

1

2

C1911

1

2

C1912

1

2

C1913

1

2

C1914

1

2

C598

1

2

C1054

1

2

C1055

1

2

C1056

1

2

C1057

1

2

C1058

1

2

C1097

1

2

C1096

1

2

C1098

1

2

LAST_MODIFIED=Wed Sep 17 12:15:45 2003

59C8>

59C8>

59C8>

52C6>

52C6>

52C6>

46D4<

46D4<

46D4<

45D2<>

45D2<>

45D2<>

44D2<

44D2<

44D2<

44D1<

44D1<

44D1<

44B7<

44B7<

44B7<

9D8<

9D8<

9D8<

9B7<

9B7<

9B7<

8D1<

8D4<

8D4<

8A3<>

8D1<

8A3<>

7C7<

7C7<

7C7<

59D8>

7C5<

59C8>

7C5<

7C5<

59D8>

59B6>

7C3<

44D2<

7C3<

7C3<

59B6>

52C6>

7B3<

59A8>

44C2<

7B3<

7B3<

52C6>

56C3>

45D2<>

7A3<

59D8>

56D3>

56D3>

56D3>

56C3>

56C3>

56C3>

56D3>

56D3>
56D3>

56D3>
56D3>
56D3>

56D3>

56D3>

56D3>

56D3>

56D3>
56D3>
56D3>

56D3>

56C3>

56C3>

56C3>

56C3>

56D3>

56C3>

56D3>

56D3>

56D3>

56D3>

56D3>

56C3>

56D3>
56D3>
56D3>
56D3>

56D3>

56D3>

56D3>
56D3>

56D3>

56D3>
56D3>
56D3>

59C8>

56D3>
56D3>

56B3>

7B3<

59C8>

7A3<

7A3<

59D6>

45D2<>

56D3>

9B3<

8B7<

6D6<

59D8>

35B4<>

9D3<

9C8<

56D3>
56D3>
56D3>
56D3>
56D3>

9D3<>

56D3>

56D3>

56C3>

56D3>

56D3>

56D3>

56D3>

56D3>
56D3>
56D3>

9B3<>
56D3>
56D3>

9B3<
56D3>
56D3>

56D3>
56D3>
56D3>
56D3>
56D3>
56D3>

9B1<>

28B5>

9C1<>

9C1<>
9C1<>

56D3>
56D3>
56D3>
56D3>
56D3>
56D3>

56D3>
56D3>
56D3>

9C8<

9B1<>
9B1<>

56D3>
56D3>
56D3>

9D8<
56D3>
56D3>
9D8<
56D3>
9B1<>

9C1<>

56D3>

9D5<
9C1<>

9D5<
56D3>
56D3>

9B3<>

9A1<>

56D3>

56D3>

9C3<>

56D3>

9B3<>

9B1<

9B3<>

9B3<>

56D3>

56D3>

56C3>

56C3>

9D3<>

9B3<>

56C3>

9B3<>

56D3>

9B3<>

56D3>

9B3<>

9A1<>

56D3>

56D3>

9D5<

9C1<>

9C5<
9C5<

56D3>
9C1<>
56D3>

56D3>

56D3>

56D3>

56D3>

9D8<
56D3>
56D3>
9B1<>
9B1<>

56D3>

56D3>

9C8<

56D3>

56D3>

56D3>

9C8<
9B1<>
9D8<

8A3<>

56D3>
56D3>
56D3>

9C5<

9D5<
56D3>
56D3>

54A7<

59C8>

59C8>

59C8>

59C8>

59C6>

7A5<

8D5<>

6D6<

6D6<

56D3>

59D6>

44B5<>

8C1<

59D8>

9C3<>

7D5<

4D7<

6C5<

59C8>

35C4<

35A2<

59D8>

7C7<

9B1<>

9C3<>
9C3<>
9C3<>
9C3<>
9C3<>

7C7<

9C3<>

9C3<>

9A1<>

9D3<>

9C3<>

9B3<>

9D3<>

9C3<>
9C3<>
9C3<>

7C7<
9C3<>
9C3<>

7C7<
9D3<>
9C3<>

9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>

7B7<

7A5<

9B7<

9B7<
6C4<
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9D1<>

9D1<>
9D1<>
9D1<>

9B1<>

6C4<

6C4<

9C1<>
9C1<>
9D1<>
9B1<>

9D1<>
9D1<>

9B1<>

9D1<>
6C4<

56B3>

9B7<
9B1<>
9B1<>

9B7<
9B1<>
9C1<>
9C1<>

7A7<

7B7<

9D3<>

9B3<>

7A7<

9D3<>

7B7<

56C3>

7B7<

7A7<

7A7<

9B3<>

9D3<>

9A1<>

9B3<>

7B7<

7A7<

9A1<>

7B7<

9D3<>

7A7<

9D3<>

7A7<

7C7<

9D3<>

9C3<>

9B1<>
9A7<
9B1<>
9B1<>
9C1<>
6C4<

9D1<>

9C1<>
9C1<>
9C1<>
9C1<>

9B1<>
9D1<>
9D1<>

6C4<

6C4<

9D1<>
9D1<>
9B1<>
9D1<>

9D1<>
9D1<>
9B1<>

6C4<
9B1<>

7B5<

9C1<>
9C1<>
9C1<>
9B1<>
9B1<>
9C1<>
9C1<>

56B3> 16C7<

7C5<

7D5<

59C8>

7A5<

7A5<

7A5<

7A3<

7B5<

6C5<

6C5<

9C3<>

6C6<

6C6<
6C6<
6C6<

6C6<

44C5<>

44A5<>

4D7<

34B7<

4C7<>

4C3>

4D3<

4D5<

34B7<

34B7<

34B7<

35B4<>

4D7>

5B4<>

4B7<>
4B7<>
4C7<>
4C7<>
4B7<>

4D7<>

4C7<>

4C7<>

4C3<

4C7<>

4C7<>

4B7>
4C7<>

4C7<>
4C7<>
4C7<>

4A7<>
4C7<>
4C7<>

4A7>
4C7<>
4C7<>

4B7<>
4B7<>
4B7<>
4C7<>
4C7<>
4B7<>

4C3<

4B3<

5C4<>

5C4<>
5B4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5D4<>

5C4<>
5D4<>
5D4<>

5B4<>

5B4<>

5B4<>

5C4<>
5C4<>
5C4<>
5B4<>

5D4<>
5D4<>

5B4<>

5D4<>

5B4<>

8A2<
5C4<>
5B4<>
5B4<>
5C4<>
5B4<>
5C4<>
5C4<>

4B7<>

4C3<

4C7<>

4B7>

4A7>

4C7<>

4A7<

4B8<>

4C2<

4B7<>

4B7>

4B7>

4C7<>

4C3<

4C3<

4D7<

4B7<>

4C3<

4B7>

4C7<>

4B7<>

4C7<>

4B7<>

4C3<

4C7<>

4C7<>

5B4<>
5C4<>
5B4<>
5B4<>
5C4<>
5B4<>

5D4<>

5C4<>
5C4<>
5C4<>
5C4<>

5B4<>
5D4<>
5D4<>

5B4<>

5B4<>

5D4<>
5C4<>
5B4<>
5C4<>

5D4<>
5C4<>
5B4<>
5B4<>
5B4<>

4B3>

5B4<>
5B4<>
5B4<>
5A4<>
5B4<>
5C4<>
5C4<>

56B3>

8D8<>

9B4<

4C3<

4C3<

4C3>

4C3<

4C3<

4B3<

4B3<

4B3>

4D5<

4D5<

4B7<>

4C3<

4D3<
4D3<
4C3<

4D3<

44B1<

29B3<>

4D3<

28C6<

(PLL6)

VSSA_7

(PLL6)

VDD15A_7

D_42

D_41

D_40

D_39

D_38

D_44

D_43

D_45
D_46
D_47
D_48

D_52

D_51

D_50

D_49

D_53

D_55

D_54

D_56
D_57
D_58

D_60

D_59

D_62

D_61

D_63

DBG

DRDY

DTI_0

TEA

TA

DTI_2

DTI_1

D_1

D_0

D_2

D_6

D_5

D_4

D_3

D_7

D_11

D_10

D_9

D_8

D_12

D_14

D_13

D_15
D_16
D_17

D_22

D_21

D_20

D_19

D_18

D_23
D_24
D_25
D_26
D_27

D_32

D_31

D_30

D_29

D_28

D_34

D_33

D_35
D_36
D_37

BR

(1 OF 9)

MAXBUS

INTERFACE

TS

BG

A_0
A_1
A_2
A_3
A_4
A_5

A_9

A_6
A_7
A_8

A_10

A_14

A_13

A_12

A_11

A_20

A_16
A_17
A_18
A_19

A_15

A_27

A_22

A_21

A_30

A_29

A_28

A_26

A_25

A_24

A_23

TT_2

TT_1

TT_0

A_31

TBST
TSIZ_0
TSIZ_1
TSIZ_2

CI
GBL

TT_4

AACK

QREQ

ARTRY

TT_3

WT

HIT

ANALYZER_CLK

SUSPENDACK

SUSPENDREQ

QACK

STOPCPUCLK

CPU_FB_OUT

CPU_FB_IN

CPU_CLK

TBEN

ACS_REF

DRAWING

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

INTREPID MAX

PROCESSOR BUS MODE

0: MAX BUS (G4)

1: 60X BUS (G3)

FIREWIRE PHY INTERFACE

0: LEGACY INTERFACE

1: B-MODE INTERFACE

INTREPID BOOT STRAPS

1: GPIOS

0: REQ/GNT

PCI1_REQ1_L / PCI1_GNT1_L

PCI1_REQ0_L / PCI1_GNT0_L

0: REQ/GNT

1: 0-1 IDE / 2-3 PCI1

1: GPIOs

0: REQ/GNT

1: GPIOs

ROM_Ovrly_Rng

0: 0 IDE / 1 PCI1

SPARE

SPARE

PCI1_REQ2_L / PCI1_GNT2_L

000: 200 OHM

100: 200 OHM

010: 100 OHM

110: 66.6 OHM

001: 50 OHM

101: 40 OHM

011: 33.3 OHM

111: 28.6 OHM

MAXBUS OUTPUT

IMPEDANCE

TI 1394B WORKAROUND

0: NORMAL 1394B

1: TI PHY WORKAROUND

0: PLL5

EN_PCI_ROM_P

SELPLL4EXTSRC

1: BOOTROM ON PCI1

1: EXTERNAL SOURCE

0: BOOTROM ON IDE/CARDSLOT

BITS 32 - 39

BUF_REF_CLK_OUTENABLE_H

0: INACTIVE

1: ACTIVE

SPARE

0: TDI INPUT (JTAG)

DDR_TPDMODEENABLE_H

1: TDI OUTPUT

1: ACTIVE

ANALYZERCLK_EN_H

0: INACTIVE

1: ACTIVE LOW

0: ACTIVE HIGH

DDR_TPDEN_POL

0: ACTIVE HIGH

EXTPLL_SDWN_POL

1: ACTIVE LOW

SHORTER THAN MAXBUS CLOCK

MAIN LOOP IS 3" (0.5 NS)

(0.5 NS)

ADDS 3"

PLACE ALL SERPENTINES ON INTERNAL LAYER

TO +2" (0.35 NS) IN 1" (0.17 NS) INCREMENTS

ALLOWS ADJUSTING FB CLOCK FROM -3" (0.5 NS)

(0.17 NS)

ADDS 1"ADDS 2"

(0.35 NS)

INTREPID V1.1 IS 133MHZ ONLY

(ON PAGE 12)

VOUT = MAXBUS RAIL (1.8V)

VIN = INTREPID VCORE (1.7V)

BITS 48 - 63

1K

402

MF

1/16W

1%

0.1UF

10V

20%

CERM

402

4.7

402

MF

1/16W

5%

5%

1/16W

MF

402

0

10K

402

1/16W

1%

NOSTUFF

MF

10K

402

1%

NOSTUFF

1/16W

MF

10K

402

MF

1/16W

1%

NOSTUFF

10K

1/16W

MF

402

1%

INT_V1

4.7K

5%
MF

402

1/16W

4.7K

1/16W

5%
MF

402

4.7K

5%
1/16W
MF
402

4.7K

1/16W

5%
MF

402

INT_V2

10K

402

MF

1/16W

1%

NOSTUFF

4.7K

402

MF

1/16W

5%

1%
1/16W
MF
402

10K

NOSTUFF

1%

402

1/16W

MF

10K

402

1%

10K

1/16W

NOSTUFF

MF

402

1/16W

5%
MF

4.7K

NOSTUFF

402

MF

1/16W

5%

4.7K

1/16W

5%

402

MF

4.7K

1%

NOSTUFF

402

MF

1/16W

10K

1/16W

1%

NOSTUFF

MF

402

10K

5%
1/16W
MF
402

4.7K

1/16W

402

MF

5%

4.7K

1%

402

MF

1/16W

10K

NOSTUFF

1%

10K

402

MF

1/16W

NOSTUFF

402

MF

1/16W

5%

4.7K

402

MF

1/16W

5%

4.7K

1%

NOSTUFF

402

MF

1/16W

10K

5%
1/16W
MF
402

4.7K

1%

NOSTUFF

1/16W
MF
402

10K

1%

402

NOSTUFF

1/16W

MF

10K

1%

NOSTUFF

1/16W
MF
402

10K

402

MF

1/16W

5%

4.7K

5%

1/16W

MF

402

4.7K

5%
MF

402

1/16W

4.7K

5%

1/16W

MF

402

4.7K

1/16W
402

5%
MF

4.7K

1%

1/16W

MF

402

10K

1%

NOSTUFF

10K

MF
402

1/16W

NOSTUFF

5%

1/16W

MF

402

4.7K

1/16W
402

MF

5%

4.7K

0

5%
1/16W
MF
402

NOSTUFF

0

402

MF

1/16W

5%

0

402

MF

1/16W

5%

0

402

MF

1/16W

5%

NOSTUFF

0

5%

1/16W

MF

402

NOSTUFF

0

402

MF

1/16W

5%

0

5%

1/16W

MF

402

NOSTUFF

0

402

MF

1/16W

5%

NOSTUFF

470

5%
1/16W
MF
402

0

402

MF

1/16W

5%

10

402

MF

1/16W

5%

INT_V1

SM

0.1UF

10V
402

CERM

20%

INTREPID

BGA

SEE_TABLE

9

051-6497

13

69

CPU_DATA<60>

CPU_DATA<59>

CPU_DATA<62>
CPU_DATA<63>

CPU_DATA<61>

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<55>

CPU_DATA<51>
CPU_DATA<52>

CPU_DATA<49>

CPU_DATA<48>

CPU_DATA<34>

CPU_DATA<33>

CPU_DATA<32>

CPU_DATA<35>
CPU_DATA<36>

CPU_FB_PLUS3

CPU_FB_PLUS2

INT_PLL6_GND

INT_PLL6_GND

NO_TEST

INTREPID_ACS_REF

INT_CPU_FB_IN

CPU_FB_MINUS3

CPU_FBI_PLUS1

INT_CPU_FB_OUT

CPU_FBO_PLUS1

+1_5V_INTREPID_PLL

INT_ANALYZER_CLK

CPU_TBEN

CPU_CLK_EN

INT_ANALYZER_CLKA

INT_SUSPEND_ACK_L

INT_SUSPEND_REQ_L

CPU_QACK_L

CPU_QREQ_L

CPU_ARTRY_L

CPU_HIT_L

CPU_AACK_L

CPU_WT_L

CPU_TT<3>
CPU_TT<4>

CPU_TT<2>

CPU_TT<0>
CPU_TT<1>

CPU_TSIZ<1>
CPU_TSIZ<2>

CPU_TSIZ<0>

CPU_TBST_L

CPU_INT_GBL_L

CPU_CI_L

CPU_ADDR<31>

CPU_ADDR<30>

CPU_ADDR<28>
CPU_ADDR<29>

CPU_ADDR<27>

CPU_ADDR<26>

CPU_ADDR<25>

CPU_ADDR<23>
CPU_ADDR<24>

CPU_ADDR<21>
CPU_ADDR<22>

CPU_ADDR<20>

CPU_ADDR<18>
CPU_ADDR<19>

CPU_ADDR<17>

CPU_ADDR<16>

CPU_ADDR<15>

CPU_ADDR<13>
CPU_ADDR<14>

CPU_ADDR<11>
CPU_ADDR<12>

CPU_ADDR<10>

CPU_ADDR<9>

CPU_ADDR<8>

CPU_ADDR<7>

CPU_ADDR<6>

CPU_ADDR<5>

CPU_ADDR<4>

CPU_ADDR<3>

CPU_ADDR<2>

CPU_ADDR<0>
CPU_ADDR<1>

CPU_TS_L

CPU_BG_L

CPU_BR_L

CPU_DATA<1>

CPU_DATA<0>

CPU_DATA<3>
CPU_DATA<4>

CPU_DATA<2>

CPU_DATA<5>
CPU_DATA<6>

CPU_DATA<8>
CPU_DATA<9>

CPU_DATA<7>

CPU_DATA<10>
CPU_DATA<11>

CPU_DATA<13>

CPU_DATA<12>

CPU_DATA<14>
CPU_DATA<15>
CPU_DATA<16>

CPU_DATA<18>

CPU_DATA<17>

CPU_DATA<19>

CPU_DATA<21>

CPU_DATA<20>

CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>

CPU_DATA<26>

CPU_DATA<25>

CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>

CPU_DATA<31>

CPU_DATA<30>

CPU_DATA<32>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>

CPU_DATA<42>

CPU_DATA<41>

CPU_DATA<43>

CPU_DATA<45>

CPU_DATA<44>

CPU_DATA<46>
CPU_DATA<47>

CPU_DATA<49>
CPU_DATA<50>

CPU_DATA<48>

CPU_DATA<51>
CPU_DATA<52>

CPU_DATA<54>

CPU_DATA<53>

CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<57>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<60>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<63>
CPU_DBG_L

CPU_DRDY_L

CPU_DTI<0>
CPU_DTI<1>
CPU_DTI<2>

CPU_TA_L
CPU_TEA_L

SYSCLK_CPU_UF

SYSCLK_CPU

+MAXBUS_SLEEP

CPU_DATA<54>

CPU_DATA<50>

CPU_DATA<53>

+1_5V_INTREPID_PLL7

+MAXBUS_SLEEP

<XR_PAGE_TITLE>

U25

B29

H13

G8

H23

D24
D25

J22
B25
H22
G22
D22
B24
B23
E22
J21
G21

A27

E21
A24
D21
A23
H20
B22
H21
A22
E20
B21

E24

D20
A21

G23
B26
A26
D23
A25
E23

E26

E29

G26

J15

J24
H16 A30

G28

K25
D29
B30

D10
G12

B10
J13
A10
D12
E13
G13
B11
D13
A11
G14

E11

H14
E14
B12
G15
B13
H15
D14
B14
A12
G16

H11

E15
J16
D15
A14
A13
D16
E16
G17
B15
H17

B9

A15
B16
E17
A16
J18
H18
D17
G18
A17
B17

B8

E18
B18
D18
A18
A19
H19
B19
J19
A20
D19

A9

E19
G19
B20
G20

A8
E12
D11

A29

B31

G27

A32

AH9

AM8

AK9

E27

A31

A28

E28

B27

G24
H24
D26
E25
G25
B28
D27
J25

H26

H25

D28

R712

1

2

C854

1

2

R720

1 2

R713

1 2

R862

1

2

R853

1

2

R852

1

2

R854

1

2

R861

1

2

R344

1

2

R345

1

2

R353

1

2

R833

1

2

R342

1

2

R832

1

2

R885

1

2

R865

1

2

R886

1

2

R343

1

2

R358

1

2

R892

1

2

R876

1

2

R893

1

2

R366

1

2

R868

1

2

R864

1

2

R355

1

2

R359

1

2

R890

1

2

R894

1

2

R340

1

2

R869

1

2

R339

1

2

R341

1

2

R870

1

2

R338

1

2

R351

1

2

R352

1

2

R855

1

2

R863

1

2

R354

1

2

R360

1

2

R757

1

2

R776

1

2

R777

1 2

R321

1 2

R319

1 2

R310

1 2

R772

1

2

R766

1

2

R752

1

2

R765

1 2

R764

1 2

XW47

1

2

C1101

1

2

LAST_MODIFIED=Wed Sep 17 12:15:46 2003

59C8>

59C8>

52C6>

52C6>

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46D4<

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45D2<>

44D2<

44D2<

44D1<

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44B7<

9B7<

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8D1<

8D1<

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7C7<

7C7<

7C5<

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7C3<

7C3<

59A8>

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56D3>

56D3>

56D3>
56D3>

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56D3>

56D3>

56D3>

56D3>
56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>
56D3>

52D3>

56B3>

56C3>

56C3>

56C3>

56C3>

56C3>

56D3>
56D3>

56D3>

56D3>
56D3>

56D3>

56C3>

56D3>

56D3>

56D3>

56D3>
56D3>
56D3>
56D3>
56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

56D3>

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56D3>

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56D3>

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56C3>

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56D3>

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9B1<>

9B1<>

9B1<>
9B1<>

9B1<>

9B1<>

9B1<>

9B1<>

9B1<>
9B1<>

9B1<>

9B1<>

9C1<>

9C1<>

9C1<>

9C1<>
9C1<>

30D5<

54A7<

56C3>

8B7<>

8B8<>

8B8<>

8B5<>

8B5<>

8B5<>
8B4<>

8B4<>

8B4<>
8B5<>

56D3>

56D3>

56D3>

8B4<>

56C3>

8C5<>

56D3>

56D3>

56D3>
56D3>

56D3>

56D3>

56D3>

56D3>
56D3>

56D3>
56D3>

56D3>

56D3>
56D3>

56D3>

56D3>

56D3>

56D3>
56D3>

56D3>
56D3>

56D3>

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56D3>

56D3>

56D3>

56D3>

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56D3>

56D3>
56D3>

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8B4<>

8B4<>

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56D3>
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9B7<
9B7<
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56D3>
9D5<

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9C5<

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8B8<>

8B5<>

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56C3>
56C3>

8C4<>

8B5<>

6D6<

9B1<>

9B1<>

9B1<>

6D6<

8D8<>

8D8<>

8D4<>
8D5<>

8D4<>

8D4<>

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8C5<>

8C8<>
8C5<>

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8D8<>

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8D7<>

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8D4<>

28D6<>

16C7<

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7D5<

7C7<

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7B7<

7A7<

7A7<
7A7<

7A7<

7A7<
7A7<

8B5<>

8B7<

8B5<>

7B7<

7B7<

7A7<

8C7<>

8C7<>

8C7<>
8C8<>

8C8<>

8C8<>

8B8<>

8C8<>
8B7<>

8C7<>
8C7<>

8B8<>

8C8<>
8B7<>

8B8<>

8B8<>

8B7<>

8B8<>
8B7<>

8C4<>
8B7<>

8B8<>

8B8<>

8C5<>

8B7<>

8C4<>

8B7<>

8B5<>

8B8<>

8B4<>

8B4<>
8B5<>

7C7<

7B7<

7C7<

8C7<>

8C4<>

8C5<>
8C7<>

8C8<>

8C8<>
8C4<>

8C5<>
8C4<>

8C8<>

8C7<>
8C5<>

8C7<>

8C5<>

8C8<>
8C5<>
8C4<>

8C4<>

8C7<>

8C4<>

8C8<>

8C4<>

8C7<>
8C8<>
8D4<>

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8C7<>
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8C8<>

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7B7<

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5A4<>

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4C7<>

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4D7>

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5D4<>

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5D4<>

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5D4<>

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5C4<>

5C4<>

5C4<>
5C4<>
5C4<>

5C4<>

5C4<>

5C4<>

5C4<>

5C4<>

5C4<>
5C4<>
5C4<>

5C4<>

5C4<>

5C4<>
5C4<>
5C4<>

5C4<>

5C4<>

5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5B4<>
5B4<>
5B4<>
5B4<>

5B4<>

5B4<>

5B4<>

5B4<>

5B4<>

5B4<>
5B4<>

5B4<>
5B4<>

5B4<>

5B4<>
5B4<>

5B4<>

5B4<>

5B4<>
5B4<>
5B4<>

5B4<>

5B4<>

5B4<>

5B4<>

5B4<>

5A4<>

4C3<

4C2<

4C3<
4C3<
4C3<

4C3<

4C3<

56C3>

4D2<

4D5<

5B4<>

5B4<>

5B4<>

52D3>

4D5<

POWER/GROUND

VSS

(8 OF 9)

VDD2.5

VSS

VDD1.8/CPUVIO

GROUND

POWER

(9 OF 9)

VDD1.5

AGP_IO_VDD

VDD3.3

AGP_IO_VSS

VSS

VSS

VDD3.3

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

DRAWING

RAIL TO TURN OFF IN SLEEP

INTREPID 1.1 SHOULD ALLOW MAXBUS

FOUR CORNERS

INTREPID EMI CLIP SUPPORT

CLIPS TO ATTACH INTREPID

HEATSINK TO GND AT THE

INTREPID VERSION SUPPORT

INTREPID POWER

SEE_TABLE

BGA

INTREPID

SEE_TABLE

BGA

INTREPID

+3V_MAIN

+2_5V_MAIN+1_8V_MAIN

SEE_TABLE

CLIP-SM

EMI-SPRING

SEE_TABLE

EMI-SPRING

CLIP-SM

SEE_TABLE

CLIP-SM

EMI-SPRING

CLIP-SM

EMI-SPRING

SEE_TABLE

INT_V1

IC,ASIC,INTREPID,V1.X

343S0198

1

U25

IC,ASIC,INTREPID,V2.1

343S0211

1

U25 INT_V2CRITICAL

870-1125

INTREPID EMI CLIP

4

SP1,SP2,SP3,SP4

?

6910

13

051-6497

+INTREPID_CORE_MAIN

+1_5V_AGP

<XR_PAGE_TITLE>

U25

C12

F15
F18
F21
F24
F27
M15
M16
M19
M22
M23

C15

N18
N21
N23
P16
P19

C18
C21
C24
C27
C30

C9

F12

AA25
AA29

AE34
AF28
AH30
AH34
AK34
AP35
C35
G31
G34
K31

AB25

K34
N28
N31
N34
N36
P25
P28
R25
R27
T25

AB27

T28
T29
T31
T34
U25
U28
V25
V29
W25
W31

AB31

W34
Y27
Y29
E33

AB34
AC25
AC27
AC28
AE31

M6

M9
N15
N25
P12
P17
P22
P29

P4
R14
R16
R18
R19
R21
R23
R24
R26
R29

R3
R31
R34

R6
T11
T14
T23
T24
T27
U10
U16

AN33
AN4
AP1
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP34
AP36
AP6
AP9
AR2
AR35
AT3
AT34
B2
B35
C1
C10
C13
C16
C19
C22
C25
C28
C3
C31
C34

C36

C7

D33

D4

F10

F13

F16

F19

F22

F25

F28

F3

F31

F34

F6G7J3

J31

J34

J6

L24
M14
M17
M18
M20
M21
M24
M28

M3
M31
M32
M34

U25

AD20

AE20

AL22

AL28

AL30

AN32

AP19

AP22

AP25

AP28

AP31

AR33

AE23

AR34

AF22

AH19

AH22

AH28

AJ21

AJ23

AL19

AB11

AB12

AB14

AB16

AB18

AB24

AB28

AB29

AC11

AC15A3AC16

AC18

AC20

AC22

AC26

AD12

AD23

AD25

A34

AA20

AA27

AA3

AA31

AA34

AA6

AA21
AA24

AD15
AD22

P15
P18
P20
P21
R17
R20
T13
U17

AB13

U18
U24
V16
V19
V20
V22
W16
W24
Y13
Y18

AB15
AB17
AB19
AC17
AC19
AC23
AD13

AA11

AA12

G6

AC14

AD21

AE15

AE17

AE3

AE6

AF25

AH3

AH6

AB3

AK6

AL10

AL13
AL16
AL3
AL7
AM4
AN5
AP10
AP13

AB6

AP16
K3

K6
N24

N3
N6
P13
P14
R22
T12

AC12

T18
T3
T6
U12
W12
W13
W3
W6
AP2

AP7

AC13

AR3
B3
C2
C6
D32
D5
B34
E4

F30F7F9

G3

AD28

AD3

AE22
AE28
AG21

U19

AG23

U22
U27
U29
V10
V12
V17
V18
V21
V24
V3

AG24

V31
V34
V6
W11
W14
W23
W26
Y11
Y12
Y14

AG3

Y16
Y19
Y23
Y24
Y25

AG30
AG34

AG6

AH20

AD31

AH21
AH23
AH27

AK3

AK7
AL12
AL15
AL18
AL21

AD34

AL27
AL31
AL34

AL6

AL9

AD6
AE14
AE16
AE18
AE19
AE21

SP3

1

SP1

1

SP2

1

SP4

1

LAST_MODIFIED=Wed Sep 17 12:15:48 2003

59C8>

52C3>

46B4<>

17D5< 17A4< 17A3<

59C8>

16D7<

47B2<>

16C2<

46B3<

16A8<

11D3<

11A6<

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWING

INTREPID CORE DECOUPLING

INTREPID AGP I/O DECOUPLING

21 Balls
4 X 10UF (0805)
24 X 0.1UF (0402)

INTREPID DDR DECOUPLING

44 Balls
51 X 0.1UF (0402)

4 X 10UF (0805)

4 X 10UF (0805)

INTREPID BYPASS

INTREPID MAXBUS DECOUPLING

36 X 0.1UF (0402)

24 Balls

INTREPID 3.3V DECOUPLING

57 Balls
66 X 0.1UF (0402)

4 X 10UF (0805)

29 X 0.1UF (0402)

4 X 10UF (0805)

30 Balls

<XR_PAGE_TITLE>

+INTREPID_CORE_MAIN

+1_5V_AGP

13

11

051-6497

69

+3V_MAIN

+2_5V_MAIN

+1_8V_MAIN

402

CERM

0.1UF

10V

20%

402

10V

20%
CERM

0.1UF

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

20%
10V
CERM

0.1UF

402

0.1UF

20%
10V
CERM

402

10V

20%

0.1UF

CERM

402

10V

20%

0.1UF

CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
CERM

10V

402

0.1UF

CERM

20%
10V

402

0.1UF

CERM

10V

20%

402

CERM

0.1UF

20%
10V

402

0.1UF

20%
10V
CERM

402

CERM

0.1UF

10V

20%

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
10V
CERM
402

CERM

10V

20%

0.1UF

402

0.1UF

20%
10V
CERM
402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

CERM

20%
10V

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

402

0.1UF

CERM

20%
10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
CERM

10V

CERM

0.1UF

20%
10V

402 402

0.1UF

CERM

10V

20%

402

CERM

0.1UF

20%
10V

402

0.1UF

20%
CERM

10V

402

CERM

0.1UF

20%
10V

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
CERM

10V

402

CERM

0.1UF

20%
10V

402

CERM

0.1UF

20%
10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

CERM

10V

20%

0.1UF

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

CERM

10V

20%

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

20%
10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

10UF

N20P80%

10V
Y5V
805

10V
Y5V
805

10UF

N20P80%

402

0.1UF

20%
CERM

10V

402

20%

0.1UF

CERM

10V

402

0.1UF

20%
10V
CERM

10UF

N20P80%

10V
Y5V
805

10UF

10V
Y5V
805

N20P80%

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
CERM

10V

0.1UF

CERM

10V

20%

402

402

0.1UF

CERM

10V

20%

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
CERM

10V

402

0.1UF

CERM

10V

20%

402

CERM

10V

20%

0.1UF

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
CERM

10V

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

20%
10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

CERM

20%
10V

402

0.1UF

CERM

20%
10V

402

0.1UF

CERM

20%
10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
10V
CERM

10UF

805

N20P80%

10V
Y5V

10UF

N20P80%

10V
Y5V
805

805

Y5V

10V

10UF

N20P80%

10V
Y5V
805

10UF

N20P80%

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
CERM

10V

402

CERM

10V

20%

0.1UF

402

0.1UF

CERM

10V

20%

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
CERM

10V

402

0.1UF

20%
CERM

10V

402

0.1UF

CERM

20%
10V

402

0.1UF

CERM

20%
10V

402

0.1UF

CERM

20%
10V

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

805

10V
Y5V

10UF

N20P80%

805

Y5V

10V

10UF

N20P80%

10UF

805

10V
Y5V

N20P80%

805

Y5V

10V

10UF

N20P80%

402

CERM

0.1UF

10V

20%

402

CERM

0.1UF

10V

20%

402

CERM

0.1UF

10V

20%

402

20%
10V

0.1UF

CERM

402

20%
10V

0.1UF

CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

20%
10V

0.1UF

CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

CERM

0.1UF

10V

20%

402

0.1UF

20%
10V
CERM

402

CERM

0.1UF

10V

20%

402

10V

20%
CERM

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

0.1UF

10V

20%

402

CERM

0.1UF

10V

20%

402

CERM

0.1UF

10V

20%

402

20%
10V

0.1UF

CERM

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
10V
CERM
402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

CERM

10V

20%

0.1UF

402

20%
10V
CERM

0.1UF

402

CERM

10V

20%

0.1UF

402

20%
10V
CERM

0.1UF

402

N20P80%

10UF

805

10V
Y5V

N20P80%

10UF

10V
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805

N20P80%

10UF

805

10V
Y5V

N20P80%

10UF

10V
Y5V
805

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

0.1UF

20%
10V

402

0.1UF

20%
10V
CERM
402

CERM

20%
10V

0.1UF

402

20%
10V
CERM

0.1UF

402

0.1UF

20%
10V
CERM
402

20%
10V
CERM

0.1UF

402

CERM

20%
10V

0.1UF

402

20%
10V
CERM

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

20%
10V
CERM

0.1UF

402

CERM

10V

20%

0.1UF

402

0.1UF

CERM

20%
10V

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
10V
CERM
402

CERM

10V

20%

0.1UF

402

0.1UF

20%
10V
CERM
402

CERM

0.1UF

20%
10V

402

20%
10V
CERM

0.1UF

402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

805

10V
Y5V

10UF

N20P80%

10UF

805

10V
Y5V

N20P80%

402

0.1UF

20%
10V
CERM

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
CERM

10V

402

0.1UF

CERM

10V

20%

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
CERM

10V

402

CERM

10V

20%

0.1UF

402

0.1UF

20%
10V
CERM

402

CERM

10V

20%

0.1UF

402

20%
CERM

10V

0.1UF

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
CERM

10V

402

0.1UF

CERM

10V

20%

402

0.1UF

20%
CERM

10V

805

Y5V

10V

10UF

N20P80%

10UF

805

Y5V

10V

N20P80%

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

402

0.1UF

20%
10V
CERM

C832

1

2

C890

1

2

C901

1

2

C291

1

2

C289

1

2

C900

1

2

C823

1

2

C888

1

2

C845

1

2

C891

1

2

C871

1

2

C844

1

2

C834

1

2

C824

1

2

C884

1

2

C872

1

2

C896

1

2

C870

1

2

C887

1

2

C885

1

2

C846

1

2

C290

1

2

C288

1

2

C794

1

2

C857

1

2

C827

1

2

C668

1

2

C904

1

2

C792

1

2

C839

1

2

C815

1

2

C687

1

2

C817

1

2

C836

1

2

C793

1

2

C753

1

2

C767

1

2

C750

1

2

C725

1

2

C878

1

2

C688

1

2

C722

1

2

C877

1

2

C735

1

2

C700

1

2

C837

1

2

C856

1

2

C271

1

2

C641

1

2

C277

1

2

C240

1

2

C818

1

2

C755

1

2

C791

1

2

C803

1

2

C723

1

2

C752

1

2

C838

1

2

C826

1

2

C825

1

2

C751

1

2

C801

1

2

C699

1

2

C694

1

2

C667

1

2

C696

1

2

C665

1

2

C649

1

2

C683

1

2

C709

1

2

C686

1

2

C685

1

2

C710

1

2

C674

1

2

C684

1

2

C693

1

2

C647

1

2

C648

1

2

C650

1

2

C661

1

2

C697

1

2

C733

1

2

C662

1

2

C232

1

2

C628

1

2

C231

1

2

C638

1

2

C766

1

2

C810

1

2

C798

1

2

C747

1

2

C780

1

2

C811

1

2

C800

1

2

C763

1

2

C748

1

2

C719

1

2

C797

1

2

C808

1

2

C734

1

2

C765

C788

1

2

C749

1

2

C789

1

2

C833

1

2

C721

1

2

C831

1

2

C730

1

2

C787

1

2

C764

1

2

C746

1

2

C727

1

2

C841

1

2

C702

1

2

C292

1

2

C691

1

2

C806

1

2

C829

1

2

C717

1

2

C775

1

2

C830

1

2

C821

1

2

C812

1

2

C689

1

2

C744

1

2

C656

1

2

C776

1

2

C868

1

2

C643

1

2

C807

1

2

C645

1

2

C644

1

2

C805

1

2

C863

1

2

C894

1

2

C883

1

2

C680

1

2

C707

1

2

C866

1

2

C867

1

2

C809

1

2

C761

1

2

C728

1

2

C743

C716

1

2

C676

1

2

C881

1

2

C729

1

2

C745

1

2

C264

1

2

C655

1

2

C796

1

2

C720

1

2

C850

1

2

C637

1

2

C892

1

2

C835

1

2

C679

1

2

C673

1

2

C903

1

2

C879

1

2

C682

1

2

C678

1

2

C681

1

2

C646

1

2

C852

1

2

C658

1

2

C690

1

2

C659

1

2

C875

1

2

C851

1

2

C708

1

2

C657

1

2

C799

1

2

C779

1

2

C731

1

2

C790

1

2

C732

1

2

C777

1

2

C762

1

2

C893

1

2

C822

1

2

C828

1

2

C774

1

2

C712

1

2

C718

C882

1

2

C865

1

2

C660

1

2

C677

1

2

C880

1

2

C855

1

2

C698

1

2

C876

1

2

C736

1

2

C714

1

2

C813

1

2

C802

1

2

C781

1

2

C724

1

2

C754

1

2

C814

1

2

C816

1

2

C768

1

2

C782

1

2

C664

1

2

C695

1

2

C651

1

2

C666

1

2

C899

1

2

C874

1

2

C886

1

2

C898

1

2

C873

1

2

C869

1

2

C895

1

2

C842

1

2

C889

1

2

C897

1

2

C902

1

2

C843

1

2

C279

1

2

C280

1

2

C281

1

2

C849

1

2

C278

1

2

C663

1

2

C711

1

2

LAST_MODIFIED=Wed Sep 17 12:15:51 2003

59C8>

52C3>

46B4<>

17D5< 17A4< 17A3<

59C8>

16D7<

47B2<>

16C2<

46B3<

16A8<

10D6<

10D6<

(2 OF 9)

DDR_VREF_1

DDR_VREF_0

DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDR_DATA_16
DDR_DATA_17
DDR_DATA_18
DDR_DATA_19
DDR_DATA_20
DDR_DATA_21

DDR_DATA_25
DDR_DATA_26
DDR_DATA_27
DDR_DATA_28
DDR_DATA_29
DDR_DATA_30

DDR_DATA_33
DDR_DATA_34
DDR_DATA_35
DDR_DATA_36
DDR_DATA_37
DDR_DATA_38
DDR_DATA_39
DDR_DATA_40
DDR_DATA_41
DDR_DATA_42
DDR_DATA_43
DDR_DATA_44
DDR_DATA_45
DDR_DATA_46
DDR_DATA_47
DDR_DATA_48
DDR_DATA_49
DDR_DATA_50
DDR_DATA_51
DDR_DATA_52
DDR_DATA_53
DDR_DATA_54
DDR_DATA_55
DDR_DATA_56
DDR_DATA_57
DDR_DATA_58
DDR_DATA_59
DDR_DATA_60
DDR_DATA_61
DDR_DATA_62
DDR_DATA_63

DDR_DATA_22
DDR_DATA_23
DDR_DATA_24

DDR_DATA_31
DDR_DATA_32

DDR_BA_0
DDR_BA_1

DDRCS_3

DDRCS_2

DDRCS_1

DDRCS_0

DDR_DQS_7

DDR_DQS_6

DDR_DQS_5

DDR_DQS_4

DDR_DQS_3

DDR_DQS_2

DDR_DQS_1

DDR_DQS_0

DDR_DM_7

DDR_DM_6

DDR_DM_5

DDR_DM_4

DDR_DM_3

DDR_DM_2

DDR_DM_1

DDR_DM_0

DDRRAS
DDRCAS

DDRWE
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3

DDR_MCLK_0_P
DDR_MCLK_0_N
DDR_MCLK_1_P
DDR_MCLK_1_N
DDR_MCLK_2_P
DDR_MCLK_2_N
DDR_MCLK_3_P
DDR_MCLK_3_N
DDR_MCLK_4_P
DDR_MCLK_4_N
DDR_MCLK_5_P
DDR_MCLK_5_N

DDR_REF

DDR_SELHI_0
DDR_SELHI_1
DDR_SELLO_0
DDR_SELLO_1

MEMORY

DDR

INTERFACE

DDR_A_10
DDR_A_11
DDR_A_12

DDR_A_9

DDR_A_8

DDR_A_7

DDR_A_6

DDR_A_5

DDR_A_4

DDR_A_3

DDR_A_2

DDR_A_1

DDR_A_0

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWING

SERIES RESISTORS FOR CONTROL SIGNALS

SYSCLK_DDRCLK_A0_UF

LOCATE THESE RESISTORS NEAR INTREPID

SYSCLK_DDRCLK_B2_L_UF

SYSCLK_DDRCLK_B2_UF

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_B0_UF

SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_A1_UF

SYSCLK_DDRCLK_A1_L_UF

DDR MUX CONNECTIONS

0-ohm resistors to allow

INTREPID DDR CNTRL

(ON PAGE 12)

’1’S ARE SAME POLARITY (ACTIVE HI)

SYSCLK_DDRCLK_A2_UF

’0’S ARE SAME POLARITY (ACTIVE LO)

SEL = 1; HOST=A PORT, B PORT = 100 OHMGND

SYSCLK_DDRCLK_A2_L_UF

SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_B0_L_UF

SEL = 0; HOST=B PORT, A PORT = 100 OHMGND

rewiring if necessary

MEM_MUXSEL_H<1>

MEM_MUXSEL_L<1>

LOCATE 2 DECOUPLING CAPS
DIRECTLY AT DDR_VREF_X BALLS
(U25-Y22 & T22)

22

5%

1/16W

SM1

5%

1/16W

SM1

22

SM1

5%

1/16W

22

SM1

1/16W

5%

22

SM1

1/16W

22

5%

SM1

5%

22

1/16W

22

SM1

1/16W

5%

22

SM1

5%

1/16W

22

SM1

1/16W

5%

22

SM1

5%

1/16W

22

SM1

1/16W

5%

22

SM1

5%

1/16W

22

SM1

1/16W

5%

22

SM1

5%

1/16W

SM1

5%

1/16W

22

SM1

1/16W

5%

22

SM1

5%

1/16W

22

SM1

1/16W

5%

22

22

1/16W

5%

SM1

22

5%

SM1

1/16W

1/16W

5%

SM1

22

5%

SM1

1/16W

22

22

1/16W

5%

SM1

22

5%

SM1

MEM_CKE<3>

1/16W

22

1/16W

5%

SM1

22

5%

1/16W

SM1

MEM_CKE<1>

402

MF

1/16W

5%

22

5%

1/16W

MF

402

22

1/16W

5%

SM1

22

1/16W

5%

SM1

22

1%

1/16W

402

MF

NOSTUFF

10K

NOSTUFF

10K

1/16W
MF
402

1%

NOSTUFF

402

MF

1/16W

1%

10K

NOSTUFF

402

MF

1/16W

1%

10K

1%

1K

402

MF

1/16W

INTREPID

BGA

SEE_TABLE

402

MF

1/16W

5%

47

MF

1/16W

5%

47

402

SM1

5%

1/16W

22

+2_5V_MAIN

1/16W

SM1

22

5%

22

SM1

5%

1/16W

5%

SM1

1/16W

22

22

SM1

1/16W

5%

SM1

22

5%

1/16W

1/16W

SM1

5%

22

1/16W

22

SM1

5%

051-6497

13

12 69

RAM_CS_L<3>

RAM_ADDR<11>

MEM_ADDR<11>

RAM_WE_LMEM_WE_L

RAM_BA<0>

MEM_BA<0>

RAM_BA<1>MEM_BA<1>

RAM_ADDR<9>

MEM_ADDR<9>

RAM_ADDR<0>

MEM_ADDR<0>

RAM_ADDR<1>MEM_ADDR<1>

RAM_ADDR<2>

MEM_ADDR<2>

MEM_CAS_L RAM_CAS_L

MEM_RAS_L RAM_RAS_L

RAM_CS_L<0>

MEM_CKE<0>

MEM_CS_L<0>

MEM_CKE<2>

RAM_CS_L<2>MEM_CS_L<2>

MEM_CS_L<3>
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A2_UF

SYSCLK_DDRCLK_B2_UF

NO_TEST

SYSCLK_DDRCLK_B2_L_UF

RAM_ADDR<10>MEM_ADDR<10>

RAM_ADDR<7>MEM_ADDR<7>

RAM_ADDR<3>MEM_ADDR<3>

RAM_ADDR<4>MEM_ADDR<4>

SYSCLK_DDRCLK_B1_UF

NC_SYSCLK_DDRCLK_A2_L

NO_TEST

NO_TEST

NC_SYSCLK_DDRCLK_A2

SYSCLK_DDRCLK_A1_L

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_A0

MEM_MUXSEL_H<1>

MUX_SEL_L

INT_MEM_REF

MEM_DATA<54>

MEM_DATA<31>

MEM_DATA<29>

MEM_DATA<25>

MEM_DATA<24>

MEM_DATA<15>

MEM_DATA<63>

MEM_DATA<62>

MEM_DATA<61>

MEM_DATA<60>

MEM_DATA<59>

MEM_DATA<58>

MEM_DATA<57>

MEM_DATA<56>

MEM_DATA<55>

MEM_DATA<53>

MEM_DATA<52>

MEM_DATA<51>

MEM_DATA<50>

MEM_DATA<49>

MEM_DATA<48>

MEM_DATA<47>

MEM_DATA<46>

MEM_DATA<45>

MEM_DATA<44>

MEM_DATA<43>

MEM_DATA<42>

MEM_DATA<41>

MEM_DATA<40>

MEM_DATA<39>

MEM_DATA<38>

MEM_DATA<37>

MEM_DATA<36>

MEM_DATA<35>

MEM_DATA<34>

MEM_DATA<33>

MEM_DATA<32>

MEM_DATA<30>

MEM_DATA<28>

MEM_DATA<27>

MEM_DATA<26>

MEM_DATA<23>

MEM_DATA<22>

MEM_DATA<21>

MEM_DATA<20>

MEM_DATA<19>

MEM_DATA<18>

MEM_DATA<17>

MEM_DATA<16>

MEM_DATA<14>

MEM_DATA<13>

MEM_DATA<12>

MEM_DATA<11>

MEM_DATA<9>

MEM_DATA<8>

MEM_DATA<7>

MEM_DATA<6>

MEM_DATA<5>

MEM_DATA<4>

MEM_DATA<2>

MEM_DATA<0>

MEM_ADDR<0>

MEM_ADDR<12>
MEM_BA<0>
MEM_BA<1>

MEM_CS_L<0>
MEM_CS_L<1>
MEM_CS_L<2>

MEM_DQS<1>

MEM_ADDR<1>
MEM_ADDR<2>
MEM_ADDR<3>
MEM_ADDR<4>
MEM_ADDR<5>
MEM_ADDR<6>
MEM_ADDR<7>
MEM_ADDR<8>
MEM_ADDR<9>
MEM_ADDR<10>
MEM_ADDR<11>

MEM_DQS<2>
MEM_DQS<3>
MEM_DQS<4>
MEM_DQS<5>
MEM_DQS<6>
MEM_DQS<7>

MEM_DQM<2>

MEM_DQM<0>
MEM_DQM<1>

MEM_DQM<3>
MEM_DQM<4>
MEM_DQM<5>
MEM_DQM<6>
MEM_DQM<7>

MEM_RAS_L
MEM_CAS_L
MEM_WE_L
MEM_CKE<0>
MEM_CKE<1>
MEM_CKE<2>
MEM_CKE<3>

MEM_DATA<10>

SYSCLK_DDRCLK_B0_UF

SYSCLK_DDRCLK_B0

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B2

SYSCLK_DDRCLK_B2_L

MEM_ADDR<12>

RAM_ADDR<12>

MEM_ADDR<8>

RAM_ADDR<8>

MEM_ADDR<6>

RAM_ADDR<6>

MEM_ADDR<5>

RAM_ADDR<5>

MEM_DQS<0>

SYSCLK_DDRCLK_A2_L_UF

SYSCLK_DDRCLK_B0_L

SYSCLK_DDRCLK_B0_L_UF

SYSCLK_DDRCLK_B1_L

SYSCLK_DDRCLK_B1_L_UF

MEM_DATA<1>

MEM_CS_L<3>

RAM_CKE<1>

RAM_CKE<3>

RAM_CKE<0>

NC_MEM_MUXSEL_H<0>

NC_MEM_MUXSEL_L<0>

MEM_DATA<3>

MEM_MUXSEL_L<1>

MUX_SEL_H

INT_MEM_VREF

MIN_LINE_WIDTH=25

RAM_CKE<2>

MEM_CS_L<1> RAM_CS_L<1>

402

CERM
402

0.1UF

20%
10V

0.1UF

20%
10V
CERM

+2_5V_MAIN

MIN_LINE_WIDTH=20

DDR_VREF

100

100

1/16W
MF
402

1%

1/16W
MF
402

1%

<XR_PAGE_TITLE>

R625

1

2

U25

H32

AN35
AM35
AM36
AL36

AN34
AN36
AL35
AL33

L29

K30

H35
G35

G33
H33
D35

G36
F36
F35
E35
E36
G32
D36
H36

L30
M29

AK32
AK33

AH35
AG36
AH36
AH32
AG32
AG31
AE32
AF35
AF36
AE36

AK31

AE35
AE33
AD36
AD35
AA36
AA35
AA33
AB36
AB35
AC36

AK35

AA32
AB33

V36
U33
U32
V35
T30
U36
U35
T36

AK36

P33
R30
P35
P36
R36
R35
R33
R32
N35
M36

AJ32

L35
M35
M33
L36
N33
M30
J32
J33
J35
K32

AJ35

K33
J36
K36
K35

AJ36
AG33
AG35

AJ33
AH33
AD33
AC35
T35
T33
N32
L33

AJ31
AH31
AD32
AB30
V30
P32
N29
L32

Y33

Y32

Y36

Y35

W30

Y30

W33

W32

V32

V33

W36

W35

AA22

AB32
AE29
N30
T32

Y22
T22

R288

1 2

R261

1 2

RP102

1 8

RP102

2 7

RP102

3 6

RP102

4 5

RP105

1 8

RP105

2 7

RP105

3 6

RP109

4 5

RP109

1 8

RP109

2 7

RP68

1 8

RP68

2 7

RP68

3 6

RP68

4 5

RP62

1 8

RP62

2 7

RP62

3 6

RP62

4 5

RP116

1 8

RP116

2 7

RP116

3 6

RP116

4 5

RP71

1 8

RP71

2 7

RP71

3 6

RP71

4 5

RP51

1 8

RP51

2 7

RP51

3 6

RP51

4 5

RP52

1 8

RP52

2 7

RP52

3 6

RP52

4 5

R286

1 2

R697

1 2

C14

1

2

C30

1

2

R82

1

2

R93

1

2

RP109

3 6

RP105

4 5

R137

1

2

R214

1

2

R172

1

2

R235

1

2

LAST_MODIFIED=Wed Sep 17 12:15:52 2003

52A6>

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53D6<

53D6<

53D6<

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53C6<

53C6<

53C6<

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53C6<

53C6<

53C6<

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15B6< 53D6<

15B6< 53D6<

15C6< 53D6<

15B6< 53D6<

15B6< 53D6<

15C6< 53D6<

53C6< 15B6<

53C6< 15B4>

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53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

53C6<
53C6<
53C6<

53D6<

53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<

53D6<

53D6<

53D6<
53D6<
53D6<
53D6<
53D6<
53D6<

53D6<

53D6<
53D6<

53D6<
53D6<
53D6<
53D6<
53D6<

53C6<
53C6<

53C6<

53C6<
53C6<
53C6<
53C6<

53D6<

53B6<

53B6<

53B6<

53B6<

53D6< 15C4>

53D6< 15C4>

53D6< 15C4>

53D6< 15C6<

53D6<

53B6<

53B6<

53D6<

53C6<

15C1<

15C4>

15C1<

53D6<

13C4<>

15C6<

53C6<

53C6<

14D8<>

12B6<>

12B6<>

15B4>

14B4<> 12D6<>

14B6<> 12C6<>

14B6<> 12D6<>

14B4<> 12D6<>

14B6<> 12D6<>

14B4<> 12D6<>

14B6<> 12D6<>

14B4<> 12D6<>

12C6<> 14B4<>

12C6<> 14B4<>

14B6<>

12C6<>

12C6<>

12B6<>

15B4>

12C6<>

12C6<>
53C6<
53C6<
53C6<
53C6<
53C6<

53B6<
53B6<

14B6<> 12D6<>

14B6<> 12D6<>

14B6<> 12D6<>

14B4<> 12D6<>

53B6<

14A4<>

14A4<>

14D6<>

14D6<>

53C6<

13A6<>

13B3<>

13A6<>

13A6<>

13A6<>

13A6<>

13C8<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13B3<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13C4<>

13A6<>

13A6<>

13A6<>

13A6<>

13B6<>

13B6<>

13B6<>

13B6<>

13B6<>

13B6<>

13B6<>

13B6<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

13C8<>

12C3<

12D2<
12B3<
12B3<

12C2<
12C2<
12B2<

13C8<>

12C3<
12C3<
12D3<
12D3<
12C2<
12D2<
12D3<
12D2<
12C3<

12C3<

12B3<

13A6<>
13A6<>
13C4<>
13C4<>
13B3<>
13B3<>

13A6<>

13C8<>
13C8<>

13A6<>
13C4<>
13C4<>
13B3<>
13B3<>

12A3<
12A3<

12B3<

12C2<
12B2<
12C2<
12B2<

13C8<>

53B6<

15B4>

15D6<

15A6<

15A6<

12D6<> 14B6<>

12D6<> 14B4<>

12D6<> 14B4<>

12D6<> 14B6<>

13C8<>

53B6<

15B3>

53B6<

15C6<

53B6<

13C8<>

12B2<

14B6<>

15A1<

14B4<>

13C8<>

53C6<

13A3<>

14A1<

15B1<

12C6<> 14B4<>

14D2<>

SYM_VER-3

GND

SEL

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*DH19

DH14

DH13

DH12

DH11

DH10

DH9

DH15
DH16
DH17
DH18

DB4*
DB5*
DB6*
DB7*
DB8*

DB0*
DB1*
DB2*
DB3*

DH4

DH3

DH2

DH1

DH0

DH8

DH7

DH6

DH5

DA15
DA16
DA17
DA18
DA19

DA13
DA14

DA12

DA11

DA10

DA5
DA6
DA7
DA8
DA9

DA0
DA1
DA2
DA3
DA4

VDD

SYM_VER-3

GND

SEL

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*DH19

DH14

DH13

DH12

DH11

DH10

DH9

DH15
DH16
DH17
DH18

DB4*
DB5*
DB6*
DB7*
DB8*

DB0*
DB1*
DB2*
DB3*

DH4

DH3

DH2

DH1

DH0

DH8

DH7

DH6

DH5

DA15
DA16
DA17
DA18
DA19

DA13
DA14

DA12

DA11

DA10

DA5
DA6
DA7
DA8
DA9

DA0
DA1
DA2
DA3
DA4

VDD

SYM_VER-3

GND

SEL

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*DH19

DH14

DH13

DH12

DH11

DH10

DH9

DH15
DH16
DH17
DH18

DB4*
DB5*
DB6*
DB7*
DB8*

DB0*
DB1*
DB2*
DB3*

DH4

DH3

DH2

DH1

DH0

DH8

DH7

DH6

DH5

DA15
DA16
DA17
DA18
DA19

DA13
DA14

DA12

DA11

DA10

DA5
DA6
DA7
DA8
DA9

DA0
DA1
DA2
DA3
DA4

VDD

SYM_VER-3

GND

SEL

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*DH19

DH14

DH13

DH12

DH11

DH10

DH9

DH15
DH16
DH17
DH18

DB4*
DB5*
DB6*
DB7*
DB8*

DB0*
DB1*
DB2*
DB3*

DH4

DH3

DH2

DH1

DH0

DH8

DH7

DH6

DH5

DA15
DA16
DA17
DA18
DA19

DA13
DA14

DA12

DA11

DA10

DA5
DA6
DA7
DA8
DA9

DA0
DA1
DA2
DA3
DA4

VDD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWING

DDR MUXES

<XR_PAGE_TITLE>

MUX_SEL_H

MEM_DQM<7>

MEM_DQS<7>

MEM_DATA<63>

MEM_DATA<62>

MEM_DATA<61>

MEM_DATA<60>

MEM_DQM<6>
MEM_DATA<56>
MEM_DATA<57>

MEM_DATA<59>

MEM_DATA<58>

MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<54>
MEM_DATA<55>

MEM_DQS<6>

MEM_DATA<49>

MEM_DATA<48>

MEM_DATA<51>

MEM_DATA<50>

RAM_DQM_B<7>

RAM_DATA_B<61>
RAM_DATA_B<62>
RAM_DATA_B<63>
RAM_DQS_B<7>

RAM_DATA_B<60>

RAM_DATA_B<56>
RAM_DATA_B<57>
RAM_DATA_B<58>
RAM_DATA_B<59>

RAM_DQM_B<6>

RAM_DQS_B<6>

RAM_DATA_B<55>

RAM_DATA_B<54>

RAM_DATA_B<53>

RAM_DATA_B<52>

RAM_DATA_B<48>
RAM_DATA_B<49>

RAM_DATA_B<51>

RAM_DATA_B<50>

RAM_DATA_A<62>

RAM_DATA_A<61>

RAM_DATA_A<63>
RAM_DQS_A<7>
RAM_DQM_A<7>

RAM_DATA_A<59>
RAM_DATA_A<60>

RAM_DATA_A<56>
RAM_DATA_A<57>
RAM_DATA_A<58>

RAM_DATA_A<54>

RAM_DATA_A<53>

RAM_DATA_A<55>
RAM_DQS_A<6>
RAM_DQM_A<6>

RAM_DATA_A<49>

RAM_DATA_A<48>

RAM_DATA_A<50>
RAM_DATA_A<51>
RAM_DATA_A<52>

MUX_SEL_H

MEM_DQM<5>

MEM_DQS<5>

MEM_DATA<47>

MEM_DATA<46>

MEM_DATA<45>

MEM_DATA<44>

MEM_DQM<4>
MEM_DATA<40>
MEM_DATA<41>

MEM_DATA<43>

MEM_DATA<42>

MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<38>
MEM_DATA<39>

MEM_DQS<4>

MEM_DATA<33>

MEM_DATA<32>

MEM_DATA<35>

MEM_DATA<34>

RAM_DQM_B<5>

RAM_DATA_B<45>
RAM_DATA_B<46>
RAM_DATA_B<47>
RAM_DQS_B<5>

RAM_DATA_B<44>

RAM_DATA_B<40>
RAM_DATA_B<41>
RAM_DATA_B<42>
RAM_DATA_B<43>

RAM_DQM_B<4>

RAM_DQS_B<4>

RAM_DATA_B<39>

RAM_DATA_B<38>

RAM_DATA_B<37>

RAM_DATA_B<36>

RAM_DATA_B<32>
RAM_DATA_B<33>

RAM_DATA_B<35>

RAM_DATA_B<34>

RAM_DATA_A<46>

RAM_DATA_A<45>

RAM_DATA_A<47>
RAM_DQS_A<5>
RAM_DQM_A<5>

RAM_DATA_A<43>
RAM_DATA_A<44>

RAM_DATA_A<40>
RAM_DATA_A<41>
RAM_DATA_A<42>

RAM_DATA_A<38>

RAM_DATA_A<37>

RAM_DATA_A<39>
RAM_DQS_A<4>
RAM_DQM_A<4>

RAM_DATA_A<33>

RAM_DATA_A<32>

RAM_DATA_A<34>
RAM_DATA_A<35>
RAM_DATA_A<36>

MUX_SEL_L

MEM_DQM<1>

MEM_DQS<1>

MEM_DATA<15>

MEM_DATA<14>

MEM_DATA<13>

MEM_DATA<12>

MEM_DQM<0>
MEM_DATA<8>
MEM_DATA<9>

MEM_DATA<11>

MEM_DATA<10>

MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<6>
MEM_DATA<7>

MEM_DQS<0>

MEM_DATA<1>

MEM_DATA<0>

MEM_DATA<3>

MEM_DATA<2>

RAM_DQM_B<1>

RAM_DATA_B<13>
RAM_DATA_B<14>

RAM_DQS_B<1>

RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DATA_B<10>
RAM_DATA_B<11>

RAM_DQM_B<0>

RAM_DQS_B<0>

RAM_DATA_B<7>

RAM_DATA_B<6>

RAM_DATA_B<5>

RAM_DATA_B<4>

RAM_DATA_B<0>
RAM_DATA_B<1>

RAM_DATA_B<3>

RAM_DATA_B<2>

RAM_DATA_A<14>

RAM_DATA_A<13>

RAM_DATA_A<15>
RAM_DQS_A<1>
RAM_DQM_A<1>

RAM_DATA_A<11>
RAM_DATA_A<12>

RAM_DATA_A<8>
RAM_DATA_A<9>
RAM_DATA_A<10>

RAM_DATA_A<6>

RAM_DATA_A<5>

RAM_DATA_A<7>
RAM_DQS_A<0>
RAM_DQM_A<0>

RAM_DATA_A<1>

RAM_DATA_A<0>

RAM_DATA_A<2>
RAM_DATA_A<3>
RAM_DATA_A<4>

MUX_SEL_L

MEM_DQM<3>

MEM_DQS<3>

MEM_DATA<31>

MEM_DATA<30>

MEM_DATA<29>

MEM_DATA<28>

MEM_DQM<2>
MEM_DATA<24>
MEM_DATA<25>

MEM_DATA<27>

MEM_DATA<26>

MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<22>
MEM_DATA<23>

MEM_DQS<2>

MEM_DATA<17>

MEM_DATA<16>

MEM_DATA<19>

MEM_DATA<18>

RAM_DQM_B<3>

RAM_DATA_B<29>
RAM_DATA_B<30>
RAM_DATA_B<31>
RAM_DQS_B<3>

RAM_DATA_B<28>

RAM_DATA_B<24>
RAM_DATA_B<25>
RAM_DATA_B<26>
RAM_DATA_B<27>

RAM_DQM_B<2>

RAM_DQS_B<2>

RAM_DATA_B<23>

RAM_DATA_B<22>

RAM_DATA_B<21>

RAM_DATA_B<20>

RAM_DATA_B<16>
RAM_DATA_B<17>

RAM_DATA_B<19>

RAM_DATA_B<18>

RAM_DATA_A<30>

RAM_DATA_A<29>

RAM_DATA_A<31>
RAM_DQS_A<3>
RAM_DQM_A<3>

RAM_DATA_A<27>
RAM_DATA_A<28>

RAM_DATA_A<24>
RAM_DATA_A<25>
RAM_DATA_A<26>

RAM_DATA_A<22>

RAM_DATA_A<21>

RAM_DATA_A<23>
RAM_DQS_A<2>
RAM_DQM_A<2>

RAM_DATA_A<17>

RAM_DATA_A<16>

RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<20>

051-6497

13

13 69

BGA

CBTV4020

BGA

CBTV4020

CBTV4020

BGA

CBTV4020

RAM_DATA_B<12>

RAM_DATA_B<15>

BGA

+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN

402

CERM

10V

20%

0.1UF

NOSTUFF

20%
10V
CERM
402

0.1UF

20%
10V

402

0.1UF

NOSTUFF

CERM

402

10V

20%

0.1UF

CERM

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

402

CERM

10V

20%

0.1UF

20%
10V

402

CERM

0.1UF

NOSTUFF

0.1UF

20%
10V
CERM
402

0.1UF

NOSTUFF

CERM
402

10V

20%

10UF

Y5V

10V

N20P80%

805

0.1UF

20%
10V
CERM
402

0.1UF

402

CERM

10V

20%

C611

1

2

C612

1

2

C230

1

2

C613

1

2

C671

1

2

C859

1

2

C908

1

2

C670

1

2

C669

1

2

C858

1

2

C860

1

2

C909

1

2

C910

1

2

U18

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

U22

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

U27

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

U29

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2

C5C6D2D9G2G9H5

H6

E3

E8F3F8

LAST_MODIFIED=Wed Sep 17 12:15:54 2003

53C6<

53D6<

53D6<

53D6<

53D6<

53C6<

53D6<

53D6<

53D6<

53D6<

53C6<

53D6<

53D6<

53D6<

53D6<

53C6<

53D6<

53D6<

53D6<

53D6<

13C4<>

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

53D6<

53D6<

53D6<
53D6<
53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

15A8<

53D6<

53D6<
53D6<
53D6<
53D6<

53D6<

15B8<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
14A8<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
14B8<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

13A3<>

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

53D6<

53D6<

53D6<
53D6<
53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

15B8<

53D6<

53D6<
53D6<
53D6<
53D6<

53D6<

15B8<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
14B8<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
14B8<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

13A6<>

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

53D6<

53D6<

53D6<
53D6<
53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<

15D6<

53D6<
53D6<

53D6<
53D6<

53D6<

15D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

14D6<>

53D6<

53D6<
53D6<

53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

14D6<>

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

13C8<>

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

53D6<

53D6<

53D6<
53D6<
53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<
53D6<

15C6<

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53D6<
53D6<
53D6<
53D6<

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53D6<

53D6<

53D6<

53D6<

53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
14C8<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
14C8<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

12D4<

12C6<>

12C6<>

12B8<>

12B8<>

12B8<>

12B8<>

12C6<>
12B8<>
12B8<>

12B8<>

12B8<>

12B8<>
12B8<>
12B8<>
12B8<>

12C6<>

12B8<>

12B8<>

12B8<>

12B8<>

15A4>

15A4>
15A4>
15A4>

15A6<

15A4>

15A6<
15A6<
15A6<
15A6<

15A4>

15A6<

15A4>

15A4>

15A4>

15A4>

15A6<
15A6<

15A6<

15A6<

14A4<>

14A4<>

14A4<>
14A6<>
14A4<>

14A6<>

14A4<>

14A6<>

14A6<>

14A6<>

14A4<>

14A4<>

14A4<>
14A6<>
14A4<>

14A6<>

14A6<>

14A6<>

14A6<>

14A4<>

12D4<

12C6<>

12C6<>

12B8<>

12B8<>

12B8<>

12B8<>

12C6<>
12B8<>
12B8<>

12B8<>

12B8<>

12C8<>
12C8<>
12C8<>
12C8<>

12C6<>

12C8<>

12C8<>

12C8<>

12C8<>

15B4>

15B4>
15A4>
15A4>

15B6<

15B4>

15B6<
15B6<
15A6<
15A6<

15B4>

15B6<

15B4>

15B4>

15B4>

15B4>

15B6<
15B6<

15B6<

15B6<

14A4<>

14B4<>

14A4<>
14A6<>
14A4<>

14A6<>

14B4<>

14B6<>

14B6<>

14A6<>

14B4<>

14B4<>

14B4<>
14B6<>
14B4<>

14B6<>

14B6<>

14B6<>

14B6<>

14B4<>

12D4<

12C6<>

12C6<>

12C8<>

12C8<>

12D8<>

12D8<>

12C6<>
12D8<>
12D8<>

12D8<>

12D8<>

12D8<>
12D8<>
12D8<>
12D8<>

12C6<>

12D8<>

12D8<>

12D8<>

12D8<>

15D4>

15D4>
15C4>

15C8<

15D6<
15D6<

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15C6<

15D4>

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15D4>

15D4>

15D4>

15D4>

15D6<
15D6<

15D6<

15D6<

14D4<>

14D4<>

14D4<>
14C8<
14D4<>

14D6<>

14D4<>

14D6<>
14D6<>

14D6<>

14D4<>

14D4<>

14D4<>
14C8<
14D4<>

14D6<>

14D6<>

14D6<>

14D6<>

14D4<>

12D4<

12C6<>

12C6<>

12C8<>

12C8<>

12C8<>

12C8<>

12C6<>

12C8<>
12C8<>

12C8<>

12C8<>

12C8<>
12C8<>
12C8<>
12C8<>

12C6<>

12C8<>

12C8<>

12C8<>

12C8<>

15C4>

15C4>
15C4>
15C4>

15B8<

15C4>

15C6<
15C6<
15C6<
15C6<

15C4>

15C6<

15C4>

15C4>

15C4>

15C4>

15C6<
15C6<

15C6<

15C6<

14C4<>

14C4<>

14C4<>
14C6<>
14C4<>

14C6<>

14C4<>

14C6<>

14C6<>

14C6<>

14C4<>

14C4<>

14C4<>
14C6<>
14C4<>

14C6<>

14D6<>

14C6<>

14C6<>

14D4<>

15D4>

15C4>

DQ58

RFU18

KEY

VREF0

VDD0

DQ0
DQ1

VSS0

DQS0

VSS2
DQ3
DQ8

DQ2

VDD2

VSS4

DQS1

DQ10

DQ9

DQ11

CK0
CK0*
VSS7

VDD4

DQ16

DQ18

VDD7

DQ17

DQS2

VSS9

DQ25

VDD9

DQ24

DQ19

DQS3

VDD11

DQ27

DQ26

VSS11

RFU0

VDD13

RFU4

VSS13

RFU2

RFU6

RFU13

RFU12

RFU8
RFU10
VSS15

A9

CKE1
RFU14

VDD16

A1

A5

A7

VSS18

A3

BA0

VDD18

S0*

WE*

A10_AP

DQ33

VSS20
DQ32

VDD20

RFU16

DQS4
DQ34
VSS22
DQ35
DQ40
VDD22
DQ41
DQS5
VSS24
DQ42
DQ43

DQ48

VSS26

VDD26

VDD24

VSS27

VSS29

DQ50

DQ49

DQS6

VDD27

DQS7

DQ51

VDD29

DQ56

DQ57

SDA

VDD31

VSS31

DQ59

VDDSPD

SCL

RFU19

VDD32

VSS28

CK1

DQ52

VDD28

DM6

DQ54

VSS30

DM7

DQ55
DQ60

VDD30

DQ61

DQ53

SA1
SA2

SA0

DQ63

DQ62

VSS32

VSS25

DM5

DQ45

VDD23

VDD21

VSS21

DQ36

RFU17

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RAS*
CAS*

S1*

DQ46
DQ47

CK1*

VDD25

RFU7

RFU5

VDD14

VSS17
VDD15

CKE0

RFU15

VDD17

A11

A8

RFU11
VSS16

RFU9

VSS19

A0

A2

A4

A6

BA1

VDD19

VDD12

VSS12

DQ31

DQ30

DM3

DQ22

DQ21
VDD8

DQ20

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

VSS6
VSS8

RFU1

VSS14

RFU3

VREF1

DQ5

DQ4

DM0
DQ6

DQ12

DQ7

VSS3

VSS1

VDD1

VDD3

DM1
VSS5
DQ14

DQ13

DQ15
VDD5
VDD6

A12

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWING

ALONG VREF TRACE

DISTRIBUTE THESE TWO CAPS

(516S0029)

ADDR=0 (0xA0)

LOCATE THESE RESISTORS BETWEEN DIMMS

DDR DECOUPLING
SLOT "A"

1 - 10UF
24 - 0.1UF

SO-DIMM SLOT A

DIRECTLY ON PIN AT J26-1

LOCATE C1601 AND C1401

LOCATE C1602 AND C1402
DIRECTLY ON PIN AT J26-2

1/16W
MF

402

MF

1/16W

1%

100

1%

100

INT_MEM_VREF

MIN_LINE_WIDTH=25

402

10V

20%

0.1UF

10V

20%

0.1UF

CERM

402

402

CERM

+2_5V_MAIN

CERM

10V

20%

0.1UF

10V

20%

0.1UF

10V

20%

0.1UF

10V

20%

0.1UF

402

CERM

NOSTUFF

CERM
402

NOSTUFF

402

CERM
402

<XR_PAGE_TITLE>

RAM_DQS_A<2>

RAM_DQS_A<1>

RAM_DATA_A<2>

NC_SODIMM85

NO_TEST

RAM_DATA_A<25>

RAM_DQS_A<3>

NC_SODIMM89

NO_TEST

RAM_DATA_A<16>

RAM_DATA_A<24>

NC_SODIMM91

NO_TEST

MIN_LINE_WIDTH=20

DDR_VREF

RAM_DATA_A<7>

NC_SODIMM201

NO_TEST

NC_SODIMM202

NO_TEST

RAM_DATA_A<0>
RAM_DATA_A<1>

RAM_DQS_A<0>

RAM_DATA_A<3>
RAM_DATA_A<8>

RAM_DATA_A<9>

RAM_DQS_A<1>

SYSCLK_DDRCLK_A0_L

RAM_DATA_A<17>

RAM_DATA_A<18>

RAM_DATA_A<27>

NC_SODIMM71

NO_TEST

NC_SODIMM73

NO_TEST

NC_SODIMM83

NO_TEST

RAM_CKE<1>

RAM_ADDR<9>

NC_SODIMM97

NO_TEST

RAM_ADDR<7>
RAM_ADDR<5>
RAM_ADDR<3>
RAM_ADDR<1>

RAM_ADDR<10>

RAM_BA<0>

RAM_CS_L<0>

RAM_WE_L

RAM_DATA_A<32>

NC_SODIMM123

NO_TEST

RAM_DATA_A<33>

RAM_DQS_A<4>

RAM_DATA_A<34>

RAM_DATA_A<35>
RAM_DATA_A<40>

RAM_DATA_A<41>

RAM_DQS_A<5>

RAM_DATA_A<42>
RAM_DATA_A<43>

RAM_DATA_A<48>
RAM_DATA_A<49>

RAM_DATA_A<50>

RAM_DQS_A<6>

RAM_DATA_A<56>

RAM_DATA_A<51>

RAM_DQS_A<7>

RAM_DATA_A<57>

RAM_DATA_A<58>
RAM_DATA_A<59>

INT_I2C_DATA0

INT_I2C_CLK0

NC_SODIMM199

NO_TEST

NC_SODIMM200

NO_TEST

RAM_DATA_A<62>

RAM_DATA_A<61>

RAM_DATA_A<63>

RAM_DATA_A<60>

RAM_DATA_A<55>

RAM_DQM_A<6>
RAM_DATA_A<54>

RAM_DATA_A<53>

RAM_DATA_A<52>

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A1_L

RAM_DATA_A<45>
RAM_DQM_A<5>

RAM_DATA_A<44>

RAM_DATA_A<39>

RAM_DQM_A<4>

RAM_DATA_A<37>

NC_SODIMM124

NO_TEST

RAM_CAS_L

RAM_RAS_L

RAM_CS_L<1>

RAM_ADDR<4>

RAM_ADDR<0>

RAM_ADDR<6>

NC_SODIMM98

NO_TEST

RAM_ADDR<8>

RAM_ADDR<11>

RAM_ADDR<2>

RAM_BA<1>

RAM_CKE<0>

NC_SODIMM84

NO_TEST

NC_SODIMM86

NO_TEST

NC_SODIMM78

NO_TEST

NC_SODIMM80

NO_TEST

RAM_DATA_A<31>

RAM_DQM_A<3>

RAM_DATA_A<30>

RAM_DATA_A<29>

NC_SODIMM72

NO_TEST

NC_SODIMM74

NO_TEST

RAM_DATA_A<28>

RAM_DATA_A<23>

RAM_DATA_A<22>

RAM_DATA_A<21>

RAM_DATA_A<20>

RAM_DATA_A<15>

RAM_DATA_A<14>

RAM_DATA_A<13>
RAM_DQM_A<1>

RAM_DATA_A<12>

RAM_DATA_A<6>

RAM_DQM_A<0>

RAM_DATA_A<5>

RAM_DATA_A<4>

RAM_ADDR<12>

RAM_DQM_A<7>

RAM_DATA_A<47>

RAM_DATA_A<46>

RAM_DATA_A<38>

RAM_DATA_A<36>

NC_SODIMM77

NO_TEST

NC_SODIMM79

NO_TEST

RAM_DQS_A<0>

RAM_DQS_A<2>

RAM_DQS_A<3>

RAM_DQS_A<4>

RAM_DQS_A<6>

RAM_DQS_A<7>

RAM_DQS_A<5>

RAM_DATA_A<26>

SYSCLK_DDRCLK_A0

RAM_DATA_A<11>

RAM_DQM_A<2>

RAM_DATA_A<10>

DDR_VREF

MIN_LINE_WIDTH=20

RAM_DATA_A<19>

6914

13

051-6497

0.1UF

20%
10V
CERM
402

CERM

0.1UF

402

10V

20%

0.1UF

20%
10V
CERM
402

20%
10V
CERM
402

0.1UF

10V

20%
CERM

402

0.1UF

20%

0.1UF

402

CERM

10V

10UF

805

N20P80%
10V
Y5V

+2_5V_MAIN

+2_5V_MAIN

+3V_MAIN

F-RT-SM

AS0A42-D2R

402

CERM

10V

20%

0.1UF

805

Y5V

10V

N20P80%

10UF

+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN

0.1UF

402

CERM

10V

20%

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

402

0.1UF

CERM

10V

20%20%

0.1UF

402

CERM

10V

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V

402

CERM

20%

402

CERM

0.1UF

10V

CERM

10V
402

20%

0.1UF

+2_5V_MAIN

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

1/16W

470

5%
MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

402

470

5%

1/16W

MF

NOSTUFF

1/16W

470

5%
MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

1/16W

470

5%
MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

5%

402

MF

1/16W

470

402

MF

1/16W

5%

470

NOSTUFF

20%
CERM

10V

0.1UF

402

20%
CERM

10V

0.1UF

402402

10V

20%

0.1UF

CERM

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

402

20%
10V
CERM

0.1UF

20%
CERM

10V

0.1UF

402

+2_5V_MAIN

0.1UF

20%
10V
CERM
402

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

402

0.1UF

CERM

10V

20%

0.1UF

20%
10V
CERM
402

C244

1

2

C263

1

2

C320

1

2

C243

1

2

C255

1

2

C256

1

2

C275

1

2

C242

1

2

C313

1

2

C261

1

2

C304

1

2

C276

1

2

C311

1

2

C319

1

2

C929

1

2

J26

112111

115

100

99

110109

108107

106105

102101

117

116

120

35
37

160

158

9695

12

26

48

62

134

148

170

184

5
7

29
31

20

24

30
32

41
43

49

53

13

42
44

50

54

55

59

65
67

56

60

17

66
68

127
129

135

139

128
130

136

140

6

141

145

151
153

142

146

152
154

163
165

8

171

175

164
166

172

176

177

181

187
189

14

178

182

188
190

18

19

23

11

25

47

61

133

147

169

183

201

202

118

71 72

85 86

89
91

97 98

123 124

199 200

73 74

77 78
79 80

83 84

121 122

194
196
198

195

193

9

10

58

69 70

81 82

92

93 94

113 114

21

131 132

143 144

155 156
157

167 168

179

22

180

191 192

33 34

36

45 46

57

197

1 2
3 4

52

63 64

75 76

87 88

90

103 104

15

125 126

137 138

149 150

159
161 162

173

16

174

185 186

27 28

38

39 40

51

119

C1602

1

2

C1601

1

2

R1401

1

2

R1402

1

2

C1401

1

2

C1402

1

2

C1414

1

2

C1403

1

2

C1404

1

2

C1405

1

2

C1413

1

2

C1412

1

2

C1411

1

2

C1410

1

2

C1409

1

2

C1408

1

2

C1407

1

2

C1406

1

2

C1418

1

2

C1417

1

2

C1416

1

2

C1415

1

2

C1419

1

2

C1420

1

2

C1421

1

2

R1403

1 2

R1404

1 2

R1406

1 2

R1405

1 2

R1408

1 2

R1407

1 2

R1410

1 2

R1409

1 2

R1412

1 2

R1411

1 2

R1414

1 2

R1413

1 2

R1416

1 2

R1415

1 2

R1418

1 2

R1417

1 2

C46

1

2

C47

1

2

LAST_MODIFIED=Wed Sep 17 12:15:56 2003

52A6>

52A6>

53D6<

53D6< 53D6<

15D8<

53D6<

53D6<

53C6<

53D6<

53D6<
53D6<
53D6<
53D6<

53D6<

53D6<

53C6<

53D6<

53D6<

53D6<

53D6<

53C6<

53C6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53C6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

15D8<

14C8<

14D6<>

53D6<

53D6<

14C8<

53D6<

53D6<

14D8<>

53D6<

53D6<
53D6<

14C8<

53D6<
53D6<

53D6<

14C8<

53D6<

53D6<

53D6<

15C1<

15C6<

15C6<
15C6<
15C4>
15B6<

15B4>

15B6<

53C6<

15B6<

53D6<
53D6<

14B8<

53D6<

53D6<
53D6<

53D6<

14B8<

53D6<
53D6<

53D6<
53D6<

53D6<

14B8<

53D6<

53D6<

14A8<

53D6<

53D6<
53D6<

34B3<

34B3<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53C6<

53C6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

15B6<

15B4>

53C6<

15C6<

15B6<

15C4>

15C4>

15C4>

15C6<

15B6<

15C1<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

15C4>

53D6<

53D6<

53D6<

53D6<

53D6<

14D6<>

14C6<>

14C6<>

14B6<>

14A6<>

14A6<>

14A6<>

53D6<

53C6<

53D6<

53D6<

53D6<

14D2<>

53D6<

12A8<>

13B5<>

13C7<>

13D7<>

13B5<>

13B5<>

13B5<>

13B5<>

12A7<

13D7<>

13D7<>
13D7<>

13D7<>

13D7<>
13C7<>

13C7<>

13C7<>

53C6<

13B5<>

13B5<>

13B5<>

12B1<

12C3<

12D3<
12C1<
12D3<
12C3<

12C3<

12B3<

12C1<

12B3<

13D4<>
13D4<>

13D4<>

13D4<>

13D4<>
13D4<>

13C4<>

13C4<>

13C4<>
13C4<>

13C2<>
13C2<>

13C2<>

13B2<>

13B2<>

13C2<>

13B2<>

13B2<>

13B2<>
13B2<>

15A6<

15A6<

13B2<>

13B2<>

13B2<>

13B2<>

13B2<>

13B2<>

13B2<>

13C2<>

13C2<>

12C4<

12B4<

13C4<>

13C4<>

13C4<>

13D4<>

13D4<>

13D4<>

12A2<

12A2<

12C1<

12D3<

12C3<

12D1<

12D1<

12B3<

12C3<

12B3<

12C1<

13B5<>

13A5<>

13B5<>

13B5<>

13B5<>

13B5<>

13B5<>

13B5<>

13B5<>

13C7<>

13C7<>

13C7<>

13C7<>

13C7<>

13D7<>

13D7<>

13D7<>

13D7<>

12D1<

13B2<>

13C4<>

13C4<>

13D4<>

13D4<>

13D7<>

13B5<>

13B5<>

13D4<>

13B2<>

13B2<>

13C4<>

13B5<>

12C4<

13C7<>

13B5<>

13C7<>

12A7<

13B5<>

SDA
SCL

VSS
WP

DQ59

VDD

DQ57

DQS7
DQ58

DQ56

VSS

DQ50
DQ51

VDDID

DQS6

CK2

VSS

DQ49

CK2*

VDDQ

VDD

DQ42
DQ43

NC,S2*
DQ48

VSS

WE*
DQ41
CAS*

DQS5

VSS
BA0
DQ35
DQ40
VDDQ

DQ32
VDDQ
DQ33
DQS4
DQ34

BA1

DM4/DQS13

DM5/DQS14

DM6/DQS15

DM7/DQS16

SA0
SA1
SA2

VVDDSPD

VDDQ

VSS

DQ62
DQ63

DQ61

DQ55
VDDQ

DQ60

NC

DQ54

DQ52
DQ53

NC,FETEN

VDD

VSS
DQ46
DQ47

NC,S3*

VDDQ

VDDQ

DQ45

S0*

S1*

DQ38
DQ39

VSS
DQ44
RAS*

VSS
DQ36
DQ37

VDD

VDDQ

NC

NC

VSS

A0
NC

VDD
NC

NC

A1
NC

A2
VSS

DQ27

A10

NC

NC

VDDQ

CK0
CKO*

VSS

NC

VSS
DQ31

NC

VDD
DQ26

A4

VSS

DQ24

DQ25
DQS3

A5

A7

DQ18

VDDQ
DQ19

A9

VSS

DQ16
DQ17
DQS2

VDDQ

VSS
DQ10
DQ11
CKE0

CK1*

CK1

DQ8
DQ9
DQS1
VDDQ

NC
VSS

VDD
DQ3
NC

DQ2

DQ1

DQ0
VSS

DQS0

VREF

FRONT SIDE

SX64 DIMM

SYM_VER3

DM1/DQS10

DM2/DQS11

DM3/DQS12

DQ30

A3

DQ28
DQ29
VDDQ

A6

VDD
DQ22

DQ23

VSS

A8

A12

VSS
DQ21

A11

DQ20

DQ15
CKE1
VDDQ

BA2

DQ14

VDDQ
DQ12
DQ13

VDD

DQ7

VSS

A13

NC

NC

DQ4

DQ5
VDDQ

DM0/DQS9

DQ6

REAR SIDE

VSS

S

D

G

S

D

G

S

D

G

S

D

G

S

D

G

DRAWING

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DDR DECOUPLING

SLOT "B"

1 - 10UF
24 - 0.1UF

BIG DIMM SLOT B

ADDR = 1 (0XA2)

DDR SDRAM SLOT B

(516-1001)

TO SO-DIMM

TO BIG DIMM

DIRECTLY ON PIN J11-1

ALONG VREF TRACE

DISTRIBUTE THESE THREE CAPS

LOCATE C1702 AND C1501

TH-DDR-DIMM-71243

402

MF

1/16W

1K

1%

+3V_MAIN

1%

1K

402

MF

1/16W

1%

1K

402

MF

1/16W

+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN

0.1UF

CERM

10V

20%

402

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

10V

20%
CERM

402

20%
10V
CERM
402

0.1UF

0.1UF

402

CERM

10V

20%

0.1UF

20%
CERM

402

10V

0.1UF

20%
CERM

402

10V

0.1UF

20%
10V
CERM
402

0.1UF

402

CERM

10V

20%

402

CERM

10V

20%

0.1UF

0.1UF

20%
CERM

402

10V

0.1UF

20%
10V
CERM
402

+2_5V_MAIN

805

Y5V

10V

N20P80%

10UF

0.1UF

20%
10V
CERM
402

+2_5V_MAIN

+2_5V_MAIN

Y5V

10V

N20P80%

805

10UF

402

10V

0.1UF

20%
CERM

20%
10V
CERM
402

0.1UF

0.1UF

402

CERM

10V

20%20%
10V
CERM
402

0.1UF0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

402

CERM

10V

20%

0.1UF

20%
10V
CERM
402

0.1UF0.1UF

402

CERM

10V

20%

0.1UF

20%
10V
CERM
402

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

CERM

0.1UF

20%
10V

402

NOSTUFF

470

5%

1/16W

MF

402

NOSTUFF

402

MF

1/16W

5%

470

NOSTUFF

402

MF

1/16W

5%

470

402

MF

1/16W

5%

470

NOSTUFF

NOSTUFF

402

MF

1/16W

5%

470

NOSTUFF

402

MF

1/16W

5%

470

NOSTUFF

402

MF

1/16W

5%

470

NOSTUFF

MF

1/16W

5%

470

402

470

1/16W

5%
MF

402

NOSTUFF

NOSTUFF

402

MF

1/16W

5%

470

+2_5V_MAIN

NOSTUFF

470

402

MF

1/16W

5%

NOSTUFF

402

MF

1/16W

5%

470

NOSTUFF

402

MF

1/16W

5%

470

NOSTUFF

402

MF

1/16W

5%

470

402

MF

1/16W

5%

470

NOSTUFF

NOSTUFF

402

MF

1/16W

5%

470

SM

2N7002

CKE_HYNIX

SM

2N7002

CKE_HYNIX

SM

2N7002

CKE_HYNIX

2N7002

SM

CKE_HYNIX

2N7002

SM

10K

1%
1/16W
MF
402

10K

1%
1/16W
MF
402

10K

402

MF

1/16W

1%

402

1/16W

1%

10K

+2_5V_MAIN

10V

0.1UF

402

CERM

20%

402

CERM

10V

20%

0.1UF

+2_5V_MAIN

CKE_HYNIX

402

MF

1/16W

5%

4.7K

402

CERM

10V

20%

0.1UF

+2_5V_MAIN

1K

1/16W

MF

402

402

MF

1/16W

5%

0

69

051-6497

13

15

15_I286

DDR_VREF

MIN_LINE_WIDTH=20

RAM_DATA_B<23>

RAM_DATA_B<10>

RAM_DATA_B<44>

RAM_CKE<3>

INT_I2C_CLK0

INT_I2C_DATA0

RAM_DATA_B<59>

RAM_DQS_B<7>

RAM_DATA_B<58>

RAM_DATA_B<56>
RAM_DATA_B<57>

RAM_DATA_B<50>

RAM_DQS_B<6>

RAM_DATA_B<51>

SYSCLK_DDRCLK_B2

RAM_DATA_B<49>

SYSCLK_DDRCLK_B2_L

RAM_DATA_B<48>

NC_BIGDIMM71

NO_TEST

RAM_DATA_B<43>

RAM_DATA_B<42>

RAM_DQS_B<5>

RAM_CAS_L

RAM_WE_L

RAM_DATA_B<41>

RAM_DATA_B<40>

RAM_BA<0>

RAM_DATA_B<34>

RAM_DATA_B<33>

RAM_DQS_B<4>

RAM_DATA_B<32>

RAM_BA<1>

RAM_DATA_B<62>
RAM_DATA_B<63>

RAM_DQM_B<7>

RAM_DATA_B<61>

RAM_DATA_B<60>

NO_TEST

NC_BIGDIMM173

RAM_DATA_B<55>

RAM_DATA_B<54>

RAM_DQM_B<6>

RAM_DATA_B<53>

RAM_DATA_B<52>

NO_TEST

NC_BIGDIMM167

NO_TEST

NC_BIGDIMM163

RAM_DATA_B<47>

RAM_CS_L<3>
RAM_DQM_B<5>

RAM_CS_L<2>

RAM_DATA_B<45>

RAM_RAS_L

RAM_DATA_B<38>
RAM_DATA_B<39>

RAM_DQM_B<4>

RAM_DATA_B<37>

RAM_DATA_B<36>

NO_TEST

NC_BIGDIMM51

RAM_ADDR<0>

NC_BIGDIMM49

NO_TEST

NO_TEST

NC_BIGDIMM47

NC_BIGDIMM45

NO_TEST

RAM_ADDR<1>

NO_TEST

NC_BIGDIMM44

RAM_DATA_B<27>

RAM_ADDR<2>

RAM_DATA_B<26>

NO_TEST

NC_BIGDIMM135

RAM_DATA_B<31>

NO_TEST

NC_BIGDIMM134

RAM_DATA_B<30>

RAM_DATA_B<25>

RAM_DQS_B<3>

RAM_ADDR<4>

RAM_DATA_B<24>

RAM_DATA_B<19>

RAM_ADDR<5>

RAM_ADDR<7>

RAM_DATA_B<18>

RAM_ADDR<9>

RAM_DQS_B<2>

RAM_DATA_B<16>
RAM_DATA_B<17>

RAM_CKE<2>

RAM_DATA_B<11>

SYSCLK_DDRCLK_B1_L

RAM_DQS_B<1>

RAM_DATA_B<9>

NO_TEST

NC_BIGDIMM10

NO_TEST

NC_BIGDIMM9

RAM_DATA_B<3>

RAM_DQS_B<0>

RAM_DATA_B<1>

RAM_DATA_B<0>

RAM_ADDR<3>

RAM_DQM_B<3>

RAM_DATA_B<29>

RAM_DATA_B<28>

RAM_ADDR<6>

RAM_ADDR<8>

RAM_DQM_B<2>

RAM_ADDR<11>

RAM_ADDR<12>

RAM_DATA_B<20>

NO_TEST

NC_BIGDIMM113

RAM_DATA_B<14>

RAM_DQM_B<1>

RAM_DATA_B<13>

RAM_DATA_B<12>

NO_TEST

NC_BIGDIMM103

NO_TEST

NC_BIGDIMM102

NO_TEST

NC_BIGDIMM101

RAM_DATA_B<7>

RAM_DATA_B<6>

RAM_DQM_B<0>

RAM_DATA_B<4>
RAM_DATA_B<5>

RAM_SA0

M_VDDID

RAM_DQS_B<7>

RAM_DQS_B<6>

RAM_DQS_B<5>

RAM_DQS_B<4>

RAM_DQS_B<3>

RAM_DQS_B<2>

RAM_DQS_B<1>

RAM_DATA_B<21>

SYSCLK_DDRCLK_B1

RAM_DQS_B<0>

M_SPD_WP

RAM_DATA_B<8>

RAM_DATA_B<35>

RAM_DATA_B<46>

SYSCLK_DDRCLK_B0

RAM_DATA_B<2>

RAM_DATA_B<15>

RAM_CKE<2>

RAM_CKE<0>

RAM_CKE<1>

INT_PU_RESET_L

15_I282

RAM_DATA_B<22>

NO_TEST

NC_BIGDIMM144

NO_TEST

NC_BIGDIMM142

NO_TEST

NC_BIGDIMM140

RAM_CKE<3>

CKE_HYNIX

1%

MF

SYSCLK_DDRCLK_B0_L

RAM_ADDR<10>

CKE_HYNIX

CKE_HYNIX

NOSTUFF

NOSTUFF

NOSTUFF

NOSTUFF

NOSTUFF

NOSTUFF

NOSTUFF

402

CERM

402

CERM

NOSTUFF

CERM
402

NOSTUFF

402

CERM

402

CERM

NOSTUFF

0.1UF

20%
10V

0.1UF

20%
10V

0.1UF

20%
10V

0.1UF

20%
10V

0.1UF

20%
10V

<XR_PAGE_TITLE>

J11

1

10

100
101
102
103
104
105
106
107
108
109

11

110
111
112
113
114
115
116
117
118
119

12

120
121
122
123
124
125
126
127
128
129

13

130
131
132
133
134
135
136
137
138
139

14

140
141
142
143
144

145
146
147
148
149

15

150
151
152
153
154
155
156
157
158
159

16

160
161
162
163
164
165
166
167
168
169

17

170
171
172
173
174
175
176
177
178
179

18

180
181
182
183
184

19

2

20
21
22
23
24
25
26
27
28
29

3

30
31
32
33
34
35
36
37
38
39

4

40
41
42
43
44
45
46
47
48
49

5

50
51
52

53
54
55
56
57
58
59

6

60
61
62
63
64
65
66
67
68
69

7

70
71
72
73
74
75
76
77
78
79

8

80
81
82
83
84
85
86
87
88
89

9

90
91
92

93
94
95
96
97
98
99

R809

1

2

R796

1

2

R825

1

2

C624

1

2

C922

1

2

C672

1

2

C602

1

2

C593

1

2

C864

1

2

C936

1

2

C726

1

2

C914

1

2

C741

1

2

C925

1

2

C562

1

2

C819

1

2

C945

1

2

C943

1

2

C1702

1

2

C1501

1

2

C1512

1

2

C1502

1

2

C1503

1

2

C1511

1

2

C1510

1

2

C1509

1

2

C1508

1

2

C1507

1

2

C1506

1

2

C1505

1

2

C1504

1

2

C1513

1

2

C1515

1

2

C1514

1

2

R1504

1 2

R1506

1 2

R1508

1 2

R1510

1 2

R1512

1 2

R1514

1 2

R1516

1 2

R1518

1 2

R1503

1 2

R1505

1 2

R1507

1 2

R1509

1 2

R1511

1 2

R1513

1 2

R1515

1 2

R1517

1 2

C48

1

2

C49

1

2

C50

1

2

Q41

3

1

2

Q42

3

1

2

Q54

3

1

2

Q52

3

1

2

Q53

3

1

2

R471

1

2

R507

1

2

R495

1

2

R497

1

2

C55

1

2

C58

1

2

R405

1

2

C51

1

2

R512

1

2

R508

1 2

LAST_MODIFIED=Wed Sep 17 12:15:58 2003

53C6<

53D6<

53D6<

53D6<

53C6<

53C6<

53D6<

53D6<

53D6<

53C6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53C6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53C6<

53C6<

53C6<

53D6<

53C6<

53D6<

53D6<

53D6<

15A1<

34B3<

34B3<

53D6<

15A8<

53D6<

53D6<
53D6<

53D6<

15B8<

53D6<

53B6<

53D6<

53D6<

53D6<

53D6<

15B8<

14B4<>

14B6<>

53D6<

53D6<

14B6<>

53D6<

53D6<

15B8<

53D6<

14B4<>

53D6<
53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53C6<

53D6<

53C6<

53D6<

14B4<>

53D6<
53D6<

53D6<

53D6<

53D6<

14B4<>

14B6<>

53D6<

14B4<>

53D6<

53B6<

53D6<

53D6<

15B8<

14B4<>

53D6<

53D6<

14B6<>

14B6<>

53D6<

14B6<>

15C8<

53D6<
53D6<

15B1<

53D6<

15C8<

53D6<

53D6<

15C8<

53D6<

53D6<

14B6<>

53D6<

53D6<

53D6<

14B4<>

14B4<>

53D6<

14B4<>

14B6<>

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<

53D6<
53D6<

15A6<

15A6<

15B6<

15B6<

15C6<

15C6<

15D6<

53D6<

53B6<

15D6<

53D6<

53D6<

53D6<

53B6<

53D6<

15C6<

15C4>

14B4<>

14B6<>

44C2<>

53D6<

14B6<>

53D6<

53D6<

52A6>

13A5<>

13C7<>

13C4<>

12B1<

14A6<>

14A6<>

13A2<>

13A2<>

13A2<>

13B2<>
13A2<>

13B2<>

13B2<>

13B2<>

12A4<

13B2<>

53B6<

13B2<>

13C4<>

13C4<>

13B4<>

12A2<

12B3<

13C4<>

13C4<>

12B3<

13C4<>

13C4<>

13C4<>

13C4<>

12B3<

13A2<>
13A2<>

13A2<>

13A2<>

13A2<>

13B2<>

13B2<>

13B2<>

13B2<>

13B2<>

13B4<>

12B1<

13B4<>

12B1<

13C4<>

12A2<

13C4<>
13C4<>

13C4<>

13C4<>

13C4<>

12C3<

12C3<

13A5<>

12C3<

13A5<>

12B4<

13A5<>

13A5<>

13A5<>

13A5<>

12D3<

13A5<>

13A5<>

12C1<

12D3<

13A5<>

12C3<

13A5<>

13A5<>
13A5<>

12C1<

13C7<>

53B6<

13B7<>

13C7<>

13C7<>

13C7<>

13C7<>

13C7<>

12D3<

13A5<>

13A5<>

13A5<>

12D1<

12D1<

13A5<>

12B3<

12D1<

13A5<>

13B7<>

13B7<>

13B7<>

13C7<>

13C7<>

13C7<>

13C7<>

13C7<>
13C7<>

13A2<>

13B2<>

13B4<>

13C4<>

13A5<>

13A5<>

13B7<>

13A5<>

12A4<

13C7<>

13C7<>

13C4<>

13B4<>

12B4<

13C7<>

13B7<>

12C1<

12B1<

12C1<

12B1<

34C3<

13A5<>

12C3<

VSSA_5
(PLL5)

(PLL5)

VDD15A_5

STP_AGP
AGPPVT
AGPVREF0
AGPVREF1

AGP_BUSY
AGP_CLK
AGP_FB_IN
AGP_FB_OUT

AGPAD0

AGPREQ
AGPGNT

AGP_SBA3

AGP_SBA2

AGP_SBA1

AGP_SBA0

AGPCBE_3

AGPFRAME

AGPTRDY
AGPIRDY
AGPSTOP

AGPDEVSEL

AGPPAR

AGPAD31

AGPAD30

AGPCBE_0
AGPCBE_1
AGPCBE_2

AGP_ST2

AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N

AGPPIPE

AGPRBF

AGP_ST1

AGP_SBA7

AGP_SB_STB_P
AGP_SB_STB_N

AGP_ST0

AGP_WBF

AGP

INTERFACES

AGP_SBA6

AGP_SBA5

AGP_SBA4

AGPAD29

AGPAD28

AGPAD27

AGPAD26

AGPAD25

AGPAD24

AGPAD23

AGPAD22

AGPAD21

AGPAD20

AGPAD19

AGPAD18

AGPAD17

AGPAD16

AGPAD15

AGPAD14

AGPAD13

AGPAD12

AGPAD11

AGPAD10

AGPAD9

AGPAD8

AGPAD7

AGPAD6

AGPAD5

AGPAD4

AGPAD3

AGPAD2

AGPAD1

(3 OF 9)

DRAWING

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

VIN = VCORE (1.5V)

VOUT = AGPIO (1.5V)

2" SHORTER

AGP

2" LONGER

AGP PULL-UPS/PULL DOWNS

INTREPID AGP

THESE RESISTORS

SHARE THE SAME PAD

(ON PAGE 12)

(0.5NS FASTER)

(ZERO DELAY)

(0.5NS SLOWER)

PLACE ALL SERPENTINES ON INTERNAL LAYER

(PLACE CLOSE TO GPU AGP BALLS)

GPU AGP I/O REFERENCE

VERSION 2 WORKAROUND IS UNUSED PIN

NEED 3.3V SWING FOR VIDEO CHIPS
VERSION 1 WORKAROUND IS LA CLOCK

INTREPID AGP CLK IS 1.5V OUT

4.7

402

5%

1/16W

MF

0

NOSTUFF

5%

1/16W

MF

402

0

402

MF

1/16W

5%

0

NOSTUFF

5%

1/16W

MF

402

0

NOSTUFF

402

MF

1/16W

5%

0

NOSTUFF

402

MF

1/16W

5%

0

NOSTUFF

5%

1/16W

MF

402

22

NOSTUFF

MF

1/16W

5%

402

60.4

402

MF

1/16W

1%

10K

1/16W

SM1

5%

10K

SM1

1/16W

5%

INTREPID

SEE_TABLE

BGA

+3V_MAIN

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

402

5%

1/16W

MF

INT_V1

0

22

INT_V2

402

5%

1/16W

MF

10K

402

MF

1/16W

1%

10K

402

MF

1/16W

1%

0

NOSTUFF

402

MF

1/16W

5%

10K

NOSTUFF

MF

402

1%

1/16W

10K

1/16W

1%

402

MF

10K

MF

402

1%

1/16W

10K

1/16W

1%

402

MF

402

CERM

50V

10%

470PF

MF
402

1/16W

1%

82.5

1%

1/16W

MF

402

4.99K

1/16W

1%
MF

402

82.5

50V

10%

CERM

402

470PF

MF

402

1%

1/16W

4.99K

OMIT

SM

0.1UF

20%
10V

402

CERM

20%
10V
CERM
402

0.1UF

10K

1/16W

MF

402

1%

10K

1/16W

MF

402

1%

10K

402

MF

1/16W

1%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

SM1

1/16W

5%

10K

SM1

1/16W

5%

10K

SM1

1/16W

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

10K

1/16W

SM1

5%

0.1UF

10V
402

CERM

20%

69

13

051-6497

16

+1_5V_INTREPID_PLL5

INT_PLL5_GND

INT_PLL5_GND

NO_TEST

NC_RP1PIN4

NO_TEST

AGP_AD_STB<1>

AGP_AD_STB<1>

INT_AGP_FB_OUT

INT_AGP_FB_IN

AGP_FBO_EQUAL

AGP_FBI_EQUAL

AGP_AD_STB<0>

+1_5V_AGP

AGP_PIPE_L

AGP_SB_STB

AGP_SB_STB

AGP_BUSY_L

STOP_AGP_L

AGP_RBF_L

AGP_STOP_L

AGP_TRDY_L

AGP_IRDY_L

AGP_DEVSEL_L

AGP_FRAME_L

AGP_GNT_L

AGP_REQ_L

AGP_ST<0>

AGP_WBF_L

AGP_SBA<6>

AGP_SBA<2>

AGP_ST<2>

AGP_ST<1>

AGP_SBA<7>

AGP_SBA<3>

AGP_SBA<0>

AGP_SBA<4>

AGP_SBA<1>

AGP_SBA<5>

AGP_WBF_L

AGP_RBF_L

AGP_PIPE_L

AGP_AD_STB_L<0>

AGP_AD_STB<0>

AGP_AD_STB_L<1>

AGP_ST<1>
AGP_ST<2>

AGP_ST<0>

AGP_SB_STB_L

AGP_SBA<7>

AGP_SBA<6>

AGP_SBA<5>

AGP_SBA<4>

AGP_SBA<3>

AGP_SBA<2>

AGP_SBA<0>

AGP_DEVSEL_L

AGP_STOP_L

AGP_IRDY_L

AGP_TRDY_L

AGP_FRAME_L

AGP_PAR

AGP_CBE<3>

AGP_CBE<2>

AGP_CBE<1>

AGP_CBE<0>

AGP_AD<7>

AGP_AD<31>

AGP_AD<30>

AGP_AD<29>

AGP_AD<28>

AGP_AD<27>

AGP_AD<26>

AGP_AD<25>

AGP_AD<24>

AGP_AD<23>

AGP_AD<22>

AGP_AD<21>

AGP_AD<20>

AGP_AD<19>

AGP_AD<18>

AGP_AD<17>

AGP_AD<16>

AGP_AD<15>

AGP_AD<14>

AGP_AD<13>

AGP_AD<12>

AGP_AD<11>

AGP_AD<10>

AGP_AD<9>

AGP_AD<8>

AGP_AD<6>

AGP_AD<5>

AGP_AD<4>

AGP_AD<3>

AGP_AD<2>

AGP_AD<1>

AGP_AD<0>

CLK66M_GPU_UF

AGP_BUSY_L

INT_AGPPVT

STOP_AGP_L

AGP_GNT_L

AGP_REQ_L

AGP_SBA<1>

+1_5V_AGP

AGP_FB_PLUS2

INT_AGP_VREF

AGP_AD_STB_L<0>

AGP_AD_STB_L<1>

AGP_BUSY_L

AGP_SB_STB_L

GPU_AGP_VREF_H

+1_5V_AGP

INT_AGP_VREF

GPU_AGP_VREF_L

+1_5V_INTREPID_PLL

INT_ROM_OVERLAY_PU

INT_ANALYZER_CLK

CLK66M_GPU_AGP

<XR_PAGE_TITLE>

R233

1 2

R587

1 2

R580

1 2

RP37

2 7

RP98

3 6

RP98

1 8

RP37

1 8

RP98

2 7

RP37

3 6

RP37

4 5

RP98

4 5

C760

1

2

R667

1 2

R215

1 2

R220

1

2

R216

1 2

R211

1

2

R203

1 2

R204

1 2

R224

1 2

R619

1

2

RP48

1 8

RP48

2 7

U25

AR19
AM19

AR22
AN22
AM22
AN23
AR23
AT24
AM23
AR24
AT25
AR25

AT20

AM24
AN25
AL24
AR26
AT26
AM25
AN26
AM26
AR27
AT27

AR20

AR28
AN27

AT21
AN20
AR21
AN21
AM21
AT22

AM20
AT23
AN24
AL25

AM27

AN28

AM29

AT28

AT29

AJ29

AJ24

AK24

AT33

AM28

AR29

AB20
AB21

AK19

AK20

AK22

AK21

AT19

AK28
AK27
AK25

AT32
AR32
AM31
AN31
AR31
AT31
AM30
AN30

AG25

AH25

AN29
AT30
AR30

AK30

AN19

V14

V13

RP99

1 8

RP99

2 7

RP99

3 6

RP99

4 5

RP49

2 7

RP49

1 8

RP49

3 6

RP49

4 5

RP50

2 7

RP50

1 8

RP50

3 6

RP50

4 5

R226

1 2

R225

1 2

R222

1 2

R217

1 2

R622

1

2

R161

1 2

R223

1 2

R234

1 2

R221

1 2

C603

1 2

R545

1

2

R549

1

2

R197

1

2

C222

1 2

R205

1

2

XW48

1

2

C1801

1

2

C1802

1

2

LAST_MODIFIED=Wed Sep 17 12:16:00 2003

59C8>

59C8>

59C8>

52C3>

52C3>

52C3>

46B4<>

46B4<>

46B4<>

17D5<

17D5<

17D5<

17A4<

17A4<

17A4<

17A3<

17A3<

17A3<

59A8>

16D7<

54B7<

54B7<

16C2<

54B7<

16D7<

52D3>

56B3>

54C7<

54C7<

54C7<

16A8<

54B7<

54B7<

54B7<

17A8>

54B7<

54B7<

54C7<

54C7<

54C7<

54C7<

54C7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54C7<

54C7<

54C7<

54B7<
54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54C7<

54C7<

54C7<

54C7<

54C7<

17A8>

54B7<

54B7<

54B7<

54B7<

16A8<

54C7<

54C7<

17A8>

54B7<

16C2<

30D5<

54A7<

54A7<

17B8<

17B8<

17B8<

11A6<

17B8<

17B8<

17B8<

16D1<

17A8<

17B8<

17B8<

17B8<

17B8<

17B8<

17B8<

17B7<

17B7<>

17B6<

17B8<

17A8<

17A8<

17B6<

17B6<

17A8<

17A8<

17A8<

17A8<

17A8<

17A8<

17B8<

17B8<

17B8<

17B8<

17B8<

17B8<

17B6<
17B6<

17B6<

17A8<

17A8<

17A8<

17A8<

17A8<

17A8<

17A8<

17A8<

17B8<

17B8<

17B8<

17B8<

17B8<

54B7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

54C7<

16D3<

17A8<

17B7<

17B7<>

17A8<

11A6<

52C3>

17B8<

17B8<

16D3<

17A8<

11A6<

52C3>

28D6<>

30C5<>

9B4<

54A7<

52D3>

16A5<>

16D5<

16A4<>

16B3<

54A7<

54A7<

54A7<

54A7<

16A4<>

10D6<

16A4<>

16B3<

16A4<>

16C6<>

16C6<>

16A4<>

16B4<>

16B4<>

16B4<>

16B4<>

16B4<>

16C4<>

16C4<>

16A4<>

16A6<>

16A4<>

16B4<>

16A4<>

16A4<>

16A4<>

16B4<>

16B4<

16B4<>

16B4<>

16B4<>

16B1<

16B3<

16B3<

16D1<

16B3<

16D1<

16B1<
16B1<

16B1<

16D1<

16B1<

16B1<

16C1<

16C1<

16C1<

16B1<

16C1<

16C3<

16B3<

16C3<

16B3<

16C3<

17B8<

17C8<

17C8<

17C8<

17C8<

17D8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17C8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

17D8<

54A7<

16D1<

16D3<

16C3<

16C3<

16C1<

10D6<

54A7<

16A7<

16A4<>

16A4<>

16C6<>

16A4<>

10D6<

16C6<>

9D4<

30A7<

8A2<

17C7<

TRST*

TDO

TDI

TMS

TCLK

AGPCALPU

AGP 2X,4X : AGP 8X
PCIC0/BE0* : C0*/BE0

PCIC1/BE1* : C1*/BE1
PCIC2/BE2* : C2*/BE2
PCIC3/BE3* : C3*/BE3

PCIRST* : RST*

PCICLK : CLK

AGPVDDQ

VD50CLAMP0
VD50CLAMP1

50 OHM

TO VDDQ

50 OHM

10K OHM

TO GND

TESTMODE

AGPVREF : AGPVREF

AGPSTOP* : STOP*

AGPBUSY* : BUSY*

AGPST2 : ST2

AGPST1 : ST1

AGPST0 : ST0

PCIINTA* : INTA

PCITRDY* : TRDY

PCIPAR : PAR

PCISTOP* : STOP

PCIDEVSEL* : DEVSEL

PCIIRDY* : IRDY

PCIFRAME* : FRAME

PCIGNT* : GNT
PCIREQ* : REQ

PCIAD1
PCIAD2
PCIAD3
PCIAD4
PCIAD5

PCIAD0

PCIAD6
PCIAD7
PCIAD8

PCIAD12

PCIAD11

PCIAD10

PCIAD9

PCIAD16
PCIAD17
PCIAD18

PCIAD13
PCIAD14
PCIAD15

PCIAD23

PCIAD22

PCIAD21

PCIAD20

PCIAD19

PCIAD28

PCIAD27

PCIAD24
PCIAD25
PCIAD26

PCIAD31

PCIAD30

PCIAD29

(1 OF 5)

AGPRBF* : RBF
AGPWBF* : WBF

<RESRVD> : DBI_LO

AGPSBA7 : SBA7*

AGPSBA6 : SBA6*

AGPSBA5 : SBA5*

AGPSBA0 : SBA0*
AGPSBA1 : SBA1*
AGPSBA2 : SBA2*
AGPSBA3 : SBA3*
AGPSBA4 : SBA4*

<RESRVD> : MBDET*

TO GND

AGPPIPE* : DBI_HI

NC_PCIINTB*: INTB

AGPADSTBF1 : ADSTBF1

AGPSBSTBF : SBSTBF
AGPSBSTBS* : SBSTBS

AGPADSTBF0 : ADSTBF0
AGPADSTBS0* : ADSTBS0

AGPADSTBS1* : ADSTBS1

NC

VDD

VDD33

AGPCALPD

AGP_PLLVDD

DRAWING

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CORE BYPASS

(LOW = AGP V3.X)

AGP VERSION SELECT

ALL ARE NO_TEST

OUTPUT DRIVER BYPASS

NVIDIA AGP

I/O BYPASS

GPU AGP I/O REFERENCE

(PLACE CLOSE TO INTREPID AGP BALLS)

(HIGH = AGP V2.X)

MF

49.9

1%

402

1/16W

+3V_MAIN

+5V_MAIN

SM1

1/16W

5%

22

49.9

1/16W

402

MF

1%

22

5%

SM1

1/16W

22

5%

1/16W

SM1

22

SM1

1/16W

5%

22

5%

1/16W

SM1

22

SM1

1/16W

5%

22

SM1

1/16W

5%

22

SM1

1/16W

5%

22

1/16W

5%

SM1

22

SM1

1/16W

5%

22

SM1

1/16W

5%

22

SM1

1/16W

5%

22

SM1

1/16W

5%

22

SM1

1/16W

5%

22

5%

1/16W

SM1

22

GPU_AGP_SB_STB_L

22

10K

402

MF

1/16W

1%

10UF

Y5V

10V

N20P80%

805

10UF

Y5V

10V

N20P80%

805

10UF

Y5V

10V

N20P80%

805

10UF

Y5V

10V

N20P80%

805

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

CERM

0.1UF

402

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.01UF

10%

402

CERM

16V

0.01UF

10%

402

CERM

16V

0.1UF

402

CERM

10V

20%

16V
CERM
402

10%

0.01UF

16V
CERM
402

10%

0.01UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%

CERM
402

10V

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

0.01UF

10%

402

CERM

16V 16V

0.01UF

10%

402

CERM

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

402

CERM

10V

20%

16V
CERM
402

10%

0.01UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

16V
CERM
402

10%

0.01UF

Y5V
805

N20P80%
10V

10UF

16V
CERM
402

10%

0.01UF

16V
CERM
402

10%

0.01UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

20%
10V
CERM
402

0.1UF

0.1UF

402

20%
10V
CERM

0.1UF

402

10V

20%

CERM

1%

10

402

MF

1/16W

+3V_MAIN

CERM

50V

10%

402

0.001UF

20%
10V
CERM
402

0.1UF4.7UF

805

CERM

10V

N20P80%

10K

402

10K

402

NV18B

BGA

82.5

1%
1/16W
MF
402

10%
50V

CERM

402

470PF

4.99K

1%

1/16W

MF

402

82.5

402

MF

1/16W

1%

4.99K

MF

1/16W

1%

402

470PF

10%
50V

CERM

402

+3V_MAIN

402

0

5%

0

5%

402

TMDS_XMIT_SI_P

MF

1/16W

1%

10K

402

NV34

10K

1%

1/16W

MF

402

NV34

+3V_MAIN

1%

MF

1/16W

10K

402

17 69

051-6497

13

GRAPH_CORE

MIN_LINE_WIDTH=20

MIN_LINE_WIDTH=20

MIN_LINE_WIDTH=20

GPU_AGP_VREF

STOP_AGP_L

AGP_BUSY_L

AGP_SB_STB_L

AGP_AD_STB<0>

AGP_AD_STB_L<1>

AGP_AD_STB<1>

AGP_AD_STB_L<0>

AGP_RESET_L

MAIN_RESET_L

NV_PCI_RST_L

CLK66M_GPU_AGP

GPU_AGP_CBE<2>

NO_TEST

GPU_AGP_CBE<1>

GPU_AGP_CBE<0>

NO_TEST

GPU_AGP_AD<31>

AGP_REQ_L

AGP_GNT_L

AGP_AD<30>

NO_TEST

GPU_AGP_AD<25>

AGP_FRAME_L

NO_TEST

AGP_AD_STB_L_GPUUF<0>

NO_TEST

AGP_AD_STB_GPUUF<1>

GPU_AGP_SB_STB

GPU_AGP_DEVSEL_L

NO_TEST

GPU_AGP_TRDY_L

NC_GPU<2>

NC_GPU<0>

AGP_ST<2>

AGP_ST<1>

AGP_ST<0>

AGP_INT_L

GPU_AGP_STOP_L

NO_TEST

NO_TEST

GPU_AGP_IRDY_L

GPU_AGP_FRAME_L

NO_TEST

GPU_AGP_PAR

NO_TEST

GPU_AGP_AD<4>

AGP_AD<5>

AGP_AD<7>

GPU_AGP_AD<1>

NO_TEST
NO_TEST

GPU_AGP_AD<2>

NO_TEST

GPU_AGP_AD<3>

GPU_AGP_AD<8>

NO_TEST

GPU_AGP_AD<11>

NO_TEST

GPU_AGP_AD<9>

NO_TEST

GPU_AGP_AD<10>

GPU_AGP_AD<13>

NO_TEST

GPU_AGP_AD<7>

GPU_AGP_CBE<3>

NO_TEST

AGP_AD<2>

GPU_AGP_AD<5>

NO_TEST

AGP_SBA<5>

AGP_SBA<4>

AGP_SBA<6>

AGP_SBA<7>

AGP_SBA<0>

AGP_SBA<1>

AGP_SBA<2>

AGP_SBA<3>

AGP_SB_STB

AGP_AD_STB_GPUUF<0>

GPU_AGP_PIPE_L

NO_TEST

GPU_AGP_WBF_L

AGP_RBF_L

AGP_PIPE_L

AGP_WBF_L

AGP_DEVSEL_L

AGP_STOP_L

AGP_PAR

AGP_IRDY_L

AGP_TRDY_L

AGP_CBE<2>

AGP_AD<31>

AGP_AD<29>

AGP_AD<28>

AGP_AD<27>

AGP_AD<24>

AGP_AD<23>

AGP_AD<22>

AGP_AD<21>

AGP_AD<20>

AGP_AD<19>

AGP_AD<17>

AGP_AD<18>

NC_GPU_DBI_LO

NC_GPU<1>

NC_GPU<3>

NC_GPU<4>

NC_GPU_INTB_L

NVAGP_TCLK

NVAGP_TRST_L

GPU_50PULLDWN

AGP_AD<15>

AGP_AD<14>

AGP_AD<13>

AGP_AD<12>

AGP_AD<11>

AGP_AD<10>

AGP_AD<9>

AGP_AD<8>

AGP_AD<4>

AGP_AD<6>

AGP_AD<3>

AGP_AD<1>

AGP_AD<0>

NO_TEST

AGP_AD_STB_L_GPUUF<1>

GPU_AGP_RBF_L

NO_TEST

NC_NVAGP_TDO

GPU_50PULLUP

+1_5V_AGP

GPU_AGP_SBA<0>

NO_TEST

GPU_AGP_SBA<1>

NO_TEST

GPU_AGP_SBA<2>

NO_TEST

GPU_AGP_SBA<3>
GPU_AGP_SBA<4>

NO_TEST

GPU_AGP_SBA<5>

NO_TEST

GPU_AGP_SBA<6>

NO_TEST

GPU_AGP_SBA<7>

GPU_AGP_AD<6>

NO_TEST

GPU_AGP_AD<12>

GPU_AGP_AD<17>

NO_TEST

NO_TEST

GPU_AGP_AD<19>
GPU_AGP_AD<20>
GPU_AGP_AD<21>
GPU_AGP_AD<22>

NO_TEST
NO_TEST

GPU_AGP_AD<23>
GPU_AGP_AD<24>

GPU_AGP_AD<28>

NO_TEST

GPU_AGP_AD<29>

AGP_AD<26>

NO_TEST

GPU_AGP_AD<27>

GPU_AGP_AD<30>

NO_TEST

AGP_CBE<3>

NVAGP_TDI
NVAGP_TMS

NO_TEST

GPU_AGP_AD<26>

NO_TEST

GPU_AGP_AD<15>

NO_TEST

GPU_AGP_AD<14>

GPU_AGP_AD<18>

NO_TEST

GPU_AGP_AD<16>

AGP_PLLVDD

GPU_AGP_VREF_X

GPU_AGP_VREF_Y

+1_5V_AGP

GPU_AGP_VREF

GPU_AGP_AD<0>

AGP_CBE<1>

AGP_CBE<0>

+1_5V_AGP

MIN_LINE_WIDTH=20

AGP_AD<16>

AGP_AD<25>

GPU_MBDET_L

GPU_TMODE

<XR_PAGE_TITLE>

R160

1

2

RP33

1
2
3
4

8
7
6
5

R169

1

2

RP40

1
2
3
4

8
7
6
5

RP30

1
2
3
4

8
7
6
5

RP32

1
2
3
4

8
7
6
5

RP42

1
2
3
4

8
7
6
5

RP31

1
2
3
4

8
7
6
5

RP41

1
2
3
4

8
7
6
5

RP44

1
2
3
4

8
7
6
5

RP34

1
2
3
4

8
7
6
5

RP43

1
2
3
4

8
7
6
5

RP45

1
2
3
4

8
7
6
5

RP35

1
2
3
4

8
7
6
5

RP46

1
2
3
4

8
7
6
5

RP47

1
2
3
4

8
7
6
5

RP36

1
2
3
4

8
7
6
5

R558

1 2

R210

1 2

R168

1

2

C93

1

2

C94

1

2

C161

1

2

C168

1

2

C178

1

2

C201

1

2

C202

1

2

C185

1

2

C203

1

2

C183

1

2

C176

1

2

C200

1

2

C192

1

2

C180

1

2

C104

1

2

C134

1

2

C117

1

2

C109

1

2

C100

1

2

C101

1

2

C103

1

2

C110

1

2

C139

1

2

C99

1

2

C146

1

2

C148

1

2

C149

1

2

C150

1

2

C147

1

2

C118

1

2

C135

1

2

C169

1

2

C140

1

2

C120

1

2

C102

1

2

C151

1

2

C177

1

2

C184

1

2

C129

1

2

C136

1

2

C116

1

2

C87

1

2

C111

1

2

C137

1

2

C91

1

2

C97

1

2

C187

1

2

C179

1

2

C105

1

2

C112

1

2

C181

1

2

C182

1

2

C188

1

2

C193

1

2

C186

1

2

R198

1 2

C217

1

2

C219

1

2

C223

R80

1 2

R72

1 2

U39

AK24

AG21

AJ25

AF21

AF12

AA13

AA14

AJ19

AF16

AJ18

AG14

AJ11
AH11
AJ12
AH12
AJ14
AH14
AJ15
AH15

AK13

AJ13

AG13
AE16
AE13

AG11

AE14

AD17

AE11
AE17
AE20
AE23
AD11
AD14
AD23
AD20

AK29

AG17

AE12

A1

AK30

G6R7T7

AE10

AJ28
AK28

AH22
AJ22
AJ21
AK21
AH20
AJ20
AG26
AE24
AG25
AG24

AH27

AF24
AG23
AE22
AF22
AE21
AG20
AG19
AF19
AE19
AF18

AK27

AG18
AE18

AJ27
AH26
AJ26
AH25
AH23
AJ23

AJ24
AH19
AF25
AG22

AG12

AJ16

AK16

AE15

AG15

AG16

AK18

AF13

AF15

AH17

AJ17

C2D1E2

AE5

C1

D2

N4
AE9

AA17
AA18

L11
N11
P11
U11
V11
Y11
L14
Y14
L17
Y17

L20

L18
Y18

Y20

H6
AC6

AC7
AD12
P24

U7
G14
U6
AD15
H7
AD16
AD19
AD22

L13
Y13
N20
P20
U20
V20

R192

1

2

C214

1 2

R195

1

2

R193

1

2

R196

1

2

C215

1 2

R1026

1 2

R1027

1 2

R1024

1

2

R1025

1

2

R177

1

2

LAST_MODIFIED=Wed Sep 17 12:16:02 2003

59C8>

59C8>

59C8>

52C3>

52C3>

52C3>

46B4<>

46B4<>

46B4<>

17D5<

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59A6>

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52A6>

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54C7<

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54B7<

54B7<

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54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54B7<

54C7<

54C7<

54C7<

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16A8<

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16A8<

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16D1<

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54C7<

54C7<

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54C7<

54C7<

54C7<

54C7<

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11A6<

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54C7<

11A6<

52A6>

54C7<

54C7<

11A6<

54C7<

54C7<

54A7<

23C7<>

17A2<

16C6<>

16C6<>

16A4<>

16A4<>

16A4<>

16A4<>

16A4<>

27C5<

30B2< 16D8<

54B7<

54B7<

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54B7<

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54B7<

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28B5<>

54B7<

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16B4<>

16B4<>

16A4<>

16A4<>

16B4<

16B4<>

16B1<

16B4<>

16A4<>

54B7<

54A7<

16A4<>

16A4<>

16A6<>

16B4<>

16B3<

16B4<>

16B4<>

16B3<

16B4<>

16B4<>

16B4<>

16B4<>

16B4<>

16B4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

52A8>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

16C4<>

54B7<

54A7<

52A8>

10D6<

54A7<
54A7<
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54B7<

10D6<

17A8<

54B7<

16B4<>

16B4<>

10D6<

16C4<>

16B4<>

52A8>

NC_FBADQS7*

NC_FBADQS6*

NC_FBADQS5*

NC_FBADQS0*
NC_FBADQS1*
NC_FBADQS2*
NC_FBADQS3*
NC_FBADQS4*

FBVDDQ

FBAA12
FBABA0

FBABA1

FBAA11

FBADQM7

FBADQM6

FBADQM5

FBADQM4

FBADQM3

FBADQM2

FBADQM1

FBADQM0

FBAD63

FBAD62

FBAD61

FBAD60

FBAD59

FBAD58

FBAD57

FBAD56

FBAD55

FBAD54

FBAD53

FBAD52

FBAD51

FBAD50

FBAD49

FBAD48

FBAD47

FBAD46

FBAD45

FBAD44

FBAD43

FBAD42

FBAD41

FBAD40

FBAD39

FBAD38

FBAD37

FBAD36

FBAD35

FBAD34

FBAD33

FBAD32

FBAD31

FBAD30

FBAD29

FBAD28

FBAD27

FBAD26

FBAD25

FBAD24

FBAD23

FBAD22

FBAD21

FBAD20

FBAD19

FBAD18

FBAD17

FBAD16

FBAD15

FBAD14

FBAD13

FBAD12

FBAD11

FBAD10

FBAD9

FBAD8

FBAD7

FBAD6

FBAD5

FBAD4

FBAD3

FBAD2

FBAD1

FBAD0

ROMCS*

ROMA15

(3 OF 5)

FBAA6

FBAA0

FBAA2

FBAA4

FBAA1

FBAA5

FBAA3

FBAA7

FBAA10

FBAA8
FBAA9

FBARAS*

FBVREF

FBACS1*

FBACS0*

FBAWE*

FBACAS*

ROMA14

NC_VTT

GND

FB_DLLVDD

FBCAL_CLK_GND

FBCAL_TERM_GND

FBCAL_PU_GND

FBCAL_PD_VDDQ

FBACKE

FBACLK1*

FBACLK0

FBACLK0*

FBACLK1

FBADQS4

FBADQS3

FBADQS2

FBADQS1

FBADQS0

FBADQS5
FBADQS6
FBADQS7

FBCDQM7

FBCDQM6

FBCDQM5

FBCDQM4

FBCDQM3

FBCDQM2

FBCDQM1

FBCDQM0

THERMAL GND

(4 OF 5)

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23

FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60

FBCD63

FBCD61

FBCD24

FBCD62

FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11

FBBCLK1*

FBBCLK0*

FBBCLK0

FBBCLK1

FBCBA0
FBCBA1

FBCA12

FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7

NC_FBCDQS4*

NC_FBCDQS3*

NC_FBCDQS2*

NC_FBCDQS1*

NC_FBCDQS0*

NC_FBCDQS5*

NC_FBCDQS7*

NC_FBCDQS6*

FBCCKE

FBCRAS*
FBCCAS*

FBCWE*
FBCCS0*
FBCCS1*

DRAWING

REV.

DRAWING NUMBER

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

NOTICE OF PROPRIETARY PROPERTY

OFSHT

NONE

SCALE

E

SIZE

APPLE COMPUTER INC.

H

G

1

F

E

234

D

C

B

A

14 3 2

567

H

G

F

E

8

7 6 5

D

C

B

A

8

RECOMMENDED BY NVIDIA

OTHER R’S BETWEEN GPU & MEMORY

DQM R’S CLOSE TO GPU

WEAK PULL-DOWN

WEAK PULL-DOWN

RECOMMENDED BY NVIDIA

EVENLY DISTRIBUTE 0.01UF & 0.1 UF CAPS

AMONGST FBVDDQ PINS ON NV ASIC

NVIDIA FRAME BUFFER

NVIDIA VREF

0.1UF

402

10V
CERM

20%

22

SM1

5%

1/16W

NV34

22

SM1

5%

1/16W

NV34

22

SM1

5%

1/16W

NV34

22

SM1

5%

1/16W

NV34

22

1/16W

5%

SM1

NV34

22

SM1

5%

1/16W

NV34

10K

1/16W
MF
402

1%

NV34

22

1/16W

402

5%
MF

NV34

0

MF

1/16W5%402

NV34

0

MF

1/16W5%402

NV34

0

5%

1/16WMF402

NV34

SM1

1/16W225%

NV34

22

SM1

1/16W

5%

NV34

22

5%

SM1

1/16W

NV34

22

SM1

5%

1/16W

NV34

+2_5V_MAIN

+2_5V_MAIN

10UF

805

N20P80%
10V
Y5V

10UF

20%
CERM

6.3V
805

22

5%

SM1

1/16W

0

402

MF

1/16W

5%

0

402

MF

1/16W

5%

0

402

MF

1/16W

5%

22

1/16W

5%

SM1

22

1/16W

5%

SM1

22

1/16W

5%

SM1

22

1/16W

5%

SM1

22

5%

1/16W

SM1

22

5%

1/16W

SM1

22

5%

1/16W

SM1

22

1/16W

5%

SM1

22

5%

1/16W

SM1

22

1/16W5%SM1

22

1/16W

5%

SM1

22

1/16W

5%

SM1

22

MF

5%

402

1/16W

22

1/16W

5%

SM1

22

5%

1/16W

SM1

10K

1/16W
MF
402

1%

0.1UF

402

CERM
10V

20%

49.9

402

MF

1/16W

1%

+2_5V_MAIN

49.9

1%
1/16W
MF
402

549

1%
1/16W
MF
402

0

5%

1/16W

MF

402

NOSTUFF

0

5%

1/16W

MF

402

+2_5V_MAIN

5%
1/16W
MF
402

0

0.1UF

20%
10V
CERM
402

0.1UF

20%
CERM

10V
402

402

MF

1/16W

1%

1K

1K

1%
1/16W
MF
402

100PF

5%
CERM

50V
402

NOSTUFF

TLV431A

SOT

NOSTUFF

+3V_MAIN

0.001UF

CERM

50V

10%

402

0.1UF

20%
10V
CERM
402

4.7UF

CERM

10V

N20P80%

805

0

402

5%

1/16W

MF

0

402

5%

1/16W

MF

0

402

5%

1/16W

MF

0

402

5%

1/16W

MF

0

402

5%

1/16W

MF

0

MF

1/16W5%402

NV34

0

MF5%

402

1/16W

NV34

0

MF5%

402

1/16W

NV34

0

402

5%

1/16W

MF

NV34

0

402

5%

1/16W

MF

NV34

0

5%
1/16W
MF
402

22

1/16W

5%

SM1

NV34

22

SM1

5%

1/16W

NV34

22

1/16W

5%

SM1

NV34

22

SM1

5%

1/16W

NV34

22

1/16W

5%

SM1

NV34

22

SM1

5%

1/16W

NV34

22

SM1

5%

1/16W

NV34

22

1/16W

5%

SM1

NV34

22

1/16W

5%

SM1

NV34

22

1/16W

5%

SM1

22

1/16W

5%

SM1

22

1/16W

5%

SM1

22

1/16W

5%

SM1

NV18B

BGA

NV18B

BGA

10

402

1/16W

1%
MF

0.1UF

402

CERM

10V

20%

0.1UF

20%

10V
CERM

402

0.1UF

20%

CERM

10V

402

0.1UF

20%

10V
CERM

402

0.1UF

20%

CERM

10V

402

0.1UF

402

CERM

10V

20%

0.01UF
16V

CERM

402

10%

0.1UF

20%

CERM

10V

402

0.1UF

20%

CERM

10V

402

0.1UF

20%

CERM

10V

402

0.1UF

20%

CERM

10V

402

0.01UF

CERM

16V

402

10%

0.01UF
16V

CERM

402

10%

0.1UF

402

CERM

10V

20%

0.01UF

10%

402

CERM

16V

0.1UF

402

CERM

10V

20%

0.1UF

402

10V
CERM

20%

0.01UF

10%

402

CERM

16V

0.1UF

402

10V
CERM

20%

0.1UF

402

10V
CERM

20%

0.01UF

10%

402

CERM

16V

69

051-6497

13

18

FBDQM<10>

FBDQM<11>

FBDQM<12>

RFBDQM<11>

RFBDQM<12>

RFBDQM<10>

FBDQM<9>

RFBACAS_L

NO_TEST

RFBARAS_L

NO_TEST

RFBDQM<8>

RFBDQM<9>

RFBBCS0_L

FBD<77>

FBD<89>

FBD<88>

FBD<86>

NC_FBDQS_L<12>

NO_TEST

NO_TEST

NC_RFBA<12>

NO_TEST

NC_RFBBA<12>

NC_VTT<0>

NO_TEST

NC_VTT<1>

NO_TEST

NC_VTT<2>

NO_TEST

NC_VTT<3>

NO_TEST

NC_VTT<4>

NO_TEST

NC_VTT<5>

NO_TEST

NC_VTT<6>

NO_TEST

NC_VTT<7>

NO_TEST

NC_VTT<8>

NO_TEST

NC_VTT<9>

NO_TEST

NC_VTT<10>

NO_TEST

NC_VTT<11>

NO_TEST

FBDQS<0>
FBDQS<1>
FBDQS<2>

FBDQS<6>

FBDQS<5>

FBDQS<7>

FBDQS<4>

FBDQS<3>

FBACLK0
FBACLK0_L

FBACLK1_L

FBACLK1

FBACKE

FBCAL_CLK_GND

FB_DLLVDD

FB_DLLVDD

FBCAL_TERM_GND

FBCAL_PU_GND

FBCAL_PD_VDDQ

ROMA15

TESTPOINT

ROMA14

TESTPOINT

NC_ROMCS_L

TESTPOINT

GPU_FB_VREF

NC_FBACS1_L

TESTPOINT

FBACS0_L

FBAWE_L

FBACAS_L

FBARAS_L

FBD<0>
FBD<1>
FBD<2>
FBD<3>
FBD<4>
FBD<5>
FBD<6>
FBD<7>
FBD<8>

FBD<9>
FBD<10>
FBD<11>
FBD<12>
FBD<13>
FBD<14>
FBD<15>
FBD<16>
FBD<17>
FBD<18>
FBD<19>
FBD<20>
FBD<21>
FBD<22>
FBD<23>
FBD<24>
FBD<25>
FBD<26>
FBD<27>
FBD<28>
FBD<29>
FBD<30>
FBD<31>
FBD<32>
FBD<33>
FBD<34>
FBD<35>
FBD<36>
FBD<37>
FBD<38>
FBD<39>
FBD<40>
FBD<41>

FBD<43>
FBD<44>
FBD<45>
FBD<46>
FBD<47>
FBD<48>
FBD<49>
FBD<50>
FBD<51>
FBD<52>
FBD<53>
FBD<54>
FBD<55>
FBD<56>
FBD<57>
FBD<58>
FBD<59>
FBD<60>
FBD<61>
FBD<62>
FBD<63>

FBD<42>

FBDQM<0>
FBDQM<1>
FBDQM<2>
FBDQM<3>
FBDQM<4>
FBDQM<5>
FBDQM<6>
FBDQM<7>

FBABA<1>

FBABA<0>

NC_FBDQS_L<2>

NC_FBDQS_L<1>

NC_FBDQS_L<0>

NC_FBDQS_L<4>

NC_FBDQS_L<3>

NC_FBDQS_L<5>
NC_FBDQS_L<6>
NC_FBDQS_L<7>

FBDQM<15>

FBDQM<14>

FBDQM<13>

FBDQM<12>

FBDQM<11>

FBDQM<10>

FBDQM<9>

FBDQM<8>

FBD<72>
FBD<73>
FBD<74>
FBD<75>
FBD<76>

FBD<78>
FBD<79>
FBD<80>
FBD<81>
FBD<82>
FBD<83>
FBD<84>
FBD<85>

FBD<87>

FBD<90>
FBD<91>
FBD<92>
FBD<93>
FBD<94>
FBD<95>
FBD<96>
FBD<97>
FBD<98>

FBD<99>
FBD<100>
FBD<101>
FBD<102>
FBD<103>
FBD<104>
FBD<105>
FBD<106>
FBD<107>
FBD<108>
FBD<109>
FBD<110>
FBD<111>
FBD<112>
FBD<113>
FBD<114>
FBD<115>
FBD<116>
FBD<117>
FBD<118>
FBD<119>
FBD<120>
FBD<121>
FBD<122>
FBD<123>

FBD<125>
FBD<126>
FBD<127>

FBD<71>

FBD<70>

FBD<69>

FBD<68>

FBD<67>

FBD<66>

FBD<65>

FBD<64>

FBBBA<0>
FBBBA<1>

FBBCLK0

FBBCLK0_L

FBBCLK1_L

FBBCLK1

FBDQS<8>
FBDQS<9>
FBDQS<10>
FBDQS<11>
FBDQS<12>
FBDQS<13>
FBDQS<14>
FBDQS<15>

NC_FBDQS_L<9>
NC_FBDQS_L<10>

NC_FBDQS_L<8>

NC_FBDQS_L<11>

NC_FBDQS_L<15>

NC_FBDQS_L<14>

NC_FBDQS_L<13>

FBBCAS_L

FBBRAS_L

TESTPOINT

NC_FBBCS1_L

FBBWE_L
FBBCS0_L

FBBCKE

FBACKE

RFBACKE

RFBABA<1>

FBABA<1>

RFBA<10>

RFBA<8>

RFBA<6>

RFBABA<0>

FBABA<0>

RFBA<11>

RFBA<9>

RFBA<7>

RFBA<5>

RFBA<2>

RFBA<4>

RFBA<0>

RFBACS0_L

NO_TEST

FBACS0_L

RFBA<3>

RFBA<1>

RFBAWE_L

FBAWE_L

FBARAS_L

FBACAS_L

FBDQM<6>

RFBDQM<6>

FBDQM<2>

RFBDQM<2>

FBDQM<4>

RFBDQM<4>

FBDQM<0>

RFBDQM<0>

FBDQM<7>

RFBDQM<7>

FBDQM<5>

RFBDQM<5>

FBDQM<3>

RFBDQM<3>

FBDQM<1>

RFBDQM<1>

RFBBBA<1>

FBBBA<1>

RFBBA<10>

RFBBA<6>

RFBBA<8>

FBBCKE

RFBBCKE

RFBBBA<0>

FBBBA<0>

RFBBA<11>

RFBBA<9>

RFBBA<7>

RFBBA<5>

RFBBA<4>

RFBBA<0>

RFBBA<2>

RFBBCAS_L

FBBCAS_L

FBDQM<14>

RFBDQM<14>

FBBCS0_L

FBDQM<8>

RFBBA<3>

RFBBA<1>

RFBBRAS_L

NO_TEST

FBBRAS_L

RFBBWE_L

FBBWE_L

FBDQM<15>

RFBDQM<15>

FBDQM<13>

RFBDQM<13>

FBCAL_TERM_GND

FBCAL_PU_GND

FBCAL_CLK_GND

MEMREFN1

NO_TEST

FBBA<0>

FBBA<0>

FBBA<1>

FBBA<1>

FBBA<2>

FBBA<2>

FBBA<3>

FBBA<3>

FBBA<4>

FBBA<4>

FBBA<5>

FBBA<5>

NO_TEST

FBBA<6>

FBBA<6>

FBBA<7>

FBBA<7>

FBBA<8>

FBBA<8>

FBBA<9>

FBBA<9>

FBBA<10>

FBBA<10>

FBBA<11>

FBBA<11>

FBBA<12>

FBBA<12>

FBA<0>

FBA<0>

FBA<1>

NO_TEST

FBA<1>

FBA<2>

FBA<2>

NO_TEST

FBA<3>

FBA<3>

FBA<4>

FBA<4>

FBA<5>

FBA<5>

NO_TEST

FBA<6>

FBA<6>

FBA<7>

FBA<7>

FBA<8>

FBA<8>

FBA<9>

FBA<9>

FBA<10>

FBA<10>

NO_TEST

FBA<11>

FBA<11>

FBA<12>

FBA<12>

FBD<124>

MEMREFN2

<XR_PAGE_TITLE>

C145

1

2

C96

1

2

C89

1

2

C80

1

2

C159

1

2

C167

1

2

C133

1

2

C98

1

2

C86

1

2

C84

1

2

C73

1

2

C81

1

2

C72

1

2

C78

1

2

C90

1

2

C75

1

2

C82

1

2

C79

1

2

C115

1

2

C175

1

2

C199

1

2

C83

1

2

RP84

1 8

RP85

3 6

RP8

1 8

RP8

3 6

RP8

2 7

RP8

4 5

R61

1

2

R62

12

R54

1

2

R58

1

2

R70

1

2

RP9

1 8

RP9

2 7

RP9

3 6

RP9

4 5

C95

1

2

C124

1

2

RP22

2 7

R90

1 2

R164

1 2

R154

1 2

RP22

1 8

RP22

3 6

RP94

3 6

RP22

4 5

RP95

1 8

RP95

3 6

RP94

2 7

RP94

4 5

RP95

2 7

RP95

4 5

RP23

1 8

RP23

3 6

R130

12

RP23

2 7

RP23

4 5

R131

1

2

C62

1

2

R71

1

2

R95

1

2

R88

1

2

R49

1 2

R50

1 2

R36

1

2

C54

1

2

C509

1

2

R41

1

2

R463

1

2

C510

1

2

U7

5

3

4

C69

1

2

C70

1

2

C61

1

2

R117

1 2

R111

1 2

R84

1 2

R155

1 2

R143

1 2

R64

1 2

R66

1 2

R67

1 2

R56

1 2

R59

1 2

ZT22

1

ZT23

1

ZT34

1

ZT24

1

ZT25

1

ZT37

1

ZT26

1

ZT27

1

ZT38

1

ZT36

1

ZT33

1

ZT35

1

ZT21

1

ZT32

1

ZT29

1

ZT20

1

ZT31

1

ZT30

1

ZT28

1

ZT6

1

ZT8

1

ZT11

1

ZT10

1

ZT12

1

ZT17

1

ZT14

1

ZT16

1

ZT18

1

ZT15

1

ZT9

1

ZT13

1

ZT4

1

ZT7

1

ZT3

1

ZT2

1

ZT19

1

R83

1

2

ZT1

1

ZT5

1

RP85

4 5

RP85

2 7

RP84

2 7

RP84

3 6

RP84

4 5

RP83

1 8

RP83

4 5

RP83

2 7

RP83

3 6

RP93

1 8

RP93

2 7

RP93

3 6

RP93

4 5

U39

V30
U28

R25
R30
U24

U29
T28
T29
T27
T30
T26
T25
R27

R26
R29

P29

N30

U21

V21

N21

P21

U27
P27

N25
N27

M28
L29
J29
J28
H29
G30
K25
J26
J25
G26

N26

F28
F26
E27
D27
H28
G29
F29
E29
C30
C29

M25

B30

A30
AJ29
AJ30
AH29
AH30
AF29
AE29
AD29
AC28

K26

AG28
AF27
AE26
AE28
AD25
AB25
AB26
AA25
AD30
AC29

K27

AB28
AB29

Y29

W28

W29

V29
AC27
AB27
AA27
AA26

J27

W25

V26

V27

V25

H27

N29

M29

L27

K29

G25

E28
AF28
AD27
AA30

Y27

M27
K30
G27
D30
AG30
AD26
AA29
W27

P28

R28

E3

F5

E4

D3

F17
G11

Y24
L24
G20
G23
H24
AC24
H25
P25
U25
AC25

G8
F8
L25
Y25
F11
F14
F20
F23

C28

C27

A25

AD28
AH18
F25
C18
E14
AF8
Y8
K3
G3
F6

AK25

AF17
AF23
AH24
AH28
AG27
AF26
AF14
AH13
L8
P26

AA5

G28
K28
N28
V28
AA28
F30
J30
M30
W30
AB30

AF20

AE30
H26
L26
Y26
AC26
E17
D28
C7
E8
A9

AH16

C10
E11
C13
E20
C21
E23
C24
A6
A12
AH10

AK15

AK12
C3
D4
E5
AG4
AH3
AK6
AH7
AF5
AE6

AF11

AK9
N3
H11
AC11
H20
AC20
L23
Y23
F1
J1

AH21

M1
T1
W1
AB1
AE1
A19
AK19
A22
AK22
K5

U26

J7
AE25

M26
L28
F27
D29
AG29
AE27
Y28
W26

G9
G12

W24
AB24

G15
G16
G19
G22
J24
M24
R24
T24

R2
R1

AF2

U39

K18

K17

K13

K14

A18
C17

F15
A15
G17

B17
C16
B16
D16
A16
E16
F16
D15

E15
B15

B14

A13

D17
D14

F13
D13

C12
B11

B9
C9
B8
A7

F10

E9
F9
F7

E13

C6
E6
D5
C4
C8
B7
B6
B5
A3
B3

F12

A2

B2
B29
A29
B28
A28
B26
B25
B24
C23

E10

E26
D26
E25
C25
E24
F22
E22
F21
A24
B23

D10

C22
B22
B20
C19
B19
B18
D23
D22
D21
E21

D9

F19
E18
D18
F18

D8
B13
B12

D11
B10

D7

C5
C26
F24
B21
D20

D12
A10
E7
A4
A27
D24
A21
D19

C14

C15

E12
C11
D6
B4
B27
D25
C20
E19

N13

U14
V14
W14
M15
N15
P15
R15
T15
U15
V15

P13

W15
M16
N16
P16
R16
T16
U16
V16
W16
M17

U13

N17
P17
R17
T17
U17
V17
W17
M18
N18
P18

V13

R18
T18
U18
V18
W18
M19
N19
P19
R19
T19

M14

U19
V19
W19
P12
N12
V12
U12
M12
R12
T12

N14

W12
M13
R13
T13
W13

P14
R14
T14

R52

1 2

LAST_MODIFIED=Wed Sep 17 12:16:07 2003

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55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
55D3>

55D3>

55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
55D3>

55D3>

55D3>

55C3>

55C3>

55C3>

55C3>

55C3>

55C3>

55C3>

55C3>

55C3>
55C3>
55C3>
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55C3>

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55C3>
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55D3> 20C6<

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55D3> 55D3>

55D3> 55D3>

55D3> 55D3>

55D3> 55D3>

55D3> 55D3>

55D3> 55D3>

55D3> 55D3>

21C6< 55C3>

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55B3> 21C6<

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55C3> 55C3>

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55C3> 55C3>

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55C3>

55C3>

55C3>

55C3>

55C3>

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55C3>

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55C3>

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18D8>

18F3<

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18D8>

18E3<

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18E3<

18D8>

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18D8>

18E3<

18C8>

18E3<

18C8>

18E3<

19B5<

DRAWING

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PLACE 100OHM TERM AT RAM

PLACE 100OHM TERM AT RAM

PLACE R’S CLOSE TO GPU

PLACE 100OHM TERM AT RAM

PLACE 100OHM TERM AT RAM

PLACE THESE R CLOSE TO SGRAM PLACE THESE R CLOSE TO SGRAM

FB TERMINATION

PLACE THESE R CLOSE TO GPU PLACE THESE R CLOSE TO GPU

PLACE R’S BETWEEN GPU & MEMORY

15

15

15

15

15

15

15

15

15

15

402

1%

1/16W

MF

15

MF

1/16W

1%

402

15

402

1%

1/16W

MF

15

MF

1/16W

1%

402

0

5%
MF

1/16W

402

0

5%
MF

1/16W

402

15

402

1%

1/16W

MF

15

402

1%

1/16W

MF

15

402

1%

1/16W

MF

NV34

15

402

1%

1/16W

MF

NV34

15

402

1%

1/16W

MF

NV34

15

1%
MF

402

1/16W

NV34

15

402

1%

1/16W

MF

0

5%
MF

1/16W

402

15

402

1%

1/16W

MF

0

5%

402

1/16W

MF

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34
NV34

15

15

NV34

0

5%
MF

402

1/16W

0

5%

402

1/16W

MF

0

5%

402

1/16W

MF

0

5%

402

1/16W

MF

15

MF

1/16W

1%

402

15

MF

1/16W

1%

402

15

MF

1/16W

1%

402

15

MF

1/16W

1%

402

15

402

1%

1/16W

MF

NV34

15

402

1%

1/16W

MF

NV34

15

MF

1/16W

1%

402

NV34

15

MF

1/16W

1%

402

NV34

15

MF

1/16W

1%

402

NV34

15

MF

1/16W

1%

402

NV34

15

402

1%

1/16W

MF

NV34

15

402

1%

1/16W

MF

NV34

0

5%

402

1/16W

MF

NV34

0

5%

402

1/16W

MF

NV34

0

5%
MF

1/16W

402

NV34

0

5%
MF

1/16W

402

NV34

0

5%

402

1/16W

MF

NV34

0

5%
MF

1/16W

402

NV34

0

5%
MF

1/16W

402

NV34

0

5%

402

1/16W

MF

NV34

100

402

1%

1/16W

MF

100

MF

1/16W

1%

402

100

1%

1/16W

MF

402

NV34

100

MF

1/16W

1%

402

NV34

15

15

15
15

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15

NV34

15
15
15
15
15
15
15
15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

6919

13

051-6497

FBBCLK1_L

RFBBCLK1

FBACLK0_L

FBBCLK1FBD<98>

NO_TEST

RFBD<117>

RFBD<108>

RFBD<111>

FBD<113>

NO_TEST

FBD<115>

NO_TEST

FBD<114>

NO_TEST

FBD<116>
FBD<117>

NO_TEST

FBD<118>

NO_TEST

FBD<119>

NO_TEST

FBD<120>
FBD<121>

NO_TEST

FBD<101>
FBD<102>

NO_TEST

FBD<105>

NO_TEST

FBD<23>

NO_TEST

FBD<19>

NO_TEST

FBD<17>

NO_TEST

FBD<18>

NO_TEST

RFBD<18>

RFBD<4>

RFBD<3>

RFBD<2>

FBD<1>

NO_TEST

RFBD<127>

RFBD<126>

RFBD<125>

RFBD<123>
RFBD<124>

RFBD<122>

RFBD<121>

RFBD<120>

RFBD<119>

RFBD<118>

RFBD<115>
RFBD<116>

RFBD<114>

RFBD<113>

RFBD<112>

RFBD<110>

RFBD<107>

RFBD<109>

RFBD<106>

RFBD<105>

RFBD<104>

RFBD<103>

RFBD<102>

RFBD<100>
RFBD<101>

RFBD<99>

RFBD<97>
RFBD<98>

RFBD<96>

RFBD<63>

RFBD<62>

RFBD<60>
RFBD<61>

RFBD<59>

RFBD<58>

RFBD<57>

RFBD<56>

RFBD<55>

RFBD<53>

RFBD<52>

RFBD<54>

RFBD<51>

NO_TEST

RFBD<50>

RFBD<47>

RFBD<49>

RFBD<48>

RFBD<46>

RFBD<45>

RFBD<43>

RFBD<42>

RFBD<44>

RFBD<41>

RFBD<40>

RFBD<39>

RFBD<37>
RFBD<38>

RFBD<36>

RFBD<35>

RFBD<34>

RFBD<33>

RFBD<32>

RFBBCLK0_L

FBBCLK0_L

RFBBCLK0

FBBCLK0

RFBBCLK1_L

RFBACLK0_L

RFBACLK0

FBACLK0

RFBACLK1_L

FBACLK1_L

RFBACLK1

FBACLK1

RFBDQS<9>

RFBDQS<10>

RFBDQS<11>

RFBDQS<13>

RFBDQS<14>

RFBDQS<15>

RFBDQS<12>

RFBDQS<8>

FBDQS<15>

FBDQS<14>

FBDQS<9>

FBDQS<11>

FBDQS<13>

FBDQS<12>

FBDQS<10>

FBDQS<8>

RFBDQS<7>

RFBDQS<5>

RFBDQS<6>

RFBDQS<3>

RFBDQS<4>

RFBDQS<2>

RFBDQS<1>

RFBDQS<0>

FBDQS<5>

FBDQS<7>

FBDQS<6>

FBDQS<3>

FBDQS<1>

FBDQS<4>

FBDQS<2>

FBDQS<0>

FBDQSTERM<15>

NO_TEST

FBDQSTERM<14>

NO_TEST

FBDQSTERM<13>

NO_TEST

FBDQSTERM<11>

NO_TEST

FBDQSTERM<12>

NO_TEST

FBDQSTERM<10>

NO_TEST

FBDQSTERM<9>

NO_TEST

FBDQSTERM<8>

NO_TEST

FBDQSTERM<7>

NO_TEST

FBDQSTERM<6>

NO_TEST

FBDQSTERM<1>

NO_TEST

FBDQSTERM<4>

NO_TEST

FBDQSTERM<2>

NO_TEST

FBDQSTERM<0>

NO_TEST

RFBD<94>
RFBD<95>

RFBD<93>

RFBD<91>
RFBD<92>

RFBD<89>
RFBD<90>

RFBD<88>

RFBD<87>

RFBD<86>

RFBD<84>
RFBD<85>

RFBD<83>

RFBD<82>

RFBD<81>

RFBD<79>
RFBD<80>

RFBD<78>

RFBD<76>
RFBD<77>

RFBD<73>
RFBD<74>
RFBD<75>

RFBD<71>
RFBD<72>

RFBD<70>

RFBD<69>

RFBD<68>

RFBD<66>
RFBD<67>

RFBD<65>

RFBD<64>

RFBD<30>

RFBD<29>

RFBD<27>
RFBD<28>

RFBD<26>

RFBD<10>

RFBD<9>

RFBD<12>

RFBD<11>

RFBD<13>

RFBD<15>

RFBD<14>

RFBD<17>

RFBD<16>

RFBD<19>
RFBD<20>

RFBD<22>

RFBD<21>

RFBD<23>

RFBD<25>

RFBD<24>

RFBD<8>

RFBD<6>
RFBD<7>

RFBD<5>

RFBD<1>

FBD<0>

FBD<2>

NO_TEST

FBD<3>

NO_TEST

FBD<4>

NO_TEST

FBD<5>
FBD<6>

NO_TEST

FBD<7>

NO_TEST

FBD<8>

NO_TEST

FBD<9>

FBD<10>

NO_TEST

FBD<11>

NO_TEST

FBD<12>

NO_TEST

FBD<13>

FBD<15>

NO_TEST

FBD<16>

FBD<20>
FBD<21>

NO_TEST

FBD<22>

NO_TEST

FBD<26>

NO_TEST

FBD<27>

NO_TEST

FBD<28>
FBD<29>

NO_TEST

FBD<30>
FBD<31>

NO_TEST

FBD<32>
FBD<33>

NO_TEST

FBD<34>

NO_TEST

NO_TEST

FBD<35>
FBD<36>
FBD<37>

NO_TEST

FBD<38>
FBD<39>

NO_TEST

FBD<40>

NO_TEST

FBD<41>
FBD<42>

NO_TEST

FBD<43>

NO_TEST

FBD<44>

NO_TEST

FBD<45>
FBD<46>

NO_TEST

FBD<47>

NO_TEST

FBD<48>

NO_TEST

FBD<49>

NO_TEST

FBD<51>

FBD<53>
FBD<54>

NO_TEST

FBD<55>

NO_TEST

FBD<56>
FBD<57>

NO_TEST

FBD<58>

NO_TEST

FBD<59>

NO_TEST

FBD<60>
FBD<61>

NO_TEST

FBD<62>

NO_TEST

FBD<63>

NO_TEST

FBD<64>
FBD<65>

NO_TEST

FBD<66>

NO_TEST

FBD<67>
FBD<68>
FBD<69>

NO_TEST

FBD<70>

NO_TEST

FBD<71>

NO_TEST

FBD<72>

NO_TEST

FBD<73>

NO_TEST

FBD<74>

NO_TEST

FBD<75>
FBD<76>
FBD<77>

NO_TEST

FBD<78>

NO_TEST

FBD<79>

NO_TEST

FBD<80>
FBD<81>

NO_TEST

FBD<82>

NO_TEST

FBD<83>

NO_TEST

FBD<84>
FBD<85>

NO_TEST

FBD<86>

NO_TEST

FBD<87>

NO_TEST

FBD<88>

NO_TEST

FBD<89>
FBD<90>

NO_TEST

FBD<91>

NO_TEST

FBD<92>

NO_TEST

FBD<93>

NO_TEST

FBD<94>

NO_TEST

FBD<95>

FBD<96>
FBD<97>

NO_TEST

NO_TEST

FBD<99>

NO_TEST

FBD<100>

FBD<103>

NO_TEST

FBD<104>

NO_TEST

FBD<106>

NO_TEST

FBD<107>
FBD<108>
FBD<109>

NO_TEST

FBD<110>

NO_TEST

FBD<111>

NO_TEST

FBD<112>

FBD<122>

NO_TEST

FBD<123>

NO_TEST

FBD<124>
FBD<125>

NO_TEST

FBD<126>

NO_TEST

FBD<127>

FBDQSTERM<3>

NO_TEST

FBDQSTERM<5>

NO_TEST

RFBD<0>

RFBD<31>

NO_TEST

FBD<14>

FBD<24>
FBD<25>

NO_TEST

FBD<52>

NO_TEST

FBD<50>

NO_TEST

<XR_PAGE_TITLE>

RP20

1 8

RP20

2 7

RP20

3 6

RP20

4 5

RP19

1 8

RP19

2 7

RP19

3 6

RP19

4 5

RP21

4 5

RP21

3 6

RP21

2 7

RP21

1 8

RP18

1 8

RP18

4 5

RP18

3 6

RP18

2 7

RP91

4 5

RP91

3 6

RP91

2 7

RP91

1 8

RP90

1 8

RP90

4 5

RP90

3 6

RP90

2 7

RP92

4 5

RP92

3 6

RP92

2 7

RP92

1 8

RP17

1 8

RP17

4 5

RP17

3 6

RP17

2 7

RP29

4 5

RP29

3 6

RP29

2 7

RP29

1 8

RP28

4 5

RP28

3 6

RP28

2 7

RP28

1 8

RP97

1 8

RP97

4 5

RP97

3 6

RP97

2 7

RP25

4 5

RP25

3 6

RP25

2 7

RP25

1 8

RP96

1 8

RP96

4 5

RP96

3 6

RP96

2 7

RP26

4 5

RP26

3 6

RP26

2 7

RP26

1 8

RP24

1 8

RP24

4 5

RP24

3 6

RP24

2 7

R148

12

R156

12

R123

12

R132

12

R122

12

R97

12

R479

1 2

R483

1 2

R104

12

R103

12

R105

12

R106

12

R509

1 2

R101

12

R506

1 2

R81

12

RP13

4 5

RP13

3 6

RP13

2 7

RP13

1 8

RP7

4 5

RP87

1 8

RP87

4 5

RP87

3 6

RP87

2 7

RP7

3 6

RP7

2 7

RP7

1 8

RP6

4 5

RP6

3 6

RP6

2 7

RP11

4 5

RP11

3 6

RP11

2 7

RP11

1 8

RP12

4 5

RP12

3 6

RP12

1 8

RP12

2 7

RP14

3 6

RP14

4 5

RP14

1 8

RP14

2 7

RP10

2 7

RP10

3 6

RP10

4 5

RP10

1 8

RP5

4 5

RP5

3 6

RP5

2 7

RP5

1 8

RP6

1 8

RP4

4 5

RP86

1 8

RP86

4 5

RP86

3 6

RP86

2 7

RP89

4 5

RP89

3 6

RP4

3 6

RP4

2 7

RP4

1 8

RP89

1 8

RP89

2 7

RP88

2 7

RP88

3 6

RP88

4 5

RP88

1 8

R140

12

R159

12

R147

12

R167

12

R153

1 2

R146

1 2

R186

1 2

R187

1 2

R428

1 2

R416

1 2

R31

1 2

R24

1 2

R32

1 2

R25

1 2

R415

1 2

R429

1 2

R63

12

R69

12

R53

12

R57

12

R65

12

R68

12

R55

12

R60

12

R158

1

2

R500

1

2

R20

1

2

R403

1

2

RP27

1 8

RP27

4 5

RP27

3 6

RP27

2 7

RP80

1 8

RP80

4 5

RP80

2 7

RP80

3 6

RP81

2 7

RP81

1 8

RP81

4 5

RP81

3 6

RP82

3 6

RP82

2 7

RP82

1 8

RP82

4 5

LAST_MODIFIED=Wed Sep 17 12:16:10 2003

55B3>

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55B3> 55C3>

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55C3>
55C3>
55C3>

55D3>

55D3>

55D3>

55D3>
55D3>

55D3>

55D3>

18C5<>

21C2<

18D7>

18C5<> 18F5<>

21C1<>

21C1<>

21C1<>

18E5<>

18E5<>

18E5<>

18E5<>
18E5<>
18E5<>
18E5<>
18E5<>
18E5<>

18F5<>
18F5<>

18F5<>

18G8<>

18G8<>

18G8<>
18G8<> 20C5<>

20C5<>

20C5<>

20C5<>

18G8<>

21B1<>

21B1<>

21B1<>

21B1<>
21B1<>

21B1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>
21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>

21C1<>
21C1<>

21C1<>

21C1<>
21C1<>

21C1<>

20B1<>

20B1<>

20B1<>
20B1<>

20B1<>

20B1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>
20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

20C1<>

21C6<

18C5<>

21C6<

18C5<>

21C2<

20C6<

20C6< 18D7>

20C2< 18D7>

20C2< 18D7>

21C6<>

21C6<>

21C6<>

21C2<>

21C2<>

21C2<>

21C2<>

21C6<>

18D4<>

18D4<>

18D4<>

18D4<>

18D4<>

18D4<>

18D4<>

18D4<>

20C2<>

20C2<>

20C2<>

20C6<>

20C2<>

20C6<>

20C6<>

20C6<>

18C7<>

18C7<>

18C7<>

18C7<>

18C7<>

18C7<>

18C7<>

18C7<>

55B3>

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55B3>

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55B3>

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21B5<>
21B5<>

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21C5<>

21C5<>

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21C5<>
21C5<>

21C5<>

21C5<>
21C5<>

21C5<>
21C5<>
21C5<>

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21C5<>

21C5<>

21C5<>

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21C5<>
21C5<>

21C5<>

21C5<>

20B5<>

20B5<>

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20B5<>

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20C5<>

20C5<>

20C5<>

20C5<>

20C5<>

20C5<>

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20C5<>

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20C5<>
20C5<>

20C5<>

20C5<>

20C5<>

20C5<>

20C5<>

20C5<>

20C5<>
20C5<>

20C5<>

20C5<>

18G8<>

18G8<>
18G8<>
18G8<>
18G8<>
18G8<>
18G8<>
18G8<>

18G8<>
18G8<>
18G8<>
18G8<>
18G8<>

18G8<>
18G8<>

18G8<>
18G8<>
18G8<>

18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>

18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18F8<>
18E8<>
18E8<>
18E8<>
18E8<>
18E8<>

18E8<>

18E8<>
18E8<>
18E8<>
18E8<>
18E8<>
18E8<>
18E8<>
18E8<>
18E8<>
18E8<>
18E8<>

18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>

18F5<>
18F5<>

18F5<>

18F5<>

18F5<>
18F5<>

18F5<>
18F5<>
18F5<>
18E5<>
18E5<>
18E5<>
18E5<>

18E5<>
18E5<>
18E5<>
18E5<>
18E5<>
18E5<>

55C3>

55C3>

20C5<>

20B5<>

18G8<>

18G8<>
18F8<>

18E8<>

18E8<>

(1 OF 2)

CK

CK

CKE

RFU2

RFU1

MCL

DQ31

NC

BA1

DQ26
DQ27
DQ28
DQ29
DQ30

DQ25

DQ24

DQ21
DQ22
DQ23

DQ19
DQ20

DQ14

DQ16
DQ17
DQ18

DQ15

DQ13

DQ12

DQ11

DQ9

DQ10

DQ8

DQ4

DQ6

DQ5

DQ7

DQ3

DQ2

DQ1

DQ0

CS
RAS

CAS
WE

BA0

DM3

DQS3

DM2

DM1

DM0

DQS2

DQS0
DQS1

A0
A1
A2
A3

A6

A5

A4

A9

A8

A7

A10
A11

VSSQ

VSS_THERM

VSS

VDDQ

VREF

VDD

(2 OF 2)

(1 OF 2)

CK

CK

CKE

RFU2

RFU1

MCL

DQ31

NC

BA1

DQ26
DQ27
DQ28
DQ29
DQ30

DQ25

DQ24

DQ21
DQ22
DQ23

DQ19
DQ20

DQ14

DQ16
DQ17
DQ18

DQ15

DQ13

DQ12

DQ11

DQ9

DQ10

DQ8

DQ4

DQ6

DQ5

DQ7

DQ3

DQ2

DQ1

DQ0

CS
RAS
CAS
WE

BA0

DM3

DQS3

DM2

DM1

DM0

DQS2

DQS0
DQS1

A0
A1
A2
A3

A6

A5

A4

A9

A8

A7

A10
A11

VSSQ

VSS_THERM

VSS

VDDQ

VREF

VDD

(2 OF 2)

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

DRAWING

PLACE NEAR VDD PINS

SGRAM0 & SGRAM1 DDR MEMORY REFERENCE SUPPORT

PLACE NEAR VDD PINS

SGRAM0 & SGRAM1

SGRAM0 & SGRAM1 VREF

SGRAM0 & SGRAM1 MEMORY SUPPORT

10UF

Y5V

10V

N20P80%

805

10UF

Y5V

10V

N20P80%

805

0.1UF

CERM
402

10V

20%

0.1UF

402

20%
CERM

10V

0.1UF

402

CERM

10V

20%

0.1UF

CERM

20%

402

10V

0.1UF

CERM
402

10V

20%

0.1UF

402

CERM

10V

20%

0.1UF

20%
10V
CERM
402 402

10V

20%
CERM

0.1UF 0.1UF

20%
10V

402

CERM

0.1UF

10V
CERM

20%

402

0.1UF

20%
10V
CERM
402 402

0.1UF

10V

20%
CERM

10UF

Y5V

10V

N20P80%

805

10UF

Y5V

10V

N20P80%

805

SDRAM_DDR_4MX32

BGA

SEE_TABLE

SDRAM_DDR_4MX32

BGA

SEE_TABLE

SDRAM_DDR_4MX32

BGA

SEE_TABLE

SEE_TABLE

BGA

SDRAM_DDR_4MX32

+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN +2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN+2_5V_MAIN

0

5%

1/16W

MF

402

MEMREFG_ACT

0

5%

1/16W

MF

402

MEMREFG_PAS

+2_5V_MAIN

SEE_TABLE

1K

MF

1/16W

5%

402

0.1UF

20%
10V
CERM
402

MEMREFG_PAS

0.1UF

CERM

10V

20%

402

MEMREFG_PAS

1K

MF

1/16W

1%

402

1K

1%
1/16W
MF
402

100PF

5%
50V
CERM
402

MEMREFG_ACT

TLV431A

SOT

MEMREFG_ACT

0.001UF

10%
50V
CERM
402

0.001UF

50V

10%

402

CERM

0.001UF

10%
50V
CERM
402

0.001UF

CERM

50V

10%

402

0.001UF

402

10%
50V
CERM

402

10%
50V
CERM

0.001UF

0.1UF

10V

20%
CERM

402

0.1UF

CERM

20%
10V

402

0.1UF

CERM

20%
10V

402 402

10V

20%
CERM

0.1UF

402

10V

20%
CERM

0.1UF

402

10V

20%
CERM

0.1UF

0.001UF

402

CERM

50V

10%

0.001UF

CERM

50V

10%

402

0.001UF

402

10%
50V
CERMCERM

0.001UF

402

10%
50V

0.1UF

10V

20%
CERM

402

402

20%
CERM

10V

0.1UF

R152 MEMREFG_ACT116S1103

1

RES,1K-OHM,5%,1/16W,0402

SAMSUNG_275_32M

CRITICAL

U12,U41

2

SDRAM,4MX32,DDR,275MHZ

333S0249

HYNIX_300_32M

CRITICAL

2

U12,U41

SDRAM,4MX32,DDR,300MHZ

333S0252

SAMSUNG_300_32M

2

U12,U41

CRITICAL

SDRAM,4MX32,DDR,300MHZ

333S0251

13

051-6497

6920

HYNIX_275_32M

CRITICAL

U12,U41

2

SDRAM,4MX32,DDR,275MHZ

333S0250

R152 MEMREFG_PAS

1

116S1000

RES,0-OHM,5%,1/16W,0402

SGRAVREF

RFBD<50>

NC_FB1<0>

NO_TEST

NC_FB1<1>

NO_TEST

NC_FB1<2>

NO_TEST

NC_FB1<3>

NO_TEST

NC_FB1<4>

NO_TEST

NC_FB1<5>

NO_TEST

NC_FB1<6>

NO_TEST

NC_FB1<7>

NO_TEST

NC_FB1<8>

NO_TEST

NC_FB1<9>

NO_TEST

NC_FB1<10>

NO_TEST

NC_FB2<0>

NO_TEST

NC_FB2<1>

NO_TEST

NC_FB2<2>

NO_TEST

NC_FB2<3>

NO_TEST

NC_FB2<4>

NO_TEST

NC_FB2<5>

NO_TEST

NC_FB2<6>

NO_TEST

NC_FB2<7>

NO_TEST

NC_FB2<8>

NO_TEST

NC_FB2<9>

NO_TEST

NC_FB2<10>

NO_TEST

SGRAVREF

RFBDQS<3>

RFBDQS<2>

RFBDQS<1>

RFBDQS<0>

RFBDQS<4>
RFBDQS<5>
RFBDQS<6>

RFBD<0>
RFBD<1>

RFBACKE

RFBACAS_L

RFBACS0_L
RFBARAS_L

RFBAWE_L

RFBACLK0_L

RFBACLK0

RFBABA<0>

RFBDQM<3>

RFBDQM<2>

RFBDQM<0>
RFBDQM<1>

RFBD<13>

RFBD<11>
RFBD<12>

RFBD<10>

RFBD<9>

RFBD<8>

RFBD<6>
RFBD<7>

RFBD<4>

RFBD<3>

RFBD<5>

RFBD<2>

RFBD<31>

RFBD<30>

RFBD<29>

RFBD<26>

RFBD<28>

RFBD<27>

RFBD<24>

RFBD<21>

RFBD<15>

RFBD<14>

RFBD<17>

RFBD<16>

RFBD<18>
RFBD<19>
RFBD<20>

RFBD<22>
RFBD<23>

RFBDQM<5>

RFBDQM<4>

RFBDQM<6>
RFBDQM<7>

RFBABA<0>

RFBACAS_L

RFBACS0_L
RFBARAS_L

RFBAWE_L

RFBD<32>

RFBD<34>

RFBD<33>

RFBD<37>

RFBD<35>
RFBD<36>

RFBD<39>

RFBD<38>

RFBD<40>
RFBD<41>
RFBD<42>

RFBD<44>

RFBD<43>

RFBD<47>

RFBD<45>
RFBD<46>

RFBD<49>

RFBD<48>

RFBD<51>
RFBD<52>

RFBD<54>
RFBD<55>

RFBD<53>

RFBD<56>
RFBD<57>

RFBD<59>
RFBD<60>

RFBD<58>

RFBD<61>
RFBD<62>
RFBD<63>

RFBACLK1

RFBACLK1_L

RFBACKE

RFBA<0>

RFBA<0>

RFBA<1>

RFBA<1>

RFBA<3>

RFBA<3>

RFBA<2>

RFBA<2>

RFBA<6>

RFBA<6>

RFBA<5>

RFBA<4>

RFBA<4>

RFBA<7>

RFBA<7>

RFBA<8>

RFBA<8>

RFBA<9>

RFBA<9>

RFBA<10>

RFBA<10>

RFBA<11>

RFBA<11>

RFBABA<1>

RFBABA<1>

SGRAVREFMEMREFG1

MEMREFG2

RFBA<5>

RFBDQS<7>

RFBD<25>

<XR_PAGE_TITLE>

C205

1

2

C216

1

2

C198

1

2

C174

1

2

C141

1

2

C165

1

2

C197

1

2

C196

1

2

C568

1

2

C567

1

2

C554

1

2

C545

1

2

C534

1

2

C553

1

2

C520

1

2

C521

1

2

U12

N5
N6

L6
M7

M6
N7
N8
M9

N9
N10
N11

M8

N4

M5

L2

M11
M12
N12

N2

B3
H12

H3
B12

B7
C6

J13
J12
G13
G12
F13
F12
F3
F2
G3
G2

B6

J3
J2
K2
K3
E13
D13
D12
C13
B10
B9

B5

C9
B8

C2
D3
D2
E2
K13
K12

B2
H13

H2
B13

M13

C4
C11

H4
H11
L12
L13

M3

M4

N3

M2

L9
M10

L3

U12

D7
D8
E4

E11

L4
L7
L8

L11

C3
C5

G4

G11

J4

J11

K4

K11

C7

C8
C10
C12

E3
E12

F4
F11

N13

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

B4
B11

F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

D4
D5
D6
D9
D10
D11
E6
E9

F6
F7

H8
H9
J6
J7
J8
J9

F8
F9
G6
G7
G8
G9
H6
H7

U41

N5
N6

L6
M7

M6
N7
N8
M9

N9
N10
N11

M8

N4

M5

L2

M11
M12
N12

N2

B3
H12

H3
B12

B7
C6

J13
J12
G13
G12
F13
F12
F3
F2
G3
G2

B6

J3
J2
K2
K3
E13
D13
D12
C13
B10
B9

B5

C9
B8

C2
D3
D2
E2
K13
K12

B2
H13

H2
B13

M13

C4
C11

H4
H11
L12
L13

M3

M4

N3

M2

L9
M10

L3

U41

D7
D8
E4

E11

L4
L7
L8

L11

C3
C5

G4

G11

J4

J11

K4

K11

C7

C8
C10
C12

E3
E12

F4
F11

N13

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

B4
B11

F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

D4
D5
D6
D9
D10
D11
E6
E9

F6
F7

H8
H9
J6
J7
J8
J9

F8
F9
G6
G7
G8
G9
H6
H7

R151

1 2

R166

1 2

R152

1

2

C157

1

2

C172

1

2

R163

1

2

R176

1

2

C191

1

2

U16

5

3

4

C569

1

2

C566

1

2

C535

1

2

C565

1

2

C533

1

2

C143

1

2

C540

1

2

C544

1

2

C532

1

2

C158

1

2

C142

1

2

C144

1

2

C166

1

2

C173

1

2

C195

1

2

C194

1

2

C2201

1

2

C2202

1

2

LAST_MODIFIED=Wed Sep 17 12:16:13 2003

52A6>

52A6>

55C3>

55D3>

55C3>
55D3>

55D3>

55D3>

55D3>

55D3>

55C3>
55D3>

55D3>

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55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

55D3>

52A6>

55D3>

20C8<

55D3>

20C4<

55C3>

55C3>

55C3>

55C3>

55C3>
55C3>
55C3>

55D3>
55D3>

20C2<

20B2<

20B2<
20B2<

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55C3>

55C3>

20C2<

55D3>

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55D3>
55D3>

55D3>

55D3>
55D3>

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55D3>

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55D3>

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55D3>

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55D3>

55D3>
55D3>
55D3>

55D3>
55D3>

55D3>

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55D3>
55D3>

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55D3>
55D3>

55D3>

55D3>

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55D3>
55D3>

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55D3>
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55D3>
55D3>

55D3>

55D3>
55D3>

55D3>
55D3>

55D3>

55D3>
55D3>
55D3>

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55C3>

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20C6<

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20C6<

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20C6<

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20C6<

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20C6<

20C2<

20C8<

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55C3>

55D3>

20A3<

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20A3<

19A6<

19A6<

19A6<

19A6<

19A6<
19A6<
19A6<

19D7<
19D7<

18D2<>

18G2<>

18F2<>
18G2<>

18F2<>

19C1<

19C1<

18E2<>

18G2<

18G2<

18G2<
18G2<

19D7<

19D7<
19D7<

19D7<

19D7<

19D7<

19D7<
19D7<

19D7<

19D7<

19D7<

19D7<

19C7<

19C7<

19C7<

19C7<

19C7<

19C7<

19C7<

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19D7<

19D7<

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19C7<

19C7<
19C7<

18G2<

18G2<

18G2<
18G2<

18E2<>

18G2<>

18F2<>
18G2<>

18F2<>

19D4<

19D4<

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19D4<

19D4<

19D4<

19D4<
19D4<
19D4<

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19D4<

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19C4<

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19C4<

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19C4<

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19C4<

19C4<

19C4<
19C4<
19C4<

19D1<

19D1<

18D2<>

18F2<>

18F2<>

18F2<>

18F2<>

18F2<>

18F2<>

18F2<>

18F2<>

18E2<>

18E2<>

18F2<>

18F2<>

18F2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

18E2<>

20C4<

18F2<>

19A6<

19C7<

(1 OF 2)

CK

CK

CKE

RFU2

RFU1

MCL

DQ31

NC

BA1

DQ26
DQ27
DQ28
DQ29
DQ30

DQ25

DQ24

DQ21
DQ22
DQ23

DQ19
DQ20

DQ14

DQ16
DQ17
DQ18

DQ15

DQ13

DQ12

DQ11

DQ9

DQ10

DQ8

DQ4

DQ6

DQ5

DQ7

DQ3

DQ2

DQ1

DQ0

CS
RAS

CAS
WE

BA0

DM3

DQS3

DM2

DM1

DM0

DQS2

DQS0
DQS1

A0
A1
A2
A3

A6

A5

A4

A9

A8

A7

A10
A11

VSSQ

VSS_THERM

VSS

VDDQ

VREF

VDD

(2 OF 2)

(1 OF 2)

CK

CK

CKE

RFU2

RFU1

MCL

DQ31

NC

BA1

DQ26
DQ27
DQ28
DQ29
DQ30

DQ25

DQ24

DQ21
DQ22
DQ23

DQ19
DQ20

DQ14

DQ16
DQ17
DQ18

DQ15

DQ13

DQ12

DQ11

DQ9

DQ10

DQ8

DQ4

DQ6

DQ5

DQ7

DQ3

DQ2

DQ1

DQ0

CS
RAS
CAS
WE

BA0

DM3

DQS3

DM2

DM1

DM0

DQS2

DQS0
DQS1

A0
A1
A2
A3

A6

A5

A4

A9

A8

A7

A10
A11

VSSQ

VSS_THERM

VSS

VDDQ

VREF

VDD

(2 OF 2)

DRAWING

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

PLACE NEAR VDD PINS

SGRAM2 & SGRAM3

PLACE NEAR VDD PINS

SGRAM2 & SGRAM3 DDR MEMORY REFERENCE SUPPORT

SGRAM0 & SGRAM1 MEMORY SUPPORT

SGRAM2 & SGRAM3 VREF

64M_GRAM_DECOUP

Y5V

10V

N20P80%

805

10UF

Y5V

10V

N20P80%

805

10UF

64M_GRAM_DECOUP

64M_GRAM_DECOUP

0.1UF

CERM
402

10V

20%

64M_GRAM_DECOUP

0.1UF

402

20%
CERM

10V

64M_GRAM_DECOUP

0.1UF

402

CERM

10V

20%

64M_GRAM_DECOUP

0.1UF

CERM

20%

402

10V

64M_GRAM_DECOUP

0.1UF

CERM
402

10V

20%

64M_GRAM_DECOUP

0.1UF

402

CERM

10V

20%

64M_GRAM_DECOUP

0.1UF

20%
10V
CERM
402

64M_GRAM_DECOUP

0.1UF

10V
402

20%
CERM

64M_GRAM_DECOUP

0.1UF

402

20%
10V
CERM

64M_GRAM_DECOUP

0.1UF

10V
CERM

20%

402

64M_GRAM_DECOUP

0.1UF

20%
10V
CERM
402

64M_GRAM_DECOUP

0.1UF

10V
402

20%
CERM

64M_GRAM_DECOUP

Y5V

10V

N20P80%

805

10UF10UF

805

N20P80%
10V
Y5V

64M_GRAM_DECOUP

SEE_TABLE

SDRAM_DDR_4MX32

BGA

SEE_TABLE

SDRAM_DDR_4MX32

BGA

SEE_TABLE

SDRAM_DDR_4MX32

BGA

BGA

SDRAM_DDR_4MX32

SEE_TABLE

+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN +2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN+2_5V_MAIN

MEMREFG_ACT_64M

5%

1/16W

MF

402

0

MEMREFG_PAS_64M

5%

1/16W

MF

402

0

+2_5V_MAIN

402

MF

1/16W

5%

1K

SEE_TABLE

MEMREFG_PAS_64M

402

CERM

10V

20%

0.1UF

MEMREFG_PAS_64M

0.1UF

10V
402

20%
CERM

1K

MF

1/16W

1%

402

64M_GRAM_DECOUP

64M_GRAM_DECOUP

1K

402

MF

1/16W

1%

MEMREFG_ACT_64M

CERM

50V

5%

402

100PF

MEMREFG_ACT_64M

TLV431A

SOT

64M_GRAM_DECOUP

0.1UF

CERM

20%
10V

402

64M_GRAM_DECOUP

20%

0.1UF

10V
CERM
402

64M_GRAM_DECOUP

0.1UF

CERM

20%
10V

402

64M_GRAM_DECOUP

0.001UF

CERM

50V

10%

402

64M_GRAM_DECOUP

0.1UF

10V

20%
CERM

402

64M_GRAM_DECOUP

0.1UF

CERM

20%
10V

402

64M_GRAM_DECOUP

0.1UF

10V

20%
CERM

402

64M_GRAM_DECOUP

0.001UF

10%
50V
CERM
402

0.001UF

CERM

50V

10%

402

64M_GRAM_DECOUP 64M_GRAM_DECOUP

0.001UF

402

CERM

50V

10%

64M_GRAM_DECOUP

0.001UF

402

10%
50V
CERM

64M_GRAM_DECOUP

0.001UF

402

CERM

50V

10%

0.001UF

402

10%
50V
CERM

64M_GRAM_DECOUP 64M_GRAM_DECOUP

0.001UF

402

CERM

50V

10%

64M_GRAM_DECOUP

0.001UF

402

10%
50V
CERM

64M_GRAM_DECOUP

0.001UF

402

CERM

50V

10%

0.1UF

10V
402

20%
CERM

64M_GRAM_DECOUP

64M_GRAM_DECOUP

20%
CERM

402

10V

0.1UF

MEMREFG_PAS_64M

R18

RES,0-OHM,5%,1/16W,0402

116S1000

1

MEMREFG_ACT_64M

RES,1K-OHM,5%,1/16W,0402

R18

1

116S1103

HYNIX_275_64M

CRITICAL

SDRAM,4MX32,DDR,275MHZ

U5,U36333S0250

2

21 69

051-6497

13

HYNIX_300_64MU5,U36333S0252

SDRAM,4MX32,DDR,300MHZ

CRITICAL

2

SAMSUNG_300_64M

U5,U36

SDRAM,4MX32,DDR,300MHZ

333S0251

CRITICAL

2

SAMSUNG_275_64M

U5,U36

SDRAM,4MX32,DDR,275MHZ

CRITICAL

333S0249

2

SGRBVREF

SGRBVREF

RFBD<68>

SGRBVREF

RFBBCAS_L

RFBBCAS_L

RFBD<64>
RFBD<65>

RFBBCKE
RFBBCS0_L
RFBBRAS_L

RFBBWE_L

RFBBCLK0_L

RFBBCLK0

RFBBBA<1>

RFBBBA<0>

RFBDQM<11>

RFBDQM<10>

RFBDQM<8>
RFBDQM<9>

RFBDQS<11>

RFBBA<11>

RFBBA<10>

RFBBA<9>

RFBBA<8>

RFBBA<7>

RFBBA<5>
RFBBA<6>

RFBDQS<10>

RFBDQS<9>

RFBDQS<8>

RFBBA<3>

RFBBA<2>

RFBBA<4>

RFBD<77>

RFBD<75>
RFBD<76>

RFBD<74>

RFBD<73>

RFBD<72>

RFBD<70>
RFBD<71>

RFBD<67>

RFBD<69>

RFBD<66>

RFBD<95>

RFBD<94>

RFBD<93>

RFBD<90>
RFBD<91>

RFBD<89>

RFBD<88>

RFBD<85>

RFBD<79>

RFBD<78>

RFBD<81>

RFBD<80>

RFBD<82>
RFBD<83>
RFBD<84>

RFBD<86>
RFBD<87>

RFBBA<11>

RFBBA<10>

RFBBA<9>

RFBBA<8>

RFBBA<7>

RFBBA<4>
RFBBA<5>
RFBBA<6>

RFBBA<2>
RFBBA<3>

RFBBA<1>

RFBBA<0>

RFBDQS<12>
RFBDQS<13>

RFBDQS<15>

RFBDQS<14>

RFBDQM<13>

RFBDQM<12>

RFBDQM<14>
RFBDQM<15>

RFBBBA<0>

RFBBCS0_L
RFBBRAS_L

RFBBWE_L

RFBD<96>

RFBD<98>

RFBD<97>

RFBD<101>

RFBD<99>
RFBD<100>

RFBD<103>

RFBD<102>

RFBD<104>
RFBD<105>
RFBD<106>

RFBD<108>

RFBD<107>

RFBD<111>

RFBD<109>
RFBD<110>

RFBD<113>

RFBD<112>

RFBD<114>
RFBD<115>
RFBD<116>

RFBD<118>
RFBD<119>

RFBD<117>

RFBD<120>
RFBD<121>

RFBD<123>
RFBD<124>

RFBD<122>

RFBD<125>
RFBD<126>

RFBBBA<1>

RFBD<127>

RFBBCLK1

RFBBCLK1_L

RFBBCKE

RFBBA<0>

NC_FB4<10>

NO_TEST

NC_FB4<9>

NO_TEST

NC_FB4<8>

NO_TEST

NC_FB4<7>

NO_TEST

NC_FB4<6>

NO_TEST

NC_FB4<5>

NO_TEST

NC_FB4<4>

NO_TEST

NC_FB4<3>

NO_TEST

NC_FB4<2>

NO_TEST

NC_FB4<1>

NO_TEST

NC_FB4<0>

NO_TEST

NC_FB3<10>

NO_TEST

NC_FB3<9>

NO_TEST

NC_FB3<8>

NO_TEST

NC_FB3<7>

NO_TEST

NC_FB3<6>

NO_TEST

NC_FB3<5>

NO_TEST

NC_FB3<4>

NO_TEST

NC_FB3<3>

NO_TEST

NC_FB3<2>

NO_TEST

NC_FB3<1>

NO_TEST

NC_FB3<0>

NO_TEST

RFBD<92>

RFBBA<1>

MEMREFG3

MEMREFG4

<XR_PAGE_TITLE>

C492

1

2

C15

1

2

C22

1

2

C23

1

2

C29

1

2

C34

1

2

C20

1

2

C31

1

2

C462

1

2

C488

1

2

C461

1

2

C469

1

2

C486

1

2

C476

1

2

C38

1

2

C460

1

2

U5

N5
N6

L6
M7

M6
N7
N8
M9

N9
N10
N11

M8

N4

M5

L2

M11
M12
N12

N2

B3
H12

H3
B12

B7
C6

J13
J12
G13
G12
F13
F12
F3
F2
G3
G2

B6

J3
J2
K2
K3
E13
D13
D12
C13
B10
B9

B5

C9
B8

C2
D3
D2
E2
K13
K12

B2
H13

H2
B13

M13

C4
C11

H4
H11
L12
L13

M3

M4

N3

M2

L9
M10

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H8
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F8
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G6
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C7

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D4
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H8
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R17

1 2

R5

1 2

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1

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C8

1

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1

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1

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1

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1

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1

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LAST_MODIFIED=Wed Sep 17 12:16:15 2003

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