Apple CORNHOLIO User Manual

8 7

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

6

5

4

SCHEMATIC,CORNHOLIO

3

REV

? ?

2 1

ZONE

DESCRIPTION OF CHANGE

ECN

?

CK APPD

DATE

? ?

ENG APPD

DATE

5/12/2009

D

Page

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

C

B

TABLE_TABLEOFCONTENTS_ITEM

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

(.csa)

1

1 2 3 4 5 6 7 8 9

Table of Contents

2

System Block Diagram

3

Power Block Diagram

4

BOM Configuration

5

Revision History

7

Functional / ICT Test

8

Power Aliases

9

Signal Aliases

10

CPU FSB

11

CPU Power & Ground

12

CPU Decoupling

13

eXtended Debug Port(MiniXDP)

14

MCP CPU Interface

15

MCP Memory Interface

16

MCP Memory Misc

17

MCP PCIe Interfaces

18

MCP Ethernet & Graphics

19

MCP PCI & LPC

20

MCP SATA & USB

21

MCP HDA & MISC

22

MCP Power & Ground

25

MCP Standard Decoupling

26

MCP Graphics Support

28

SB Misc

29

FSB/DDR3 Vref Margining

31

DDR3 SO-DIMM Connector A

32

DDR3 SO-DIMM Connector B

33

DDR3 Support

34

Right Clutch Connector

35

SECUREDIGITAL CARD READER

37

Ethernet PHY (RTL8211CL)

38

Ethernet & AirPort Support

39

Ethernet Connector

41

FireWire LLC/PHY (FW643E)

42

FireWire Port Power

43

FireWire Ports

45

SATA Connectors

46

External USB Connectors

48

Front Flex Support

49

SMC

50

SMC Support

51

LPC+SPI Debug Connector

Contents

Sync

N/A

DRAGON

N/A

WFERRY_K19I

K24_MLB

K19_MLB

T18_MLB

K19_MLB

WFERRY_K19I

K24_MLB

K19_MLB

T18_MLB

K19_MLB

(K19I_MLB)

K19_MLB

T18_MLB

K19_MLB

T18_MLB

(K19_MLB)

K19_MLB

Date

N/A

03/13/2008

N/A

01/13/2009

02/05/2009

01/06/2009

02/05/2009

03/04/2009

03/23/2009

02/05/2009

03/13/2009

02/05/2009

03/18/2009

02/05/2009

03/23/2009

02/05/2009

(11/25/2008)

02/05/2009

Page

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83

(.csa)

52

K19i SMBus Connections

53

VOLTAGE SENSING

54

Current Sensing

55

Thermal Sensors

56

Fan

57

WELLSPRING 1

58

WELLSPRING 2

59

Sudden Motion Sensor (SMS)

60

DEBUG SENSORS AND ADC

61

SPI ROM

62

AUDIO: CODEC/REGULATOR

63

AUDIO: LINE INPUT FILTER

65

AUDIO: HEADPHONE FILTER

66

AUDIO:SPEAKER AMP

67

AUDIO: JACKS

68

AUDIO: JACK TRANSLATORS

69

DC-In & Battery Connectors

70

PBus Supply & Battery Charger

71

IMVP6 CPU VCore Regulator

72

5V / 3.3V Power Supply

73

1.5V DDR3 Supply

75

MCP CORE REGULATOR

76

CPU VTT Power Supply

77

MISC POWER SUPPLIES

78

POWER SEQUENCING

79

POWER FETS

90

LVDS Display Connector

93

DISPLAYPORT SUPPORT

94

DisplayPort Connector

97

LCD BACKLIGHT DRIVER

98

LCD Backlight Support

99

LCD Backlight Driver (MC34845)

100

CPU/FSB Constraints

101

Memory Constraints

102

MCP Constraints 1

103

MCP Constraints 2

104

Ethernet Constraints

105

FireWire Constraints

106

SMC Constraints

108

K19i Specific Constraints

109

K19i PCB Rule Definitions

Contents

Sync

WFERRY_K19I

K24_MLB

WFERRY_K19I

K24_MLB

K19_MLB

CASEYHARDY_K19

K19_MLB

WFERRY_K19I

K19_MLB

(K19_MLB)

K24_MLB

K19_MLB

K24_MLB

K19_MLB

K24_MLB

VEMURI_K19I

T18_MLB

WFERRY_K19I

Date

12/12/2008

02/05/2009

12/16/2008

02/05/2009

02/25/2009

02/05/2009

03/25/2009

02/05/2009

03/17/2009

03/02/2009

02/05/2009

03/20/2009

03/17/2009

03/18/2009

02/05/2009

01/13/2009

02/04/2009

02/03/2009

(12/05/2008)

02/25/2009

02/05/2009

03/12/2009

02/05/2009

12/19/2008

02/05/2009

02/10/2009

03/16/2009

02/09/2009

02/05/2009

01/08/2009

12/12/2008

D

C

B

DIMENSIONS ARE IN MILLIMETERS

XX

A

Integration Issues to be Resolved

IN

MAKE_BASE=TRUE

XDP_TDO

IN

MAKE_BASE=TRUE

(Should rename J1300 nets now that JTAG level-shifter is gone)

8

JTAG_MCP_TDOJTAG_MCP_TDO XDP_TDO

7 6

OUT

5

4

X.XX

X.XXX

ANGLES

DO NOT SCALE DRAWING

THIRD ANGLE PROJECTION

DRAFTER

ENG APPD

QA APPD

RELEASE

3

METRIC

MATERIAL/FINISH

NOTED AS

APPLICABLE

DESIGN CK

MFG APPD

DESIGNER

SCALE

NONE

SIZE

2

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

TITLE

DRAWING NUMBER

D

APPLE INC.

051-7903

SHT

1

REV.

A

OF

1 83

A

8 7

6

U1000

INTEL CPU

2.X OR 3.X GHZ PENRYN

PG 9

5

U1300

XDP CONN

PG 12

4

3

2 1

FSB

D

PG 13

GPIOs

FSB INTERFACE

64-Bit

800/1067/1333 MHz

MAIN

MEMORY

PG 14

2 UDIMMs

DDR2-800MHZ

DDR3-1067/1333MHZ

J2900

DIMM

PG 25,26

J6950

U4900

DC/BATT

PG 60

D

POWER SUPPLY

TEMP SENSOR

CLK

SYNTH

J4510

SATA Conn

PG 38

HD

J4520

SATA Conn

PG 38

C

ODD

1.05V/3GHZ.

SATA

PG 19

NVIDIA

MCP79

U1400

J9000

LVDS CONN

PG 71

J9400

DISPLAY PORT

CONN

PG 71

LVDS OUT

RGB OUT

DP OUT

HDMI OUT

DVI OUT

TMDS OUT

PG 17

UP TO 20 LANES3

PCI-E

PG 16

B

RGMII

PG 17

PCI

(UP TO FOUR PORTS)

PG 18

Misc

PG 24

SPI

PG 20

LPC

PG 18

PWR

CTRL

J4720

Bluetooth

USB

PG 19

4 3 8 9 2

(UP TO 12 DEVICES)

10 5 6 7

SMB

PG 20

HDA

PG 20

PG 40

U6100

SPI

Boot ROM

PG 52

J4700

TRACKPAD/

KEYBOARD

PG 40

DIMM’s

J4710

J4900

IR

PG 40

B,0

BSB

SMC

PG 41

J4710

FanADC

CAMERA

PG 40

SMB

CONN

PG 44

J5650,5600,5610,5611,5660,5720,5730,5750

FAN CONN AND CONTROL

Ser Prt

J3900,4635,4655

EXTERNAL

USB

Connectors

PG 41

POWER SENSE

PG 45

PG 48,49

J5100

Port80,serial

PG 39

LPC Conn

PG 43

C

B

U6200

U3700

A

J3400 U3900

Mini PCI-E

AirPort

PG 28

8

7 6

GB

E-NET

88E1116

PG 31

E-NET

Conn

PG 33

5

U6301 U6500U6400

Line In

Amp

PG 54

HEADPHONE

Amp Amp

J6800,6801,6802,6803

4

Audio Codec

PG 53

Audio Conns

PG 59

Line Out

PG 56PG 55

U6600,6605,6610,6620

Speaker

Amps

PG 57

System Block Diagram

OF

2

1

SYNC_DATE=N/A

REV.

A

83

A

SYNC_MASTER=N/A

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

APPLE INC.

3

2

SCALE

D

NONE

051-7903

SHT

8 7

6

5

4

POWER SYSTEM ARCHITECTURE

3

2 1

D

ADAPTER

3S2P

(9 TO 12.6V)

C

PCI_RESET0#

15-1

B

A

AC

IN

J6950

MCP79

PM_SLP_S4_L

SLP_S3#

U1400

PM_SLP_S3_L

RC

DELAY

RC

DELAY

RC

DELAY

RC

DELAY

DCIN(16.5V)

11

15

Q3801

PM_SLP_S3_L

P1V8S0_EN

MCPDDR_EN

CPUVTTS0_EN

MCPCORES0_EN

6A FUSE

SMC_DCIN_ISENSE

BATT_POS_F

11-1

11-3

RC DELAY

11-2

RC DELAY

PM_ENET_EN_L

Q3802

16-3

16-2

16-3

16-4

01

U7970

A

Q7050

P3V3S3_EN

DDRREG_EN

P5VLTS3_EN

16

WOL_EN SMC_ADAPTER_EN

P1V05S0_EN

(S0)

P3V3S0_EN

(S0)

PBUSVSENS_EN

(S0)

P5VRTS0_EN_L

(S0)

CHGR_EN

(S5)

ENABLES

VIN

PBUS SUPPLY/ BATTERY CHARGER

ISL6258A

U7000

PPVBAT_G3H_CHGR_OUT

CHGR_BGATE

04-1

=DDRREG_EN

=DDTVTT_EN

16-2

16-1

SMC

U4900

BKLT_EN

VOUT

P16

P60

PPVBAT_G3H_CHGR_REG

01

PPBUS_G3H

04

SMC_PM_G2_EN

(S5)

02

VIN

GOSHAWK6P

U9701

ENA

ENETADD_EN

P1V2ENET_EN

02

VIN

1.5V

S5 S3

0.75V

TPS51116

U7300

MCPCORES0_EN

P5VLTS3_EN

11-2

D6905

U5403

SMC_BATT_ISENSE

A

RC DELAY

Q7800

PPVOUT_S0_LCDBKLT

VOUT

1.2V YUKON

U3850

VIN

RUN1

LTC34074

RUN2

VOUT1

VOUT2

14

02

7A FUSE

02

IMVP_VR_ON

25

06

P1V05_S5_EN

P5VRTS0_EN_L

05

P3V3S5_EN_L

SMC_PM_G2_EN

(1.9V) PPVOUT_ENET_AVDD_REG

VOUT1

(0.8A MAX CURRENT)

PP1V2_ENET_REG

VOUT2

(0.8A MAX CURRENT)

S3 TO S0

FETS

(Q7901 & Q7971)

MCP_CORE

EN2

EN1

VIN

5V (LT)

ISL6236

U7500

VOUT2

VOUT1

PPVIN_G3H_P3V42G3H

PBUS_VSENSE

PPBUS_G3H

CPUVTTS0_EN

(S0)

CPU VCORE

VIN

ISL9504B

VR_ON

PP1V5_S0_FET

PPVCORE_S0_MCP_REG_R

(25A MAX CURRENT)

PP5VLT_S3_REG

(7A MAX CURRENT)

VOUT

PGOOD

U7400

06

02

VIN

5V

(RT)

3.3V

VOUT1

VOUT2

EN1

EN2

TPS51125

U7200

PGOOD1,2

VREG3

P5V3V3_PGOOD

PP1V5_S3_REG

(12A MAX CURRENT)

PP0V75_S0_REG

(1A MAX CURRENT)

02

Q5315

V

EN_PSV

U5480

A

SMC_CPU_ISENSE

VR_PWRGOOD_DELAY

P1V05S0_EN

1.05V (S5)

TPS62510

VOUT

U7750

PP5VRT_S0_REG

(4A MAX CURRENT)

PP3V3_S5_REG

20

12

CURRENT)

PP1V5_S0

R5490

(4A MAX

R5491

ENABLE

3.425V G3HOT LT3470

U6990

02

VIN

VOUT

CPUVTT

(1.05V)

TPS51117

U7600

PGOOD

CPUVTTS0_PGOOD

SMC_CPU_VSENSE

V

1.05V SO

FETS

(Q7951 TO Q7953)

PP1V05_S5_REG

08

Q7910

Q7930

Q3810

21

PPVCORE_S0_MCP

PP5VLT_S3

PP3V42_G3H_REG

VOUT

PPCPUVTT_S0_REG_R

(8A MAX CURRENT)

PPVCORE_CPU_S0_REG

(44A MAX CURRENT)

28

PP1V05_S0_FET

P3V3S3_EN

P3V3S0_EN

P3V3_ENET_FET

P3V3ENET_EN_L

1.8V LDO

TPS79918DRV

U7760

PP1V8_S0_REG

03

23

26

22

PP3V3_S0_FET

PP3V3_S0 PP1V5_S0 PP1V05_S0

RN5VD30A-F

R5492

19-1

SMC PWRGD

U5000

PPCPUVTT_S0

4.6V AUDIO MAX8902A

VIN

U6201

EN

PP5VRT_S0

PP3V3_S5

PP3V3_S3_FET

18

CPUVTTS0_PGOOD

P5V_LT_S3_PGOOD

S0PGOOD_PWROK

V1 V2 V3

04

PP4V6_AUDIO_ANALOG

VOUT

17

07

13

ALL_SYS_PWRGD

P5V3V3_PGOOD

MCPCORESO_PGOOD

RST*

LTC2909

U7870

MCP_PS_PWRGD

U2850

24

RSMRST_PWRGD

09

SMC_ONOFF_L

05

SLP_S5_L SLP_S4_L SLP_S3_L

29

MCP79

PWRBTN*

PLTRST* RSMRST*

PS_PWRGD

CPUPWRGD(GPIO49)

CPU_RESET#

U1400

CPU

PWRGOOD

RESET*

U1000

SMC

RSMRST_OUT(P15)

PWRGD(P12)

RSMRST_IN(P13)

PWR_BUTTON(P90)

SLP_S5_L(P95) SLP_S4_L(P94) SLP_S3_L(P93)

99ms DLY

IMVP_VR_ON(P16)

PLT_RST*

P17(BTN_OUT)

RST*

U4900

Power Block Diagram

SYNC_MASTER=DRAGON

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE

APPLE INC.

SCALE

06-1

31

LPC_RESET_L

CPU_PWRGD

30

FSB_CPURST_L

32

PM_RSMRST_L

IMVP_VR_ON

PM_PWRBTN_L SMC_RESET_L

DRAWING NUMBER

D

NONE

10

25

SYNC_DATE=03/13/2008

051-7903

SHT

OF

3

D

C

B

A

REV.

A

83

8

7 6

5

4

3

2

1

8 7

6

5

4

3

2 1

BOM Variant

BOM NUMBER

630-9977 085-0737

BOM Groups

D

BOM GROUP

K19_COMMON

K19_PROGPARTS K19_DEVEL_ENG K19_DEVEL_PVT K19_DEBUG_ENG K19_DEBUG_PVT

K19_DEBUG_PROD

Module Parts

PART NUMBER

337S3693 337S3704

337S3756

C

337S3641 338S0710 338S0694 338S0654

K19_MCP

K19_MISC

BOM NAME

PCBA,CORNHOLIO,MLB,K19I

K19I MLB DEVELOPMENT

QTY

1 1 1 1 1 1 1 1 1

DESCRIPTION

PDC,SLGE3,PRQ,2.00,25W,1066,R0,3M,BGA

PDC,SLGE2,PRQ,2.26,25W,1066,R0,3M,BGA

PDC,LGDZ,PRQ,2.40,25W,1066,R0,3M,BGA

PDC,SL3BX,PRQ,2.5,35W,1066,C0,6M,BGA

PDC,SLCFG,PRQ,2.53,25W,1066,R0,3M,BGA

PDC,SLB43,PRQ,2.8,35W,1066,C0,6M,BGA

IC,MCP79MXT-B3,35x35MM,BGA1437

IC,RTL8251CA-VB-GR,GIGE TRANSCEIVER,48P

IC-FW643-E,1394B PHY/OHCI LINK/PCI-E,12

BOM OPTIONS

K19_COMMON,CPU_2_53GHZ,EEE_6Z9

K19_DEVEL_PVT

BOM OPTIONS

COMMON,ALTERNATE,K19_MCP,K19_MISC,K19_DEBUG_PVT,K19_PROGPARTS

MCP_B03,BOOT_MODE_USER

DP_ESD,EXTRACT_BUFF,ISL6258A,K19I,KB_BL,MIKEY,LDO_YES

BOOTROM_PROG,SMC_PROG,IR_PROG,WELLSPRING_PROG

BMON_ENG,DEBUG_ADC,XDP_CONN,LPCPLUS,VREFMRGN,BKLT_FS

LPCPLUS

DEVEL_BOM,SMC_DEBUG_YES,XDP

DEVEL_BOM,BMON_PROD,SMC_DEBUG_YES,XDP,NO_VREFMRGN

BMON_PROD,SMC_DEBUG_YES,XDP,LPCPLUS_NOT,NO_VREFMRGN

REFERENCE DES

U1000 U1000 U1000 U1000 U1000 U1000 U1400 U3700 U4100

CRITICAL

CRITICAL CRITICAL CRITICAL337S3680 CRITICAL337S3640 CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL

BOM OPTION

CPU_2_0GHZ

CPU_2_26GHZ

CPU_2_4GHZ CPU_2_5GHZ

CPU_2_53GHZ

CPU_2_8GHZ

MCP_B03

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

Bar Code Label / EEE #

PART NUMBER

826-4393

QTY

1

DESCRIPTION

LBL,P/N LABEL,PCB,28MM X 6 MM

REFERENCE DES

[EEE:6Z9]

CRITICAL

BOM OPTION

EEE_6Z9

D

C

Programmable Parts

335S0610 341S2458 338S0633 341S2384

Development BOM

PART NUMBER

085-0737 CRITICAL

B

Alternate Parts

PART NUMBER

138S0603 152S0968 128S0220 152S0778 152S0796 152S0685

157S0058 157S0055

128S0093 152S0874 152S0847

ALTERNATE FOR PART NUMBER

138S0602 152S0966 128S0262 152S0693

152S0138152S0694

104S0023104S0018 128S0218 152S0516 152S0586

1 1 1 1 1 1 1

QTY

1

IC,SMC,HS8/2117,9X9MM,TLP,HF

IC,PRGRM,SMC EXTERNAL,K19I

IC,FLASH,SPI,32MBIT,3.3V,86MHZ,8-SOP

IC,PRGRM,UNLOCK,K19I

IC,CYPRS,CY7C63803-LQXC,4X4MM,USB,24-QFN

IR,ENCORE II,CY7C63803-LQXC

IC,PSOC+ W/ USB,56 PIN,MLF,CY8C24794

IC,TP PSOC,M97,M98

DESCRIPTION

K19I MLB DEVELOPMENT

BOM OPTION

REF DES

ALL ALL ALL ALL ALL ALL ALL ALL ALL ALL ALL

COMMENTS:

Murata alt to Samsung

Maglayer alt to Delta

KEMET alt to SANYO

CYNTEC AS ALTERNATE

MAGLAYERS AS ALTERNATE

DELTA AS ALTERNATE

DALE/VISHAY AS ALTERNATE

KEMET AS ALTERNATE

MAGLAYERS AS ALTERNATE

U4900 U4900 U6100 U6100 U4800 U4800 U5701

U57011341S2503 CRITICAL

REFERENCE DES

DEVEL

TABLE_ALT_HEAD

TABLE_ALT_ITEM

CRITICAL338S0563 CRITICAL341S2460 CRITICAL CRITICAL

CRITICAL CRITICAL337S2983

CRITICAL

SMC_BLANK

SMC_PROG

BOOTROM_BLANK

BOOTROM_PROG

IR_BLANKCRITICAL

IR_PROG

WELLSPRING_BLANK

WELLSPRING_PROG

BOM OPTION

DEVEL_BOM

B

A

PART NUMBER

820-2533

BOM Configuration

SYNC_MASTER=N/A

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

QTY

1 1

DESCRIPTION

SCHEM,CORNHOLIO,K19

PCBF,MLB IG,K19

8

REFERENCE DES

SCH PCB

CRITICAL

CRITICAL051-7903 CRITICAL

BOM OPTION

7 6

APPLE INC.

5

4

3

2

SIZE

D

SCALE

NONE

051-7903

SHT

OF

4

1

SYNC_DATE=N/A

REV.

A

83

A

8 7

Revision History

6

5

4

3

2 1

D

C

D

C

B

A

NOTE: All page numbers are .csa, not PDF. See page 1 for .csa -> PDF mapping.

8

7 6

5

B

Revision History

SYNC_MASTER=N/A

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

APPLE INC.

4

3

2

SCALE

D

NONE

051-7903

SHT

OF

5

1

SYNC_DATE=N/A

REV.

A

83

A

8 7

6

5

4

3

2 1

Fan Connectors

FUNC_TEST

TRUE

TRUE TRUE

TRUE

PP5V_S0 FAN_RT_PWM

FAN_RT_TACH GND

LVDS Connector

D

C

FUNC_TEST

TRUE TRUE TRUE

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE

PP3V3_S0 PP3V3_SW_LCD PPVOUT_S0_LCDBKLT

LVDS_DDC_CLK LVDS_DDC_DATA LVDS_CONN_A_DATA_N<0> LVDS_CONN_A_DATA_P<0> LVDS_CONN_A_DATA_N<1> LVDS_CONN_A_DATA_P<1> LVDS_CONN_A_DATA_N<2> LVDS_CONN_A_DATA_P<2> LVDS_CONN_A_CLK_F_N LVDS_CONN_A_CLK_F_P LVDS_CONN_B_DATA_N<0> LVDS_CONN_B_DATA_P<0> LVDS_CONN_B_DATA_N<1> LVDS_CONN_B_DATA_P<1> LVDS_CONN_B_DATA_N<2> LVDS_CONN_B_DATA_P<2> LVDS_CONN_B_CLK_F_N LVDS_CONN_B_CLK_F_P LED_RETURN_1 LED_RETURN_2 LED_RETURN_3 LED_RETURN_4 LED_RETURN_5 LED_RETURN_6 BKL_ISEN1 BKL_ISEN2 BKL_ISEN3 BKL_ISEN4 BKL_ISEN5 BKL_ISEN6

GND

IPD Flex Connector

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

B

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE

PP3V3_S3_LDO PP18V5_S3 Z2_CS_L Z2_DEBUG3 Z2_MOSI Z2_MISO Z2_SCLK Z2_BOOST_EN Z2_HOST_INTN Z2_CLKIN Z2_KEY_ACT_L Z2_RESET PSOC_MISO PSOC_MOSI PSOC_SCLK SMBUS_SMC_A_S3_SDA SMBUS_SMC_A_S3_SCL PSOC_F_CS_L PICKB_L

GND

SD Card Connector

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE

TRUE

SD_D<7..0> SD_CMD SD_CLK SD_CD_L SD_WP

GND

Speaker Connectors

A

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE

BI_MIC_LO BI_MIC_SHIELD BI_MIC_HI SPKRCONN_L_OUT_P SPKRCONN_L_OUT_N SPKRCONN_R_OUT_P SPKRCONN_R_OUT_N SPKRCONN_S_OUT_P SPKRCONN_S_OUT_N

GND

72 64 65 67

3 TPs

7

37 42 47 49 61 68 70

47

5 TPs

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57 69

6

51 69 72 74

8

17 69

8

17 69

8

69

8

69

8

69

8

69

8

69

8

69

69 82

8

69

8

69

8

69

8

69

8

69

8

69

69 82

69 72 74

72

5 TPs

6

49

6

49

48 49

49

48 49

6

29 40 43 49 81

6

29 40 43 49 81

48 49

2 TPs

30 82

30

2 TPs

57 58

56 57 82

6 TPs

SATA ODD Connectors

FUNC_TEST

TRUE

TRUE TRUE TRUE TRUE TRUE

TRUE

PP5V_SW_ODD

SMC_ODD_DETECT SATA_ODD_R2D_P SATA_ODD_R2D_N SATA_ODD_D2R_C_N SATA_ODD_D2R_C_P

GND

Keyboard Connector

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE

PP3V3_S3 PP3V42_G3H WS_KBD1 WS_KBD2 WS_KBD3 WS_KBD4 WS_KBD5 WS_KBD6 WS_KBD7 WS_KBD8 WS_KBD9 WS_KBD10 WS_KBD11 WS_KBD12 WS_KBD13 WS_KBD14 WS_KBD15_CAP WS_KBD16_NUM WS_KBD17 WS_KBD18 WS_KBD19 WS_KBD20 WS_KBD21 WS_KBD22 WS_KBD23 WS_KBD_ONOFF_L WS_LEFT_SHIFT_KBD WS_LEFT_OPTION_KBD WS_CONTROL_KBD KBDLED_ANODE

GND

Airport/BT/Camera Conn.

FUNC_TEST

PCIE_MINI_D2R_P

TRUE

PCIE_MINI_D2R_N

TRUE

PCIE_MINI_R2D_P

TRUE

PCIE_MINI_R2D_N

TRUE

PCIE_CLK100M_MINI_CONN_P

TRUE

PCIE_CLK100M_MINI_CONN_N

TRUE

MINI_CLKREQ_Q_L

TRUE

PCIE_WAKE_L

TRUE

MINI_RESET_CONN_L

TRUE

PP5V_WLAN

TRUE

PP5V_S3_BTCAMERA_F

TRUE

SMBUS_SMC_A_S3_SDA

TRUE

SMBUS_SMC_A_S3_SCL

TRUE

USB_CAMERA_CONN_P

TRUE

USB_CAMERA_CONN_N

TRUE

CONN_USB2_BT_P

TRUE

CONN_USB2_BT_N

TRUE

GND

TRUE

SATA HDD Connector

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE

PP5V_S0_HDD_FLT PP5V_S3_IR_R SATA_HDD_R2D_P SATA_HDD_R2D_N SATA_HDD_D2R_C_P SATA_HDD_D2R_C_N IR_RX_OUT SYS_LED_ANODE_R

GND

KBD Backlight Conn.

FUNC_TEST

TRUE TRUE

TRUE

Functional Test Points

DC Power Connector

FUNC_TEST

TRUE TRUE

TRUE

Battery Connector

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE

TRUE

FUNC_TEST

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE

KBDLED_ANODE SMC_KDBLED_PRESENT_L

GND

4 TPs

6

37 51

37 40

37 77

3 TPs

6 7

20 25 29 30 43 48 50 68

6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 48

48

6

49

2 TPs

16 29 77

29 77 82

29 82

29

16 29

29

6

29 40 43 49 81

6

29 40 43 49 81

29 82

10 TPs

4 TPs

6

37

37 77

37 39

37

6 TPs

6

49

2 TPs

PP18V5_DCIN_FUSE ADAPTER_SENSE

GND

PPVBAT_G3H_CONN SMBUS_SMC_BSA_SCL SMBUS_SMC_BSA_SDA SYS_DETECT_L GND_BATT_CHGND

BIL Connector

PP3V42_G3H SMC_LID_R SMBUS_SMC_BSA_SCL SMBUS_SMC_BSA_SDA SMC_BIL_BUTTON_L

GND

Power Nets

PPVCORE_S0_CPU PPVCORE_S0_MCP PP0V75_S0_DDRVTT PP1V05_S0 PP1V5_S0 PP1V8_S0 PP3V3_S0 PP1V5_S3 PP3V3_S3 PP1V05_S5 PP3V3_S5 PP3V42_G3H PPBUS_G3H PP3V3_ENET PP1V05_ENET PP5V_S3 PP3V3_S5_AVREF_SMC PP18V5_S3 PP3V3_S3_LDO PPVOUT_S0_LCDBKLT PP4V5_AUDIO_ANALOG SMC_PM_G2_EN PM_SLP_S4_L PM_SLP_S3_L PP1V05_S5 PP5V_SW_ODD PP5V_S0_HDD_FLT BKL_VLDO

GND

3 TPs

59

3 TPs

59 60

6

40 43 59 60 81

6

40 43 59 60 81

59

8

59

6 TPs

43 45 48 59 60 67 42 41 38 40

3 TPs

6 7

20

21 24 59

6

40 43 59 60 81

6

40 43 59 60 81

40 41 59

3 TPs

7

10 11 44 61

7

21 22 44 64

7

26 27 63 68

7 9

10 11 12 13 16 17 19 21 22

23 35 61 65 66 67 7

10 11 15 22 37 66 67 68 82

7

17 23 53 66

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57 7

26 27 28 63 68

6 7

20 25 29 30 43 48 50 68

6 7

21 22 32 66

7

17 19 21 22 24 28 32 35 36 42

52 62 66 67 68 69 71 82 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 7

35 44 45 59 60 62 63 64 73

7

17 22 31 32

7

17 22 31 32

7 8

29 37 38 39 41 49 51 53 62

63 68 40 41

6

49

6

49

6

51 69 72 74

53

8

40 62 67

20 38 40 41 67

20 32 35 40 67 71

6 7

21 22 32 66

6

37 51

6

37

72

6 TPs

NO_TEST

TRUE TRUE TRUE

TRUE

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

ICT Test Points

NC_AUD_LO1_N_L

6

53

NC_AUD_LO1_P_L NC_AUD_LO1_P_L

6

53

NC_USB_10N

6

19

NC_USB_10P

6

19

NC_ENET_INTR_L

6

17

NC_ENET_PWRDWN_L

6

17

NC_ISSP_SCLK_P1_1

6

48

NC_ISSP_SDATA_P1_0

6

48

NC_LCDBKLT_FAIL

6

NC_LPC_DRQ0_L

6

18

TP_MEM_A_CKE<3..2> NC_MEM_A_CLK2N

6

14

NC_MEM_A_CLK3N

6

15

NC_MEM_A_CLK3P

6

15

NC_MEM_A_CLK4P

6

15

NC_MEM_A_CS_L<3>

6

15

TP_MEM_A_ODT<3..2>

NC_MEM_B_CKE<2>

6

15

NC_MEM_B_CLK3P

6

15

NC_MEM_B_CLK4N

6

15

NC_MEM_B_CLK4P

6

15

NC_MEM_B_CLK5N

6

15

NC_MEM_B_ODT<2>

6

15

NC_MLB_RAM_SIZE

6

20

NC_P7_7

6

48

TP_PCI_AD<31..8>

TP_PCI_C_BE_L<3..0>

NC_PCI_CLK0

6

18

NC_PCI_CLK1

6

18

NC_PCI_DEVSEL_L

6

18

NC_PCI_FRAME_L

6

18

NC_PCI_GNT0_L

6

18

NC_PCI_GNT1_L

6

18

NC_PCI_INTW_L

6

18

NC_PCI_INTX_L

6

18

NC_PCI_INTZ_L

6

18

NC_PCI_IRDY_L

6

18

NC_PCI_PERR_L

6

18

NC_PCI_RESET1_L

6

18

NC_PCI_SERR_L

6

18

NC_PCI_STOP_L

6

18

NC_PCI_TRDY_L

6

18

NC_PCIE_CLK100M_PE4N

6

16

NC_PCIE_CLK100M_PE4P

6

16

NC_PCIE_CLK100M_PE5N

6

16

NC_PCIE_CLK100M_PE5P

6

16

NC_PCIE_CLK100M_PE6P

6

16

NC_PCIE_PE4_D2RN

6

16

NC_PCIE_PE4_R2D_CN

6

16

NC_PE4_PRSNT_L

6

16

NC_PSOC_P1_3

6

48

NC_PSOC_SDA

6

48

NC_SATA_C_D2RP

6

19

NC_SATA_C_R2D_CN

6

19

NC_SATA_C_R2D_CP

6

19

NC_SATA_D_D2RN

6

19

NC_SATA_D_D2RP

6

19

NC_SB_A20GATE

6

20

FSB_A_L<31..3> FSB_ADS_L FSB_ADSTB_L<1..0>

FSB_D_L<63..0> FSB_DINV_L<3..0> FSB_DSTB_L_N<3..0>

FSB_DSTB_L_P<3..0> FSB_HIT_L FSB_HITM_L FSB_LOCK_L FSB_REQ_L<4..0> MCPCORES0_OCSET USB_BT_N USB_BT_P USB_CAMERA_N USB_CAMERA_P SATA_ODD_D2R_UF_N SATA_ODD_D2R_UF_P DP_ML_C_P<3..0>

9

13 75

9

13 75

9

13 75

9

13 75

9

13 75

9

13 75

9

13 75

9

13 75

9

13 75

9

13 75

13 75 9

19 29 78

37 82

71 82

NC_AUD_LO1_N_L

NC_USB_10N NC_USB_10P NC_ENET_INTR_L NC_ENET_PWRDWN_L

NC_ISSP_SCLK_P1_1 NC_ISSP_SDATA_P1_0 NC_LCDBKLT_FAIL NC_LPC_DRQ0_L

NC_MEM_A_CKE<3..2> NC_MEM_A_CLK2N NC_MEM_A_CLK3N NC_MEM_A_CLK3P NC_MEM_A_CLK4P NC_MEM_A_CS_L<3> NC_MEM_A_ODT<3..2>

NC_MEM_B_CKE<2> NC_MEM_B_CLK3P NC_MEM_B_CLK4N NC_MEM_B_CLK4P NC_MEM_B_CLK5N NC_MEM_B_ODT<2> NC_MLB_RAM_SIZE NC_P7_7 NC_PCI_AD<31..8>

NC_PCI_C_BE_L<3..0>

NC_PCI_CLK0 NC_PCI_CLK1 NC_PCI_DEVSEL_L NC_PCI_FRAME_L NC_PCI_GNT0_L NC_PCI_GNT1_L NC_PCI_INTW_L NC_PCI_INTX_L NC_PCI_INTZ_L NC_PCI_IRDY_L NC_PCI_PERR_L NC_PCI_RESET1_L NC_PCI_SERR_L NC_PCI_STOP_L NC_PCI_TRDY_L NC_PCIE_CLK100M_PE4N NC_PCIE_CLK100M_PE4P NC_PCIE_CLK100M_PE5N NC_PCIE_CLK100M_PE5P NC_PCIE_CLK100M_PE6P NC_PCIE_PE4_D2RN NC_PCIE_PE4_R2D_CN NC_PE4_PRSNT_L NC_PSOC_P1_3 NC_PSOC_SDA NC_SATA_C_D2RP NC_SATA_C_R2D_CN NC_SATA_C_R2D_CP NC_SATA_D_D2RN NC_SATA_D_D2RP NC_SB_A20GATE

NO_TEST

MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE

TRUE TRUE TRUE TRUE TRUE TRUE

TRUE TRUE TRUE TRUE

TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

TRUE

TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE

Note.

NO_TEST properties are also on page9,26,43,50

Functional / ICT Test

SYNC_MASTER=N/A

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

APPLE INC.

D

SCALE

NONE

051-7903

SHT

6

53

6

53

6

19

6

19

6

17

6

17

6

48

6

48

6

18

15

6

14

6

15

6

15

6

15

6

15

6

15

6

15

6

15

6

15

6

15

6

15

6

20

6

48

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

18

6

16

6

16

6

16

6

16

6

16

6

16

6

16

6

16

6

48

6

48

6

19

6

19

6

19

6

19

6

19

6

20

SYNC_DATE=N/A

REV.

A

OF

83

D

C

B

A

8

7 6

5

4

3

2

1

2 1

PP1V5_S0

MIN_LINE_WIDTH=0.6mm MIN_NECK_WIDTH=0.2mm VOLTAGE=1.5V MAKE_BASE=TRUE

PP1V5_S0 PP1V5_S0 PP1V5_S0

PP1V5_S0 PP1V5_S0

GND GND

K19i uses GND reference for ALL DDR3 signals.

PP1V05_S5

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.05V MAKE_BASE=TRUE

PP1V05_S5 PP1V05_S5

PP1V05_ENETPP1V05_ENET

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.05V MAKE_BASE=TRUE

PP1V05_ENET PP1V05_ENET PP1V05_ENET

PP1V05_S0

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.05V MAKE_BASE=TRUE

4500 mA

1182 mA

1034 mA

PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0

PP1V05_S0_MCP_PLL_UF

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.05V MAKE_BASE=TRUE

PP1V05_S0_MCP_PLL_UF PP1V05_FW

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.05V MAKE_BASE=TRUE

PP1V05_FW PP1V05_FW

PPVCORE_S0_CPU

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.25 mm VOLTAGE=1.25V MAKE_BASE=TRUE

PPVCORE_S0_CPU PPVCORE_S0_CPU

PPVCORE_S0_MCP

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.05V MAKE_BASE=TRUE

PPVCORE_S0_MCP PPVCORE_S0_MCP

PPVTTDDR_S3

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=0.75V MAKE_BASE=TRUE

PP0V75_S0_DDRVTT

MIN_LINE_WIDTH=2 mm MIN_NECK_WIDTH=0.17 mm VOLTAGE=0.75V MAKE_BASE=TRUE

PP0V75_S0_DDRVTT PP0V75_S0_DDRVTT PP0V75_S0_DDRVTT

Power Aliases

SYNC_MASTER=N/A

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE

APPLE INC.

SCALE

D

NONE

DRAWING NUMBER

051-7903

SHT

6 7

10 11 15 22 37 66 67 68

82

6 7

10 11 15 22 37 66 67 68

82 6 7

10 11 15 22 37 66 67 68

82 6 7

10 11 15 22 37 66 67 68

82

6 7

10 11 15 22 37 66 67 68

82 6 7

10 11 15 22 37 66 67 68

82

6 7

21 22 32 66

6 7

21 22 32 66

6 7

21 22 32 66

6 7

17 22 31 32

6 7

17 22 31 32

6 7

17 22 31 32

6 7

17 22 31 32

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67 6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

7

22 66

7

22 66

7

34 35

7

34 35

7

34 35

6 7

10 11 44 61

6 7

10 11 44 61

6 7

10 11 44 61

6 7

21 22 44 64

6 7

21 22 44 64

6 7

21 22 44 64

7

25 63

6 7

26 27 63 68

6 7

26 27 63 68

6 7

26 27 63 68

6 7

26 27 63 68

SYNC_DATE=N/A

OF

7

D

C

B

A

REV.

A

83

58 61 66

66 67 68

58 61 66

66 67 68

3

PP1V5_S0

6 7

10 11 15 22 37 66 67 68

82

PP1V05_S5

6 7

21 22 32 66

6 7

17 22 31 32

PP1V05_S0

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

6600 MA

241 mA max load

PP1V05_S0_MCP_PLL_UF

7

22 66

35

PP1V05_FW

7

34 35

35

PPVCORE_S0_CPU

6 7

10 11 44 61

PPVCORE_S0_MCP

6 7

21 22 44 64

35

PPVTTDDR_S3

7

25 63

PP0V75_S0_DDRVTT

6 7

26 27 63 68

1.5V S0 Rail

130 mA

4771 mA

DDR3 Reference Plane

1.05V Rails

105 mA/241 mA 139 mA/ 0 mA

Chipset "VCore" Rails

0.75V Rails

8 7

PPBUS_G3H

6 7

35 44 45 59 60 62 63 64

73

D

C

PPBUS_CPU_IMVP_ISNS

7

45 61 65

PP3V42_G3H

6 7

20 21 24 38 40 41 42 43

45 48 59 60 67

PPDCIN_S5

7

59 60

DCIN Rail

"FW" (FireWire) Rail

"G3Hot" (Always-Present) Rails

PPVP_FW

7

35 36

5V Rails

PP5V_S3

6 7 8

29 37 38 39 41 49 51 53

62 63 68

B

PP5V_S0

6 7

37 42 47 49 61 64 65 67

68 70 72

MCP79 PCIe/SATA Rails

A

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

PP1V05_S0_MCP_PEX_AVDD

7

16 22

MAKE_BASE=TRUE

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

7

19 22

MAKE_BASE=TRUE

PPBUS_G3H

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.25 mm VOLTAGE=12.6V MAKE_BASE=TRUE

PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H

PPBUS_CPU_IMVP_ISNS

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.25 mm VOLTAGE=12.6V MAKE_BASE=TRUE

PPBUS_CPU_IMVP_ISNS PPBUS_CPU_IMVP_ISNS

PP3V42_G3H

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.42V MAKE_BASE=TRUE

PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H

PPDCIN_S5

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.25 mm VOLTAGE=18.5V MAKE_BASE=TRUE

PPDCIN_S5

PPVP_FW

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=12.6V MAKE_BASE=TRUE

PPVP_FW PPVP_FW

PP5V_S3

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM VOLTAGE=5V MAKE_BASE=TRUE

PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3

PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3

PP5V_S3

PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3

PP5V_S0

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=5V MAKE_BASE=TRUE

PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0

GND PP1V05_S0PP1V05_S0

GND PP1V05_S0_MCP_PEX_AVDD

PP1V05_S0PP1V05_S0 GND

PP1V05_S0_MCP_SATA_AVDDPP1V05_S0_MCP_SATA_AVDD GND

6

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

6 7

35 44 45 59 60 62 63 64 73

7

45 61 65

7

45 61 65

7

45 61 65

6 7

20 21 24 38 40 41 42 43 45

48 59 60 67

6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67 6 7

20 21 24 38 40 41 42 43 45

48 59 60 67

7

59 60

7

59 60

7

35 36

7

35 36

7

35 36

6 7 8

29 37 38 39 41 49 51 53

62 63 68

6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68 6 7 8

29 37 38 39 41 49 51 53

62 63 68

6 7

37 42 47 49 61 64 65 67 68

70 72

6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72 6 7

37 42 47 49 61 64 65 67 68

70 72

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

7

16 22

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

7

19 22

68 69 71 82

PP3V3_S5

6 7

17 19 21 22

24 28 32 35 36 42 52 62 66 67

PP3V3_S3

6 7

20 25 29 30 43 48 50 68

PP3V3_ENET

6 7

17 22 31 32

57 58 61 66 67 68 69 71 72 82

PP3V3_S0

6 7

12 17 18 20 21 22 23 26

27 35 37 41 43 45 46 47 49 53

PP3V3_FW

7

34 35 36

PP1V8_S0

6 7

17 23 53 66

500 mA max supply

PP1V5_S3

6 7

26 27 28 63 68

5

3.3V Rails

1.8V Rail

190 mA

1.5V S3 Rail

PP3V3_S5

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V MAKE_BASE=TRUE

PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5

PP3V3_S3

MIN_LINE_WIDTH=0.40MM MIN_NECK_WIDTH=0.20MM VOLTAGE=3.3V MAKE_BASE=TRUE

PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3

PP3V3_ENET

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V MAKE_BASE=TRUE

PP3V3_ENET PP3V3_ENET

PP3V3_S0

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V MAKE_BASE=TRUE

PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0

PP3V3_FW

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V MAKE_BASE=TRUE

PP3V3_FW PP3V3_FW

PP1V8_S0

MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.8V MAKE_BASE=TRUE

PP1V8_S0 PP1V8_S0

PP1V5_S3

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.5V MAKE_BASE=TRUE

PP1V5_S3 PP1V5_S3 PP1V5_S3 PP1V5_S3 PP1V5_S3

4

68 69 71 82 6 7

17 19 21 22

24 28 32 35 36 42 52 62 66 67

6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82 6 7

17 19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50 68

6 7

20 25 29 30 43 48 50

68 6 7

20 25 29 30 43 48 50 68

6 7

17 22 31 32

6 7

17 22 31 32

6 7

17 22 31 32

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57 6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57 58 61 66 67 68 69 71 72 82

6 7

12 17 18 20 21 22 23 26 27

37 41 43 45 46 47 49 53 57 58 61 66 67 68 69 71 72 82

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57

6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57 58 61 66 67 68 69 71 72 82

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57

6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57 58 61 66 67 68 69 71 72 82

6

41

7

12 17 18 20 21 22 23 26 27 12

37 41 43 45 46 47 49 53 57

6

58 61 66 67 68 69 71 72 82 7 17 18 20 21 22 23 26 27 35 37 43 45 46 47 49 53 57 58 61 66 67 68 69 71 72 82

6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57 67 68 69 71 72 82

6

41

7

12 17 18 20 21 22 23 26 27 12

45 46 47 49 53 57 58 61 66

6

67 68 69 71 72 82 7 17 18 20 21 22 23 26 27 35 37 43 45 46 47 49 53 57 58 61 69 71 72 82

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57 6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57 58 61 66 67 68 69 71 72 82

6

41

7

12 17 18 20 21 22 23 26 27 12

37 41 43 45 46 47 49 53 57

6

58 61 66 67 68 69 71 72 82 7 17 18 20 21 22 23 26 27 35 37 43 45 46 47 49 53 57 58 61 66 67 68 69 71 72 82

6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57 67 68 69 71 72 82

6

41

7

12 17 18 20 21 22 23 26 27 12

45 46 47 49 53 57 58 61 66

6

67 68 69 71 72 82 7 17 18 20 21 22 23 26 27 35 37 43 45 46 47 49 53 57 58 61 69 71 72 82

6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 53 57 71 72 82

6

41

12 17 18 20 21 22 23 26 27

7

12

49 53 57 58 61 66 67 68 69

6

71 72 82 7 17 18 20 21 22 23 26 27 35 37 43 45 46 47 49 53 57 58 61 82

7

34 35 36

7

34 35 36

7

34 35 36

6 7

17 23 53 66

6 7

17 23 53 66

6 7

17 23 53 66

6 7

26 27 28 63 68

6 7

26 27 28 63 68

6 7

26 27 28 63 68

6 7

26 27 28 63 68

6 7

26 27 28 63 68

6 7

26 27 28 63 68

35 37 41 43

58 61 66 67 68 69

35 37 41 43 45 46 47

66 67 68 69 71 72

8

7 6

5

4

3

2

1

8 7

Board Mounting Holes

ZT0965

HOLE-VIA-P5RP25

ZT0950

D

TH

3R2P5

1

SL-3.1X2.7-6CIR-NSP

ZT0990

(ORIGIN)

NOTE: VIAs represent non-plated holes with ground rings. Place VIAs in corresponding hole’s ground ring.

Left Speaker Standoffs

(Not to scale)

ZT0960

3R2P5

ZT0915

3R2P5

1

ZT0934

ZT0935

1

STDOFF-4.0OD3.0H-TH

(UPPER)

STDOFF-4.0OD3.0H-TH

(LOWER)

ZT0942

3R2P5

HOLE-VIA-P5RP25

C

I/O Row Pogos

(FW800)

(Audio)

SH0914

SM

SH0913

SM

SH0912

SM

SH0911

SM

SH0910

SM

SH0915

SM

SH0916

SM

1

1.4DIA-SHORT-EMI-MLB-M97-M98

(Ethernet)

1.4DIA-SHORT-EMI-MLB-M97-M98

(Mini-DP)

1.4DIA-SHORT-EMI-MLB-M97-M98

B

(Upper USB)

1.4DIA-SHORT-EMI-MLB-M97-M98

(Lower USB)

1.4DIA-SHORT-EMI-MLB-M97-M98

(SD Card)

1.4DIA-SHORT-EMI-MLB-M97-M98

ZT0940

3R2P5

1

ZT0945

1

2.0DIA-TALL-EMI-MLB-M97-M98

(Near BIL Connector)

GND_CHASSIS_AUDIO_JACK

6

CPU Thermal Module Holes

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0986

1

MCP Thermal Module Holes

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0930

1

STDOFF-4.5OD.98H-1.1-3.48-TH

Fan Screw Hole

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0988

1

CPU Pogo

2.0DIA-TALL-EMI-MLB-M97-M98

SH0903

SM

1

SO-DIMM Pogos

SH0900

SM

1

(LEFT)

Other Board Pogos

SH0905

SM

1

57

Bosses

ZT0985

1

ZT0984

2.0DIA-TALL-EMI-MLB-M97-M98

(Near IPD Connector)

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0981

1

ZT0982

1

SH0902

SM

1

(RIGHT)

SH0906

SM

1

5

4

3

CPU Signals

TP_IMVP6_CLKEN_L

8

61

IN

CPU_VID<0..6>

10 75

IN

MAKE_BASE=TRUE

CPU_BSEL<0..2>

9

75

IN

MAKE_BASE=TRUE

TP_CPU_PECI_MCP

8

13

BI

NC_PEG_CLK100MP

8

16 77

IN

NC_PEG_CLK100MN

8

16 77

IN

=PEG_R2D_C_P<0..15>

IN

=PEG_R2D_C_N<0..15>

IN

NC_PEG_D2RP<0..15>

16

MAKE_BASE=TRUE

NC_PEG_D2RN<0..15>

16

MAKE_BASE=TRUE

TP_PEG_PRSNT_L

8

16

MAKE_BASE=TRUE

PEG Signals

NO_TEST=TRUE

TP_IMVP6_CLKEN_L

MAKE_BASE=TRUE

IMVP6_VID<0..6> =MCP_BSEL<0..2>

TP_CPU_PECI_MCP

MAKE_BASE=TRUE

NC_PEG_CLK100MP

MAKE_BASE=TRUE

NC_PEG_CLK100MN

MAKE_BASE=TRUE

NC_PEG_R2DCP<0..15>

MAKE_BASE=TRUE

NC_PEG_R2DCN<0..15>

MAKE_BASE=TRUE

=PEG_D2R_P<0..15> =PEG_D2R_N<0..15>

TP_PEG_PRSNT_L

(Internal pull-up)

NO_TEST=TRUE

8

16

OUT

61

13

16 77

61 75

13

8

16

NC_USB_EXTCP

8

19 78

BI

NC_USB_EXTCN

8

19 78

BI

NC_USB_EXTDP

8

19 78

BI

NC_USB_EXTDN

8

19 78

BI

NC_USB_MINIP

8

19 78

BI

NC_USB_MININ

8

19 78

BI

NC_USB_EXCARDP

8

19 78

BI

NC_USB_EXCARDN

8

19 78

BI

AUD_IPHS_SWITCH_EN

18 58

IN

PCIe Signals

NC_PCIE_CLK100M_EXCARDP

MAKE_BASE=TRUE

NC_PCIE_CLK100M_EXCARDN

MAKE_BASE=TRUE

TP_EXCARD_CLKREQ_L

(Internal pull-up)

NC_PCIE_EXCARD_R2DCP

MAKE_BASE=TRUE

NC_PCIE_EXCARD_R2DCN

MAKE_BASE=TRUE

NC_PCIE_EXCARD_D2RP

TP_PCIE_EXCARD_PRSNT_L

(Internal pull-up)

PCIE_FW_PRSNT_L

NOSTUFF

1

R0925

0

5% 1/16W MF-LF 402

2

LVDS_CONN_A_CLK_P

MAKE_BASE=TRUE

LVDS_CONN_A_CLK_N

MAKE_BASE=TRUE

LVDS_CONN_A_DATA_P<0..2>

MAKE_BASE=TRUE

LVDS_CONN_A_DATA_N<0..2>

MAKE_BASE=TRUE

NC_LVDS_IG_A_DATAP<3>

MAKE_BASE=TRUE

NC_LVDS_IG_A_DATAN<3>NC_LVDS_IG_A_DATAN<3>

MAKE_BASE=TRUE

LVDS_CONN_B_CLK_P

MAKE_BASE=TRUE

LVDS_CONN_B_CLK_N

MAKE_BASE=TRUE

LVDS_CONN_B_DATA_P<0..2>

MAKE_BASE=TRUE

LVDS_CONN_B_DATA_N<0..2>

MAKE_BASE=TRUE

NC_LVDS_IG_B_DATAP<3>

MAKE_BASE=TRUE

NC_LVDS_IG_B_DATAN<3>

MAKE_BASE=TRUE

LVDS_BKL_ON

MAKE_BASE=TRUE

LCD_BKLT_PWM

MAKE_BASE=TRUE

LCD_PWR_EN

MAKE_BASE=TRUE

LVDS_DDC_CLK

MAKE_BASE=TRUE

LVDS_DDC_DATA

MAKE_BASE=TRUE

NO_TEST=TRUE

8

OUT

16 77

17 77

BI

8

16

8

16 77

8

16 77

8

16

16 35

8

17 69 77

8

17 69 77

6

69

6

69

8

17 69 77

8

17 69 77

6

69

6

69

8

17 73

8

17 72 73 74

8

17 69

6 8

17 69

6 8

17 69

40 62 67

PP5V_S3

6 7

29 37 38 39 41 49 51 53

62 63 68

PM_SLP_RMGT_L

8

20 32

IN

MAKE_BASE=TRUE

NC_RTL8211_REGOUT

8

31

IN

RTL8211_VDDREG

8

31

GND

IN

MCP_MII_PD

8

17

MAKE_BASE=TRUE

1

R0930

47K

5% 1/16W MF-LF 402

2

RTL8211_CLK125

8

31

IN

SMC_PM_G2_EN

6 8

IN

MAKE_BASE=TRUE

TP_GMUX_JTAG_TCK_L

8

16

IN

TP_GMUX_JTAG_TDI

8

18

IN

TP_GMUX_JTAG_TMS

8

18

IN

TP_GMUX_JTAG_TDO

8

16

MAKE_BASE=TRUE

MCP_HPLUG_DET2

8

17

MAKE_BASE=TRUE

1

R0920

20K

5% 1/16W MF-LF 402

2

17 69

NC_PCIE_CLK100M_EXCARDP

8

16 77

IN

NC_PCIE_CLK100M_EXCARDN

8

16 77

IN

TP_EXCARD_CLKREQ_L

8

16

MAKE_BASE=TRUE

NC_PCIE_EXCARD_R2DCP

8

16 77

IN

NC_PCIE_EXCARD_R2DCN

8

16 77

IN

NC_PCIE_EXCARD_D2RP

8

16 77

MAKE_BASE=TRUE

NC_PCIE_EXCARD_D2RN NC_PCIE_EXCARD_D2RN

8

16 77

MAKE_BASE=TRUE

TP_PCIE_EXCARD_PRSNT_L

8

16

MAKE_BASE=TRUE

NO_TEST=TRUE

LVDS Signals

LVDS_CONN_A_CLK_P

8

17 69 77

IN

LVDS_CONN_A_CLK_N

8

17 69 77

IN

LVDS_IG_A_DATA_P<0..2>

17 77

IN

LVDS_IG_A_DATA_N<0..2>

17 77

IN

NC_LVDS_IG_A_DATAP<3>

8

17 77

IN

8

17 77

IN

LVDS_CONN_B_CLK_P

8

17 69 77

IN

LVDS_CONN_B_CLK_N

8

17 69 77

IN

LVDS_IG_B_DATA_P<0..2>

17 77

IN

LVDS_IG_B_DATA_N<0..2>

17 77

IN

NC_LVDS_IG_B_DATAP<3>

8

17 77

IN

NC_LVDS_IG_B_DATAN<3>

8

17 77

IN

LVDS_BKL_ON

8

17 73

IN

LCD_BKLT_PWM

8

17 72 73 74

IN

LCD_PWR_EN

8

17 69

IN

LVDS_DDC_CLK

6 8

IN

LVDS_DDC_DATA

6 8

BI

DisplayPort Signals

(Aliases on page70.csa)

2 1

USB Signals

Audio Signals

Ethernet Signals

Power Signals

GMUX Signals

NC_USB_EXTCP

MAKE_BASE=TRUE

NC_USB_EXTCN

MAKE_BASE=TRUE

NC_USB_EXTDP

MAKE_BASE=TRUE

NC_USB_EXTDN

MAKE_BASE=TRUE

NC_USB_MINIP

MAKE_BASE=TRUE

NC_USB_MININ

MAKE_BASE=TRUE

NC_USB_EXCARDP

MAKE_BASE=TRUE

NC_USB_EXCARDN

MAKE_BASE=TRUE

1

R0902

10K

5% 1/16W MF-LF 402

2

XW0901

SM

12

PP5V_S3_AUDIO_AMP

MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.25 mm VOLTAGE=5V

PM_SLP_RMGT_L PM_SLP_RMGT_L

NC_RTL8211_REGOUT

MAKE_BASE=TRUE

RTL8211_VDDREG

MAKE_BASE=TRUE

MCP_MII_PD MCP_MII_PD MCP_MII_PD

RTL8211_CLK125

MAKE_BASE=TRUE

SMC_PM_G2_EN

TP_GMUX_JTAG_TCK_L

MAKE_BASE=TRUE

TP_GMUX_JTAG_TDI

MAKE_BASE=TRUE

TP_GMUX_JTAG_TMS

MAKE_BASE=TRUE

TP_GMUX_JTAG_TDO MCP_HPLUG_DET2

NO_TEST=TRUE

1

R0931

22

5% 1/16W MF-LF 402

2

8

19 78

8

19 78

8

19 78

8

19 78

8

19 78

8

19 78

8

19 78

8

19 78

56

8

OUT

8

OUT

8

31

8

31

8

OUT

8

OUT

8

OUT

20 32

17

D

C

B

6 8

40 62 67

OUT

8

16

8

18

8

18

8

16

OUT

8

17

OUT

Digital Ground

GND_BATT_CHGND

A

GND

MIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.20MM VOLTAGE=0V

8

6

59

7 6

ZT0951

4.0OD1.85H-M1.6X0.35

1

(Keyboard Protector)

ZT0952

4.0OD1.85H-M1.6X0.35

1

(IPD Protector)

FW643_WAKE_L

8

34 35

IN

FW_PLUG_DET_L

8

18 35

IN

MAKE_BASE=TRUE

MEM_VTT_EN MEM_VTT_EN

8

24 63 68

IN

MAKE_BASE=TRUE

NC_MEM_A_A<15>

8

26

MAKE_BASE=TRUE

NC_MEM_B_A<15>

8

27

MAKE_BASE=TRUE

5

FireWire Signals

FW643_WAKE_L

MAKE_BASE=TRUE

FW_PLUG_DET_L

Memory Signals

NO_TEST=TRUE

NC_MEM_A_A<15> NC_MEM_B_A<15>

4

8

OUT

34 35

8

18 35

8

24 63 68

8

26

8

27

Signal Aliases

SYNC_MASTER=WFERRY_K19I

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

APPLE INC.

3

2

SCALE

NONE

SYNC_DATE=01/13/2009

051-7903

SHT

OF

8

1

A

REV.

A

83

8 7

6

5

4

3

2 1

OMIT

AA4 AB2

AA3

D22

J4 L5

L4

K5 M3

N2

J1 N3

P5 P2

L2

P4 P1

R1

M1

K3

H2 K2

J3

L1

Y2

U5

R3 W6

U4

Y5 U1

R4 T5

T3

W2 W5

Y4

U2 V4

W3

V1

A6 A5

C4

D5

C6

B4 A3

M4

N5

T2 V3

B2

F6 D2

D3

A3* A4* A5* A6* A7* A8* A9* A10* A11* A12* A13* A14* A15* A16* ADSTB0*

REQ0* REQ1* REQ2* REQ3* REQ4*

A17* A18* A19* A20* A21* A22* A23* A24* A25* A26* A27* A28* A29* A30* A31* A32* A33* A34* A35* ADSTB1*

A20M* FERR* IGNNE*

STPCLK* LINT0 LINT1 SMI*

RSVD0 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8

U1000

PENRYN

FCBGA

1 OF 4

ADDR GROUP0

ADDR GROUP1

THERMAL

THERMTRIP*

ICH

RESERVED

CONTROL

XDP/ITP SIGNALS

PROCHOT*

H CLK

FSB_A_L<3>

6

13 75

BI

FSB_A_L<4>

6

13 75

BI

FSB_A_L<5>

6

13 75

BI

FSB_A_L<6>

6

13 75

BI

FSB_A_L<7>

6

13 75

BI

FSB_A_L<8>

6

13 75

BI

FSB_A_L<9>

6

13 75

BI

FSB_A_L<10>

6

13 75

BI

FSB_A_L<11>

6

13 75

BI

FSB_A_L<12>

6

13 75

BI

FSB_A_L<13>

6

13 75

D

C

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

BI

FSB_A_L<14>

BI

FSB_A_L<15>

BI

FSB_A_L<16>

BI

FSB_ADSTB_L<0>

BI

FSB_REQ_L<0>

BI

FSB_REQ_L<1>

BI

FSB_REQ_L<2>

BI

FSB_REQ_L<3>

BI

FSB_REQ_L<4>

BI

FSB_A_L<17>

BI

FSB_A_L<18>

BI

FSB_A_L<19>

BI

FSB_A_L<20>

BI

FSB_A_L<21>

BI

FSB_A_L<22>

BI

FSB_A_L<23>

BI

FSB_A_L<24>

BI

FSB_A_L<25>

BI

FSB_A_L<26>

BI

FSB_A_L<27>

BI

FSB_A_L<28>

BI

FSB_A_L<29>

BI

FSB_A_L<30>

BI

FSB_A_L<31>

BI

FSB_A_L<32>

BI

FSB_A_L<33>

BI

FSB_A_L<34>

BI

FSB_A_L<35>

BI

FSB_ADSTB_L<1>

BI

CPU_A20M_L

IN

CPU_FERR_L

OUT

CPU_IGNNE_L

IN

CPU_STPCLK_L

IN

CPU_INTR

IN

CPU_NMI

IN

CPU_SMI_L

IN

TP_CPU_RSVD_M4 TP_CPU_RSVD_N5 TP_CPU_RSVD_T2 TP_CPU_RSVD_V3 TP_CPU_RSVD_B2 TP_CPU_RSVD_F6 TP_CPU_RSVD_D2 TP_CPU_RSVD_D22 TP_CPU_RSVD_D3

B

PLACEMENT_NOTE=Place R1092 near ITP connector (if present)

ADS* BNR*

BPRI*

DEFER*

DRDY* DBSY*

BR0*

IERR* INIT*

LOCK*

RESET*

RS0* RS1* RS2*

TRDY*

HIT*

HITM*

BPM0* BPM1* BPM2* BPM3* PRDY* PREQ*

TRST*

DBR*

THERMDA THERMDC

BCLK0 BCLK1

TCK TDI TDO TMS

H1 E2

G5

H5

F21

E1

F1

D20

B3

H4

C1 F3

F4 G3

G2

G6 E4

AD4 AD3

AD1

AC4 AC2

AC1 AC5

AA6

AB3 AB5

AB6

C20

D21 A24

B25

C7

A22 A21

FSB_ADS_L FSB_BNR_L FSB_BPRI_L

FSB_DEFER_L FSB_DRDY_L FSB_DBSY_L

FSB_BREQ0_L

CPU_IERR_L

75

CPU_INIT_L

FSB_LOCK_L

FSB_CPURST_L FSB_RS_L<0> FSB_RS_L<1> FSB_RS_L<2> FSB_TRDY_L

FSB_HIT_L FSB_HITM_L

XDP_BPM_L<0> XDP_BPM_L<1> XDP_BPM_L<2> XDP_BPM_L<3> XDP_BPM_L<4> XDP_BPM_L<5> XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST_L XDP_DBRESET_L

CPU_PROCHOT_L CPU_THERMD_P CPU_THERMD_N

PM_THRMTRIP_L

FSB_CLK_CPU_P FSB_CLK_CPU_N

12 75

BI BI BI

BI

IN

BI

IN IN IN IN IN

BI BI

BI BI BI BI BI

IN IN

OUT

IN IN

OUT

OUT OUT

OUT

IN IN

CPU JTAG Support

XDP_TMS

9

XDP_TDI

9

XDP_TDO

1 9

XDP_TCK

9

XDP_TRST_L

9

6

13 75

6

13 75

12 13 75

13 75

6

13 75

6

13 75

12 75

9

12 75

9

12 75

1 9

12 75

9

12 75

9

12 75

12 24

46 82

13 41 75

13 75

R1091

1 2

R1094

1 2

54.9

1/16W MF-LF

402

649

1/16W MF-LF

402

R1000

54.9

1/16W MF-LF

PP1V05_S0

1

1%

402

2

6 7

10 11 12 13 16 17 19 21 22

23 35 61 65 66 67

D

OMIT

AD26

AF26

E22

F24

E26 G22

F23

G25 E25

E23 K24

G24

J24 J23

H22

F26 K22

H23

J26 H26

H25

N22

K25

P26 R23

L23

M24 L22

M23 P25

P23

P22 T24

R24

L25 T25

N25

L26 M26

N24

C23 D25

C24

AF1

A26

B22

B23 C21

C3

D0* D1* D2* D3* D4* D5* D6* D7* D8* D9* D10* D11* D12* D13* D14* D15* DSTBN0* DSTBP0* DINV0*

D16* D17* D18* D19* D20* D21* D22* D23* D24* D25* D26* D27* D28* D29* D30* D31* DSTBN1* DSTBP1* DINV1*

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL0 BSEL1 BSEL2

U1000

PENRYN

FCBGA

2 OF 4

DATA GRP 0DATA GRP 1

MISC

DATA GRP 3 DATA GRP 2

FSB_D_L<0>

6

13 75

BI

FSB_D_L<1>

6

13 75

1

R1001

54.9

1% 1/16W MF-LF

402

2

1

R1002

68

5% 1/16W MF-LF

402

2

R1090

54.9

1 2

1% 1/16W MF-LF

402

1%

R1092

54.9

1 2

1% 1/16W MF-LF

402

R1093

54.9

1 2

1% 1/16W MF-LF

402

1

R1005

1K

1% 1/16W MF-LF 402

2

1

R1006

2.0K

1% 1/16W MF-LF 402

2

BI

13 41 61 75

OUT

NO STUFF

R1011

1/16W MF-LF

12 75

NO STUFF

1

C1014

NO STUFF

1

R1012

1K

5% 1/16W MF-LF 402

2

0.1uF

10% 16V

2

X5R 402

PLACEMENT_NOTE=Place C1014 within 12.7mm of CPU. PLACEMENT_NOTE=Place R1005 within 12.7mm of CPU. PLACEMENT_NOTE=Place R1006 within 12.7mm of CPU.

NO STUFF

R1010

0

1 2

5%

1/16W

1

MF-LF

402

1K

5%

402

2

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

6

13 75

8

75

8

75

8

75

BI

FSB_D_L<2>

BI

FSB_D_L<3>

BI

FSB_D_L<4>

BI

FSB_D_L<5>

BI

FSB_D_L<6>

BI

FSB_D_L<7>

BI

FSB_D_L<8>

BI

FSB_D_L<9>

BI

FSB_D_L<10>

BI

FSB_D_L<11>

BI

FSB_D_L<12>

BI

FSB_D_L<13>

BI

FSB_D_L<14>

BI

FSB_D_L<15>

BI

FSB_DSTB_L_N<0>

BI

FSB_DSTB_L_P<0>

BI

FSB_DINV_L<0>

BI

FSB_D_L<16>

BI

FSB_D_L<17>

BI

FSB_D_L<18>

BI

FSB_D_L<19>

BI

FSB_D_L<20>

BI

FSB_D_L<21>

BI

FSB_D_L<22>

BI

FSB_D_L<23>

BI

FSB_D_L<24>

BI

FSB_D_L<25>

BI

FSB_D_L<26>

BI

FSB_D_L<27>

BI

FSB_D_L<28>

BI

FSB_D_L<29>

BI

FSB_D_L<30>

BI

FSB_D_L<31>

BI

FSB_DSTB_L_N<1>

BI

FSB_DSTB_L_P<1>

BI

FSB_DINV_L<1>

BI

CPU_GTLREF

25 75

CPU_TEST1

CPU_TEST2 TP_CPU_TEST3 CPU_TEST4 TP_CPU_TEST5 TP_CPU_TEST6

TP_CPU_TEST7

CPU_BSEL<0>

OUT

CPU_BSEL<1>

OUT

CPU_BSEL<2>

OUT

D32* D33* D34* D35* D36* D37* D38* D39* D40* D41* D42* D43* D44* D45* D46*

D47* DSTBN2* DSTBP2*

DINV2*

D48*

D49*

D50*

D51*

D52*

D53*

D54*

D55*

D56*

D57*

D58*

D59*

D60*

D61*

D62*

D63* DSTBN3* DSTBP3*

DINV3*

COMP0 COMP1 COMP2 COMP3

DPRSTP*

DPSLP*

DPWR*

PWRGOOD

SLP*

PSI*

Y22

AB24 V24

V26

V23 T22

U25 U23

Y25

W22 Y23

W24

W25 AA23

AA24

AB25 Y26

AA26 U22

AE24

AD24

AA21 AB22

AB21

AC26 AD20

AE22 AF23

AC25

AE21 AD21

AC22

AD23 AF22

AC23

AE25

AF24 AC20

R26

U26

AA1 Y1

E5 B5

D24

D6 D7

AE6

75

FSB_D_L<32> FSB_D_L<33> FSB_D_L<34> FSB_D_L<35> FSB_D_L<36> FSB_D_L<37> FSB_D_L<38> FSB_D_L<39> FSB_D_L<40> FSB_D_L<41> FSB_D_L<42> FSB_D_L<43> FSB_D_L<44> FSB_D_L<45> FSB_D_L<46> FSB_D_L<47> FSB_DSTB_L_N<2> FSB_DSTB_L_P<2> FSB_DINV_L<2>

FSB_D_L<48> FSB_D_L<49> FSB_D_L<50> FSB_D_L<51> FSB_D_L<52> FSB_D_L<53> FSB_D_L<54> FSB_D_L<55> FSB_D_L<56> FSB_D_L<57> FSB_D_L<58> FSB_D_L<59> FSB_D_L<60> FSB_D_L<61> FSB_D_L<62> FSB_D_L<63> FSB_DSTB_L_N<3> FSB_DSTB_L_P<3> FSB_DINV_L<3>

CPU_COMP<0> CPU_COMP<1> CPU_COMP<2> CPU_COMP<3>

CPU_DPRSTP_L CPU_DPSLP_L FSB_DPWR_L CPU_PWRGD FSB_CPUSLP_L CPU_PSI_L

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

6

13 75

BI

13 61 75

IN

13 75

IN

13 75

IN

12 13 75

IN

13 75

IN

61

OUT

PLACEMENT_NOTE (all 4 resistors):

Place within 12.7mm of CPU

R1023

54.9

1/16W MF-LF

C

B

1

1%

402

2

1

2

R1021

R1022

27.4

1% 1/16W MF-LF 402

54.9

1/16W MF-LF

1

1%

402

2

1

R1020

27.4

1% 1/16W MF-LF 402

2

CPU FSB

SHT

9

SYNC_DATE=02/05/2009

OF

83

1

A

REV.

A

SYNC FROM T18 CHANGE CPU FROM SOCKET TO BGA SYMBOL

8

7 6

5

4

3

SYNC_MASTER=K24_MLB

APPLE INC.

2

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

SCALE

051-7903

NONE

8 7

6

5

4

3

2 1

D

C

B

A

SYNC FROM T18 CHANGE CPU FROM SOCKET TO BGA SYMBOL

Current numbers from Merom for Santa Rosa EMTS, doc #20905.

8

AB10

AB12 AB14

AB15

AB17 AB18

AA10

AA12

AA13 AA15

AA17

AA18 AA20

AC10

A7

A9

A10 A12

A13

A15 A17

A18 A20

B7

B9 B10

B12

B14 B15

B17

B18 B20

C9 C10

C12

C13 C15

C17

C18

D9

D10

D12 D14

D15

VCC

D17

D18

E7

E9

E10

E12 E13

E15

E17 E18

E20

F7

F9

F10 F12

F14

F15 F17

F18

F20 AA7

AA9

AB9

(BR1#)

OMIT

U1000

PENRYN

FCBGA

3 OF 4

VCCSENSE

VSSSENSE

VCC

VCCP

VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

AB20

AB7

AC7 AC9

AC12

AC13 AC15

AC17 AC18

AD7

AD9 AD10

AD12

AD14 AD15

AD17

AD18 AE9

AE10 AE12

AE13

AE15 AE17

AE18

AE20 AF9 AF10

AF12

AF14 AF15

AF17

AF18 AF20

G21 V6

J6 K6

M6

J21 K21

M21

N21 N6

R21

R6

T21 T6

V21

W21

B26 C26

AD6 AF5

AE5

AF4 AE3

AF3

AE2

AF7

AE7

7 6

(CPU CORE POWER) PPVCORE_S0_CPU

6 7

30.4 A (SV LFM)

(CPU IO POWER 1.05V)

PP1V05_S0

6 7 9 23 35 61 65 66 67

4500 mA (before VCC stable) 2500 mA (after VCC stable)

(CPU INTERNAL PLL POWER 1.5V) PP1V5_S0

6 7

130 mA

CPU_VID<0> CPU_VID<1> CPU_VID<2> CPU_VID<3> CPU_VID<4> CPU_VID<5> CPU_VID<6>

8

75

OUT

8

75

OUT

8

75

OUT

8

75

OUT

8

75

OUT

8

75

OUT

8

75

OUT

CPU_VCCSENSE_P

CPU_VCCSENSE_N

10 11 44 61

44 A (SV Design Target) 41 A (SV HFM)

23 A (LV Design Target)

11 12 13 16 17 19 21 22

11 15 22 37 66 67 68 82

PPVCORE_S0_CPU

1

R1100

100

1% 1/16W MF-LF 402

2

OUT

PLACEMENT_NOTE=Place R1100 within 25.4mm of CPU, no stubs. PLACEMENT_NOTE=Place R1101 within 25.4mm of CPU, no stubs.

OUT

1

R1101

100

1% 1/16W MF-LF 402

2

61 75

6 7

5

10 11 44 61

A4 A8

A11 A14

A16

A19 A23

AF2

B6 B8

B11

B13 B16

B19 B21

B24

C5 C8

C11

C14 C16

C19

C2 C22

C25

D1

D4

D8 D11

D13

D16 D19

D23

D26

E3

E6

E8

E11 E14

VSS VSS

E16 E19

E21 E24

F5

F8 F11

F13 F16

F19

F2 F22

F25

G4

G1

G23

G26

H3

H6 H21

H24

J2

J5

J22

J25

K1

K4

K23 K26

L3

L6

L21

L24

M2

M5

M22 M25

N1

N4 N23

N26

P3

B1

(Socket-P KEY)

OMIT

U1000

PENRYN

FCBGA

4 OF 4

T26

U3 U6

U21 U24

V2

V5

V22 V25

W1

W4 W23

W26 Y3

Y6 Y21

Y24

AA2 AA5

AA8

AA11 AA14

AA16

AA19 AA22

AA25 AB1

AB4

AB8 AB11

AB13

AB16 AB19

AB23

AB26 AC3

AC6

AC8

AC11 AC14

AC16 AC19

AC21

AC24 AD2 AD5 AD8

AD11 AD13

AD16

AD19 AD22

AD25

AE1

AE4 AE8

AE11

AE14 AE16

AE19

AE23 AE26

A2 AF6

AF8

AF11 AF13

AF16

AF19 AF21

A25

AF25

P6

P21 P24

R2

R5 R22

R25 T1

T4

T23

D

C

B

CPU Power & Ground

SHT

SYNC_DATE=02/05/2009

OF

8310

1

A

REV.

A

SYNC_MASTER=K24_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

APPLE INC.

4

3

2

SCALE

D

051-7903

NONE

8 7

6

5

4

3

2 1

CPU VCore HF and Bulk Decoupling

4X 330UF. 20X 22UF 0805

PPVCORE_S0_CPU

6 7

10 44 61

D

PLACEMENT_NOTE (C1200-C1219):

Place inside socket cavity on secondary side.

CRITICAL

1

C1200

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1201

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1202

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1203

22UF

20%

6.3V

2

CERM-X5R

805

CRITICAL

1

C1204

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1205

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1206

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1207

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1208

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1209

22UF

20%

6.3V

2

CERM-X5R 805

D

CRITICAL

1

C1210

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1211

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1212

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1213

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1214

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1215

22UF

20%

6.3V

2

CERM-X5R 805

C

CRITICAL

1

C1216

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1217

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1218

22UF

20%

6.3V

2

CERM-X5R 805

CRITICAL

1

C1219

22UF

20%

6.3V

2

CERM-X5R 805

C

PLACEMENT_NOTE (C1240-C1243):

Place on secondary side.

NOSTUFF

CRITICAL

1

C1240

470UF-4MOHM

20%

2.0V

23

POLY-TANT D2T-SM

Place on secondary side.

CRITICAL

1

C1241

470UF-4MOHM

20%

2.0V

23

POLY-TANT D2T-SM

Place on secondary side.

CRITICAL

1

C1242

470UF-4MOHM

20%

2.0V

23

POLY-TANT D2T-SM

Place on secondary side.

CRITICAL

1

C1243

470UF-4MOHM

20%

2.0V

23

POLY-TANT D2T-SM

VCCA (CPU AVdd) DECOUPLING

10 15 22 37 66 67 68 82

PP1V5_S0

6 7

1x 10uF, 1x 0.01uF

1

C1250

10uF

20%

6.3V 2

X5R 603

PLACEMENT_NOTE=Place C1281 near CPU pin B26.

1

C1251

0.01UF

10% 16V

2

CERM 402

B

VCCP (CPU I/O) DECOUPLING

PP1V05_S0

6 7 9

10 12 13 16 17 19 21 22

23 35 61 65 66 67

CRITICAL

A

SYNC FROM T18 REMOVE NO STUFF CAPS C1220 TO C1231 REMOVE C1244 & C1245 CHANGE C1240-C1243 AND C1260 FROM 128S0241(9 MILLI-OHM) TO 128S0231(6 MILLI-OHM)

8

7 6

1x 330uF, 6x 0.1uF 0402

PLACEMENT_NOTE=Place C1260 between CPU & NB.

1

C1260

330UF

POLY-TANT

D2T-SM2

1

C1261

0.1UF

2 3

20% 10V

2

CERM 402

20%

2.0V

1

2

C1262

0.1UF

20% 10V CERM 402

1

C1263

2

5

0.1UF

20% 10V CERM 402

1

C1264

0.1UF

2

20% 10V CERM 402

1

C1265

2

0.1UF

20% 10V CERM 402

1

C1266

0.1UF

20% 10V

2

CERM 402

CPU Decoupling

SHT

SYNC_DATE=02/05/2009

OF

8311

1

A

REV.

A

SYNC_MASTER=K24_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

APPLE INC.

4

3

2

SCALE

D

051-7903

NONE

8 7

6

5

4

3

2 1

Mini-XDP Connector

NOTE: This is not the standard XDP pinout.

D

Use with 920-0620 adapter board to support CPU, MCP debugging.

D

MCP79-specific pinout

58 61 66 67 68 69 71 72 82

PP3V3_S0

6 7

17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57

PP1V05_S0

6 7 9

10 11 13 16 17 19 21 22

23 35 61 65 66 67

XDP

1

R1315

54.9

1% 1/16W MF-LF

402

2

9

75

BI

XDP_BPM_L<4>

9

75

BI

XDP_BPM_L<3>

9

75

BI

XDP_BPM_L<2>

9

75

IN

XDP_BPM_L<1>

9

75

IN

XDP_BPM_L<0>

9

75

IN

C

XDP

R1399

1K

CPU_PWRGD

9

13 75

IN

1 2

5% 1/16W MF-LF

402

18

IN

20

OUT

20 26 43 78

BI

20 26 27 43 78

BI

9

75

OUT

TP_XDP_OBSFN_B0 TP_XDP_OBSFN_B1

TP_XDP_OBSDATA_B0 TP_XDP_OBSDATA_B1

TP_XDP_OBSDATA_B2 TP_XDP_OBSDATA_B3

XDP_PWRGD

PM_LATRIGGER_L JTAG_MCP_TCK

SMBUS_MCP_0_DATA SMBUS_MCP_0_CLK

XDP_TCK

XDP_OBS20

OBSFN_A0 OBSFN_A1

OBSDATA_A0 OBSDATA_A1

OBSDATA_A2 OBSDATA_A3

OBSFN_B0 OBSFN_B1

OBSDATA_B0 OBSDATA_B1 OBSDATA_D1

OBSDATA_B2 OBSDATA_B3

PWRGD/HOOK0

HOOK1

VCC_OBS_AB

HOOK2 HOOK3

SDA

SCL TCK1 TCK0

XDP

1

C1300

0.1uF

10% 16V

2

X5R 402

B

CRITICAL XDP_CONN

NC

J1300

F-ST-SM 2 4 6

10

20

30

40

50

60

1 3 5 78

9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39 4142 4344 4546 4748 49 5152 5354 5556 5758 59

LTH-030-01-G-D-NOPEGS

998-1571

OBSFN_C0 OBSFN_C1

OBSDATA_C0 OBSDATA_C1

OBSDATA_C2 OBSDATA_C3

OBSFN_D0 OBSFN_D1

OBSDATA_D0

OBSDATA_D2 OBSDATA_D3

ITPCLK/HOOK4 ITPCLK#/HOOK5 VCC_OBS_CD RESET#/HOOK6 DBR#/HOOK7 NOTE: XDP_DBRESET_L must be pulled-up to 3.3V. TDO TRSTn TDI TMS XDP_PRESENT#

XDP

1

C1301

0.1uF

10% 16V

2

X5R 402

JTAG_MCP_TDOXDP_BPM_L<5> JTAG_MCP_TRST_L

MCP_DEBUG<0> MCP_DEBUG<1>

MCP_DEBUG<2> MCP_DEBUG<3>

JTAG_MCP_TDI JTAG_MCP_TMS

MCP_DEBUG<4> MCP_DEBUG<5>

MCP_DEBUG<6> MCP_DEBUG<7>

FSB_CLK_ITP_P FSB_CLK_ITP_N

XDP_CPURST_L

75

XDP_DBRESET_L

XDP_TDO XDP_TRST_L XDP_TDI XDP_TMS

1

20

IN

20

OUT

18 78

BI

18 78

BI

18 78

BI

18 78

BI

20

OUT

20

OUT

18 78

BI

18 78

BI

18 78

BI

18 78

BI

13 75

IN

13 75

IN

9

24

OUT

1 9

75

IN

9

75

OUT

9

75

OUT

9

75

OUT

XDP

R1303

1K

1 2

1/16W MF-LF

FSB_CPURST_L

5%

PLACEMENT_NOTE=Place close to CPU to minimize stub.

402

9

13 75

IN

C

B

Direction of XDP module

Please avoid any obstructions on even-numbered side of J1300

eXtended Debug Port(MiniXDP)

SHT

12

SYNC_DATE=02/05/2009

OF

83

1

A

REV.

A

8

7 6

5

4

3

SYNC_MASTER=K19_MLB

APPLE INC.

2

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

SCALE

051-7903

NONE

8 7

6

D

C

PP1V05_S0

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

R1415

1/16W MF-LF

R1421

1/16W MF-LF

1

R1416

62

5%

5% 1/16W MF-LF

402

2

NO STUFF

1

R1422

1K

5%

1/16W MF-LF 402

402

2

1

R1430

49.9

1/16W MF-LF

1

R1435

49.9

1%

1% 1/16W MF-LF

402

2

1

R1410

54.9

1% 1/16W MF-LF

402

2

B

9

41 75

9

75

8

PM_THRMTRIP_L

IN

CPU_FERR_L

IN

=MCP_BSEL<2>

IN

=MCP_BSEL<1>

IN

=MCP_BSEL<0>

IN

NO STUFF

R1420

1/16W MF-LF

1K

5%

402

NO STUFF

1

2

A

1

R1431

49.9

1/16W MF-LF

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

7 6

R1436

49.9

1%

1/16W MF-LF 402

402

2

5

4

3

2 1

OMIT

U1400

MCP79-TOPO-B

BGA

FSB_DSTB_L_P<0>

6 9

75

BI

FSB_DSTB_L_N<0>

6 9

75

BI

FSB_DINV_L<0>

6 9

75

BI

FSB_DSTB_L_P<1>

6 9

75

BI

FSB_DSTB_L_N<1>

6 9

75

BI

FSB_DINV_L<1>

6 9

75

BI

FSB_DSTB_L_P<2>

6 9

75

BI

FSB_DSTB_L_N<2>

6 9

75

BI

FSB_DINV_L<2>

6 9

75

BI

FSB_DSTB_L_P<3>

6 9

75

BI

FSB_DSTB_L_N<3>

6 9

75

BI

FSB_DINV_L<3>

6 9

75

BI

FSB_A_L<3>

6 9

75

BI

FSB_A_L<4>

6 9

75

BI

FSB_A_L<5>

6 9

75

BI

FSB_A_L<6>

6 9

75

BI

FSB_A_L<7>

6 9

75

BI

FSB_A_L<8>

6 9

75

BI

FSB_A_L<9>

6 9

75

BI

FSB_A_L<10>

6 9

75

BI

FSB_A_L<11>

6 9

75

BI

FSB_A_L<12>

6 9

75

BI

FSB_A_L<13>

6 9

75

BI

FSB_A_L<14>

6 9

75

BI

FSB_A_L<15>

6 9

75

BI

FSB_A_L<16>

6 9

75

BI

FSB_A_L<17>

6 9

75

BI

FSB_A_L<18>

6 9

75

BI

FSB_A_L<19>

6 9

75

BI

FSB_A_L<20>

6 9

75

BI

FSB_A_L<21>

6 9

75

BI

FSB_A_L<22>

6 9

75

BI

FSB_A_L<23>

6 9

75

BI

FSB_A_L<24>

6 9

75

BI

FSB_A_L<25>

6 9

75

BI

FSB_A_L<26>

6 9

75

BI

FSB_A_L<27>

6 9

75

BI

FSB_A_L<28>

6 9

75

BI

FSB_A_L<29>

6 9

75

BI

FSB_A_L<30>

6 9

75

BI

FSB_A_L<31>

6 9

75

BI

FSB_A_L<32>

9

75

BI

FSB_A_L<33>

9

75

BI

FSB_A_L<34>

9

75

BI

FSB_A_L<35>

9

75

BI

FSB_ADSTB_L<0>

6 9

75

BI

FSB_ADSTB_L<1>

6 9

75

BI

FSB_REQ_L<0>

6 9

75

BI

FSB_REQ_L<1>

6 9

75

BI

FSB_REQ_L<2>

6 9

75

BI

FSB_REQ_L<3>

6 9

75

BI

FSB_REQ_L<4>

6 9

75

BI

FSB_ADS_L

6 9

75

BI

FSB_BNR_L

9

75

BI

FSB_BREQ0_L

9

75

BI

FSB_BREQ1_L

75

FSB_DBSY_L

9

75

BI

FSB_DRDY_L

9

75

BI

FSB_HIT_L

6 9

75

BI

FSB_HITM_L

6 9

75

BI

FSB_LOCK_L

6 9

75

IN

FSB_TRDY_L

9

75

OUT

TP_CPU_PECI_MCP

8

OUT

CPU_PROCHOT_L

9

41 61 75

OUT

(MCP_BSEL<2>) (MCP_BSEL<1>) (MCP_BSEL<0>)

FSB_RS_L<0>

9

75

OUT

FSB_RS_L<1>

9

75

OUT

FSB_RS_L<2>

9

75

OUT

PP1V05_S0_MCP_PLL_FSB

22

MCP_BCLK_VML_COMP_VDD

75

MCP_BCLK_VML_COMP_GND

75

MCP_CPU_COMP_VCC

75

MCP_CPU_COMP_GND

75

206 mA270 mA (A01)

20 mA 29 mA 15 mA

T40

CPU_DSTBP0#

U40

CPU_DSTBN0#

V41

CPU_DBI0#

W39

CPU_DSTBP1#

W37

CPU_DSTBN1#

V35

CPU_DBI1#

N37

CPU_DSTBP2#

L36

CPU_DSTBN2#

N35

CPU_DBI2#

M39

CPU_DSTBP3#

M41

CPU_DSTBN3#

J41

CPU_DBI3#

AC34

CPU_A3#

AE38

CPU_A4#

AE34

CPU_A5#

AC37

CPU_A6#

AE37

CPU_A7#

AE35

CPU_A8#

AB35

CPU_A9#

AF35

CPU_A10#

AG35

CPU_A11#

AG39

CPU_A12#

AE33

CPU_A13#

AG37

CPU_A14#

AG38

CPU_A15#

AG34

CPU_A16#

AN38

CPU_A17#

AL39

CPU_A18#

AG33

CPU_A19#

AL33

CPU_A20#

AJ33

CPU_A21#

AN36

CPU_A22#

AJ35

CPU_A23#

AJ37

CPU_A24#

AJ36

CPU_A25#

AJ38

CPU_A26#

AL37

CPU_A27#

AL34

CPU_A28#

AN37

CPU_A29#

AJ34

CPU_A30#

AL38

CPU_A31#

AL35

CPU_A32#

AN34

CPU_A33#

AR39

CPU_A34#

AN35

CPU_A35#

AE36

CPU_ADSTB0#

AK35

CPU_ADSTB1#

AC38

CPU_REQ0#

AA33

CPU_REQ1#

AC39

CPU_REQ2#

AC33

CPU_REQ3#

AC35

CPU_REQ4#

AD42

CPU_ADS#

AD43

CPU_BNR#

AE40

CPU_BR0#

AL32

CPU_BR1#

AD39

CPU_DBSY#

AD41

CPU_DRDY#

AB42

CPU_HIT#

AD40

CPU_HITM#

AC43

CPU_LOCK#

AE41

CPU_TRDY#

E41

CPU_PECI

AJ41

CPU_PROCHOT#

AG43

CPU_THERMTRIP#

AH40

CPU_FERR#

F42

CPU_BSEL2

D42

CPU_BSEL1

F41

CPU_BSEL0

AC41

CPU_RS0#

AB41

CPU_RS1#

AC42

CPU_RS2#

AG27

+V_DLL_DLCELL_AVDD

AH27

+V_PLL_MCLK

AG28

+V_PLL_FSB

AH28

+V_PLL_CPU

AM39

BCLK_VML_COMP_VDD

AM40

BCLK_VML_COMP_GND

AM43

CPU_COMP_VCC

AM42

CPU_COMP_GND

(1 OF 11)

FSB

CPU_BPRI#

CPU_DEFER#

BCLK_OUT_CPU_P BCLK_OUT_CPU_N

BCLK_OUT_ITP_P BCLK_OUT_ITP_N

BCLK_OUT_NB_P BCLK_OUT_NB_N

BCLK_IN_N BCLK_IN_P

CPU_A20M#

CPU_IGNNE#

CPU_INIT#

CPU_PWRGD

CPU_RESET#

CPU_DPSLP#

CPU_DPWR# CPU_STPCLK# CPU_DPRSTP#

5

CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8#

CPU_D9# CPU_D10# CPU_D11# CPU_D12# CPU_D13# CPU_D14# CPU_D15# CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31# CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47# CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63#

CPU_INTR

CPU_NMI CPU_SMI#

CPU_SLP#

4

Y43 W42 Y40 W41 Y39 V42 Y41 Y42 P42 U41 R42 T39 T42 T41 R41 T43 W35 AA37 W33 W34 AA36 AA34 AA38 AA35 U38 U36 U35 U33 U34 W38 R33 U37 N34 N33 R34 R35 P35 R39 R37 R38 L37 L39 L38 N36 N38 J39 J38 J37 L42 M42 P41 N41 N40 M40 H40 K42 H41 L41 H43 H42 K41 J40 H39 M43

AA41 AA40

G42 G41

AL43 AL42

AL41 AK42

AK41 AJ40

AF41 AH39 AH42 AF42 AG41 AH41

AH43 H38

AM33 AN33 AM32 AG42 AN32

FSB_D_L<0> FSB_D_L<1> FSB_D_L<2> FSB_D_L<3> FSB_D_L<4> FSB_D_L<5> FSB_D_L<6> FSB_D_L<7> FSB_D_L<8> FSB_D_L<9> FSB_D_L<10> FSB_D_L<11> FSB_D_L<12> FSB_D_L<13> FSB_D_L<14> FSB_D_L<15> FSB_D_L<16> FSB_D_L<17> FSB_D_L<18> FSB_D_L<19> FSB_D_L<20> FSB_D_L<21> FSB_D_L<22> FSB_D_L<23> FSB_D_L<24> FSB_D_L<25> FSB_D_L<26> FSB_D_L<27> FSB_D_L<28> FSB_D_L<29> FSB_D_L<30> FSB_D_L<31> FSB_D_L<32> FSB_D_L<33> FSB_D_L<34> FSB_D_L<35> FSB_D_L<36> FSB_D_L<37> FSB_D_L<38> FSB_D_L<39> FSB_D_L<40> FSB_D_L<41> FSB_D_L<42> FSB_D_L<43> FSB_D_L<44> FSB_D_L<45> FSB_D_L<46> FSB_D_L<47> FSB_D_L<48> FSB_D_L<49> FSB_D_L<50> FSB_D_L<51> FSB_D_L<52> FSB_D_L<53> FSB_D_L<54> FSB_D_L<55> FSB_D_L<56> FSB_D_L<57> FSB_D_L<58> FSB_D_L<59> FSB_D_L<60> FSB_D_L<61> FSB_D_L<62> FSB_D_L<63>

FSB_BPRI_L FSB_DEFER_L

FSB_CLK_CPU_P FSB_CLK_CPU_N

FSB_CLK_ITP_P FSB_CLK_ITP_N

FSB_CLK_MCP_P

75

FSB_CLK_MCP_N

CPU_A20M_L CPU_IGNNE_L CPU_INIT_L CPU_INTR CPU_NMI CPU_SMI_L

CPU_PWRGD FSB_CPURST_L

FSB_CPUSLP_L CPU_DPSLP_L FSB_DPWR_L CPU_STPCLK_L CPU_DPRSTP_L

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

6 9

75

BI

9

75

OUT

9

75

OUT

9

75

OUT

9

75

OUT

12 75

OUT

12 75

OUT

Loop-back clock for delay matching.

9

75

OUT

9

75

OUT

9

75

OUT

9

75

OUT

9

75

OUT

9

75

OUT

9

12 75

OUT

9

75

OUT

9

75

OUT

9

75

OUT

9

75

OUT

9

61 75

OUT

PP1V05_S0

NO STUFF

1

R1440

150

5% 1/16W MF-LF 402

2

9

OUT

12 75

3

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

SYNC_MASTER=T18_MLB

APPLE INC.

2

MCP CPU Interface

SYNC_DATE=02/05/2009

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

SCALE

NONE

051-7903

SHT

1

D

C

B

A

REV.

A

OF

8313

8 7

6

5

4

3

2 1

OMIT

U1400

MCP79-TOPO-B

BGA

MDQ0_63 MDQ0_62 MDQ0_61 MDQ0_60 MDQ0_59 MDQ0_58 MDQ0_57 MDQ0_56 MDQ0_55 MDQ0_54 MDQ0_53 MDQ0_52 MDQ0_51 MDQ0_50 MDQ0_49 MDQ0_48 MDQ0_47 MDQ0_46 MDQ0_45 MDQ0_44 MDQ0_43 MDQ0_42 MDQ0_41 MDQ0_40 MDQ0_39 MDQ0_38 MDQ0_37 MDQ0_36 MDQ0_35 MDQ0_34 MDQ0_33 MDQ0_32 MDQ0_31 MDQ0_30 MDQ0_29 MDQ0_28 MDQ0_27 MDQ0_26 MDQ0_25 MDQ0_24 MDQ0_23 MDQ0_22 MDQ0_21 MDQ0_20 MDQ0_19 MDQ0_18 MDQ0_17 MDQ0_16 MDQ0_15 MDQ0_14 MDQ0_13 MDQ0_12 MDQ0_11 MDQ0_10 MDQ0_9 MDQ0_8 MDQ0_7 MDQ0_6 MDQ0_5 MDQ0_4 MDQ0_3 MDQ0_2 MDQ0_1 MDQ0_0

MDQM0_7 MDQM0_6 MDQM0_5 MDQM0_4 MDQM0_3 MDQM0_2 MDQM0_1 MDQM0_0

(2 OF 11)

MDQS0_7_P MDQS0_7_N MDQS0_6_P MDQS0_6_N MDQS0_5_P MDQS0_5_N MDQS0_4_P MDQS0_4_N MDQS0_3_P MDQS0_3_N MDQS0_2_P MDQS0_2_N MDQS0_1_P MDQS0_1_N MDQS0_0_P MDQS0_0_N

MEMORY PARTITION 0

MEMORY

CONTROL

MCLK0A_2_P MCLK0A_2_N

MCLK0A_1_P MCLK0A_1_N

MCLK0A_0_P MCLK0A_0_N

MEM_A_DQ<63>

26 76

BI

MEM_A_DQ<62>

26 76

BI

MEM_A_DQ<61>

26 76

BI

MEM_A_DQ<60>

26 76

BI

MEM_A_DQ<59>

26 76

D

C

B

BI

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BI

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BI

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BI

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BI

26 76

BI

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BI

26 76

BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

26 76

BI

26 76

BI

26 76

BI

26 76

BI

26 76

BI

26 76

BI

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BI

26 76

BI

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BI

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BI

26 76

BI

26 76

BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

MEM_A_DQ<58> MEM_A_DQ<57> MEM_A_DQ<56> MEM_A_DQ<55> MEM_A_DQ<54> MEM_A_DQ<53> MEM_A_DQ<52> MEM_A_DQ<51> MEM_A_DQ<50> MEM_A_DQ<49> MEM_A_DQ<48> MEM_A_DQ<47> MEM_A_DQ<46> MEM_A_DQ<45> MEM_A_DQ<44> MEM_A_DQ<43> MEM_A_DQ<42> MEM_A_DQ<41> MEM_A_DQ<40> MEM_A_DQ<39> MEM_A_DQ<38> MEM_A_DQ<37> MEM_A_DQ<36> MEM_A_DQ<35> MEM_A_DQ<34> MEM_A_DQ<33> MEM_A_DQ<32> MEM_A_DQ<31> MEM_A_DQ<30> MEM_A_DQ<29> MEM_A_DQ<28> MEM_A_DQ<27> MEM_A_DQ<26> MEM_A_DQ<25> MEM_A_DQ<24> MEM_A_DQ<23> MEM_A_DQ<22> MEM_A_DQ<21> MEM_A_DQ<20> MEM_A_DQ<19> MEM_A_DQ<18> MEM_A_DQ<17> MEM_A_DQ<16> MEM_A_DQ<15> MEM_A_DQ<14> MEM_A_DQ<13> MEM_A_DQ<12> MEM_A_DQ<11> MEM_A_DQ<10> MEM_A_DQ<9> MEM_A_DQ<8> MEM_A_DQ<7> MEM_A_DQ<6> MEM_A_DQ<5> MEM_A_DQ<4> MEM_A_DQ<3> MEM_A_DQ<2> MEM_A_DQ<1> MEM_A_DQ<0>

MEM_A_DM<7> MEM_A_DM<6> MEM_A_DM<5> MEM_A_DM<4> MEM_A_DM<3> MEM_A_DM<2> MEM_A_DM<1> MEM_A_DM<0>

AL8 AL9 AP9 AN9 AL6 AL7 AN6 AN7 AR6 AR7 AV6 AW5

AN10

AR5 AU6 AV5 AU7 AU8 AW9

AP11

AW6 AY5 AU9

AV9 AU11 AV11 AV13 AW13 AR11 AT11 AR14 AU13 AR26 AU25 AT27 AU27 AP25 AR25 AP27 AR27 AP29 AR29 AP31 AR31 AV27 AN29 AV29 AN31 AU31 AR33 AV37 AW37 AT31 AV31 AT37 AU37 AW39 AV39 AR37 AR38 AV38 AW38 AR35 AP35

AN5

AU5 AR10 AN13 AN27 AW29 AV35 AR34

MRAS0# MCAS0#

MWE0#

MBA0_2 MBA0_1 MBA0_0

MA0_14 MA0_13 MA0_12 MA0_11 MA0_10

MA0_9 MA0_8 MA0_7 MA0_6 MA0_5 MA0_4 MA0_3 MA0_2 MA0_1 MA0_0

0A

MCS0A_1# MCS0A_0#

MODT0A_1 MODT0A_0

MCKE0A_1 MCKE0A_0

AL10 AL11 AR8 AR9 AW7 AW8 AP13 AR13 AV25 AW25 AU30 AU29 AT35 AU35 AU39 AT39

AV17 AP17 AR17

AP23 AP19 AW17

AR23 AU15 AN23 AW21 AN19 AV21 AR22 AU21 AP21 AR21 AN21 AV19 AU19 AT19 AR19

AW33 AV33

BA24 AY24

BB20 BC20

AT15 AR18

AP15 AV15

AU23 AT23

MEM_A_DQS_P<7> MEM_A_DQS_N<7> MEM_A_DQS_P<6> MEM_A_DQS_N<6> MEM_A_DQS_P<5> MEM_A_DQS_N<5> MEM_A_DQS_P<4> MEM_A_DQS_N<4> MEM_A_DQS_P<3> MEM_A_DQS_N<3> MEM_A_DQS_P<2> MEM_A_DQS_N<2> MEM_A_DQS_P<1> MEM_A_DQS_N<1> MEM_A_DQS_P<0> MEM_A_DQS_N<0>

MEM_A_RAS_L MEM_A_CAS_L MEM_A_WE_L

MEM_A_BA<2> MEM_A_BA<1> MEM_A_BA<0>

MEM_A_A<14> MEM_A_A<13> MEM_A_A<12> MEM_A_A<11> MEM_A_A<10> MEM_A_A<9> MEM_A_A<8> MEM_A_A<7> MEM_A_A<6> MEM_A_A<5> MEM_A_A<4> MEM_A_A<3> MEM_A_A<2> MEM_A_A<1> MEM_A_A<0>

TP_MEM_A_CLK2P NC_MEM_A_CLK2N

MEM_A_CLK_P<1> MEM_A_CLK_N<1>

MEM_A_CLK_P<0> MEM_A_CLK_N<0>

MEM_A_CS_L<1> MEM_A_CS_L<0>

MEM_A_ODT<1> MEM_A_ODT<0>

MEM_A_CKE<1> MEM_A_CKE<0>

26 76

BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

6

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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BI

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

MEM_B_DQ<63> MEM_B_DQ<62> MEM_B_DQ<61> MEM_B_DQ<60> MEM_B_DQ<59> MEM_B_DQ<58> MEM_B_DQ<57> MEM_B_DQ<56> MEM_B_DQ<55> MEM_B_DQ<54> MEM_B_DQ<53> MEM_B_DQ<52> MEM_B_DQ<51> MEM_B_DQ<50> MEM_B_DQ<49> MEM_B_DQ<48> MEM_B_DQ<47> MEM_B_DQ<46> MEM_B_DQ<45> MEM_B_DQ<44> MEM_B_DQ<43> MEM_B_DQ<42> MEM_B_DQ<41> MEM_B_DQ<40> MEM_B_DQ<39> MEM_B_DQ<38> MEM_B_DQ<37> MEM_B_DQ<36> MEM_B_DQ<35> MEM_B_DQ<34> MEM_B_DQ<33> MEM_B_DQ<32> MEM_B_DQ<31> MEM_B_DQ<30> MEM_B_DQ<29> MEM_B_DQ<28> MEM_B_DQ<27> MEM_B_DQ<26> MEM_B_DQ<25> MEM_B_DQ<24> MEM_B_DQ<23> MEM_B_DQ<22> MEM_B_DQ<21> MEM_B_DQ<20> MEM_B_DQ<19> MEM_B_DQ<18> MEM_B_DQ<17> MEM_B_DQ<16> MEM_B_DQ<15> MEM_B_DQ<14> MEM_B_DQ<13> MEM_B_DQ<12> MEM_B_DQ<11> MEM_B_DQ<10> MEM_B_DQ<9> MEM_B_DQ<8> MEM_B_DQ<7> MEM_B_DQ<6> MEM_B_DQ<5> MEM_B_DQ<4> MEM_B_DQ<3> MEM_B_DQ<2> MEM_B_DQ<1> MEM_B_DQ<0>

MEM_B_DM<7> MEM_B_DM<6> MEM_B_DM<5> MEM_B_DM<4> MEM_B_DM<3> MEM_B_DM<2> MEM_B_DM<1> MEM_B_DM<0>

AT4 AT3 AV2 AV3 AR4 AR3 AU2 AU3 AY4 AY3 BB3 BC3 AW4 AW3 BA3 BB2 BB5 BA5 BA8 BC8 BB4 BC4 BA7 AY8

BA9 BB10 BB12 AW12

BB8

BB9 AY12 BA12 BC32 AW32 BA35 AY36 BA32 BB32 BA34 AY35 BC36 AW36 BA39 AY40 BA36 BB36 BA38 AY39 BB40 AW40 AV42 AV41 BA40 BC40 AW42 AW41 AT40 AT41 AP41 AN40 AU40 AU41 AR41 AP42

AT5

BA2

AY7 BA11 BB34 BB38 AY43 AR42

OMIT

U1400

MCP79-TOPO-B

BGA

(3 OF 11)

MDQ1_63 MDQ1_62 MDQ1_61 MDQ1_60 MDQ1_59 MDQ1_58 MDQ1_57 MDQ1_56 MDQ1_55 MDQ1_54 MDQ1_53 MDQ1_52 MDQ1_51 MDQ1_50 MDQ1_49 MDQ1_48 MDQ1_47 MDQ1_46 MDQ1_45 MDQ1_44 MDQ1_43 MDQ1_42 MDQ1_41 MDQ1_40 MDQ1_39 MDQ1_38 MDQ1_37 MDQ1_36 MDQ1_35 MDQ1_34 MDQ1_33 MDQ1_32 MDQ1_31 MDQ1_30 MDQ1_29 MDQ1_28 MDQ1_27 MDQ1_26 MDQ1_25 MDQ1_24 MDQ1_23 MDQ1_22 MDQ1_21 MDQ1_20 MDQ1_19 MDQ1_18 MDQ1_17 MDQ1_16 MDQ1_15 MDQ1_14 MDQ1_13 MDQ1_12 MDQ1_11 MDQ1_10 MDQ1_9 MDQ1_8 MDQ1_7 MDQ1_6 MDQ1_5 MDQ1_4 MDQ1_3 MDQ1_2 MDQ1_1 MDQ1_0

MDQM1_7 MDQM1_6 MDQM1_5 MDQM1_4 MDQM1_3 MDQM1_2 MDQM1_1 MDQM1_0

CONTROL

MRAS1# MCAS1#

MWE1#

MBA1_2 MBA1_1 MBA1_0

MA1_14 MA1_13 MA1_12 MA1_11 MA1_10

MA1_9 MA1_8 MA1_7 MA1_6 MA1_5 MA1_4 MA1_3 MA1_2 MA1_1 MA1_0

AT2 AT1 AY2 AY1 BB6 BA6 BA10 AY11 BB33 BA33 BB37 BA37 BA43 AY42 AT42 AT43

AW16 BA15 BA16

BB29 BB18 BB17

BA29 BA14 AW28 BC28 BA17 BB28 AY28 BA28 AY27 BA27 BA26 BB26 BA25 BB25 BA18

MDQS1_7_P MDQS1_7_N MDQS1_6_P MDQS1_6_N MDQS1_5_P MDQS1_5_N MDQS1_4_P MDQS1_4_N MDQS1_3_P MDQS1_3_N MDQS1_2_P MDQS1_2_N MDQS1_1_P MDQS1_1_N MDQS1_0_P MDQS1_0_N

MEMORY PARTITION 1

MEM_B_DQS_P<7> MEM_B_DQS_N<7> MEM_B_DQS_P<6> MEM_B_DQS_N<6> MEM_B_DQS_P<5> MEM_B_DQS_N<5> MEM_B_DQS_P<4> MEM_B_DQS_N<4> MEM_B_DQS_P<3> MEM_B_DQS_N<3> MEM_B_DQS_P<2> MEM_B_DQS_N<2> MEM_B_DQS_P<1> MEM_B_DQS_N<1> MEM_B_DQS_P<0> MEM_B_DQS_N<0>

MEM_B_RAS_L MEM_B_CAS_L MEM_B_WE_L

MEM_B_BA<2> MEM_B_BA<1> MEM_B_BA<0>

MEM_B_A<14> MEM_B_A<13> MEM_B_A<12> MEM_B_A<11> MEM_B_A<10> MEM_B_A<9> MEM_B_A<8> MEM_B_A<7> MEM_B_A<6> MEM_B_A<5> MEM_B_A<4> MEM_B_A<3> MEM_B_A<2> MEM_B_A<1> MEM_B_A<0>

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

BI

27 76

OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

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OUT

MEMORY

1A

MCLK1A_2_P MCLK1A_2_N

MCLK1A_1_P MCLK1A_1_N

MCLK1A_0_P MCLK1A_0_N

MCS1A_1# MCS1A_0#

MODT1A_1 MODT1A_0

MCKE1A_1 MCKE1A_0

BA42 BB42

BB22 BA22

BA19 AY19

BB14 BB16

BB13 AY15

AY31 BB30

TP_MEM_B_CLK2P TP_MEM_B_CLK2N

MEM_B_CLK_P<1> MEM_B_CLK_N<1>

MEM_B_CLK_P<0> MEM_B_CLK_N<0>

MEM_B_CS_L<1> MEM_B_CS_L<0>

MEM_B_ODT<1> MEM_B_ODT<0>

MEM_B_CKE<1> MEM_B_CKE<0>

27 76

OUT

27 76

OUT

27 76

OUT

27 76

OUT

27 76

OUT

27 76

OUT

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OUT

27 76

OUT

27 76

OUT

27 76

OUT

D

C

B

MCP Memory Interface

A

SYNC_MASTER=T18_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

APPLE INC.

8

7 6

5

4

3

2

SCALE

NONE

SYNC_DATE=02/05/2009

051-7903

SHT

OF

14

1

A

REV.

A

83

8 7

6

D

PP1V5_S0

10 11 15 22 37 66 67 68

6 7 82

R1611

C

R1610

40.2

1/16W MF-LF

1

40.2

1% 1/16W MF-LF

402

2

1

1%

402

2

B

A

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

7 6

TP_MEM_A_CLK5P TP_MEM_A_CLK5N

NC_MEM_A_CLK4P

6

TP_MEM_A_CLK4N NC_MEM_A_CLK3P

6

NC_MEM_A_CLK3N

6

TP_MEM_A_CS_L<2> NC_MEM_A_CS_L<3>

6

NC_MEM_A_ODT<2>

6

NC_MEM_A_ODT<3>

6

NC_MEM_A_CKE<2>

6

NC_MEM_A_CKE<3>

6

PP1V05_S0_MCP_PLL_CORE

22

87 mA (A01)

MCP_MEM_COMP_VDD

76

MCP_MEM_COMP_GND

76

17 mA 12 mA 19 mA 39 mA

5

4

3

2 1

OMIT

U1400

MCP79-TOPO-B

BGA

AU33

MCLK0B_2_P

AU34

MCLK0B_2_N

BB24

MCLK0B_1_P

BC24

MCLK0B_1_N

BA21

MCLK0B_0_P

BB21

MCLK0B_0_N

AU17

MCS0B_0#

AR15

MCS0B_1#

AN17

MODT0B_0

AN15

MODT0B_1

AV23

MCKE0B_0

AN25

MCKE0B_1

T27

+V_PLL_XREF_XS

U28

+V_PLL_DP

U27

+V_PLL_CORE

T28

+V_VPLL

AN41

MEM_COMP_VDD

AM41

MEM_COMP_GND

AA22

GND1

AP12

GND2

G30

GND3

P10

GND4

T10

GND5

T6

GND6

V10

GND7

V34

GND8

W5

GND9

AA39

GND10

AB22

GND11

AB7

GND12

AD22

GND13

AE20

GND14

AF24

GND15

AG24

GND16

AH35

GND17

AK7

GND18

AM28

GND19

AT25

GND20

AP30

GND21

AR36

GND22

AU10

GND23

F28

GND24

BC21

GND25

AY9

GND26

BC9

GND27

D34

GND28

F24

GND29

G32

GND30

H31

GND31

K7

GND32

M38

GND33

M5

GND34

M6

GND35

M7

GND36

M9

GND37

N39

GND38

N8

GND39

P33

GND40

P34

GND41

P37

GND42

P4

GND43

P40

GND44

P7

GND45

R36

GND46

R40

GND47

R43

GND48

R5

GND49

T18

GND50

T20

GND51

AK11

GND52

T24

GND53

T26

GND54

5

(4 OF 11)

MCLK1B_2_P MCLK1B_2_N

MCLK1B_1_P MCLK1B_1_N

MCLK1B_0_P MCLK1B_0_N

MEMORY CONTROL 0B

MEMORY CONTROL 1B

+VDD_MEM1 +VDD_MEM2 +VDD_MEM3 +VDD_MEM4 +VDD_MEM5 +VDD_MEM6 +VDD_MEM7 +VDD_MEM8

+VDD_MEM9 +VDD_MEM10 +VDD_MEM11 +VDD_MEM12 +VDD_MEM13 +VDD_MEM14 +VDD_MEM15 +VDD_MEM16 +VDD_MEM17 +VDD_MEM18 +VDD_MEM19 +VDD_MEM20 +VDD_MEM21 +VDD_MEM22 +VDD_MEM23 +VDD_MEM24 +VDD_MEM25 +VDD_MEM26 +VDD_MEM27 +VDD_MEM28 +VDD_MEM29 +VDD_MEM30 +VDD_MEM31 +VDD_MEM32 +VDD_MEM33 +VDD_MEM34 +VDD_MEM35 +VDD_MEM36 +VDD_MEM37 +VDD_MEM38 +VDD_MEM39 +VDD_MEM40 +VDD_MEM41 +VDD_MEM42 +VDD_MEM43 +VDD_MEM44 +VDD_MEM45

MCS1B_0# MCS1B_1#

MODT1B_0 MODT1B_1

MCKE1B_0 MCKE1B_1

MRESET0#

GND55 GND56 GND57 GND58 GND59 GND60 GND61 GND62 GND63 GND64

BA41 BB41

AY23 BA23

BA20 AY20

BC16 BA13

AY16 BC13

BA30 BA31

AY32

AM17 AM19 AM21 AM23 AM25 AM27 AM29 AN16 BC29 AN20 AN24 AT17 AP16 AN22 AP20 AP24 AV16 AR16 AR20 AR24 AW15 AP22 AP18 AU16 AN18 AU24 AT21 AY29 AV24 AU20 AU22 AW27 BC17 AV20 AY17 AY18 AM15 AU18 AY25 AY26 AW19 AW24 BC25 AL30 AM31

T33 T34 T35 T37 T38 T7 T9 U18 U20 U22

TP or NC for DDR2.

PP1V5_S0

4

TP_MEM_B_CLK5P NC_MEM_B_CLK5N

NC_MEM_B_CLK4P NC_MEM_B_CLK4N

NC_MEM_B_CLK3P TP_MEM_B_CLK3N

TP_MEM_B_CS_L<2> TP_MEM_B_CS_L<3>

NC_MEM_B_ODT<2> TP_MEM_B_ODT<3>

NC_MEM_B_CKE<2> TP_MEM_B_CKE<3>

MCP_MEM_RESET_L

4771 mA (A01, DDR3)

6

28

OUT

6 7

10 11 15 22 37 66 67 68 82

D

C

B

MCP Memory Misc

SYNC_MASTER=T18_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

APPLE INC.

3

2

SCALE

NONE

SYNC_DATE=02/05/2009

051-7903

SHT

OF

15 83

1

A

REV.

A

8 7

6

D

C

29

35

58

30

29

29 77

34 77

B

34 77

77

A

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

7 6

NC_PEG_D2RP<0>

8

IN

NC_PEG_D2RN<0>

8

IN

NC_PEG_D2RP<1>

8

IN

NC_PEG_D2RN<1>

8

IN

NC_PEG_D2RP<2>

8

IN

NC_PEG_D2RN<2>

8

IN

NC_PEG_D2RP<3>

8

IN

NC_PEG_D2RN<3>

8

IN

NC_PEG_D2RP<4>

8

IN

NC_PEG_D2RN<4>

8

IN

NC_PEG_D2RP<5>

8

IN

NC_PEG_D2RN<5>

8

IN

NC_PEG_D2RP<6>

8

IN

NC_PEG_D2RN<6>

8

IN

NC_PEG_D2RP<7>

8

IN

NC_PEG_D2RN<7>

8

IN

NC_PEG_D2RP<8>

8

IN

NC_PEG_D2RN<8>

8

IN

NC_PEG_D2RP<9>

8

IN

NC_PEG_D2RN<9>

8

IN

NC_PEG_D2RP<10>

8

IN

NC_PEG_D2RN<10>

8

IN

NC_PEG_D2RP<11>

8

IN

NC_PEG_D2RN<11>

8

IN

NC_PEG_D2RP<12>

8

IN

NC_PEG_D2RN<12>

8

IN

NC_PEG_D2RP<13>

8

IN

NC_PEG_D2RN<13>

8

IN

NC_PEG_D2RP<14>

8

IN

NC_PEG_D2RN<14>

8

IN

NC_PEG_D2RP<15>

8

IN

NC_PEG_D2RN<15>

8

IN

TP_PEG_PRSNT_L

8

IN

MINI_CLKREQ_L

IN

PCIE_MINI_PRSNT_L

IN

FW_CLKREQ_L

IN

PCIE_FW_PRSNT_L

8

IN

TP_EXCARD_CLKREQ_L

8

IN

TP_PCIE_EXCARD_PRSNT_L

8

IN

TP_PE4_CLKREQ_L NC_PE4_PRSNT_L

6

AUD_IP_PERIPHERAL_DET

IN

TP_GMUX_JTAG_TCK_L

8

OUT

CARDREADER_RESET

OUT

TP_GMUX_JTAG_TDO

8

IN

PCIE_WAKE_L

6

IN

PCIE_MINI_D2R_P

6

IN

PCIE_MINI_D2R_N

6

IN

PCIE_FW_D2R_P

IN

PCIE_FW_D2R_N

IN

NC_PCIE_EXCARD_D2RP

8

IN

NC_PCIE_EXCARD_D2RN

8

IN

TP_PCIE_PE4_D2RP NC_PCIE_PE4_D2RN

6

GND

57 mA (A01, DVDD0 & 1)

PP1V05_S0

6 7 9

10 11 12 13 17 19 21 22

23 35 61 65 66 67

PP1V05_S0_MCP_PLL_PEX

22

84 mA (A01)

MCP_PEX_CLK_COMP

77

NO STUFF

1

R1710

2.37K

1% 1/16W MF-LF 402

2

PLACEMENT_NOTE=Place within 12.7mm of U1400

5

4

OMIT

U1400

MCP79-TOPO-B

BGA

F7

PE0_RX0_P

E7

PE0_RX0_N

D7

PE0_RX1_P

C7

PE0_RX1_N

E6

PE0_RX2_P

F6

PE0_RX2_N

E5

PE0_RX3_P

F5

PE0_RX3_N

E4

PE0_RX4_P

E3

PE0_RX4_N

C3

PE0_RX5_P

D3

PE0_RX5_N

G5

PE0_RX6_P

H5

PE0_RX6_N

J7

PE0_RX7_P

J6

PE0_RX7_N

J5

PE0_RX8_P

J4

PE0_RX8_N

L11

PE0_RX9_P

L10

PE0_RX9_N

L9

PE0_RX10_P

L8

PE0_RX10_N

L7

PE0_RX11_P

L6

PE0_RX11_N

N11

PE0_RX12_P

N10

PE0_RX12_N

N9

PE0_RX13_P

P9

PE0_RX13_N

N7

PE0_RX14_P

N6

PE0_RX14_N

N5

PE0_RX15_P

N4

PE0_RX15_N

Int PU

C9 D11

PE0_PRSNT_16#

Int PU

D5

PEB_CLKREQ#/GPIO_49

D9

PEB_PRSNT#

Int PU

E8

PEC_CLKREQ#/GPIO_50

C10

PEC_PRSNT#

Int PU

M15

PED_CLKREQ#/GPIO_51

B10

PED_PRSNT#

Int PU

L16

PEE_CLKREQ#/GPIO_16

L18

PEE_PRSNT#/GPIO_46

Int PU

M16

PEF_CLKREQ#/GPIO_17

M18

PEF_PRSNT#/GPIO_47

Int PU

M17

PEG_CLKREQ#/GPIO_18

M19

PEG_PRSNT#/GPIO_48

F17

PE_WAKE#

K9

PE1_RX0_P

J9

PE1_RX0_N

H9

PE1_RX1_P

G9

PE1_RX1_N

F9

PE1_RX2_P

E9

PE1_RX2_N

H7

PE1_RX3_P

G7

PE1_RX3_N

T17

+DVDD0_PEX1

W19

+DVDD0_PEX2

U17

+DVDD0_PEX3

V19

+DVDD0_PEX4

W16

+DVDD0_PEX5

W17

+DVDD0_PEX6

W18

+DVDD0_PEX7

U16

+DVDD0_PEX8

T19

+DVDD1_PEX1

U19

+DVDD1_PEX2

T16

+V_PLL_PEX

A11

PEX_CLK_COMP

If PE0 interface is not used, ground DVDD0_PEX and AVDD0_PEX. If PE1 interface is not used, ground DVDD1_PEX and AVDD1_PEX.

5

(5 OF 11)

Int PU

Int PU (S5)

PE0_TX0_P

PE0_TX0_N

PE0_TX1_P

PE0_TX1_N

PE0_TX2_P

PE0_TX2_N

PE0_TX3_P

PE0_TX3_N

PE0_TX4_P

PE0_TX4_N

PE0_TX5_P

PE0_TX5_N

PE0_TX6_P

PE0_TX6_N

PE0_TX7_P

PE0_TX7_N

PE0_TX8_P

PE0_TX8_N

PE0_TX9_P

PE0_TX9_N PE0_TX10_P PE0_TX10_N PE0_TX11_P PE0_TX11_N PE0_TX12_P PE0_TX12_N PE0_TX13_P PE0_TX13_N PE0_TX14_P PE0_TX14_N PE0_TX15_P PE0_TX15_N

PCI EXPRESS

PE0_REFCLK_P PE0_REFCLK_N

PE1_REFCLK_P PE1_REFCLK_N

PE2_REFCLK_P PE2_REFCLK_N

PE3_REFCLK_P PE3_REFCLK_N

PE4_REFCLK_P PE4_REFCLK_N

PE5_REFCLK_P PE5_REFCLK_N

PE6_REFCLK_P PE6_REFCLK_N

PEX_RST0#

PE1_TX0_P

PE1_TX0_N

PE1_TX1_P

PE1_TX1_N

PE1_TX2_P

PE1_TX2_N

PE1_TX3_P

PE1_TX3_N

+AVDD0_PEX1 +AVDD0_PEX2 +AVDD0_PEX3 +AVDD0_PEX4 +AVDD0_PEX5 +AVDD0_PEX6 +AVDD0_PEX7 +AVDD0_PEX8

+AVDD0_PEX9 +AVDD0_PEX10 +AVDD0_PEX11 +AVDD0_PEX12 +AVDD0_PEX13

+AVDD1_PEX1

+AVDD1_PEX2

+AVDD1_PEX3

C5 D4 C4 B4 A4 A3 B3 B2 C1 D1 D2 E1 E2 F2 F3 F4 G3 H4 H3 H2 H1 J1 J2 J3 K2 K3 L4 L3 M4 M3 M2 M1

E11

G11 F11

J11 J10

G13 F13

J13 H13

L14 K14

N14 M14

K11

D8 C8

B8 A8

A7 B7

B6 C6

Y12 AA12 AB12 M12 P12 R12 N12 T12 U12 AC12 AD12 V12 W12

M13 N13 P13

NC_PEG_R2DCP<0> NC_PEG_R2DCN<0> NC_PEG_R2DCP<1> NC_PEG_R2DCN<1> NC_PEG_R2DCP<2> NC_PEG_R2DCN<2> NC_PEG_R2DCP<3> NC_PEG_R2DCN<3> NC_PEG_R2DCP<4> NC_PEG_R2DCN<4> NC_PEG_R2DCP<5> NC_PEG_R2DCN<5> NC_PEG_R2DCP<6> NC_PEG_R2DCN<6> NC_PEG_R2DCP<7> NC_PEG_R2DCN<7> NC_PEG_R2DCP<8> NC_PEG_R2DCN<8> NC_PEG_R2DCP<9> NC_PEG_R2DCN<9> NC_PEG_R2DCP<10> NC_PEG_R2DCN<10> NC_PEG_R2DCP<11> NC_PEG_R2DCN<11> NC_PEG_R2DCP<12> NC_PEG_R2DCN<12> NC_PEG_R2DCP<13> NC_PEG_R2DCN<13> NC_PEG_R2DCP<14> NC_PEG_R2DCN<14> NC_PEG_R2DCP<15> NC_PEG_R2DCN<15>

NC_PEG_CLK100MP NC_PEG_CLK100MN

PCIE_CLK100M_MINI_P PCIE_CLK100M_MINI_N

PCIE_CLK100M_FW_P PCIE_CLK100M_FW_N

NC_PCIE_CLK100M_EXCARDP NC_PCIE_CLK100M_EXCARDN

NC_PCIE_CLK100M_PE4P NC_PCIE_CLK100M_PE4N

NC_PCIE_CLK100M_PE5P NC_PCIE_CLK100M_PE5N

NC_PCIE_CLK100M_PE6P TP_PCIE_CLK100M_PE6N

PCIE_RESET_L

PCIE_MINI_R2D_C_P PCIE_MINI_R2D_C_N

PCIE_FW_R2D_C_P PCIE_FW_R2D_C_N

NC_PCIE_EXCARD_R2DCP NC_PCIE_EXCARD_R2DCN

TP_PCIE_PE4_R2D_CP NC_PCIE_PE4_R2D_CN

GND

206 mA (A01, AVDD0 & 1)

Minimum 1.025V for Gen2 supportMinimum 1.025V for Gen2 support

PP1V05_S0_MCP_PEX_AVDD

4

3

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

77

8

OUT

8

77

OUT

29 77

OUT

29 77

OUT

34 77

OUT

34 77

OUT

8

77

OUT

8

77

OUT

6

24 35

OUT

29 77

OUT

29 77

OUT

34 77

OUT

34 77

OUT

8

77

OUT

8

77

OUT

6

7

22

2 1

D

C

B

MCP PCIe Interfaces

SYNC_MASTER=T18_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

APPLE INC.

3

2

SCALE

NONE

SYNC_DATE=02/05/2009

051-7903

SHT

OF

16 83

1

A

REV.

A

8 7

6

D

31 79

IN

31 79

IN

31 79

IN

31 79

IN

31 79

IN

31 79

IN

8

17

IN

8

17

6 7

17 22 31 32

PP3V3_ENET

R1810

49.9

1/16W MF-LF

R1811

49.9

1/16W MF-LF

1

1%

402

2

1

1%

402

2

IN

8

17

IN

6

22

79

23

C

23 77

OUT

23 77

OUT

PP3V3_S5

6 7

19 21 22 24 28 32 35 36

42 52 62 66 67 68 69 71 82

R1820

47K

1/16W MF-LF

42

BI

1

5%

402

2

Interface Mode MCP Signal =MCP_HDMI_TXC_P/N

=MCP_HDMI_TXD_P/N<0> =MCP_HDMI_TXD_P/N<1> =MCP_HDMI_TXD_P/N<2> =MCP_HDMI_DDC_CLK =MCP_HDMI_DDC_DATA

B

=MCP_HDMI_HPD DP_IG_AUX_CH_P/N

NOTE: 1M pull-down required on DP_IG_CA_DET if DP not used. NOTE: 20K pull-down required on DP_HPD_DET. NOTE: 1K pull-down required on DP_IG_AUX_CH_N if DP is used.

NOTE: HDMI port requires level-shifting. IFP interface can be used to provide HDMI or dual-channel TMDS without level-shifters.

TMDS/HDMI TMDS_IG_TXC_P/N

TMDS_IG_TXD_P/N<0> TMDS_IG_TXD_P/N<1> TMDS_IG_TXD_P/N<2> TMDS_IG_DDC_CLK TMDS_IG_DDC_DATA TMDS_IG_HPD TP_DP_IG_AUX_CHP/N

LVDS: Power +VDD_IFPx at 1.8V Dual-channel TMDS: Power +VDD_IFPx at 3.3V

DisplayPort DP_IG_ML_P/N<3>

DP_IG_ML_P/N<2> DP_IG_ML_P/N<1> DP_IG_ML_P/N<0> DP_IG_DDC_CLK DP_IG_DDC_DATA DP_IG_HPD DP_IG_AUX_CH_P/N

A

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

7 6

23

IN

23

OUT

70

IN

8

72 73 74

OUT

8

73

OUT

8

69

OUT

70

OUT

70

OUT

70

OUT

70

OUT

70

OUT

70

OUT

70 71 82

OUT

70 71 82

OUT

70 77

OUT

70 77

OUT

8

IN

70 71

IN

6 7

23 53 66

23

6 7 9

10 11 12 13 16 19 21 22

23 35 61 65 66 67

23 77

OUT

23 77

OUT

GPIOs 57-59 (if LCD panel is used): In MCP79 these pins have undocumented internal

pull-ups (~10K to 3.3V S0). To ensure pins are low by default, pull-downs (1K or stronger) must be used.

=DVI_HPD_GMUX_INT: Alias to DVI_HPD for systems using IFP for DVI.

Alias to GMUX_INT for systems with GMUX. Alias to HPLUG_DET2 for other systems. Pull-down (20k) required in all cases.

ENET_RXD<0> ENET_RXD<1> ENET_RXD<2> ENET_RXD<3>

ENET_CLK125M_RXCLK ENET_RX_CTRL

MCP_MII_PD MCP_MII_PD MCP_MII_PD

NC_ENET_INTR_L PP1V05_ENET_MCP_PLL_MAC

5 mA (A01)

MCP_MII_COMP_VDD MCP_MII_COMP_GND

NC_MCP_RGB_DAC_RSET NC_MCP_RGB_DAC_VREF

NC_MCP_TV_DAC_RSET NC_MCP_TV_DAC_VREF

NC_MCP_CLK27M_XTALIN NC_MCP_CLK27M_XTALOUT

LPCPLUS_GPIO DP_IG_CA_DET

LCD_BKLT_PWM LVDS_BKL_ON LCD_PWR_EN

=MCP_HDMI_TXC_P =MCP_HDMI_TXC_N

=MCP_HDMI_TXD_P<0> =MCP_HDMI_TXD_N<0> =MCP_HDMI_TXD_P<1> =MCP_HDMI_TXD_N<1> DP_ML_P<0> DP_ML_N<0>

DP_IG_AUX_CH_P DP_IG_AUX_CH_N

MCP_HPLUG_DET2 DP_HPD

PP1V8_S0

190 mA (A01, 1.8V)

PP3V3_S0_MCP_VPLL

16 mA (A01)

PP1V05_S0

95 mA (A01)

MCP_HDMI_RSET MCP_HDMI_VPROBE

(See below)

8 mA 8 mA

5

C23

RGMII_RXD0

B23

RGMII_RXD1

E24

RGMII_RXD2

A24

RGMII_RXD3

A23

RGMII_RXC/MII_RXCLK

C22

RGMII_RXCTL/MII_RXDV

F23

MII_RXER/GPIO_36

B26

MII_COL/GPIO_20/MSMB_DATA

B22

MII_CRS/GPIO_21/MSMB_CLK

J22

RGMII_INTR/GPIO_35

T23

+V_DUAL_MACPLL

C27

MII_COMP_VDD

B27

MII_COMP_GND

C39

RGB_DAC_RSET

B38

RGB_DAC_VREF

E36

TV_DAC_RSET

A35

TV_DAC_VREF

C38

XTALIN_TV

D38

XTALOUT_TV

E16

GPIO_6/FERR*/IGPU_GPIO_6

B15

GPIO_7/NFERR*/IGPU_GPIO_7

G39

LCD_BKL_CTL/GPIO_57

E37

LCD_BKL_ON/GPIO_59

F40

LCD_PANEL_PWR/GPIO_58

D35

HDMI_TXC_P/ML0_LANE3_P

E35

HDMI_TXC_N/ML0_LANE3_N

G35

HDMI_TXD0_P/ML0_LANE2_P

F35

HDMI_TXD0_N/ML0_LANE2_N

F33

HDMI_TXD1_P/ML0_LANE1_P

G33

HDMI_TXD1_N/ML0_LANE1_N

J33

HDMI_TXD2_P/ML0_LANE0_P

H33

HDMI_TXD2_N/ML0_LANE0_N

D43

DP_AUX_CH0_P

C43

DP_AUX_CH0_N

C31

HPLUG_DET2/GPIO_22

F31

HPLUG_DET3

M27

+VDD_IFPA

M26

+VDD_IFPB

M28

+V_PLL_IFPAB

M29

+V_PLL_HDMI

T25

+VDD_HDMI

J31

HDMI_RSET

J30

HDMI_VPROBE

5

OMIT

U1400

MCP79-TOPO-B

BGA

(6 OF 11)

LAN

DACS

TV / Component C / Pr Y / Y Comp / Pb

4

MII_VREF

DDC_CLK0

DDC_CLK3

J24 K24

U23 V23

E28

B24 C24 C25 D25

D24 C26

D21 C21

G23

E23

J23

J32 K32

B31 A31

B39 A39 B40

A40 A41

A36 B36 C36

D36 C37

B35 C35

B32 A32 D32 C32 D33 C33 B34 C34

L31 K31

J29 H29 L29 K29 L30 K30 N30 M30

C30 B30

D31 E31

E32 G31

+3.3V_DUAL_RMGT1 +3.3V_DUAL_RMGT2

+V_DUAL_RMGT1 +V_DUAL_RMGT2

RGMII_TXD0 RGMII_TXD1 RGMII_TXD2 RGMII_TXD3

RGMII_TXC/MII_TXCLK

RGMII_TXCTL/MII_TXEN

RGMII_MDC

RGMII_MDIO

RGMII_PWRDWN/GPIO_37

BUF_25MHZ

MII_RESET#

+V_RGB_DAC

+V_TV_DAC

DDC_DATA0

RGB_DAC_RED

RGB_DAC_GREEN

RGB_DAC_BLUE

RGB_DAC_HSYNC RGB_DAC_VSYNC

RGB ONLY

TV_DAC_RED

TV_DAC_GREEN

TV_DAC_BLUE

TV_DAC_HSYNC/GPIO_44 TV_DAC_VSYNC/GPIO_45

IFPA_TXC_P IFPA_TXC_N

IFPA_TXD0_P IFPA_TXD0_N IFPA_TXD1_P IFPA_TXD1_N IFPA_TXD2_P IFPA_TXD2_N IFPA_TXD3_P IFPA_TXD3_N

IFPB_TXC_P IFPB_TXC_N

IFPB_TXD4_P IFPB_TXD4_N IFPB_TXD5_P IFPB_TXD5_N IFPB_TXD6_P IFPB_TXD6_N IFPB_TXD7_P

FLAT PANEL

IFPB_TXD7_N

DDC_CLK2/GPIO_23

DDC_DATA2/GPIO_24

DDC_DATA3

IFPAB_RSET

IFPAB_VPROBE

4

PP3V3_ENET

PP1V05_ENET

MCP_MII_VREF ENET_TXD<0>

ENET_TXD<1> ENET_TXD<2> ENET_TXD<3>

ENET_CLK125M_TXCLK ENET_TX_CTRL

ENET_MDC ENET_MDIO

NC_ENET_PWRDWN_L

MCP_CLK25M_BUF0_R

ENET_RESET_L

PP3V3_S0_MCP_DAC 103 mA 103 mA

MCP_DDC_CLK0 MCP_DDC_DATA0

NC_MCP_RGB_RED NC_MCP_RGB_GREEN NC_MCP_RGB_BLUE

NC_MCP_RGB_HSYNC NC_MCP_RGB_VSYNC

NC_CRT_IG_R_C_PR NC_CRT_IG_G_Y_Y NC_CRT_IG_B_COMP_PB

NC_CRT_IG_HSYNC NC_CRT_IG_VSYNC

LVDS_CONN_A_CLK_P LVDS_CONN_A_CLK_N

LVDS_IG_A_DATA_P<0> LVDS_IG_A_DATA_N<0> LVDS_IG_A_DATA_P<1> LVDS_IG_A_DATA_N<1> LVDS_IG_A_DATA_P<2> LVDS_IG_A_DATA_N<2> NC_LVDS_IG_A_DATAP<3> NC_LVDS_IG_A_DATAN<3>

LVDS_CONN_B_CLK_P LVDS_CONN_B_CLK_N

LVDS_IG_B_DATA_P<0> LVDS_IG_B_DATA_N<0> LVDS_IG_B_DATA_P<1> LVDS_IG_B_DATA_N<1> LVDS_IG_B_DATA_P<2> LVDS_IG_B_DATA_N<2> NC_LVDS_IG_B_DATAP<3> NC_LVDS_IG_B_DATAN<3>

LVDS_DDC_CLK LVDS_DDC_DATA

DP_IG_DDC_CLK DP_IG_DDC_DATA

MCP_IFPAB_RSET MCP_IFPAB_VPROBE

1

R1850

10K

5% 1/16W MF-LF 402

2

206 mA (A01)

3

6 7

17 22 31 32

83 mA (A01)

6 7

131 mA (A01)

22 31 32

22

IN

31 79

OUT

31 79

OUT

31 79

OUT

31 79

OUT

31 79

OUT

31 79

OUT

31 79

OUT

BI

6

32 79

OUT

31 79

OUT

23

23 77

OUT

23 77

OUT

23 77

OUT

23 77

OUT

23 77

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

8

OUT

6 8

OUT

BI

70

OUT

BI

23 77

OUT

23 77

OUT

3

2 1

Network Interface Select

Interface

RGMII

NOTE: All Apple products set strap to MII, RGMII products will enable

31 79

1

R1860

100K

5% 1/16W MF-LF

402

2

69 77

77

WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliases

69 77

77

69

6 8

69

70

feature via software. This avoids a leakage issue since MCP79 requires a S5 pull-up.

PP3V3_S0

1

R1861

100K

5% 1/16W MF-LF 402

2

RGB DAC Disable: Okay to float all RGB_DAC signals.

DDC_CLK0/DDC_DATA0 pull-ups still required.

TV DAC Disable: Okay to float all TV_DAC signals.

Okay to float XTALIN_TV and XTALOUT_TV. DDC_CLK0/DDC_DATA0 pull-ups still required.

MCP Ethernet & Graphics

SYNC_MASTER=T18_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE INC.

2

MII

61 66 67 68 69 71 72 82 6 7

12 18 20 21 22 23 26 27 35

37 41 43 45 46 47 49 53 57 58

DRAWING NUMBER

SIZE

D

SCALE

NONE

ENET_TXD<0>

1 0

SYNC_DATE=02/05/2009

051-7903

SHT

OF

17 83

1

D

C

B

A

REV.

A

8 7

6

5

4

3

2 1

OMIT

U1400

MCP79-TOPO-B

BGA

Int PU

(7 OF 11)

PCI_GNT2#/GPIO_41/RS232_DTR# PCI_GNT3#/GPIO_39/RS232_RTS#

PCI_GNT4#/GPIO_53/RS232_SOUT#

PCI_PERR#/GPIO_43/RS232_DCD#

LPC_PWRDWN#/GPIO_54/EXT_NMI#

LPC PCIGND

PCI_GNT0#

PCI_GNT1#/FANCTL2

PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3#

PCI_DEVSEL#

PCI_FRAME#

PCI_IRDY#

PCI_PAR

PCI_SERR# PCI_STOP#

PCI_PME#/GPIO_30

Int PU (S5)

PCI_RESET0# PCI_RESET1#

PCI_CLK0 PCI_CLK1 PCI_CLK2

PCI_CLKIN

LPC_FRAME#

LPC_RESET0#

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_CLK0

GND98

GND99 GND100 GND101 GND102 GND103 GND104 GND105 GND106 GND107 GND108 GND109 GND110 GND111 GND112 GND113 GND114 GND115 GND116 GND117 GND118 GND119 GND120 GND121 GND122 GND123 GND124 GND125 GND126 GND127 GND128 GND129 GND130

R3 U10 R4 U11 P3

AA3 AA6 AA11 W10

AA9 Y4 AA10 Y1 AB9 AA7 Y2

T1

R10 R11

R6 R7 R8

R9

AD4 AE12

AE5

AD3 AD2 AD1 AD5

AE9

Y26 Y27 AB18 H34 AB20 AB21 AB23 AB24 AB25 AB26 AB27 AB28 AB34 AB37 AB4 AB40 AC22 AC36 AC40 AB33 AC5 AD16 AD17 AD18 AD19 AD20 AD24 AD25 AD26 AD27 AD28 AD33 AD34

NC_PCI_GNT0_L NC_PCI_GNT1_L TP_GMUX_JTAG_TMS TP_GMUX_JTAG_TDI MCP_RS232_SOUT_L

NC_PCI_C_BE_L<0> NC_PCI_C_BE_L<1> NC_PCI_C_BE_L<2> NC_PCI_C_BE_L<3>

NC_PCI_DEVSEL_L NC_PCI_FRAME_L NC_PCI_IRDY_L TP_PCI_PAR NC_PCI_PERR_L NC_PCI_SERR_L NC_PCI_STOP_L

PM_LATRIGGER_L

MEM_VTT_EN_R NC_PCI_RESET1_L

NC_PCI_CLK0 NC_PCI_CLK1 PCI_CLK33M_MCP_R

78

PCI_CLK33M_MCP

78

LPC_FRAME_R_L LPC_PWRDWN_L

6

8

OUT

8

OUT

18

OUT

6

6 6

6

12

OUT

24

OUT

6

1

R1910

22

5% 1/16W MF-LF 402

2

PLACEMENT_NOTE=Place close to pin R8

R1960

22

1 2

LPC_RESET_L

LPC_AD_R<0> LPC_AD_R<1> LPC_AD_R<2> LPC_AD_R<3>

R1950 R1951 R1952 R1953

22 22

1 2 1 2 1 2 1 2

LPC_CLK33M_SMC_R

1

R1961

10K

5% 1/16W MF-LF 402

2

Strap for Boot ROM Selection (See HDA_SDOUT)

1/16W MF-LF

5%

1/16W MF-LF22402

5%

1/16W MF-LF22402

5%

1/16W MF-LF

5%

LPC_FRAME_L

402

LPC_AD<0> LPC_AD<1> LPC_AD<2>

402

LPC_AD<3>

402

MF-LF1/16W

40 42 78

OUT

40 42

OUT

24 78

OUT

40 42 78

BI

40 42 78

BI

40 42 78

BI

40 42 78

BI

OUT

PCI_REQ0_L

18 78

PCI_REQ1_L

18 78

FW_PWR_EN

18 35

OUT

AUD_IPHS_SWITCH_EN

8

58

OUT

MCP_RS232_SIN_L

18

IN

D

C

MCP_DEBUG<0>

12 78

BI

MCP_DEBUG<1>

12 78

BI

MCP_DEBUG<2>

12 78

BI

MCP_DEBUG<3>

12 78

BI

MCP_DEBUG<4>

12 78

BI

MCP_DEBUG<5>

12 78

BI

MCP_DEBUG<6>

12 78

BI

MCP_DEBUG<7>

12 78

BI

NC_PCI_AD<8>

6

NC_PCI_AD<9> NC_PCI_AD<10>

6

NC_PCI_AD<11>

6

NC_PCI_AD<12>

6

NC_PCI_AD<13>

6

NC_PCI_AD<14>

6

NC_PCI_AD<15>

6

NC_PCI_AD<16>

6

NC_PCI_AD<17>

6

NC_PCI_AD<18>

6

NC_PCI_AD<19>

6

NC_PCI_AD<20>

6

NC_PCI_AD<21>

6

NC_PCI_AD<22>

6

NC_PCI_AD<23>

6

NC_PCI_AD<24>

6

NC_PCI_AD<25>

6

NC_PCI_AD<26>

6

NC_PCI_AD<27>

6

NC_PCI_AD<28>

6

NC_PCI_AD<29>

6

NC_PCI_AD<30>

6

NC_PCI_AD<31>

6

NC_PCI_INTW_L

6

NC_PCI_INTX_L

6

TP_PCI_INTY_L NC_PCI_INTZ_L

6

NC_PCI_TRDY_L

6

PM_CLKRUN_L

40 42

IN

FW_PLUG_DET_L

8

35

IN

NC_LPC_DRQ0_L

6

LPC_SERIRQ

40 42 24 78

BI

B

A

T2

PCI_REQ0#

V9

PCI_REQ1#/FANRPM2

T3

PCI_REQ2#/GPIO_40/RS232_DSR#

U9

PCI_REQ3#/GPIO_38/RS232_CTS#

T4

PCI_REQ4#/GPIO_52/RS232_SIN#

AC3

PCI_AD0

AE10

PCI_AD1

AC4

PCI_AD2

AE11

PCI_AD3

AB3

PCI_AD4

AC6

PCI_AD5

AB2

PCI_AD6

AC7

PCI_AD7

AC8

PCI_AD8

AA2

PCI_AD9

AC9

PCI_AD10

AC10

PCI_AD11

AC11

PCI_AD12

AA1

PCI_AD13

AA5

PCI_AD14

Y5

PCI_AD15

W3

PCI_AD16

W6

PCI_AD17

W4

PCI_AD18

W7

PCI_AD19

V3

PCI_AD20

W8

PCI_AD21

V2

PCI_AD22

W9

PCI_AD23

U3

PCI_AD24

W11

PCI_AD25

U2

PCI_AD26

U5

PCI_AD27

U1

PCI_AD28

U6

PCI_AD29

T5

PCI_AD30

U7

PCI_AD31

P2

PCI_INTW#

N3

PCI_INTX#

N2

PCI_INTY#

N1

PCI_INTZ#

Y3

PCI_TRDY#

AD11

PCI_CLKRUN#/GPIO_42

AE2

LPC_DRQ1#/GPIO_19

AE1 AE6

U24 U26 U39

V16 V17 V18 V20 V22 V24 V26 V27 V28 V33 V37

V40

W20 W22 W24 W36 W40 W43 Y16 Y17 Y18 Y19 Y20 Y22 Y24 Y25

U4 U8

V4

V7

LPC_DRQ0# LPC_SERIRQ

GND65 GND66 GND67 GND68 GND69 GND70 GND71 GND72 GND73 GND74 GND75 GND76 GND77 GND78 GND79 GND80 GND81 GND82 GND83 GND84 GND85 GND86 GND87 GND88 GND89 GND90 GND91 GND92 GND93 GND94 GND95 GND96 GND97

Int PU Int PU

MCP_RS232_SOUT_L

18

PCI_REQ0_L

18 78

PCI_REQ1_L

18 78

FW_PWR_EN

18 35

MCP_RS232_SIN_L

18

R1989 R1990

R1991 R1992 R1994

MCP PCI & LPC

SYNC_MASTER=T18_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE INC.

8.2K

SIZE

D

SCALE

58 61 66 67 68 69 71 72 82

PP3V3_S0

6 7

12 17 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57

1 2

1 2 1 2 1 2 1 2

DRAWING NUMBER

NONE

5%

5% 5% 5% 5%

MF-LF1/16W

MF-LF1/16W MF-LF1/16W

1/16W MF-LF

MF-LF1/16W

SYNC_DATE=02/05/2009

051-7903

SHT

OF

402

402 402 402 402

D

C

B

A

REV.

A

8318

8

7 6

5

4

3

2

1

8 7

6

37 77

OUT

37 77

OUT

37 77

IN

37 77

IN

D

37 77

OUT

37 77

OUT

37 77

IN

37 77

IN

6

C

22

84 mA (A01)

6 7 9

10 11 12 13 16 17 21 22

23 35 61 65 66 67

43 mA (A01, DVDD0 & 1)

Minimum 1.025V for Gen2 support

B

7

22

127 mA (A01, AVDD0 & 1)

Minimum 1.025V for Gen2 support

77

1

2

A

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

7 6

SATA_HDD_R2D_C_P SATA_HDD_R2D_C_N

SATA_HDD_D2R_N SATA_HDD_D2R_P

SATA_ODD_R2D_C_P SATA_ODD_R2D_C_N

SATA_ODD_D2R_N SATA_ODD_D2R_P

NC_SATA_C_R2D_CP NC_SATA_C_R2D_CN

TP_SATA_C_D2RN NC_SATA_C_D2RP

TP_SATA_D_R2D_CP TP_SATA_D_R2D_CN

NC_SATA_D_D2RN NC_SATA_D_D2RP

TP_SATA_E_R2D_CP TP_SATA_E_R2D_CN

TP_SATA_E_D2RN TP_SATA_E_D2RP

TP_SATA_F_R2D_CP TP_SATA_F_R2D_CN

TP_SATA_F_D2RN TP_SATA_F_D2RP

TP_MCP_SATALED_L

PP1V05_S0_MCP_PLL_SATA

PP1V05_S0

GND

PP1V05_S0_MCP_SATA_AVDD

GND

MCP_SATA_TERMP

R2010

2.49K

1% 1/16W MF-LF 402

If all SATA_Ax & Bx pins are not used, ground DVDD0_SATA and AVDD0_SATA. If all SATA_Cx pins are not used, ground DVDD1_SATA and AVDD1_SATA.

AJ11 AJ10

AE16

AF19 AG16 AG17 AG19

AH17 AH19

AJ12 AN11 AK12 AK13 AL12 AM11 AM12 AN12 AL13

AN14 AL14 AM13 AM14

AJ7 AJ6

AJ5 AJ4

AJ9 AK9

AK2 AJ3

AJ2 AJ1

AM4 AL3

AL4 AK3

AN1 AM1

AM2 AM3

AP3 AP2

AN3 AN2

E12

AE3

5

SATA_A0_TX_P SATA_A0_TX_N

SATA_A0_RX_N SATA_A0_RX_P

SATA_A1_TX_P SATA_A1_TX_N

SATA_A1_RX_N SATA_A1_RX_P

SATA_B0_TX_P SATA_B0_TX_N

SATA_B0_RX_N SATA_B0_RX_P

SATA_B1_TX_P SATA_B1_TX_N

SATA_B1_RX_N SATA_B1_RX_P

SATA_C0_TX_P SATA_C0_TX_N

SATA_C0_RX_N SATA_C0_RX_P

SATA_C1_TX_P SATA_C1_TX_N

SATA_C1_RX_N SATA_C1_RX_P

SATA_LED#

+V_PLL_SATA

+DVDD0_SATA1 +DVDD0_SATA2 +DVDD0_SATA3 +DVDD0_SATA4

+DVDD1_SATA1 +DVDD1_SATA2

+AVDD0_SATA1 +AVDD0_SATA2 +AVDD0_SATA3 +AVDD0_SATA4 +AVDD0_SATA5 +AVDD0_SATA6 +AVDD0_SATA7 +AVDD0_SATA8 +AVDD0_SATA9

+AVDD1_SATA1 +AVDD1_SATA2 +AVDD1_SATA3 +AVDD1_SATA4

SATA_TERMP

5

OMIT

U1400

MCP79-TOPO-B

BGA

(8 OF 11)

SATA

USB_OC2#/GPIO_27/MGPIO USB_OC3#/GPIO_28/MGPIO

USB

USB_OC0#/GPIO_25 USB_OC1#/GPIO_26

USB_RBIAS_GND

4

USB0_P USB0_N

USB1_P USB1_N

USB2_P USB2_N

USB3_P USB3_N

USB4_P USB4_N

USB5_P USB5_N

USB6_P USB6_N

USB7_P USB7_N

USB8_P USB8_N

USB9_P USB9_N

USB10_P USB10_N

USB11_P USB11_N

+V_PLL_USB

GND131 GND132 GND133 GND134 GND135 GND136 GND137 GND138 GND139 GND140 GND141 GND142 GND143 GND144 GND145 GND146 GND147 GND148 GND149 GND150 GND151 GND152 GND153 GND154 GND155 GND156 GND157 GND158 GND159 GND160

4

External A

C29 D29

C28 D28

A28 B28

F29 G29

K27 L27

J26 J27

F27 G27

D27 E27

K25 L25

H25 J25

F25 G25

K23 L23

L21 K21 J21 H21

L28

A27

AD35 AD37 AD38 AE22 AE24 AE39 AE4 AD6 AF16 AF17 AF18 AF20 AF22 AF26 AF27 AF28 AF33 AF34 AF37 AF40 AG18 AG20 AG22 AG26 AG36 AG40 AH18 AH20 AH22 AH24

USB_EXTA_P USB_EXTA_N

AirPort (PCIe Mini-Card)

NC_USB_MINIP NC_USB_MININ

External D

NC_USB_EXTDP NC_USB_EXTDN

Camera

USB_CAMERA_P USB_CAMERA_N

IR

USB_IR_P USB_IR_N

Geyser Trackpad/Keyboard

USB_TPAD_P USB_TPAD_N

Bluetooth

USB_BT_P USB_BT_N

External B

USB_EXTB_P USB_EXTB_N

ExpressCard

NC_USB_EXCARDP NC_USB_EXCARDN

External C

NC_USB_EXTCP NC_USB_EXTCN

NC_USB_10P NC_USB_10N

SD Card Reader

USB_CARDREADER_P USB_CARDREADER_N

PP3V3_S0_MCP_PLL_USB

MCP_USB_RBIAS_GND

78

19 mA (A01)

R2060

1/16W MF-LF

806

402

3

38 78

BI

38 78

BI

8

78

BI

8

78

BI

8

78

BI

8

78

BI

6

29 78

BI

6

29 78

BI

39 78

BI

39 78

BI

48 78

BI

48 78

BI

6

29 78

BI

6

29 78

BI

38 78

BI

38 78

BI

8

78

BI

8

78

BI

8

78

BI

8

78

BI

6

30 78

BI

30 78

BI

22

1

1%

2

R2050

8.2K

1/16W MF-LF

1

R2051

8.2K

5% 1/16W MF-LF 402

2

1

R2052

8.2K

5%

402

2

1/16W MF-LF

5%

402

2 1

1

R2053

8.2K

5% 1/16W MF-LF 402

2

1

2

PP3V3_S5

USB_EXTA_OC_L USB_EXTB_OC_L USB_EXTC_OC_L EXCARD_OC_L

38

6 7 52 62 66 67 68 69 71 82

D

17 21 22 24 28 32 35 36 42

C

B

MCP SATA & USB

SYNC_MASTER=T18_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

APPLE INC.

3

2

SCALE

NONE

SYNC_DATE=02/05/2009

051-7903

SHT

OF

1

A

REV.

A

8319

8 7

6

5

4

3

2 1

OMIT

U1400

MCP79-TOPO-B

BGA

(9 OF 11)

D

53 57 58 61 66 67 68 69 71

PP3V3_S0

6 7

12 17 18 20 21 22 23 26

27 35 37 41 43 45 46 47 49 72 82

PP3V42_G3H

6 7

21 24 38 40 41 42 43 45

48 59 60 67

R2120

C

49.9K

1/16W MF-LF

1

R2110

49.9

1% 1/16W MF-LF 402

2

1

R2121

49.9K

1%

1/16W MF-LF 402

402

2

HDA_SDIN0

53 78

IN

NC_MLB_RAM_SIZE

6

TP_MLB_RAM_VENDOR

(MXM_OK for MXM systems)

78

MCP_HDA_PULLDN_COMP

PP1V05_S0_MCP_PLL_NV

22

37 mA (A01)

SPIROM_USE_MLB

42

OUT

SMC_ADAPTER_EN

32 35 40 41

IN

NC_SB_A20GATE

6

TP_MCP_KBDRSTIN_L SMC_WAKE_SCI_L

40

IN

SMC_RUNTIME_SCI_L

40

IN

20 mA 17 mA

SM_INTRUDER_L

TP_MCP_LID_L PM_BATLOW_L

40

IN

PM_DPRSLPVR

61 75

IN

PM_PWRBTN_L

40

IN

PM_SYSRST_DEBOUNCE_L

24

IN

RTC_RST_L

PM_RSMRST_L

40

IN

MCP_PS_PWRGD

24

IN

MCP_CPU_VLD

24 24

IN

JTAG_MCP_TDI

12

IN

JTAG_MCP_TDO

1

12

OUT

JTAG_MCP_TMS

12

IN

JTAG_MCP_TRST_L

12

IN

JTAG_MCP_TCK

12

B

IN

MCP_CLK25M_XTALIN

24

IN

MCP_CLK25M_XTALOUT

24

OUT

RTC_CLK32K_XTALIN

24

IN

RTC_CLK32K_XTALOUT

24

OUT

R2150

10K

1/16W MF-LF

1

5%

402

2

G15

HDA_SDATA_IN0

Int PD

J14

HDA_SDATA_IN1_GPIO_2/PS2_KB_CLK

Int PD

J15

HDA_SDATA_IN2_GPIO_3/PS2_KB_DATA

Int PD

A15

HDA_PULLDN_COMP

AE18

+V_PLL_NV_H

AE17

+V_PLL_SP_SPREF

L24

GPIO_1/PWRDN_OK/SPI_CS1

L26

GPIO_12_SUS_STAT_ACCLMTR_EXT_TRIG_L

K13

A20GATE

L13

KBRDRSTIN*

C19

SIO_PME*

C18

EXT_SMI/GPIO_32*

B20

INTRUDER*

M25

LID*

M24

LLB*

M22

CPU_DPRSLPVR

C16

PWRBTN*

D16

RSTBTN*

C20

RTC_RST*

D20

PWRGD_SB

E20

PS_PWRGD

C17 D17

CPU_VLD

E19

JTAG_TDI

F19

JTAG_TDO

J19

JTAG_TMS

J18

JTAG_TRST*

G19

JTAG_TCK

A16

XTALIN

B16

XTALOUT

A19

XTALIN_RTC

B19

XTALOUT_RTC

1

R2151

100K

5% 1/16W MF-LF 402

2

Int PU Int PU Int PU (S5)

Int PU (S5) Int PU (S5)

Int PU (S5) Int PU

Int PU

Int PU (S5)

HDA

HDA_DOCK_EN*_GPIO_4/PS2_MS_CLK

HDA_DOCK_RST*_GPIO_5/PS2_MS_DATA

(MGPIO2)

MISC

(MGPIO3)

+V_DUAL_HDA1 +V_DUAL_HDA2

HDA_SDATA_OUT

HDA_BITCLK

HDA_RESET*

SLP_RMGT*

THERM_DIODE_P THERM_DIODE_N

MCP_VID0/GPIO_13 MCP_VID1/GPIO_14 MCP_VID2/GPIO_15

SMB_DATA0

SMB_CLK1/MSMB_CLK

SMB_DATA1/MSMB_DATA

SMB_ALERT*/GPIO_64

FANRPM0/GPIO_60 FANCTL0/GPIO_61 FANRPM1/GPIO_63 FANCTL1/GPIO_62

CPUVDD_EN

SPI_CS0/GPIO_10 SPI_CLK/GPIO_11

SPI_DI/GPIO_8 SPI_DO/GPIO_9

SUS_CLK/GPIO_34

BUF_SIO_CLK

TEST_MODE_EN

HDA_SYNC

SLP_S3*

SLP_S5*

SPKR

SMB_CLK0

PKG_TEST

J16 K16

F15

E15

K15

L15

K17 L17

G17 J17 H17

B11 C11

L20 M20 M21

C13

L19 K19 G21 F21 M23

B12 A12 D12 C12

C14 D13 C15 B14

B18 AE7

K22 L22

PP3V3_S0

1

R2160

8.2K

5% 1/16W MF-LF 402

2

HDA_SDOUT_R

20 78

HDA_BIT_CLK_R

20 78

HDA_RST_R_L

20 78

HDA_SYNC_R

MCP_GPIO_4 AUD_I2C_INT_L

PM_SLP_S3_L PM_SLP_RMGT_L PM_SLP_S4_L

MCP_THMDIODE_P MCP_THMDIODE_N

MCP_VID<0> MCP_VID<1> MCP_VID<2>

MCP_SPKR

SMBUS_MCP_0_CLK SMBUS_MCP_0_DATA SMBUS_MCP_1_CLK SMBUS_MCP_1_DATA AP_PWR_EN

MEM_EVENT_L ODD_PWR_EN_L SMC_IG_THROTTLE_L ARB_DETECT

MCP_CPUVDD_EN

SPI_CS0_R_L SPI_CLK_R SPI_MISO SPI_MOSI_R

PM_CLK32K_SUSCLK_R TP_MCP_BUF_SIO_CLK

MCP_TEST_MODE_EN

1

R2163

10K

5% 1/16W MF-LF 402

2

82 45 46 47 49 53 57 58 61 66 67 6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 68 69 71 72

7 mA (A01)

R2170

1 2

R2171

22

1 2

5% 1/16W MF-LF

R2172

402

1 2

R2173

22

1 2

5% 1/16W MF-LF

402

20

IN

OUT OUT OUT

OUT OUT

OUT OUT OUT

OUT

BI

OUT

BI

OUT

IN

OUT

IN

20

OUT

OUT OUT

IN

OUT

1

R2190

1K

1% 1/16W MF-LF 402

2

22

5% 1/16W MF-LF

402

22

5% 1/16W MF-LF

402

20 58

6

32 35 40 67 71

8

32

6

38 40 41 67

46 82

20 64

12 26 27 43 78

12 26 43 78

43 58 72 78

20 29 32

20 26 27 40

37

20 40 41

42 78

24 78

HDA_SDOUT

HDA_BIT_CLK

HDA_RST_L

HDA_SYNC

BOOT_MODE_SAFE

1

R2180

10K

2

53 78

OUT

53 78

OUT

53 78

OUT

53 78

OUT

PP3V3_S0

5% 1/16W MF-LF 402

41

OUT

BOOT_MODE_USER

1

R2181

10K

USER mode: Normal

5% 1/16W

SAFE mode: For ROMSIP

MF-LF 402

2

recovery Connects to SMC for

automatic recovery.

53 57 58 61 66 67 68 69 71 6 7

12 17 18 20 21 22 23 26 27 35 37 41 43 45 46 47 49 72 82

BIOS Boot Select

I/F HDA_SDOUT LPC

PCI SPI0 SPI1

SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_L R1961 and R2160 selects SPI0 ROM by

default, LPC+ debug card pulls LPC_FRAME# high for SPI1 ROM override.

NOTE: MCP79 does not support FWH, only LPC ROMs. So Apple designs will not use LPC for BootROM override.

NOTE: MCP79 rev A01 does not support SPI1 option. Rev B01 will.

0 0 1 1

LPC_FRAME#

0 1 0 1

BUF_SIO_CLK Frequency

Frequency

24 MHz

14.31818 MHz

HDA_SYNC

1 0

SPI Frequency Select

0 0 1 1

SPI_CLK

0 1 0 1

Frequency

SPI_DO 31 MHz 42 MHz 25 MHz

1 MHz

NOTE: Straps not provided on this page.

D

C

B

HDA Output Caps

For EMI Reduction on HDA interface

HDA_SDOUT_R HDA_BIT_CLK_R

HDA_RST_R_L HDA_SYNC_R

1

C2170

A

10PF

CERM

5%

50V 402

C2172

2

1

C2171

2

10PF

5% 50V CERM 402

10PF

CERM

1

5%

50V

2

402

1

C2173

10PF

5% 50V

2

CERM 402

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

20 78

7 6

1

R2140

10K

5% 1/16W MF-LF 402

2

1

R2141

10K

5% 1/16W MF-LF 402

2

1

R2142

10K

5% 1/16W MF-LF 402

2

PP3V3_S0

1

R2143

10K

5% 1/16W MF-LF 402

2

MCP_GPIO_4 AUD_I2C_INT_L MEM_EVENT_L SMC_IG_THROTTLE_L

ARB_DETECT

1

R2147

100K

5% 1/16W MF-LF 402

2

5

58 61 66 67 68 69 71 72 82 6 7

12 17 18 20 21 22 23 26 27

35 37 41 43 45 46 47 49 53 57

20

20 58

20 26 27 40

20 40 41

20

4

1

R2155

22K

5% 1/16W MF-LF 402

2

1

R2156

22K

5% 1/16W MF-LF 402

2

PP3V3_S3

2

R2154

100K

5% 1/16W MF-LF 402

1

AP_PWR_EN

MCP_VID<0> MCP_VID<1> MCP_VID<2>

1

R2157

22K

5% 1/16W MF-LF 402

2

6 7

25 29 30 43 48 50 68

20 29 32

20 64

SYNC_MASTER=T18_MLB

APPLE INC.

3

2

MCP HDA & MISC

SYNC_DATE=02/05/2009

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

SCALE

NONE

051-7903

SHT

20 83

1

A

REV.

A

OF

8 7

6

5

4

3

2 1

OMIT

U1400

MCP79-TOPO-B

BGA

AH26 AH33 AH34 AH37 AH38 AJ39

D

C

B

A

AK10 AK33 AK34 AK37

AK40 AL36 AL40

AM10 AM16 AM18 AM20 AM22 AM24 AM26 AM30 AM34 AM35 AM37 AM38

AP26 AN28 AN30 AN39

AP10 AU26 AP14 AU14 AP28 AP32 AP34 AP36 AP37

AP40

AW23 AR28 AR32 AR40 AT10 AR12 AT13 AT29 AT33

AY21 AY22

AU12 AU28 AP33 AU32 AR30 AU36 AU38

AV28 AV32 AV36

AW11

AR43 AW43 AY10 AV12 AY30 AY33 AY34 AY37 AY38 AY41

(11 OF 11)

GND161 GND162 GND163 GND164 GND165 GND166

AJ8

GND167 GND168 GND169 GND170 GND171

AK4

GND172 GND173 GND174 GND175

AL5

GND176 GND177 GND178 GND179 GND180 GND181 GND182 GND183 GND184 GND185 GND186 GND187 GND188

AM5

GND189

AM6

GND190

AM7

GND191

AM9

GND192 GND193 GND194 GND195 GND196

AN4

GND197

Y7

GND198 GND199 GND200 GND201 GND202 GND203 GND204 GND205 GND206 GND207

AP4

GND208 GND209

AP7

GND210 GND211 GND212 GND213 GND214 GND215 GND216 GND217 GND218 GND219

AT6

GND220

AT7

GND221

AT9

GND222 GND223 GND224

L12

GND225 GND226 GND227 GND228 GND229 GND230 GND231 GND232

AU4

GND233

G28

GND234

F20

GND235 GND236 GND237 GND238

AV4

GND239

AV7

GND240 GND241

G20

GND242 GND243 GND244 GND245 GND246 GND247 GND248 GND249 GND250 GND342 GND251 GND252

GND253 GND254 GND255 GND256 GND257 GND258 GND259 GND260 GND261 GND262 GND263 GND264 GND265 GND266 GND267 GND268 GND269 GND270 GND271 GND272 GND273 GND274 GND275 GND276 GND277 GND278 GND279 GND280 GND281 GND282 GND283 GND284 GND285 GND286 GND287 GND288 GND289 GND290 GND291 GND292 GND293 GND294 GND295 GND296 GND297 GND298 GND299 GND300 GND301

GND

GND302 GND303 GND304 GND305 GND306 GND307 GND308 GND309 GND310 GND311 GND312 GND313 GND314 GND315 GND316 GND317 GND318 GND319 GND320 GND321 GND322 GND323 GND324 GND325 GND326 GND327 GND328 GND329 GND330 GND331 GND332 GND333 GND334 GND335 GND336 GND337 GND338 GND339 GND340 GND341

GND343

AV40 BA1 BA4 AW31 AY6 L35 BC33 BC37 BC41 AY14 BC5 C2 D10 D14 D15 D18 D19 D22 D23 D26 D30 D37 D6 E13 E17 E21 E25 E29 E33 F12 F16 F32 F8 G10 G12 G14 G16 BC12 G22 G24 AW20 G34 G4 G43 G6 G8 H11 H15 AW35 H23 AN8 G40 J12 J8 K10 K12 K18 K26 K37 K4 K40 K8 AU1 L40 L43 L5 M10 M34 M35 M37 Y28 Y33 Y34 Y35 Y37 Y38 AB17 AB16 AN26 AD7 M11 AA4 AB19 AY13 P11 Y6 T11 V11 Y11 AH16 T22

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

7 6

PPVCORE_S0_MCP

6 7

22 44 64

23065 mA (A01, 1.2V) 16996 mA (A01, 1.0V)

PP3V42_G3H

6 7

20 24 38 40 41 42 43 45

48 59 60 67

10 uA (G3) 80 uA (S0)

OMIT

U1400

MCP79-TOPO-B

BGA

AA25 AC23

U25 AH12 AG10

AG5

Y21

Y23 AA16 AA26 AA27 AA28 AC16 AC17 AC18 AC19 AC20 AC21 AA17 AC24 AC25 AC26 AC27 AC28 AD21 AD23

W27

V25 AA18 AE19 AE21 AE23 AE25 AE26 AE27 AE28 AF10 AF11 AA19

AF2 AF21 AF23 AF25

AF3

AF4

AF7 AH23

AF9 AA20 AG11 AG12 AG21 AG23 AG25

AG3

AG4 AA21

AG6

AG7

AG8

AG9

AH1 AH10 AH11

W26

AH2 AA23

W28 AH25 AH21

AH3

AH4

AH5

AH6

AH7

AH9 AA24

W21

W23

W25 AF12

A20

+VDD_CORE1 +VDD_CORE2 +VDD_CORE3 +VDD_CORE4 +VDD_CORE5 +VDD_CORE6 +VDD_CORE7 +VDD_CORE8 +VDD_CORE9 +VDD_CORE10 +VDD_CORE11 +VDD_CORE12 +VDD_CORE13 +VDD_CORE14 +VDD_CORE15 +VDD_CORE16 +VDD_CORE17 +VDD_CORE18 +VDD_CORE19 +VDD_CORE20 +VDD_CORE21 +VDD_CORE22 +VDD_CORE23 +VDD_CORE24 +VDD_CORE25 +VDD_CORE26 +VDD_CORE27 +VDD_CORE28 +VDD_CORE29 +VDD_CORE30 +VDD_CORE31 +VDD_CORE32 +VDD_CORE33 +VDD_CORE34 +VDD_CORE35 +VDD_CORE36 +VDD_CORE37 +VDD_CORE38 +VDD_CORE39 +VDD_CORE40 +VDD_CORE41 +VDD_CORE42 +VDD_CORE43 +VDD_CORE44 +VDD_CORE45 +VDD_CORE46 +VDD_CORE47 +VDD_CORE48 +VDD_CORE49 +VDD_CORE50 +VDD_CORE51 +VDD_CORE52 +VDD_CORE53 +VDD_CORE54 +VDD_CORE55 +VDD_CORE56 +VDD_CORE57 +VDD_CORE58 +VDD_CORE59 +VDD_CORE60 +VDD_CORE61 +VDD_CORE62 +VDD_CORE63 +VDD_CORE64 +VDD_CORE65 +VDD_CORE66 +VDD_CORE67 +VDD_CORE68 +VDD_CORE69 +VDD_CORE70 +VDD_CORE71 +VDD_CORE72 +VDD_CORE73 +VDD_CORE74 +VDD_CORE75 +VDD_CORE76 +VDD_CORE77 +VDD_CORE78 +VDD_CORE79 +VDD_CORE80 +VDD_CORE81

+VBAT

(10 OF 11)

+3.3V_DUAL_USB1 +3.3V_DUAL_USB2 +3.3V_DUAL_USB3 +3.3V_DUAL_USB4

+VTT_CPU1 +VTT_CPU2 +VTT_CPU3 +VTT_CPU4 +VTT_CPU5 +VTT_CPU6 +VTT_CPU7 +VTT_CPU8

+VTT_CPU9 +VTT_CPU10 +VTT_CPU11 +VTT_CPU12 +VTT_CPU13 +VTT_CPU14 +VTT_CPU15 +VTT_CPU16 +VTT_CPU17 +VTT_CPU18 +VTT_CPU19 +VTT_CPU20 +VTT_CPU21 +VTT_CPU22 +VTT_CPU23 +VTT_CPU24 +VTT_CPU25 +VTT_CPU26 +VTT_CPU27 +VTT_CPU28 +VTT_CPU29 +VTT_CPU30 +VTT_CPU31 +VTT_CPU32 +VTT_CPU33 +VTT_CPU34 +VTT_CPU35 +VTT_CPU36 +VTT_CPU37

POWER

+VTT_CPU38 +VTT_CPU39 +VTT_CPU40 +VTT_CPU41 +VTT_CPU42 +VTT_CPU43 +VTT_CPU44 +VTT_CPU45 +VTT_CPU46 +VTT_CPU47 +VTT_CPU48 +VTT_CPU49 +VTT_CPU50 +VTT_CPU51 +VTT_CPU52

+VTT_CPUCLK

+3.3V_1 +3.3V_2 +3.3V_3 +3.3V_4 +3.3V_5 +3.3V_6 +3.3V_7 +3.3V_8

+3.3V_DUAL1 +3.3V_DUAL2 +3.3V_DUAL3 +3.3V_DUAL4

+VDD_AUXC1 +VDD_AUXC2 +VDD_AUXC3

5

R32 AC32 E40 J36 N32 T32 U32 V32 W32 P31 AF32 AE32 AH32 AJ32 AK31 AK32 AD32 AL31 AB32 B41 B42 C40 C41 C42 D39 D40 D41 E38 E39 F37 F38 F39 G36 G37 G38 H35 H37 J34 J35 K33 K34 K35 L32 L33 L34 M31 M32 M33 N31 P32 Y32 AA32

AG32

AD10 AE8 AB10 AD9 Y10 AB11 AA8 Y9

G18 H19 J20 K20

G26 H27 J28 K28

T21 U21 V21

4

PP1V05_S0 1139 mA

43 mA

PP3V3_S0

PP3V3_S5 16 mA

250 mA

PP1V05_S5

66 67 6 7 9 23 35 61 65

1182 mA (A01)

46 47 49 53 57 58 61 66 67 68 6 7

12 17 18 20 22 23 26 27 35 37 41 43 45 69 71 72 82

450 mA (A01)

68 69 71 82 6 7

17 19 22 24 28 32 35 36 42 52 62 66 67

266 mA (A01)

6 7

105 mA (A01)

22 32 66

10 11 12 13 16 17 19 22

3

MCP Power & Ground

SYNC_MASTER=T18_MLB

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE INC.

2

SYNC_DATE=02/05/2009

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SIZE

D

SCALE

NONE

051-7903

SHT

1

D

C

B

A

REV.

A

OF

8321

8 7

6

5

4

3

2 1

MCP Core Power

PPVCORE_S0_MCP

6 7

21 44 64

23065 mA (A01, 1.2V) 16996 mA (A01, 1.0V)

(No IG vs. EG data)

D

MCP PCIE (DVDD) Power

35 61 65 66 67 6 7 9

10 11 12 13

16 17 19 21 22 23

57 mA (A01) 43 mA (A01)

C2500

C2515

MCP 1.05V AUX Power

PP1V05_S5

6 7

21 32 66

MCP FSB (VTT) Power

35 61 65 66 67

PP1V05_S0

6 7 9

10 11 12 13

16 17 19 21 22 23

1182 mA (A01)

C

NV: 1x 10uF 0805, 2x 4.7uF 0402, 3x 1uF 0402, 9x 0.1uF 0402 (23.3 uF) Apple: 4x 4.7uF 0402, 4x 1uF 0402, 6x 0.1uF 0402 (23.4 uF)

4.7UF

20% X5R

402

1

4V

2

C2501

4.7UF

20% X5R

402

1

C2502

4V

2

4.7UF

20% X5R

402

1

C2503

4.7UF

4V

2

20% X5R

402

1

C2504

1UF

4V

10% 10V

2

X5R 402-1

MCP SATA (DVDD) Power

PP1V05_S0PP1V05_S0

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

4.7UF

20% X5R

402

1

C2516

1UF

10%

4V

10V

2

X5R 402-1

1

C2517

1UF

10% 10V

2

X5R 402-1

1

C2518

0.1uF

20% 10V

2

CERM 402

1

C2519

0.1uF

20% 10V

2

CERM 402

MCP 1.05V RMGT Power

PP1V05_ENET

6 7

17 22 31 32

131 mA (A01)105 mA (A01)

1

C2525

0.1uF

20% 10V

2

CERM 402

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF) Apple: 7x 2.2uF 0402 (15.4 uF)

1

C2530

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2526

0.1uF

20% 10V

2

CERM 402

1

C2531

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2532

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2533

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2534

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2505

1UF

10% 10V

2

X5R 402-1

1

C2535

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2506

1UF

10% 10V

2

X5R 402-1

C2520

4.7UF

20% X5R

402

C2528

4.7uF

20% X5R

402

1

C2536

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2507

1UF

10% 10V

2

X5R 402-1

1

4V

2

1

4V

2

1

C2521

0.1uF

20% 10V

2

CERM 402

1

C2529

0.1uF

20% 10V

2

CERM 402

1

C2508

0.1UF

20% 10V

2

CERM 402

1

C2509

0.1UF

20% 10V

2

CERM 402

1

C2510

0.1UF

20% 10V

2

CERM 402

1

C2511

0.1UF

20% 10V

2

CERM 402

1

C2512

0.1UF

20% 10V

2

CERM 402

PP1V05_S0

6 7 9

10 11 12 13 16 17 19 21

22 23 35 61 65 66 67

333 mA (A01)

PP1V05_S0_MCP_PLL_UF

7

66

562 mA (A01)

1

C2513

0.1UF

20% 10V

2

CERM 402

L2570

30-OHM-5A

1 2

0603

L2575

30-OHM-5A

1 2

0603

L2580

30-OHM-1.7A

1 2

0402

C2580

4.7UF

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 1uF 0402, 2x 0.1uF 0402 (16.9 uF) Apple: 5x 2.2uF 0402 (11 uF)

1

C2570

2.2UF

20%

6.3V

2

CERM 402-LF

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF) Apple: 2x 2.2uF 0402 (4.4 uF)

1

C2575

2.2UF

20%

6.3V

2

CERM 402-LF

1

20%

4V

2

X5R 402

2

1

C2571

2.2UF

20%

6.3V

2

CERM 402-LF

PP1V05_S0_MCP_SATA_AVDD

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

1

C2576

2.2UF

20%

6.3V

2

CERM 402-LF

PP1V05_S0_MCP_PLL_FSB

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

C2581

0.1UF

20% 10V CERM 402

1

C2572

2.2UF

20%

6.3V

2

CERM 402-LF

13

270 mA (A01)

1

C2573

2.2UF

20%

6.3V

2

CERM 402-LF

7

127 mA (A01)

PP1V05_S0_MCP_PEX_AVDD

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

1

C2574

2.2UF

20%

6.3V

2

CERM 402-LF

19

7

206 mA (A01)

16

D

C

MCP Memory Power

PP1V5_S0

6 7

10 11 15 37 66

67 68 82

4771 mA (A01, DDR3)

1

C2553

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2544

0.1UF

20% 10V

2

CERM 402

53 57 58 61 66 67 68 69 71 72 6 7

12 17 18 20 21 22 23 26

27 35 37 41 43 45 46 47 49 82

MCP 3.3V Power

72 82 41 43 45 46 47 49 53 57 58

PP3V3_S0

6 7

12 17 18 20 21

22 23 26 27 35 37 61 66 67 68 69 71

450 mA (A01)

C2540

4.7UF

1

C2551

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2542

0.1UF

20% 10V

2

CERM 402

1

C2541

0.1UF

20% X5R

402

4V

20% 10V

2

CERM 402

NV: 1x 4.7uF 0603, 4x 0.1uF 0402 (5.1 uF) Apple: 4x 2.2uF 0402 (8.8 uF)

1

C2550

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2552

2.2UF

20%

6.3V

2

CERM 402-LF

1

C2543

0.1UF

20% 10V

2

CERM 402

B

MCP 3.3V AUX/USB Power

66 67 68 69 71 82

PP3V3_S5

6 7

17 19 21 24 28

32 35 36 42 52 62

266 mA (A01)

MCP 3.3V/1.5V HDA Power

72 82 41 43 45 46 47 49 53 57 58

PP3V3_S0

6 7

12 17 18 20 21

22 23 26 27 35 37 61 66 67 68 69 71

7 mA (A01)

A

PP1V05_ENET

6 7

17 22 31 32

5 mA (A01)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

8

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF) Apple: 1x 2.2uF 0402 (2.2 uF)

1

C2560

2.2UF

20%

6.3V

2

CERM 402-LF

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF) Apple: 1x 2.2uF 0402 (2.2 uF)

1

C2562

2.2UF

20%

6.3V

2

CERM 402-LF

L2595

30-OHM-1.7A

1 2

0402

C2595

4.7UF

20% X5R

402

4V

PP1V05_ENET_MCP_PLL_MAC

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

1

C2596

0.1UF

20% 10V

2

CERM 402

7 6

17

5 mA (A01)

1

C2545

0.1UF

20% 10V

2

CERM 402

PP3V3_S0

19 mA (A01)

1

C2546

0.1UF

20% 10V

2

CERM 402

1

C2547

0.1UF

20% 10V

2

CERM 402

MCP 3.3V Ethernet Power

PP3V3_ENET

6 7

17 22 31 32

83 mA (A01)

MCP79 Ethernet VRef

PP3V3_ENET

6 7

17 22 31 32

1

C2548

0.1UF

20% 10V

2

CERM 402

L2555

30-OHM-1.7A

1 2

0402

R2591

1.47K

1/16W MF-LF

R2590

1.47K

1/16W MF-LF

5

1

C2549

0.1UF

20% 10V

2

CERM 402

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF) Apple: 1x 2.2uF 0402 (2.2 uF)

PP3V3_S0_MCP_PLL_USB

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V

1

C2555

2.2UF

20%

6.3V

2

CERM 402-LF

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF) Apple: 1x 2.2uF 0402 (2.2 uF)

1

C2564

2.2UF

20%

6.3V

2

CERM 402-LF

1

1%

402

2

402

1

1%

2

MCP_MII_VREF

1

C2591

0.1UF

20% 10V

2

CERM 402

OUT

19

19 mA (A01)

17

L2582

30-OHM-1.7A

1 2

0402

C2582

4.7UF

L2584

30-OHM-1.7A

1 2

0402

C2584

4.7UF

20% X5R

402

20% X5R

402

4V

PP1V05_S0_MCP_PLL_PEX

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

1

C2583

0.1UF

20% 10V

2

CERM 402

PP1V05_S0_MCP_PLL_SATA

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

1

C2585

0.1UF

20% 10V

2

CERM 402

16

84 mA (A01)

19

84 mA (A01)

B

L2586

30-OHM-1.7A

1 2

0402

C2586

4.7UF

20%

4V X5R 402

L2588

30-OHM-1.7A

1 2

0402

C2588

4.7UF

20%

4V X5R 402

4

3

PP1V05_S0_MCP_PLL_CORE

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

1

C2587

0.1UF

20% 10V

2

CERM 402

1

C2589

0.1UF

20% 10V

2

CERM 402

87 mA (A01)

PP1V05_S0_MCP_PLL_NV

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

1

C2590

0.1UF

20% 10V

2

CERM 402

SYNC_MASTER=T18_MLB

APPLE INC.

2

15

20

37 mA (A01)

MCP Standard Decoupling

SYNC_DATE=02/05/2009

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

SCALE

NONE

051-7903

SHT

22

OF

83

1

A

REV.

A

8 7

WF: Checklist says 0-ohm resistor placeholder for ferrite bead.

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

PP1V8_S0

6 7

17 53 66

190 mA (A01, 1.8V)

D

PP1V05_S0

6 7 9

10 11 12 13 16 17 19 21

22 35 61 65 66 67

95 mA (A01)

C2615

Apple: 1x 2.2uF 0402 (2.2 uF)

1

C2610

2.2UF

20%

6.3V

2

CERM 402-LF

1

4.7UF

20% X5R

402

1

4V

2

C2616

2.2UF

20%

6.3V CERM 402-LF

6

5

4

3

NV: 1x 4.7uF 0603, 2x 0.1uF 0402 (4.9 uF)

Apple: 2x 2.2uF 0402 (4.4 uF)

PP3V3_S0_MCP_DAC

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V

1

R2651

0

5% 1/16W MF-LF 402

2

2 1

17

206 mA (A01)

D

17 23

MCP_HDMI_RSET

17 77

MCP_HDMI_VPROBE

17 77

C

58 61 66 67 68 69 71 72 82

PP3V3_S0

6 7

12 17 18 20 21 22 26 27

35 37 41 43 45 46 47 49 53 57

16 mA (A01)

NO STUFF

C2620

0.1UF

20% 10V

CERM

402

1

R2620

1

1K

1% 1/16W MF-LF

2

402

2

WF: Checklist says 0-ohm resistor placeholder for ferrite bead.

L2640

30-OHM-1.7A

1 2

0402

C2640

4.7UF

20%

6.3V CERM

603

1

2

MCP_IFPAB_RSET

17 77

MCP_IFPAB_VPROBE

17 77

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF) Apple: ???

PP3V3_S0_MCP_VPLL

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V

1

C2641

0.1uF

20% 10V

2

CERM 402

NO STUFF

C2630

0.1UF

20% 10V

CERM

402

1

2

16 mA (A01)

NO STUFF

1

R2630

1K

1% 1/16W MF-LF 402

2

17

17 23

17 23 77

NC_MCP_RGB_DAC_RSET

17 23

NC_MCP_RGB_DAC_VREF

17 23

NC_MCP_TV_DAC_RSET

17 23 77

NC_MCP_TV_DAC_VREF

17 23 77 17 23 77

NC_MCP_CLK27M_XTALIN

17 23

NC_MCP_CLK27M_XTALOUT

17 23

NC_MCP_RGB_RED NC_MCP_RGB_GREEN NC_MCP_RGB_BLUE NC_MCP_RGB_HSYNC NC_MCP_RGB_VSYNC

NC_CRT_IG_R_C_PR

NC_CRT_IG_B_COMP_PB

NC_CRT_IG_HSYNC

B

NC_MCP_RGB_RED

MAKE_BASE=TRUE

NC_MCP_RGB_GREEN

MAKE_BASE=TRUE

NC_MCP_RGB_BLUE

MAKE_BASE=TRUE

NC_MCP_RGB_HSYNC

MAKE_BASE=TRUE

NC_MCP_RGB_VSYNC

MAKE_BASE=TRUE

NC_CRT_IG_R_C_PR

MAKE_BASE=TRUE

NC_CRT_IG_G_Y_YNC_CRT_IG_G_Y_Y

MAKE_BASE=TRUE

NC_CRT_IG_B_COMP_PB

MAKE_BASE=TRUE

NC_CRT_IG_HSYNC

MAKE_BASE=TRUE

NC_CRT_IG_VSYNCNC_CRT_IG_VSYNC

MAKE_BASE=TRUE

NC_MCP_RGB_DAC_RSET

MAKE_BASE=TRUE

NC_MCP_RGB_DAC_VREF

MAKE_BASE=TRUE

NC_MCP_TV_DAC_RSET

MAKE_BASE=TRUE

NC_MCP_TV_DAC_VREF

MAKE_BASE=TRUE

NC_MCP_CLK27M_XTALIN

MAKE_BASE=TRUE

NC_MCP_CLK27M_XTALOUT

MAKE_BASE=TRUE

NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE

NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE

NO_TEST=TRUE NO_TEST=TRUE

17 23

17 23 77

17 23 77 17 23 77

17 23 77

17 23 77 17 23 77

17 23

17 23 77

17 23

C

B

A

Current numbers from email Xiaowei Lin provided 11/12/2007 3:22pm (no official document number).

8

7 6

MCP Graphics Support

SYNC_MASTER=K19_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

APPLE INC.

5

4

3

2

SCALE

D

051-7903

NONE

SHT

SYNC_DATE=02/05/2009

OF

8323

1

A

REV.

A

8 7

6

5

4

3

2 1

Platform Reset Connections

RTC Power Source

1

2

PP3V42_G3H

1

C2802

0.1UF

10% 16V

2

X5R 402

PP3V42_G3H

6 7

20 21 24 38 40 41 42 43

45 48 59 60 67

D

C2800

4.7UF

6.3V

1

C2801

4.7UF

20%

2

X5R 402

6.3V

20% X5R

402

6 7

20 21 24 38 40 41 42 43 45

48 59 60 67

18 78

IN

LPC_RESET_L

LPC Reset (Unbuffered)

R2881

PLACEMENT_NOTE=Place close to U1400

33

1 2

5% 1/16W MF-LF

402

PCIE Reset (Unbuffered)

R2883

33

1 2

5% 1/16W MF-LF

402

DEBUG_RESET_L

SMC_LRESET_L

42

OUT

D

40

OUT

RTC Crystal

R2810

0

RTC_CLK32K_XTALOUT

20

IN

NO STUFF

R2811

10M

5% 1/16W MF-LF

RTC_CLK32K_XTALIN

20

OUT

C

MCP_CLK25M_XTALOUT

20

IN

402

MCP 25MHz Crystal

NO STUFF

R2816

1M

5% 1/16W MF-LF

MCP_CLK25M_XTALIN

20

OUT

402

1 2

1/16W MF-LF

1

2

R2815

1 2

1/16W MF-LF

402

1

2

RTC_CLK32K_XTALOUT_R

5%

402

0

MCP_CLK25M_XTALOUT_R

5%

CRITICAL

Y2810

32.768K

7X1.5X1.4-SM

CRITICAL

Y2815

25.0000M

SM-3.2X2.5MM

1 4

1 3

MCP S0 PWRGD & CPU_VLD

PP3V3_S5

6 7

17 19 21 22 28 32 35 36

B

40 62 64 65 66 67

IN

61

IN

42 52 62 66 67 68 69 71 82

ALL_SYS_PWRGD

VR_PWRGOOD_DELAY

2

A

U2850

1

B

1

C2850

0.1UF

20% 10V

2

CERM 402

TC7SZ08AFEAPE

5

SOT665

4

3

MCP_PS_PWRGD

C2810

12pF

1 2

5%

50V

CERM

402

C2811

12pF

1 2

5%

50V

CERM

402

C2815

12pF

1 2

5%

50V

CERM

402

NC

2 4

NC

C2816

12pF

1 2

5%

50V

CERM

402

PCIE_RESET_L

16 24 35

IN

MAKE_BASE=TRUE

MEM_VTT_EN_R

18

IN

LPC_CLK33M_SMC_R

18 78

IN

PLACEMENT_NOTE=Place close to U1400

R2893

0

1 2

5% 1/16W MF-LF

402

R2895

0

1 2

5% 1/16W MF-LF

402

R2825

33

1 2

5% 1/16W MF-LF

402

R2891

1 2

1/16W MF-LF

R2894

1 2

1/16W MF-LF

R2870

1 2

1/16W MF-LF

R2826

1 2

1/16W MF-LF

PCIE_RESET_L

0

PCA9557D_RESET_L

5%

402

BKLT_PLT_RST_L

0

MINI_RESET_L

5%

402

CARDREADER_PLT_RST_L

33

MEM_VTT_EN

5%

402

LPC_CLK33M_SMC

33

LPC_CLK33M_LPCPLUS

5%

PLACEMENT_NOTE=Place close to U1400

402

16 24 35

OUT

25

OUT

73

OUT

29

OUT

C

30

OUT

8

63 68

OUT

40 78

OUT

42 78

OUT

B

R2829

22

PM_CLK32K_SUSCLK_R

20 78

IN

20

OUTY

PLACEMENT_NOTE=Place close to U1400

1 2

5% 1/16W MF-LF

402

PM_CLK32K_SUSCLK

40 78

OUT

MCP_CPUVDD_EN

20

IN

PLACEMENT_NOTE=Place close to U1400

1 2

5% 1/16W MF-LF

402

MCP_CPU_VLD

20

OUT

R2850

0

System Reset Circuit

PM_SYSRST_L

40

IN

A

XDP_DBRESET_L

9

12 20

IN

PLACEMENT_NOTE=Place R2897 on BOTTOM

XDP

R2896

0

1 2

5% 1/16W MF-LF

R2897

402

SILK_PART=SYS RST

OMIT

1/16W MF-LF

402

R2899

1 2

1/16W

1

MF-LF

0

5%

2

10K pull-up to 3.3V S0 inside MCP

33

5%

402

PM_SYSRST_DEBOUNCE_L

NO STUFF

1

C2899

1UF

10% 10V

2

X5R 402

OUT

SYNC_MASTER=WFERRY_K19I

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE INC.

8

7 6

5

4

3

2

SB Misc

DRAWING NUMBER

SIZE

D

SCALE

NONE

SYNC_DATE=01/06/2009

051-7903

SHT

OF

24

1

A

REV.

A

83

8 7

Page Notes

Power aliases required by this page:

- =PP3V3_S3_VREFMRGN

- =PP3V3_S5_VREFMRGN

- =PPVTT_S3_DDR_BUF

Signal aliases required by this page:

- =I2C_VREFDACS_SCL

- =I2C_VREFDACS_SDA

- =I2C_PCA9557D_SCL

- =I2C_PCA9557D_SDA

BOM options provided by this page:

D

VREFMRGN NO_VREFMRGN

C

B

6

MEM A VREF CAMEM A VREF DQ

DAC channel A B A B C Min DAC code 0x00 0x00 0x00 0x00 0x00 Max DAC code 0x87 0x87 0x87 0x87 0x55 Max sink I -3.75 mA -3.75 mA -3.75 mA -3.75 mA -0.91 mA Max source I 5 mA 5 mA 5 mA 5 mA 0.52 mA Nominal Vref 0.75 V 0.75 V 0.75 V 0.75 V 0.70 V Min Vref 0.375 V 0.375 V 0.375 V 0.375 V 0.091 V Max Vref 1.250 V 1.250 V 1.250 V 1.250 V 1.044 V Vref Stepping 6.5 mV 6.5 mV 6.5 mV 6.5 mV 11.2 mV (per DAC LSB)

PP3V3_S3

6 7

20 29 30 43 48 50 68

VREFMRGN

C2900

2.2UF

20%

6.3V CERM 402-LF

25 37 40 43 81

SMBUS_SMC_MGMT_SCL

IN

SMBUS_SMC_MGMT_SDA

BI

ADDR=0x98(WR)/0x99(RD)

VREFMRGN

1

C2901

0.1UF

20% 10V

2

CERM 402

VREFMRGN

U2900

8

VDD

6

SCL

MSOP

7

SDA

9

A0

10

A1

GND

3

VOUTA

VOUTB

VOUTC

VOUTD

DAC5574

1

VREFMRGN_DQ_SODIMM

2

VREFMRGN_CA_SODIMM

4

VREFMRGN_CPUFSB

5

NC

MEM B VREF DQ

5

MEM B VREF CA

CPU FSB VREF

1

2

1

2

1

2

VREFMRGN

C2903

0.1UF

20% 10V CERM 402

VREFMRGN

C2904

0.1UF

20% 10V CERM 402

VREFMRGN

C2905

0.1UF

20% 10V CERM 402

4

SO-DIMM A and SO-DIMM B Vref settings should be margined separately

(i.e. not simultaneously) due to current limitation of TPS51116 regulator.

PPVTTDDR_S3

7

63

B1

V+

VREFMRGN

V-

B4

B1

V+

VREFMRGN

V-

B4

B1

V+

VREFMRGN

V-

B4

B1

V+

VREFMRGN

V-

B4

B1

V+

VREFMRGN

V-

B4

U2902

MAX4253

UCSP

A1

A4

U2902

MAX4253

UCSP

C1

C4

U2903

MAX4253

UCSP

A1

A4

U2903

MAX4253

UCSP

C1

C4

U2904

MAX4253

UCSP

A1

A4

VREFMRGN_DQ_SODIMMA_BUF

25

VREFMRGN_DQ_SODIMMA_EN

VREFMRGN_DQ_SODIMMB_BUF

25

VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_CA_SODIMMA_BUF

25

VREFMRGN_CA_SODIMMA_EN

VREFMRGN_CA_SODIMMB_BUF

25

VREFMRGN_CA_SODIMMB_EN

NC

A2

A3

C2

C3

A2

A3

C2

C3

A2

A3

3

10mA max load

R2901

100K

5% 1/16W MF-LF

402

R2902

100K

5% 1/16W MF-LF

402

R2907

100K

5% 1/16W MF-LF

402

R2908

100K

5% 1/16W MF-LF

402

VREFMRGN

1 2

VREFMRGN

1 2

VREFMRGN

1 2

VREFMRGN

1 2

R2903

200

1 2

1% 1/16W MF-LF

402

R2904

100

1 2

1% 1/16W MF-LF

402

R2905

200

1 2

1% 1/16W MF-LF

402

R2906

100

1 2

1% 1/16W MF-LF

402

R2909

200

1 2

1% 1/16W MF-LF

402

R2910

100

1 2

1% 1/16W MF-LF

402

R2911

200

1 2

1% 1/16W MF-LF

402

R2912

100

1 2

1% 1/16W MF-LF

402

VREFMRGN

2 1

PP0V75_S3_MEM_VREFDQ_A

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm

Place close to J3100.1

PP0V75_S3_MEM_VREFDQ_B

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm

Place close to J3200.1

PP0V75_S3_MEM_VREFCA_A

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm

Place close to J3100.126

PP0V75_S3_MEM_VREFCA_B

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm

Place close to J3200.126

D

26

27

26

27

C

B

ADDR=0x30(WR)/0x31(RD)

SMBUS_SMC_MGMT_SCL

25 37 40 43 81

IN

SMBUS_SMC_MGMT_SDA

25 37 40 43 81

BI

A

Required zero ohm resistors when no VREF margining circuit stuffed

PART NUMBER

116S0004 1 116S0004

116S0004

8

QTY

1 CRITICAL

DESCRIPTION

RES,MTL FILM,0,5%,0402,SM,LF

7 6

VREFMRGN

1

C2902

0.1UF

20% 10V

2

CERM 402

REFERENCE DES

R2903 CRITICAL R2905 R2909116S0004 R2911

PCA9557

3

A0

4

A1

5

A2

1

SCL

2

SDA

THRM

PAD

17

CRITICAL

CRITICAL1

16

VCC

U2901

QFN

GND

8

VREFMRGN

P0 P1 P2 P3 P4 P5 P6 P7

RESET*

6

NC

7 9 10 11 12 13

NC

14

NC

15

BOM OPTION NO_VREFMRGN NO_VREFMRGN NO_VREFMRGN NO_VREFMRGN

VREFMRGN_CPUFSB_EN VREFMRGN_CA_SODIMMA_EN VREFMRGN_DQ_SODIMMA_EN VREFMRGN_CA_SODIMMB_EN VREFMRGN_DQ_SODIMMB_EN

PCA9557D_RESET_L

B1

V+

VREFMRGN

V-

B4

U2904

MAX4253

UCSP

C1

C4

VREFMRGN_CPUFSB_BUF

25

VREFMRGN_CPUFSB_EN

R2913

100K

1/16W MF-LF

100

1/16W MF-LF

402

VREFMRGN

1%

Place close to U1000.AD26

CPU_GTLREF

9

75

OUT

R2914

1 2

VREFMRGN

5%

1 2

402

C2

C3

25

24

IN

FSB/DDR3 Vref Margining

SYNC_MASTER=K24_MLB

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

DRAWING NUMBER

SIZE

D

APPLE INC.

5

4

3

2

SCALE

NONE

SYNC_DATE=02/05/2009

051-7903

SHT

OF

1

A

REV.

A

8325