Apple Catalina Schematics

5

4

3

2

1

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Clock Generator

D D

SLG8SP585

DDRIII 800/1066/1333
Non-ECC

Slot 0

DDRIII 800/1066/1333
Non-ECC

Slot 1

DDRIII Channel A

DDR III Channel B

MUX_B_1

HDMI_OUT

LED indicator

C C

Touch Panel

USB 2.0

MUX_B

Digital Display (Port B)

HDMI_Level shift

Auburndale with internal Graphic VGA

RJ45
CONN

6-in-1 Flash
media reader

1394

B B

Headphone

HD AUDIO

MIC IN

CODEC
ALC272

SPIDIF

6W AMP
TPA3113

A A

2CH SPEAKER 2.5W

Intel 82577 LC
10/100/1000

VIA VT6325
Controller

Flash ROM

32MB

MUX_A_1

WƵĚŝŽ>Z

>s^;ƵĂůŚĂŶŶĞůͿ

PCIE x1

PCIE x1

SPI

HD AUDIO

ϮϯΗ>

sK>ͺd>

5

4

Intel CPU

Auburndale
/ Clarksfield

FDI

INTEL

DMIx4

PCH

14 USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

6 SATA ports
8 PCIE ports

ACPI 1.1
LPC I/F

PCI/PCI BRIDGE

MUX_A

Scalar IC

Scalar+Video Decode +MCU
Audio codec

Touch Button with White LED

TMDS

Digital Display (Port C)

SPI_ROM

2MB

RTD 2663

HDMI_IN (1.3)AV-IN

W/Ͳdžϭϲh^

PECI

HDCP
24LC02(R)

I2C

3

Clarksfield option external GPU

h^ϮϬ

SATA

SATA

PCIE x1

PCIE x1

LPC Bus

ITE8758E

SYS
Fan

AMD
Madison
/
AMD
Park

WLAN/WiMAX

802.11a/b/g/n

Digital+Analog (Worldwide)

LPC debug port

ITE

CPU
Fan

HDMI_OUT

TMDS

TV-Tuner

MUX_B_1

MUX_A_1

Camera + Analog mic module /w
LED indicator

BLUETOOTH option (internal)

same as Bali

RF module option (internal)

same as Bali

USB x 6

eSATA CONN

Side

3.5" SATA HDD

Slim ODD

SYSTEM DC/DC

RT9025/RT9026

INPUTS

+1.5VU

SYSTEM DC/DC

APW7138QAI

DCBATOUT

<Core Des ign>

<Core Des ign>

<Core Des ign>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet

Date: Sheet

2

Date: Sheet

OUTPUTS

+1.8VS+3VS

+0.75VS

OUTPUTSINPUTS

+1.1VS_VTT

Block Diagram

Block Diagram

Block Diagram

http://hobi-elektronika.net

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

SYSTEM DC/DC

TPS51117/RT8209A

INPUTS

DCBATOUT

SYSTEM DC/DC

ISL62881

CPU DC/DC

ISL62883

INPUTS

DCBATOUT

44

PCB 8 LAYER

44

Signal 1

L1:

L2:

GND

L3:

Signal 2

Signal 3

L4:

42

L5:

VCC

Signal 4

L6:

L7: GND

L8: Signal 5

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Calpella M/B

Calpella M/B

Calpella M/B

159Tuesday, April 06, 2010

159Tuesday, April 06, 2010

159Tuesday, April 06, 2010

1

OUTPUTS

+5VALW

+3VALW

+3VL

OUTPUTS

+1.5VU

+1.05VS

OUTPUTSINPUTS

+VCC_GFXCOREDCBATOUT

OUTPUTS

+VCC_CORE

0.844~1.3V
58A

38, 39

SA

SA

SA

of

of

of

40

41

43

5

Processor Strapping

Pin Name Strap Description Configuration (Default value for each bit is

CFG[4] Disabled - No Physical Display Port attached to

DisplayPort
Presence

CFG[3]

PCI-Express Static

CFG[0]

CFG[7]

Lane Reversal

PCI-Express
Configuration
Select

Reserved ­Temporarily used
for early
Clarksfield
samples.

D D

1 unless specified otherwise)

1:Embedded

Embedded DisplayPort.
0: Enabled - An external Display Port device is

connected to the Embedded Display Port.

1:0: Normal Operation.

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

1:0: Single PCI-Express Graphics

Bifurcation enabled

Clarksfield (only for early samples pre-ES1) ­Connect to GND with 3.01K Ohm/5% resistor

Note: Only temporary for early CFD samples
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.

PCH Strapping

Name Schematics Notes

SPKR

INIT3_3V# Weak internal pull-down. Do not pull high.

GNT3#/

C C

GPIO55

INTVRMEN

GNT0#,
GNT1#

GNT2#/
GPIO53

GPIO33 Default:

SPI_MOSI

NV_ALE Enable Danbury:

NC_CLE Weak internal pull-up. Do not pull low.

HAD_DOCK_EN#
/GPIO[33]

HDA_SDO Weak internal pull-down. Do not pull high.

B B

HDA_SYNC

GPIO15

GPIO8

GPIO27 Default = Do not connect (floating)

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kȍ

No Reboot Mode with TCO Disabled:

- 10-kȍ weak pull-up resistor.

Default Mode:

Internal pull-up.
(Connect to ground with 4.7-kȍ weak

Low (0) = Top Block Swap Mode

pull-down resistor).

High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled

Left both GNT0# and GNT1# floating. No pull up

Default (SPI):

required.
Boot from PCI: Connect GNT1# to ground with 1-kȍ pull-down

resistor. Leave GNT0# Floating.
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-kȍ

pull-down resistor.

Default - Internal pull-up.

= Configures DMI for ESI compatible operation (for servers

Low (0)

only. Not for mobile/desktops).

Do not pull low.
Connect to ground with 1-kȍ

Disable ME in Manufacturing Mode:

pull-down resistor.

Connect to Vcc3_3 with 8.2-kȍ weak pull-up resistor.

Enable iTPM:

Left floating, no pull-down required.

Disable iTPM:

Connect to Vcc3_3 with 8.2-kȍ weak pull-up
resistor.
Connect to ground with 4.7-kȍ weak pull-down

Disable Danbury:

resistor.

Flash Descriptor Security will be overridden.

Low (0):

Flash Descriptor Security will be in effect.

High (1) :

Weak internal pull-down. Do not pull high.

Weak internal pull-down. Do not pull high.

Weak internal pull-up. Do not pull low.

High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.

N11M-GE Power Sequence

VDD33

PEX_VDD

NVVDD

A A

IFPAB_IOVDD

FBVDDQ

tNVVDD

PEX_VDD can ramp up any tim e

tNV-IFPAB_IOVDD

tNV-FBVDDQ

>10ms

5

Default
Value

1

1

1

0

>7ms

>99ms

4

http://hobi-elektronika.net

Power Sequence

DCBATOUT

3D3V_AUX_S5
5V_AUX_S5

S5_ENABL E (SIO)

5V_S5

DIS

Platform controlled

Sillicon controlled

3D3V_S5

RSMRST#_SIO

LAN_PWR_ON

3D3V_LAN_S5

SIO_PWRBTN#

PM_PWRBTN#

PM_SLP_S4#

1D5V_S3
DDR3_VREF_S3

PM_SLP_S3#

5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_S0
0D75V_S0

ALL_PWRGD

1D05V_VTT

VTT_PWRGD
(H_VTTPWRGD -->CPU, KBC)

S0_PWR_GOOD
(IMVP_VR_EN)

VCC_CORE

VR_CLKEN#

CORE_PWRGD
(SYS_PW ROK, PCH_PWROK)

GFX_VR_EN

VCC_GFXCORE

DGPU_PWR_EN#

3D3V_S0_VGA

VGA_CORE_PWR

DGPU_PWROK

1D0V_S0_VGA

1D5V_S0_VGA

1D8V_S0_VGA

PM_DRAM_PWRG D

H_PWRGD

PLT_RST#

>10ms

4

3

can power after power switch press

3

2

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

Date: Sheet

2

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

of

of

of

259Tuesday, April 06, 2010

259Tuesday, April 06, 2010

259Tuesday, April 06, 2010

5

4

3

2

1

http://hobi-elektronika.net

D D

3D3V_S0 3D3V_CK505

R226

R226

1 2

0R0603-PAD-1-GP

0R0603-PAD-1-GP

place close place close

12

12

C623

C623

C618

C618

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

12

12

C624

C624

C622

C622

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1221 (SC)

DREFCLK#15

DREFCLK15

CLKIN_DMI#15

CLKIN_DMI15

CLK_PCIE_SATA#15

CLK_PCIE_SATA15

CLK_CPU_BCLK#15

C C

R224

R224

DY

DY

2K2R2J-2-GP

2K2R2J-2-GP

(R)

(R)
1 2

REF_0/CPU_SEL

R225

R225
10KR2J-3-GP

10KR2J-3-GP

1 2

CLK_CPU_BCLK15

FSC 0 1

133MHz

SPEED

(Default)

12

C620

C620

SC47P50V2JN-3GP

SC47P50V2JN-3GP

100MHz

1D5V_S0_CK505

12

12

C126

C126

C128

C128

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1225

R1002 0R0402-PADR1002 0R0402-PAD

1 2

R1001 0R0402-PADR1001 0R0402-PAD

1 2

R998 0R0402-PADR998 0R0402-PAD

1 2

R997 0R0402-PADR997 0R0402-PAD

1 2

R1000 0R0402-PADR1000 0R0402-PAD

1 2

R999 0R0402-PADR999 0R0402-PAD

1 2

R996 0R0402-PADR996 0R0402-PAD

1 2

R995 0R0402-PADR995 0R0402-PAD

1 2

it becomes a real time input for
asserting power down (active high).??

B B

1D5V_S0

3D3V_CK505

DREFCLK#_R
DREFCLK_R

CLKIN_DMI#_R
CLKIN_DMI_R

CLK_PCIE_SATA#_R
CLK_PCIE_SATA_R

CLK_CPU_BCLK#_R
CLK_CPU_BCLK_R

CK_PWRGD

2N7002-11-GP

2N7002-11-GP

FOR CO-LAY SLG8LV595

1D5V_S0_CK505

(R)

(R)

1 2

R213

R213
0R3J-0-U-GP

0R3J-0-U-GP

12

DY

DY

R215

R215
0R3J-0-U-GP

0R3J-0-U-GP

U9

U9

4

DOT_96#

3

DOT_96

14

SRC_2#

13

SRC_2

11

SRC_1/SATA#

10

SRC_1/SATA

22

CPU_0#

23

CPU_0

19

CPU_1#

20

CPU_1

SLG8SP585VTR-GP

SLG8SP585VTR-GP

2ND = 71.93197.003

2ND = 71.93197.003

3D3V_CK505

10KR2J-3-GP

10KR2J-3-GP
R219

R219

1 2

G

Q18

Q18

S D

24

VDD_CPU

GND

33

29

17

VDD_REF

VDD_SRC

VSS_CPU

VSS_REF

21

26

VR_CLKEN# 36

1

VDD_DOT

VSS_SRC

12

1D05V_CK505

15

5

VDD_27

VDD_SRC_IO

VSS_DOT

VSS_278VSS_SATA

2

Low voltage I/O power
supply for outputs.

18

VDD_CPU_IO

27MHZ

27MHZ_SS

CPU_STOP#

CKPWRGD/PD#

REF_0/CPU_SEL

XTAL_IN

XTAL_OUT

SDA
SCL

9

1D05V_S0

0R0603-PAD-1-GP

0R0603-PAD-1-GP

VGA_XIN1_L

6

OSC_SPREAD_L

7

CPU_STOP#

16

CK_PWRGD

25

REF_0/CPU_SEL

30

GEN_XTAL_IN

28

GEN_XTAL_OUT

27

PCH_SMBDATA

31

PCH_SMBCLK

32

3D3V_CK5051D05V_CK505

R216 10KR2J-3-GPR216 10KR2J-3-GP

3.3V LVTTL input for CPU_STOP#. Contains
internal pull-up resistor.

CL=20pF±0.2pF

C133

C133

SC33P50V2JN-3GP

SC33P50V2JN-3GP

1 2

C130

C130

1 2

SC33P50V2JN-3GP

SC33P50V2JN-3GP

1221 (SC)

R221

R221

1 2

(S)

(S)

DIS

DIS

1

4

23

TP2 TPAD28TP2 TPAD28

TP19 TPAD28TP19 TPAD28

PCH_SMBDATA 12,13,15,29,58

PCH_SMBCLK 12,13,15,29,58

1 2

GEN_XTAL_IN

12

X6

X6
X-14D3181MHZ-GP

X-14D3181MHZ-GP

82.30005.A11

82.30005.A11

XTAL 14.3181M 20P30PPM HCX-5FA

XTAL 14.3181M 20P30PPM HCX-5FA

GEN_XTAL_OUT

12

12

C625

C625

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

RNT1

RNT1
SRN33J-5-GP-U

SRN33J-5-GP-U

R223 33R2J-2-GPR223 33R2J-2-GP

CPU_STOP#

star trace

C628

C628

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

1 2

1D05V_CK505

close each pin

12

VGA_XIN1 52
OSC_SPREAD 52

C129

C129

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

(R) C135

(R)

12

C127

C127

SC47P50V2JN-3GP

SC47P50V2JN-3GP

C135
SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

DY

CLK_ICH14 15

Layout Notes:

Make sure that the stubs to the test points(CK_PWRGD,
CLK_EN#, GEN_XTAL_OUT) in the layout are as short as
possible on the high speed signals.

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

359Tuesday, April 06, 2010

359Tuesday, April 06, 2010

359Tuesday, April 06, 2010

<RevCode>

<RevCode>

<RevCode>

Title

Title

Title

Ali Mountain

Ali Mountain

Ali Mountain

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A2

A2

A2

CK505_SLG8SP585

CK505_SLG8SP585

CK505_SLG8SP585

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

4

3

2

1

http://hobi-elektronika.net

1 OF 9

CPU1A

CPU1A

12

R786

R786
1KR2J-1-GP

1KR2J-1-GP

A24
C23
B22
A21

B24
D23
B23
A22

D24
G24
F23
H23

D25
F24
E23
G23

E22
D21
D19
D18
G21
E19
F21
G18

D22
C21
D20
C18
G22
E20
F20
G19

F17
E17

C17
F18

D17

DMI_RX0#
DMI_RX1#
DMI_RX2#
DMI_RX3#

DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3

DMI_TX0#
DMI_TX1#
DMI_TX2#
DMI_TX3#

DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3

FDI_TX0#
FDI_TX1#
FDI_TX2#
FDI_TX3#
FDI_TX4#
FDI_TX5#
FDI_TX6#
FDI_TX7#

FDI_TX0
FDI_TX1
FDI_TX2
FDI_TX3
FDI_TX4
FDI_TX5
FDI_TX6
FDI_TX7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT
FDI_LSYNC0

FDI_LSYNC1

AUBURNDALE

AUBURNDALE

DMI_TXN016
DMI_TXN116
DMI_TXN216
DMI_TXN316

DMI_TXP016
DMI_TXP116
DMI_TXP216
DMI_TXP316

RN40

RN40

6
7

(R)

(R)

8

SRN1KJ-4-GP

SRN1KJ-4-GP

DMI_RXN016
DMI_RXN116
DMI_RXN216
DMI_RXN316

DMI_RXP016
DMI_RXP116
DMI_RXP216
DMI_RXP316

FDI_TXN016
FDI_TXN116
FDI_TXN216
FDI_TXN316
FDI_TXN416
FDI_TXN516
FDI_TXN616
FDI_TXN716

FDI_TXP016
FDI_TXP116
FDI_TXP216
FDI_TXP316
FDI_TXP416
FDI_TXP516
FDI_TXP616
FDI_TXP716

FDI_FSYNC016
FDI_FSYNC116

FDI_IN T16
FDI_LSYNC016

FDI_LSYNC116

FDI_FSYNC1

FDI_LSYNC0

45

FDI_LSYNC1

3
2
1

FDI_IN T
FDI_FSYNC0

(R)

(R)

D D

C C

[-1] 0317

For Graphics Disable , Pull-down to
GND via 1-k ± 5% resistor

ϲϮϭϬϬϰϬϲϭϭ
ϮŶĚсϲϮϭϬϬϱϱϯϮϭ

1 OF 9

PEG_IRCOMP_R

B26

PEG_ICOMPI

A26

PEG_ICOMPO

B27

PEG_RCOMPO

PEG_RBIAS

PEG_RX0#
PEG_RX1#
PEG_RX2#

DMI

DMI

PEG_RX3#
PEG_RX4#
PEG_RX5#
PEG_RX6#
PEG_RX7#
PEG_RX8#

PEG_RX9#
PEG_RX10#
PEG_RX11#
PEG_RX12#
PEG_RX13#
PEG_RX14#
PEG_RX15#

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5

Intel(R) FDI

Intel(R) FDI

PEG_RX6
PEG_RX7
PEG_RX8

PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

PEG_TX0#
PEG_TX1#
PEG_TX2#
PEG_TX3#
PEG_TX4#
PEG_TX5#
PEG_TX6#
PEG_TX7#
PEG_TX8#
PEG_TX9#

PEG_TX10#
PEG_TX11#
PEG_TX12#
PEG_TX13#
PEG_TX14#
PEG_TX15#

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

EXP_RBIAS

A25

PEG_RXN15

K35

PEG_RXN14

J34

PEG_RXN13

J33

PEG_RXN12

G35

PEG_RXN11

G32

PEG_RXN10

F34

PEG_RXN9

F31

PEG_RXN8

D35

PEG_RXN7

E33

PEG_RXN6

C33

PEG_RXN5

D32

PEG_RXN4

B32

PEG_RXN3

C31

PEG_RXN2

B28

PEG_RXN1

B30

PEG_RXN0

A31

PEG_RXP15

J35

PEG_RXP14

H34

PEG_RXP13

H33

PEG_RXP12

F35

PEG_RXP11

G33

PEG_RXP10

E34

PEG_RXP9

F32

PEG_RXP8

D34

PEG_RXP7

F33

PEG_RXP6

B33

PEG_RXP5

D31

PEG_RXP4

A32

PEG_RXP3

C30

PEG_RXP2

A28

PEG_RXP1

B29

PEG_RXP0

A30

PEG_TXN15_L PEG_TXN15

L33

PEG_TXN14_L PEG_TXN14

M35

PEG_TXN13_L PEG_TXN13

M33

PEG_TXN12_L PEG_TXN12

M30

PEG_TXN11_L PEG_TXN11

L31

PEG_TXN10_L PEG_TXN10

K32

PEG_TXN9_L PEG_TXN9

M29

PEG_TXN8_L PEG_TXN8

J31

PEG_TXN7_L PEG_TXN7

K29

PEG_TXN6_L PEG_TXN6

H30

PEG_TXN5_L PEG_TXN5

H29

PEG_TXN4_L PEG_TXN4

F29

PEG_TXN3_L PEG_TXN3

E28

PEG_TXN2_L PEG_TXN2

D29

PEG_TXN1_L

D27

PEG_TXN0_L PEG_TXN0

C26

PEG_TXP15_L PEG_TXP15

L34

PEG_TXP14_L PEG_TXP14

M34

PEG_TXP13_L PEG_TXP13

M32

PEG_TXP12_L PEG_TXP12

L30

PEG_TXP11_L PEG_TXP11

M31

PEG_TXP10_L PEG_TXP10

K31

PEG_TXP9_L PEG_TXP9

M28

PEG_TXP8_L PEG_TXP8

H31

PEG_TXP7_L PEG_TXP7

K28

PEG_TXP6_L PEG_TXP6

G30

PEG_TXP5_L PEG_TXP5

G29

PEG_TXP4_L PEG_TXP4

F28

PEG_TXP3_L PEG_TXP3

E27

PEG_TXP2_L PEG_TXP2

D28

PEG_TXP1_L PEG_TXP1

C27

PEG_TXP0_L PEG_TXP0

C25

DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS
DIS

DIS

R286

R286

1 2

R287

R287

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

49D9R2F-GP

49D9R2F-GP

750R2F-GP

750R2F-GP

C226 SCD1U10V2KX-5GP

C226 SCD1U10V2KX-5GP
C221 SCD1U10V2KX-5GP

C221 SCD1U10V2KX-5GP
C223 SCD1U10V2KX-5GP

C223 SCD1U10V2KX-5GP

(S)

(S)

C256 SCD1U10V2KX-5GP

C256 SCD1U10V2KX-5GP

(S)

(S)

C255 SCD1U10V2KX-5GP

C255 SCD1U10V2KX-5GP

(S)

(S)

C248 SCD1U10V2KX-5GP

C248 SCD1U10V2KX-5GP

(S)

(S)

C252 SCD1U10V2KX-5GP

C252 SCD1U10V2KX-5GP

(S)

(S)

C250 SCD1U10V2KX-5GP

C250 SCD1U10V2KX-5GP

(S)

(S)

C235 SCD1U10V2KX-5GP

C235 SCD1U10V2KX-5GP

(S)

(S)

C258 SCD1U10V2KX-5GP

C258 SCD1U10V2KX-5GP

(S)

(S)

C237 SCD1U10V2KX-5GP

C237 SCD1U10V2KX-5GP

(S)

(S)

C260 SCD1U10V2KX-5GP

C260 SCD1U10V2KX-5GP

(S)

(S)

C239 SCD1U10V2KX-5GP

C239 SCD1U10V2KX-5GP

(S)

(S)

C262 SCD1U10V2KX-5GP

C262 SCD1U10V2KX-5GP

(S)

(S)

C241 SCD1U10V2KX-5GP

C241 SCD1U10V2KX-5GP

(S)

(S)

C264 SCD1U10V2KX-5GP

C264 SCD1U10V2KX-5GP

(S)

(S)
(S)

(S)

C225 SCD1U10V2KX-5GP

C225 SCD1U10V2KX-5GP

(S)

(S)

C222 SCD1U10V2KX-5GP

C222 SCD1U10V2KX-5GP
C224 SCD1U10V2KX-5GP

C224 SCD1U10V2KX-5GP

(S)

(S)

C257 SCD1U10V2KX-5GP

C257 SCD1U10V2KX-5GP

(S)

(S)

C254 SCD1U10V2KX-5GP

C254 SCD1U10V2KX-5GP

(S)

(S)

C249 SCD1U10V2KX-5GP

C249 SCD1U10V2KX-5GP

(S)

(S)

C247 SCD1U10V2KX-5GP

C247 SCD1U10V2KX-5GP

(S)

(S)

C251 SCD1U10V2KX-5GP

C251 SCD1U10V2KX-5GP

(S)

(S)

C236 SCD1U10V2KX-5GP

C236 SCD1U10V2KX-5GP

(S)

(S)

C259 SCD1U10V2KX-5GP

C259 SCD1U10V2KX-5GP

(S)

(S)

C238 SCD1U10V2KX-5GP

C238 SCD1U10V2KX-5GP

(S)

(S)

C261 SCD1U10V2KX-5GP

C261 SCD1U10V2KX-5GP

(S)

(S)

C240 SCD1U10V2KX-5GP

C240 SCD1U10V2KX-5GP

(S)

(S)

C263 SCD1U10V2KX-5GP

C263 SCD1U10V2KX-5GP

(S)

(S)

C242 SCD1U10V2KX-5GP

C242 SCD1U10V2KX-5GP

(S)

(S)

C265 SCD1U10V2KX-5GP

C265 SCD1U10V2KX-5GP

(S)

(S)
(S)

(S)
(S)

(S)

PEG_RXN[15..0] 51

PEG_RXP[15..0] 51

PEG_TXN[15..0] 51

EKd
W/ĞdžϭϲƌĞƐĞƌǀĞ

PEG_TXN1

PEG_TXP[15..0] 51

B B

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

459Tuesday, April 06, 2010

459Tuesday, April 06, 2010

459Tuesday, April 06, 2010

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

4

3

2

1

http://hobi-elektronika.net

SM_RCOMP_0

1 2

R678 100R2F-L1- G P-UR678 100R2F-L1-GP-U

SM_RCOMP_1

1D05V_VTT

1 2

R681 49D9R2F-GPR681 49D9R2F-GP

1 2

R662 68R2-GPR662 68R2-GP

H_CATERR#
PROCHOT#

D D

H_PECI19

H_PROCHOT#36

PM_THRMTRIP-A#19

130°C

H_PM_SYNC16

H_PWRGD19

PM_DRAM_PWRGD16

C C

PLT_RST#18,27,28,33

R671 20R2F-GPR671 20R2F-GP
R672 20R2F-GPR672 20R2F-GP
R709 49D9R2F-GPR709 49D9R2F-GP
R673 49D9R2F-GPR673 49D9R2F-GP

R669

R669

1 2

0R0402-PAD

0R0402-PAD

1225

H_VTTPWRGD

R667

R667

1 2
1 2
1 2
1 2

TP36TPAD28 TP36TPAD28

SKTOCC# (Socket Occupied)

1225

R663

R663

1 2

0R0402-PAD

0R0402-PAD

TP22TPAD28 TP22TPAD28

R670

R670

1 2

0R0402-PAD

0R0402-PAD
R665

R665

1 2

0R0402-PAD

0R0402-PAD

TP24TPAD28 TP24TPAD28

1 2

1K5R2F-2-GP

1K5R2F-2-GP

PROCHOT#

0814

H_CPURST#

VCCPWRGOOD_1

VCCPWRGOOD_0

DRAMPWROK

H_PWRGD_XDP

PLT_RST#_R

H_COMP3
H_COMP2
H_COMP1
H_COMP0

SKTOCC#_R

H_CATERR#

12

R668

R668
750R2F-GP

750R2F-GP

AT23
AT24

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

G16

CPU1B

CPU1B

COMP3
COMP2
COMP1
COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

MISC

MISC

AUBURNDALE

AUBURNDALE

THERMAL PWR MANAGEMENT

THERMAL PWR MANAGEMENT

DDR3

DDR3

JTAG & BPM

JTAG & BPM

DPLL_REF_SSCLK

CLOCKS

CLOCKS

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

PM_EXT_TS0#
PM_EXT_TS1#

MISC

MISC

2 OF 9

2 OF 9

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
BPM6#
BPM7#

BCLK_CPU_P

A16

BCLK_CPU_N

B16
AR30

AT30

PEG_CLK_R

E16

PEG_CLK#_R

D16

DPLL_REF_SSCLK

A18

DPLL_REF_SSCLK#

A17

DDR3_DRAMRST#

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1
AN15

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCLK

AN28

TCK

TMS

TDO

XDP_TMS

AP28

XDP_TRST#

AT27

XDP_TDI

AT29

TDI

XDP_TDO

AR27

XDP_TDI_M

AR29

XDP_TDO_M

AP29

XDP_DBRESET#

AN25

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

BCLK_CPU_P 19
BCLK_CPU_N 19

PEG_CLK_R 15
PEG_CLK#_R 15

DPLL_REF_SSCLK 15
DPLL_REF_SSCLK# 15

RN26 SRN10KJ-5-GPRN26 SRN10KJ-5-GP

1
2 3

TP20 T PAD28TP20 TPAD28

CHECK XDP

1D05V_VTT

4

PM_EXTTS#0_R 12
PM_EXTTS#1_R 13

[-1] 0317

2009/12/23
DPLL_REF_SCLK on CPU can be tied to GND if sno e-DP support

Close to CPU side

http://hobi-elektronika.net/

SB 1118

DRAMPWROK

1D5V_S3

12

12

R664

R664
1K1R2F-GP

1K1R2F-GP

R666

R666
3KR2F-GP

3KR2F-GP

VTT_PWRGD33,35,39

3D3V_S0

12

R659

R659
10KR2J-3-GP

10KR2J-3-GP

VTT_PWRGD H_VTTPWRGD_R

C617

C617

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

84.2N702.A3F

84.2N702.A3F

2N7002KDW-G P

2N7002KDW-G P

1
2
3 4

6
5

Q63

Q63

B B

3D3V_S5

12

R660

R660
100KR2J-1-GP

100KR2J-1-GP

1D05V_VTT

12

R661

R661
1KR2J-1-GP

1KR2J-1-GP

H_VTTPWRGD

XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TDO

XDP_TCLK

XDP_TRST#

(R)

(R)

1 2

DY

DY

R203 51R2J-2-G P

R203 51R2J-2-G P

(R)

(R)

1 2

DY

DY

R201 51R2J-2-G P

R201 51R2J-2-G P

(R)

(R)

1 2

DY

DY

R206 51R2J-2-G P

R206 51R2J-2-G P

1 2

R204 51R2J-2-G PR204 51R 2J-2-GP

(R)

(R)

1 2

DY

DY

R202 51R2J-2-GP

R202 51R2J-2-GP

1 2

R205 51R2J-2-G PR205 51R 2J-2-GP

1D05V_VTT

1 2

R679 24D9R2F-L-GPR679 24D9R2F-L-GP

SM_RCOMP_2

1 2

R677 130R2F-1- G PR677 130R 2F -1-GP

DDR3_DRAMRST# 12,13

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

impedance compensation

12

12

R949

R949

R950

R950

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

CPU JTAG

XDP_TDO_M

XDP_TDI_M

12

R200

R200
0R2J-2-GP

0R2J-2-GP

XDP_DBRESET#

1 2

R674 1KR 2J-1-GPR674 1KR 2J-1-GP

3D3V_S0

A A

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

CPU (2/7)-HOST

CPU (2/7)-HOST

CPU (2/7)-HOST

Catalina

Catalina

Catalina

559Tuesday, April 06, 2010

559Tuesday, April 06, 2010

559Tuesday, April 06, 2010

1

SA

SA

SA

of

of

of

5

4

3

2

1

http://hobi-elektronika.net

4 OF 9

CPU1D

3 OF 9

CPU1C

CPU1C

D D

C C

M_A_DQ[63..0]12

M_A_BS012
M_A_BS112
M_A_BS212

M_A_CAS#12
M_A_RAS#12
M_A_WE#12

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AJ10
AL10

AK12

AK11

AM10
AR11
AL11

AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

A10

SA_DQ0

C10

SA_DQ1

C7

SA_DQ2

A7

SA_DQ3

B10

SA_DQ4

D10

SA_DQ5

E10

SA_DQ6

A8

SA_DQ7

D8

SA_DQ8

F10

SA_DQ9

E6

SA_DQ10

F7

SA_DQ11

E9

SA_DQ12

B7

SA_DQ13

E7

SA_DQ14

C6

SA_DQ15

H10

SA_DQ16

G8

SA_DQ17

K7

SA_DQ18

J8

SA_DQ19

G7

SA_DQ20

G10

SA_DQ21

J7

SA_DQ22

J10

SA_DQ23

L7

SA_DQ24

M6

SA_DQ25

M8

SA_DQ26

L9

SA_DQ27

L6

SA_DQ28

K8

SA_DQ29

N8

SA_DQ30

P9

SA_DQ31

AH5

SA_DQ32

AF5

SA_DQ33

AK6

SA_DQ34

AK7

SA_DQ35

AF6

SA_DQ36

AG5

SA_DQ37

AJ7

SA_DQ38

AJ6

SA_DQ39
SA_DQ40

AJ9

SA_DQ41
SA_DQ42
SA_DQ43

AK8

SA_DQ44

AL7

SA_DQ45
SA_DQ46

AL8

SA_DQ47

AN8

SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51

AM9

SA_DQ52

AN9

SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

AC3

SA_BS0

AB2

SA_BS1

U7

SA_BS2

AE1

SA_CAS#

AB3

SA_RAS#

AE9

SA_WE#

3 OF 9

AA6

SA_CK0

AA7

SA_CK0#

P7

SA_CKE0

AUBURNDALE

AUBURNDALE

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CK1
SA_CK1#
SA_CKE1

SA_CS0#
SA_CS1#

SA_ODT0
SA_ODT1

SA_DM0

SA_DM1

SA_DM2

SA_DM3

SA_DM4

SA_DM5

SA_DM6

SA_DM7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_MA0

SA_MA1

SA_MA2

SA_MA3

SA_MA4

SA_MA5

SA_MA6

SA_MA7

SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

Y6
Y5
P6

AE2
AE8

AD8
AF9

M_A_DM0

B9

M_A_DM1

D7

M_A_DM2

H7

M_A_DM3

M7

M_A_DM4

AG6

M_A_DM5

AM7

M_A_DM6

AN10

M_A_DM7

AN13

M_A_DQS#0M_A_DQS#0

C9

M_A_DQS#1

F8

M_A_DQS#2

J9

M_A_DQS#3

N9

M_A_DQS#4

AH7

M_A_DQS#5

AK9

M_A_DQS#6

AP11

M_A_DQS#7

AT13

M_A_DQS0

C8

M_A_DQS1

F9

M_A_DQS2

H9

M_A_DQS3

M9

M_A_DQS4

AH8

M_A_DQS5

AK10

M_A_DQS6

AN11

M_A_DQS7

AR13

M_A_A0

Y3

M_A_A1

W1

M_A_A2

AA8

M_A_A3

AA3

M_A_A4

V1

M_A_A5

AA9

M_A_A6

V8

M_A_A7

T1

M_A_A8

Y9

M_A_A9

U6

M_A_A10

AD4

M_A_A11

T2

M_A_A12

U3

M_A_A13

AG8

M_A_A14

T3

M_A_A15

V9

M_CLK_DDR0 12
M_CLK_DDR#0 12
M_CKE0 12

M_CLK_DDR1 12
M_CLK_DDR#1 12
M_CKE1 12

M_CS#0 12
M_CS#1 12

M_ODT0 12
M_ODT1 12

M_A_DM[7..0] 12

M_A_DQS#[7..0] 12

M_A_DQS[7..0] 12

M_A_A[15..0] 12

M_B_DQ[63..0]13

M_B_BS013
M_B_BS113
M_B_BS213

M_B_CAS#13
M_B_RAS#13
M_B_WE#13

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

CPU1D

B5

SB_DQ0

A5

SB_DQ1

C3

SB_DQ2

B3

SB_DQ3

E4

SB_DQ4

A6

SB_DQ5

A4

SB_DQ6

C4

SB_DQ7

D1

SB_DQ8

D2

SB_DQ9

F2

SB_DQ10

F1

SB_DQ11

C2

SB_DQ12

F5

SB_DQ13

F3

SB_DQ14

G4

SB_DQ15

H6

SB_DQ16

G2

SB_DQ17

J6

SB_DQ18

J3

SB_DQ19

G1

SB_DQ20

G5

SB_DQ21

J2

SB_DQ22

J1

SB_DQ23

J5

SB_DQ24

K2

SB_DQ25

L3

SB_DQ26

M1

SB_DQ27

K5

SB_DQ28

K4

SB_DQ29

M4

SB_DQ30

N5

SB_DQ31

AF3

SB_DQ32

AG1

SB_DQ33

AJ3

SB_DQ34

AK1

SB_DQ35

AG4

SB_DQ36

AG3

SB_DQ37

AJ4

SB_DQ38

AH4

SB_DQ39

AK3

SB_DQ40

AK4

SB_DQ41

AM6

SB_DQ42

AN2

SB_DQ43

AK5

SB_DQ44

AK2

SB_DQ45

AM4

SB_DQ46

AM3

SB_DQ47

AP3

SB_DQ48

AN5

SB_DQ49

AT4

SB_DQ50

AN6

SB_DQ51

AN4

SB_DQ52

AN3

SB_DQ53

AT5

SB_DQ54

AT6

SB_DQ55

AN7

SB_DQ56

AP6

SB_DQ57

AP8

SB_DQ58

AT9

SB_DQ59

AT7

SB_DQ60

AP9

SB_DQ61

AR10

SB_DQ62

AT10

SB_DQ63

AB1

SB_BS0

W5

SB_BS1

R7

SB_BS2

AC5

SB_CAS#

Y7

SB_RAS#

AC6

SB_WE#

B B

4 OF 9

W8

SB_CK0

W9

SB_CK0#

M3

SB_CKE0

V7

SB_CK1

V6

SB_CK1#

AUBURNDALE

AUBURNDALE

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_CKE1

SB_CS0#
SB_CS1#

SB_ODT0
SB_ODT1

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8

M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_CLK_DDR2 13
M_CLK_DDR#2 13
M_CKE2 13

M_CLK_DDR3 13
M_CLK_DDR#3 13
M_CKE3 13

M_CS#2 13
M_CS#3 13

M_ODT2 13
M_ODT3 13

M_B_DM[7..0] 13

M_B_DQS#[7..0] 13

M_B_DQS[7..0] 13

M_B_A[15..0] 13

A A

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

CPU(3/7)

CPU(3/7)

CPU(3/7)

Catalina

Catalina

Catalina

1

SA

SA

659Tuesday, April 06, 2010

659Tuesday, April 06, 2010

659Tuesday, April 06, 2010

SA

of

of

of

5

4

3

2

1

http://hobi-elektronika.net

6 OF 9

CPU1F

CPU1F

30pcs : 10uF 6.3V X5R

VCC_CORE

D D

C162

C162

C160

C165

C165

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C144

C144

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C627

C627

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C C

C643

C643

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C166

C166

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C160

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C143

C143

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C630

C630

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C641

C641

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C158

C158

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C142

C142

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C633

C633

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C639

C639

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C635

C635

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

PROCESSOR CORE POWER

48A -->Arrandale

C154

C154

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C137

C137

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C132

C132

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C169

C169

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C637

C637

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C151

C151

C157

C157

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C645

C645

C141

C141

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C134

C134

C644

C644

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C172

C172

C168

C168

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C152

C152

C155

C155

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

B B

VCC_CORE

AG35

VCC

AG34

VCC

AG33

VCC

AG32

VCC

AG31

VCC

AG30

VCC

AG29

VCC

AG28

VCC

AG27

VCC

AG26

VCC

AF35

VCC

AF34

VCC

AF33

VCC

AF32

VCC

AF31

VCC

AF30

VCC

AF29

VCC

AF28

VCC

AF27

VCC

AF26

VCC

AD35

VCC

AD34

VCC

AD33

VCC

AD32

VCC

AD31

VCC

AD30

VCC

AD29

VCC

AD28

VCC

AD27

VCC

AD26

VCC

AC35

VCC

AC34

VCC

AC33

VCC

AC32

VCC

AC31

VCC

AC30

VCC

AC29

VCC

AC28

VCC

AC27

VCC

AC26

VCC

AA35

VCC

AA34

VCC

AA33

VCC

AA32

VCC

AA31

VCC

AA30

VCC

AA29

VCC

AA28

VCC

AA27

VCC

AA26

VCC

Y35

VCC

Y34

VCC

Y33

VCC

Y32

VCC

Y31

VCC

Y30

VCC

Y29

VCC

Y28

VCC

Y27

VCC

Y26

VCC

V35

VCC

V34

VCC

V33

VCC

V32

VCC

V31

VCC

V30

VCC

V29

VCC

V28

VCC

V27

VCC

V26

VCC

U35

VCC

U34

VCC

U33

VCC

U32

VCC

U31

VCC

U30

VCC

U29

VCC

U28

VCC

U27

VCC

U26

VCC

R35

VCC

R34

VCC

R33

VCC

R32

VCC

R31

VCC

R30

VCC

R29

VCC

R28

VCC

R27

VCC

R26

VCC

P35

VCC

P34

VCC

P33

VCC

P32

VCC

P31

VCC

P30

VCC

P29

VCC

P28

VCC

P27

VCC

P26

VCC

AUBURNDALE

AUBURNDALE

POWER

POWER

6 OF 9

VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0

1.1V RAIL POWER

1.1V RAIL POWER

VTT0

VTT0

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VSS_SENSE_VTT

VTT_SELECT

ISENSE

VCC_SENSE
VSS_SENSE

VTT_SENSE

VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0

CPU CORE SUPPLY

CPU CORE SUPPLY

SENSE LINES

SENSE LINES

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

PSI#

AK35

VID0

AK33

VID1

AK34

VID2

AL35

VID3

AL33

VID4

AM33

VID5

AM35

VID6

AM34

G15

AN35

AJ34
AJ35

B15
A15

C178

C178

C161

C161

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C177

C177

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

H_VTTVID1

Clarksfield H_VTTVID1 = Low, VTT = 1.1V
Arrandale H_VTTVID1 = High, VTT = 1.05V

TP_VSS_SENSE_VTT

TP47

TP47
TPAD28

TPAD28

C159

C159

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

+VTT_43
+VTT_44

PSI# 36
H_VID[6..0] 36

PM_DPRSLPVR 36

H_VTTVID1 39

IMVP_IM ON 36

VTT_SENSE 39

C153

C153

C156

C156

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C176

C176

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

R1023 0R0402-PADR1023 0R0402-PAD
R1022 0R0402-PADR1022 0R0402-PAD

C164

C164

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1D05V_S0

1D05V_VTT

1225

1 2
1 2

1D05V_S0

C179

C179

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1D05V_VTT

12

The decoupling capacitors, filter
recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.

1D05V_S0

1D05V_VTT

Please note that the VTT Rail
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V

VCC_SENSE 36
VSS_SENSE 36

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

759Tuesday, April 06, 2010

759Tuesday, April 06, 2010

759Tuesday, April 06, 2010

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

VCC_GFXCORE

C145

C145

C150

C149

C149

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C150

C114

C114

12

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C148

C148

C116

C116

12

12

(R)

(R)

(R)

(R)

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C146

C146

C147

C147

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

D D

SB 1209

1D05V_S0

Please note that the VTT Rail
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V

1D05V_S0

C C

1D05V_VTT

12

TC21

(R)TC21

(R)

ST220U2D5VBM-2GP

ST220U2D5VBM-2GP

DY

DY

1D05V_VTT

18A

12

C631

C631

12

12

C646

C646

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C640

C649

C649

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C640

C647

C647

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C636

C636

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

AM21
AM19
AM18
AM16

4

3

2

1

http://hobi-elektronika.net

7 OF 9

CPU1G

CPU1G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16
VAXG17
VAXG18
VAXG19
VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1

J23

VTT1

H25

VTT1

K26

VTT1

J27

VTT1

J26

VTT1

J25

VTT1

H27

VTT1

G28

VTT1

G27

VTT1

G26

VTT1

F26

VTT1

E26

VTT1

E25

VTT1

AUBURNDALE

AUBURNDALE

GRAPHICS

GRAPHICS

FDI PEG & DMI

FDI PEG & DMI

POWER

POWER

7 OF 9

AR22

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_DPRSLPVR

GRAPHICS VIDs

GRAPHICS VIDs

AT22

AM22

GFX_VID0

AP22

GFX_VID1

AN22

GFX_VID2

AP23

GFX_VID3

AM23

GFX_VID4

AP24

GFX_VID5

AN24

GFX_VID6

AR25

GFX_VR_EN

AT25
AM24

GFX_IMON

AJ1

VDDQ

AF1

VDDQ

AE7

VDDQ

AE4

VDDQ

AC1

VDDQ

AB7

VDDQ

AB4

VDDQ

Y1

VDDQ

W7

VDDQ

W4

VDDQ

U1

VDDQ

T7

VDDQ

T4

VDDQ

P1

VDDQ

N7

VDDQ

N4

VDDQ

L1

VDDQ

H1

VDDQ

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

P10

VTT1

N10

VTT1

L10

VTT1

K10

VTT1

J22

VTT1

J20

VTT1

J18

VTT1

H21

1.1V1.8V

1.1V1.8V

VTT1

H20

VTT1

H19

VTT1

L26

VTT1

L27

VTT1

M26

VTT1

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6

12

C634

C634

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C638

C638

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C180

C180

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C217

C217

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VCC_AXG_SENSE 41
VSS_AXG_SENSE 41

GFX_VR_EN 41
GFX_DPRSLPVR 41
GFX_IMON 41

12

12

C632

C632

C642

C642

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

12

12

+V1.8S_VCCSFR

12

12

C174

C174

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

6A

C626

C626

12

12

C651

C651

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1D05V_S0

1D05V_VTT

C648

C648

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1D05V_S0

1D05V_VTT

C175

C175

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

0.6A

C220

C220

12

12

C231

C231

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

GFX_VID[6..0] 41

C652

C652

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C181

C181

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1D5V_S3

C650

C650

C629

C629

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

R297

R297

1 2

0R0603-PAD-1-GP

0R0603-PAD-1-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1D8V_S0

B B

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

859Tuesday, April 06, 2010

859Tuesday, April 06, 2010

859Tuesday, April 06, 2010

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

8 OF 9

AUBURNDALE

AUBURNDALE

8 OF 9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

CPU1H

CPU1H

AT20

VSS

AT17

VSS

AR31

VSS

AR28

VSS

AR26

VSS

AR24

VSS

AR23

VSS

AR20

VSS

AR17

VSS

AR15

VSS

AR12

VSS

AR9

VSS

AR6

AM29
AM27
AM25
AM20
AM17
AM14
AM11

VSS

AR3

VSS

AP20

VSS

AP17

VSS

AP13

VSS

AP10

VSS

AP7

VSS

AP4

VSS

AP2

VSS

AN34

VSS

AN31

VSS

AN23

VSS

AN20

VSS

AN17

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AM8

VSS

AM5

VSS

AM2

VSS

AL34

VSS

AL31

VSS

AL23

VSS

AL20

VSS

AL17

VSS

AL12

VSS

AL9

VSS

AL6

VSS

AL3

VSS

AK29

VSS

AK27

VSS

AK25

VSS

AK20

VSS

AK17

VSS

AJ31

VSS

AJ23

VSS

AJ20

VSS

AJ17

VSS

AJ14

VSS

AJ11

VSS

AJ8

VSS

AJ5

VSS

AJ2

VSS

AH35

VSS

AH34

VSS

AH33

VSS

AH32

VSS

AH31

VSS

AH30

VSS

AH29

VSS

AH28

VSS

AH27

VSS

AH26

VSS

AH20

VSS

AH17

VSS

AH13

VSS

AH9

VSS

AH6

VSS

AH3

VSS

AG10

VSS

AF8

VSS

AF4

VSS

AF2

VSS

AE35

VSS

VSS

VSS

D D

C C

4

http://hobi-elektronika.net

CPU1I

CPU1I

K27

VSS

K9

VSS

K6

VSS

K3

VSS

J32

VSS

J30

VSS

J21

VSS

J19

VSS

H35

VSS

H32

VSS

H28

VSS

H26

VSS

H24

VSS

H22

VSS

H18

VSS

H15

VSS

H13

VSS

H11

VSS

H8

VSS

H5

VSS

H2

VSS

G34

VSS

G31

VSS

G20

VSS

G9

VSS

G6

VSS

G3

VSS

F30

VSS

F27

VSS

F25

VSS

F22

VSS

F19

VSS

F16

VSS

E35

VSS

E32

VSS

E29
E24
E21
E18
E13
E11

E8
E5

E2
D33
D30
D26

D9
D6

D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11

B8
B6

B4
A29
A27
A23

A9

VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

VSS
VSS
VSS

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

9 OF 9

9 OF 9

AUBURNDALE

AUBURNDALE

VSS_NCTF#AR34

VSS_NCTF#B34

VSS_NCTF#B2

VSS_NCTF#B1
VSS_NCTF#A35
VSS_NCTF#AT1

VSS_NCTF#AT35
RSVD_NCTF#AT33
RSVD_NCTF#AT34
RSVD_NCTF#AP35
RSVD_NCTF#AR35

RSVD_NCTF#AT3

RSVD_NCTF#AR1

RSVD_NCTF#AP1
RSVD_NCTF#AT2

RSVD_NCTF#C1

RSVD_NCTF#A3
RSVD_NCTF#C35
RSVD_NCTF#B35
RSVD_NCTF#A34
RSVD_NCTF#A33

AR34
B34
B2

B1
A35
AT1
AT35
AT33
AT34
AP35
AR35
AT3
AR1
AP1
AT2
C1
A3
C35
B35
A34
A33

3

TP_MCP_VSS_NCTF6
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF2
TP_MCP_VSS_NCTF7

TP8 TPAD28TP8 T PAD 28
TP9 TPAD28TP9 T PAD 28
TP1 TPAD28TP1 T PAD 28
TP18 T PAD28TP18 TPAD28

2

1

B B

A A

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

CPU(6/7)

CPU(6/7)

CPU(6/7)

1

Taipei Hsien 221, Taiw an, R.O.C.

Catalina

Catalina

Catalina

SA

SA

959Tuesday, April 06, 2010

959Tuesday, April 06, 2010

959Tuesday, April 06, 2010

SA

of

of

of

5

4

3

2

1

http://hobi-elektronika.net

5 OF 9

CPU1E

CPU1E

AP25

AM30
AM28

AM31
AM32

AL25
AL24
AL22
AJ33

AG9
M27

L28

J17
H17
G25
G17
E31
E30

AP31
AL32
AL30

AN29
AK32

AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30

H16

B19
A19

A20
B20

U9
T9

AC9
AB9

J29

J28

RSVD#AP25
RSVD#AL25
RSVD#AL24
RSVD#AL22
RSVD#AJ33
RSVD#AG9
RSVD#M27
RSVD#L28
SA_DIMM_VREF#
SB_DIMM_VREF#
RSVD#G25
RSVD#G17
RSVD#E31
RSVD#E30

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD_TP#H16

RSVD#B19
RSVD#A19

RSVD#A20
RSVD#B20

RSVD#U9
RSVD#T9

RSVD#AC9
RSVD#AB9

RSVD#J29
RSVD#J28

SO-DIMM VREFDQ (M3) Circuit
for Clarksfield Pr ocessor

RN33

RN33

DY

DY

H_RSVD9_R

1

D D

C C

M_VREF_DQ_DIMM012
M_VREF_DQ_DIMM113

RN34

RN34

1
2 3

SRN0J-10-GP-U

SRN0J-10-GP-U

2 3

SRN0J-10-GP-U

SRN0J-10-GP-U

(R)

(R)

1225

4

(R)

(R)

4

H_RSVD10_R CFG3

CFG0
CFG1

TP27T PAD 28 TP27TPAD28

CFG2

TP21T PAD 28 TP21TPAD28

CFG3
CFG4
CFG5

TP28T PAD 28 TP28TPAD28

CFG6

TP25T PAD 28 TP25TPAD28

CFG7
CFG8

TP37T PAD 28 TP37TPAD28

CFG9

TP33T PAD 28 TP33TPAD28

CFG10

TP29T PAD 28 TP29TPAD28

CFG11

TP31T PAD 28 TP31TPAD28

CFG12

TP23T PAD 28 TP23TPAD28

CFG13

TP26T PAD 28 TP26TPAD28

CFG14

TP34T PAD 28 TP34TPAD28

CFG15

TP32T PAD 28 TP32TPAD28

CFG16

TP35T PAD 28 TP35TPAD28

CFG17

TP30T PAD 28 TP30TPAD28

H_RSVD17_R
H_RSVD18_R

RSVD#AJ13
RSVD#AJ12

RSVD#AH25
RSVD#AK26

RSVD#AL26

RSVD_NCTF#AR2

AUBURNDALE

AUBURNDALE

RSVD#AJ26
RSVD#AJ27

RSVD#AL28
RSVD#AL29
RSVD#AP30
RSVD#AP32
RSVD#AL27
RSVD#AT31
RSVD#AT32
RSVD#AP33
RSVD#AR33

RSVD#AR32

RSVD_TP#E15
RSVD_TP#F15

RESERVED

RESERVED

RSVD#D15
RSVD#C15

RSVD#AJ15

RSVD#AH15

RSVD_TP#AA5
RSVD_TP#AA4

RSVD_TP#R8
RSVD_TP#AD3
RSVD_TP#AD2
RSVD_TP#AA2
RSVD_TP#AA1

RSVD_TP#R9
RSVD_TP#AG7
RSVD_TP#AE3

RSVD_TP#V4

RSVD_TP#V5

RSVD_TP#N2
RSVD_TP#AD5
RSVD_TP#AD7

RSVD_TP#W3
RSVD_TP#W2

RSVD_TP#N3
RSVD_TP#AE5
RSVD_TP#AD9

5 OF 9

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33

AR32

E15
F15
A2

KEY

D15
C15

RSVD64_R

AJ15

RSVD65_R

AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

RSVD_VSS

AP34

VSS

1225

SRN0J-10-GP-U

SRN0J-10-GP-U

2 3
1

4

RN25

RN25

(R)

(R)

VSS (AP34) can be left NC is
CRB implementa tion; EDS/DG
recommendation to GND.

1 2

R199

R199
0R2J-2-GP

0R2J-2-GP

CFG0

CFG4

CFG7

DY

DY

DY

DY

DY

DY

12
(R) R207

(R)

12

12
(R) R208

(R)

12
(R) R209

(R)

R207
3KR2F-GP

3KR2F-GP

R211

R211
3KR2F-GP

3KR2F-GP

R208
3KR2F-GP

3KR2F-GP

R209
3KR2F-GP

3KR2F-GP

PCI-Express Configuration Select

1:Single PEG

CFG0

0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

1 :Nor mal Operation

CFG3

0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port
0:Enabled; An external D isplay P ort
device is connected to the Embedded
Display Port

CFG7(Reserved) - T emporarily used for early
Clarksfield samples.

CFG7 Clarksfield (only for early samples pre-ES1) -

Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample

(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.

B B

A A

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

CPU(7/7)

CPU(7/7)

CPU(7/7)

Catalina

Catalina

Catalina

1

Taipei Hsien 221, Taiw an, R.O.C.

10 59Tuesday, April 06, 2010

10 59Tuesday, April 06, 2010

10 59Tuesday, April 06, 2010

SA

SA

SA

of

of

of

5

4

3

2

1

http://hobi-elektronika.net

D D

C C

B B

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

11 59Tuesday, April 06, 2010

11 59Tuesday, April 06, 2010

11 59Tuesday, April 06, 2010

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

4

3

2

1

http://hobi-elektronika.net

3D3V_S0

DIMM1

M_A_A[15..0]6

D D

M_A_BS26
M_A_BS06

M_A_BS16

M_A_DQ[63..0]6

C C

B B

1D5V_S3

12

R639

R639
1KR2F-3-GP

1KR2F-3-GP

(R)

(R)

12

R633

(R) R633

(R)

1KR2F-3-GP

1KR2F-3-GP

DIMM0_VREF_CADQ

DIMM0_VREF_CADQ

Place these caps
close to VTT1 and
VTT2.

R636

R636

0R3J-0-U-GP

0R3J-0-U-GP

R676

R676

0R3J-0-U-GP

0R3J-0-U-GP

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

0D75_S0

12

R601

R601
0R0603-PAD-1-GP

0R0603-PAD-1-GP

12

C569

C569

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DIMM0_VREF_CADQ

C579

C579

C619

C619

MA_VTT

12

C570

C570

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

R675

R675

1 2

0R2J-2-GP

0R2J-2-GP

M_VREF_CA_DIMM0

12

M_VREF_DQ_DIMM0

12

12

C562

C562

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C581

C581
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

1 2

C621

C621
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

1 2

12

C563

C563

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DDRVTT_REF_R 13,38

M_A_DQS#[7..0]6

M_A_DQS[7..0]6

M_VREF_DQ_DIMM010
DDR3_DRAMRST#5,13

M_ODT06
M_ODT16

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_VREF_CA_DIMM0
M_VREF_DQ_DIMM0

MA_VTT

A A

5

4

DIMM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-6-GP-U1

DDR3-204P-6-GP-U1

H = 9.2mm

NP1

NP1

NP2

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

EVENT#

199

VDDSPD

197

SA0

201

SA1

77

NC#1

122

NC#2

125

NC#/TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

ϵϮŵŵZsZ^

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SODIMM0_1_SMB_DATA_R
SODIMM0_1_SMB_CLK_R

TS#_DIMM0

SA0_DIM0
SA1_DIM0

1D5V_S3

1225

R617

R617

1 2

0R0402-PAD

0R0402-PAD

M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6

M_CS#0 6
M_CS#1 6

M_CKE0 6
M_CKE1 6

M_CLK_DDR0 6
M_CLK_DDR#0 6

M_CLK_DDR1 6
M_CLK_DDR#1 6

M_A_DM[7..0] 6

12

C573

C573

3

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

PM_EXTTS#0_R 5

C574

C574
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SA0_DIM0
SA1_DIM0

12

R616

R616
10KR2J-3-GP

10KR2J-3-GP

1221 (SC)

R614 0R0402-PAD-1-GPR614 0R0402-PAD-1-GP

1 2

R608 0R0402-PAD-1-GPR608 0R0402-PAD-1-GP

1 2

3D3V_S0

12

R624

(R) R624

(R)

10KR2J-3-GP

10KR2J-3-GP

DY

DY

Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30

12

If SA0 DIM0 = 1, SA1_DIM0 = 0

R625

R625

SO-DIMMA SPD Address is 0xA2

10KR2J-3-GP

10KR2J-3-GP

SO-DIMMA TS Address is 0x32

PCH_SMBDATA 3,13,15,29,58
PCH_SMBCLK 3,13,15,29,58

SODIMM A DECOUPLING

1D5V_S3

12

12

C592

C592

C610

C610

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C599

C599

C586

C586

C612

C605

C605

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

C612

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

Place these Caps near SO-DIMM A.

2

CHECK

12

C603

C603

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C609

C609

12

(R)

(R)

(R)

(R)

12

12

C598

C598

C591

C591

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

check layout spacing

C601

C601

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

(R)

(R)

(R)

(R)

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

DIMM1

DIMM1

DIMM1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

Catalina

Catalina

Catalina

SA

SA

12 59Tuesday, April 06, 2010

12 59Tuesday, April 06, 2010

12 59Tuesday, April 06, 2010

SA

of

of

of

1

5

4

3

2

1

http://hobi-elektronika.net

DIMM2

M_B_A[15..0]6

D D

M_B_BS26
M_B_BS06

M_B_BS16

M_B_DQ[63..0]6

1D5V_S3

12

R217

R217
1KR2F-3-GP

1KR2F-3-GP

(R)

(R)

C C

12

R220

R220
1KR2F-3-GP

1KR2F-3-GP

(R)

(R)

DIMM1_VREF_CADQ

DIMM1_VREF_CADQ

R210

R210

0R3J-0-U-GP

0R3J-0-U-GP

R222

R222

0R3J-0-U-GP

0R3J-0-U-GP

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C123

C123

C140

C140

R212

R212

1 2

0R2J-2-GP

0R2J-2-GP

DIMM1_VREF_CADQ

M_VREF_CA_DIMM1

12

C125

C125
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

1 2

M_VREF_DQ_DIMM1

12

C138

C138
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

1 2

DDRVTT_REF_R 12,38

M_B_DQS#[7..0]6

B B

M_B_DQS[7..0]6

Place these caps
close to VTT1 and
VTT2.

12

C565

C565

0R0603-PAD-1-GP

0R0603-PAD-1-GP

12

C568

C568

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0D75_S0

12

R603

R603

12

12

C567

C567

C566

C566

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

M_ODT26
M_ODT36

M_VREF_DQ_DIMM110
DDR3_DRAMRST#5,12

MB_VTT
MB_VTT

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_VREF_CA_DIMM1
M_VREF_DQ_DIMM1

A A

5

4

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78
79

109
108

5

7
15
17

4

6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70

129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

10
27
45
62

135
152
169
186

12
29
47
64

137
154
171
188

116
120

126

1
30

203
204

H =5.2mm

DIMM2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

BA0
BA1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

ODT0
ODT1

VREF_CA
VREF_DQ

RESET#

VTT1
VTT2

DDR3-204P-7-GP-U1

DDR3-204P-7-GP-U1

NP1
NP2

RAS#

WE#

CAS#

CS0#
CS1#

CKE0
CKE1

CK0

CK0#

CK1

CK1#

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

SDA
SCL

EVENT#

VDDSPD

SA0
SA1

NC#1
NC#2

NC#/TEST

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SO-DIMMB is placed farther from

the Processor than SO-DIMMA

ϱϮŵŵZsZ^

NP1
NP2

110
113
115

114
121

73
74

101
103

102
104

M_B_DM0

11

M_B_DM1

28

M_B_DM2

46

M_B_DM3

63

M_B_DM4

136

M_B_DM5

153

M_B_DM6

170

M_B_DM7

187

SODIMM1_1_SMB_DATA_R

200

SODIMM1_1_SMB_CLK_R

202

TS#_DIMM1

198
199

SA0_DIM1

197

SA1_DIM1

201
77

122
125

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

1D5V_S3

R599

R599

1 2

0R0402-PAD

0R0402-PAD

M_B_RAS# 6
M_B_WE# 6
M_B_CAS# 6

M_CS#2 6
M_CS#3 6

M_CKE2 6
M_CKE3 6

M_CLK_DDR2 6
M_CLK_DDR#2 6

M_CLK_DDR3 6
M_CLK_DDR#3 6

M_B_DM[7..0] 6

1225

12

C44

C44

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

PM_EXTTS#1_R 5

C51

C51
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

3

1221 (SC)

R606 0R0402-PAD-1-GPR606 0R0402-PAD-1-GP

1 2

R600 0R0402-PAD-1-GPR600 0R0402-PAD-1-GP

1 2

3D3V_S0

1D5V_S3

C600

C600

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

SA1_DIM1
SA0_DIM1

PCH_SMBDATA 3,12,15,29,58
PCH_SMBCLK 3,12,15,29,58

SODIMM B DECOUPLING

12

12

C593

C593

C602

C602

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C119

C119

C91

C91

C608

C608

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

12

12

C113

C113

12

12

R72

R72
10KR2J-3-GP

10KR2J-3-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C99

C99

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

3D3V_S0

12

R618

R618
10KR2J-3-GP

10KR2J-3-GP

12

R615

(R) R615

(R)

10KR2J-3-GP

10KR2J-3-GP

DY

DY

12

12

C106

C106

C94

C94

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C110

C110

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

DIMM2

DIMM2

DIMM2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

Date: Sheet

2

Taipei Hsien 221, Taiw an, R.O.C.

Catalina

Catalina

Catalina

1

SA

SA

13 59Tuesday, April 06, 2010

13 59Tuesday, April 06, 2010

13 59Tuesday, April 06, 2010

SA

of

of

of

5

4

3

2

1

http://hobi-elektronika.net

ICH_RTCX2

X2

X2

ICH_RTCX1

1

4

D D

X-32D768KHZ-38GPU

X-32D768KHZ-38GPU

SMD
+- 10ppm CL:12.5P

R269 10MR3J-L1-G PR269 10MR 3J-L1-GP

12

C188

C188
SC12P50V3JN-LL-GP

SC12P50V3JN-LL-GP

23

12

1221 (SC)

12

C194

C194
SC15P50V2JN-2-LL-GP

SC15P50V2JN-2-LL-GP

RTC_AUX_S5

R273

R273

R289

R289

1 2
1 2

20KR2J-L2-GP

20KR2J-L2-GP

20KR2J-L2-GP

20KR2J-L2-GP

C654

C654

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

0127 (1A)

RN60

RN60

ACZ_RST#

ACZ_RST#_AUDIO30
ACZ_BITCLK_AUDIO30

ACZ_SDATAOUT_AUDIO30
ACZ_SYNC_AUDIO30

If Sample low ,the flash descriptor security will be overwrite

C C

B B

NO REBOOT STRAP

3D3V_S0

1 2

DY

DY

R250 1KR2J-1-GP

R250 1KR2J-1-GP

(R)

(R)

No Reboot Strap R23

HDA_SPKR

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_RST#

R694 10KR2J-3- G P

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_RST#

R695 51R2F-2- G P

PCH_JTAG_TCK

R251 51R2F-2- G PR251 51R2F-2-G P

When unused all JTAG pins may be NC

A A

5

23
1

4

SRN33J-5-GP-U

SRN33J-5-GP-U

RN63

RN63

1

4

23

SRN33J-5-GP-U

SRN33J-5-GP-U

ACZ_SPKR

Low = Default
High = No Reboot

R697

R697

1 2

200R2J-L1-GP

200R2J-L1-GP
R255

R255

1 2

200R2J-L1-GP

200R2J-L1-GP
R252

R252

1 2

200R2J-L1-GP

200R2J-L1-GP

1 2

DY

DY

(R)R694 10KR2J - 3-GP

(R)

R698

R698

1 2

100R2J-2-GP

100R2J-2-GP

R254

R254

1 2

100R2J-2-GP

100R2J-2-GP

R253

R253

1 2

100R2J-2-GP

100R2J-2-GP

1 2

DY

DY

(R)R695 51R2F- 2-GP

(R)

1 2

3D3V_S0

ACZ_BIT_CLK

ACZ_SDATAOUT
ACZ_SYNC

SB 1211

SPI_CS0#, SPI_MISO, SPI_MOSI, SPI_CLK:
No series resistor required if routing length is 1.5"-6.5"

1D05V_S0

System BIOS Flash ROM

PCH_SPI_CS#0
SPI_MISO_R

1 2

R230 33R2J-2-GPR230 33R2J-2-GP

RN8

RN8

PCH_SPI_WP#0

23

PCH_SPI_HOLD#0

1

4

SRN4K7J-8-GP

SRN4K7J-8-GP

HDA_DOCK_EN#_GPIO33

SOP_ENABLE_GP33_R

12

R513

R513
1KR2J-1-GP

1KR2J-1-GP

Enable iTPM: Connect to Vcc3_3 with

SPI_MOSI

8.2-kȍ weak pull-up resistor.
Disable iTPM: Left floating, no

pull-down required

3D3V_S0

1 2

DY

DY

R259 8K2R 2J-3-GP

(R)R259 8K2R2J-3-GP

(R)

PCH_SPI_WP#0

4

ACZ_SDATAIN030

MFG1

MFG1

1
2

DVD-CON2-15-GP

DVD-CON2-15-GP

SPI_MOSI_R

ϯϮDďŝƚ
DĂŝŶDy/

U10

U10

1

CS#

2

DO

3

WP#

4

VSS

W25Q32BVSSIG-1-GP

W25Q32BVSSIG-1-GP

(72.25325.A01)

(72.25325.A01)

1
3 6

425

SKT-G6179-GP-U

SKT-G6179-GP-U

SPISKT1

SPISKT1

12

C204

C204

21

G4
GAP-OPENG4GAP-OPEN

SB 1209

PCH_SPI_CLK
PCH_SPI_CS#0

PCH_SPI_MOSI

VCC

HOLD#

CLK

DI

8
7

RTC_AUX_S5

1 2

R278

R278
1MR2J-1-GP

1MR2J-1-GP

1 2

R277

R277

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

330KR2F-L-GP

330KR2F-L-GP

SRTCRST# new signal Pin

ACZ_SPKR30

8K2R2J-3-GP

8K2R2J-3-GP

R720

R720

1 2

DY

DY

(R)

(R)

TP71TPAD28 TP71TPAD28

R258 15R2J-GPR258 15R 2J -GP

1 2

R243 15R2J-GPR243 15R 2J -GP

1 2

R260 15R2J-GPR260 15R 2J -GP

1 2

RTC_AUX_S5 RTC_BAT

8

PCH_SPI_HOLD#0PCH_SPI_MISO

7

PCH_SPI_CLK

6

PCH_SPI_MOSI

5

SM_INTRUDER#

ICH_INTVRMEN

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#

SRTCRST#
SM_INTRUDER#
ICH_INTVRMEN

ACZ_BIT_CLK
ACZ_SYNC
ACZ_SPKR
ACZ_RST#

HDA_SDIN2

TP51TPAD28 TP51TPAD28

ACZ_SDATAOUT

HDA_DOCK_EN#_GPIO33
HDA_DOCK_EN#_GPIO13

PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST# SATAICOMP

SPI_CLK_R

SPI_CS#0_R

SPI_MOSI_R

SPI_MISO_R

12

C347

C347
SC1U10V2ZY-GP

SC1U10V2ZY-GP

3D3V_S0

12

C167

C167

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

INTVRMEN- Integrated SUS

1.1V VRM Enable
High - Enable internal VRs

PCH1A

PCH1A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/GPIO33

J30

HDA_DOCK_RST#/GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

(71.0HM55.00U)

(71.0HM55.00U)

D15

D15

2

3

1

BAS40CW-GP

BAS40CW-GP

83.00040.E81

83.00040.E81

2nd = 83.00040.M81

2nd = 83.00040.M81

3D3V_S5

RTC_PWR

3

RTCIHDA

RTCIHDA

SPI JTAG

SPI JTAG

1 2

R383

R383
1KR2J-1-GP

1KR2J-1-GP

1 OF 10

1 OF 10

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

LPC

LPC

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP
SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP/GPIO21
SATA1GP/GPIO19

CHECK PIN Define

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

integrated VccLan1_05VccCL1_05

LAN100_SLP

D33
B33
C32
A32

C34
A34

PCH_GPIO23

F34

INT_S ERIRQ

AB9

AK7
AK6

SATA_TXN0_C

AK11

SATA_TXP0_C

AK9

AH6
AH5

SATA_TXN1_C

AH9

SATA_TXP1_C

AH8
AF11

AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16
AF15

SATA_LED#

T3

SATA_DET#0_R

Y9

SATA_DET#1_R

V1

RTC_BAT

12

3

BT1

BT1
CR2032-3-GP

CR2032-3-GP

High=Enable Low=Disable

High=Enable Low=Disable

LPC_LAD0 33,34
LPC_LAD1 33,34
LPC_LAD2 33,34
LPC_LAD3 33,34

LPC_LFRAME# 33,34

C529 SCD01U50V2KX-1GPC529 SCD01U50V2KX-1GP

1 2

C528 SCD01U50V2KX-1GPC528 SCD01U50V2KX-1GP

1 2

C957 SCD01U50V2KX-1GPC957 SCD01U50V2KX-1GP

1 2

C959 SCD01U50V2KX-1GPC959 SCD01U50V2KX-1GP

1 2

1 2

R708

R708
37D4R2F-GP

37D4R2F-GP

R246

R246

12

0R0402-PAD

0R0402-PAD

R44

R44

12

0R0402-PAD

0R0402-PAD

SATA_DET#0_R
INT_S ERIRQ
SATA_LED#
SATA_DET#1_R

TP50 T PAD28TP50 TPAD28

1D05V_S0

SATA_LED# 26

WIFI_RF_EN 29
ODD_LED_EN# 34

6
7
8

SRN10KJ-6-GP

SRN10KJ-6-GP

2

INT_S ERIRQ 33

0126 (1A)

RN14

RN14

45
3
2
1

SATA_RXN0 26
SATA_RXP0 26
SATA_TXN0 26
SATA_TXP0 26

SATA_RXN1 26
SATA_RXP1 26
SATA_TXN1 26
SATA_TXP1 26

SATA_RXN4 25
SATA_RXP4 25
SATA_TXN4 25
SATA_TXP4 25

3D3V_S0

SB 1118

HDD

ODD

eSATA

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

PCH(1/9)

PCH(1/9)

PCH(1/9)

Catalina

Catalina

Catalina

14 59Tuesday, April 06, 2010

14 59Tuesday, April 06, 2010

14 59Tuesday, April 06, 2010

of

of

of

1

SA

SA

SA

5

4

3

2

1

http://hobi-elektronika.net

SML0_CLK

SML0_DATA

6
5

Q23

Q23

1 2

(M,P)

(M,P)

1221 (SC)

C294

C294
SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

R986

R986
1MR2F-L-GP

1MR2F-L-GP

(U)

(U)

(U)

(U)

1 2

C300

C300
SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

0126 (1A)

678

123

4 5

3D3V_S0

SMB_DATA

12

(U)

(U)

12

(U)

(U)

RN31

RN31
SRN2K2J-2-GP

SRN2K2J-2-GP

SIO_SDA1
SIO_SCL1

PCH_SMBCLK 3,12,13,29,58

3D3V_EUP

2 OF 10

PCH1B

PCIE_RXN129
PCIE_RXP129

CLK_P CIE_M INI1#29
CLK_P CIE_M INI129

MINI1_CLKREQ#29

MINI2_CLKREQ#29

CLK_PCIE_LAN_N27
CLK_PCIE_LAN_P27

LANCLK_REQ_N27

CLK_PCIE_CR_N28
CLK_PCIE_CR_P28

PCIE_TXN129
PCIE_TXP129

PCIE_RXN229
PCIE_RXP229
PCIE_TXN229
PCIE_TXP229

PCIE_RXN327
PCIE_RXP327
PCIE_TXN327
PCIE_TXP327

PCIE_RXN428
PCIE_RXP428
PCIE_TXN428
PCIE_TXP428

TP5TPAD28 TP5TPAD28

3D3V_S03D3V_EUP 3D3V_S0

R690

(R) R690

(R)

DY

DY

10KR2J-3-GP

10KR2J-3-GP

1 2

PCIE_CLK_RQ1#

12

R692

R692
10KR2J-3-GP

10KR2J-3-GP

D D

WLAN

TV tuner

LAN

Cardreader

C C

CLK_P CIE_M INI2#29

CLK_P CIE_M INI229

SB 1206

B B

(R) R257

(R)

DY

DY

1 2

PCIE_CLK_RQ3#

R266

R266
10KR2J-3-GP

10KR2J-3-GP

1 2

R257
10KR2J-3-GP

10KR2J-3-GP

PCIE_RXN1
PCIE_RXP1

PCIE_RXN2
PCIE_RXP2

1225

R1016 0R0402-PADR1016 0R0402-PAD

1 2

R1017 0R0402-PADR1017 0R0402-PAD

1 2

1 2

DY

DY

R693 0R2J-2-G P

(R)R693 0R2J-2-GP

(R)

R1020 0R0402-PADR1020 0R0402-PAD

1 2

R1021 0R0402-PADR1021 0R0402-PAD

1 2

(R)

(R)

1 2

DY

DY

R689 0R2J-2-G P

R689 0R2J-2-G P
R1018 0R0402-PADR1018 0R0402-PAD

1 2

R1019 0R0402-PADR1019 0R0402-PAD

1 2

(R)

(R)

1 2

DY

DY

R264 0R2J-2-G P

R264 0R2J-2-G P
R1014 0R0402-PADR1014 0R0402-PAD

1 2

R1015 0R0402-PADR1015 0R0402-PAD

1 2

(R)

(R)

1 2

DY

DY

R236 0R2J-2-G P

R236 0R2J-2-G P

R691

(R) R691

(R)

DY

DY

10KR2J-3-GP

10KR2J-3-GP

1 2

PCIE_CLK_RQ2#

12

R688

R688
10KR2J-3-GP

10KR2J-3-GP

C211SCD1U10V2KX-5GP C211SCD1U10V2KX-5GP

12

C215SCD1U10V2KX-5GP C215SCD1U10V2KX-5GP

12

C218SCD1U10V2KX-5GP C218SCD1U10V2KX-5GP

12

C227SCD1U10V2KX-5GP C227SCD1U10V2KX-5GP

12

C234SCD1U10V2KX-5GP C234SCD1U10V2KX-5GP

12

C244SCD1U10V2KX-5GP C244SCD1U10V2KX-5GP

12

C232SCD1U10V2KX-5GP C232SCD1U10V2KX-5GP

12

C229SCD1U10V2KX-5GP C229SCD1U10V2KX-5GP

12

PCIE_CLK_RQ0#

CLK_PCH_SRC1_N
CLK_PCH_SRC1_P

PCIE_CLK_RQ1#

CLK_PCH_SRC2_N
CLK_PCH_SRC2_P

PCIE_CLK_RQ2#

CLK_PCH_SRC0_N
CLK_PCH_SRC0_P

PCIE_CLK_RQ3#

CLK_PCH_SRC4_N
CLK_PCH_SRC4_P

PCIE_CLK_RQ4#

PCIE_CLK_RQ5#

PEG_B_CLKRQ#

3D3V_S0

DY

DY

TXN1
TXP1

TXN2
TXP2

TXN3
TXP3

TXN4
TXP4

R234

(R) R234

(R)

10KR2J-3-GP

10KR2J-3-GP

1 2

PCIE_CLK_RQ4#

12

R237

R237
10KR2J-3-GP

10KR2J-3-GP

PCH1B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4#/GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

(71.0HM55.00U)

(71.0HM55.00U)

PCIE_CLK_RQ0#
PCH_GPIO74
PCIE_CLK_RQ5#
PEG_B_CLKRQ#

SMBus

SMBus

PCI-E*

PCI-E*

Link

Link

Controller

Controller

PEG

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N/CKSSCD_N

CLKIN_SATA_P/CKSSCD_P

Clock Flex

Clock Flex

SB 1206
Delete!!

RN10

RN10

1
2
3
4 5

SRN10KJ-6-GP

SRN10KJ-6-GP

2 OF 10

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1
CL_DATA1
CL_RST1#

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

3D3V_EUP

8
7
6

B9
H14
C8

J14
C6
G8

M14
E10
G12

T13
T11
T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

SB 1206

PCH_GPIO11

PCH_GPIO60
SML0_CLK
SML0_DATA

PCH_GPIO74
SIO_SCL1
SIO_SDA1

CL_CLK
CL_DATA
CL_RST#

PEG_CLKREQ#PEG_CLKREQ#

R262 0R2J-2-GP

R262 0R2J-2-GP

CLK_PCH_PEGA_N
CLK_PCH_PEGA_P

CLK_EXP_N
CLK_EXP_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI#
CLKIN_DMI

CLK_CPU_BCLK#
CLK_CPU_BCLK

DREFCLK#
DREFCLK

CLK_PCIE_SATA#
CLK_PCIE_SATA

CLK_ICH14

CLK_PCI_FB

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

1

1

1

PCH_CLK48_R

PCH_GPIO11 19

SMB_CLK
SMB_DATA

PCH_GPIO60 19

TP45 TPAD28TP45 TPAD28
TP43 TPAD28TP43 TPAD28
TP42 TPAD28TP42 TPAD28

(R)

(R)

1 2

DY

DY

1225

R1012 0R0402-PADR1012 0R0402-PAD
R1013 0R0402-PADR1013 0R0402-PAD

R721 90D9R2F-1-GPR721 90D9R2F-1-GP

TP56 TPAD24TP56 TPAD24

TP54 TPAD24TP54 TPAD24

TP52 TPAD24TP52 TPAD24

1 2

(S)

(S)

1

DIS

DIS

2 3
1 2

1 2

(R)

(R)

4

DY

DY

CLKIN_DMI# 3
CLKIN_DMI 3

CLK_CPU_BCLK# 3
CLK_CPU_BCLK 3

DREFCLK# 3
DREFCLK 3

CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3

CLK_ICH14 3

CLK_PCI_FB 18

1 2

R31933R2J-2-GP R31933R2J-2-GP

DY

DY

SRN0J-10-GP-U

SRN0J-10-GP-U

4

RN38

RN38

1

RN12

RN12

23

SRN0J-10-GP-U

SRN0J-10-GP-U

12

C301

(R) C301

(R)

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SML0_CLK 27
SML0_DATA 27

SIO_SCL1 33
SIO_SDA1 33

PEX_CLKREQ 52

PCH_CLK48 33

SB 1206

PCH_SMBDATA3,12,13,29,58

CLK_PCIE_PEG# 51
CLK_PCIE_PEG 51

PEG_CLK#_R 5
PEG_CLK_R 5

DPLL_REF_SSCLK# 5
DPLL_REF_SSCLK 5

1D05V_S0

SMB_CLK
SMB_DATA

123

SMB_CLK

XTAL-25MHZ-96GP

XTAL-25MHZ-96GP

678

4 5

CHECK

PEG_CLKREQ#

XTAL25_IN

XTAL25_IN

XTAL25_OUT

SB 1209

3D3V_S03D3V_EUP

RN28

RN28
SRN2K2J-2-GP

SRN2K2J-2-GP

2N7002KDW-G P

2N7002KDW-G P

84.2N702.A3F

84.2N702.A3F

1
2
3 4

R261 10KR 2J-3-GPR261 10KR2J-3-GP

SB 1209

1 2

R324 0R2J-2-GP

R324 0R2J-2-GP

X3

X3

1 2

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

15 59Tuesday, April 06, 2010

15 59Tuesday, April 06, 2010

15 59Tuesday, April 06, 2010

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

DMI_RXN04
DMI_RXN14
DMI_RXN24
DMI_RXN34

DMI_RXP04
DMI_RXP14
DMI_RXP24
DMI_RXP34

DMI_TXN04
DMI_TXN14

1 2

(R)

(R)

1 2

(R)

(R)

1225

(R)

(R)

PM_PWROK_1

R687

R687

1 2

0R0402-PAD

0R0402-PAD

DMI_TXN24
DMI_TXN34

DMI_TXP04
DMI_TXP14
DMI_TXP24
DMI_TXP34

DMI_IRCOMP_R

1225

3D3V_S0

12

R702

R702
10KR2J-3-GP

10KR2J-3-GP

1225

R704

R704

1 2

0R0402-PAD

0R0402-PAD

PM_RSMRST#

SUS_PWR_DN_ACK_R

PM_PWRBTN#_R

AC_PRESENT_R

PCH_GPIO72

PM_RI#

PM_CLKRUN#

D D

1D05V_S0

R290 49D9R2F-GPR290 49D9R2F-GP

LAN_RST#1

(R)

(R)

CORE_PWRGD36,42,43

ALL_PWRGD37,38,39,40,43

3

BAT54PT-GP

BAT54PT-GP

2ND = 83.BAT54.D81

2ND = 83.BAT54.D81

1 2

R705 0R2J-2-GP

R705 0R2J-2-GP

SB 1201

R285 0R2J-2-G P(R)R285 0R2J- 2-GP(R)

1 2

R284

R284

1 2

0R0402-PAD

0R0402-PAD

R283 10KR2J-3-GPR283 10KR2J-3-GP

1 2

PM_DRAM_PWRGD5

TP4TPAD24 TP4TPAD24

SIO_PWNBTN_N33

TP3TPAD24 TP3TPAD24

,<

3D3V_S5

1225

R282

R282

1 2

0R0402-PAD

0R0402-PAD

(R)

(R)

D26

D26

1

(R)

(R)

2

83.00054.T81

83.00054.T81

12

12

1

1

R279

R279
10KR2J-3-GP(R)

10KR2J-3-GP(R)

R281

R281

100KR2J-1-GP

100KR2J-1-GP

ALL_PWRGD

PM_RSMRST#

R686 0R2J-2-GP

R686 0R2J-2-GP

PM_DRAM_PWRGD

1 2

R233 0R 2J-2-GP

R233 0R 2J-2-GP

1 2

R231 0R 0402-PADR231 0R 0402-PAD

1 2

R232 0R 2J-2-GP

R232 0R 2J-2-GP

LAN_DISABLE_N19,27

PWRGD3V_150MS33,36

C C

RSMRST#_SIO33

B B

PM_SYSRST#_R

ME_PWROK

LAN_RST#1

4

PCH1C

PCH1C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK/GPIO30

P5

PWRBTN#

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPIO72

F14

RI#

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

(71.0HM55.00U)

(71.0HM55.00U)

1 2

R247

R247
8K2R2J-3-GP

8K2R2J-3-GP

3

http://hobi-elektronika.net

3 OF 10

3 OF 10

BA18

FDI_RXN0

BH17

FDI_RXN1

BD16

FDI_RXN2

BJ16

FDI_RXN3

BA16

FDI_RXN4

BE14

FDI_RXN5

BA14

FDI_RXN6

BC12

FDI_RXN7

BB18

FDI_RXP0

BF17

FDI_RXP1

BC16

FDI_RXP2

BG16

FDI_RXP3

AW16

FDI_RXP4

BD14

FDI_RXP5

BB14

FDI_RXP6

BD12

FDI_RXP7

BJ14

FDI_INT

BF13

FDI_FSYNC0

DMI

FDI

DMI

FDI

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SLP_S5#/GPIO63

System Power Management

System Power Management

SLP_LAN#/GPIO29

FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

WAKE#

SUSCLK/GPIO62

SLP_S4#

SLP_S3#

SLP_M#

PMSYNCH

BH13
BJ12
BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

TP23

BJ10

F6

PM_RI#
SUS_PWR_DN_ACK_R
AC_PRESENT_R
PM_PWRBTN#_R

PCH_GPIO72

PCIE_WAKE#

PCIE_WAKE#

PM_CLKRUN#

PM_SUS_STAT#

PM_SUS_CLK

PM_SLP_S5#

PM_SLP_S4#_R

PM_SLP_S3#_R

PM_SLP_M#

PM_SLP_DSW#

H_PM_SYNC

PM_SLP_LAN#

SRN10KJ-6-GP

SRN10KJ-6-GP

R256 8K2R2J -3-GPR256 8K 2R 2J-3-GP

R685 1KR2J -1-GPR685 1KR2J -1-GP

RN9

RN9

1
2
3
4 5

1 2

1 2

TP44 TPAD28TP44 TPAD28

TP7 TPAD28TP7 T PAD 28

TP39 TPAD28TP39 TPAD28

TP97 TPAD28TP97 TPAD28

TP6 TPAD28TP6 T PAD 28

PM_SLP_LAN# 27,39

8
7
6

FDI_IN T 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4

1 2

1 2

SB 1206

3D3V_EUP

3D3V_EUP3D3V_S0

FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4

FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4

PCIE_WAKE# 29

1225

R683

R683
0R0402-PAD

0R0402-PAD
R701

R701
0R0402-PAD

0R0402-PAD

SB 1206

H_PM_SYNC 5

PM_SLP_S4# 25,33,38

PM_SLP_S3# 33,35,43

2

1

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

16 59Tuesday, April 06, 2010

16 59Tuesday, April 06, 2010

16 59Tuesday, April 06, 2010

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

4

3

2

1

http://hobi-elektronika.net

D D

4 OF 10

PCH1D

PCH1D

T48

L_BKLTEN

R722

R722

(R)

(R)

2K37R2F-GP

2K37R2F-GP

12

LIBG

SB 1209

LIBG
L_LVBG

TP55TPAD28 TP55TPAD28

LVDS_VREF

(R)

(R)

12

R724

R724
0R2J-2-GP

0R2J-2-GP

SB 1209

C C

1 2
1 2
1 2

PCH_BLUE
PCH_GREEN

PCH_RED

PCH_BLUE23
PCH_GREEN23
PCH_RED23

PCH_DDCCLK23
PCH_DDCDATA23

PCH_HSYNC23
PCH_VSYNC23

1K 0.5% ohm

1 2

R732

R732
1KR2D-1-GP

1KR2D-1-GP

CRT_IREF

R315150R2J-L1-GP-U R315150R2J-L1-GP-U
R314150R2J-L1-GP-U R314150R2J-L1-GP-U
R313150R2J-L1-GP-U R313150R2J-L1-GP-U

T47
Y48

AB48

Y45

AB46

V48

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53
AT49
AU52
AT53

AY51
AT48
AU50
AT51

AA52
AB53
AD53

V51
V53

Y53
Y51

AD48
AB51

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

(71.0HM55.00U)

(71.0HM55.00U)

L_VDD_EN
L_BKLTCTL
L_DDC_CLK

L_DDC_DATA
L_CTRL_CLK

L_CTRL_DATA
LVD_IBG

LVD_VBG
LVD_VREFH

LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

LVDS

LVDS

CRT

CRT

4 OF 10

SDVO_STALLN
SDVO_STALLP

SDVO_INTN

SDVO_INTP

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

PCH_HDMI_DATA2-_L

BD42

PCH_HDMI_DATA2+_L

BC42

PCH_HDMI_DATA1-_L

BJ42

PCH_HDMI_DATA1+_L

BG42

PCH_HDMI_DATA0-_L

BB40

PCH_HDMI_DATA0+_L

BA40

PCH_HDMI_CLK-_L

AW38

PCH_HDMI_CLK+_L

BA38

Y49
AB49

BE44
BD44
AV40

PCH_TMDS_DATA2-_L

BE40

PCH_TMDS_DATA2+_L

BD40

PCH_TMDS_DATA1-_L

BF41

PCH_TMDS_DATA1+_L

BH41

PCH_TMDS_DATA0-_L

BD38

PCH_TMDS_DATA0+_L

BC38

PCH_TMDS_CLK-_L

BB36

PCH_TMDS_CLK+_L

BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

DPB_AUXN
DPB_AUXP

DPC_AUXN
DPC_AUXP

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

PCH_HDMI_CLK 24
PCH_HDMI_DATA 24

TP61 TPAD28TP61 TPAD28
TP59 TPAD28TP59 TPAD28

PCH_HDMI_HPD

1 2

C277 SCD1U10V2KX- 5GP

C277 SCD1U10V2KX- 5GP

1 2

C281 SCD1U10V2KX- 5GP

C281 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C272 SCD1U10V2KX- 5GP

C272 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C274 SCD1U10V2KX- 5GP

C274 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C253 SCD1U10V2KX- 5GP

C253 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C267 SCD1U10V2KX- 5GP

C267 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C243 SCD1U10V2KX- 5GP

C243 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C245 SCD1U10V2KX- 5GP

C245 SCD1U10V2KX- 5GP

(U)

(U)
(U)

(U)

PCH_TMDS_CLK 24
PCH_TMDS_DATA 24

TP58 TPAD28TP58 TPAD28
TP57 TPAD28TP57 TPAD28

PCH_TMDS_HPD

1 2

C284 SCD1U10V2KX- 5GP

C284 SCD1U10V2KX- 5GP

1 2

C286 SCD1U10V2KX- 5GP

C286 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C279 SCD1U10V2KX- 5GP

C279 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C282 SCD1U10V2KX- 5GP

C282 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C290 SCD1U10V2KX- 5GP

C290 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C295 SCD1U10V2KX- 5GP

C295 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C271 SCD1U10V2KX- 5GP

C271 SCD1U10V2KX- 5GP

1 2

(U)

(U)

C273 SCD1U10V2KX- 5GP

C273 SCD1U10V2KX- 5GP

(U)

(U)

(U)

(U)

PCH_HDMI_HPD 24

PCH_HDMI_DATA2- 24
PCH_HDMI_DATA2+ 24
PCH_HDMI_DATA1- 24
PCH_HDMI_DATA1+ 24
PCH_HDMI_DATA0- 24
PCH_HDMI_DATA0+ 24
PCH_HDMI_CLK- 24
PCH_HDMI_CLK+ 24

PCH_TMDS_HPD 24

PCH_TMDS_DATA2- 24
PCH_TMDS_DATA2+ 24
PCH_TMDS_DATA1- 24
PCH_TMDS_DATA1+ 24
PCH_TMDS_DATA0- 24
PCH_TMDS_DATA0+ 24
PCH_TMDS_CLK- 24
PCH_TMDS_CLK+ 24

,D/

s/

R809

R809

100KR2J-1-GP (U)

100KR2J-1-GP (U)

3D3V_S0

2 3
1

3D3V_S0

1
2 3

SRN2K2J-1-GP

SRN2K2J-1-GP

PCH_TMDS_HPD

(U)

(U)

PCH_HDMI_HPD

1 2

RN42

(U)RN42

(U)

SRN2K2J-1-GP

SRN2K2J-1-GP

RN41

RN41

(U)

(U)

12

R725

R725

100KR2J-1-GP

100KR2J-1-GP

UMA

UMA

PCH_HDMI_CLK
PCH_HDMI_DATA

4

PCH_TMDS_CLK

4

PCH_TMDS_DATA

B B

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,

21F,88,Sec.1 ,Hsin Tai Wu Rd .,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Taipei Hsien 221, Taiwan, R.O.C

1

Taipei Hsien 221, Taiwan, R.O.C

of

of

of

17 59Tuesday, April 06, 2010

17 59Tuesday, April 06, 2010

17 59Tuesday, April 06, 2010

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

<Doc> <RevCode>

A2

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

5

4

3

2

1

http://hobi-elektronika.net

1226 (SC)

3D3V_S0

RN37

INT_PIRQG#
PCI_TRDY#
PCI_DEVSEL#
PCI_PLOCK#

D D

PCI_STOP#
PCI_FRAME#
INT_PIRQD#
PCI_IR DY#

C C

B B

RN37

8
7
6

SRN8K2J-4-GP

SRN8K2J-4-GP

RN36

RN36

8
7
6

SRN8K2J-4-GP

SRN8K2J-4-GP

1
2
3
45

1
2
3
45

3D3V_S0

3D3V_S0

1 2

R323 8K2R2J-3-GPR323 8K2R2J-3-GP

1 2

R321 8K2R2J-3-GPR321 8K2R2J-3-GP

3D3V_S0

1 2

R738 8K2R2J-3-GPR738 8K2R2J-3-GP

1 2

R322 8K2R2J-3-GPR322 8K2R2J-3-GP

3D3V_S0

RN35

RN35

1
2
3
4 5

SRN8K2J-4-GP

SRN8K2J-4-GP

PCI_GNT0#

(R)

(R)

1 2

R736 1KR2J-1-GP

R736 1KR2J-1-GP

PCI_GNT1#

1 2

R730 1KR2J-1-GP

(R)R730 1KR2J-1-GP

(R)

BOOT BIOS Strap

INT_PIRQB#
PCI_REQ3#

PCI_PERR#
INT_PIRQF#

3D3V_S0

RN39

CLK_PCI_SIO33
CLK_PCI_FB15
CLK_PCI_PORT8034

PCI

SPI

RN39

1
2
3
4 5

SRN8K2J-4-GP

SRN8K2J-4-GP

USE SPI

INT_PIRQA#

8

PCI_SERR#

7

INT_PIRQC#

6

INT_PIRQE#

DY

DY
DY

DY

PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0

00LPC(Default)

01 Reserved

01

11

These pins are left as NC,
because the function is disable.

PCI_REQ0#

8

INT_PIRQH#

7

PCI_REQ1#

6

PCI_REQ2#

0126 (1A)

PCI_RST#34

LPC_PME_N33
PLT_RST#5,27,28,33

PLT_RST#

R320 22R2J-2-G PR320 22R 2J-2-GP

1 2

R318 51R2J-2-G PR318 51R 2J-2-GP

1 2

R731 47R2J-2-G PR731 47R 2J-2-GP

1 2

TP11TPAD28 TP11TPAD28
TP60TPAD28 TP60TPAD28

PCI_GNT2#

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

PCI_RST#
PCI_SERR#

PCI_PERR#

PCI_IRDY#
PCI_DEVSEL#

PCI_FRAME#
PCI_PLOCK#
PCI_STOP#

PCI_TRDY#
LPC_PME_N

CLK_PCI_SIO_R
CLK_PCI_FB_R
CLK_PCI_PORT80_R
CLK_PCI_3
CLK_PCI_4

1 2

R718 4K7R 2J-2-GP

R718 4K7R 2J-2-GP

DY

DY

(R)

(R)

PCH1E

PCH1E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1#/GPIO50

B45

REQ2#/GPIO52

M53

REQ3#/GPIO54

F48

GNT0#

K45

GNT1#/GPIO51

F36

GNT2#/GPIO53

H53

GNT3#/GPIO55

B41

PIRQE#/GPIO2

K53

PIRQF#/GPIO3

A36

PIRQG#/GPIO4

A48

PIRQH#/GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

(71.0HM55.00U)

(71.0HM55.00U)

5 OF 10

5 OF 10

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8

NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11

NVRAM

NVRAM

NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15

NV_ALE
NV_CLE

NV_RCOMP

PCI

PCI

NV_RB#

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USB

USB

USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43

OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

PCI_GNT3#

R316 4K7R 2J-2-GP

R316 4K7R 2J-2-GP

A16 swap override Strap/Top-Block
Swap Override jumper

PCI_GNT#3 Low = A16 swap

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2
AV7
AY8

AY5
AV11

BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25
D25

N16
J16
F16
L16
E14
G16
F12
T15

These pins are left as NC,
because the function is disable.

NV_ALE
NV_CLE

NV_RCOMP

USB_RBIAS_PN

R263

R263
32D4R2F-GP

32D4R2F-GP

USBPN1
USBPP1

USBPN6
USBPP6
USBPN7
USBPP7

USBPN11
USBPP11

(R)

(R)

1 2

DY

DY

1
1
1
1

1 2

R291

R291
22D6R2F-L1-GP

22D6R2F-L1-GP

USBPN0 25
USBPP0 25
USBPN1 29
USBPP1 29
USBPN2 49
USBPP2 49
USBPN3 49
USBPP3 49
USBPN4 49
USBPP4 49
USBPN5 25
USBPP5 25

TP49 TPAD24TP49 TPAD24
TP48 TPAD24TP48 TPAD24
TP72 TPAD24TP72 TPAD24
TP74 TPAD24TP74 TPAD24

USBPN8 25
USBPP8 25
USBPN9 49
USBPP9 49
USBPN10 34
USBPP10 34
USBPN11 29
USBPP11 29
USBPN12 26
USBPP12 26
USBPN13 26
USBPP13 26

OC*08 25
OC*23 49
OC*49 49

OC*67

USB0

MINI1

USB2

USB3

USB4

Touch panel

Reserve

Reserve

USB8

USB9

Reserve USB

MINI2

Bluetooth

Camera

Check!!

DMI Termination Voltage

NV_CLE Set to Vss when low.

Set to Vcc when high.

Danbury Technology:
Disabled when Low.
Enable when High.

[-1] 0317

[-1] 0317

[-1] 0317

(SB 1204)

OC*67

Pair

0

1

2

3

4

5

6

7

8

9

10

11

12

13

R707

R707

USB

1 2

10KR2J-3-GP

10KR2J-3-GP

http://hobi-elektronika.net/

1 2

DY

DY

(R)

(R)

override/Top-Block
Swap Override enabled
High = Default

Device

USB0

MINI1

USB2

USB3

USB4

Touch panel

Reserve

Reserve

USB8

USB9

Reserve USB

MINI2

Bluetooth

Camera

SB 1206

3D3V_EUP

NV_CLE

NV_ALE

+V_NVRAM_VCCQ

12

R249

(R) R249

(R)

1KR2J-1-GP

1KR2J-1-GP

DY

DY

+V_NVRAM_VCCQ

12

R248

(R) R248

(R)

1KR2J-1-GP

1KR2J-1-GP

DY

DY

A A

<Core Design>

<Core Design>

<Core Design>

Wistron Corporat ion

Wistron Corporat ion

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2
Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PCH(5/9)

PCH(5/9)

PCH(5/9)

1

Taipei Hsien 221, Taiw an, R.O.C.

Catalina

Catalina

Catalina

SA

SA

18 59Tuesday, April 06, 2010

18 59Tuesday, April 06, 2010

18 59Tuesday, April 06, 2010

SA

of

of

of