Apple BALI Schematics

GM/PM45 Block Diagram

A A

CLK GEN.

ICS 9LPRS365

INTEL Mobile CPU

Penryn

Penryn SV Processor FSB:800 or 1066 MHz

HOST BUS

800/1066MHz

http://hobi-elektronika.net

Project code: PCB P/N : REVISION :

Database: XX.XXXXX.XXX Database PCB:

4, 5, 6, 7

Revision:

08124

-1 2008/12/18

PCB STACKUP 8L

TOP

GND/PWR

L3-signal

PWR

GND/PWR

L6-signal

GND

BOTTOM

SYSTEM DC/DC

TPS51120

INPUTS

DCBATOUT

SYSTEM DC/DC

TPS51124

INPUTS

DCBATOUT

OUTPUTS

5V_S5 3D3V_S5

OUTPUTS

1D5V_S3 1D05V_S0

DDRIII Slot1

15,16

DDRIII Slot2

B B

15,16

800/1066MHz

Cantiga

AGTL+ CPU I/F DDR Memory I/F

INTEGRATEDGRAHPICS

LVDS, CRT I/F

71.CNTIG.00U

8,9,10,11,12,13,14

LVDS

DMI

PCIex16

MXMcard

Jmicron JMB380

1394/Card reader

400MHz

Touch Switch

PCIex1

ICH9M

Mini PCI-E Card

6 PCIe ports

C C

MIC In

Codec

AZALIA

ALC272

SPDIF

Head Phone

OP AMP

INT.WOOFER

TPA3007D1

OP AMP

TPA3121

D D

INT.SPKR

PCI/PCIBRIDGE ACPI 1.1 4SATA High Definition Audio LPC I/F SerialPeripheralI/F

71.ICH9M.00U

SATA

22,23,24,25

LPC BUS

USB

SPI I/F

BIOS

W25X160-VSS

Riser

Rear

Side

CPU Fan

SIO

SMSC

HDD

ODD

SCH-5147

SYS Fan

PS/2 KB/MS

Optional

LVDS

LAN

GIGA Lan BCM5784M

USB Header 1port

LCD Panel

USB Header 1port

USB 2 Port

USB 1Port x2

Riser

4 in 1 card reader

USB 2 Port

RJ45

1394

USB 1port

Web Cam+ Mic Array

Blue Tooth Module

Antenna

Antenna i n

TV tuner card

WLAN Card

Antenna

CPU DC/DC

ADP3208A

INPUTS

DCBATOUT

LT72

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd.,Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3 Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Bali

152Friday, February 13, 2009

OUTPUTS VCC_CORE

-1

PDF created with pdfFactory trial version www.pdffactory.com

www.hobi-elektronika.net

ICH9M

USAGE

PM_BMBUSY#

LPC_SMI*

Touch_INT_SB CDR_REFECT_SB

DPRSLPVR

Wireless LAN_EN

MXM_DET

USB_CAM_EN L: Enable PCB_VER0 PCB_VER1

PCB_VER2

SB_INVERTER_EN# L: Teenah/ NC :C atiga chipset Internal P U 20K

(REQ1#)

(REQ2#)

(REQ3#)

CMOS_IN

OC*01

AFTER PLTRST

GPI GPI

(GNT1#)

(GNT2#)

(GNT3#)

GPI GPI GPI GPI GPI GPI

GPORESUME

Native(WOL_EN)RESUME

GPI

Native(SMBALERT#)

GPO GPI GPI

Native(DPRSLPVR)

GPI GPO GPO GPO GPO OD

Native(LDRQ1#)

GPI

GPO GPO

Native(OC5#) Native(OC6#) Native(OC7#)

GPO GPO

GPO GPI GPO

ODMAINGPIO39 Native(OC1#) Native(OC2#) Native(OC3#) Native(OC4#) Native(OC8#) Native(OC9#) Native(OC10#) Native(OC11#)

GPI

GPO Native(REQ1#) Native(GNT1#) Native(REQ2#) Native(GNT2#) Native(REQ3#) Native(GNT3#)

GPI

Native(OC0#)

Native(LINKALERT#)

IRQE# IRQF# IRQG# IRQH#

NO check

OCP#

NO NO NO

TV_EN

OC*45 OC*6 OC*7

OC*01 OC*23 OC*23 OC*45 OC*8 OC*9 OC*10 OC*11

NO NO

Notes

Input:LPC SMI Event Input(Low active)

Open Drain

H: Normal, L:Enable H: Normal, L:Enabl e

H: Enable Internal P D 20K

GPO

H: Enable

Internal PD 20K (Can't PU)

Internal PD 20K

Internal PU 20K

H: no MXM, L: MXM on CAMERA_EN

Internal PU 20K

CDR_REFECT_TOUCH

P/H&P/D

-1A add

Default value

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7

GPIO8

GPIO9

GPIO10 GPIO11

GPIO12 GPIO13

GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24

GPIO25

GPIO26 GPIO27 GPIO28

GPIO29 GPIO30 GPIO31 GPIO32

GPIO33

GPIO35 GPIO36 GPIO37

GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO48 GPIO49 GPIO50 GPIO51 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59 GPIO60 GPIO61 GPIO62 GPIO63

POWER WELL

MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN

RESUME RESUME RESUME RESUME RESUME

MAIN MAIN MAIN MAIN MAIN MAIN MAIN MAIN RESUME

RESUME RESUME RESUME

HDA_DOCK_EN#

MAINGPIO34 MAIN MAIN MAIN MAIN ODGPIO38

RESUME RESUME RESUME RESUME RESUME RESUME RESUME RESUME MAIN MAIN MAIN MAIN MAIN MAIN MAIN

MAIN RESUME RESUME RESUME RESUME RESUME

PIN NAME

4 4

3 3

2 2

1 1

High High High High High High High High High

High

High High

Low

High High

Low High High High High High High High Low

Low Low Low High

High High

High

Low Low High High High High High High High High High High High High High High High High High High High High Low High High High Low

SCH 5147

UsageGPIO # Notes

http://hobi-elektronika.net

BAT_IN#_MXM

GP10

PLTRST#

GP11

PLTRST#

GP12

PLTRST#

GP13

PLTRST#

GP14

Thermal Trip

GP15

BAT_IN# H: AC , L:BAT no use MXM PD10K.

GP16

GP17

GP20 GP21

GP22

GP27 GP32 GP33

GP36

GP37

GP40

GP41

GP42

GP43 GP50 GP51

Dual Core/Qual Core

GP52 GP53 GP54 GP55 GP56 GP57 GP60 GP61

PCI Routing

PCIE Routing

LANE1 Lan LANE2 LANE3 LANE4

SMBus

KB KB

MS MS

INT REQ

G:CARDBUS

B:1394 F:Flash Media G:SD Host

JMICRON380 MiniCard TV MiniCard WLAN

LAN_EN

SUBWOOFER_CTL

page 17

GNTIDSEL

0 0

USB Table

USB

Pair

USB0

0 1

USB1 USB2

2 3

USB3 USB4

USB5

WIRELESS

CAMERA

8 9

miniPCI-E

1011miniPCI-E

SIO

SMB_CLK

SMBC_ICH

LAN

CY28547

ICH9M

DDR3

Device

BT67

OUT-POWER

IN-POWER

MAIN (VCC)

N/A

AUX (VTR)

N/A

AUX (VTR)

N/A

AUX (VTR)

N/A

AUX (VTR)

N/A

MAIN (VCC)N/A

AUX (VTR)N/A

MAIN (VCC)

AUX (VTR)

MAIN (VCC)

AUX (VTR)

MAIN (VCC)

AUX (VTR)

MAIN (VCC)

AUX (VTR)

MAIN (VCC)

AUX (VTR)

MAIN (VCC)

AUX (VTR)

MAIN (VCC)

AUX (VTR)

MAIN (VCC)

AUX (VTR)

AUX (VTR) AUX (VTR)

AUX (VTR)

AUX (VTR) AUX (VTR) AUX (VTR) AUX (VTR) AUX (VTR) AUX (VTR) AUX (VTR)

AUX (VTR)

5V_AUX_S543

3D3V_S53,4,22,24,25,28, 31,33,34,38,43,44,45,49

5V_S520,21,25,27,31,35, 38,43,44,45,47,49

1D5V_S310,12,13,15,16,25, 38,44,45,49

0D75V_S315,16,45

1D8V_S312,45

3D3V_S03,4,10,11,12,15, 16,17,20,22,23,24,25, 26,28,29,31,33,35,36,38, 39,44,45,46,49,50

5V_S017,20,25,26,28,37,38, 39,46,49,50 1D05V_S04,5,8,10,11,12, 13,23,25,44,49

1D5V_S05,12,23,24,25,31, 49

DDR_VREF_S310,15,16,45

VCC_CORE_S03,5,6,38,46

VCC-POR VTR-POR

OUT.OD

OUT.OD.High

In In

In In In In In

In OUT.OD.Low OUT.OD.Low

5V_AUX_S5

3D3V_S5

5V_S5

1D5V_S3

0D75V_S3

1D8V_S3

3D3V_S0

5V_S0 1D05V_S0

1D5V_S0

DDR_VREF_S3

VCC_CORE_S0

ICH9M Functional Strap Definitions

Usage/When Sampled

Signal

HDA_SDOUT

XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK

HDA_SYNC

PCIE config1 bit0, Rising Edge of PWROK. PCIE config2 bit2,

GNT2#/

Rising Edge of PWROK.

GPIO53

Reserved This signal should not be pulled high.

GPIO20

ESI Strap (Server Only)

GNT1#/

Rising Edge of PWROK

GPIO51

Top-Block

GNT3#/

Swap Override.

GPIO55

Rising Edge of PWROK.

GNT0#:

Boot BIOS Destination

SPI_CS1#/

Selection 0:1.

GPIO58

Rising Edge of PWROK. Integrated TPM Enable, Rising Edge of CLPWROK

SPI_MOSI

DMI Termination Voltage, Rising Edge of PWROK.

GPIO49

PCI Express Lane

SATALED#

Reversal. Rising Edge of PWROK.

SPKR

No Reboot. Rising Edge of PWROK.

TP3

XOR Chain Entrance. Rising Edge of PWROK.

GPIO33/

Flash Descriptor

HDA_DOCK

Security Override Strap

_EN#

Rising Edge of PWROK

Cantiga chipset and ICH9M I/O controller Hub strapping configuration

Pin Name

CFG[2:0]

CFG[4:3] CFG8 CFG[15:14] CFG[18:17]

CFG5 CFG6

CFG7

CFG9

CFG10

CFG[13:12]

CFG16

CFG19

CFG20

SDVO_CTRLDATA

check!

NOTE:

1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

Montevina Platform Design guide 22339 0.5

Strap Description

FSB Frequency Select

Reserved

DMI x2 Select iTPM Host

Interface

Intel Management engine Crypto strap

PCIE Graphics Lane

PCIE Loopback enable

FSB Dynamic ODT

DMI Lane Reversal

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

1=The iTPM Host Interface is disalbed(default)

XOR/ALL

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1)

SDVO Present

Local Flat Panel (LFP) Present

ICH9 EDS 642879 Rev.1.5

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)

ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down. Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

The signal is required to be low for desktop applications and required to be high for mobile applications.

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister.

Configuration

000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0 = DMI x2

0= The iTPM Host Interface is enabled(Note2)

0 = Transport Layer Security (TLS) cipher suite with no confidentiality

1 = TLS cipher suite with confidentiality (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane Numbered in order 0 = Enable (Note 3)

1= Disabled (default)

00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled 0 = Normal operation(Default):

Lane Numbered in Order

0 = Only Digital Display Port or PCIE is operational (Default)

1 =Digital display Port and PCIe are operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabledL_DDC_DATA

Comment

page 218

(Default)1 = DMI x4

(Default)

page 92

ICH9M Integrated Pull-up and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16

HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC

GNT[3:0]#/GPIO[55,53,51]

GPIO[20] GPIO[49] LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

LT72

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

ICH9 EDS 355845 Rev.2.2

PULL-UP 20K PULL-UP 20K PULL-UP 10K PULL-DOWN 20K

PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K

PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H s ic hih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H s ic hih, Taipei Hsien 221, Taiwan, R. O. C .

Taipei Hsien 221, Taiwan, R. O. C .

Table of Content

Bali -1

page 99

252Friday, F ebruary 13, 2009

PDF created with pdfFactory trial version www.pdffactory.com

3D3V_S0 3D3V_S0 3D3V_S0

R233 10KR2J-3-GP

1 2

R539 10KR2J-3-GP

1 2

R221 10KR2J-3-GPR221 10KR2J-3-GP

1 2

R229 10KR2J-3-GPR229 10KR2J-3-GP

1 2

R540 10KR2J-3-GP

D D

1 2

R546 10KR2J-3-GP

1 2

R551 10KR2J-3-GPR551 10KR2J-3-GP

1 2

R251 10KR2J-3-GPR251 10KR2J-3-GP

1 2

(R)

(DIS)

(UMA)

PCI_SIO

SRC0,SRC2

PCI_33M

SRC1,SRC4

PCI_STOP CPU_STOP

27M_SRC_EN

ITP_EN

TME_EN

27select: Pin24,25 1: 27M 0:SRC

27select: Pin20,21 1: SRC 0:96M SRC/ITP select: Pin53,54 0:SRC 1:ITP

0: allow overclocking 1: not allow overclocking

CK_PWRGD_CLK

** FS*: internal PL

CPU_BSEL24 CPU_BSEL14 CPU_BSEL04

C C

C157

C162

SC27P50V2JN-2-GP

(R)

B B

CK_PWRGD: 3.3V LVTTL input pin that is a level

SC27P50V2JN-2-GP

(R)

1 2

R486 10KR2J-3-GPR486 10KR2J-3-GP

1 2

R184 2K2R2J-2-GPR184 2K2R2J-2-GP

1 2

R275 2K2R2J-2-GPR275 2K2R2J-2-GP R269 1KR2J-1-GPR269 1KR2J-1-GP

1 2

R183 1KR2J-1-GPR183 1KR2J-1-GP

1 2

R488 1KR2J-1-GPR488 1KR2J-1-GP

1 2

C173

C191

SC27P50V2JN-2-GP

(R)

CLK33_SIO CLK33_DBP CLK_PCI_ICH CLK_48M_ICH CLK_14M_ICH

C464

SC27P50V2JN-2-GP

(R)

sensitive strobe used to latch the FSLA, FSLB, FSLC,SRC-5_EN, ITP_EN,TME or iAMT entry/exit.

For wireless performance

VCC3_3SB VCC3_3SB

R272

1KR2J-1-GP

(R)

BSEL0_3

R279

CPU_BSEL0

A A

1 2

4K7R2J-2-GP

(R)

BSEL0_2

Q19

PMBS3904-1-GP

(R)

BSEL0_4

PMBS3904-1-GP

(R)

Q20

R276

1 2

1KR2J-1-GP

(R)

FSA

CPU_BSEL2

1 2

R508 0R2J-2-GP

(R)

FSC FSB FSA

MCH_CLKSEL0 10 MCH_CLKSEL1 10 MCH_CLKSEL2 10

R487

1 2

4K7R2J-2-GP

(R)

PMBS3904-1-GP

3D3V_S5

R507

1KR2J-1-GP

(R)

BSEL2_2

CLK_PG

Q42

(R)

C148

SC27P50V2JN-2-GP

BSEL2_3

R509

R509 10KR2J-3-GP

10KR2J-3-GP

(R)

1 2 12

X-14D31818M-23GP

(23.30001.531)

BSEL2_4

Q40

PMBS3904-1-GP

(R)

http://hobi-elektronika.net

R510

R510 10KR2J-3-GP

10KR2J-3-GP

(R)

CLK_PG_0

PMBS3904-1-GP

CLK_XTAL_OUT_X

C130

C130 SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

R493

1 2

1KR2J-1-GP

(R)

Q41

PMBS3904-1-GP

(R)

Q43

(R)

CLK_48M_ICH24

CK_PWRGD24

CLK33_SIO38 CLK33_DBP39 CLK_PCI_ICH22

CLK_14M_ICH24

CLK14_SIO38

CLK_PG_1

R190

1 2

R277 33R2J-2-GPR277 33R2J-2-GP

R185 0R2J-2-GPR185 0R2J-2-GP

R230 33R2J-2-GPR230 33R2J-2-GP

1 2

R240 33R2J-2-GPR240 33R2J-2-GP

1 2

R256 33R2J-2-GPR256 33R2J-2-GP

1 2

R226 33R2J-2-GPR226 33R2J-2-GP

1 2

R214 33R2J-2-GPR214 33R2J-2-GP

1 2

FSC

C422

C422 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1 2

0R2J-2-GP

1 2

ICH_SMBCLK15,16,26,38,39,50 ICH_SMBDATA15,16,26,38,39,50

1 2

3D3V_S0

(R)

VCC_CORE_S0

R505

1 2

4K7R2J-2-GP

(R)

+CK_VDD_MAIN2 +CK_VDD_48 +CK_VDD_PLL3 +CK_VDD_MAIN1

CLK_XTAL_IN CLK_XTAL_OUT

FSA

PCI_STOP CPU_STOP

CK_PWRGD_CLK

PCI_SIO PCI_33M PCI_ ICH

TME_EN

27M_SRC_EN

ITP_EN

FSB FSC

Solder Thermal Pad to GND add min 4 vias

ICS9LPRS365BKLFT-GP-U

VCC3_3

R533

(R)

R533 47KR2J-2-GP

47KR2J-2-GP

CLK_48M_ICH CLK_14M_ICH

R524

R524 33KR2J-3-GP

33KR2J-3-GP

R283

47KR2J-2-GP

(R)

R287

33KR2J-3-GP

U19

USB_48MHZ/FSLA

PCI_STOP#

CPU_STOP#

SCLK

SDATA

CK_PWRGD/PD#

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME

PCI3

PCI4/27_SELECT

PCI_F5/ITP_EN

FSLB/TEST_MODE

REF0/FSLC/TEST_SEL

NC#55

3D3V_S0

C460

C174

SCD1U16V2ZY-2GP

(R)

SCD1U16V2ZY-2GP

C131

VDD48

VDDPCI

VDDREF

VDDSRC

VDDCPU

VDDPLL3

GNDREF

GNDPCI

GND48

GND

GNDSRC

SC2D2U10V3ZY-1GP

VDD96_IO

VDDPLL3_IO

GND

GNDCPU

C486

C170

SCD1U16V2ZY-2GP

L33 PBY160808T-301Y-N-GPL33 PBY160808T-301Y-N-GP

1 2

L34 PBY160808T-301Y-N-GPL34 PBY160808T-301Y-N-GP

1 2

L18 PBY160808T-301Y-N-GPL18 PBY160808T-301Y-N-GP

1 2

0.5A,0.25ohm,300ohm

L14 PBY160808T-301Y-N-GPL14 PBY160808T-301Y-N-GP

1 2

+CK_VDD_SRC

VDDSRC_IO

VDDCPU_IO

CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT11/CR#_H SRCC11/CR#_G

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

27MHZ_NONSS/SRCT1/SE1

27MHZ_SS/SRCC1/SE2

SRCT0/DOTT_96

SRCC0/DOTC_96

GND

CPUT0

CPUC0

CPUT1_F

SRCT6

SRCC6

SRCT10 SRCC10

SRCT9

SRCC9

SRCT4

SRCC4

C474

SCD1U16V2ZY-2GP

61 60

58 57

54 53

51 50

48 47

41 42

40 39

37 38

34 35

31 32

28 29

24 25

20 21

+CK_VDD_SRC

C459

SCD1U16V2ZY-2GP

C485

C470

CLK_CPU_BCLK CLK_CPU_BCLK#

CLK_MCH_BCLK CLK_MCH_BCLK#

DREFCLKSS_100M_C DREFCLKSS_100M_C#

ICS9LPRS_SRC3 ICS9LPRS_SRC3#

ICS9LPRS_27M ICS9LPRS_27M#

DREFCLK96 DREFCLK96#

LT72

Title

Size DocumentNumber Rev

Size DocumentNumber Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

HCB2012KF-600T30-GP

68.00084.791 100Mhz,60ohm,3A

C128

SC10U10V5ZY-1GP

+CK_VDD_MAIN2

+CK_VDD_PLL3

+CK_VDD_48

+CK_VDD_MAIN1

SC2D2U10V3ZY-1GP

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK_MCH_BCLK 8 CLK_MCH_BCLK# 8

CLK_MCH_3GPLL 10 CLK_MCH_3GPLL# 10

R186 0R2J-2-GP

1 2

R187 0R2J-2-GP

1 2

R202 0R2J-2-GP (DIS)R202 0R2J-2-GP (DIS)

1 2

R212 0R2J-2-GP (DIS)R212 0R2J-2-GP (DIS)

1 2

CLK_PCIE_J380 29 CLK_PCIE_J380# 29

CLK_PCIE_ICH 24 CLK_PCIE_ICH# 24

CLK _PCIE_MINI1 31 CLK _PCIE_MINI1# 31

CLK _PCIE_MINI2 31 CLK _PCIE_MINI2# 31

CLK_PCIE_LAN 33 CLK_PCIE_LAN# 33

CLK_PCIE_SATA 23 CLK_PCIE_SATA# 23

R266 100R2J-2-GP

R266 100R2J-2-GP R267 100R2J-2-GP

R267 100R2J-2-GP R264 0R2J-2-GP

R264 0R2J-2-GP R265 0R2J-2-GP

R265 0R2J-2-GP

Clock generator I CS-9LPRS365

L15

3D3V_S0

VDDIO (suggest 1.25V-3.3V)

C473

C487

SCD1U16V2ZY-2GP

(DIS)

(R)

1 2

SCD1U16V2ZY-2GP

R281

R281 10KR2J-3-GP

10KR2J-3-GP

(R)

SCD1U16V2ZY-2GP

(UMA)

UMA

DREFCLKSS_100M 10

UMA

DREFCLKSS_100M# 10

(UMA)

CLK_PCIE_GFX 50 CLK_PCIE_GFX# 50

VGA_27M 50 VGA_27M_S S 50

DREFCLK_96M 10 DREFCLK_96M# 10

352Friday, February 13, 2009

C172

SCD1U16V2ZY-2GP

C132

SCD1U16V2ZY-2GP

1 2

DIS

1 2

(UMA)

1 2

UMA

1 2

UMA

(UMA)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bali -1

C477

SCD1U16V2ZY-2GP

PDF created with pdfFactory trial version www.pdffactory.com

H_A#[3..35]8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8

D D

H_ADSTB#08 H_REQ#08

H_REQ#18 H_REQ#28 H_REQ#38 H_REQ#48

C C

8/18 SB Modify

H_THERMDA_226 H_THERMDC_226

H_THERMDA_138 H_THERMDC_138

R641 0R2J-2-GP

1 2 1 2

R640

QC QC

R642 0R2J-2-GP

1 2 1 2

R643

(R)

0R2J-2-GP

(R)R640

(R) (R)

(R)

0R2J-2-GP

(R)R643

(R)

H_ADSTB#18

H_A20M#23

H_FERR#23

H_IGNNE#23 H_STPCLK#23

H_INTR23 H_NMI23 H_SMI#23

H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_ADSTB#0

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADSTB#1 H_A20M#

H_FERR# H_IGNNE#

BPM_1[1]# BPM_1[0]# THERMDA_1 THERMDC_1 BPM_1[2]# CPU_RSVD06

TP45TPAD28 TP45TPAD28

H_GTLREF_2 TDO_2 TDI_1

-1 CPU socket change to 62.10053.571

SB 8/6 Layout Lib

62.10079.001=> (Old) BGA479-SKT-9-U1H199 (New) BGA479-SKT-9-U2H203

U7A

ADDR GROUP_0

A[3]#

A[4]#

A[5]#

A[6]#

A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]#

ADDR GROUP_1

A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

ICH

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

BGA479-SKT6-GPU7

(62.10053.341)

DEFER#

CONTROL

RESET#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERM DA THERM DC

THERM TRIP#

HCLK

BCLK[0] BCLK[1]

RESERVED

J1 N3 P5 P2

L2 P4 P1 R1

K3 H2 K2

L1 Y2

U5 R3

U4 Y5 U1 R4

W2 W5

Y4 U2 V4

W3 AA4 AB2 AA3

V1 A6

A5 C4

D5 C6 B4 A3

T2 V3 B2 D2

D22

D3 F6

QuadCore

3D3V_S0

R521

ITP_DBR#

1 2

1KR2J-1-GP

1D05V_S0

R388

R389

1 2

54D9R2F-L1-GP

54D9R2F-L1-GP R390

R390

1 2

54D9R2F-L1-GP

54D9R2F-L1-GP R383

R383

1 2

54D9R2F-L1-GP

ITP_TCK

ITP_TRST#

(R)

1 2

54D9R2F-L1-GP

649R2F-GP

(64.54R95.6DL)

R393

1 2

54D9R2F-L1-GP

54D9R2F-L1-GP R394

R394

1 2

ITP_TDI

ITP_TMS

ITP_TDO

ITP_BPM#5

(R)R393

(R)

B B

A A

1D05V_S0

XDP FOR QUAD CORE CPU

R409 51R2F-2-GP

1 2

R408

(QC)R408

(QC)

1 2

51R2F-2-GP

R26

(QC)R26

(QC)

1 2

51R2F-2-GP

R415

(QC)R415

(QC)

1 2

51R2F-2-GP

R385

(QC)R385

(QC)

1 2

51R2F-2-GP

R386

(QC)R386

(QC)

1 2

51R2F-2-GP

R384

(QC)R384

(QC)

1 2

51R2F-2-GP

R387

(QC)R387

(QC)

1 2

51R2F-2-GP

R434

1 2

51R2F- 2-GP

TDI_TDO_M

(QC)

ADS# BNR#

BPRI#

DRDY# DBSY#

BR0#

IERR#

LOCK#

RS[0]# RS[1]# RS[2]# TRDY#

HITM#

PRDY# PREQ#

TRST#

DBR#

INIT#

HIT#

TCK TDO

TMS

TDI

1 2

H1 E2 G5

H5 F21 E1

F1 D20

B3 H4 C1

F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

D21 A24 B25

A22 A21

(QC)

BPM_1[1]#

BPM_1[2]#

BPM_1[3]#

ITP_BPM#0

ITP_BPM#1

ITP_BPM#2

ITP_BPM#3

R426

R426 0R2J-2-GP

0R2J-2-GP

(QC)

R431

R431 0R2J-2-GP

0R2J-2-GP

(QC)

H_ADS# H_BNR# H_BPRI#

H_DEFER# H_DRDY# H_DBSY#

H_BR0# H_IERR#

H_INIT# H_LOCK# H_RESET#

H_RS#0 H_RS#1 H_RS#2 H_TRDY#

H_HIT# H_HITM#

ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3

H_THERMDA H_THERMDC

H_THERMTRIP#

100R2F-L1-GP-U

BPM_1[0]#

H_BPRI# 8 H_DEFER# 8

H_INIT# 23

H_THERMTRIP# 10,23,26

R142

(QC)

QuadCore

TDO_2

TDI_1

H_ADS# 8 H_BNR# 8

H_DRDY# 8 H_DBSY# 8

H_BR0# 8

H_LOCK# 8

H_RS#0 8 H_RS#1 8 H_RS#2 8

H_TRDY# 8

H_HIT# 8 H_HITM# 8

ITP_BPM#4

ITP_BPM#5 ITP_TCK

ITP_TDI ITP_TDO ITP_TMS

ITP_TRST#

ITP_DBR#

BPM_1[3]# 6

CLK_CPU_BCLK 3

CLK_CPU_BCLK# 3

http://hobi-elektronika.net

CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0

1D05V_S0

R481

49D9R2F-GP

R21

51R2F-2-GP

ITP_BPM#[3..0 ]

1D05V_S0

1 2 12

1D05V_S0

R452

R452 1KR2F-3-GP

1KR2F-3-GP

H_GTLRE F_2

R462

1K91R2F-1-GP

51R2F-2-GP

BSS138-7F-GP

(DC63.56034.1DL, QC 64.49R95.6DL)

(QC)

CPU

DCQC3D3V_S5

CPU QC/DC

DC QC

166

200

266 0 0 0

(R)

Quad Core Option

H_RESET# 8

R489

R489 68R2-GP

68R2-GP

CPU_PROCHOT#_R 38,46

H_THERMDA 38 H_THERMDC 38

R462: Use 1.91K in Topology2,

1.74K for Topology1.

Q37

(R)

Auto Detect

AUTO_DECT

Q34PMBS3904-1-GPQ34PMBS3904-1-GP

3D3V_S5 3D3V_S5

GND

3D3V_S5

GND

Layout Note: Route H_THERMDA and H_THERMDC on same layer w/ 10 mil trace & 10 mil spacing. Route away from noise sources with ground guard tracks on each side.

Need check!!

3D3V_S5

R463

R463 100KR2J-1-GP

100KR2J-1-GP

GTLREF_CTRL1

1D05V_S0

R446

R446 10KR2J-3-GP

10KR2J-3-GP

1 2

R433 10KR2J-3-GPR433 10KR2J-3-GP

Need check!!

R475

R475 100KR2J-1-GP

100KR2J-1-GP

(R)

R474

R474 100KR2J-1-GP

100KR2J-1-GP

(R)

AUTO_DECT QC/DC

U38

74LVC1G86DCKR-GP

(R)

VCC

B GND3Y

CPU_CONT

1 0

RSMRST# KEEP LOW AND POWER LED FLASH

RSMRST# AND POWER LED NORMALLY

1D05V_S0

R204

R204 1KR2F-3-GP

1KR2F-3-GP

1 2 12

R203

R203 2KR2F-3-GP

2KR2F-3-GP

QuadCore

CPU F8

DCQCGND

GTLREF_CTRL 6

CPU_CONT 38

H_D#[0..63]8

Layout note: Z0=50 ohm,

0.5" max for GTLREF

V_CPU_GTLREF

R499 1KR2J-1-GP

1 2

R504 1KR2J-1-GP

1 2

(R)

(R) (R)

(R)

CPU_BSEL03 CPU_BSEL13 CPU_BSEL23

Floating

1G86D Truth Value Table

A 0 0 1 110

KBC

H_DSTBN#08 H_DSTBP#08 H_DINV#08

H_DSTBN#18 H_DSTBP#18 H_DINV#18

DY DY

TP78TPAD28 TP78TPAD28 TP27TPAD28 TP27TPAD28 TP46TPAD28 TP46TPAD28 TP26TPAD28 TP26TPAD28 TP49TPAD28 TP49TPAD28

B0Y 0 1

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14

H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16

H_D#17

H_D#18

H_D#19

H_D#20

H_D#21

H_D#22

H_D#23

H_D#24

H_D#25

H_D#26

H_D#27

H_D#28

H_D#29

H_D#30

H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

CPU_BSEL0 CPU_BSEL1 CPU_BSEL2

0 1 1

E22 F24 E26

G22

F23

G25

E25 E23 K24

G24

J24 J23 H22 F26 K22 H23 J26 H26 H25

N22 K25 P26 R23 L23

M24

L22

M23

P25 P23 P22 T24 R24 L25 T25 N25 L26

M26

N24

AD26

TEST1

C23

TEST2

D25

TEST3

C24

TEST4

AF26

TEST5

AF1

TEST6

A26

TEST7

C3 B22 B23 C21

CPU_PROCHOT#_R

U7B

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF

MISC

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

BGA479-SKT6-GPU7

(62.10053.341)

1D05V_S0

CPU_PROCHOT#_S WH

Q46

PMBS3904-1-GP

(R)

H_D#32

Y22

D[32]#

H_D#33

AB24

D[33]#

H_D#34

V24

DATA GRP 0

D[34]#

H_D#35

V26

D[35]#

H_D#36

V23

D[36]#

H_D#37

T22

D[37]#

H_D#38

U25

D[38]#

H_D#39

U23

D[39]#

H_D#40

Y25

D[40]#

H_D#41

W22

D[41]#

H_D#42

Y23

D[42]#

H_D#43

W24

D[43]#

H_D#44

W25

D[44]#

H_D#45

AA23

D[45]#

H_D#46

AA24

D[46]#

H_D#47

AB25

D[47]#

H_DSTBN#2

Y26

H_DSTBP#2

AA26

H_DINV#2

U22

H_D#48

AE24

D[48]#

H_D#49

AD24

D[49]#

H_D#50

AA21

D[50]#

H_D#51

AB22

D[51]#

H_D#52

AB21

D[52]#

H_D#53

AC26

D[53]#

H_D#54

AD20

D[54]#

H_D#55

AE22

D[55]#

H_D#56

AF23

D[56]#

H_D#57

AC25

D[57]#

H_D#58

AE21

D[58]#

H_D#59

AD21

D[59]#

H_D#60

AC22

D[60]#

H_D#61

AD23

D[61]#

H_D#62

AF22

D[62]#

H_D#63

AC23

D[63]#

H_DSTBN#3

AE25

H_DSTBP#3

AF24

H_DINV#3

AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

H_DPRSTP#

H_DPSLP#

H_DPWR#

D24

H_PWRGOOD

H_CPUSLP#

SLP#

PSI#

AE6

PSI#

OCP# 24

LT72

Title

Penryn(1/3)-AGTL+/XDP

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

H_DSTBN#2 8 H_DSTBP#2 8 H_DINV#2 8

R200 24D9R2F-L-GP

1 2

R198 49D9R2F-GP(DC64.54R95.6DL, QC64.49R95.6DL)R198 49D9R2F-GP(DC64.54R95.6DL, QC64.49R95.6DL)

1 2

R392 24D9R2F-L-GP(DC 64.27R45.6DL, QC64.24R95.6DL)R392 24D9R2F-L-GP(DC 64.27R45.6DL, QC64.24R95.6DL)

1 2

R391 49D9R2F-GP

1 2

H_DPRSTP# 10,23,46 H_DPSLP# 23

H_DPWR# 8 H_PWRGOOD 23 H_CPUSLP# 8 PSI# 46

Layout note: Comp0,2 connect with Zo=27.4ohm, make trace length shorter than 0.5". Comp1,3 connect with Zo=55ohm, make trace length shorter than 0.5".

Wistron Corporation

21F,88, Sec.1,Hsin Tai Wu Rd.,Hsichih,

21F,88, Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei H sien 22 1, Taiwan ,R .O.C.

Taipei H sien 22 1, Taiwan ,R .O.C.

Bali

DATA GRP 1

PWRGOOD

R522

R522 56R2J-4-GP

56R2J-4-GP

(R)

312

DATA GRP 2DATA GRP 3

DSTBN[2]# DSTBP[2]#

DINV[2]#

DSTBN[3]# DSTBP[3]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

QuadCore

H_DSTBN#3 8 H_DSTBP#3 8 H_DINV#3 8

(DC64.27R45.6DL, QC 64.24R95.6DL)

(DC64.54R95.6DL, QC 64.49R95.6DL)

-1

52Friday, February13, 2009

PDF created with pdfFactory trial version www.pdffactory.com

http://hobi-elektronika.net

VCC_CORE_S0 VCC_CORE_S0

U7C

VCC[001]

VCC[002]

A10

VCC[003]

A12

D D

C C

VCC_CORE_S0

R436

R436 0R2J-2-GP

0R2J-2-GP

(QC)

BR1#

---QC: Do not stuff R53

---DC: Stuff R53

B B

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

VCC[010]

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

VCC[033]

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

VCC[042]

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

BGA479-SKT6-GPU7

(62.10053.341)

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01]

VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

CPU_VID0

AD6

CPU_VID1

AF5

CPU_VID2

AE5

CPU_VID3

AF4

CPU_VID4

AE3

CPU_VID5

AF3

CPU_VID6

AE2

AF7

AE7

CPU_VID[0..6] 46

(R)

1 2

R429 100R2F-L1-GP-UR429 100R2F-L1-GP-U

1 2

R441100R2F-L1-GP-UR441100R2F-L1-GP-U

C350

VCC_CORE_S0

SCD1U10V2KX-4GP

C400

VCC_SENSE_1

VSS_SENSE_1

C349

(R)

SCD1U10V2KX-4GP

C145

C145 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C395

CPU_VCCA

C147

C147 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

R423 0R0402-PADR423 0R0402-PAD

R424 0R0402-PADR424 0R0402-PAD

1D05V_S0

C401

SCD1U10V2KX-4GP

C396

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

L42 PBY160808T-301Y-N-GPL42 PBY160808T-301Y-N-GP

1 2

0.5A,0.25ohm,300ohm

Layout note: Place 10u near Pin B26

1 2

1D05V_S0

12/14 -1A Add

C348

(R)

SC10U6D3V5MX-3GP

1D5V_S0

VCC_SENSE 46

VSS_SENSE 46

C200

C543

1 2

(R)

SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

Layout Note: Route VCCSENSE and VSSSENSE traces at

27.4 Ohms with 50 mil spacing. Place PU and PD within 1 inch of CPU.

LT72

A A

LT72

Wistron Corporation

21F, 88, Sec.1,Hsin T ai Wu Rd., Hsichih,

21F, 88, Sec.1,Hsin T ai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Penryn(2/3)-AG T L + /P WR

Size Docum ent Number Rev

Size Docum ent Number Rev A3

A3 Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Bali

-1

52Friday, F ebruary 13, 2009

PDF created with pdfFactory trial version www.pdffactory.com

http://hobi-elektronika.net

VCC_CORE_S0

U7D

VSS[001]

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

D D

C C

GTLREF_CTRL4

CPU

DC QC

GND

Floating

B B

VSS[006]

A23

VSS[007]

AF2

VSS[008]

VSS[009]

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

VSS[017]

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

VSS[023]

C22

VSS[024]

C25

VSS[025]

VSS[026]

VSS[027]

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

VSS[035]

VSS[036]

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

VSS[044]

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

VSS[050]

F22

VSS[051]

F25

VSS[052]

VSS[053]

VSS[054]

G23

VSS[055]

G26

VSS[056]

VSS[057]

VSS[058]

H21

VSS[059]

H24

VSS[060]

VSS[061]

VSS[062]

J22

VSS[063]

J25

VSS[064]

VSS[065]

VSS[066]

K23

VSS[067]

K26

VSS[068]

VSS[069]

VSS[070]

L21

VSS[071]

L24

VSS[072]

VSS[073]

VSS[074]

M22

VSS[075]

M25

VSS[076]

VSS[077]

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

VSS

BGA479-SKT6-GPU7

(62.10053.341)

A A

PDF created with pdfFactory trial version www.pdffactory.com

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

AA8

AC8

AE8

BPM_1[3]#4

Place these capacitors on L1 (North side ,Secondary Layer)

R419

1 2

(QC)

0R2J-2-GP

0R2J-2-GP R422

R422

1 2

0R2J-2-GP

0R2J-2-GP R435

R435

1 2

0R2J-2-GP

0R2J-2-GP R395

R395

1 2

0R2J-2-GP

0R2J-2-GP R442

R442

1 2

0R2J-2-GP

(DC)

AE8

AA8

AC8

AA8, AC8, D8

---QC RSVD

---DC VSS

VCC_CORE_S0

C64

C383

SC10U6D3V5MX-3GP

C87

C84

SC10U6D3 V 5MX-3GP

C65

C380

SC10U6D3V5MX-3GP

C61

C351

SC10U6D3V5MX-3GP

SB 8/6

C590

C440

(R)

SC10U6D3V5MX-3GP

C62

C85

SC10U6D3V5MX-3GP

C346

C354

SC10U6D3 V 5MX-3GP

C86

C381

SC10U6D3V5MX-3GP

C83

C393

SC10U6D3V5MX-3GP

C372

C456

SC10U6D3V5MX-3GP

C63

C353

C384

C382

SC10U6D3V5MX-3GP

C344

C345

SC10U6D3 V 5MX-3GP

Mid Frequencd Decoupling

C355

SC10U6D3V5MX-3GP

C352

SC10U6D3V5MX-3GP

TC23

TC23 SE330U2VDM-L-GP

SE330U2VDM-L-GP

(R)

LT72

Wistron Corporation

21F, 88, Sec.1,Hsin T ai Wu Rd., Hsichih,

21F, 88, Sec.1,Hsin T ai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Penryn(3/3)-GND&Bypass

Size DocumentNumber Rev

Size Docum ent Number Rev

Size Docum ent Number Rev A3

A3 Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Bali

-1

52Friday, F ebruary 13, 2009

http://hobi-elektronika.net

D D

ITP Connector

C C

B B

A A

Remove

LT72

Wistron Corporation

21F, 88, Sec.1, HsinTai W u Rd., Hsichih,

21F, 88, Sec.1, HsinTai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Penryn(3/3)-GND&Bypass

Size DocumentNumber Rev

Size DocumentNumber Rev B

B Date: Sheet

Date: Sheet

Penryn(3/3)-GND&Bypass

Bali

52Friday, February 13, 2009

PDF created with pdfFactory trial version www.pdffactory.com

1 OF 10

www.hobi-elektronika.net

Layout Note : H_RCOMP / H_VREF / H_SWNG trace width and spacing is 10/20

1D05V_S0

R32

R32 1KR2F-3-GP

1KR2F-3-GP

H_RESET#4

Layout note: Trace should be 10-mil wide with 20-mil spacing

QuadCore

check Quade core only or not?

R29

R29 24D9R2F-L-GP

24D9R2F-L-GP

(DC64.24R95.6DL,QC64.16R95.xxx 0402! )

1D05V_S0

B B

R33

2KR2F-3-GP

Layout Note : Place C560 within 100 mils of NB

C21

SC1U10V3ZY-6GP

check Quade core only or not?

QuadCore

R30

75R2F-2-GP

(DC64.10005.6DL,QC64.75R05.6DL)

C258

(R)

SC4P50V2CN-GP

H_RCOMP

0603-64.24R95.55L 0402-64.24R95.6DL

R31

R31 221R2F-2-GP

221R2F-2-GP

H_SWNGH_VREF

C20

C20 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Layout Note : Place C549 near pin B3 of NB

http://hobi-elektronika.net

H_D#[0..63]4

H_RESET#4 H_CPUSLP#4

H_VREF

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWNG H_RCOMP

U10A

H_D#_0

H_D#_1

H_D#_2

H_D#_3

H_D#_4

H_D#_5

H_D#_6

H_D#_7

H_D#_8

H_D#_9

H_D#_10

M11

H_D#_11

H_D#_12

H_D#_13

N12

H_D#_14

H_D#_15

H_D#_16

H_D#_17

H_D#_18

H_D#_19

H_D#_20

H_D#_21

H_D#_22

H_D#_23

H_D#_24

H_D#_25

H_D#_26

P13

H_D#_27

H_D#_28

H_D#_29

N10

H_D#_30

H_D#_31

H_D#_32

AD14

H_D#_33

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

H_D#_38

H_D#_39

AA8

H_D#_40

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

H_SWING

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA-GM-GP-U-NF

(71.0GM47.00U)

HOST

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

H_A#3

A14

H_A#4

C15

H_A#5

F16

H_A#6

H13

H_A#7

C18

H_A#8

M16

H_A#9

J13

H_A#10

P16

H_A#11

R16

H_A#12

N17

H_A#13

M13

H_A#14

E17

H_A#15

P17

H_A#16

F17

H_A#17

G20

H_A#18

B19

H_A#19

J16

H_A#20

E20

H_A#21

H16

H_A#22

J20

H_A#23

L17

H_A#24

A17

H_A#25

B17

H_A#26

L16

H_A#27

C21

H_A#28

J17

H_A#29

H20

H_A#30

B18

H_A#31

K17

H_A#32

B20

H_A#33

F21

H_A#34

K21

H_A#35

L20

H_ADS#

H12

H_ADSTB#0

B16

H_ADSTB#1

G17

H_BNR#

H_BPRI#

F11

H_BR0#

G12

H_DEFER#

H_DBSY#

B10

CLK_MCH_BCLK

AH7

CLK_MCH_BCLK#

AH6

H_DPWR#

J11

H_DRDY#

H_HIT#

H_HITM#

E12

H_LOCK#

H11

H_TRDY#

H_DINV#0

H_DINV#1

H_DINV#2

Y13

H_DINV#3

H_DSTBN#0

L10

H_DSTBN#1

H_DSTBN#2

AA5

H_DSTBN#3

AE6

H_DSTBP#0

H_DSTBP#1

H_DSTBP#2

AA6

H_DSTBP#3

AE5

H_REQ#0

B15

H_REQ#1

K13

H_REQ#2

F13

H_REQ#3

B13

H_REQ#4

B14

H_RS#0

H_RS#1

F12

H_RS#2

LT72

Title

CANTIGA(1/7): HOST I/F

Size Document Number Rev

Size Document Number Rev B

B Date: Sheet

Date: Sheet

H_A#[3..35] 4

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4

H_BPRI# 4

H_BR0# 4

H_DEFER# 4

H_DBSY# 4 CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3

H_DPWR# 4

H_DRDY# 4

H_HIT# 4

H_HITM# 4 H_LOCK# 4 H_TRDY# 4

H_DINV#0 4 H_DINV#1 4 H_DINV#2 4 H_DINV#3 4

H_DSTBN#0 4 H_DSTBN#1 4 H_DSTBN#2 4 H_DSTBN#3 4

H_DSTBP#0 4 H_DSTBP#1 4 H_DSTBP#2 4 H_DSTBP#3 4

H_REQ#0 4 H_REQ#1 4 H_REQ#2 4 H_REQ#3 4 H_REQ#4 4

H_RS#0 4 H_RS#1 4 H_RS#2 4

Bali

Wistron Corporation

21F,88,Sec.1,HsinTaiWuRd.,Hsichih,

21F,88,Sec.1,HsinTaiWuRd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

-1

52Friday, February13, 2009

PDF created with pdfFactory trial version www.pdffactory.com

http://hobi-elektronika.net

4 OF 10

DDR SYSTEM MEMORY A

4 OF 10

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

-M_A_DQS0

-M_A_DQS1

-M_A_DQS2

-M_A_DQS3

-M_A_DQS4

-M_A_DQS5

-M_A_DQS6

-M_A_DQS7 M_A_A0

M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_BS0 15 M_A_BS1 15 M_A_BS2 15

-M_A_RAS 15

-M_A_CAS 15

-M_A_WE 15

U10D

M_A_DQ[63..0]15

B B

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21

M_A_DQ22

M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

U10D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

(71.0GM47.00U)

M_B_DQ[63..0]16

M_A_DM[7..0] 15

M_A_DQS[7..0] 15

-M_A_DQS[7..0] 15

M_A_A[14..0] 15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

U10E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

(71.0GM47.00U)

DDR SYSTEM MEMORY B

5 OF 10

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS# SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

BC16 BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_BS0 M_B_BS1 M_B_BS2

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

-M_B_DQS0

-M_B_DQS1

-M_B_DQS2

-M_B_DQS3

-M_B_DQS4

-M_B_DQS5

-M_B_DQS6

-M_B_DQS7 M_B_A0

M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_BS0 16 M_B_BS1 16 M_B_BS2 16

-M_B_RAS 16

-M_B_CAS 16

-M_B_WE 16

M_B_DM[7..0] 16

M_B_DQS[7..0] 16

-M_B_DQS[7..0] 16

M_B_A[14..0] 16

PDF created with pdfFactory trial version www.pdffactory.com

LT72

Wistron Corporation

21F,88,Sec.1,HsinTaiWuRd.,Hsichih,

21F,88,Sec.1,HsinTaiWuRd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CANTIGA(2/7)-DDR3 A/B CH

Size Document Number Rev

Size Document Number Rev B

B Date: Sheet

Date: Sheet

Bali

-1

52Friday, February13, 2009

www.hobi-elektronika.net

ME DEBUG PORT PIN OUT TABLE RESERVED#AL34 ME_JTAG_TCK RESERVED#AK34 ME_JTAG_TDI

D D

RESERVED#AN35 ME_JTAG_TDO RESERVED#AM35 ME_JTAG_TMS

CFG5 : DMIx2 CFG6 : iTPM CFG7 : ME Crypto CFG9: PCIE STD& REV CFG16 : FSB Dynamic ODT CFG19 : DMI Lane reversal CFG20 : DP concurrent CFG[17:3]:internal pullup CFG[20:18]:internal pulldown

C C

MCH_CLKSEL03

3D3V_S0

R411 2K2R2J-2-GPDY(R)R411 2K2R2J-2-GPDY(R)

1 2

R443 2K2R2J-2-GPDY(R)R443 2K2R2J-2-GPDY(R)

R444

10KR2J-3-GP

B B

IMVP_PGOOD24,38,46,49

A A

R448

R448 10KR2J-3-GP

10KR2J-3-GP

1 2

-MEM_TS0

-MEM_TS1

12/12

-1C Modify

PWRGD_3V24,38

SCD47U6D3V2KX-GP

3D3V_S0

R645 0R2J-2-GPR645 0R2J-2-GP

1 2

R492 0R2J-2-GP

1 2

C413

(R)

PLTRST#38

1 2

R438 2K2R2J-2-GPDY(R)R438 2K2R2J-2-GPDY(R)

1 2

PCI-E reverse:Low

R430 2K2R2J-2-GPDY(R)R430 2K2R2J-2-GPDY(R)

1 2

(R)

R497 100R2J-2-GP

MCH_CLKSEL13 MCH_CLKSEL23

R36 2K2R2J-2-GPR36 2K2R2J-2-GP

1 2

(R)

R455 4K02R2F-1-GP

1 2 1 2

R449

(R)

part number error!

PM_BMBUSY#24

H_DPRSTP#4,23,46

-MEM_TS015

-MEM_TS116

H_THERMTRIP#4,23,26 DPRSLPVR24,46

(64.20005.6DL)

TP61TP61 TP62TP62

TP53TP53 TP52TP52

TP59TP59 TP58TP58 TP63TP63 TP64TP64 TP56TP56

TP54TP54 TP60TP60

4K02R2F-1-GP

PLT_RST_R#

TP74TP74 TP72TP72 TP76TP76 TP77TP77

PM_BMBUSY# H_DPRSTP#

VR_PWRGD_1 PLT_RST_R# H_THERMTRIP#

MCH_ JD_ TP1 MCH_ JD_ TP2 MCH_ JD_ TP3 MCH_ JD_ TP4

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

DPRSLPVR

U10B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9

AH10

RESERVED#AH10

AH12

RESERVED#AH12

AH13

RESERVED#AH13

K12

RESERVED#K12

AL34

RESERVED#AL34

AK34

RESERVED#AK34

AN35

RESERVED#AN35

AM35

RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

RESERVED#B2

RESERVED#M1

AY21

RESERVED#AY21

BG23

RESERVED#BG23

BF23

RESERVED#BF23

BH18

RESERVED#BH18

BF18

RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC#BG48

BF48

NC#BF48

BD48

NC#BD 48

BC48

NC#BC 48

BH47

NC#BH47

BG47

NC#BG47

BE47

NC#BE47

BH46

NC#BH46

BF46

NC#BF46

BG45

NC#BG45

BH44

NC#BH44

BH43

NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD 1

BC1

NC#BC 1

NC#F1

A47

NC#A47

CANTIGA-GM-GP -U-NF

(71.0GM47.00U)

http://hobi-elektronika.net

RSVD

CFG

2 OF 10

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

BB36

SB_CKE_1

BA17

SA_CS#_0

AY16

SA_CS#_1

AV16

SB_CS#_0

AR13

SB_CS#_1

BD17

SA_ODT_0

AY17

SA_ODT_1

BF15

SB_ODT_0

AY13

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2

DMI

DMI_TXN_3 DMI_TXP_0

DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

MEHDA

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

TSATN#

HDA_BCLK

HDA_RS T#

HDA_SDI

HDA_SDO

HDA_SYNC

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

N28 M28 G36 E36

MCH_CLKREQ#

K36 H36

B12

B28 B30 B29 C29 A28

SM_RCOMP SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

DDR_VREF_S3-NB

SMPWRG

NB_SM_REXT

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

DFGT_VID0 DFGT_VID1 DFGT_VID2 DFGT_VID3 DFGT_VID4

DFGT_VR_EN

CL_VREF

DDPC_CTRLDATA

R398 10KR2J-3-GPR398 10KR2J-3-GP

1 2

R34

MCH_TSATN#

1 2

Remove 6/17

DDRCLK0_533M 15 DDRCLK1_533M 15 DDRCLK2_533M 16 DDRCLK3_533M 16

-DDRCLK0_533M 15

-DDRCLK1_533M 15

-DDRCLK2_533M 16

-DDRCLK3_533M 16 M_CKE0 15

M_CKE1 15 M_CKE2 16 M_CKE3 16

-M_CS0 15

-M_CS1 15

-M_CS2 16

-M_CS3 16 M_ODT0 15

M_ODT1 15 M_ODT2 16 M_ODT3 16

-DRAMRST 15,16 DREFCLK_96M 3

DREFCLK_96M# 3 DREFCLKSS_100M 3 DREFCLKSS_100M# 3

CLK_MCH_3GPLL 3 CLK_MCH_3GPLL# 3

DMI_TXN0 24 DMI_TXN1 24 DMI_TXN2 24 DMI_TXN3 24

DMI_TXP0 24 DMI_TXP1 24 DMI_TXP2 24 DMI_TXP3 24

DMI_RXN0 24 DMI_RXN1 24 DMI_RXN2 24 DMI_RXN3 24

DMI_RXP0 24 DMI_RXP1 24 DMI_RXP2 24 DMI_RXP3 24

TP6TP6 TP11TP11 TP55TP55 TP50TP50 TP51TP51

TP12TP12

TP57TP57

56R2J-4-GP

R514 80D6R2F-L-GPR514 80D6R2F-L-GP R216

R216

R513 499R2F-2-GPR513 499R2F-2-GP

08/06

R484 delete

CL_CLK 24 CL_DATA 24 CL_PWRO K 24,38 CL_RST# 24

3D3V_S0

MCH_ICH_SYNC# 24

1D05V_S0

1 2 1 2

1 2

SM_RCOMP_VOH

SM_RCOMP_VOL

1D5V_S3

80D6R2F-L-GP

C427

SCD1U16V2ZY-2GP

check 1.5 or 1.05V Power GD

SMPWRG

1D05V_S0

C389

SCD1U16V2ZY-2GP

R495 0R0402-PADR 495 0R0402-PAD

1 2

R496

R496 10KR2J-3-GP

10KR2J-3-GP

R472

R472 1KR2F-3-GP

1KR2F-3-GP

1 2

R476

R476 499R2F-2-GP

499R2F-2-GP

LT72

Title

CANTIGA(3/7):DMI/PM/CFG/GF

Size DocumentNumber Rev

Size DocumentNumber Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

1 2

C153

C155

SC2D2U10V3ZY-1GP

C155

SC2D2U10V3ZY-1GP

SCD01U16V2KX-3GP

C152

1 2

C151

1 2

SCD01U16V2KX-3GP

1 2

C426

SCD1U16V2ZY-2GP

M_PWROK 44

0R0603-PAD

SC2D2U10V3ZY-1GP

SB 0111/08

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bali

1D5V_S3

R503

R220

R220 1KR2F-3-GP

1KR2F-3-GP

R215

R215 3K01R2F-3-GP

3K01R2F-3-GP

R219

R219 1KR2F-3-GP

1KR2F-3-GP

DDR_VREF_S3

PDF created with pdfFactory trial version www.pdffactory.com

check

-1

52Friday, February 13, 2009

R404

R405

2K2R2J-2-GP

BLON_IN20

check

LDDC_CLK LDDC_DATA

LCDVDD_EN20

R404 2K2R2J-2-GP

2K2R2J-2-GP

check

LVDS Signals

reserved

R399

R399 10KR2J-3-GP

10KR2J-3-GP

1 2

R35 2K4R2F-GP

UMA

R420 0R2J-2-GP

UMA

R418 0R2J-2-GP

UMA

GMH_TXACLK-20 GMH_TXACLK+20 GMH_TXBCLK-20 GMH_TXBCLK+20

GMH_TXAOUT0-20 GMH_TXAOUT1-20 GMH_TXAOUT2-20 GMH_TXAOUT3-20

GMH_TXAOUT0+20 GMH_TXAOUT1+20 GMH_TXAOUT2+20 GMH_TXAOUT3+20

GMH_TXBOUT0-20 GMH_TXBOUT1-20 GMH_TXBOUT2-20 GMH_TXBOUT3-20

GMH_TXBOUT0+20 GMH_TXBOUT1+20 GMH_TXBOUT2+20 GMH_TXBOUT3+20

R412 75R2J-1-GPR412 75R2J-1-GP R413 75R2J-1-GPR413 75R2J-1-GP R414 75R2J-1-GPR414 75R2J-1-GP

R484 0R2J-2-GP (UMA)R484 0R2J-2-GP (UMA) R491 0R2J-2-GP (UMA)R491 0R2J-2-GP (UMA)

B B

M_BLUE17 M_GREEN17 M_RED17

reserved for debug

DIS R122,R123,R124 CHANGE TO 0 OHM

63.R0034.1DL

GMCH_DDC_CLK17

GMCH_DDC_DATA17

GMCH_HSYNC17 GMCH_VSYNC17

0 IN DIS

(UMA)

R407 33R2J-2-GP

1 2

(UMA)

R406 33R2J-2-GP

1 2

R421

150R2F-1-GP

0 IN DIS

R425

use 33ohm

150R2F-1-GP

1 2

1 2 1 2

1 2

0 IN DIS

HSYNC_R VSYNC_R

R400

R400 10KR2J-3-GP

10KR2J-3-GP

L_CTRL_DATA

(UMA)

(UMA) (UMA)

(UMA)

12 12 12

12 12

R428

150R2F-1-GP

TP86TP86

L_CTRL_CLK

TP9TP9

R437

0R2J-2-GP

(R)

R403

100KR2J-1-GP

LVDS_BKLT_CTL

LVDS_VREFH LVDS_VREFL

MCH_TVA_DAC MCH_TVB_DAC MCH_TVC_DAC

1 2

8/25 SB BOM modify

http://hobi-elektronika.net

LVDS_IBG LVDS_VBG

MCH_TV_DSEL0 MCH_TV_DSEL1

CRT_IREF

R439

R439 0R2J-2-GP

0R2J-2-GP

(R)

U10C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

R416

R416 1K02R2D-GP

1K02R2D-GP

(64.10015.6DL)

CANTIGA-GM-GP-U-NF

(71.0GM47.00U)

LVDS

TV VGA

PCI-EXPRESS GRAPHICS

3 OF 10

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

T37 T36

H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

1D05V_S03D3V_S0

R105

R105 49D9R2F-GP

49D9R2F-GP

PEGCOMP trace

PEGCOMP

PCI-E reverse

GTXN15 GTXN14 GTXN13 GTXN12 GTXN11 GTXN10 GTXN9 GTXN8 GTXN7 GTXN6 GTXN5 GTXN4 GTXN3 GTXN2 GTXN1 GTXN0

GTXP15 GTXP14 GTXP13 GTXP12 GTXP11 GTXP10 GTXP9 GTXP8 GTXP7 GTXP6 GTXP5 GTXP4 GTXP3 GTXP2 GTXP1 GTXP0

width and spacing is 20/25 mils.

PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0

PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0

C333 SCD1U10V2KX-4GP

C333 SCD1U10V2KX-4GP C305 SCD1U10V2KX-4GP

C305 SCD1U10V2KX-4GP C303 SCD1U10V2KX-4GP

C303 SCD1U10V2KX-4GP C331 SCD1U10V2KX-4GP

C331 SCD1U10V2KX-4GP C329 SCD1U10V2KX-4GP

C329 SCD1U10V2KX-4GP C327 SCD1U10V2KX-4GP

C327 SCD1U10V2KX-4GP C325 SCD1U10V2KX-4GP

C325 SCD1U10V2KX-4GP C323 SCD1U10V2KX-4GP

C323 SCD1U10V2KX-4GP C321 SCD1U10V2KX-4GP

C321 SCD1U10V2KX-4GP C319 SCD1U10V2KX-4GP

C319 SCD1U10V2KX-4GP C317 SCD1U10V2KX-4GP

C317 SCD1U10V2KX-4GP C315 SCD1U10V2KX-4GP

C315 SCD1U10V2KX-4GP C313 SCD1U10V2KX-4GP

C313 SCD1U10V2KX-4GP C311 SCD1U10V2KX-4GP

C311 SCD1U10V2KX-4GP C309 SCD1U10V2KX-4GP

C309 SCD1U10V2KX-4GP C307 SCD1U10V2KX-4GP

C307 SCD1U10V2KX-4GP C332 SCD1U10V2KX-4GP

C332 SCD1U10V2KX-4GP C304 SCD1U10V2KX-4GP

C304 SCD1U10V2KX-4GP C302 SCD1U10V2KX-4GP

C302 SCD1U10V2KX-4GP C330 SCD1U10V2KX-4GP

C330 SCD1U10V2KX-4GP C328 SCD1U10V2KX-4GP

C328 SCD1U10V2KX-4GP C326 SCD1U10V2KX-4GP

C326 SCD1U10V2KX-4GP C324 SCD1U10V2KX-4GP

C324 SCD1U10V2KX-4GP C322 SCD1U10V2KX-4GP

C322 SCD1U10V2KX-4GP C320 SCD1U10V2KX-4GP

C320 SCD1U10V2KX-4GP C318 SCD1U10V2KX-4GP

C318 SCD1U10V2KX-4GP C316 SCD1U10V2KX-4GP

C316 SCD1U10V2KX-4GP C314 SCD1U10V2KX-4GP

C314 SCD1U10V2KX-4GP C312 SCD1U10V2KX-4GP

C312 SCD1U10V2KX-4GP C310 SCD1U10V2KX-4GP

C310 SCD1U10V2KX-4GP C308 SCD1U10V2KX-4GP

C308 SCD1U10V2KX-4GP C306 SCD1U10V2KX-4GP

C306 SCD1U10V2KX-4GP

Place Close to MXM Conn

1 2 1 2 1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

(DIS) (DIS)

(DIS)

1 2

(DIS)

1 2 1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

1 2

(DIS)

(DIS) (DIS)

(DIS)

PEG_RXN[15..0] 50

PEG_RXP[15..0] 50

DIS

DIS DIS

DIS

DIS DIS

DIS

PCI-E reverse

PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0

PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0

LT72

Title

CANTIGA(5/7): VGA/LVDS

Size Document Number Rev

Size Document Number Rev B

Friday, February13, 2009

Date: Sheet

Friday, February13, 2009

Date: Sheet

Friday, February13, 2009

Date: Sheet

PEG_TXN[15..0] 50

PEG_TXP[15..0] 50

Wistron Corporation

21F,88,Sec.1,HsinTaiWuRd.,Hsichih,

21F,88,Sec.1,HsinTaiWuRd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bali

11 52

-1

PDF created with pdfFactory trial version www.pdffactory.com

www.hobi-elektronika.net

http://hobi-elektronika.net

1D05V_S0

L4 MLB-160808-28-GP

4 4

1D05V_S0

L13 MLB-160808-28-GP

3 3

L4 MLB-160808-28-GP L6 MLB-160808-28-GP

L6 MLB-160808-28-GP

R111

0R0603-PAD

1 2

(68.00214.051)

C75

SCD1U16V2ZY-2GP

8/19 SB Modify

1D5V_S0 1D05V_S 0

R43

1 2

10R2J-2-GP

(R)

2 2

1 1

1 2 1 2

C93

1D5V_S0_MCH

SC10U6D3V5MX-3GP

(68.00214.051)

C91

1 2

SC1U16V3KX-2GP

D25

K A

SDM20U30-7-GP

(R)

1D5V_S0

C39

SC10U10V5ZY-1GP

C89

1 2

HCB1608KF-181-GP

C40

C202

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

R118

R118 1R3F-GP

1R3F-GP

6/18 0.57->1R

1 2

VCCA_MPLL_F

C102

SCD1U10V2KX-4GP

SC2D2U10V3ZY-1GP

C195

SC10U10V5ZY-1GP

1D05V_S0

SCD1U16V2ZY-2GPC7SCD1U16V2ZY-2GP

C50

C60

0R0603-PAD

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

1 2

0R0603-PAD

1 2

C392

SCD1U16V2ZY-2GP

C376

1 2

SC1U10V3ZY-6GP

SC10U10V5ZY-1GP

C76

SCD1U10V2KX-4GP

C374

C360

(R)

R19 0R0402-PADR19 0R0402-PAD

R440 0R0402-PADR440 0R0402-PAD

SCD022U16V2KX-3GPC8SCD022U16V2KX-3GP

08/06

8/25 SB BOM modify

3D3V_DAC

R27

C9 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

R24

(R)

VCCA_DAC

C23

SCD1U16V2ZY-2GP

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MP LL

C387

(R)

SCD1U16V2ZY-2GP

C375

SCD1U16V2ZY-2GP

C16

1D05V_S0

R37

(R)

0R2J-2-GP

SCD1U16V2ZY-2GP

C359

1 2

0R0603-PAD

C17

1D05V_S0

1D8V_S3

SCD1U10V2KX- 4 G P

VCCA_CRT

SCD1U16V2ZY-2GP

1D8V_S3

1D05V_S0

R427

1 2

0R0402-PAD

C24

SCD1U16V2ZY-2GP

1D5V_S0

C45

SCD1U16V2ZY-2GP

C394

SCD1U10V2KX- 4 G P

VCCA_DAC

VCC_HDA_MCH

VCCD_TVDAC_MCH VCCD_QDAC_MCH

VCC_LVDS_M CH

C347

(UMA)

SC1U10V3ZY-6GP

C80

1 2

B27 A26

A25 B25

F47

L48 AD1 AE1

J48

J47

AD48

AA48

SCD1U16V2ZY-2GP

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25

AL25

AM24

AL24

AM23

AL23

B24

A24

A32

M25

L28 AF1

AA47

M38

L37

R432

(R)

U10H

VCCA_CRT_DAC VCCA_CRT_DAC

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL

VCCA_LVDS VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF

VCCA_TV_DAC VCCA_TV_DAC

VCC_HDA

VCCD_TVDAC VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL

VCCD_LVDS VCCD_LVDS

CANTIGA-GM-GP-U-NF

(71.0GM47.00U)

0R2J-2-GP

8 OF 10

U13

VTT

T13

VTT

U12

VTT

T12

VTT

U11

VTT

T11

VTT

U10

VTT

T10

VTT

AXF

SM CK

VCC_TX_LVDS

PEG

DMI

VTT

VCC_AXF VCC_AXF VCC_AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

VCC_HV VCC_HV VCC_HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

VCC_DMI

VCC_DMI VCC_DMI VCC_DMI

VTTLF VTTLF VTTLF

VTTLF

VTT

B22 B21 A21

BF21 BH20 BG20 BF20

K47 C35

B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1

VTTLF 3_MCH

AB2

CRTPLLA PEGASM

A LVDS

POWER

ACK

HDA

D TV/CRT

LVDS

VCC_AXF_MCH

VTTLF1_MCH VTTLF2_MCH

C72

1 2

C356

C14

SCD1U16V2ZY-2GP

C69

SCD1U16V2ZY-2GP

C43

1 2

SC4D7U10V5ZY-3GP

C357

(R)

SCD1U10V2KX-4GP

12/15 -1A Modify

C18

VCC_SM_CK_MCH

C439

SC10U10V5ZY-1GP

C70

SCD1U16V2ZY-2GP

1 2

C15

(R)

1 2

SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

C482

SC1U10V3ZY-6GP

(R)

C358

C388

(R)

SCD1U16V2ZY-2GP

(78.10610.51L)

L2 PBY160808T- 301Y-N-GPL2 PBY160808T-301Y -N-GP

1 2

C36

SC10U10V5ZY-1GP

L17 PBY160808T-301Y-N-GPL17 PBY160808T-301Y-N-GP

1 2

R224

R224 1R3F-GP

1R3F-GP

C150

1 2

SC10U10V5ZY-1GP

VCC_SM_CK_MCH_ EMI

C158

SCD1U10V2KX-4GP

C22

SCD1U16V2ZY-2GP

VCC_DMIPEG _MCH

C99

SCD1U16V2ZY-2GP

C98

SC10U10V5ZY-1GP

(R)

C390

C371

SC10U10V5ZY-1GP

(78.10610.51L)

1D05V_S0

1D5V_S3

3D3V_S0

R28

1 2

10R2J-2-GP

C97

TC6

TC6 E820U2D5VM-7-G P

E820U2D5VM-7-G P

SC10U10V5ZY-1GP

LT72

Titl e

Size Document Numbe r Rev

Size Doc ument Number Rev C

C Date: Sheet

Date: Sheet

1D05V_S0

Check

3D3V_DAC

R10

1 2

0R0603-PAD

1D8V_S3

C46

(R)

C205

1D05V_S0

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

1D05V_S0_MCH

HCB2012KF-600T30-GP

CANTIGA(5/7): PWR1

Friday, February 13, 2009

K A

RB751V-40-2-GP

1D05V_S0

L12

Wistron Corporation

21F, 88, Sec . 1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec . 1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bali

3D3V_S0

12 52

PDF created with pdfFactory trial version www.pdffactory.com

-1A

U10G

AP33

1D5V_S3

C436

D D

C C

C436

(R)

SCD1U16V2ZY-2GP

C410

SC10U10V5ZY-1GP

1D5V_S3

TC9

TC9 SE330U2VDM-L-GP

SE330U2VDM-L-GP

(R)

Use (77.C3371.051)

(R)

C419

C432

SCD1U16V2ZY-2GP

C455

C467

(R)

SC10U10V5ZY-1GP

C428

SCD1U16V2ZY-2GP

C449

C438

1 2

SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

1D05V_S0

B B

R477

0R0402-PAD

AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32

AY32

AW32

AV32 AU32

AT32 AR32 AP32 AN32 BH31 BG31

BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29

AY29

AW29

AV29 AU29

AT29 AR29 AP29

BA36 BB24 BD16 BB21

AW16 AW13

AT13

Y26 AE25 AB25 AA25 AE24 AC24 AA24

Y24 AE23 AC23 AB23 AA23

AJ21 AG21 AE21 AC21 AA21

Y21 AH20 AF20 AE20 AC20 AB20 AA20

T17

T16 AM15

AL15

AE15

AJ15 AH15 AG15 AF15 AB15 AA15

Y15 V15 U15

AN14 AM14

U14

T14

1 2

VCC_AXG_SENSE

AJ14

AH14

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC

VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

VCC_AXG_SENSE VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

(71.0GM47.00U)

A A

VCC SMVCC GFX

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

POWER

VCC GFX NCTF

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC SM LF

http://hobi-elektronika.net

1D05V_S0

7 OF 10

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

C58

(R)

VCC_SM_MCH_L F5 VCC_SM_MCH_L F6 VCC_SM_MCH_L F7

C433

1 2

SC1U10V3ZY-6GP

SC10U10V5ZY-1GP

1 2

C391

SC10U6D3V5MX-3GP

VCC_SM_MCH_LF1 VCC_SM_MCH_LF2 VCC_SM_MCH_LF3 VCC_SM_MCH_LF4

C398

SC1U10V3ZY-6GP

C370

C378

1 2

(R)

SCD47U6D3V2KX-GP

C425

SC1U10V3ZY-6GP

C424

SCD22U6D3V2KX-1GP

C379

C408

SCD1U10V2KX-4GP

C397

SCD1U10V2 KX- 4 G P

SCD22U6D3V2KX-1GP

1D05V_S0

U10F

AG34

VCC

AC34

C57

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

SC10U10V5ZY-1GP

AG33

VCC

AF33

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC

CANTIGA-GM-GP-U-NF

(71.0GM47.00U)

LT72

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

VCC CORE

CANTIGA(6/7)-PWR2

C409

C369

C407

SCD1U10V2KX-4GP

C377

(R)

SCD1U16V2ZY-2GP

SCD1U10V2KX-4GP

C417

C431

SCD1U10V2 KX- 4 G P

1D05V_S0

SCD1U10V2KX-4GP

TC1

E820U2D5VM-7-GP

(R)

C369

SCD1U10V2KX-4GP

(78.10610.51L)

6 OF 10

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

POWER

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

VCC NCTF

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

Wistron Corporation

21F, 88, Sec.1,Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1,Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221 , Taiwa n, R.O .C.

Taipei Hsien 221 , Taiwa n, R.O .C.

Bali

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

1D05V_S0

-1

52Friday,February 13, 2009

PDF created with pdfFactory trial version www.pdffactory.com

U10I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

VSS

AD47

VSS

AB47

D D

C C

B B

A A

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP -U-NF

(71.0GM47.00U)

VSS

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

http://hobi-elektronika.net

BG21

L12

AW21

AU21

AP21 AN21 AH21

AF21

AB21

R21 M21

J21

G21

BC20

BA20

AW20

AT20

AJ20 AG20

Y20

N20

K20 F20

C20

A20

BG19

A18 BG17 BC17

AW17

AT17

R17 M17 H17 C17

BA16

AU16 AN16

N16

K16

G16

E16 BG15 AC15

W15

A15 BG14

AA14

C14 BG13 BC13

BA13

AN13

AJ13 AE13

N13

L13

G13

E13 BF12 AV12 AT12

AM12

AA12

J12

A12

BD11 BB11

AY11

AN11 AH11

Y11

N11 G11 C11

BG10

AV10 AT10 AJ10 AE10 AA10

M10 BF9 BC9 AN9

AM9

AD9

B9 BH8 BB8

AV8

AT8

U10J

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

CANTIGA-GM-GP -U-NF

(71.0GM47.00U)

VSS NCTF

VSS SCB

10 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

VSS_SCB VSS_SCB VSS_SCB VSS_SCB VSS_SCB

NC#E1 NC#D2 NC#C3 NC#B4 NC#A5

NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

MCH_VSS_TP1 MCH_VSS_TP2 MCH_VSS_TP3 MCH_VSS_TP4 MCH_VSS_TP5

TP30TP30 TP29TP29 TP10TP10 TP13TP13 TP8TP8

LT72

Title

CANTIGA(7/7): GND

Size Docum ent Number Rev

Size Docum ent Number Rev A3

A3 Date: Sheet

Date: Sheet

Bali

Wistron Corporation

21F, 88, Sec.1,Hsin T ai Wu Rd., Hsichih,

21F, 88, Sec.1,Hsin T ai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

52Friday, F ebruary 13, 2009

-1

PDF created with pdfFactory trial version www.pdffactory.com

www.hobi-elektronika.net

M_A_A[14..0]9

D D

M_A_BS29 M_A_BS09

M_A_BS19

M_A_DQ[63..0]9

C C

B B

-M_A_DQS[7..0]9

DDR_VREF_S3

R613

0R0603-PAD

1 2

A A

C571

1 2

SC1U10V3ZY-6GP

Place caps close to pin1 as possible

M_A_DQS[7..0]9

M_ODT010 M_ODT110

C578

SCD1U16V2ZY-2GP

VRE F_D IMM1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ1 0 M_A_DQ1 1 M_A_DQ1 2 M_A_DQ1 3 M_A_DQ1 4 M_A_DQ1 5 M_A_DQ1 6 M_A_DQ1 7 M_A_DQ1 8 M_A_DQ1 9 M_A_DQ2 0 M_A_DQ2 1 M_A_DQ2 2 M_A_DQ2 3 M_A_DQ2 4 M_A_DQ2 5 M_A_DQ2 6 M_A_DQ2 7 M_A_DQ2 8 M_A_DQ2 9 M_A_DQ3 0 M_A_DQ3 1 M_A_DQ3 2 M_A_DQ3 3 M_A_DQ3 4 M_A_DQ3 5 M_A_DQ3 6 M_A_DQ3 7 M_A_DQ3 8 M_A_DQ3 9 M_A_DQ4 0 M_A_DQ4 1 M_A_DQ4 2 M_A_DQ4 3 M_A_DQ4 4 M_A_DQ4 5 M_A_DQ4 6 M_A_DQ4 7 M_A_DQ4 8 M_A_DQ4 9 M_A_DQ5 0 M_A_DQ5 1 M_A_DQ5 2 M_A_DQ5 3 M_A_DQ5 4 M_A_DQ5 5 M_A_DQ5 6 M_A_DQ5 7 M_A_DQ5 8 M_A_DQ5 9 M_A_DQ6 0 M_A_DQ6 1 M_A_DQ6 2 M_A_DQ6 3

-M_A_DQS0

-M_A_DQS1

-M_A_DQS2

-M_A_DQS3

-M_A_DQS4

-M_A_DQS5

-M_A_DQS6

-M_A_DQS7 M_A_DQS 0

M_A_DQS 1 M_A_DQS 2 M_A_DQS 3 M_A_DQS 4 M_A_DQS 5 M_A_DQS 6 M_A_DQS 7

DIMM1

107

A10/AP

A11

A12/BC#

119

A13

A14

A15

BA2

109

BA0

108

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

DQS0#

DQS1#

DQS2#

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

DQS0

DQS1

DQS2

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

VREFDQ

126

VREFCA

VSS

122

206

GND

NP1

DDR3-204P-6-GP-U1

62.10017.F91

H= 9.2

http://hobi-elektronika.net

110

RAS#

113

WE#

115

CAS#

114

S0#

121

S1#

CKE0

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

M_A_DM0

DM0

M_A_DM1

DM1

M_A_DM2

DM2

M_A_DM3

DM3

M_A_DM4

136

DM4

M_A_DM5

153

DM5

M_A_DM6

170

DM6

M_A_DM7

187

DM7

200

SDA

202

SCL

199

VDDSPD

EVENT# RESET#

NORMAL TYPE

TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

GND

SA0_DIM1

197

SA0

SA1_DIM1

201

SA1

198 30 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 203

VTT

204

VTT

205 NP2

NP2

R615 10KR2J-3-GPR615 10KR2J-3-GP

1 2

R616 10KR2J-3-GPR616 10KR2J-3-GP

1 2

-MEM_TS0 10

C574

-M_A_RAS 9

-M_A_WE 9

-M_A_CAS 9

-M_CS0 10

-M_CS1 10 M_CKE0 10

M_CKE1 10 DDRCLK0_533M 10

-DDRCLK0_533M 10 DDRCLK1_533M 10

-DDRCLK1_533M 10

M_A_DM[7..0] 9

-DRAMRST 10,16

SCD1U16V2ZY-2GP

ICH_SMBDATA 3,16,26,38,39,50 ICH_SMBCLK 3,16,26,38,39,50

VDDSPD_DIMM1

SB 12/20

Place one cap to each power pin and as close as possible

0D75V_S3

C582

C583

C573

1 2

SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

SC1U10V3ZY-6GP

3D3V_S0

C577

SCD1U16V2ZY-2GP

C579

SC10U10V5ZY-1GP

C581

C570

C584

(R)

SC10U10V5ZY-1GP

LT72

Title

Size DocumentNumber Rev

Size DocumentNumber Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

C585

C559

(R)

SCD1U16V2ZY-2GP

DDRIII-SODIMM SLOT1

1D5V_S3

C572

SCD1U16V2ZY-2GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bali -1

C576

SCD1U16V2ZY-2GP

15 52Friday, February 13, 2009

PDF created with pdfFactory trial version www.pdffactory.com

C586

SCD1U16V2ZY-2GP

M_B_A[14..0]9

D D

M_B_BS29 M_B_BS09

M_B_BS19 M_B_DQ[63..0]9

C C

B B

-M_B_DQS[7..0]9

M_B_DQS[7..0]9

DDR_VREF_S3

R599

0R0603-PAD

A A

Place caps closeto pin1 as possible

1 2

0R0603-PAD

C525

SC1U10V3ZY-6GP

M_ODT210 M_ODT310

C528

SCD1U16V2ZY-2GP

VREF_DIMM2

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

M_B_A14

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18

M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

-M_B_DQS0

-M_B_DQS1

-M_B_DQS2

-M_B_DQS3

-M_B_DQS4

-M_B_DQS5

-M_B_DQS6

-M_B_DQS7

M_B_DQS0

M_B_DQS1

M_B_DQS2

M_B_DQS3

M_B_DQS4

M_B_DQS5

M_B_DQS6

M_B_DQS7

check!!!!

DIMM2

107

A10/AP

A11

A12/BC#

119

A13

A14

A15

BA2

109

BA0

108

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

DQS0#

DQS1#

DQS2#

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

DQS0

DQS1

DQS2

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

VREFDQ

126

VREFCA

VSS

122

206

GND

NP1

DDR3-204P-7-GP-U1

http://hobi-elektronika.net

110

RAS#

113

WE#

115

CAS#

114

S0#

121

S1#

CKE0

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

DM0

DM1

DM2

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

199

VDDSPD

197

SA0

201

SA1

198

EVENT#

RESET#

125

TEST

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

VSS

REVERSE TYPE

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

203

VTT

204

VTT

205

GND

NP2

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

SA0_DIM2 SA1_DIM2

R597 10KR2J-3-GPR597 10KR2J-3-GP R598 10KR2J-3-GPR598 10KR2J-3-GP

-M_B_RAS 9

-M_B_CAS 9

DDRCLK2_533M 10

-DDRCLK2_533M 10 DDRCLK3_533M 10

-DDRCLK3_533M 10 M_B_DM[7..0] 9

ICH_SMBDATA 3,15,26,38,39,50 ICH_SMBCLK 3,15,26,38,39,50

1 2 1 2

-MEM_TS1 10

-DRAMRST 10,15

(78.10423.5FL)

-M_B_WE 9

-M_CS2 10

-M_CS3 10

M_CKE2 10 M_CKE3 10

SB 12/20

Place one cap to each power pin and as close as possible

0D75V_S3

C558

SCD1U16V2ZY-2GP

(78.10423.5FL)

C524

SCD1U16V2ZY-2GP

C557

1 2

SC1U10V3ZY-6GP

(78.10521.5BL)

VDDSPD_DIMM2

(R)

C562

C560

SC10U10V5ZY-1GP

(78.10610.51L)

SC10U10V5ZY-1GP

3D3V_S0

C523

SCD1U16V2ZY-2GP

C519

SC10U10V5ZY-1GP

C520

C556

(R)

SC10U10V5ZY-1GP

LT72

Title

DDRIII-SODIMM SLOT2

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

C519

C555

C575

(R)

SCD1U16V2ZY-2GP

WistronCorporation

21F, 88,Sec.1,Hsin Tai Wu Rd.,Hsichih,

21F, 88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien221, Taiwan, R.O.C.

Taipei Hsien221, Taiwan, R.O.C.

Bali -1

1D5V_S3

C553

SCD1U16V2ZY-2GP

16 52Friday,February 13,2009

C522

C521

SCD1U16V2ZY-2GP

PDF created with pdfFactory trial version www.pdffactory.com

SCD1U16V2ZY-2GP

+ 36 hidden pages

Apple BALI Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual