Analog Devices AD5554, AD5544 Datasheet

Quad, Current-Output

57344491524096032768245761638481920 65536

CODE – Decimal

1.0

0.5

0.0

–0.5

–1.0

1.0

0.5

0.0

–0.5

–1.0

1.0

0.5

0.0

–0.5

–1.0

1.0

0.5

0.0

–0.5

–1.0

INL – LSB

DAC A

DAC B

DAC C

DAC D

a

FEATURES
AD5544 16-Bit Resolution
AD5554 14-Bit Resolution
2 mA Full-Scale Current 20%, with V
2 s Settling Time

BIAS for Zero-Scale Error Reduction @ Temp

V

SS

Midscale or Zero-Scale Reset
Four Separate 4Q Multiplying Reference Inputs
SPI-Compatible 3-Wire Interface
Double Buffered Registers Enable
Simultaneous Multichannel Change
Internal Power ON Reset
Compact SSOP-28 Package

APPLICATIONS
Automatic Test Equipment
Instrumentation
Digitally-Controlled Calibration

REF

= 10 V

Serial-Input, 16-Bit/14-Bit DACs

AD5544/AD5554

FUNCTIONAL BLOCK DIAGRAM

V

ABCD

REF

V

DD

RFBA

I

OUT

A

GND

RFBB

I

OUT

A

GND

R

FB

I

OUT

A

GND

R

FB

I

OUT

A

GND

A

GND

A

A

B

B

C

C

C

D

D

D

F

SDO

SDI

CLK

D0
D1
D2
D3
D4
D5
D6
D7
D8

16

D9
D10
D11
D12
D13
D14
D15

A0

A1

CS

EN

DAC A

B
C
D

2:4

DECODE

INPUT

REGISTER

INPUT

REGISTER

INPUT

REGISTER

INPUT

REGISTER

POWER-

ON

RESET

DAC A

REGISTER

R

DAC B

REGISTER

R

DAC C

REGISTER

R

DAC D

REGISTER

R

DAC A

R

DAC B

R

DAC C

R

DAC D

R

AD5544

GENERAL DESCRIPTION

The AD5544/AD5554 quad, 16-/14-bit, current-output, digital­to-analog converters are designed to operate from a single 5 V
supply.

The applied external reference input voltage (V
the full-scale output current. Integrated feedback resistors (R

) determines

REF

FB

)
provide temperature-tracking, full-scale voltage outputs when
combined with an external I-to-V precision amplifier.

A doubled-buffered serial-data interface offers high-speed,
3-wire, SPI- and microcontroller-compatible inputs using
serial-data-in (SDI), clock (CLK), and a chip-select (CS). In
addition, a serial-data-out pin (SDO) allows for daisy-chaining
when multiple packages are used. A common level-sensitive
load-DAC strobe (LDAC) input allows simultaneous update of
all DAC outputs from previously loaded input registers. Addi­tionally, an internal power ON reset forces the output voltage to
zero at system turn ON. An MSB pin allows system reset asser­tion (RS) to force all registers to zero code when MSB = 0, or
to half-scale code when MSB = 1.

AD5544/AD5554 are packaged in the compact SSOP-28.

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

LDACMSBRSDGND

V

SS

Figure 1. AD5544 INL vs. Code Plot (TA = 25°C)

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 2000

AD5544/AD5554–SPECIFICATIONS

AD5544 ELECTRICAL CHARACTERISTICS

(@ VDD = 5 V  10%, VSS = 0 V, I
V

A, B, C, D = 10 V, TA = Full Operating Temperature Range,

REF

unless otherwise noted.)

X = Virtual GND, A

OUT

X = 0 V,

GND

Parameter Symbol Condition Min Typ Max Unit

STATIC PERFORMANCE

Resolution N 1 LSB = V

1

/216 = 153 µV when V

REF

= 10 V 16 Bits

REF

Relative Accuracy INL ±4 LSB
Differential Nonlinearity DNL ±1.5 LSB
Output Leakage Current I

Full-Scale Gain Error G
Full-Scale Tempco

2

Feedback Resistor RFBXV

X Data = 0000H, TA = 25°C10nA

OUT

I

X Data = 0000H, TA = TA Max 20 nA

OUT

FSE

TCV

FS

Data = FFFF

H

±0.75 ±3mV
1 ppm/°C

= 5 V 4 6 8 kΩ

DD

REFERENCE INPUT

X Range V

V

REF

Input Resistance R
Input Resistance Match R
Input Capacitance

2

X –15 +15 V

REF

X468kΩ

REF

X Channel-to-Channel 1 %

REF

C

X5pF

REF

ANALOG OUTPUT

Output Current I
Output Capacitance

2

X Data = FFFF

OUT

C

X Code-Dependent 80 pF

OUT

H

1.25 2.5 mA

LOGIC INPUTS AND OUTPUT

Logic Input Low Voltage V
Logic Input High Voltage V
Input Leakage Current I
Input Capacitance

2

Logic Output Low Voltage V
Logic Output High Voltage V

INTERFACE TIMING

2, 3

Clock Width High t
Clock Width Low t
CS to Clock Setup t
Clock to CS Hold t
Clock to SDO Prop Delay t
Load DAC Pulsewidth t
Data Setup t
Data Hold t
Load Setup t
Load Hold t

IL

IH

IL

C

IL

OL

OH

CH

CL

CSS

CSH

PD

LDAC

DS

DH

LDS

LDH

2.4 V

IOL = 1.6 mA 0.4 V
IOH = 100 µA4V

25 ns
25 ns
0ns
25 ns
220ns
25 ns
20 ns
20 ns
5ns
25 ns

0.8 V

1 µA
10 pF

SUPPLY CHARACTERISTICS

Power Supply Range V
Positive Supply Current I
Negative Supply Current I
Power Dissipation P

DD RANGE

DD

SS

DISS

Logic Inputs = 0 V 50 250 µA
Logic Inputs = 0 V, VSS = –5 V 0.001 1 µA
Logic Inputs = 0 V 1.25 mW

4.5 5.5 V

Power Supply Sensitivity PSS ∆VDD = ±5% 0.006 %/%

NOTES

1

All static performance tests (except I
RFB terminal is tied to the amplifier output. Typical values represent average readings measured at 25 °C.

2

These parameters are guaranteed by design and not subject to production testing.

3

All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.

Specifications subject to change without notice.

) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The AD5544

OUT

–2–

REV. 0

AD5544/AD5554

(@ V

= 5 V  10%, VSS = –300 mV, I

DD

V

A, B, C, D = 10 V, TA = full operating temperature range, unless

AD5544 ELECTRICAL CHARACTERISTICS

REF

otherwise noted.)

Parameter Symbol Condition Min Typ Max Unit

AC CHARACTERISTICS

Output Voltage Settling Time t

Output Voltage Settling Time t

Reference Multiplying BW BW –3 dB V

DAC Glitch Impulse Q V
Feedthrough Error V
Crosstalk Error V

1

S

S

OUT

OUT

X/V
A/V

To ±0.1% of Full Scale, Data = 0000
to FFFF

to 0000

H

H

To ±0.0015% of Full Scale, Data = 0000
to FFFF

REF

C

FB

REF

X Data = 0000H, V

REF

B Data = 0000H, V

REF

to 0000

H

H

X = 100 mV rms, Data = FFFFH, 2 MHz

= 15 pF

X = 10 V, Data 0000H to 8000H to 0000

X = 100 mV rms, f = 100 kHz –65 dB

REF

B = 100 mV rms, –90 dB

REF

H

H

Adjacent Channel, f = 100 kHz

Digital Feedthrough Q CS = 1, and f
Total Harmonic Distortion THD V
Output Spot Noise Voltage e

NOTES

1

All ac characteristic tests are performed in a closed-loop system using an OP42 I-to-V converter amplifier.

Specifications subject to change without notice.

N

= 5 V p-p, Data = FFFFH, f = 1 kHz –90 dB

REF

f = 1 kHz, BW = 1 Hz 7 nV/√Hz

= 1 MHz 5 nV-s

CLK

X = Virtual GND, A

OUT

H

X = 0 V,

GND

1 µs

2 µs

1.2 nV-s

REV. 0

–3–

AD5544/AD5554–SPECIFICATIONS

AD5554 ELECTRICAL CHARACTERISTICS

= 5 V  10%, VSS = 0 V, I

DD

V

A, B, C, D = 10 V, TA = full operating temperature range,

REF

unless otherwise noted.)

X = Virtual GND, A

OUT

GND

X = 0 V,

(@ V

Parameter Symbol Condition Min Typ Max Unit

STATIC PERFORMANCE

Resolution N 1 LSB = V

1

/214 = 610 µV when V

REF

= 10 V 14 Bits

REF

Relative Accuracy INL ±1 LSB
Differential Nonlinearity DNL ±1 LSB
Output Leakage Current I

Full-Scale Gain Error G
Full-Scale Tempco

2

Feedback Resistor RFBXV

X Data = 0000H, TA = 25°C10nA

OUT

I

X Data = 0000H, TA = TA Max 20 nA

OUT

FSE

TCV

FS

Data = 3FFF

H

±2 ±10 mV
1 ppm/°C

= 5 V 4 6 8 kΩ

DD

REFERENCE INPUT

V

X Range V

REF

Input Resistance R
Input Resistance Match R
Input Capacitance

2

X –15 +15 V

REF

X468kΩ

REF

X Channel-to-Channel 1 %

REF

C

X5pF

REF

ANALOG OUTPUT

Output Current I
Output Capacitance

2

X Data = 3FFF

OUT

C

X Code-Dependent 80 pF

OUT

H

1.25 2.5 mA

LOGIC INPUTS AND OUTPUT

Logic Input Low Voltage V
Logic Input High Voltage V
Input Leakage Current I
Input Capacitance

2

Logic Output Low Voltage V
Logic Output High Voltage V

INTERFACE TIMING

2, 3

Clock Width High t
Clock Width Low t
CS to Clock Setup t
Clock to CS Hold t
Clock to SDO Prop Delay t
Load DAC Pulsewidth t
Data Setup t
Data Hold t
Load Setup t
Load Hold t

IL

IH

IL

C

IL

OL

OH

CH

CL

CSS

CSH

PD

LDAC

DS

DH

LDS

LDH

2.4 V

I

= 1.6 mA 0.4 V

OL

I

= 100 µA4V

OH

25 ns
25 ns
0ns
25 ns
220ns
25 ns
20 ns
20 ns
5ns
25 ns

0.8 V

1 µA
10 pF

SUPPLY CHARACTERISTICS

Power Supply Range V
Positive Supply Current I
Negative Supply Current I
Power Dissipation P

DD RANGE

DD

SS

DISS

Logic Inputs = 0 V 50 250 µA
Logic Inputs = 0 V, VSS = –5 V 0.001 1 µA
Logic Inputs = 0 V 1.25 mW

4.5 5.5 V

Power Supply Sensitivity PSS ∆VDD = ±5% 0.006 %/%

NOTES:

1

All static performance tests (except I
RFB terminal is tied to the amplifier output. Typical values represent average readings measured at 25 °C.

2

These parameters are guaranteed by design and not subject to production testing.

3

All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.

Specifications subject to change without notice.

) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The AD5554

OUT

–4–

REV. 0

AD5544/AD5554

WARNING!

ESD SENSITIVE DEVICE

(@ V

= 5 V  10%, VSS = –300 mV, I

DD

B, C, D = 10 V, TA = full operating temperature range, unless otherwise

AD5554 ELECTRICAL CHARACTERISTICS

noted.)

Parameter Symbol Condition Min Typ Max Unit

AC CHARACTERISTICS

Output Voltage Settling Time t

Output Voltage Settling Time t

Reference Multiplying BW BW –3 dB V
DAC Glitch Impulse Q V
Feedthrough Error V
Crosstalk Error V

1

S

S

OUT

OUT

X/V
A/V

To ±0.1% of Full Scale, Data = 0000
to 3FFF

to 0000

H

H

To ±0.0015% of Full Scale, Data = 0000
to 3FFF

REF

REF

X Data = 0000H, V

REF

B Data = 0000H, V

REF

to 0000

H

H

X = 100 mV rms, Data = 3FFFH, CFB = 15 pF 2 MHz
X = 10 V, Data 0000H to 2000H to 0000

X = 100 mV rms, f = 100 kHz –65 dB

REF

B = 100 mV rms,

REF

H

H

Adjacent Channel, f = 100 kHz –90 dB

Digital Feedthrough Q CS = 1, and f
Total Harmonic Distortion THD V
Output Spot Noise Voltage e

NOTES:

1

All ac characteristic tests are performed in a closed-loop system using an OP42 I-to-V converter amplifier.

Specifications subject to change without notice.

N

= 5 V p-p, Data = 3FFFH, f = 1 kHz –90 dB

REF

f = 1 kHz, BW = 1 Hz 7 nV/√Hz

= 1 MHz 5 nV-s

CLK

X = Virtual GND, A

OUT

H

X = 0 V, V

GND

1 µs

2 µs

1.2 nV-s

REF

A,

ABSOLUTE MAXIMUM RATINGS*

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +8 V

V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, –7 V

SS

V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V, +18 V

REF

Logic Inputs and Output to GND . . . . . . . . . . . . –0.3 V, +8 V

) to GND . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V

V(I

OUT

A

X to DGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V, + 0.3 V

GND

Input Current to Any Pin Except Supplies . . . . . . . . . ±50 mA

Package Power Dissipation . . . . . . . . . . . . (T

Thermal Resistance θ

JA

MAX – TA)/θ

J

28-Lead Shrink Surface-Mount (RS-28) . . . . . . . . 100°C/W

Maximum Junction Temperature (T

MAX) . . . . . . . . . 150°C

J

Operating Temperature Range

Model A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature:

RS-28 (Vapor Phase, 60 secs) . . . . . . . . . . . . . . . . . . 215°C

RS-28 (Infrared, 15 secs) . . . . . . . . . . . . . . . . . . . . . . 220°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational

JA

sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

ORDERING GUIDE

RES INL DNL Temperature Package Package

Model Bit LSB LSB Range Description Option

AD5544ARS 16 ± 4 ± 1.5 –40/+85°C SSOP-28 RS-28
AD5554BRS 14 ± 1 ± 1 – 40/+85°C SSOP-28 RS-28

The AD5544/AD5554 contain 4196 transistors. The die size is 122 mil × 204 mil.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD5544/AD5554 features proprietary ESD protection circuitry, permanent damage may occur
on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.

REV. 0

–5–