CNTL Unit ......................................................................................................................................................................17
AF Unit ............................................................................................................................................................................ 35
RF Unit ............................................................................................................................................................................51
VCO Unit ........................................................................................................................................................................ 73
Specifications
General
Frequency Ranges:
Channel Steps:
Frequency Stability:
Repeater Shift (default):
Emission Type:
Antenna Impedance:
Supply Voltage:
Current Consumption:
Operating Temperature:
Case Size:
Weight:
Transmitter
RF Power Output:
Modulation Type:
Maximum Deviation:
Spurious Emission:
Microphone Impedance:
The VX-5R internal assembly consists of the RF Unit,
Control (CNTL) Unit, and the AF Unit. The RF Unit con-
tains the receiver front end, PLL IC, power and switching
circuits, and the VCO Unit for transmit and receive local
signal oscillation. The CNTL Unit contains the CPU and
audio ICs, as well as the power circuitry for the LCD. The
AF Unit contains the IF, plus audio ICs.
Receiver Signal Flow
The VX-5R includes five receiver front ends, each opti-
mized for a particular frequency range and mode combi-
nation.
(1) Triplexer
Signals between 0.5 and 540 MHz received at the anten-
na terminal pass through an input low-pass filter com-
posed of L3059, L3060, C3176, and C3175.
Received 430 MHz signals then pass through a low-pass
filter, CF3002 (GLP9-450M), to the UHF T/R switch circuit composed of diode switch D3034 (RLS135), D3038
(1SV307), and D3041 (1SV271).
Received 145 MHz signals, after passing through the first
low-pass filter, are passed through low-pass filter CF3003
(GLP8-148M) to the VHF T/R switch circuit, composed of
diode switch D3035 (RLS135), D3039 (1SV307), D3043
(1SV271), and Q3055 (DTC143ZE).
On the 6-meter band, the 50 MHz signals, after passing
through the first low-pass filter, are passed through low-
pass filter L3055, C3164, C3169, and C3163 to the 50 MHz
T/R switch circuit composed of diode switches D3036
(RLS135) and D3040 (1SV307).
(2) 145 MHz Band Reception
Received signals between 140 and 150 MHz pass
through the Triplexer circuit, VHF T/R switch circuit, pro-
tector diode D3003 (1SS362), and 1st VHF band switch
D3010 (DAN235E) before additional filtering by a band-
pass filter consisting of C3023, L3010, and C3032. The sig-
nals are then applied to RF amplifier Q3013 (2SC5374).
The amplified RF signal is band-pass filtered by CF3001
(LFB30N11B0146B010PT) and applied through the 2nd
VHF band switch circuit D3025 (DAN235E) to the first
mixer, Q3020 (2SC5374).
Meanwhile, VHF output from pin 5 of the VCO Unit is
amplified by Q3023 (2SC5374) and applied through diode T/R switch D3030 (DAN222) to mixer Q3020 as the
first local signal.
The 47.25 MHz intermediate frequency product of the
mixer is delivered to the AF Unit.
(3) 435 MHz Band and 222 ~ 540 MHz Reception
Received signals between 430 and 450 MHz pass
through the Triplexer circuit, UHF T/R switch circuit, pro-
tector diode D3002 (1SS362), and a variable band-pass
filter composed of L3006, D3008 (HVC358B), and C3017
before application to RF amplifier Q3007 (2SC5374).
The amplified RF signal is then filtered by a two-stage
variable band-pass filter composed of L3014, D3012
(HVC358B), C3040, C3044, D3015 (HVC358B), C3054, and
L3020, then further amplified by Q3016 (2SC5374). The
output of Q3016 is applied to a variable band pass filter
composed of L3029, D3024 (HVC358B), and C3079 so that
only signals within the desired frequency range are deliv-
ered to the first mixer, Q3019 (2SC5374).
Meanwhile, UHF output from pin 2 of the VCO Unit is
amplified by Q3022 (2SC5374) and applied through diode T/R switch D3032 (HN2D01FU) to mixer Q3019 as the
“430 Local” first local signal. The 47.25 MHz intermedi-
ate frequency product of the mixer is delivered to the AF
Unit.
The “TUNE” voltage from the CPU on the CNTL Unit
is amplified by DC amplifier Q3056 (TC75S51F) and ap-
plied to varactors D3008, D3012, D3015, and D3024 in the
variable frequency band-pass filters. By changing the elec-
trostatic capacitance of the varactors, optimum filter char-
acteristics are provided for each specific operating fre-
quency.
(4) 50 MHz Band and 47 ~ 76 MHz Reception
Received signals between 50 and 54 MHz pass through
the Triplexer circuit, T/R switch circuit, protector diode
D3004 (1SS362), and a variable band-pass filter composed
of L3007, C3015, C3021, L3009, and C3025 before applica-
tion to RF amplifier Q3009 (2SC4400).
The amplified RF signal is then filtered by a two-stage
variable band-pass filter composed of L3017, D3013
(HVC300A), C3047, C3048, D3016 (HVC300A), C3055, and
L3021, then further amplified by Q3009, so that only sig-
nals within the desired frequency range are delivered to
the first mixer, Q3017 (2SC4400).
Meanwhile, 50 MHz output from pin 7 of the VCO Unit
is amplified by Q3024 (2SC5374) and applied through
diode T/R switch D3046 (DAN222) to mixer Q3017 as the
“50 Local” first local signal. The 47.25 MHz intermediate
frequency product of the mixer is delivered to the AF Unit.
The “TUNE” voltage from the CPU on the CNTL Unit
is amplified by DC amplifier Q3056 (TC75S51F) and ap-
plied to varactors D3013 and D3016 in the variable fre-
7
Circuit Description
quency band-pass filters. By changing the electrostatic
capacitance of the varactors, optimum filter characteris-
tics are provided for each specific operating frequency.
(5) 0.5 ~ 16 MHz Reception
Received signals in the MF and HF bands pass through
the Triplexer circuit, T/R switch circuit, and protector di-
ode D3004 (1SS362), then they flow to the AF Unit.
The RF signal is then filtered by a low-pass filter com-
posed of L2014 and C2018 (0.5 ~ 1.8 MHz) or a high-pass
filter composed of C2109 and L2016 (1.8 ~ 16 MHz), then
further amplified by Q2025 (FC119), so that only signals
within the desired frequency range are delivered to the
first mixer, Q2026 (2SC4400).
Meanwhile, 50 MHz output from pin 7 of the VCO Unit
is amplified by Q3024 (2SC5374) and applied through
diode T/R switch D3046 (DAN222) to mixer Q2026 as the
“BC Local” first local signal. The 47.25 MHz intermediate
frequency product of the mixer is delivered to pin 24 of
“Narrow IF” IC Q2005.
(6) 76 ~ 222 MHz Reception
Received signals between 76 and 140 MHz or 150 to 222
MHz pass through the Triplexer circuit, VHF T/R switch
circuit, protector diode D3003 (1SS362), and 1st VHF
band switch D3010 (DAN235E) before additional filter-
ing by a band-pass filter composed of C3024, L3007, and
C3033 prior to application to RF amplifier Q3011
(2SC5374).
The amplified RF signal is then filtered by a variable
band-pass filter composed of D3018, D3019 (HVC362´2),
L3023, D3021 (1T412), C3068, L3026, D3022, and D3023
(HVC362). The output of D3023 is applied to a variable
band pass filter so that only signals within the desired
frequency range are delivered to the first mixer, Q3020
(2SC5374).
Meanwhile, VHF output from pin 5 of the VCO Unit is
amplified by Q3023 (2SC5374) and applied through diode T/R switch D3030 (DAN222) to mixer Q3020 as the
first local signal.
The 45.8 MHz intermediate frequency product of the
mixer is delivered to the AF Unit.
(7) 540 ~ 800 MHz Reception
Received signals between 540 and 800 MHz are high-
pass filtered by C3001, L3003, C3007, L3005, C3014, and
L3008, and then passed through high-band diode switch
D3009 (HSC277) before application to high-band RF amplifier Q3010 (2SC5277). The amplified RF signal is then
8
filtered by a variable band-pass filter composed of D3018,
D3019 (HVC362´2), L3023, D3021 (1T412), C3068, L3026,
D3022, and D3023 (HVC362´2). The output of the filter
is applied to first mixer Q3018 (2SC5277), along with the
800 Local first local signal derived from UHF OUT pin 2
of the VCO Unit, which was amplified by Q3022
(2SC5374) and applied through diode T/R switch D3032.
The 47.25 MHz intermediate frequency product of the
mixer is delivered to the AF Unit.
(8) 47.25 MHz First Intermediate Frequency
The 47.25 MHz first intermediate frequency from the
first mixers is delivered from the RF Unit to the AF Unit
through jacks J3002 and J2002. On the AF Unit, the IF for
AM and FM-narrow signals is passed through NAR/WIDE
switch D2001 (DAP222) and 47.25 MHz monolithic crystal filter XF2001 to Narrow-IF amplifier Q2002 (2SC4400)
for input to pin 24 of Narrow IF IC Q2005 (TK10930V)
after amplitude limiting by D2003 (DA221).
Meanwhile, a portion of the output of reference oscilla-
tor Q2018 (2SC4617) and 11.7 MHz crystal X2001 is multiplied fourfold by Q2013 (2SC4400) to provide the 46.8
MHz second local signal, which is applied to the Narrow-
IF IC. Within the IC, this signal is mixed with the 47.25
MHz first intermediate frequency signal to produce the
450 kHz second intermediate frequency.
This second IF is filtered by ceramic filter CF2001
(CFWM450F) and amplified by the limiting amplifier
within the Narrow IF IC before quadrature detection by
ceramic discriminator CD2001 (CDBM450C7).
Demodulated audio exits from pin 12 of the Narrow IF
IC through Narrow-IF mute analog switch Q2010
(HN1J02FU) and squelch gate Q2020 (2SJ144GR) before
de-emphasis at Q2011 (UMX3N).
The resulting audio is amplified by AF amplifier Q2019
(TDA7233D) and passed through MIC/EAR jack J2003 to
the internal speaker, SP1001, or an external earphone.
(9) Squelch Control
Signal components in the neighborhood of 15 kHz con-
tained in the discriminator output pass through an active
band-pass filter composed of R2019, R2021, R2014, C2025,
and C2029, as well as the operational amplifier between
pins 19 and 20 within Narrow-IF IC Q2005. They are then
rectified by D2002 (DA221) to obtain a DC voltage corre-
sponding to the level of noise. This voltage is applied to
pin 99 of CPU Q1003 (HD6473877UX), which compares
the input voltage with a previously set threshold. When
Circuit Description
the input voltage drops below the threshold, normally due
to the presence of a carrier, squelch gate Q2020
(2SJ144GR) turns on, allowing any demodulated audio
to pass. At the same time, pin 73 of the CPU goes high,
causing the green side of BUSY/TX lamp D2011
(BRPG1211C) to light up.
Transmitter Signal Flow
(1) Modulation
Voice signal input from either built-in microphone
MC1001 (EM-140) on the CNTL Unit or external jack J2003
on the AF Unit is pre-emphasized by C1012 and R1010,
and processed by microphone amplifier Q1014-4
(NJM3403AV) and IDC (instantaneous deviation control)
circuit Q1014-1 to prevent over-modulation, then fed
through an active low-pass filter at Q1014-2.
During CTCSS operation, the voice signal is mixed with
the “TONE ENC” subaudible tone signal from pin 90 of
the CPU and delivered to the RF Unit through jacks J1001
and J3002. During DTMF operation, the DTMF tones from
pin 91 of the CPU are passed to the IDC stage.
(2) 145 MHz Band Transmission
Modulating audio from the CNTL Unit passes through
deviation-setting potentiometer VR1002 to “VHF MOD”
pin 4 of the VCO Unit, which is mounted on the RF Unit.
This signal is applied to varactor D4004 (HVC358B) in the
tank circuit of VHF VCO Q4004 (2SC5374), which oscil-
lates at the desired VHF transmitting frequency. The mod-
ulated VCO signal is buffered by amplifier Q4006
(2SC5374) and Q3023, and delivered through VHF T/R
diode switch D3030 to the RF Unit. The modulated low-
level VHF transmit signal from the VCO is passed through
diode switch D3029 (DAN222) to amplifier Q3027
(2SC5374). The modulated VHF transmit signal from the
VCO is amplified by Q3034 (2SK3074) and RF power amplifier Q3039 (2SK3075) up to 0.1, 0.5, or 5 W (depending
on the power level selected by the operator). The RF out-
put passes through TX diode switch D3035 to low-pass
filter CF3003, to suppress harmonics and spurious prod-
ucts before delivery to the antenna at the antenna termi-
nal.
(3) 145 MHz Band Transmit/Receive Switching
Closing PTT switch S1002 on the CNTL Unit pulls the
base of Q1001 (DTA144EE) low, causing the collector to
go high. This signal is passed to pin 39 (“PTT”) of CPU
Q1003, allowing the CPU to recognize that the PTT switch
has been pushed. When the CPU detects closure of the
PTT switch, pin 13 (“TX”) goes high. This control signal is
delivered to the RF Unit, where it switches Q3054 (UMW1)
and Q3051 (CPH6102) to produce the “TX” control signal
that activates Q3031 (2SA1774). At the same time, PLL
division data is sent to PLL IC Q3021 (FQ7925) from the
CPU, and “RX” pin 4 goes low, to disable the receiver
power saver. Also, Q3041 (UMD6N) is switched so as to
disable the receiver circuits. The red side of the BUSY/TX
lamp D2011 also lights up.
(4) 435 MHz Band Transmission
Modulating audio from the CNTL Unit passes through
deviation-setting potentiometer VR1003 to “VHF MOD”
pin 2 of the VCO Unit, which is mounted on the RF Unit.
This signal is applied to varactor D4001 (HVC355B) in
the tank circuit of UHF VCO Q4002 (2SC5374), which
oscillates at the desired UHF transmitting frequency. The
modulated VCO signal is buffered by amplifier Q4006
(2SC5374) and Q3022, and delivered through UHF T/R
diode switch D3032 to the RF Unit. The modulated low-
level UHF transmit signal from the VCO is passed through
diode switch D3029 (DAN222) to amplifier Q3027
(2SC5374), then amplified by driver Q3034 (2SK3074)
and RF power amplifier Q3039 (2SK3075) up to 0.1, 0.5
or 4.5 W (depending on the power level selected by the
operator). The RF output passes through TX diode switch
D3034 and low-pass filtered at CF3002 to suppress har-
monics and spurious products before delivery to the an-
tenna at the antenna terminal.
(5) 435 MHz Band Transmit/Receive Switching
Closing “PTT” switch S1002 on the CNTL Unit pulls
the base of Q1001 (DTA144EE) low, causing the collector
to go high. This signal is passed to pin 39 (“PTT”) of CPU
Q1003, allowing the CPU to recognize that the PTT switch
has been pushed. When the CPU detects closure of the
PTT switch, pin 13 (“TX”) goes high. This control signal is
delivered to the RF Unit, where it switches Q3054 (UMW1)
and Q3051 (CPH6102) to produce the “TX” control signal
that activates Q3032 (2SA1774). At the same time, PLL
division data is sent to PLL IC Q3021 (FQ7925) from the
CPU, and “RX” pin 4 goes low, to (A) disable the receiver
power saver and (B) switch Q3041 (UMD6N) to disable
the receiver circuits. The red side of BUSY/TX lamp D2011
lights up under this condition.
9
Circuit Description
(6) 50 MHz Band Transmission
Modulating audio from the CNTL Unit passes through
deviation-setting potentiometer VR1001 to “50 MHz
MOD” pin 6 of the VCO Unit, which is mounted on the
RF Unit. This signal is applied to varactors D4007 and
D4008 (HVC300A´2) in the tank circuit of VHF VCO
Q4005 (2SC5374), which oscillates at the desired 50 MHz
transmitting frequency. The modulated VCO signal is buff-
ered by amplifier Q4006 (2SC5374) and Q3024, and delivered through 50 MHz T/R diode switch D3033 (1SS355)
to the RF Unit. The modulated low-level 50 MHz trans-
mit signal from the VCO is passed through diode switch
D3033 to amplifier Q3029 (2SC5374), then amplified by
RF power amplifier Q3039 (2SK3075) up to 0.1, 0.5 or 5
W (depending on the power level selected by the opera-
tor). The RF output passes through TX diode switch D3036
and low-pass filtered by L3055, C3164, C3169, and C3163
to suppress harmonics and spurious products before de-
livery to the antenna at the antenna terminal.
(7) 50 MHz Band Transmit/Receive Switching
Closing “PTT” switch S1002 on the CNTL Unit pulls
the base of Q1001 (DTA144EE) low, causing the collector
to go high. This signal is passed to pin 39 (“PTT”) of CPU
Q1003, allowing the CPU to recognize that the PTT switch
has been pushed. When the CPU detects closure of the
PTT switch, pin 13 (“TX”) goes high. This control signal is
delivered to the RF Unit, where it switches Q3054 (UMW1)
and Q3051 (CPH6102) to produce the TX control signal
that activates Q3030 (2SA1774). At the same time, PLL
division data is sent to PLL IC Q3021 (FQ7925) from the
CPU, and “RX” pin 4 goes low, to (A) disable the receiver
power saver and (B) switch Q3041 (UMD6N) to disable
the receiver circuits. The red side of BUSY/TX lamp D2011
lights up under this condition.
PLL Frequency Synthesizer
PLL IC Q3021 on the RF Unit consists of a data shift
register, reference frequency divider, phase comparator,
charge pump, intermittent operation control circuit, and
band selector switch. Serial PLL data from the CPU is con-
verted into parallel data by the shift register in the PLL IC
and is latched into the comparative frequency divider and
reference frequency divider to set a frequency dividing
ratio for each. An 11.7 MHz reference signal produced by
X2001 and Q2018 (2SC4617) on the AF Unit is sent to
“REF” pin 12 of the PLL IC. The internal reference fre-
quency divider divides the 11.7 MHz reference by 2,050
(or 1,640) to obtain a reference frequency of 5 kHz (or 6.25
kHz), which is applied to the phase comparator. Mean-
while, a sample of the output of VHF VCO Q4004
(2SC5374), UHF VCO Q4002 (2SC5374), or 50 MHz VCO
Q4005 (2SC5374) is buffered by Q4006 (2SC5374), then
passed to pin 8 of the PLL IC, where it is frequency-divid-
ed by the internal comparative frequency divider to pro-
duce a comparative frequency which is applied to the
phase comparator. The phase comparator compares the
phase between the reference frequency and comparative
frequency, producing an output pulse corresponding to
the phase difference between them. This pulse is sent to
the charge pump, and the output from the charge pump
passes through a loop filter composed of L3034, R3079,
C3097, and either R3084, C3104, R3088, and C3109 for
VHF, or R3083, C3103, R3087 and C3108 for UHF, or
C3099, R3085, C3105, R3089 and C3110 for 50 MHz, which
convert the pulse into a corresponding smoothed varac-
tor control voltage (VCV). The VCV is applied to varactor
D4004 in the VHF VCO tank circuit, or to varactor D4001
in the UHF VCO tank circuit, or to varactors D4007 and
D4008 in the 50 MHz VCO, to eliminate phase difference
between the reference frequency and comparative frequen-
cy, thereby locking the VCO oscillation frequency to the
reference crystal. The VCO frequency is determined by
the frequency dividing ratio sent from the CPU to the PLL
IC. During receiver power save operation, the PLL circuit
operates intermittently to reduce current consumption,
and the “intermittent operation control” circuit reduces
the lock-up time in this mode of operation.
10
Alignment
Introduction
The VX-5R is carefully aligned at the factory for the spec-
ified performance across the amateur band. Realignment
should therefore not be necessary except in the event of a
component failure. If a sudden problem occurs during
normal operation, it is likely due to component failure;
realignment should not be done until after the faulty com-
ponent has been replaced.
The following procedures cover the adjustments that are
not normally required once the transceiver has left the
factory. However, if damage occurs and some parts sub-
sequently are replaced, realignment may be required.
We recommend that servicing be performed only by au-
thorized VERTEX STANDARD service technicians who
are experienced with the circuitry and fully equipped for
repair and alignment. If a fault is suspected, contact the
dealer from whom the transceiver was purchased for in-