NB520
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
138Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
138Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
138Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Intel Cedar Trail Processor/ Tiger point
Schematics Document
LA-6859P REV:1.0
Compal Confidential
2011-11-07
Cougar 2.0
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
238Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
238Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
238Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Touch Pad
page 21
Compal Confidential
Int.KBD
page 26
DMI x 2
Intel Cedarview 2 Core
1.86GHz (6.5W)
Low Power Clock Generator
RTM890N-397
page 25
Fan Control
204pin DDRIII-SO-DIMM
SPI ROM 128KB
1.5V DDRIII 1066MHz
page 6,7,8
page 27
HDA Codec
page 9
Memory BUS(DDRIII)
page 26
Tiger Pointer
page 10
page 11,12,13,14
page 27
ENE KB930 E0
LED Conn.
Model Name : Cougar 2.0
page 17
page 20
SATA HDD
(22x22mm)
5V 1.5GHz(150MB/s)
SATA port 0
HD Audio
3.3V 24.576MHz/48Mhz
PCIe 1x [2]
LPC BUS
3.3V 33 MHz
USB
5V 480MHz
RJ45
page 23
page 23
PCIe 1x
PCIe port 1
page 15
USB
5V 480MHz
1.5V 2.5GHz(250MB/s)
1.5V 2.5GHz(250MB/s)
USB port 0,1,4
USB Conn X3
Power Circuit DC/DC
page 28
RTC CKT.
page 13
page 29~35
DC/DC Interface CKT.
HP CONN SPK CONNMIC CONNMIC CONN
Int.
PCIeMini Card
WWAN
PCIeMini Card
WLAN +BT COMBO
USB port 5
PCIe port 2
page 18
page 18
USB port 7
page 17
Int. Camera
CRT Conn.
(17x17mm)
Power/B
page 27
page 19
page 21 page 22 page 22 page 22
LVDS
ONE CHANNEL
Card Reader Conn.
page 24
RTL8105E
10/100 LAN
ALC269
(10A 1X) (10B 2X)
(FULL)
(HALF)
USB
Card Reader
RTL5137
USB port 3
page 24
page 26
SPI ROM
2MB
RGB
PCIe port 3
USB port 6
page 16
HDMI Conn.
HDMI
5V 480MHz
Project Code : QBU00
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
338Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
338Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
338Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
ON
SLP_S3#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ONON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOWLOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGHHIGHHIGH
LOW
LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATE
SIGNAL
Address
1001 010X b0001 011X b
1010 000Xb
DDR DIMMA
1101 001Xb
NM10 SM Bus address
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Address
Address
Clock Generator
(SLG8SP556VTR)
Device
EMC1402
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
ON OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator
+1.5VS
+1.5V
+3VALW
1.5V power rail for DDR
3.3V always on power rail
ON OFF
1.5V switched power rail
+CPU_CORE
ON ON ON ON
G3
OFF
OFF
OFF
OFF
OFF
OFF
ONON ON
Voltage Rails
VIN
B+
+1.05VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
ON OFF OFF
S1 S3 S5
ON OFF
ON OFF
Power Plane Description
OFF
OFF
ON
ON ON ON OFF
ON
+1.8VS 1.8VS switched power rail
VCCP switched power rail
OFF
OFF
OFF
BTO Option Table
Function
BTO
explain
Mini PCI-E SLOT
description
WLAN@
Wi-Fi WWAN
WWAN@
3G
3G@
+GFX_CORE GFX support voltage OFFON OFF OFF
Clock gen
Tpye
low@ normal@
WWAN/WLAN
+3VS
+5VALW 5V always on power rail
3.3V switched power rail
OFF
OFF
OFF
OFFON
OFFON
+3V_LAN 3.3V power rail for LAN ON
ON
ON OFF
3.3V power rail for LAN ON
OFF
+3V_WLAN
+RTCVCC RTC power
+5VS 5V switched power rail
+VSB VSB always on power rail ON
ON
ON
ON
OFF
OFF OFF
ON
OFF
ON
ON
ON
Display
CRT HDMI
CRT@ HDMI@
+3VS_PRIME 3.3V power rail for CPU and PCH
ON
OFF OFF OFFON
OFF
OFF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
438Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
438Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
438Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
538Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
538Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
538Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
B+
TPS51125ARGER
+3VALWP +-5%
DESIGN CURRENT 522mA
+5VALWP +-5%
DESIGN CURRENT 300mA
SY8033BDBC +1.05VSP +-5%
DESIGN CURRENT 3489mA
RT8165BGQW
+CPU_COREP
DESIGN CURRENT 4500mA
VR_ON
G5603RU1U
+1.5VP +-5%
DESIGN CURRENT 2270mA
SYSON
SUSP#
N-CHANNEL
SI7326DN
SUSP
+5VS
DESIGN CURRENT 2286mA
N-CHANNEL
SI7326DN
+3VS
DESIGN CURRENT 5586mA
G2992F1U
SUSP
+0.75VSP
DESIGN CURRENT 500mA
P-CHANNEL
AO3413
+LCD_VDD
DESIGN CURRENT 2000mA
ENVDD
DESIGN CURRENT 2112mA
+1.5VSP
DESIGN CURRENT 250mA
+3V_LAN
WOL_EN#
** P-CHANNEL
AO3413
** The SW just is reserved.
The power passes by jump or
0-ohm resistor.
Cougar Power Map
Ipeak=3.98A, Imax=2.8A
Ipeak=6.97A, Imax=4.88A
Ipeak=1.308A, Imax=4A
Ipeak=19.6A, Imax=13.72A
SI7326DN
SUSP#
DESIGN CURRENT 3010mA
Imax=3.5A
SUSP
+GFX_COREP
+3VS_PRIME
DESIGN CURRENT 294mA
VGATE#
N-CHANNEL
SI7326DN
DESIGN CURRENT 2000mA
APL5930KA
VGATE
+1.8VS
DESIGN CURRENT 151mA
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_REF1P5DMI_IRCOMP
DMI_RXP0_C
DMI_RXN0_C
DMI_RXP1_C
DMI_RXN1_C
DMI_RXP0_C
DMI_RXN0_C
DMI_RXP1_C
DMI_RXN1_C
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5
DDR_A_MA6
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
SMPWROK
SYSON#
SMPWROK
DDR_VREF
DDR_DQPU
DDR_ODTPU
DDR_ODTPU
DDR_CMDPU
DDR_CMDPU
DDR_DQPU
DDR_A_DM0
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM6
DDR_A_DM7
DDR_A_DM5
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#1
DDR_A_DQS#7
DDR_A_DQS#6
DDR_A_DQS#5
DDR_A_DQS#4
DDR_A_DQS#3
DDR_A_DM1
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
CLK_CPU_MPLL
CLK_CPU_MPLL#
DDR_CS2#
DDR_CS3#
DDR_CKE2
DDR_CKE3
M_ODT2
M_ODT3
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR3
M_CLK_DDR#3
PCH_POK_RDRAM_VR_PWRGD
DRAM_VR_PWRGD
DMI_REF1P5
DDR_A_MA15
DDR_VREF
DMI_TXP0 <12>
DMI_TXN0 <12>
DMI_TXP1 <12>
DMI_TXN1 <12>
DMI_RXN0<12>
DMI_RXP1<12>
DMI_RXN1<12>
DMI_RXP0<12>
DDR_A_MA[0..15]<10>
DDR_A_WE#<10>
DDR_A_CAS#<10>
DDR_A_RAS#<10>
DDR_A_BS0<10>
DDR_A_BS1<10>
DDR_A_BS2<10>
SYSON#<28>
SM_PWROK<33>
DRAMRST#<10>
DDR_A_DQS#[0..7]<10>
DDR_A_DQS[0..7]<10>
DDR_A_DM[0..7]<10>
DDR_A_D[0..63]<10>
CLK_CPU_MPLL_C<9>
CLK_CPU_MPLL#_C<9>
DDR_CS2#<10>
DDR_CS3#<10>
DDR_CKE2<10>
DDR_CKE3<10>
M_ODT2<10>
M_ODT3<10>
M_CLK_DDR2<10>
M_CLK_DDR#2<10>
M_CLK_DDR3<10>
M_CLK_DDR#3<10>
XDP_DBREST#<7>
PCH_POK<13>
CLK_CPU_EXP#<9>
CLK_CPU_EXP<9>
+1.5VS
+5VALW +1.5V
+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
638Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
638Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
638Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
+1.5V pull up must be placed
within 500 mils from Cedarview
+1.5V pull up must be placed
within 500 mils from Cedarview
2010.07.12 RF request
C204
68P_0402_50V8J
C204
68P_0402_50V8J
1
2
T2T2
R966
0_0402_5%
@
R966
0_0402_5%
@
1 2
C952 0.01U_0402_16V7K
@
C952 0.01U_0402_16V7K
@
1
2
C1088
1U_0402_6.3V6K
C1088
1U_0402_6.3V6K
1
2
R504
1K_0402_1%
R504
1K_0402_1%
12
R500
1K_0402_1%
R500
1K_0402_1%
12
U1
QB0Y B2 1.86G
N2800@
U1
QB0Y B2 1.86G
N2800@
G
D
S
Q37
2N7002_SOT23
G
D
S
Q37
2N7002_SOT23
2
13
C953
0.1U_0402_16V4Z
C953
0.1U_0402_16V4Z
1
2
R969
10K_0402_5%
R969
10K_0402_5%
1 2
R881
0_0402_5%
R881
0_0402_5%
1 2
T1T1
C1065
0.1U_0402_16V4Z
C1065
0.1U_0402_16V4Z
1
2
R892 0_0402_5%R892 0_0402_5%
1 2
C949
0.1U_0402_10V6K
C949
0.1U_0402_10V6K
1 2
R493
7.5K_0402_5%
R493
7.5K_0402_5%
1 2
DDR3
CEDARVIEW
?
?2 OF 6
REV = 1.10
U1B
QB0Z B2 1.6G
N2600@
DDR3
CEDARVIEW
?
?2 OF 6
REV = 1.10
U1B
QB0Z B2 1.6G
N2600@
DDR3_WE#
AH10
DDR3_VREF
AJ27
DDR3_VCCA_PWROK
W7
DDR3_REFP
AC19
DDR3_REFN
AB19
DDR3_RAS#
AJ11
DDR3_ODTPU
AJ26
DDR3_ODT3
AJ7
DDR3_ODT2
AL9
DDR3_ODT1
AK7
DDR3_ODT0
AK10
RSVD_TP_AF19
AF19
RSVD_TP_AG19
AG19
RSVD_TP_AB11
AB11
RSVD_TP_AB13
AB13
DDR3_MA9
AH20
DDR3_MA8
AJ20
DDR3_MA7
AK20
DDR3_MA6
AJ18
DDR3_MA5
AH18
DDR3_MA4
AK18
DDR3_MA3
AJ16
DDR3_MA2
AJ14
DDR3_MA15
AJ22
DDR3_MA14
AH22
DDR3_MA13
AJ8
DDR3_MA12
AJ21
DDR3_MA11
AK21
DDR3_MA10
AJ12
DDR3_MA1
AK16
DDR3_MA0
AK14
DDR3_DRAMRST#
AK25
DDR3_DRAM_PWROK
AA5
DDR3_DQS#7
AA2
DDR3_DQS#6
AB7
DDR3_DQS#5
AF3
DDR3_DQS#4
AF10
DDR3_DQS#3
AF22
DDR3_DQS#2
AF29
DDR3_DQS#1
AB25
DDR3_DQS#0
AA31
DDR3_DQS7
Y3
DDR3_DQS6
AB6
DDR3_DQS5
AF4
DDR3_DQS4
AG10
DDR3_DQS3
AE22
DDR3_DQS2
AF30
DDR3_DQS1
AB24
DDR3_DQS0
AA30
DDR3_DQPU
AK27
DDR3_DQ9
AA22
DDR3_DQ8
AA24
DDR3_DQ7
AB30
DDR3_DQ63
W1
DDR3_DQ62
Y2
DDR3_DQ61
AB3
DDR3_DQ60
AC2
DDR3_DQ6
AB28
DDR3_DQ59
V3
DDR3_DQ58
W4
DDR3_DQ57
AB4
DDR3_DQ56
AB2
DDR3_DQ55
AA8
DDR3_DQ54
AB9
DDR3_DQ53
AE5
DDR3_DQ52
AE8
DDR3_DQ51
AB5
DDR3_DQ50
AA6
DDR3_DQ5
W28
DDR3_DQ49
AD6
DDR3_DQ48
AD7
DDR3_DQ47
AD4
DDR3_DQ46
AE2
DDR3_DQ45
AK3
DDR3_DQ44
AH4
DDR3_DQ43
AD3
DDR3_DQ42
AD2
DDR3_DQ41
AG3
DDR3_DQ40
AH2
DDR3_DQ4
W31
DDR3_DQ39
AF8
DDR3_DQ38
AD10
DDR3_DQ37
AE13
DDR3_DQ36
AG13
DDR3_DQ35
AG7
DDR3_DQ34
AG8
DDR3_DQ33
AD11
DDR3_DQ32
AD13
DDR3_DQ31
AE21
DDR3_DQ30
AG21
DDR3_DQ3
AC31
DDR3_DQ29
AG25
DDR3_DQ28
AG27
DDR3_DQ27
AC21
DDR3_DQ26
AD22
DDR3_DQ25
AG24
DDR3_DQ24
AE24
DDR3_DQ23
AJ29
DDR3_DQ22
AG30
DDR3_DQ21
AD30
DDR3_DQ20
AD28
DDR3_DQ2
AC30
DDR3_DQ19
AK29
DDR3_DQ18
AJ30
DDR3_DQ17
AE29
DDR3_DQ16
AD29
DDR3_DQ15
AD27
DDR3_DQ14
AD25
DDR3_DQ13
AA25
DDR3_DQ12
AB27
DDR3_DQ11
AE26
DDR3_DQ10
AE27
DDR3_DQ1
Y29
DDR3_DQ0
Y30
DDR3_DM7
AA3
DDR3_DM6
AB8
DDR3_DM5
AG2
DDR3_DM4
AG11
DDR3_DM3
AB21
DDR3_DM2
AE30
DDR3_DM1
AB26
DDR3_DM0
Y28
DDR3_CS#3
AK8
DDR3_CS#2
AK11
DDR3_CS#1
AH8
DDR3_CS#0
AH12
DDR3_CMDPU
AJ25
DDR3_CKE3
AH24
DDR3_CKE2
AK24
DDR3_CKE1
AJ24
DDR3_CKE0
AH23
DDR3_CK#3
AD15
DDR3_CK#2
AC17
DDR3_CK#1
AG17
DDR3_CK#0
AF15
DDR3_CK3
AC15
DDR3_CK2
AD17
DDR3_CK1
AF17
DDR3_CK0
AG15
DDR3_CAS#
AJ10
DDR3_BS2
AK22
DDR3_BS1
AH13
DDR3_BS0
AK12
DDR3_VREF_NCTF
AL28
C203
68P_0402_50V8J
C203
68P_0402_50V8J
1
2
C948
0.1U_0402_10V6K
C948
0.1U_0402_10V6K
1 2
R878
10K_0402_5%
@R878
10K_0402_5%
@
1 2
C951
0.1U_0402_10V6K
C951
0.1U_0402_10V6K
1 2
R883 0_0402_5%R883 0_0402_5%
1 2
R968
12.1K_0402_1%
R968
12.1K_0402_1%
1 2
R893
33.2_0402_1%
R893
33.2_0402_1%
12
R967 0_0402_5%R967 0_0402_5%
1 2
CEDARVIEW
DMI
?
1 OF 6
REV = 1.10
U1A
QB0Z B2 1.6G
N2600@
CEDARVIEW
DMI
?
1 OF 6
REV = 1.10
U1A
QB0Z B2 1.6G
N2600@
DMI_REFCLKP
N9
DMI_REFCLKN
N8
DMI_REF1P5
T2
DMI_RXN3
P3
DMI_RXP3
P2
DMI_RXN2
N1
DMI_RXP2
N2
DMI_RXN1
M2
DMI_RXP1
M3
DMI_RXN0
L2
DMI_RXP0
L3
DMI_RCOMP
T1
RSVD_TP_R7
R7
RSVD_TP_R8
R8
DMI_TXN3
N6
DMI_TXP3
N5
DMI_TXN2
L8
DMI_TXP2
L9
DMI_TXN1
L6
DMI_TXP1
L5
DMI_TXN0
K5
DMI_TXP0
K6
C950
0.1U_0402_10V6K
C950
0.1U_0402_10V6K
1 2
C1063 0.1U_0402_16V4Z
@
C1063 0.1U_0402_16V4Z
@
1
2
R880 10K_0402_5%
@
R880 10K_0402_5%
@
1 2
C1050
0.1U_0402_16V4Z
C1050
0.1U_0402_16V4Z
1
2
R503
270_0402_1%
R503
270_0402_1%
1 2
R973 0_0402_5%R973 0_0402_5%
12
R553
22.6_0402_1%
R553
22.6_0402_1%
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
L_IBG
ENBKL
ENBKL
LVDS_VTRL_CLK
LVDS_VTRL_DATA
CPU_DREFCLK_C
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
CPU_DREFCLK#_C
BREF_1.5V
BREFREXT
CPU_DREFCLK#_CCPU_DREFCLK_C
HDA_BITCLK_CPU
HDA_SDOUT_CPU
HDA_RST#_CPU
HDA_SYNC_CPU
HDA_SDIN1_CPU
XDP_PREQ#
XDP_PREQ#
XDP_PRDY#
XDP_PRDY#
H_SMI#
H_NMI
H_A20M#_C
H_STPCLK#
H_A20M#H_A20M#_C
H_DPRSTP#
H_DPSLP#
H_CPUSLP#
H_INIT#
H_INTR
H_THERMTRIP#
H_FERR#
H_FERR#_CPU
H_FERR#_CPU
H_PROCHOT#
H_PWRGD
PLTRST#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
SVID_ALERT#
SVID_CLK
SVID_DATA
SVID_DATA
SVID_ALERT#
H_PROCHOT#
VR_HOT
XDP_TDI_R
XDP_TDO_R
XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R
H_RSVD_K26
XDP_DBREST#
CPU_THERM#
H_THERMDC
H_THERMDA
EC_SMB_CK2
EC_SMB_DA2
H_THERMDA
H_THERMDC
XDP_TCK_R
XDP_TMS_R
XDP_TDI_R
XDP_TRST#_R
XDP_TDO_R
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
DAC_IREF
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
HDMIDAT_C
HDMICLK_C
HPD_C
HDMI_TXD2-
HDMI_TXD2+
HDMI_TXD1+
HDMI_TXD1-
HDMI_TXD0+
HDMI_TXD0-
HDMI_CLK0+
HDMI_CLK0-
BREF_1.5V
GMCH_CRT_DATA
GMCH_CRT_CLK
CRT_IRTN
XDP_DBREST#XDP_DBREST#
LCD_TXCLK- <17>
LCD_TXCLK+ <17>
LCD_TXOUT0- <17>
LCD_TXOUT0+ <17>
LCD_TXOUT1- <17>
LCD_TXOUT1+ <17>
LCD_TXOUT2- <17>
LCD_TXOUT2+ <17>
LCD_EDID_DATA <17>
LCD_EDID_CLK <17>
ENBKL <25>
GMCH_INVT_PWM <17>
GMCH_ENVDD <17>
CPU_SSCDREFCLK <9>
CPU_SSCDREFCLK# <9>
CPU_DREFCLK <9>
CPU_DREFCLK# <9>
HDA_BITCLK_CPU<13>
HDA_RST#_CPU<13>
HDA_SDOUT_CPU<13>
HDA_SYNC_CPU<13>
HDA_SDIN1<13>
H_SMI# <11>
H_NMI <11>
H_STPCLK# <11>
H_A20M# <11>
H_DPRSTP# <13>
H_DPSLP# <13>
H_CPUSLP# <11>
H_INIT# <11>
H_INTR <11>
H_THERMTRIP# <11>
H_FERR# <11>
H_PWRGD <13>
PLTRST# <13,18,23>
CLK_CPU_HPLCLK <9>
CLK_CPU_HPLCLK# <9>
SVID_CLK <35>
SVID_ALERT# <35>
SVID_DATA <35>
VR_HOT <35>
XDP_DBREST# <6>
EC_SMB_CK2 <25>
EC_SMB_DA2 <25>
GMCH_CRT_HSYNC <15>
GMCH_CRT_VSYNC <15>
GMCH_CRT_R <15>
GMCH_CRT_G <15>
GMCH_CRT_B <15>
GMCH_CRT_DATA <15>
GMCH_CRT_CLK <15>
HDMIDAT_C<16>
HDMICLK_C<16>
HPD_C<16>
HDMI_CLK0-<16>
HDMI_CLK0+<16>
HDMI_TXD2-<16>
HDMI_TXD2+<16>
HDMI_TXD1-<16>
HDMI_TXD1+<16>
HDMI_TXD0-<16>
HDMI_TXD0+<16>
+3VS
+1.8VS
+1.05VS
+3VS
+3VS
+3VS
+3VS
+1.05VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
738Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
738Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
738Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
R509 be placed U1.R22
To be placed <500 mils to U1 ball
Close to CPU
CPU THERMAL SENSOR
Address:0100_1100 EMC1402-1
Address:0100_1101 EMC1402-2
REMOTE Thermal sensor
place near the hottest spot area for
NB & top SODIMM.
Layout Note:
To be placed <250 mils to U1 ball
2011.05.06 Add 0 ohm for XDP signal.
IHDA
DDI
CEDARVIEW
LVDS VGA
?
?
3 OF 6
REV = 1.10
U1C
QB0Z B2 1.6G
N2600@
IHDA
DDI
CEDARVIEW
LVDS VGA
?
?
3 OF 6
REV = 1.10
U1C
QB0Z B2 1.6G
N2600@
DPL_REFCLKP
B9
DPL_REFCLKN
A9
AZIL_RST#
E21
AZIL_SDO
F21
AZIL_SDI
E22
AZIL_SYNC
F22
AZIL_BCLK
H21
BREFREXT
F15
BREF1P5V
E15
RSVD_TP_H17
H17
RSVD_TP_J17
J17
DDI1_TXN3
K13
DDI1_TXP3
J13
DDI1_TXN2
E13
DDI1_TXP2
F13
DDI1_TXN1
H11
DDI1_TXP1
J11
DDI1_TXN0
F11
DDI1_TXP0
E11
DDI1_HPD
D26
DDI1_AUXN
C10
DDI1_AUXP
D10
DDI1_DDC_SDA
G27
DDI1_DDC_SCL
F25
RSVD_TP_J15
J15
RSVD_TP_H15
H15
DDI0_TXN3
A7
DDI0_TXP3
B7
DDI0_TXN2
C3
DDI0_TXP2
D4
DDI0_TXN1
F2
DDI0_TXP1
F3
DDI0_TXN0
G3
DDI0_TXP0
G2
DDI0_HPD
H22
DDI0_AUXN
B8
DDI0_AUXP
C8
DDI0_DDC_SDA
J22
DDI0_DDC_SCL
H25
PANEL_VDDEN
F29
PANEL_BKLTEN
E25
PANEL_BKLTCTL
G22
LVDS_CLKN
J4
LVDS_CLKP
H4
LVDS_TXN3
G6
LVDS_TXP3
G5
LVDS_TXN2
H8
LVDS_TXP2
H7
LVDS_TXN1
E8
LVDS_TXP1
F8
LVDS_TXN0
H10
LVDS_TXP0
G10
LVDS_VREFL
H3
LVDS_VREFH
H2
LVDS_VBG
F10
LVDS_IBG
E10
LVDS_DDC_DATA
H24
LVDS_DDC_CLK
G24
LVDS_CTRL_DATA
E24
LVDS_CTRL_CLK
F28
DPL_REFSSCCLKN
E17
DPL_REFSSCCLKP
F17
CRT_DDC_CLK
E27
CRT_DDC_DATA
E29
CRT_IREF
A13
CRT_IRTN
D12
CRT_BLUE
C11
CRT_GREEN
B11
CRT_RED
B12
CRT_VSYNC
C14
CRT_HSYNC
D14
RV157 150_0402_1%CRT@ RV157 150_0402_1%CRT@
1 2
R499
51_0402_5%
R499
51_0402_5%
1 2
R496
51_0402_5%
R496
51_0402_5%
1 2
R501
51_0402_5%
R501
51_0402_5%
1 2
U2
EMC1402-1-ACZL-TR_MSOP8
U2
EMC1402-1-ACZL-TR_MSOP8
DN
3
DP
2
VDD
1
ALERT#
6
SMCLK
8
THERM#
4
GND
5
SMDATA
7
C1076
18P_0402_50V8J
C1076
18P_0402_50V8J
1
2
R894 1M_0402_5%R894 1M_0402_5%
1 2
R1002 0_0402_5%CRT@ R1002 0_0402_5%CRT@
1 2
R907
75_0402_5%
R907
75_0402_5%
12
R1009 0_0402_5%R1009 0_0402_5%
1 2
R511
100_0402_5%
R511
100_0402_5%
12
R908
110_0402_1%
R908
110_0402_1%
12
R898 0_0402_5%@R898 0_0402_5%@
1 2
R10070_0402_5%
HDMI@
R10070_0402_5%
HDMI@
12
R975
0_0402_5%
HDMI@
R975
0_0402_5%
HDMI@
1 2
R971
1K_0402_1%
R971
1K_0402_1%
12
R1008 0_0402_5%CRT@ R1008 0_0402_5%CRT@
12
R906
51_0402_5%
R906
51_0402_5%
1 2
R895 0_0402_5%R895 0_0402_5%
1 2
R900
2.2K_0402_5%
R900
2.2K_0402_5%
1 2
R509
2.37K_0402_1%
R509
2.37K_0402_1%
R524 10K_0402_5%R524 10K_0402_5%
1 2
R502
51_0402_5%
R502
51_0402_5%
1 2
R10060_0402_5%
HDMI@
R10060_0402_5%
HDMI@
12
R495
51_0402_5%
R495
51_0402_5%
1 2
C1077
18P_0402_50V8J
C1077
18P_0402_50V8J
1
2
R517
100K_0402_5%
R517
100K_0402_5%
R510 681_0402_1%CRT@ R510 681_0402_1%CRT@
R958 0_0402_5%R958 0_0402_5%
1 2
R974
7.5K_0402_1%
HDMI@ R974
7.5K_0402_1%
HDMI@
12
C1120
1U_0402_6.3V6K
HDMI@ C1120
1U_0402_6.3V6K
HDMI@
1
2
R904 0_0402_5%
CRT@
R904 0_0402_5%
CRT@
1 2
R523 10K_0402_5%R523 10K_0402_5%
12
C190
2200P_0402_50V7K
@C190
2200P_0402_50V7K
@
1
2
R1003 0_0402_5%CRT@ R1003 0_0402_5%CRT@
1 2
R902
49.9_0402_1%
R902
49.9_0402_1%
12
R1010 0_0402_5%R1010 0_0402_5%
1 2
C969
2200P_0402_50V7K
C969
2200P_0402_50V7K
1 2
R903
0_0402_5%
CRT@ R903
0_0402_5%
CRT@
12
RV156 150_0402_1%CRT@ RV156 150_0402_1%CRT@
1 2
C968
0.1U_0402_16V4Z
C968
0.1U_0402_16V4Z
1
2
R1005 0_0402_5%CRT@ R1005 0_0402_5%CRT@
1 2
R897
0_0402_5%
@R897
0_0402_5%
@
1 2
RV155 150_0402_1%CRT@ RV155 150_0402_1%CRT@
1 2
R896 0_0402_5%R896 0_0402_5%
1 2
R90533_0402_5%
HDMI@
R90533_0402_5%
HDMI@
1 2
R899
2.2K_0402_5%
R899
2.2K_0402_5%
1 2
R505
51_0402_5%
R505
51_0402_5%
1 2
R901
49.9_0402_1%
R901
49.9_0402_1%
12
Y3
27MHZ_18PF_X3S027000FI1H-X
Y3
27MHZ_18PF_X3S027000FI1H-X
1 3
2 4
CPU
CEDARVIEW
ICH
?
?
4 OF 6
REV = 1.10
U1D
QB0Z B2 1.6G
N2600@
CPU
CEDARVIEW
ICH
?
?
4 OF 6
REV = 1.10
U1D
QB0Z B2 1.6G
N2600@
CPUSLP#
B22
RSVD_N25
N25
RSVD_N24
N24
RSVD_W26
W26
RSVD_W25
W25
RSVD_R6
R6
RSVD_R5
R5
TRST#
B24
TMS
D24
TDO
B25
TDI
C24
TCLK
C25
MV_GPIO_RCOMP
K23
HV_GPIO_RCOMP
K24
RSVD_H30
H30
RSVD_J31
J31
RSVD_K29
K29
RSVD_L30
L30
RSVD_L29
L29
RSVD_K30
K30
RSVD_H27
H27
RSVD_K27
K27
RSVD_K26
K26
RSVD_J28
J28
RSVD_K25
K25
STRAP_K28
K28
STRAP_L27
L27
RSVD_L26
L26
RSVD_L24
L24
RSVD_L22
L22
RSVD_K21
K21
SVID_DATA
C16
SVID_CLK
D18
SVID_ALERT#
B16
RSVD_F19
F19
RSVD_E19
E19
HPLL_REFCLK
K19
HPLL_REFCLK_P
J19
PREQ#
G29
PRDY#
H29
DBR#
E30
RESET#
G30
PWRGOOD
D23
PROCHOT#
A19
PBE#
C20
RSVD_L11
L11
THERMTRIP#
B20
INTR/LINT00
D20
INIT#
A23
DPLSLP#
B21
DPRSTP#
C21
STPCLK#
D22
RSVD_C18
C18
NMI/LINT10
C22
SMI#
B18
E
B
C
Q8
MMBT3904WH_SOT323-3
E
B
C
Q8
MMBT3904WH_SOT323-3
2
3 1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCA_VCCD
+VCCA_VCCD
+VCCA_VCCD
+VCCA_VCCD
+1.05VS_EAST
+1.05VS_EAST
+VCCA_VDDR
+VCCA_VDDR
+VCCCK_DDR
+VCCCK_DDR
+VCC_SM
+VCCADP_1.05
+VCC_SM
+VCCADP_1.05
VSSSENSE
VSS_GFXSENSE
VCC_GFXSENSE
VCC_GFXSENSE
VSS_GFXSENSE
VCCSENSE
+VCC_DMI
+VCC_DMI
+VCCADMI_1.5VS
+VCCADMI_1.5VS
+VCCDLVDS
+VCCDLVDS
+VCCALVDS
+VCCALVDS
+VCCATHRM
+VCCAGPIO3.3V
+VCCAZILAON
+VCCAGPIO3.3V
+VCCAZILAON
+VCCAGPIO1.5V
+VCCAGPIO1.5V
+VCCAGPIO1.8V
+VCCAGPIO1.8V
+VCCDMPL
+VCCDMPL
+VCCPLLCPU1
+VCCPLLCPU0
+VCCPLLCPU0
+VCCPLLCPU1
+VCCAHPLL
+VCCAHPLL
+VCCA_VCCD
+VCCCK_DDR
+VCCADP1_SFR
+VCCADP0_SFR
+VCCSFRMPL
+VCCSFRMPL
+1.05VS_EAST
+VCC_CRT_DAC
+VCCDIO
+VCC_CRT_DAC+VCC_CRT_DAC
+VCCDIO
+VCCADP0_SFR +VCCADP1_SFR
VCCSENSE <35>
VSSSENSE <35>
VCC_GFXSENSE <35>
VSS_GFXSENSE <35>
+1.05VS
+1.5V
+1.5V
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+GFX_CORE
+1.8VS
+GFX_CORE
+1.5VS
+GFX_CORE
+1.05VS
+1.8VS
+3VS_PRIME
+1.05VS
+GFX_CORE
+CPU_CORE
+1.05VS+1.05VS +1.05VS
+1.5VS +1.5VS +1.5VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
838Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
838Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
838Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
C973 1UF for
CPU pin V4
C1079 1UF for
CPU pin N30,N31
Please closed U1 ball
Please closed U1 ball
2 x 330uF(9mohm/2)
Close Chipset pin
Close Chipset pin
0.1uH use
0 ohm replace
2010.07.12 RF request
C1080 1UF for
CPU pin L19
4234mA
1938mA
723mA
2011.04.25 Add for RGB I/F
2011.04.25 Add for RGB I/F
2011.06.14 Stuff C1007,C1008,C1009 for EDS issue
C1006
1U_0402_6.3V6K
C1006
1U_0402_6.3V6K
1
2
C973
1U_0402_6.3V6K
C973
1U_0402_6.3V6K
1
2
C1083
1U_0402_6.3V6K
C1083
1U_0402_6.3V6K
1
2
C987
1U_0402_6.3V6K
@
C987
1U_0402_6.3V6K
@
1
2
C150 22P_0402_50V8J
RF@
C150 22P_0402_50V8J
RF@
1 2
C983
1U_0402_6.3V6K
C983
1U_0402_6.3V6K
1
2
+
C1096
330U_B2_2.5VM_R15M
+
C1096
330U_B2_2.5VM_R15M
1
2
C1097
1U_0402_6.3V6K
C1097
1U_0402_6.3V6K
1
2
C1082
1U_0402_6.3V6K
C1082
1U_0402_6.3V6K
1
2
R913
0_0603_5%
R913
0_0603_5%
1 2
C992
22U_0805_6.3V6M
C992
22U_0805_6.3V6M
1
2
C1092
2.2U_0402_6.3V6M
C1092
2.2U_0402_6.3V6M
1
2
C1089
1U_0402_6.3V6K
@
C1089
1U_0402_6.3V6K
@
1
2
C990
22U_0805_6.3V6M
C990
22U_0805_6.3V6M
1
2
C1126
1U_0402_6.3V6K
C1126
1U_0402_6.3V6K
1
2
R910
0_0603_5%
R910
0_0603_5%
1 2
C1008
1U_0402_6.3V6K
C1008
1U_0402_6.3V6K
1
2
R530
0_0603_5%
R530
0_0603_5%
1 2
R909
0_0603_5%
R909
0_0603_5%
1 2
C980
2.2U_0402_6.3V6M
C980
2.2U_0402_6.3V6M
1
2
C971
22U_0805_6.3V6M
@
C971
22U_0805_6.3V6M
@
1
2
R921
0_0603_5%
R921
0_0603_5%
1 2
C1080
1U_0402_6.3V6K
C1080
1U_0402_6.3V6K
1
2
C156 22P_0402_50V8JC156 22P_0402_50V8J
1 2
C153 22P_0402_50V8JC153 22P_0402_50V8J
1 2
R927
0_0603_5%
@
R927
0_0603_5%
@
1 2
C1079
1U_0402_6.3V6K
@
C1079
1U_0402_6.3V6K
@
1
2
GND
CEDARVIEW
?
?
6 OF 6
REV = 1.10
U1F
QB0Z B2 1.6G
N2600@
GND
CEDARVIEW
?
?
6 OF 6
REV = 1.10
U1F
QB0Z B2 1.6G
N2600@
VSS
H13
VSS
G8
VSS
G31
VSS
G21
VSS
G19
VSS
G17
VSS
G15
VSS
G13
VSS
G11
VSS
G1
VSS
F4
VSS
F24
VSS
E7
VSS
E5
VSS
E2
VSS
D9
VSS
D8
VSS
D28
VSS
D19
VSS
C7
VSS
C30
VSS
C26
VSS
C12
VSS
B23
VSS
B19
VSS
B14
VSS
B10
VSS
AL7
VSS
AL25
VSS
AL23
VSS
AL19
VSS
AL13
VSS
AK9
VSS
AK28
VSS
AK19
VSS
AK13
VSS
AJ3
VSS
AJ2
VSS
AH9
VSS
AH6
VSS
AH28
VSS
AH26
VSS
AG5
VSS
AG22
VSS
AF7
VSS
AF28
VSS
AF24
VSS
AF21
VSS
AF13
VSS
AF11
VSS
AE31
VSS
AE3
VSS
AE19
VSS
AE17
VSS
AE15
VSS
AE11
VSS
AE10
VSS
AE1
VSS
AD8
VSS
AD5
VSS
AD26
VSS
AD24
VSS
AD21
VSS
AD19
VSS
AC4
VSS
AC28
VSS
AC22
VSS
AC13
VSS
AC11
VSS
AC10
VSS
AC1
VSS
AB29
VSS
AB23
VSS
AB17
VSS
AB15
VSS
AA9
VSS
AA7
VSS
AA29
VSS
AA27
VSS
AA26
VSS
AA23
VSS
AA21
VSS
AA19
VSS
AA13
VSS
AA10
VSS
AA1
VSS
A25
VSS
A21
VSS
A16
VSS
A11
VSSA_CRTDAC
D13
VSS_CDVDET
L14
VSS
E1
VSS
C31
VSS
C2
VSS
C1
VSS
B31
VSS
B3
VSS
B2
VSS
AL5
VSS
AL30
VSS
AL3
VSS
AL29
VSS
AL2
VSS
AK31
VSS
AK30
VSS
AK2
VSS
AK1
VSS
AJ31
VSS
AJ1
VSS
AH1
VSS
A3
VSS
A29
VSS
A27
VSS
Y4
VSS
W6
VSS
W5
VSS
W30
VSS
W27
VSS
W24
VSS
W23
VSS
W22
VSS
W21
VSS
W2
VSS
W19
VSS
W14
VSS
W10
VSS
V2
VSS
U9
VSS
U6
VSS
U5
VSS
T3
VSS
T18
VSS
T14
VSS
P4
VSS
P16
VSS
P14
VSS
N7
VSS
N4
VSS
N28
VSS
N27
VSS
N26
VSS
N23
VSS
N22
VSS
N21
VSS
N19
VSS
N14
VSS
N10
VSS
M4
VSS
M29
VSS
L7
VSS
L31
VSS
L25
VSS
L23
VSS
L13
VSS
L10
VSS
L1
VSS
K9
VSS
K8
VSS
K7
VSS
K3
VSS
K15
VSS
K11
VSS
J30
VSS
J21
VSS
J2
VSS
J10
VSS
H6
VSS
H28
VSS
H26
VSS
H19
C979
2.2U_0402_6.3V6M
C979
2.2U_0402_6.3V6M
1
2
R526
0_0603_5%
R526
0_0603_5%
1 2
R531
0_0603_5%
R531
0_0603_5%
1 2
C166
0_0402_5%
HDMI@
C166
0_0402_5%
HDMI@
C1108
10U_0805_10V4Z
@
C1108
10U_0805_10V4Z
@
1
2
C986
4.7U_0603_6.3V6K
C986
4.7U_0603_6.3V6K
1
2
R925
0_0603_5%
R925
0_0603_5%
1 2
C1095
1U_0402_6.3V6K
C1095
1U_0402_6.3V6K
1
2
R923
0_0603_5%
R923
0_0603_5%
1 2
+
C1004
330U_B2_2.5VM_R15M
+
C1004
330U_B2_2.5VM_R15M
1
2
C982
2.2U_0402_6.3V6M
C982
2.2U_0402_6.3V6M
1
2
C974
1U_0402_6.3V6K
C974
1U_0402_6.3V6K
1
2
C981
2.2U_0402_6.3V6M
C981
2.2U_0402_6.3V6M
1
2
C991
22U_0805_6.3V6M
C991
22U_0805_6.3V6M
1
2
R917
0_0603_5%
R917
0_0603_5%
1 2
C1100
1U_0402_6.3V6K
C1100
1U_0402_6.3V6K
1
2
+
C1081
330U_D2_2.5VY_R9M
+
C1081
330U_D2_2.5VY_R9M
1
2
C976
4.7U_0603_6.3V6K
C976
4.7U_0603_6.3V6K
1
2
C1078
2.2U_0402_6.3V6M
@
C1078
2.2U_0402_6.3V6M
@
1
2
C1103
1U_0402_6.3V6K
C1103
1U_0402_6.3V6K
1
2
C1125
0_0603_5%
HDMI@
C1125
0_0603_5%
HDMI@
R911
0_0603_5%
R911
0_0603_5%
1 2
R527
0_1206_5%
R527
0_1206_5%
1 2
R914
0_0603_5%
HDMI@
R914
0_0603_5%
HDMI@
1 2
C970
1U_0402_6.3V6K
@
C970
1U_0402_6.3V6K
@
1
2
C1102
10U_0805_10V4Z
C1102
10U_0805_10V4Z
1
2
R929
0_0603_5%
@
R929
0_0603_5%
@
1 2
C1099
1U_0402_6.3V6K
C1099
1U_0402_6.3V6K
1
2
C1093
2.2U_0402_6.3V6M
HDMI@C1093
2.2U_0402_6.3V6M
HDMI@
1
2
C1098
10U_0805_10V4Z
C1098
10U_0805_10V4Z
1
2
R918 0_0402_5%R918 0_0402_5%
1 2
+
C984
330U_D2_2.5VY_R9M
+
C984
330U_D2_2.5VY_R9M
1
2
C989
22U_0805_6.3V6M
C989
22U_0805_6.3V6M
1
2
C1093
0_0402_5%
CRT@
C1093
0_0402_5%
CRT@
C993
1U_0402_6.3V6K
C993
1U_0402_6.3V6K
1
2
R912
100_0402_5%
R912
100_0402_5%
12
C1086
1U_0402_6.3V6K
C1086
1U_0402_6.3V6K
1
2
R928
0_0603_5%
@
R928
0_0603_5%
@
1 2
C994
1U_0402_6.3V6K
C994
1U_0402_6.3V6K
1
2
C996
4.7U_0603_6.3V6K
@
C996
4.7U_0603_6.3V6K
@
1
2
C975
1U_0402_6.3V6K
C975
1U_0402_6.3V6K
1
2
C166
1U_0402_6.3V6K
CRT@
C166
1U_0402_6.3V6K
CRT@
1
2
R922
0_0603_5%
R922
0_0603_5%
1 2
C1127
1U_0402_6.3V6K
C1127
1U_0402_6.3V6K
1
2
C1007
1U_0402_6.3V6K
C1007
1U_0402_6.3V6K
1
2
C1104
4.7U_0603_6.3V6K
@
C1104
4.7U_0603_6.3V6K
@
1
2
R956
0_0603_5%
R956
0_0603_5%
1 2
C1090
10U_0805_10V4Z
C1090
10U_0805_10V4Z
1
2
C972
1U_0402_6.3V6K
C972
1U_0402_6.3V6K
1
2
C1085
22U_0805_6.3V6M
C1085
22U_0805_6.3V6M
1
2
R533
100_0402_5%
R533
100_0402_5%
12
DDR
PLL
CEDARVIEW
POWER
DMI
CPU
?
?
5 OF 6
REV = 1.10
U1E
QB0Z B2 1.6G
N2600@
DDR
PLL
CEDARVIEW
POWER
DMI
CPU
?
?
5 OF 6
REV = 1.10
U1E
QB0Z B2 1.6G
N2600@
V_SM_7
AL21
VCCAHPLL
B26
VCCPLLCPU1_2
B30
VCCPLLCPU1_1
C29
VCCPLLCPU0
B27
VCCDMPL
AA11
VCCSFRMPL
AA18
VCCAZILAON_2
A30
VCCAZILAON_1
B29
VCCDIO
L21
VCCDLVDS
J1
VCCALVDS
H5
VCCADAC
B13
VCCAGPIO_2
D31
VCCAGPIO_1
D30
VCCAGPIO_DIO
N18
VCCAGPIO_REF
L16
VCCAGPIO_LV
L19
VCCADP1_SFR
L18
VCCADP0_SFR
K17
VCCADP_3
D6
VCCADP_2
C6
VCCADP_1
B5
V_SM_8
AG31
V_SM_6
AL16
V_SM_5
AL11
V_SM_4
AK5
V_SM_3
AK23
V_SM_2
AH19
V_SM_1
AH14
VCCCKDDR_2
AK6
VCCCKDDR_1
AJ6
VCCADLLDDR_2
W13
VCCADLLDDR_1
W11
VCCACKDDR_2
W9
VCCACKDDR_1
W8
VCCRAMXXX_3
V4
VCCRAMXXX_2
N31
VCCRAMXXX_1
N30
VCCADDR_4
W18
VCCADDR_3
W16
VCCADDR_2
AA16
VCCADDR_1
AA14
VCCTHRM_2
K2
VCCTHRM_1
N16
VSS_GFXSENSE
U7
VCC_GFXSENSE
U8
VSS_CPUSENSE
M30
VCC_CPUSENSE
M28
VCCFHV_3
V14
VCCFHV_2
T16
VCCFHV_1
V16
VCCADMI_PLLSFR
K4
VCCADMI_3
A4
VCCADMI_2
C5
VCCADMI_1
B4
VCC_GFX_11
V13
VCC_GFX_10
V11
VCC_GFX_09
U10
VCC_GFX_08
T13
VCC_GFX_07
T11
VCC_GFX_06
R9
VCC_GFX_05
R10
VCC_GFX_04
P13
VCC_GFX_03
P11
VCC_GFX_02
N13
VCC_GFX_01
N11
VCC_CPU_29
V30
VCC_CPU_28
V29
VCC_CPU_27
V28
VCC_CPU_26
V21
VCC_CPU_25
V19
VCC_CPU_24
V18
VCC_CPU_23
U27
VCC_CPU_22
U26
VCC_CPU_21
U25
VCC_CPU_20
U24
VCC_CPU_19
U23
VCC_CPU_18
U22
VCC_CPU_17
T31
VCC_CPU_16
T30
VCC_CPU_15
T29
VCC_CPU_14
T21
VCC_CPU_13
T19
VCC_CPU_12
R27
VCC_CPU_11
R26
VCC_CPU_10
R25
VCC_CPU_09
R24
VCC_CPU_08
R23
VCC_CPU_07
R22
VCC_CPU_06
P30
VCC_CPU_05
P29
VCC_CPU_04
P28
VCC_CPU_03
P21
VCC_CPU_02
P19
VCC_CPU_01
P18
R535
0_0603_5%
CRT@
R535
0_0603_5%
CRT@
1 2
R1004
0_0603_5%
CRT@
R1004
0_0603_5%
CRT@
1 2
R920
0_0603_5%
R920
0_0603_5%
1 2
C1125
10U_0603_6.3V
CRT@
C1125
10U_0603_6.3V
CRT@
12
C1005
22U_0805_6.3V6M
C1005
22U_0805_6.3V6M
1
2
C1109
1U_0402_6.3V6K
C1109
1U_0402_6.3V6K
1
2
R924
0_0603_5%
R924
0_0603_5%
1 2
C977
4.7U_0603_6.3V6K
C977
4.7U_0603_6.3V6K
1
2
C159 22P_0402_50V8J
RF@
C159 22P_0402_50V8J
RF@
1 2
R919
0_0603_5%
R919
0_0603_5%
1 2
C1084
1U_0402_6.3V6K
@
C1084
1U_0402_6.3V6K
@
1
2
C1101
0.1U_0402_10V6K
@
C1101
0.1U_0402_10V6K
@
1
2
C1094
10U_0805_10V4Z
C1094
10U_0805_10V4Z
1
2
C988
1U_0402_6.3V6K
@
C988
1U_0402_6.3V6K
@
1
2
R926
0_0603_5%
R926
0_0603_5%
1 2
C1009
1U_0402_6.3V6K
C1009
1U_0402_6.3V6K
1
2
R916
0_0603_5%
R916
0_0603_5%
1 2
R532
100_0402_5%
R532
100_0402_5%
12
R915
100_0402_5%
R915
100_0402_5%
12
C1106
4.7U_0603_6.3V6K
@
C1106
4.7U_0603_6.3V6K
@
1
2
R525
0_0805_5%
R525
0_0805_5%
1 2
+
C985
330U_D2_2.5VY_R9M
+
C985
330U_D2_2.5VY_R9M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
CLK_XTAL_IN
VGATE
CLK_XTAL_OUT
ITP_EN
H_STP_CPU#_R
CLK_XTAL_OUT
CLK_XTAL_IN
PCI2_TME
ITP_EN PCI2_TME
CLK_SMBDATA
CLK_SMBCLK
WLAN_CLKREQ#
WWAN_CLKREQ#
CLK_SMBDATA
PCI4_SEL
PCI4_SEL
CLK_PCI_DDR_R
CLK_PCIE_PCH#
CLK_PCIE_PCH
CLK_PCIE_LAN
CLK_PCIE_LAN#
WLAN_CLKREQ#
LAN_CLKREQ#
LAN_CLKREQ#
CLK_SMBCLK
FSB
H_STP_PCI#_R
+1.05VM_1.5VM_R
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
CLK_PCIE_WWAN#
CLK_PCIE_WWAN
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCI_DDR_R
PCI4_SEL
ITP_EN
WWAN_CLKREQ#
FSB
FSC
FSA
H_STP_CPU#_R
H_STP_PCI#_R
FSA
+3VM_1.5VM_R
CLK_CPU_MPLL_C
CLK_CPU_MPLL#_C
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CLK_CPU_EXP
CLK_CPU_EXP#
CLK_SMBCLK
CPU_ITP
CPU_ITP#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
CPU_DREFCLK#
CPU_DREFCLK
CLK_PCH_48M<12>
CLK_PCH_14M<13>
VGATE<13,25,28,34,35>
H_STP_PCI#<13>
CLK_PCI_PCH<11>
CLK_PCI_LPC<25>
CLK_SMBDATA <10,18>
CLK_SMBCLK <10,18>
PCH_SMBDATA<13>
PCH_SMBCLK<13>
CLK_PCI_DDR<18>
CLK_PCIE_PCH <12>
CLK_PCIE_PCH# <12>
CLK_PCIE_LAN <23>
CLK_PCIE_LAN# <23>
WLAN_CLKREQ# <18>
LAN_CLKREQ# <23>
CLK_PCIE_WLAN# <18>
CLK_PCIE_WLAN <18>
CLK_PCIE_WWAN# <18>
CLK_PCIE_WWAN <18>
CLK_PCIE_SATA# <11>
CLK_PCIE_SATA <11>
WWAN_CLKREQ# <18>
CLK_48M_CR<24>
CLK_CPU_MPLL#_C <6>
CLK_CPU_MPLL_C <6>
CLK_CPU_HPLCLK <7>
CLK_CPU_HPLCLK# <7>
H_STP_CPU#<13>
CLK_CPU_EXP# <6>
CLK_CPU_EXP <6>
CPU_SSCDREFCLK <7>
CPU_SSCDREFCLK# <7>
CPU_DREFCLK <7>
CPU_DREFCLK# <7>
+1.05VM_CK505
+3VM_CK505
+3VS
+1.05VS
+3VS
+3VS
+3VS
+3VS
+3VM_CK505
+1.05VM_CK505
+1.5VM_CK505
+3VS
+1.05VS
+1.05VS
+1.05VS
+3VS
+1.5VS
+1.5VM_CK505
+1.5VM_CK505
+3VM_CK505
+1.05VM_CK505
+3VS+3VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEAMTIC A6859
938Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
4019EG
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEAMTIC A6859
938Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
4019EG
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEAMTIC A6859
938Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
4019EG
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS
Routing the trace at least 10mil
1000
CLKSEL1
0
PCI
MHz
266
SRC
MHz
CPU
MHz
CLKSEL2
33.30
FSA
CLKSEL0
FSC FSB REF
MHz
DOT_96
MHz
USB
MHz
14.318 96.0 48.0
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
111
Reserved
SA00003H730 (Realtek :RTM890N-397-VC-GRT)
For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed
PORT
SRC PORT LIST
REQ_3#
DEVICEPORT
REQ PORT LIST
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#
PEIC_WLAN
SRC10
SRC11
SRC6
SRC4
SRC0
DEVICE
SRC3
CPU_DREFCLK
SRC2
SRC7
SRC9
SRC8
PCIE_LAN
PCIE_WLAN
PCIE_SATA
PCIE_WWAN
PEIC_WWAN
250 mA
PCIE_PCH
PCIE_LAN
80 mA
Low power CLK Gen.
@
@
@
@
Stuff
Stuff
Stuff
Stuff
R477 @ Stuff
Normal Power Low Power
R478
R479
R480
R483
2011.03.30 CLK_CPU_EXP change to SRC3
CPU_EXP
2011.04.29 Reserve R305,C392 for RF
2011.06.29 Swap CLK Gen output for
CPU_SCDREFFCLK and CPU_DREFCLK
C139
0.1U_0402_16V4Z
C139
0.1U_0402_16V4Z
1
2
R9800_0402_5% @R9800_0402_5% @
R482
2.2K_0402_5%
R482
2.2K_0402_5%
12
C147 22P_0402_50V8JC147 22P_0402_50V8J
R488
0_0402_5%
R488
0_0402_5%
12
Q1A
2N7002DW-T/R7_SOT363-6
Q1A
2N7002DW-T/R7_SOT363-6
6 1
2
Q1B 2N7002DW-T/R7_SOT363-6Q1B 2N7002DW-T/R7_SOT363-6
3
5
4
Y1
14.31818MHZ 20PF 7A14300003
Y1
14.31818MHZ 20PF 7A14300003
12
C143 22P_0402_50V8JC143 22P_0402_50V8J
1 2
R486
1K_0402_5%
R486
1K_0402_5%
12
C945
0.1U_0402_16V4Z
C945
0.1U_0402_16V4Z
1
2
R119
10K_0402_5%
R119
10K_0402_5%
1 2
C944
0.1U_0402_16V4Z
C944
0.1U_0402_16V4Z
1
2
R480
0_0603_5%
LOW@R480
0_0603_5%
LOW@
1 2
C138
0.1U_0402_16V4Z
C138
0.1U_0402_16V4Z
1
2
C946
0.1U_0402_16V4Z
C946
0.1U_0402_16V4Z
1
2
R101 10K_0402_5%R101 10K_0402_5%
12
R489
470_0402_5%
R489
470_0402_5%
12
C146 22P_0402_50V8JC146 22P_0402_50V8J
1 2
C942
10U_0805_10V4Z
C942
10U_0805_10V4Z
1
2
R112
10K_0402_5%
R112
10K_0402_5%
1 2
R81
0_0603_5%
R81
0_0603_5%
1 2
R113
10K_0402_5%
@R113
10K_0402_5%
@
1 2
R608
10K_0402_5%
R608
10K_0402_5%
1 2
C128
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
1
2
R65
10K_0402_5%
R65
10K_0402_5%
1 2
R118
10K_0402_5%
@
R118
10K_0402_5%
@
1 2
C136
0.1U_0402_16V4Z
C136
0.1U_0402_16V4Z
1
2
R10333_0402_5% R10333_0402_5%
1 2
C135
0.1U_0402_16V4Z
C135
0.1U_0402_16V4Z
1
2
U4
RTM890N-397-VC-GRT QFN
LOW@U4
RTM890N-397-VC-GRT QFN
LOW@
CKPWRGD/PD#
1
FS_B/TEST_MODE
2
VSS_REF
3
XTAL_OUT
4
XTAL_IN
5
VDD_REF
6
REF_0/FS_C/TEST_
7
REF_1
8
SDA
9
SCL
10
NC
11
VDD_PCI
12
PCI_1
13
PCI_2
14
PCI_3
15
PCI_4/SEL_LCDCL
16
PCIF_5/ITP_EN
17
VSS_PCI
18
VDD_48
19
USB_0/FS_A
20
USB_1/CLKREQ_A#
21
VSS_48
22
VDD_IO
23
SRC_0/DOT_96
24
SRC_0#/DOT_96#
25
VSS_IO
26
VDD_PLL3
27
LCDCLK/27M
28
LCDCLK#/27M_SS
29
VSS_PLL3
30
VDD_PLL3_IO
31
SRC_2
32
SRC_2#
33
VSS_SRC
34
SRC_3
35
SRC_3#
36
VDD_CPU
72
CPU_0
71
CPU_0#
70
VSS_CPU
69
CPU_1
68
CPU_1#
67
VDD_CPU_IO
66
CLKREQ_7#
65
SRC_8/CPU_ITP
64
SRC_8#/CPU_ITP#
63
VDD_SRC_IO
62
SRC_7
61
SRC_7#
60
VSS_SRC
59
CLKREQ_6#
58
SRC_6
57
SRC_6#
56
VDD_SRC
55
PCI_STOP#
54
CPU_STOP#
53
VDD_SRC_IO
52
SRC_10#
51
SRC_10
50
SLKREQ_10#
49
SRC_11
48
SRC_11#
47
CLKREQ_11#
46
SRC_9#
45
SRC_9
44
CLKREQ_9#
43
VSS_SRC
42
CLKREQ_4#
41
SRC_4#
40
SRC_4
39
VDD_SRC_IO
38
CLKREQ_3#
37
VSS
73
R432 0_0402_5%@R432 0_0402_5%@
1 2
R82
FBMH1608HM601-T_0603
R82
FBMH1608HM601-T_0603
1 2
C126
10U_0805_10V4Z
C126
10U_0805_10V4Z
1
2
R9333_0402_5% R9333_0402_5%
1 2
R427 0_0402_5%@R427 0_0402_5%@
1 2
R485
470_0402_5%
@R485
470_0402_5%
@
12
T77T77
C145 22P_0402_50V8JC145 22P_0402_50V8J
1 2
R481
470_0402_5%
R481
470_0402_5%
12
C144 22P_0402_50V8JC144 22P_0402_50V8J
1 2
R9210_0402_5% R9210_0402_5%
1 2
C127
0.1U_0402_16V4Z
C127
0.1U_0402_16V4Z
1
2
C141
47P_0402_50V8J
C141
47P_0402_50V8J
C392
22P_0402_50V8J
@
C392
22P_0402_50V8J
@
1 2
R479
0_0603_5%
NORMAL@ R479
0_0603_5%
NORMAL@
1 2
C148 22P_0402_50V8JC148 22P_0402_50V8J
R10733_0402_5% R10733_0402_5%
1 2
R83
2.2K_0402_5%
R83
2.2K_0402_5%
R305
10_0402_5%
@
R305
10_0402_5%
@
1 2
R114
10K_0402_5%
R114
10K_0402_5%
1 2
R490
10K_0402_5%
R490
10K_0402_5%
12
R9110_0402_5% R9110_0402_5%
1 2
R9830_0402_5% @R9830_0402_5% @
C134
10U_0805_10V4Z
C134
10U_0805_10V4Z
1
2
T78T78
R10833_0402_5% R10833_0402_5%
1 2
R478
0_0603_5%
NORMAL@ R478
0_0603_5%
NORMAL@
1 2
R491
0_0402_5%
@R491
0_0402_5%
@
12
C133
47P_0402_50V8J
C133
47P_0402_50V8J
C868 22P_0402_50V8JC868 22P_0402_50V8J
1 2
R115
10K_0402_5%
@
R115
10K_0402_5%
@
1 2
R483
0_0603_5%
LOW@R483
0_0603_5%
LOW@
1 2
R484
1K_0402_5%
@R484
1K_0402_5%
@
12
C137
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
1
2
C943
0.1U_0402_16V4Z
C943
0.1U_0402_16V4Z
1
2
R84
2.2K_0402_5%
R84
2.2K_0402_5%
R477
0_0603_5%
LOW@
R477
0_0603_5%
LOW@
1 2
R99 10K_0402_5%R99 10K_0402_5%
12
R100 10K_0402_5%R100 10K_0402_5%
12
C947
47P_0402_50V8J
@
C947
47P_0402_50V8J
@
C129
0.1U_0402_16V4Z
C129
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D36
DDR_A_D63
DDR_A_D25
DDR_A_DQS6
DDR_A_D35
DDR_A_MA12
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DM6
DDR_A_D42
DDR_CKE3
+DIMM_VREF
DRAMRST#
+VREF_CA
PM_EXTTS#0
DDR_CKE2
DDR_A_MA3
CLK_SMBCLK
DDR_CS3#
DDR_A_D39
DDR_A_BS1
DDR_A_DQS0
DDR_A_WE#
DDR_A_MA7
DDR_A_MA0
DDR_A_DM2
DDR_A_DM1
DDR_A_DQS7
DDR_A_D57
DDR_A_D46
DDR_A_D28
DDR_A_DM0
DDR_A_DQS#5
DDR_A_DM4
DDR_A_DQS2
DDR_A_RAS#
DDR_A_D58
DDR_A_DM5
DDR_A_DQS3
DDR_A_MA8
DDR_CS2#
DDR_A_D10
DDR_A_MA6
DDR_A_MA10
DDR_A_DQS#7
DDR_A_DQS#6
DDR_A_MA9
DDR_A_D29
DDR_A_DQS#4
DDR_A_DM3
+0.75VS
DDR_A_DQS5
DDR_A_BS2
DDR_A_D45
DDR_A_D9
DDR_A_DM7
DDR_A_MA1
DDR_A_D13
DDR_A_BS0
DDR_A_CAS# M_ODT2
DDR_A_MA5
DDR_A_DQS#1
DDR_A_MA14
DDR_A_MA4
DDR_A_D21
DDR_A_D24
DDR_A_D15
DDR_A_D23DDR_A_D18
M_ODT3
DDR_A_D43
DDR_A_D34
M_CLK_DDR3
M_CLK_DDR#3
CLK_SMBDATA
DDR_A_DQS#2
DDR_A_D11
DDR_A_D38
M_CLK_DDR2
M_CLK_DDR#2
DDR_A_DQS#3
DDR_A_D8
DDR_A_DQS1
DDR_A_MA13
DDR_A_MA11
DDR_A_D61
DDR_A_MA2
DDR_A_D17
DDR_A_D12
DDR_A_D14
DDR_A_D16DDR_A_D20
DDR_A_D19
DDR_A_D22
DDR_A_D59
DDR_A_D60
DDR_A_D62
DDR_A_D56
DDR_A_D2
DDR_A_D3
DDR_A_D6
DDR_A_D4
DDR_A_D0
DDR_A_D1
DDR_A_D5
DDR_A_D7
DDR_A_D30
DDR_A_D31 DDR_A_D26
DDR_A_D27
DDR_A_D37
DDR_A_D33DDR_A_D32
DDR_A_D40
DDR_A_D47
DDR_A_D41
DDR_A_D44
DDR_A_D52
DDR_A_D48
DDR_A_D54
DDR_A_D55
DDR_A_D53
DDR_A_D49
DDR_A_D51
DDR_A_D50
DDR_A_MA15
DDR_A_DQS#[0..7]<6>
DDR_A_DM[0..7]<6>
DDR_A_D[0..63]<6>
DDR_A_MA[0..15]<6>
DDR_A_DQS[0..7]<6>
DDR_CKE2<6>
DDR_A_BS2<6>
M_CLK_DDR2<6>
M_CLK_DDR#2<6>
DDR_A_BS0<6>
DDR_A_WE#<6>
DDR_A_CAS#<6>
DDR_CS3#<6>
DDR_CKE3 <6>
DDR_A_BS1 <6>
DDR_A_RAS# <6>
DDR_CS2# <6>
M_ODT2 <6>
M_CLK_DDR3 <6>
M_CLK_DDR#3 <6>
M_ODT3 <6>
DRAMRST# <6>
CLK_SMBDATA <9,18>
CLK_SMBCLK <9,18>
+1.5V
+DIMM_VREF
+1.5V
+0.75VS
+0.75VS
+3VS
+1.5V +1.5V
+DIMM_VREF
+VREF_CA
+V_DDR_CPU_REF
+DIMM_VREF
+1.5V
+V_DDR_CPU_REF
+3VS
+1.5V
+3VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
10 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
10 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
10 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
20mils
Layout Note:
Place near JDDR1
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.75VS
3A@1.5V
0.65A@0.75V
DVT# SA0 change to
pull high +3VS
2011.06.14 Add C116 for ESD issue
2011.06.14 Add C119 for ESD issue
C119
0.1U_0402_16V4Z
C119
0.1U_0402_16V4Z
1
2
C114
0.1U_0402_16V4Z
C114
0.1U_0402_16V4Z
1
2
C101
4.7U_0603_6.3V6K
C101
4.7U_0603_6.3V6K
1
2
R879
0_0402_5%
R879
0_0402_5%
1 2
C213
0.1U_0402_16V4Z
@
C213
0.1U_0402_16V4Z
@
1
2
C111
0.1U_0402_16V4Z
C111
0.1U_0402_16V4Z
1
2
R76
1K_0402_1%
R76
1K_0402_1%
12
C105
2.2U_0603_6.3V6K
C105
2.2U_0603_6.3V6K
1
2
C107
0.1U_0402_16V4Z
C107
0.1U_0402_16V4Z
1
2
+
C106
330U_D2_2.5VY_R9M
+
C106
330U_D2_2.5VY_R9M
1
2
C102
4.7U_0603_6.3V6K
C102
4.7U_0603_6.3V6K
1
2
C100
22U_0805_6.3V6M
C100
22U_0805_6.3V6M
1
2
C118
0.1U_0402_16V4Z
C118
0.1U_0402_16V4Z
1
2
R513
10K_0402_5%
R513
10K_0402_5%
12
C215
0.1U_0402_16V4Z
C215
0.1U_0402_16V4Z
1
2
C110
0.1U_0402_16V4Z
C110
0.1U_0402_16V4Z
1
2
JDDR1
FOX_AS0A621-U4SG-7H
@
JDDR1
FOX_AS0A621-U4SG-7H
@
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT#
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VTT1
203
VTT2
204
G1
205
G2
206
CZ04
0.1U_0402_16V4Z
@
CZ04
0.1U_0402_16V4Z
@
1
2
C116
0.1U_0402_16V4Z
C116
0.1U_0402_16V4Z
1
2
C108
0.1U_0402_16V4Z
C108
0.1U_0402_16V4Z
1
2
R75
1K_0402_1%
R75
1K_0402_1%
12
R207
10K_0402_5%
R207
10K_0402_5%
1 2
C117
0.1U_0402_16V4Z
C117
0.1U_0402_16V4Z
1
2
C220
0.1U_0402_16V4Z
C220
0.1U_0402_16V4Z
1
2
C219
0.1U_0402_16V4Z
C219
0.1U_0402_16V4Z
1
2
C99
22U_0805_6.3V6M
C99
22U_0805_6.3V6M
1
2
R208
10K_0402_5%
R208
10K_0402_5%
12
C112
0.1U_0402_16V4Z
C112
0.1U_0402_16V4Z
1
2
C113
0.1U_0402_16V4Z
C113
0.1U_0402_16V4Z
1
2
C104
0.1U_0402_16V4Z
C104
0.1U_0402_16V4Z
1
2
CZ03
0.1U_0402_16V4Z
CZ03
0.1U_0402_16V4Z
1
2
C109
0.1U_0402_16V4Z
C109
0.1U_0402_16V4Z
1
2
R877 0_0402_5%R877 0_0402_5%
1 2
R74
1K_0402_1%
R74
1K_0402_1%
12
R77
1K_0402_1%
R77
1K_0402_1%
12
C214
2.2U_0402_6.3V6M
C214
2.2U_0402_6.3V6M
1
2
C115
0.1U_0402_16V4Z
C115
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
CLK_PCI_PCH
RSVD01
RSVD02
REQ1#
REQ2#
GPIO22
GPIO1
RSVD01
RSVD02
SERIRQ
H_INIT#
H_INTR
H_FERR#
H_NMI
EC_KBRST#
SERIRQ
H_SMI#
H_STPCLK#
GATEA20
SATALED#
H_A20M#
GATEA20
H_IGNNE#
PCI_RST#
CLK_PCI_PCH
PCI_STOP#
REQ1#
REQ2#
PCI_FRAME#
GPIO1
PCI_TRDY#
PCI_PERR#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQF#
PCI_PIRQB#
PCI_IRDY#
PCI_PIRQG#
PCI_PLOCK#
PCI_PIRQE#
PCI_PIRQH#
PCI_PIRQD#
PCI_DEVSEL#
GPIO22
PCI_RST#
SATARBIAS
H_FERR#
H_IGNNE#
H_CPUSLP#
CLK_PCI_PCH<9>
SATA_ITX_DRX_P0 <20>
SATA_ITX_DRX_N0 <20>
H_A20M# <7>
H_SMI# <7>
H_FERR# <7>
H_STPCLK# <7>
H_INIT# <7>
H_NMI <7>
H_INTR <7>
SATA_IRX_C_DTX_P0 <20>
SATA_IRX_C_DTX_N0 <20>
SATALED# <27>
CLK_PCIE_SATA <9>
CLK_PCIE_SATA# <9>
GATEA20 <25>
EC_KBRST# <25>
SERIRQ <25>
H_THERMTRIP# <7>
PCI_RST#<25>
H_CPUSLP# <7>
+3VS
+3VS
+1.05VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+1.05VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
11 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
11 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
11 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
For EMI, close to TigerPoint
Please closed Tiger point
PIN within 500 mils
For EC request.
R546 closed TigerPoint within 1"
2011.04.20 Stuff R544 for SPI mode
SPI
PCI
LPC
GPIO17 GPIO48
01
10
11
Signals have weak internal pull-ups
R548
10K_0402_5%
R548
10K_0402_5%
C1015
0.1U_0402_16V4Z
@
C1015
0.1U_0402_16V4Z
@
1
2
R546
60.4_0402_1%
R546
60.4_0402_1%
12
R545
1K_0402_5%
@
R545
1K_0402_5%
@
1 2
R542
10_0402_5%
@
R542
10_0402_5%
@
12
RP8
8.2K_0804_8P4R_5%
RP8
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
R539 8.2K_0402_5%R539 8.2K_0402_5%
1 2
R547 24.9_0402_1%R547 24.9_0402_1%
RP11
8.2K_0804_8P4R_5%
RP11
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP16
8.2K_0804_8P4R_5%
RP16
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
C1016
8.2P_0402_50V8D
@
C1016
8.2P_0402_50V8D
@
1
2
T66 PADT66 PAD
T63 PADT63 PAD
R550
8.2K_0402_5%
R550
8.2K_0402_5%
1 2
T64 PADT64 PAD
RP7
8.2K_0804_8P4R_5%
RP7
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
T65 PADT65 PAD
R930
1K_0402_5%
R930
1K_0402_5%
1 2
PCI
TGP
1
U15A
TIGERPOINT_ES1_BGA360
PCI
TGP
1
U15A
TIGERPOINT_ES1_BGA360
PIRQH#/GPIO5
F8
PIRQG#/GPIO4
H8
PIRQF#/GPIO3
D6
PIRQE#/GPIO2
E8
PIRQD#
H10
PIRQC#
B3
PIRQB#
D7
PIRQA#
B2
GPIO1
C9
GPIO22
C15
RSVD02
M13
REQ2#
A20
REQ1#
G16
RSVD01
K9
GPIO17/STRAP2#
A2
GPIO48/STRAP1#
G14
STRAP0#
D11
GNT2#
E16
GNT1#
A18
FRAME#
A16
PERR#
D10
TRDY#
A10
PLOCK#
A8
STOP#
F14
SERR#
B11
PME#
C22
IRDY#
B7
PCIRST#
A23
PCICLK
J12
DEVSEL#
B15
PAR
A5
C/BE3#
L16
C/BE2#
C13
C/BE1#
M15
C/BE0#
H16
AD31
B1
AD30
C1
AD29
C7
AD28
D9
AD27
C8
AD26
H12
AD25
G12
AD24
A6
AD23
B5
AD22
A3
AD21
B8
AD20
L12
AD19
B13
AD18
B9
AD17
E12
AD16
C11
AD15
E10
AD14
J14
AD13
L14
AD12
H14
AD11
E14
AD10
A13
AD9
D15
AD8
D16
AD7
B19
AD6
B18
AD5
C19
AD4
B17
AD3
C18
AD2
C17
AD1
D18
AD0
B22
R540 8.2K_0402_5%R540 8.2K_0402_5%
1 2
R544
10K_0402_5%
R544
10K_0402_5%
R543
10K_0402_5%
@R543
10K_0402_5%
@
R549
10K_0402_5%
R549
10K_0402_5%
R552
60.4_0402_1%
R552
60.4_0402_1%
12
3
TGP
HOST
SATA
U15C
TIGERPOINT_ES1_BGA360
3
TGP
HOST
SATA
U15C
TIGERPOINT_ES1_BGA360
SATA0RXN
AE6
SATA0RXP
AD6
SATA0TXN
AC7
SATA0TXP
AD7
SATA1RXN
AE8
SATA1RXP
AD8
SATA1TXN
AD9
SATA1TXP
AC9
SATA_CLKN
AD4
GPIO36
AD23
A20M#
Y20
CPUSLP#
Y21
IGNNE#
Y18
INIT3_3V#
AD21
INIT#
AC25
INTR
AB24
FERR#
Y22
NMI
T17
RCIN#
AC21
SERIRQ
AA16
SMI#
AA21
STPCLK#
V18
THRMTRIP#
AA20
RSVD03
R12
RSVD04
AE20
RSVD05
AD17
RSVD06
AC15
RSVD07
AD18
RSVD08
Y12
RSVD09
AA10
RSVD10
AA12
RSVD11
Y10
RSVD12
AD15
RSVD13
W10
RSVD14
V12
RSVD15
AE21
RSVD16
AE18
RSVD17
AD19
RSVD18
U12
RSVD19
AC17
RSVD20
AB13
RSVD21
AC13
RSVD22
AB15
RSVD23
Y14
RSVD24
AB16
RSVD25
AE24
RSVD26
AE23
RSVD27
AA14
RSVD28
V14
RSVD29
AD16
SATA_CLKP
AC4
SATARBIAS#
AD11
SATARBIAS
AC11
SATALED#
AD25
RSVD31
AB10
A20GATE
U16
RSVD30
AB11
R541
100K_0402_5%
R541
100K_0402_5%
12
RP10
8.2K_0804_8P4R_5%
RP10
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
R551
8.2K_0402_5%
R551
8.2K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_ITX_PRX_P2
PCIE_PTX_C_IRX_P2
PCIE_PTX_C_IRX_N2
PCIE_ITX_PRX_N2
USB20_P0
USB20_N5_L
USB20_P5_L
USB20_N7
USB20_P7
USB20_N6
USB20_P6
USB20_N0
USB_OC#7
USB_OC#3
USB_OC#2
SLP_CHG_M3_PCH
USB_OC#4_PCH
SLP_CHG_M4_PCH
CLK_PCH_48M
USB20_P1
USB20_N1
USB20_P4
USB_OC#4_PCH
USB_OC#2
SLP_CHG_M4_PCH
SLP_CHG_M3_PCH
USB20_N4
USB20_P5
USB_OC#7
USB_OC#3
USB_OC#0_1_PCH
USB_OC#0_1_PCH
USB_OC#0_1_PCH
USB20_N5_L
USB20_P5_L
USB20_N5
PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_ITX_PRX_P1
PCIE_ITX_PRX_N1
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3
CLK_PCIE_PCH#<9>
CLK_PCIE_PCH<9>
CLK_PCH_48M <9>
DMI_TXP0<6>
DMI_TXN0<6>
DMI_RXP0<6>
DMI_RXN0<6>
DMI_TXP1<6>
DMI_TXN1<6>
DMI_RXP1<6>
DMI_RXN1<6>
PCIE_PTX_C_IRX_P2<18>
PCIE_ITX_C_PRX_P2<18>
PCIE_PTX_C_IRX_N2<18>
PCIE_ITX_C_PRX_N2<18>
USB20_P0 <19>
USB20_N0 <19>
USB20_N6 <18>
USB20_N7 <17>
USB20_P7 <17>
USB20_P6 <18>
USB20_P1 <19>
USB20_N1 <19>
USB20_P4 <19>
USB20_N4 <19>
SLP_CHG_M3_PCH <19>
USB20_N3 <24>
USB20_P3 <24>
USB_OC#4_PCH <19>
USB_OC#0_1_PCH <19>
SLP_CHG_M4_PCH <19>
USB20_P5 <18>
USB20_N5 <18>
PCIE_PTX_C_IRX_P1<23>
PCIE_PTX_C_IRX_N1<23>
PCIE_ITX_C_PRX_P1<23>
PCIE_ITX_C_PRX_N1<23>
PCIE_PTX_C_IRX_P3<18>
PCIE_PTX_C_IRX_N3<18>
PCIE_ITX_C_PRX_N3<18>
PCIE_ITX_C_PRX_P3<18>
+1.5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
12 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
12 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019EG
B
SCHEAMTIC A6859
Custom
12 38Thursday, November 17, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
WLAN+BT Combo
WWLAN
USB3(Left)
CMOS
USB2(Right)
WLAN + BT (Combo)
USB1(Right)
Please closed Tiger point
PIN within 500 mils
Please closed Tiger point
PIN within 200 mils
For EMI, Close to TigerPoint
PORT
USB PORT LIST
USB0
#EVT DEVICE
USB2
USB3
USB4
USB5
USB6
USB7
USB1
USB2(Left)
USB1(Left)
USB3(Right)
WLAN + BT
CMOS
WWAN
WWAN
Card-reader
#6/27 EVT
NC
Card-reader
2010.07.12 RF request
LAN
C1023
22P_0402_50V8J
@
C1023
22P_0402_50V8J
@
1
2
R957
22.6_0402_1%
R957
22.6_0402_1%
T51PAD T51PAD
R554
33_0402_5%
@
R554
33_0402_5%
@
12
C1022 0.1U_0402_10V6KWWAN@C1022 0.1U_0402_10V6KWWAN@
12
L2
WCM2012F2S-900T04_0805
WWAN@L2
WCM2012F2S-900T04_0805
WWAN@
1
1
2
2
3
3
4
4
RP13
10K_0804_8P4R_5%
RP13
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
C1021 0.1U_0402_10V6KWWAN@C1021 0.1U_0402_10V6KWWAN@
12
T54PAD T54PAD
C1020 0.1U_0402_10V6KC1020 0.1U_0402_10V6K
12
C1017 0.1U_0402_10V6KWLAN@ C1017 0.1U_0402_10V6KWLAN@
12
T50 PADT50 PAD
R3 0_0402_5%@R3 0_0402_5%@
1 2
T49 PADT49 PAD
C1019 0.1U_0402_10V6KC1019 0.1U_0402_10V6K
12
T52PAD T52PAD
C1018 0.1U_0402_10V6KWLAN@ C1018 0.1U_0402_10V6KWLAN@
12
T53PAD T53PAD
R555 24.9_0402_1%R555 24.9_0402_1%
1 2
R4 0_0402_5%@R4 0_0402_5%@
1 2
2
TGP
USB
DMI PCI-E
U15B
TIGERPOINT_ES1_BGA360
2
TGP
USB
DMI PCI-E
U15B
TIGERPOINT_ES1_BGA360
DMI3RXN
V21
USBP0N
H7
USBP0P
H6
USBP1N
H3
USBP1P
H2
USBP2N
J2
USBP2P
J3
USBP3N
K6
USBP3P
K5
USBP4N
K1
USBP4P
K2
USBP5N
L2
USBP5P
L3
USBP6N
M6
USBP6P
M5
USBP7N
N1
USBP7P
N2
OC7#/GPIO31
C3
USBRBIAS
G2
USBRBIAS#
G3
CLK48
F4
DMI0RXN
R23
DMI0RXP
R24
DMI0TXN
P21
DMI0TXP
P20
DMI1RXN
T21
DMI1RXP
T20
DMI2RXP
T18
DMI2TXP
U24
DMI3RXP
V20
DMI3TXN
V24
DMI3TXP
V23
PERN1
K21
PERP1
K22
PETN1
J23
PETP1
J24
PERN2
M18
PERP2
M19
PETN2
K24
PETP2
K25
PERN3
L23
PERP3
L24
PETN3
L22
PETP3
M21
PERN4
P17
PERP4
P18
PETN4
N25
PETP4
N24
DMI_ZCOMP
H24
DMI_IRCOMP
J22
DMI_CLKN
W23
DMI_CLKP
W24
OC6#/GPIO30
C2
OC5#/GPIO29
E6
OC4#
E5
OC1#
C5
OC3#
D2
OC2#
D3
OC0#
D4
DMI2RXN
T19
DMI1TXP
T25
DMI1TXN
T24
DMI2TXN
U23
RP12
10K_0804_8P4R_5%
RP12
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
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