Nokia 2112, rh57 Baseband Description and Troubleshooting

Nokia Customer Care
2112 (RH-57) Series Transceivers
Troubleshooting — BB
Issue 1 07/2004 Company Confidential ©2004 Nokia Corporation
2112 (RH-57) Troubleshooting — BB Nokia Customer Care

Contents Page

2112 Baseband Module Overview .......................................................................................................... 4
Baseband and RF Architecture ................................................................................................................5
Power Up and Reset ....................................................................................................................................6
Power Up - Power Key............................................................................................................................. 8
Power Up - Charger ................................................................................................................................. 8
Power Up - RTC Alarm............................................................................................................................. 9
Power Off .......................................................................................................................................................9
Power Consumption and Operation Modes ......................................................................................... 9
Power Distribution ....................................................................................................................................10
Clock Distribution ......................................................................................................................................12
RFClk (19.2 MHz Analog)..................................................................................................................... 12
RFConvClk (19.2 MHz digital)............................................................................................................ 14
CBUS Clk Interface ................................................................................................................................ 15
DBUS Clk Interface ................................................................................................................................ 15
SleepCLK (Digital) .................................................................................................................................. 16
SleepCLK (Analog).................................................................................................................................. 16
Flash Programming ...................................................................................................................................17
Connections to Baseband.................................................................................................................... 17
Baseband Power Up .............................................................................................................................. 17
Flash Programming Indication ........................................................................................................... 17
Flashing..................................................................................................................................................... 18
Flash Programming Error Codes ........................................................................................................ 20
Charging Operation ...................................................................................................................................21
Battery ...................................................................................................................................................... 21
Charging Circuitry ................................................................................................................................. 21
Charger Detection.................................................................................................................................. 22
Charge Control ....................................................................................................................................... 23
Audio .............................................................................................................................................................23
Display and Keyboard ...............................................................................................................................23
Flashlight.................................................................................................................................................. 24
Accessories ..................................................................................................................................................24
Charging ................................................................................................................................................... 25
Tomahawk Headset Detection ........................................................................................................... 26
FBus Detection........................................................................................................................................ 27
Accessory Detection Through ACI..................................................................................................... 28
SIM CAR .......................................................................................................................................................29
Test Points ...................................................................................................................................................31
Troubleshooting .........................................................................................................................................33
Top Troubleshooting Map ........................................................................................................................34
Phone is Totally Dead ........................................................................................................................... 36
Flash Programming Does Not Work ................................................................................................. 37
Power Does Not Stay on or the Phone is Jammed ....................................................................... 39
Charger ..................................................................................................................................................... 41
Audio Faults............................................................................................................................................. 42
Display Faults.......................................................................................................................................... 46
Keypad Faults.......................................................................................................................................... 48
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Flashlight.................................................................................................................................................. 50
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Baseband Troubleshooting

2112 Baseband Module Overview

The baseband module of the 2112 transceiver is a CDMA single-band engine. The baseband architecture is based on the DCT4 Apollo engine.
The 2112 cellular baseband consists of three ASICs: Universal Energy Management (UEM), Universal Phone Processor (UPP), and a 64 megabit FLASH.
The baseband architecture supports a power-saving function called sleep mode. Sleep mode shuts off the VCTCXO, which is used as the system clock source for both the RF and the baseband. During sleep mode, the system runs from a 32 kHz crystal and all the RF regulators (VR1A, VR1B, VR2, … VR7) are off. The sleep time is determined by network parameters. Sleep mode is entered when both the MCU and the DSP are in standby mode and the normal VCTCXO clock is switched off. The phone is waken up by a timer running from this 32 kHz clock supply. The period of the sleep/wake up cycle (slotted cycle) is
1.28N seconds, where N= 0, 1, 2, depending on the slot cycle index.
2112 supports standard Nokia 2-wire and 3-wire chargers (ACP-x and LCH-x). However, the 3-wire chargers are treated as 2-wire chargers. The PWM control signal for controlling the 3-wire charger is ignored. UEM ASIC and EM SW control charging.
BL-5C Li-ion battery is used as main power source and has nominal capacity of 850 mAh.
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Baseband and RF Architecture

Charger
Bottom
Conn.
Sleep Clk
32 KHz
Audio
MBus
FBusRx
FBusT
x
SIM Reader
UEM
VR1A VR1B
VR2 VR3
VR4 VR5 VR6 VR7
VBatt
Battery
JTAG
VIO
VANA
V SIM
Vflash1
Vflash2
Dlight Klight
DC/DC
VPPPRODTP
CBus
u
B
D
MBus
FBus
GenIO
Control
s
Flash
C
ExtBus
UPP
Core
Alfred
Front
End
VCTCXO
19.2 MHz
RF
System
Connector
V Bat
Bus
UHF
SYNTH
Yoda
PA
VBatt
Figure 1: 2112 Power Distribution Diagram
Flashlight
V Bat
LCD/Key
Jedi
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Power Up and Reset

Power up and reset are controlled by the UEM ASIC. The baseband can be powered up in the following ways:
Pressing the Power button, which means grounding the PWRONX pin of the UEM
Connecting the charger to the charger input
Initiating the RTC Alarm, when the RTC logic has been programmed to give an alarm
After receiving one of the above signals, the UEM counts a 20 ms delay and then enters reset mode. The watchdog starts, and if the battery voltage is greater than Vcoff+, a 200 ms delay is started to allow references (etc.) to settle. After this delay elapses, the VFLASH1 regulator is enabled. Then, 500 us later, the VR3, VANA, VIO, and VCORE are enabled. Finally, the Power Up Reset (PURX) line is held low for 20 ms. This reset (PURX) is sent to the UPP. Resets are generated for the MCU and the DSP. During this reset phase, the UEM forces the VCTCXO regulator on — regardless of the status of the sleep control input signal to the UEM. The FLSRSTx from the UPP is used to reset the flash during power up and to put the flash in power down during sleep. All baseband regulators are switched on when the UEM is powered on. The UEM internal watchdogs are running during the UEM reset state, with the longest watchdog time selected. If the watchdog expires, the UEM returns to the power off state. The UEM watchdogs are internally acknowledged at the rising edge of the PURX signal to always give the same watchdog response time to the MCU.
The following timing diagram represents the UEM start-up sequence from reset to power-on mode.
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Figure 2: Power-on sequence and timing
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Power Up - Power Key

When the power key is pressed, the UEM enters the power-up sequence. Pressing the power key causes the PWRONX pin on the UEM to be grounded. The UEM PWRONX signal is not part of the keypad matrix. The power key is only connected to the UEM. This means that when pressing the power key an interrupt is generated to the UPP that starts the MCU. The MCU then reads the UEM interrupt register and notices that it is a PWRONX interrupt. The MCU reads the status of the PWRONX signal using the UEM control bus (CBUS). If the PWRONX signal stays low for a certain time the MCU accepts this as a valid power-on state and continues with the SW initialization of the baseband. If the power key does not indicate a valid power-on situation, the MCU powers off the baseband.

Power Up - Charger

In order to be able to detect and start charging in cases where the main battery is fully discharged (empty) and hence UEM has no supply (NO_SUPPLY or BACKUP mode of UEM), charging is controlled by start-up charging circuitry.
Whenever the VBAT level is detected to be below the master reset threshold (V charging is controlled by START_UP charge circuitry. Connecting a charger forces the
Figure 3: Measured power-on sequence and timing
MSTR-
),
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VCHAR input to rise above the charger detection threshold (VCH start-up charging is initiated. The UEM generates 100 mA constant output current from
the connected charger’s output voltage. The battery’s voltage rises at it charges, and when the VBAT voltage level is detected to be higher than master reset threshold limit (V
), the START_UP charge is terminated.
MSTR+
Monitoring the VBAT voltage level is done by charge control block (CHACON). A MSTRX=‘1’ output reset signal (internal to the UEM) is given to the UEM’s reset block when the VBAT>V
If the VBAT is detected to fall below V cancelled. It will restart if a new rising edge on VCHAR input is detected (VCHAR rising
above VCH
DET+

Power Up - RTC Alarm

If phone is in POWER_OFF mode when RTC alarm occurs, the wake-up procedure occurs. After the baseband is powered on, an interrupt is given to MCU. When an RTC alarm occurs during ACTIVE mode, the interrupt is generated to the MCU.

Power Off

).
and the UEM enters into the reset sequence.
MSTR+
during start-up charging, charging is
MSTR
) and by detection,
DET+
The baseband switches to power-off mode if any of following occurs:
Power key is pressed
Battery voltage is too low (VBATT < 3.2 V)
Watchdog timer register expires
The UEM controls the power-down procedure.

Power Consumption and Operation Modes

In POWER-OFF mode, the power (VBAT) is supplied to the UEM, vibra, LED, PA, and PA drivers (Tomcat and Hornet). During this mode, the current consumption is approximately 35 uA.
In the SLEEP mode, both processors (MCU and DSP) are in stand-by mode. The phone enters sleep mode only when both processors make this request. When the SLEEPX signal is detected low by the UEM, the phone enters sleep mode. The VIO and VFLASH1 regulators are put into low quiescent current mode, VCORE enters LDO mode, and the VANA and VFLASH2 regulators are disabled. All RF regulators are disabled during sleep mode. When the SLEEPX signal is detected high by the UEM, the phone enters ACTIVE mode and all functions are activated.
Sleep mode is exited either by the expiration of a sleep clock counter in the UEM or by some external interrupt (generated by a charger connection, key press, headset connection, etc.).
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In sleep mode, the VCTCXO is shut down and the 32 kHz sleep clock oscillator is used as a reference clock for the baseband.
In ACTIVE mode, the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. There are several sub-states in the active mode depending on the phone present state of the phone, such as burst reception, burst transmission, if the DSP is working, etc.
In active mode, SW controls the UEM RF regulators: VR1A and VR1B can be enabled or disabled. VSIM can be enabled or disabled and its output voltage can be programmed to be 1.8 V or 3.3 V. VR2 and VR4—VR7 can be enabled or disabled or forced into low quiescent current mode. VR3 is always enabled in active mode and disabled during Sleep mode and cannot be control by SW in the same way as the other regulators. VR3 will only turn off if both processors request to be in sleep mode.
CHARGING mode can be performed in parallel with any other operating mode. A BSI resistor inside the battery pack indicates the battery type/size. The resistor value corresponds to a specific battery capacity. This capacity value is related to the battery technology.
The battery voltage, temperature, size, and charging current are measured by the UEM, and the charging software running in the UPP controls it.
The charging control circuitry (CHACON) inside the UEM controls the charging current delivered from the charger to the battery and phone. The battery voltage rise is limited by turning the UEM switch off when the battery voltage has reached 4.2 V. The charging current is monitored by measuring the voltage drop across a 220 mOhm resistor.

Power Distribution

In normal operation, the baseband is powered from the phone‘s battery. The battery consists of one Lithium-Ion cell capacity of 850 mAh and some safety and protection circuits to prevent harm to the battery.
The UEM ASIC controls the power distribution to the whole phone through the BB and RF regulators excluding the power amplifier (PA), which has a continuous power rail directly from the battery. The battery feeds power directly to the following parts of the system:
•UEM
•PA
•Vibra
•Display
Keyboard lights
The heart of the power distribution to the phone is the power control block inside the UEM. It includes all the voltage regulators and feeds the power to the whole system. The UEM handles hardware power-up functions so the regulators are not powered and the power up reset (PURX) is not released if the battery voltage is less than 3 V.
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The 2112 baseband is powered from five different UEM regulators (see Table 1).
Table 1: Baseband Regulators
Regulator
VCORE 300 1.57/1.35 Power up default 1.57V and 1.35 in Sleep Mode.
VIO 150 1.8 Enabled always except during power-off mode
VFLASH1 70 2.78 Enabled always except during power-off mode
VFLASH2 40 2.78 Enabled only when data cable is connected
VANA 80 2.78 Enabled only when the system is awake (Off
VSIM 25 3.0 Enabled only when SIM card is used
Maximum Current (mA)
Vout (V) Notes
during sleep and power off-modes)
Table 2 includes the UEM regulators for the RF.
Table 2: RF Regulators
Regulator
VR1A 10 4.75 Enabled when cell transmitter is on
VR1B 10 4.75 Enabled when the transmitter is on
Maximum Current (mA)
Vout (V) Notes
VR2 100 2.78 Enabled when the transmitter is on
VR3 20 2.78 Enabled when SleepX is high
VR4 50 2.78 Enabled when the receiver is on
VR5 50 2.78 Enabled when the receiver is on
VR6 50 2.78 Enabled when the transmitter is on
VR7 45 2.78 Enabled when the receiver is on
The charge pump that is used by VR1A is constructed around the UEM. The charge pump works with the Cbus (1.2 MHz) oscillator and gives a 4.75 V regulated output voltage to the RF.
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Clock Distribution

RFClk (19.2 MHz Analog)

The main clock signal for the baseband is generated from the voltage and temperature controlled crystal oscillator VCTCXO (G500). This 19.2 MHz clock signal is generated at the RF and is fed to Yoda pin 18 (TCXO_IN). Yoda then converts the analog sine waveform to a digital waveform with a swing voltage of 0 tot 1.8 V and sends it to the UPP from pin 16 at Yoda (19.2 Out) to the UPP pin M5 (RFCLK).
Figure 4: Waveform of the 19.2 MHz clock (VCTCXO) going to the Yoda ASIC
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Figure 5 shows the RFCLK signal for the UPP.
Figure 5: Waveform of the 19.2 MHz Clk going to the UPP for Yoda ASIC at C711
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RFConvClk (19.2 MHz digital)

The UPP distributes the 19.2 MHz internal clock to the DSP and MCU, where the SW multiplies this clock by seven for the DSP and by two for the MCU.
Figure 6: RFCovCLk waveform
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CBUS Clk Interface

A 1.2 MHz clock signal is used for CBUS, which is used by the MCU to transfer data between the UEM and UPP.

DBUS Clk Interface

A 9.6 MHz clock signal is used for DBUS, which is used by the DSP to transfer data between the UEM and UPP.
Figure 7: Cbus data transfer
Figure 8: Dbus data transferring
The system clock is stopped during sleep mode by disabling the VCTCXO power supply (VR3) from the UEM regulator output by turning off the controlled output signal SleepX from the UPP.
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