Video FormatPAL/NTSC
Input Level/Impedance1Vp-p/75 ohms
Output Level/Impedance1Vp-p/75 ohms
Video Frequency Response
(Composite and S-Video)10Hz–8MHz (-3dB)
Video Frequency
Response (Component)10Hz–100MHz (-3dB)
™
HDMI
Audio and video processing
General
Power RequirementAC 220–240V/50Hz
Power Consumption65W idle, 540W maximum
(7 channels driven)
Dimensions (Max)
Width440mm
Height165mm
Depth382mm
Weight13.6 kg
This product incorporates copyright protection technology that is protected by method
claims of certain U.S.patents and other intellectual property rights owned by Macrovision
Corporation and other rights owners. Use of this copyright protection technology must be
authorized by Macrovision Corporation, and is intended for home and other limited viewing
uses only unless otherwise authorized by Macrovision Corporation. Reverse engineering or
disassembly is prohibited.
Depth measurement includes knobs, buttons and terminal connections.
Height measurement includes feet and chassis.
All features and specifications are subject to change without notice.
Harman Kardon, The Bridge and Logic 7 are registered trademarks of
Harman International Industries, Incorporated.
is a trademark of Harman International Industries, Inc.
*Manufactured under license from Dolby Laboratories.
“Dolby,”“Pro Logic” and the Double-D symbol are
trademarks of Dolby Laboratories.
"DTS","DTS ES","Neo:6"and"96/24" are trademarks of DTS,Inc.
SA-CD is a trademark of Sony Electronics, Inc.
Blu-ray Disc is a trademark of the Blu-ray Disc Association.
Apple and iPod are registered trademarks of Apple Computer, Inc.
Cirrus is a registered trademark of Cirrus Logic Corp.
**Without input anti slewing and output isolation networks.
Faroudja and DCDi by Faroudja are trademarks of Genesis Microchip, Inc.
HD-DVD is a trademark of the DVD Format/Logo Licensing Corporation (DVD FLLC).
HDMI, the HDMI logo and High-Definition Multimedia Interface are trademarks or
registered trademarks of HDMI Licensing, LLC.
Troubleshooting Guide
harman/kardon
AVR247/230 Service Manual
Page 4 of 131
SYMPTOMCAUSESOLUTION
Unit does not function when Main• No AC Power• Make certain AC power cord is plugged
Power Switch
Display lights, but no sound • Intermittent input connections• Make certain that all input and speaker
or pictureconnections are secure
No sound from any speaker;• Amplifier is in protection mode• Check speaker-wire connections for shorts at receiver
light around Power switch
No sound from surround or • Incorrect surround mode• Select a mode other than Stereo
center speakers• Input is mono• There is no surround information from mono sources (except with
Unit does not respond to • Weak batteries in remote• Change remote batteries
remote commands• Wrong device selected• Press the AVR Selector
1
is pushedinto a live outlet
• Check to see if outlet is switch controlled
• Mute is on• Press Mute button
• Volume control is down• Turn up volume control
2
is reddue to possible shortand speaker ends
• Amplifier is in protection mode • Contact your local Harman Kardon service depot
due to internal problems
• Stereo or Mono program material• Some surround modes may not create rear-channel information
from nonencoded programs
• Remote sensor Úis obscured• Make certain front-panel sensor is visible to remote or
connect remote sensor
5
Intermittent buzzing in tuner• Local interference• Move unit or antenna away from computers, fluorescent lights,
motors or other electrical appliances
Letters flash in the Channel Indicator• Digital audio feed paused• Resume play for DVD
Display $and Digital Audio stops• Check that Digital Signal is fed to the Digital Input selected
Processor Reset
In the rare case where the unit’s operation or the
displays seem abnormal, the cause may involve
the erratic operation of the system’s memory or
microprocessor.
To correct this problem, first unplug the unit from
the AC wall outlet and wait at least three
minutes. After the pause,reconnect the AC
power cord and check the unit’s operation.If the
system still malfunctions, a system reset may
clear the problem.
To clear the AVR’s entire system memory
including tuner presets, output level settings,
delay times and speaker configuration data, first
put the unit in Standby by pressing the SystemPower Control button
the Tone Mode button
The unit will turn on automatically. Note that
once you have cleared the memory in this manner,
it is necessary to re-establish all system
configuration settings and tuner presets.
2
. Next press and hold
8
for three seconds.
NOTE: Resetting the processor will erase any
configuration settings you have made for
speakers,output levels, surround modes, digital
input assignments as well as the tuner presets.
After a reset the unit will be returned to the
factory presets, and all settings for these items
must be reentered.
If the system is still operating incorrectly,there
may have been an electronic discharge or severe
AC line interference that has corrupted the
memory or microprocessor.
If these steps do not solve the problem, consult
an authorized Harman Kardon service depot.
1. Instruction manual ass'y - Accessories
harman/kardon
AVR247/230 Service Manual
Page 5 of 131
2. Package Drawing
MICROPHONE ASS'Y
7
AVR247/230
1
5
9
POLY BAG
COVER ASS'Y
POLY BAG
2
AM LOOP ANTENNA ASS'Y
6
IMAGE BROCHURES
10
BOOKLET,INFORMATION
3
BATTERY ASS'Y
7
REMOCON ASS'Y
11
MANUAL INSTRUCTION
4
FM 1 POLE ANT
8
STAPLE
12
MANUAL SETUP GUIDE
2
SNOW PAD (L)
SET
4
ACCESSORY-1
1
SNOW PAD (R)
3
BOX ,OUT CARTON
5
13
STAPLE
NODESCRIPTIONPARTS NO.Q,ty
1
2
3
4
FM 1 POL ANTCSA1A018Z1
5
COVER ASS'YCGRAVR130/230ZA
COVER A
1
COVER B
2
SHEET,FRONT COVER
3
4
PAD , COVER
BAG , POLY
5
6IMAGE BROCHURESHQE1A273Z1
7
REMOCON ASS'YCARTAVR247/2301
8STAPLECPL09053
A
MICROPHONE ASS'Y
CPB1061WPOLY BAG
CSA1A027ZAM LOOP ANTENNA ASS'Y1
CABR03P3BATTERY3
CGR1A331M7H431
CQE1A220Z
CPS1A6761
CPB1A176Z1
ACCESSORY-2
ACCESSORY-2ACCESSORY-1
NODESCRIPTIONPARTS NO.Q,ty
1
1
1
1CGR1A332M7H43
1
9
BOOKLET,INFORMATION
10
11
MANUAL ,SETUP GUIDE
12
13
STAPLECPL09053
AMICROPHONE ASS'TCJXAVR340MICRO1
CQE1A180Z1
CQX1A1255ZMANUAL,INSTRUCTION
CQX1A1256Z
1CPB1061WPOLY BAG
1
1
ACCESSORY-1
1
21SNOW,PAD(L)
3
SETAVR247/230SET1
4
BOX,OUT CARTON
5
ACCESSORY-26CQXAVR247/2301
MICROPHONE ASS'Y7CJXAVR340MICRO1
DESCRIPTIONNO
CQXAVR247/230
CPS6A564
CPS6A565SNOW,PAD(R)
CPG1A822U
6
Q,tyPARTS NO.
1
1
1
DISASSEMBLY
harman/kardon
AVR247/230 Service Manual
Page 6 of 131
AVR247/230
1. Removing the Top Cabinet
Remove the Screws
6
4
5
3. Removing the Rear Panel
13
1
~
10
9
11
7
8
12
13
3
1
2
Remove the Screws
10
11
12
13
14
15
16
25
26
9
7654
8
272930
33
1
~
21
22
23 24
28
31
18
17
1
3
2
32
33
19 20
9
8
4. Removing the Main PCB
17
Remove the Screws
~
2. Removing the Front Panel
Remove the Screws
7
6
5
1
4
2
3
19
~
1
5
2
6
3
4
7
DISASSEMBLY PROCEDURES (AVR247)
harman/kardon
AVR247/230 Service Manual
Page 7 of 131
<1> TOP-CABINET(21) REMOVAL
1. Remove 13 screws(S1,S7) and then remove the Top-cabinet.
<2> FRONT PANEL ASS’Y REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Disconnect the card cable between conn
and connector(CN72) on the Input PCB(39-1).
3. Disconnect the lead wire(BN81-8P) on the Fip PCB(37-1) from connector(CN81) on the Trans PCB(40-4).
4. Disconnect the lead wire(BN22-6P) on the Phone PCB(
5. Disconnect the lead wire(BN18-5P) on the Phone PCB(
6. Disconnect the lead wire(BN10-4P) on the Volume PCB(37-6) from conn
7. Disconnect the lead wire(BN41-6P) on the Volume PCB(37-6) from conn
8. Disconnect the lead wire(BN90-2P) on the Main PCB(38
9. Remove 1 screw(S10) and then lead wire(JW82-1P,JW83-1P) on the Phone PCB(37-5).
10 .Remove 1screw(S10) and then lead wire(JW84-1P) on the Volume PCB(37-3).
11. Remove 10 scre ws(S1) and then remov e the Front Panel ASS’Y.
<3> Volume PCB(37-6) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Front Panel ASS’Y, referring to the previous step<2>.
3. Pull out the Volume Knob ASS’Y.
4. Disconnect connector(CN84) on the Volume PCB(37-6) from the lead
5. Disconnect the lead wire(BN92-5P)on the Volume PCB(
6. Remove 8 screws(S2,S14), and then remove the Volume PCB(37-6).
<4>PHONE PCB(37-5) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Front Panel ASS’Y, referring to the previous step<2>.
3. Disconnect connector(CN92) on the Phone PCB(37-5) from the lead wire(BN92-5P) on the Volume PCB(37-6).
4.. Disconnect connector(CN85)on the Phone PCB(37-5) from the lead wire(BN85-3P) on the Fip PCB(37-1).
5. Remove 2 screws(S2) and then remove the Phone PCB(37-5).
<5>POWER LED PCB(37-3) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Front Panel ASS’Y, referring to the previous step<2>.
3. Disconnect connector(CN88) on the Power Led PCB(37-3) from the lea
4. Remove 2 screws(S2) and then remove the Power led PCB(37-3).
<6>FIP PCB(37-1) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Front Panel ASS’Y, referring to the previous step<2>.
3. Disconnect the lead wire(BN84-5P) on the Fip PCB(3
4. Disconnect the lead wire(BN85-3P) on the Fip PCB(37
5. Disconnect the lead wire(BN88-4P) on the Fip PCB(37
ector(CN72-17p) on the Fip PCB(37-1)
37-5) from connector(CN22) on the Input PCB(39-1).
37-5) from connector(CN18) on the Input PCB(39-1).
ector(CN10) on the Input PCB(39-1).
ector(CN41) on the Video PCB(41).
-1) from connector(CN86) on the Moms PCB(37-4).
ire(BN84-5P) on the Fip PCB(37-1).
w
37-6) from connector(CN92) on the Phone PCB(37-5).
wire(BN88-4P) on the Fip PCB(37-1) .
d
-1) from connector(CN84) on the Volume PCB(37-6).
7
-1) from connector(CN85) on the Phone PCB(37-5).
-1) from connector(CN88) on the Power Led PCB(37-3).
6. Disconnect the connector (CN89) on the Fip PCB(37-1) from lead wire(BN89-4P) on the Key PCB(37-2).
harman/kardon
AVR247/230 Service Manual
Page 8 of 131
7. Remove 3 screws(S2) and then remove the Guide PCB(37-8) & the Fip PCB(37-1).
<7>KEY PCB(37-2) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Front Panel ASS’Y, referring to the previous step<2>.
3. Remove the Fip PCB(37-1), referring to the previous step<6>.
4. Remove 10 screws(S2) and then remove the Key PCB(37-2).
<8>TUNER MODULE(44) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Disconnect the card cable between conne
ctor(CON1-1
3P) on the Tuner module(44)
and connector(CN13) on the Input PCB(39-1).
3. Remove 2 screws(S8) and then remove the Tuner Module(44).
<9>HUDSON PCB(42) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Disconnect connector(CN80) on the HUDSON PCB(42) from the lead
ire(BN80-3P) on the RS232 PCB(37-7).
w
3. Remove 3 screws(S15).
4. Disconnect the board to board connector between and connector(CN81-44P) on the HUDSON PCB(42)
and connector(BN81-44P) on VIDEO PCB(41) and then r
emove the HUDSON PCB(42).
<10>VIDEO PCB(41) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Hudson PCB(42), referring to
3. Disconnect the card cable between conn
the previ
ector(BN14-17p) on the Video PCB(41)
ous step<9>.
and connector(CN14) on the Input PCB(39-1).
4. Disconnect connector(CN43) on the Video PCB(41)
from the lead wire(BN43-3P) on the Regul
5. Disconnect connector(CN41) on the Video PCB(41) from
the lead wire(BN41-6P) on the Volume PCB(37-6).
ator PCB(A)(40-2).
6. Disconnect the card cable between connector(CN42) on the Video PCB(41)
and connector(BN44-7P) on the iPod PCB(39-2).
7. Disconnect the card cable between connector(BN15-15P) on the Video PCB(41)
and connector(CN15-15P) on the INPUT PCB(39-1).
8. Remove 6 screws(S8) and then remove the Video PCB(41).
<11>iPod PCB(39-2) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Hudson PCB(42), referring to
the previ
ous step<9>.
3. Remove the Video PCB(41), referring to the previous step<10>
4. Disconnect the card cable between connector(BN19-15P) on the the iPod PCB(39-2)
and connector(CN19) on the Input PCB(39-1).
5. Disconnect the card cable between conne
ctor(BN44-
7P) on the iPod PCB(39-2)
and connector(CN42) on the Video PCB(41).
6. Disconnect the card cable between connector(CN47-7P) on the iPod PCB(39-2)
and connector(CN47) on the RS232 PCB(37-7).
7. Disconnect the board to board connector betw
en and connector(CN23) on the XM PCB(39-4)
e
and connector(BN17-12P) on the iPod PCB(39-2).
8. Remove 2 screws(S13) and then remove the iPod PCB(39-2).
harman/kardon
AVR247/230 Service Manual
Page 9 of 131
<12>XM PCB(39-4) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Hudson PCB(42), referring to the previ
ous step<9>.
3. Remove the Video PCB(41), referring to the previous step<10>
4. Disconnect the card cable between connector(BN21-7P) on XM PCB(39-4)
and connector(CN21) on the input PCB(39-1).
5. Disconnect the lead wire(BN85-2P) on the XM PCB(39-4) from connector(CN85) on the Regulator PCB(A)(40-2).
6. Disconnect the board to board connector betwe
en and connector(CN23) on the XM PCB(39-4)
and connector(BN17-12P) on the iPod PCB(39-2).
7. Remove 1 screws(S15) and then remove the XM PCB(39-4).
<13>RS232 PCB(37-7) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Hudson PCB(42), referring to
the previ
ous step<9>.
3. Remove the Video PCB(41), referring to the previous step<10>.
4. Disconnect the card cable between conne
ctor(CN47-
7P) on the iPod PCB(39-2)
and connector(CN47) on the RS232 PCB(37-7).
5.Remove 2 screws and then remove the RS232 PCB(37-7).
<14>INPUT PCB(39-1) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Tuner module(44), referring to the previous step<8>.
3. Remove the Hudson PCB(42), referring to the previ
ous step<9>.
4. Remove the Video PCB(41), referring to the previous step<10>.
5. Disconnect connector(CN20) on the the Input PCB(39-1)
from the lead wire(BN20-5P) on the Regul
6. Disconnect connector(CN22) on the Input PCB(39-1) from the lead w
7. Disconnect connector(CN18) on the Input PCB(39-1) from the lead w
8. Disconnect connector(CN10) on the Input PCB(39-1) from the lead w
9. Disconnect the card cable between connector(CN14) on the
ator PCB(B)(40-5).
ire(BN22-6P) on the Phone PCB(37-5).
ire(BN18-5P) on the Phone PCB(37-5)
ire(BN10-4P) on the Volume PCB(37-6).
Input PCB(39-1).
and connector(BN14-17P) on the Video PCB(41).
10. Disconnect the card cable between connector(CN19) on the Input PCB(39-1)
and connector(BN19-15P) on the I-Pod PCB(39-2).
11. Disconnect the card cab le between connector(CN21) on the input PCB(39-1)
and connector(BN21-7P) on XM PCB(43).
12. Disconnect the card cable between connector(CN12-21p) on the Input PCB(39-1)
and connector(CN12-21p)) on the main PCB(38-1)
13. Disconnect the card cable between connector(CN11-17p) on the Input PCB(39-1)
and connector(CN11) on the main PCB(38-1)
14. Disconnect the card cable between con
n
ector(CN72) on the Input PCB(39-1)
and connector(CN72-17p) on the Fip PCB(37-1)
15. Remove 11 screws(S8,S15) and then remove the Inp ut PCB(39-1).
<15>POWER TRANS(36) & POWER PCB ASS’Y(40) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Disconnect lead wire of the Power Trans(36) from connector (CN91-3P) on the Main PCB(38-1)
3. Disconnect connector(CN19-3P,CN20-4P) on TRANS PCB(40-3)
from the lead wire(BN19-3P,BN20-4P) on the Main PCB(38-1).
harman/kardon
AVR247/230 Service Manual
Page 10 of 131
4. Disconnect the lead wire(BN96-8P) on the Power PCB(40-4)
from connector(CN96) on the Regulator PCB(B)(40-5).
5. Disconnect the lead wire(BN99-8P) on the Power PCB(40-4)
from connector(CN99) on the Regulator PCB(A)(40-2).
6. Disconnect connector(CN81) on the Trans PCB(40-4) from the lead
wire(BN81-8P) on the Fip PCB(37-1).
7. Remove 4 Trans screws(S9) and then remove the Power Trans(36)& Power PCB ASS’Y(40) REMOVAL .
<16>REMOTE PCB ASS’Y(40-7) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2.Disconnect connector(CN88) on the remote PCB(40-7) from
the lead wire(BN88-6P) on the Main PCB(38-1)
3. Remove 3screws(S13) and then remove the Remote PCB ASS’Y(40-7).
<17>MAIN PCB ASS’Y(38-1) REMOVAL
1. Remove the Top-cabinet, referring to the previous step<1>.
2. Remove the Tuner module(44), referring to the previous step<8>.
3. Remove the Hudson PCB(42), referring to
the previ
ous step<9>.
4. Remove the Video PCB(41), referring to the previous step<10>.
5. Remove the iPod PCB(39-2), referring to the previous step<11>.
6. Remove the XM PCB(39-4), referring to the previous step<12>.
7. Remove the RS232 PCB(37-7), referring to the previous step<13>.
8. Remove the Input PCB(39-1), referring to the previ
ous step<14>.
9. Remove the AC Cord(35) on the Main PCB(38-1)
10. Disconnect the lead wire(BN90-2P) on the Main PCB(38-1) from connector(CN86) on Moms PCB(37-4).
11. Disconnect conn ector (CN91-3P) on the Main PCB(38-
1) from lead wire of the Power Trans(36)
12. Disconnect the lead wire(BN89-2P) on the Main PCB(38-1)
from connector(CN89) on Regulator PCB(A)(40-2).
13. Disconnect the lead wire(BN19-3P,BN20-4P) on the Main PCB(38-1)
from connector(CN19-3P,CN20-4P) on TRANS PCB(40-4).
14. Disconnect the lead wire(BN88-6P) on the Main PCB(38
15. Disconnect the lead wire of the DC, FAN(49) from connector(CN
16. Remove 11screws(S13-1EA, S4-2EA, S6-2EA, S8-6EA) and then
-1) from connector(CN88) on remote PCB(40-7).
89-2P) on the Main PCB(38-1).
The 74ACT04 is an advanced high-speed CMOS
HEX INVERTER fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology.
The internal circuit is composed of 3 stages
including buffer output , which enables high noise
immunity and stable output.
TSSOPDIPSOP
ORDER CODES
PACKAGETUBET & R
DIP74ACT04B
SOP74ACT04M74ACT04MTR
TSSOP74ACT04TTR
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
74LCX32
harman/kardon
AVR247/230 Service Manual
Page 57 of 131
LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE
WITH 5V TOLERANT INPUTS
■ 5V TOLERANT INPUTS
■ HIGH SPEED:
t
= 5.2ns (MAX.) at VCC = 3V
PD
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 24mA (MIN) at VCC = 3V
OH
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ OPERATI N G VOLTAGE RANGE:
V
CC
PHL
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 32
■ LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX32 is a low voltage CMOS QUAD
2-INPUT OR GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
TSSOPSOP
Table 1: Order Codes
PACKAGET & R
SOP74LCX32MTR
TSSOP74LCX32TTR
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to 5V
signal environment for inputs.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Conne ction And IEC Logic Symbols
September 2004
Rev. 6
LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP
harman/kardon
AVR247/230 Service Manual
Page 58 of 131
■ 5V TOLERANT INPUTS
■ HIGH SPEED :
f
= 150 MHz (MAX.) at VCC=3V
MAX
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL= 24mA (MIN) at VCC=3V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
PHL
■ OPERATING VOLTAGE RANGE:
VCC(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
■ LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX74 is a low voltage CMOS DUAL
D-TYPE FLIP FLOP WITH PRESET AND CLEAR
NON INVERTING fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to 5V
signal environment for inputs.
74LCX74
WITH 5V TOLERANT INPUTS
TSSOPSOP
ORDER CODES
PACKAGETUBET & R
SOP74LCX74M74LCX74MTR
TSSOP74LCX74TTR
A signal on the D INPUT is transferred to the Q
OUTPUT duringthe positive going transitionof the
clock pulse.
CLR and PR are independent of the clock and
accomplished by a low setting on the appropriate
input.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/11September 2001
74VHC08
harman/kardon
AVR247/230 Service Manual
Page 59 of 131
QUAD 2-INPUT AND GATE
■ HIGH SPEED: t
■ LOW POWER DISSIPATION:
I
= 2 µA (MAX.) at TA=25°C
CC
■ HIGH NOISE IMMUNITY:
V
= V
NIH
■ POWER DOWN PROTECTION ON INPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 8mA (MIN)
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ OPERATI N G VOLTAGE RANGE:
V
(OPR) = 2V to 5.5V
CC
■ PIN AND FUNCTION COMPATIBLE WITH
= 28% VCC (MIN.)
NIL
PHL
= 4.3 ns (TYP.) at VCC = 5V
PD
74 SERIES 08
■ IMPROVED LATCH-UP IMMUNITY
■ LOW NOISE: V
= 0.8V (MAX.)
OLP
DESCRIPTION
The 74VHC08 is a n advanced high-speed CMOS
QUAD 2-INPUT AND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 2 stages
including buffer ou tput, which provides high no ise
immunity and stable output.
TSSOPSOP
ORDER CODES
PACKAGETUBET & R
SOP74VHC08M74VHC08MTR
TSSOP74VHC08TTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2001
1
2
NC = NO CONNECT
V+
NC (OR V–)
V–
3
TOP
VIEW
QUANTITY
TEMPERATURE DRIFT – ppm/°C
0
–40
5
10
15
20
25
30
35
40
45
50
–30–20–10
0
10203040
QUANTITY
OUTPUT ERROR – mV
0
–10
50
100
150
200
250
300
–8–6 –4–202410
68
1.2 V Micropower, Precision
harman/kardon
AVR247/230 Service Manual
Page 60 of 131
a
FEATURES
Wide Operating Range: 50 mA–10 mA
Initial Accuracy: 60.1% max
Temperature Drift: 650 ppm/8C max
Output Impedance: 0.5 V max
Wideband Noise (10 Hz–10 kHz): 20 mV rms
Operating Temperature Range: –408C to +858C
High ESD Rating
4 kV Human Body Model
400 V Machine Model
Compact, Surface-Mount, SOT-23 Package
GENERAL DESCRIPTION
The AD1580 is a low cost, two-terminal (shunt), precision
bandgap reference. It provides an accurate 1.225 V output for
input currents between 50 µA and 10 mA.
The AD1580’s superior accuracy and stability is made possible
by the precise matching and thermal tracking of on-chip
components. Proprietary curvature correction design techniques
have been used to minimize the nonlinearities in the voltage
output temperature characteristics. The AD1580 is stable with
any value of capacitive load.
The low minimum operating current makes the AD1580 ideal
for use in battery powered 3 V or 5 V systems. However, the
wide operating current range means that the AD1580 is
extremely versatile and suitable for use in a wide variety of high
current applications.
The AD1580 is available in two grades, A and B, both of which
are provided in an SOT-23 package, the smallest surface mount
package available on the market. Both grades are specified over
the industrial temperature range of –40°C to +85°C.
2. Computer Workstations
Suitable for use with a wide range of video RAMDACs.
3. Smart Industrial Transmitters
4. PCMCIA Cards.
5. Automotive.
6. 3 V/5 V 8–12-Bit Data Converters.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700Fax: 617/326-8703
ADV7322 Preliminary Technical Data
harman/kardon
AVR247/230 Service Manual
Page 61 of 131
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
DD_IO
TEST0
TEST1
V
DGND
TEST2
TEST3
Y0
Y1
Y2
Y3
Y4
Y5
DD
Y6
Y7
C0
GND_IO63CLKIN_B62S761S660S559S458S357DGND56V
64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN 1
17C118C219
20
C
2
I
ALSB
DD
55S254S153S052
ADV7322
TOP VIEW
(Not to Scale)
21
22
23
24
25
26C327C428C529C630C731
SDA
SCLK
P_VSYNC
P_HSYNC
P_BLANK
Figure 19. Pin Configuration
TEST551TEST450S_HSYNC
S_VSYNC
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
CLKIN_A
RTC_SCR_TR
S_BLANK
R
SET1
V
REF
COMP1
DAC A
DAC B
DAC C
V
AA
AGND
DAC D
DAC E
DAC F
COMP2
R
SET2
EXT_LF
RESET
05067-019
Rev. PrA | Page 18 of 88
Preliminary Technical Data ADV7322
harman/kardon
AVR247/230 Service Manual
Page 62 of 131
Table 6. Pin Function Descriptions
Mnemonic Input/Output Function
DGND G Digital Ground.
AGND G Analog Ground.
CLKIN_A I Pixel Clock Input for HD (74.25 MHz Only, PS Only (27 MHz), SD Only (27 MHz).
CLKIN_B I
COMP1,
O Compensation Pin for DACs. Connect 0.1 µF capacitor from COMP pin to V
COMP2
DAC A O CVBS/Green/Y/Y Analog Output.
DAC B O Chroma/Blue/U/Pb Analog Output.
DAC C O Luma/Red/V/Pr Analog Output.
DAC D O
DAC E O
DAC F O
P_HSYNC
P_VSYNC
P_BLANK
S_BLANK
S_HSYNC
S_VSYNC
I Video Horizontal Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
I Video Vertical Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
I Video Blanking Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
I/O Video Blanking Control Signal for SD Only.
I/O Video Horizontal Sync Control Signal for SD Only.
I/O Video Vertical Sync Control Signal for SD Only.
Y7 to Y0 I
C7 to C0 I
S7 to S0 I SD or Progressive Scan/HDTV Input Port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on Pin S0.
RESET
R
SET1
, R
SET2
I
I
SCLK I I2C Port Serial Interface Clock Input.
SDA I/O I2C Port Serial Data Input/Output.
ALSB I
V
P Power Supply for Digital Inputs and Outputs.
DD_IO
VDD P Digital Power Supply.
VAA P Analog Power Supply.
V
I/O Optional External Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
REF
EXT_LF I External Loop Filter for the Internal PLL.
RTC_SCR_TR I Multifunctional Input. Real time control (RTC) input, timing reset input, subcarrier reset input.
I2C I This input pin must be tied high (V
GND_IO Digital Input/Output Ground.
TEST0 to
I Not used. Tie to DGND
TEST5
Pixel Clock Input. Requires a 27 MHz reference clock for progressive scan mode or a 74.25 MHz (74.1758
MHz) reference clock in HDTV mode. This clock is only used in dual modes.
.
AA
In SD Only Mode: CVBS/Green/Y Analog Output; in HD Only Mode and Simultaneous HD/SD Mode:
Y/Green [HD] Analog Output.
In SD Only Mode: Luma/Blue/U Analog Output; in HD Only Mode and Simultaneous HD/SD Mode: Pr/Red
Analog Output.
In SD Only Mode: Chroma/Red/V Analog Output; in HD Only Mode and Simultaneous HD/SD Mode:
Pb/Blue [HD] Analog Output.
SD or Progressive Scan/HDTV Input Port for Y Data. Input port for interleaved progressive scan data. The
LSB is set up on Pin Y0.
Progressive Scan/HDTV Input Port 4:4:4 Input Mode. This port is used for the Cb [Blue/U] data. The LSB is
set up on Pin C0.
This input resets the on-chip timing generator and sets the ADV7322 into default register setting.
RESET
an active low signal.
A 3040 Ω resistor must be connected from this pin to AGND and is used to control the amplitudes of the
DAC outputs.
2
TTL Address Input. This signal sets up the LSB of the I
activated, which reduces noise on the I
2
C interface.
) for the ADV7322 to interface over the I2C port.
DD_IO
C address. When this pin is tied low, the I2C filter is
is
Rev. PrA | Page 19 of 88
Features
harman/kardon
AVR247/230 Service Manual
Page 63 of 131
• Low-volta ge and Stand ard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (V
• Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
• Two-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility
• Die Sales: Wafer Form, Waffle Pack and B um pe d Wafers
= 1.8V to 5.5V)
CC
Two-wire
Serial EEPROM
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
8K (1024 x 8)
Description
The AT24C01A/02/04/08A/16A provides 1024/2048/4 096/8192/16384 bits of ser ial
electrically erasable and programmable read-only memor y (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The A T24C01A/02/04/08A/16A is available in space-saving 8-lead PDIP,
8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23 (AT24C01 A/AT24C02/AT24C04), 8lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to
To provide the greatest flexibility, the memory array of the AT26DF081A can be erased in four
levels of granularity including a full chip erase. In addition, the array has been divided into physical sectors of various si zes, of which each sector can be individually pr otected from progra m
and erase operations. The si zes of the physical sec tors are optim ized for bo th code and d ata
storage applicati ons, allowi ng both cod e and data segments to resid e in their ow n isolate d
regions. Th e Figure 4-1 on page 4 illustrates the breakdown of each erase level as well as the
breakdown of each physical sector.
CX_SCLK2CODEC Serial Clock (Input/Output) - Serial clock for the CODEC serial audio interface.
CX_LRCK3CODEC Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on
VD451Digital Power (Input) - Positive power supply for the digital section.
DGND552Digital Ground (Input) - Ground reference. Should be connected to digital ground.
VLC6
SCL/CCLK7Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external pull-up
SDA/CDOUT8Serial Control Data (Input/Output) - SDA is a data I/O line in I
AD1/CDIN9Address Bit 1 (I2C)/Serial Control Data (SPI) (Input) - AD1 is a chip address pin in I
1
Codec Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
64
63
62
the CODEC serial audio data line.
Control Port Power (Input) - Determines the required signal level for the control port.
resistor to the logic interface voltage in I
2
C mode as shown in the Typical Connection Diagram.
2
C mode and requires an external pull-up
resistor to the logic interface voltage, as shown in the Typical Connection Diagram. CDOUT is the output
data line for the control port interface in SPI mode.
2
C mode; CDIN is
the input data line for the control port interface in SPI mode.
CS42528
harman/kardon
AVR247/230 Service Manual
Page 66 of 131
AD0/CS10
Address Bit 0 (I2C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I
2
C mode; CS
is the chip select signal in SPI mode.
INT11Interrupt (Output) - The CS42528 will generate an interrupt condition as per the Interrupt Mask register.
See “Interrupts” on page 40 for more details.
RST12Reset (Input) - The device enters a low power mode and all internal registers are reset to their default
settings when low.
AINRAINR+
AINL+
AINL-
VQ17Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
FILT+18Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
REFGND19Reference Ground (Input) - Ground reference for the internal sampling circuits.
AOUT A1 +,-
AGND2540Analog Ground (Input) - Ground reference. Should be connected to analog ground.
13
Differential Right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
14
modulators via the AINR+/- pins.
15
Differential Left Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
16
modulators via the AINL+/- pins.
36,37
Differential Analog Output (Output) - The full-scale differential analog output level is specified in the
35,34
Analog Characteristics specification table.
32,33
31,30
28,29
27,26
22,23
21,20
24
Analog Power (Input) - Positive power supply for the analog section.
41
MUTEC38Mute Control (Output) - The Mute Control pin outputs high impedance following an initial power-on con-
dition or whenever the PDN bit is set to a ‘1’, forcing the codec into power-down mode. The signal will
remain in a high impedance state as long as the part is in power-down mode. The Mute Control pin goes
to the selected “active” state during reset, muting, or if the master clock to left/right clock frequency ratio
is incorrect. This pin is intended to be used as a control for external mute circuits to prevent the clicks
and pops that can occur in any single supply system. The use of external mute circuits are not mandatory but may be desired for designs requiring the absolute minimum in extraneous clicks and pops.
LPFLT39PLL Loop Filte r (Output) - An RC network should be connected between this pin and ground.
RXP7/GPO7
RXP049S/PDIF Receiver Input (Input) - Dedicated receiver input for S/PDIF encoded data.
TXP50S/PDIF T ransmitter Output (Output) - S/PDIF encoded data output, mapped directly from one of the
42
S/PDIF Receiver Input/ General Purpose Output (Input/Output) - Receiver inputs for S/PDIF encoded
43
data. The CS42528 has an internal 8:2 multiplexer to select the active receiver port, according to the
44
Receiver Mode Control 2 register. These pins can also be configur ed as general purpose output pins,
45
ADC Overflow indicators or Mute Control outputs according to the RXP/General Purpose Pin Control
46
registers.
47
48
receiver inputs as indicated by the Receiver Mode Control 2 register.
VLS53Serial Port Interface Power (Input) - Determines the required signal level for the serial port interfaces.
SAI_SDOUT
54Serial Audio Interface Serial Data Output (Output) - Output for two’s complement serial audio PCM
data from the S/PDIF incoming stream. This pin can also be configured to transmit the output of the internal and external ADCs.
RMCK55Recovered Master Clock (Output) - Recovered master clock output from the External Clock Reference
(OMCK, pin 59) or the PLL which is locked to the incoming S/PDIF stream or CX_LRCK.
18DS586PP5
CS42528
harman/kardon
AVR247/230 Service Manual
Page 67 of 131
CX_SDOUT56CODEC Serial Data Output (Output) - Output for two’s complement serial audio data from the internal
and external ADCs.
ADCIN1
ADCIN2
OMCK59External Reference Clock (Input) - External clock reference that must be within the ranges specified in
SAI_LRCK60Serial Audio Interface Left/Right Clock (Input/Output) - Determines which channel, Left or Right, is
SAI_SCLK61Serial Audio Interface Serial Clock (Input/Output) - Serial clock for the Serial Audio Interface.
58
External ADC Serial Input (Input) - The CS42528 provides for up to two external stereo analog to digital
57
converter inputs to provide a maximum of six channels on one serial data output line when the CS42528
is placed in One Line mode.
the register “OMCK Frequency (OMCK Freqx)” on page 54.
currently active on the serial audio data line.
3. TYPICAL CONNECTION DIAGRAM
harman/kardon
AVR247/230 Service Manual
Page 68 of 131
CS42528
+3.3 V to +5 V
+2.5 V
to +5 V
+1.8 V
to +5 V
** Resistors are required for
I
10 µF
10 µF
Driver
S/PDIF
Interfac e
Up to 8
Sources
CS5361
A/D Converter
A/D Converter
Digital A u dio
Processor
Micro-
Controller
2
C control port operation
0.1 µF 0.01 µF
+
0.1 µF
+
OSC
CS5361
2 kΩ2 kΩ
0.01 µF
0.1 µF
****
0.1 µF
VD
50
TXP
49
RXP0
48
RXP1/GPO1
47
RXP2/GPO2
46
RXP3/GPO3
45
RXP4/GPO4
44
RXP5/GPO5
43
RXP6/GPO6
42
RXP7/GPO7
53
59
OMCK
58
ADCIN1
57
ADCIN2
55
RMCK
54
60
61
3
CX_LRCK
2
CX_SCLK
56
CX_SDOUT
1
CX_SDIN1
64
CX_SDIN2
63
CX_SDIN3
62
CX_SDIN4
11
INT
12
RST
7
SCL/CCLK
8
SDA/CDOUT
9
AD1/CDIN
10
AD0/CS
6
VLC
DGND
4
VLS
51
CS42528
SAI_SDOUT
SAI_LRCK
SAI_SCLK
DGND
5
5240
25
41
VAVD
24
VA
AOUTA1+
AOUTA1-
AOUTB1+
AOUTB1-
AOUTA2+
AOUTA2-
AOUTB2+
AOUTB2-
AOUTA3+
AOUTA3-
AOUTB3+
AOUTB3-
AOUTA4+
AOUTA4-
AOUTB4+
AOUTB4-
MUTEC
AINL+
AINL-
AINR+
AINR-
VQ
FILT+
REFGND
LPFLT
AGNDAGND
0.01 µF
0.01 µF
36
37
35
34
32
33
31
30
28
29
27
26
22
23
21
20
+VA
38
15
16
14
13
17
18
19
39
*
*
0.1 µF
RFILT
CFILT
0.1 µF
+
10 µF
0.1 µF
+
10 µF
Analog Output Buffer
and
Mute Circuit (optional)
Analog Output Buffer
and
Mute Circuit (optional)
Analog Output Buffer
and
Mute Circuit (optional)
Analog Output Buffer
and
Mute Circuit (optional)
Analog Output Buffer
and
Mute Circuit (optional)
Analog Output Buffer
and
Mute Circuit (optional)
Analog Output Buffer
and
Mute Circuit (optional)
Analog Output Buffer
and
Mute Circuit (optional)
Mute
Drive
(optional)
Analog
2700 pF*
Input
1
Buffer
Analog
Input
2700 pF*
1
Buffer
+
3
3
100 µF
CRIP
0.1 µF
3
+5 V
2
2
2
2
2
2
2
2
* Pull up or down as
required on startup if the
Mute Control is used.
Left Analog Input
Right Analog Inpu
+
4.7 µF
20DS586PP5
1. See the ADC Input Filter section in the Appendix.
2. See the DAC Output Filter section in the Appendix.
DISSIPATION UNDER ALL DIGITAL
CONTROL INPUT AND SUP PLY
CONDITIONS : 0.2
at V
■ MATCHED SWITCH CHARACTERISTICS :
R
ON
■ WIDE RANGE O F DIGITAL AND ANALOG
SIGNAL LEVELS : DIGITAL 3 to 20,
ANALOG TO 20V p.p.
■ QUIESCENT CURRENT SPECIF. UP TO 20V
■ 5V, 10V AND 15V PARAM ETRIC RATINGS
■ INPUT LEAKAGE CURRENT
I
= 100nA (MAX) AT VDD=18VTA= 25°C
I
■ 100% TESTED FOR QUIESCENT CURRENT
■ MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTIONOF B SERIES CMOS
DEVICES"
DESCRIPTION
The HCF4053B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
= 15V
DD-VEE
=1KHz,VIS=5Vpp,
IS
> 10V, RL = 10KΩ
µW(Typ.)
DD-VSS=VDD-VEE
=10V
=5Ω (Typ.) FOR VDD-VEE= 15V
=18V
HCF4053B
TRIPLE 2-CHANNEL
DIPSOP
ORDER CODES
PACKAGETUBET & R
DIPHCF4053BEY
SOPHCF4053BM1HCF4053M013TR
technology available in DIP and SOP packages.
The HCF4053B analog m ultipl ex er/de mul tiplexer
is a digitally controlled analog switch having low
ON impedance and very low OFF leakage current.
This multiplexer circuit dissipate extremely low
quiescent power over the full V
V
supply voltage rang e, independent of the
EE
DD-VSS
logic state of the control signals.
When a logic "1" is present at the inhibit input
terminal all ch annel are off. This de vice is a triple
2-channel multiplexe r having t hree separate
digital control inputs, A, B, and C, and an inhibit
input. Eac h control input selects one of a pair of
channels w hich are connected in a single pole
double-throw configuration.
and VDD-
PIN CONNECTION
October 2002
harman/kardon
AVR247/230 Service Manual
Page 74 of 131
Pin Assignment (DIP16/MFP16)
No. 6037-2/8
LC72723, LC72723M
Block Diagram
harman/kardon
AVR247/230 Service Manual
Page 75 of 131
PIN CONFIGURATION
harman/kardon
AVR247/230 Service Manual
Page 76 of 131
HY57V161610E
V
V
DD
DD
DQ0
DQ0
DQ1
DQ1
V
V
SSQ
SSQ
DQ2
DQ2
DQ3
DQ3
V
V
DDQ
DDQ
DQ4
DQ4
DQ5
DQ5
V
V
SSQ
SSQ
DQ6
DQ6
DQ7
DQ7
VDDQ
VDDQ
LDQM
LDQM
/WE
/WE
/CAS
/CAS
/RAS
/RAS
/CS
/CS
A11
A11
A10
A10
A0
A0
A1
A1
A2
A2
A3
A3
V
V
DD
DD
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
50pin TSOP II
50pin TSOP II
400mil x 825mil
400mil x825mil
0.8mm pin pitch
0.8mm pin pitch
50
50
49
49
48
48
47
47
46
46
45
45
44
44
43
43
42
42
41
41
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
V
V
SS
SS
DQ15
DQ15
DQ14
DQ14
VSSQ
VSSQ
DQ13
DQ13
DQ12
DQ12
VDDQ
VDDQ
DQ11
DQ11
DQ10
DQ10
VSSQ
VSSQ
DQ9
DQ9
DQ8
DQ8
VDDQ
VDDQ
NC
NC
UDQM
UDQM
CLK
CLK
CKE
CKE
NC
NC
A9
A9
A8
A8
A7
A7
A6
A6
A5
A5
A4
A4
VSS
VSS
PIN DESCRIPTION
PINPIN NAMEDESCRIPTION
CLKClock
CKEClock Enable
CS
BABank AddressSelect either one of banks during both RAS
A0 ~ A10Address
, CAS, WE
RAS
LDQM, UDQMData Input/Output MaskDQM control output buffer in read mode and mask input data in write mode
DQ0 ~ DQ15Data Input/OutputMultiplexed data input / output pin
DD/VSSPower Supply/GroundPower supply for internal circuit and input buffer
V
DDQ/VSSQData Output Power/GroundPower supply for DQ
V
NCNo ConnectionNo connection
Chip SelectCommand input enable or mask except CLK, CKE and DQM
2.5V / 3.3V 32:16 MUX/DEMUX HIGH BANDWIDTH BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
4B1
4
6B1
6
8B1
8
GND
Vcc
10B1
10
11
12B1
12
13
14B1
14
15
16B1
16
TEST
TEST
3A
B2
5
B2
7
B2
9
B2
B2
B2
B2
4
5
6
7
A
8
9
10
A
11
12
13
14
15
A
16
17
18
A
19
20
21
A
22
23
24
A
26
1
27
28
2
5611A1B1
5522B11B2
5432B22A
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
3225
31
30
29
3
3
4
5B1
5
6
7B1
7
8
GND
Vcc
9B1
9
10
11B1
11
12
13B1
13
14
15B1
15
16
SEL1
SEL2
B1
B2
A
B2
A
B2
A
B2
A
B2
A
B2
A
B2
A
ABSOLUTE MAXIMUM RATINGS
(1)
SymbolDescriptionMax.Unit
(2)
VTERM
VTERM
VTERM
Supply Voltage to Ground– 0.5 to 4.6V
(3)
DC Switch Voltage VS– 0.5 to 5.5V
(3)
DC Input Voltage VIN– 0.5 to 5.5V
VACAC Input Voltage (pulse width ≤20ns)– 3V
IOUTDC Output Current (max. current/pin)12 0mA
TSTGStorage Temperature-65 to +150°C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
CAPACITANCE (TA = +25
SymbolParameter
(1)
o
C, f = 1MHz, VIN = 0V, VOUT = 0V)
Typ.Max.Unit
CINControl Inputs35pF
CI/OQuickswitch ChannelsMux812pF
(Switch OFF)Demux46
CI/OQuickswitch ChannelsMux162 4p F
(Switch ON)Demux812
NOTE:
1. This parameter is guaranteed but not production tested.
The LM1117 is a low power positive-voltage regulator designed to meet 1A output current and comply
with SCSI-II specifications with a fixed output voltage of 2.85V. This device is an excellent choice for use
in battery-powered applications, as active terminators for the SCSI bus, and portable computers.
The LM1117 features very low quiescent current and very
low dropout voltage of 700mV at a full load and
lower as output current decreases. LM1117 is available as an adjustable or fixed 1.5V, 1.8V, 2.5V, 2.85V,
3.0V, 3.3V, and 5.0V output voltages.
The LM1117 is offered in a 3-pin surface mount package SOT-223 & TO-263. The output capacitor of
10㎌ or larger is needed for output stability of LM1117 as required by most of the other regulator circuits.
ABSOLUTE MAXIMUM RATINGS
DC Input Voltage
Lead Temperature (Soldering, 5 Seconds)
Storage Temperature Range
Operating Junction Temperature Range
CHARACTERISTIC
SYMBOL
V
IN
T
SOL
T
STG
T
OPR
MIN.UNIT
-65150
0
MAX.
7
260
125
V
℃
℃
℃
HTC
1
M24C64, M24C32
harman/kardon
AVR247/230 Service Manual
Page 85 of 131
SUMMARY DESCRIPTION
These I2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 8192 x 8 bits (M24C64) and 4096 x 8 bits
(M24C32).
Table 2. Signal Names
E0, E1, E2Chip Enable
SDASerial Data
Figure 2. Logic Diagram
V
CC
3
E0-E2SDA
SCL
WC
2
I
C uses a two-wire serial interf ace, comprisi ng a
M24C64
M24C32
V
SS
AI01844B
bi-directional data line and a clock line. The devices carry a built-in 4-bit Device Type Identifier code
(1010) in accordance with the I
The device behaves as a slave in the I
2
C bus definition.
2
C protocol,
with all memory operations synchronized by the
serial clock. Read and Write operations are initiated by a Start condition, generated by the bus master. The Start condition is followed by a Device
Select Code and Read/Write
bit (RW) (as described in Table 3.), terminated by an acknowledge bit.
When writing data to the memory, the dev ice inserts an acknowled ge bit during the 9
th
bit time,
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledge s the rec eipt o f the d ata by te
in the same way. Data transfers are terminated by
a Stop condition after an Ack for Write, and after a
NoAck for Read.
SCLSerial Clock
WC
V
CC
V
SS
Power On Reset: V
Write Control
Supply Voltage
Ground
Lock-Out Write Protect
CC
In order to prevent data corruption and inadvertent
Write operations during Power-up, a Power On
Reset (POR) circuit is included . At Power-up, the
internal reset i s he ld a cti ve unti l V
has reached
CC
the Power On Reset (POR) threshold voltage, and
all operations are disabled – the device will not respond to any command. In the sam e way, when
V
drops from the operat ing voltage, below the
CC
Power On Reset (PO R) threshold voltage, a ll operations are disa bled and the device will not respond to any command.
A stable and valid V
(as defined in Table 9. and
CC
Table 10.) must be applied before applying any
logic signal.
Figure 3. DIP, SO, TSSOP and UFDFPN
Connections
M24C64
M24C32
1
E0V
2
3
E2
4
SS
Note: See PACKAGE MECHANICAL section for package dimen-
• Output Transistor Safe Operating Area Protection
Description
The MC78XX/LM78XX/MC78XXA series of three
terminal positive regulators are available in the
TO-220/D-PAK package and with several fixed output
voltages, making them useful in a wide range of
applications. Each type employs internal current limiting,
thermal shut down and safe operating area protection,
making it essentially indestructible. If adequate heat sinking
is provided, they can deliver over 1A output current.
Although designed primarily as fixed voltage regulators,
these devices can be used with external components to
obtain adjustable voltages and currents.
It is suitable for Notebook PCs, PC cards and hard
disks where 3.3V need to be generat ed from 5V supply.
A small TO-252 package is adopted for the space
saving.
FEA TURES
zOutput Current Io(max.)=1A
zHigh Precision Output Voltage Vo±1%
zLow Dropout Voltage ∆ V
=1.1V typ. At Io=1A
I-O
zInternal Excessive Voltage Protect ion Circuit
zInternal Short Circuit Current Limit
zInternal Thermal Overload Protection
zBipolar Technology
zPackage Outline TO-252
PIN CONFIGURATION
PIN FUNCTION
1.V
IN
2.GND
OUT
3.V
NJM2391DL1
NJM2391
NJM2391DL1
ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
PARAMETER SYMBOL RATINGS UNIT
Input Voltage V+ +10 V
Power Dissipation PD TO-252
Operating Temperature
■GENERAL DESCRIPTION ■ PACKAGE OUTLINE
The NJM2595 is a 5-input 3-output video switch. It s sw it ches
select one from five signals received from VTR,TV,DVD,
TV-GA M E and others.
The NJM2595 is designed for audio items, such as A V amplifier
and others.
NJM2595D NJM2595M
■ FEATURES
● 5-input 3-output
● Operating Voltage ±4.0 to ±6.5V
● Operating current ±15mAtyp. at Vcc=±5V
● Crosstalk -65dBtyp.
● Internal 6dB Amplifier
● Internal 75Ω Driver
● Bipolar Technology
● Package Outline DIP16,DMP16
■ PIN CONFIGURATION and BLOCK DIAGRAM
16
+
SW2V
10 14 2
SW1
SW5
Vin1
Vin2
Vin3
Vin4
Vin5
13
20k
20k
20k
S5
S6
S7
6dB
Amp
6dB
Amp
6dB
Amp
8 12 6 4
-
75Ω
Driver
75Ω
Driver
75Ω
Driver
1
15
11
Vout1
Vout2
Vout3
9
20k
7
20k
5
20k
3
20k
S2
S3
SW3
S4
SW4
S1
GND V
-1 -
3
2
8
3 4
5
3
harman/kardon
AVR247/230 Service Manual
Page 92 of 131
NJM2845/46
LOW DROPOUT VOLTAGE REGULA TOR
GENERAL DESCRI PTION PACKAGE O UTLINE
The NJM2845 is low dropout voltage regulator. Advanced
Bipolar technology achieves low noise, high ripple rejection
and low quiescent current.
NJM2845 is 3 terminal type and NJM2846 is ON/OFF control
built in type. These product can be selected according to the
applications.
FEATURES
High Ripple Rejection 75dB typ. (f=1kHz,3V V ersion)
Output Noise V oltage Vno=45µVrms typ. (V o=3V V ersion)
Output capacitor with 2.2µF ceramic capacitor (Vo≥2.6V)
Output Current Io(max.)=800mA
High Precision Output Vo ±1.0%
Low Dropout V oltage 0.18V typ. (Io=500mA)
ON/OFF Control (NJM2846)
Internal Short Circuit Current Limit
Internal Thermal Overload Protection
Bipolar Technology
Package Outline TO-252-3 (NJM2845DL1), TO-252-5 (NJM2846DL3)
PIN CONFIG URA TION
1.V
IN
2.GND
3.V
OUT
1.CONTROL
2.V
IN
3.GND
4.V o
1
1 2
5.NC
NJM2845DL1
NJM2846DL3
NJM2845DL1 NJM2846DL3
EQUIVALENT CIRCUI T
V IN
GND
V
OUT
Thermal
Protection
Bandga p
Reference
V
Control
GND
IN
NJM2845DL1
Ver.2005-01-20
Bandgap
Reference
NJM2
Therma l
Protection
46DL3
V
OUT
-1-
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AVR247/230 Service Manual
Page 93 of 131
harman/kardon
AVR247/230 Service Manual
Page 94 of 131
harman/kardon
AVR247/230 Service Manual
Page 95 of 131
harman/kardon
AVR247/230 Service Manual
Page 96 of 131
•
TO-92
PIN CONFIGURATION
•
SOT-89
•
SOT-23-5
PIN DESCRIPTION
•
TO-92
•
SOT-89
•
SOT-23-5
Pin NoSymbol
1OUT
2VDD
3GND
4NC
5NC
Pin NoSymbol
1OUT
2VDD
3GND
Pin NoSymbol
1OUT
2VDD
3GND
R×5VL
5
harman/kardon
AVR247/230 Service Manual
Page 97 of 131
(mark side)
12
3
(mark side)
12
5
4
(mark side)
3
12
3
RN5RZ
3
PIN CONFIGURATION
PIN DESCRIPTION
• SOT-23-5
12
3
54
(mark side)
Pin No.SymbolDescription
1GNDGround Pin
2VDD
Input Pin
3VOUTOutput Pin
4NCNo Connection
5CE or CEChip Enable Pin
ABSOLUTE MAXIMUM RATINGS
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum ratings are threshold limit values that must not be exceeded even for an instant under
any conditions. Moreover, such values for any two items must not be reached simultaneously. Operation
above these absolute maximum ratings may cause degradation or permanent damage to the device. These
are stress ratings only and do not necessarily imply functional operation below these limits.
SymbolItemRatingsUnit
VINInput Voltage9V
VCEInput Voltage (CE or CE Pin)–0.3 to VIN +0.3V
VOUTOutput Voltage–0.3 to VIN +0.3V
IOUTOutput Current200mA
PDPower Dissipation250mW
ToptOperating Temperature–40 to +85˚C
TstgStorage Temperature–55 to +125˚C
harman/kardon
AVR247/230 Service Manual
Page 98 of 131
harman/kardon
AVR247/230 Service Manual
Page 99 of 131
SiI 9031 HDMI PanelLink Cinema Receiver
harman/kardon
AVR247/230 Service Manual
Page 100 of 131
Data Sheet
Pin Diagram
DGND
DVCC18
IOGND
IOVCC
MUTEOUT
SPDIF
CVCC
CGND
SD3
SD2
SD1
SD0
WS
SCK
MCLKIN
MCLKOUT
IOVCC
IOGND
CGND
CVCC18
NC
AUDPVCC18
AUDPGND
XTALOUT
XTALIN
XTALVCC
REGVCC
NC
RSVDL
RESET#
SCDT
INT
CVCC18
CGND
CLK48B
IOGND
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
AGND
R1X2+
72
AGND
R1X2-
71
70
R1X1-
AVCC
R1X1+
AVCC
65
67
68
66
69
AGND
64
AVCC
R1X0-
AGND
R1X0+
60
63
61
62
AVCC
R1XC+
R1XC-
58
59
57
AGND
PVCC1
RSVD_A
56
55
TMDSPGND
R0X2+
R0X2-
AGND
AVCC
54
50
52
53
51
49
AGND
R0X1-
R0X1+
AVCC
R0X0+
46
48
44
47
45
SiI 9031
144-Pin
TQFP
(Top View)
R0XC+
R0X0-
43
AVCC
42
R0XC-
PVCC0
AGND
41
AVCC
38
37
40
39
36
DGND
35
DVCC18
34
R0PWR5V
33
R1PWR5V
32
DSCL0
31
DSDA0
DSCL1
30
DSDA1
29
CSCL
28
27
CSDA
26
IOVCC
25
IOGND
CGND
24
CVCC18
23
22
DACDVCC18
21
DACDGND
AnBPb
20
DACVCCB
19
18
DACGNDB
AnGY
17
DACVCCG
16
DACGNDG
15
14
AnRPr
DACVCCR
13
DACGNDR
12
COMP
11
RSET
10
VREF
9
8
DACAGND
DACAVCC
7
6
DACOVCC
5
IOVCC
IOGND
4
3
VSYNC
2
HSYNC
DE
1
Individual pin functions are described beginning on page 37.
SiI-DS-0118-A 8
109
IOVCC
113
111
110
112
Q23
Q21
Q22
Q20
117
115
114
CGND
CVCC18
119
116
118
Q17
Q19
Q18
122
120
121
Q16
ODCK
IOVCC
IOGND
126
124
123
125
Q15
Q13
Q14
Q12
127
CGND
130
128
129
Q11
Q10
CVCC18
134
132
131
133
Q8
Q7
Q9
IOVCC
138
136
135
137
139
Q5
Q6
CGND
IOGND
142
140
Q4
CVCC18
144
141
143
Q3
Q2
Q1
Q0
Figure 1. Pin Diagram
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