Harman Kardon AVR-134 Service Manual

SAFETY PRECAUTIONS

WARNING

Before servicing this unit, familiarize yourself with the following precautions:

1. Many electrical and mechanical parts in this
chassis have special safety characteristics that
often pa s s u n not i ced an d t h e p r ote c t ion
affor d e d b y t hem canno t neces s ari l y be
obtained by using replacement components
rated fo r h i g her vo l tage , watta g e , etc.
Replacement parts that have these special
safety characteristics are identified in this
manua l and i t s su p ple m e nts : el e c tri c a l
components having such features are identified
by in the schematic diagram and the parts
list.

Before replacing any of these components, read
the parts list in this manual carefully. The use of
substitute replacement parts that do not have
the same safety characteristics as specified in
the parts list may create shock, fire, or other
hazards.

2. Before retu rning the set to the customer,
always do an AC leakage current check on the

exposed metal parts of the cabinet, such as
terminals, screw heads, and metal overlays, to
be sure the set is safe to operate danger of
electrical shock. Plug the AC line cord directly
into a 120 V AC outlet(USA Version) or 230 V
AC outlet(EU Version). (Do not use a line
isolation transformer during this check.) Be
sure your AC voltmeter has a sensitivity of
5000 Ω per volt or greater. Then connect a
1500 Ω 10 watt resistor, paralleled by a 0.15
µF 150 V AC capacitor, between a known good
earth ground(such as a water pipe, or conduit)
and the exposed metallic parts, one at a time.
Measure the AC voltage across the combination
of a 1500 Ω resistor and a 0.15 µF capacitor.
Reverse the AC plug at the AC outlet and
repeat AC voltage measurements for each
exposed metalic part. Voltage measured must
not exceed 0.75 V RMS. This corresponds to

0.2 mA AC. Any value exceeding this limit
constitutes a potential shock hazard and must
be corrected immediately.

2

Measuring methods are based on IHF and IEC standard 268-3

Measurements conditions,unless otherwise noted :

Output resistive load = (6) ohms / Both channel driven

Tone Direct ON , Other SW's : OFF

Power figures should be kept minimum 10min. between 15 and 35˚c

Filter : IHF-A filter, R/O = Rated Output

Power supply : 240 V / 50 Hz

1. FRONT AMP SECTION
*SPKR LEVEL : ALL 0dB *SPK SIZE:LLLY
*6CH INPUT

*TONE OFF

INPUT FREQ. REMARK UNIT NOMINAL LIMIT

1 INPUT SENSITIVITY 6CH INPUT 1kHz R/O mV 200±30 200±50

TOTAL HARMONIC DISTORTION 6CH INPUT 20Hz R/O-3dB %

≤

0.07

≤

0.09

(STEREO IN) 1kHz R/O-3dB %

≤

0.07

≤

0.09

20KHz R/O-3dB %

≤

0.07

≤

0.09

CONTINUOUS AVERAGE POWER 6CH INPUT 20Hz (6)ohms W 75 72

at 0.1% THD 1kHz

ତ

W7572

(STEREO IN) 20kHz

ତ

W7572

S/N RATIO, INPUT SHORT 6CH INPUT 1kHz R/O dB

≥

90

≥

85

IHF-A FILTER

FREQUENCY RESPONSE (-3dB) 6CH INPUT 1W/1KHz Ref. Hz~kHz 20~55 20~50

2. CENTER AMP SECTION
*SPKR LEVEL : ALL 0dB *SPK SIZE:LLLY
*6CH INPUT

*TONE OFF

INPUT FREQ. REMARK UNIT NOMINAL LIMIT

1 INPUT SENSITIVITY 6CH INPUT 1kHz R/O mV 200±30 200±50

TOTAL HARMONIC DISTORTION 6CH INPUT 20Hz R/O-3dB %

≤

0.07

≤

0.09

(STEREO IN) 1kHz R/O-3dB %

≤

0.07

≤

0.09

20kHz R/O-3dB %

≤

0.07

≤

0.09

CONTINUOUS AVERAGE POWER 6CH INPUT 20Hz (6)ohms W 75 72

at 0.1% THD 1kHz

ତ

W7572

(STEREO IN) 20kHz

ତ

W7572

S/N RATIO, INPUT SHORT 6CH INPUT 1kHz R/O dB

≥

90

≥

85

IHF-A FILTER

5 FREQUENCY RESPONSE (-3dB) 6CH INPUT 1W/1kHz Ref. Hz~kHz 20~55 20~50

DESCRIPTION

DESCRIPTION

2

3

4

5

2

3

4

SPECIFICATION

3

3. SURROUND AMP SECTION

*SPKR LEVEL : ALL 0dB
*6CH INPUT

INPUT FREQ. REMARK UNIT NOMINAL LIMIT

1 INPUT SENSITIVITY 6CH INPUT 1kHz R/O mV 200±30 200±50

TOTAL HARMONIC DISTORTION 6CH INPUT 20Hz R/O-3dB %

അ

0.07

അ

0.09

(STEREO IN) 1kHz R/O-3dB %

അ

0.07

അ

0.09

20kHz R/O-3dB %

അ

0.07

അ

0.09
CONTINUOUS AVERAGE POWER 6CH INPUT 20Hz (6)ohms W 75 72
at 0.1% THD 1kHz

ତ

W7572

(STEREO IN) 20kHz

ତ

W 75 72

S/N RATIO, INPUT SHORT 6CH INPUT 1kHz R/O dB

ആ

90

ആ

85
IHF-A FILTER
FREQUENCY RESPONSE (-3dB) 6CH INPUT 1W/1kHz Ref. Hz~kHz 20~55 20~50

4. SUBWOOFER SECTION

*SPKR LEVEL : ALL 0dB
*6CH INPUT

INPUT FREQ. REMARK UNIT

*TONE OFF

NOMINAL LIMIT

1 PRE OUTPUT LEVEL SUB-CH(200mV) 30Hz VOL max. V 1.7±0.5 1.7±1.0

5. STEREO SECTION

*SPKR LEVEL : ALL 0dB
*TONE OFF(TONE DIRECT)

INPUT FREQ. REMARK UNIT NOMINAL LIMIT

1 INPUT SENSITIVITY CD 1kHz mV 200±30 200±50
2 CHANNEL BALANCE CD 1kHz R/O TO -40dB dB ±2 ±3
4 RESIDUAL NOISE 1kHz VOL min. mV

അ

1.0

അ

1.2

5 TOTAL HARMONIC DISTORTION (20)Hz R/O-3dB %

അ

0.07

അ

0.09

CD 1kHz

ତ

%

അ

0.07

അ

0.09

(20)kHz

ତ

%

അ

0.07

അ

0.09

6 CONTINUOUS AVERAGE POWER (20)Hz (6)ohms W 75 72

at 0.1% THD CD 1kHz

ତ

W7572

(20)kHz

ତ

W7572

8 S/N RATIO,IHF-A FILTER 1kHz R/O dB

ആ

90

ആ

85

9 CHANNEL SEPARATION 100Hz R/O-3dB dB

ആ

57

ആ

50
CD 1kHz

ତ

dB

ആ

57

ആ

55
10kHz

ତ

dB

ആ

57

ആ

55

10 FUNCTION CROSSTALK

CD

೸

TAPE

1kHz

ତ

dB

ആ

65

ആ

60

10kHz

ତ

dB

ആ

45

ആ

40

11 FREQUENCY RESPONSE (-3dB) CD 1W Hz~kHz 20~55 20~50

12 TONE CONTROL , ±(12)dB 100Hz 1W dB ±12(±2) ±12(±3)

(TONE ON)

10kHz

ତ

dB ±12(±2) ±12(±3)

13 HEADPHONE OUTPUT CD 1kHz R/O V 2.5±0.5 2.5±1.0

H/P = 64ohms

CD

CD

CD

DESCRIPTION

DESCRIPTION

DESCRIPTION

2

3

4

5

*SPK SIZE:LLLY

*SPK SIZE:LLLY
*TONE OFF

*SPK SIZE:LLLY

4

6. Idle Voltage

*SPKR LEVEL : ALL 0dB

*6CH Input

*TONE OFF(TONE DIRECT),

*TEST B'D : AMP

*Test Point : R221(FL,FR,SL,SR,C) Both Sides Voltage(DC).

NO. INPUT FREQ. REMARK UNIT NOMINAL LIMIT

1FL --R221FLmV2.7±0.32.7±0.5
2FR --R221FRmV2.7±0.32.7±0.5
3SL --R221SLmV2.7±0.32.7±0.5
4SR --R221SRmV2.7±0.32.7±0.5
5C --R221CmV2.7±0.32.7±0.5

7. DOLBY DIGITAL INPUT SECTION

INPUT : COAXIAL (CD DIGITAL) VOLUME POSISTION : -18dB
SURROUND MODE : DOLBY DIGITAL AT SPEAKER OUT Disc : LD VER 1.0

NO INPUT FREQ. CHAP UNIT NOMINAL LIMIT

OUT PUT LEVEL FRONT 1kHz 8 ,12 V 9.5±1 9.5±2
Disc All CH 0dB CENTER 1kHz 10 V 9.5±1 9.5±2
SPK MODE:LLLY SURR 1kHz 14,16 V 9.5±1 9.5±2

S/W 30Hz 18 V 1.0±0.3 1.0±0.4

T.H.D FRONT 1kHz 38

ポ

؄

0.3

؄

0.5

Disc 0dB CENTER 1kHz 38

ポ

؄

0.3

؄

0.5

LPF(20kHz) SURR 1kHz 38

ポ

؄

0.3

؄

0.5

SPK MODE:LLLY S/W 30Hz 18

ポ

؄

0.25

؄

0.3

S/N FRONT 1kHz 6 dB

؅

65

؅

60

LPF(20kHz) CENTER 1kHz 6 dB

؅

65

؅

60

JIS-A FILTER, Disc -20dB SURR 1kHz 6 dB

؅

65

؅

60

SPK MODE : LLLY S/W 30Hz 18 dB

؅

65

؅

60

DYNAMIC RANGE FRONT 1kHz 38 dB -11±1 -11±2

CENTER 1kHz 38 dB -11±1 -11±2

SURR 1kHz 38 dB -11±1 -11±2

S/W 30Hz 18 dB 0±1 0±2
DIALOG FRONT43dB-10±0.5-10±1
NORMALIZATION CENTER 43 dB -10±0.5 -10±1

SURR 43 dB -10±0.5 -10±1

S/W 43 dB -10±0.5 -10±1
OUTPUT CONFIG 1 FRONT 1kHz 38(ref) dB -17±1 -17±3
SPK MODE : SSSY 20
Ref : 1KHz 0dB CENTER 1kHz 38(ref) dB -17±1 -17±3

20

SURR 1kHz 38(ref) dB -17±1 -17±3

20

Ref : 30Hz 0dB S/W 30Hz 18(ref) dB 6.0±1 6.0±2

22
OUTPUT CONFIG 2 FRONT 1kHz 38(ref) dB 5.5±1 5.5±2
SPK MODE : LSSN 18
DOWNMIXING TEST CENTER 1kHz 10(ref) dB -3±0.5 -3±1
SPK MODE : LSSY C->NO

SURR.L 1kHz 14 dB -3±0.5 -3±1

LS->NO

SURR.R 1kHz 16 dB -3±0.5 -3±1

RS->NO

FRONT 1kHz 6(ref) dB 7.5±1 7.5±2

ST:ON

7

8

DESCRIPTION

1

2

3

4

5

6

CHANNEL

*SPK SIZE:LLLY

*Main Vol : -18dB

5

8. DTS INPUT SECTION

INPUT : COAXIAL, CD DIGITAL VOLUME POSISTION : -18dB
SURROUND MODE : DTS SURROUND AT PREOUT SPK MODE LLLY

DTS TEST Disc(TRACK 9,10,11,12,13,14,15)

NO INPUT FREQ. TRACK UNIT NOMINAL LIMIT

OUTPUT LEVEL FRONT

1kHz
1kHz
1kHz

1kHz
1kHz
1kHz

1kHz
1kHz
1kHz

10,11 V 9.5±1 9.5±2
Disc : DTS 0dB CENTER 14 V 9.5±1 9.5±2
LLLY SURR 12,13 V 9.5±1 9.5±2

S/W

30kHz

15 V 1.0±0.3 1.0±0.4

THD FRONT10,11

ポ

؄

0.3

؄

0.5

Disc : DTS 0dB CENTER 14

ポ

؄

0.3

؄

0.5

LPF(20KHz) SURR 12,13

ポ

؄

0.3

؄

0.5

LLLY S/W

30kHz

15

ポ

؄

0.3

؄

0.5

S/N FRONT10,11dB

؅

65

؅

60

Disc 0dB,JIS "A" CENTER 14 dB

؅

65

؅

60

LPF(20KHz) SURR 12,13 dB

؅

65

؅

60

LLLY S/W

30kHz

15 dB

؅

65

؅

60

1

2

3

DESCRIPTION

6

Measuring methods in confirmity with IEC standard 315
Measurements condition FM : Ref. frequency = ( 98.1 MHz), Audio frequency = 1kHz

Reference level = 1 mV on (75ohms, 300ohms) Deviation :
Filter = B.P.F at STEREO and MONO

Test Point : TP1 = 90.1 MHz, TP2 = 98.1 MHz, TP3 = 106.1 MHz (50kHz STEP)

MOD:40 kHz (Mono)/40 kHz±7.5 kHz (STEREO)

9. FM SECTION

NO UNIT NOMINAL LIMIT

1 TUNING COVER RANGE LOW ~ HIGH MHz

STEP AUTO/MANUAL kHz

2 USABLE SENSITIVITY TP 1 dBu



12



15

S/N = 30

TP 2 dBu



12



15

TP 3 dBu



12



15

3 AUTO STOP LEVEL dBu 25±6 25±8

4 S/N RATIO MONO dBu



55



50

IHF "A" STEREO dBu



50



45

5T.H.D

MONO 1, 1kHz

ポ



0.7



1.2

STEREO 1, 1kHz

ポ



1.0



1.5

6 OVER LOAD DISTORTION (120dBu,75kHz) MONO dB



2



3

7 STEREO SEPARATION

250

ภ

dBu



30



25

(MAIN 53.5%, PILOT 10%) dBu



30



25

EXT 19kHz FILTER

6.3

dBu



20



15

8 FREQUENCY RESPONSE (50us, -3dB) TP 2 Hz 60~8k 70~7k

9 IF REJECTION TP 1 dB



75



70

10 IMAGE REJECTION TP 3 dB



75



70

11 AM SUPRESSION (at AM 30% 1kHz) dB



40



35

12 OUPUT LEVEL(MONO) TP 2

mV rms

280±50 280±100

DESCRIPTION

87.5~108

50/50(200/200 Brasil)

7

10. AM SECTION

Measurements condition AM - MW : Radio. frequency = 1000/999 kHz , Audio frequency = 400

Reference level = (74dBu/m),(50)ohms Modulation = ( 30 )%

Test Point : MW TP 1 = (594/600) kHz , TP 2 = (999/1000) kHz , TP 3 = (1404/1400) kHz

NO UNIT NOMI. LIMIT

1 TUNING COVER RANGE LOW~HIGH MW

STEP AUTO/MANUAL

2 USABLE SENSITIVITY TP 1

kHz

kHz

dBu/m

dBu/m

dBu/m

dB

%

%

%

dB

dB

dB



63



65

TP 2



63



65

, S/N = 20dB

TP 3



63



65

3 S/N RATIO

TP 2



35



30

100 dBu/m, 30% MOD

4T.H.D

TP 2



2



3

74 dB u/m, 30% MOD

5 OVER LOAD DISTORTION

TP 2



3



5

100 dB u/m ,80% MOD

6 FREQUENCY RESPONSE

AT-6dB HZ 80~2K 100~1.8K

(at 74 dBu/m, 400 Hz) - NO FILTER

7 SELECTIVITY TP 2



23



20

at SN: 20dB, ±9KHz

8 AGC FIGURE OF MERIT TP 2



50



40

(at 100 dB μ/m)

9 IMAGE REJECTION TP 3



28



25

10 WHISTLE MODULATION 2IF



10



15

(74dB u/m,900kHz)

11 TUNED LEVEL

dBu/m

55±10 55±15

999kHz

12 AUTO STOP LEVEL

999

ม

dBu/m

55±10 55±15

13 OUTPUT LEVEL

mVrms

180±60 180±100

74 dB u/m, 30 % MOD

DESCRIPTION

9/9(10/10 Brazil)

522~1620(520~1710 Brasil)

8

UPD78F0536GK : IC101

1. Pin Description

CIRCUIT DESCRIPTION

9

2. Block Diagram

16-bit TIMER/
EVENT COUNTER 00

16-bit TIMER/
EVENT COUNTER 01

TO00/TI010/P01

TI000/P00 (LINSEL)

RxD6/P14 (LINSEL)

TO01

Note 2

/TI011

Note 2

/P06

TI001

Note 2

/P05

TOH0/P15

TOH1/P16

TI50/TO50/P17

TI51/TO51/P33

RxD0/P11
TxD0/P10

RxD6/P14
TxD6/P13

SI10/P11

SO10/P12

SCK10/P10

8-bit TIMER H0

8-bit TIMER H1

WATCHDOG TIMER

WATCH TIMER

INTERNAL

LOW-SPEED

OSCILLATOR

SERIAL
INTERFACE UART0

78K/0

CPU

CORE

BANK

SERIAL
INTERFACE UART6

LINSEL

SERIAL
INTERFACE CSI10

8-bit TIMER/
EVENT COUNTER 50

8-bit TIMER/
EVENT COUNTER 51

SERIAL
INTERFACE IIC0

A/D CONVERTER

SERIAL INTERFACE
CSI11

Notes 1. Available only in the PD78F0536, 78F0537, and 78F0537D.

2. Available only in the PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D.

3. Available only in the PD78F0537D.

Note2

Note2

Note1

Note2

Note2

Note3

8

INTERRUPT

CONTROL

2

4

PORT 0

7

P00 to P06

PORT 1

8

P10 to P17

PORT 2

8

P20 to P27

PORT 3

4

P30 to P33

PORT 4

4

P40 to P43

PORT 5

4

P50 to P53

PORT 6

4

P60 to P63

PORT 7

8

P70 to P77

PORT 12

5

P120 to P124

PORT 13

P130

PORT 14

2

P140, P141

BUZZER OUTPUT

BUZ/P141

CLOCK OUTPUT

CONTROL

PCL/P140

KEY RETURN

8

KR0/P70 to
KR7/P77

RESET CONTROL

MULTIPLIER &

DIVIDER

ON-CHIP DEBUG

SYSTEM

CONTROL

INTERNAL
HIGH-SPEED
OSCILLATOR

VOLTAGE

REGULATOR

POWER ON CLEAR/

LOW VOLTAGE

INDICATOR

EXLVI/P120

RESET

REGC

X1/P121
X2/EXCLK/P122
XT1/P123
XT2/EXCLKS/P124

POC/LVI

CONTROL

FLASH

MEMORY

INTERNAL

HIGH-SPEED

RAM

INTERNAL

EXPANSION

RAM

VDD,

EV

DD

VSS,

EV

SS

FLMD0

OCD0A

Note 3

/X1, OCD1A

Note 3

/P31

OCD0B

Note 3

/X2, OCD1B

Note 3

/P32

SI11

Note 2

/P03

SO11

Note 2

/P02

SCK11

Note 2

/P04

SSI11

Note 2

/P05

EXSCL0/P62

SDA0/P61
SCL0/P60

ANI0/P20 to

ANI7/P27

AV

REF

AVSS

RxD6/P14 (LINSEL)

INTP0/P120 (LINSEL)

INTP1/P30 to

INTP4/P33

INTP5/P16

INTP6/P140,

INTP7/P141

10

3. Pin Functions

No. Pin Name Pin Symbol I/O Pin Description

1 P120/INTP0/EXLVI PROTECTION I Input for protection

2 P43 VOL_UP I Input for volume up

3 P42 VOL_DN I Input for volume down

4 P41 H/P_RLY O Output for headphone relay

5 P40 C_RLY O Output for center speaker relay

6 RESET RESET I Input for u-com reset

7 P124/XT2/EXCLKS S_RLY O Output for surround speaker relay

8 P123/XT1 F_RLY O Output for front speaker relay

9 IC/FLMD0 FLMD0 O Port for flash mode setting

10 P122/X2/EXCLK V1 OUT_MUTE O Output for VIDEO1 OUT MUTE

11 P121/X1 TRIG CONTROL O Output for DC TRIGGER ON/OFF

12 REGC Connect to ground via 0.47uF/50V E.Cap

13 VSS VSS Ground

14 EVSS EVSS Ground

15 VDD VDD 3V3

16 EVDD EVDD 3V3

17 P60/SCLO VIDEO_MUTE O Output for video mute

18 P61/SDA0 VIDEO_S1/HDMI_S2 O Output for video/HDMI function IC switching

19 P62/EXSCL0 VIDEO_S2/HDMI_S1 O Output for video/HDMI function IC switching

20 P63 TUNED I Input for tuner "TUNED" condition (L is active)

21 P33/TI51/TO51/INTP4 RDS_CLK I Clock signal input from tuner pack

22 P77/KR7 RDS_DATA I Input for RDS data from tuner pack

23 P76/KR6 PLL_CE O Chip select output for tuner pack

24 P75/KR5 PLL_DO O Data output for tuner pack

25 P74/KR4 SW_MUTE O Output for subwoofer channel mute

26 P73/KR3 C_MUTE O Output for center channel mute

27 P72/KR2 S_MUTE O Output for surround channel mute

28 P71/KR1 F_MUTE O Output for front channel mute

29 P70/KR0 USB_PC O Output for IC108(REGULATOR) ON/OFF

30 P06/TI011/TO01 R2A1521FP_CLK O Clock signal output for R2A1521FP

31 P05/TI001/SSI11 R2A1521FP_DATA O Output for R2A1521FP control data

32 P32/INTP3 P32 Port for flash upgrade

33 P31/INTP2 P31 Port for flash upgrade

34 P50 DSP/DIR_CCLK O Clock signal output for DIR/DSP

35 P51 DSP/DIR_CDIN I/O Input & output for DIR/DSP control data

36 P52 DSP_RESET O Output for DSP reset

11

39 P17/TI50/TO05 DSP_ABOOT O Ouput for DSP Auto boot

40 P16/TOH1/INTP5 DSP_INTREQ I Interrupt signal output to DSP

41 P15/TOH0 DIR_PDN O Output for DIR power down

42 P14/RXD6 RxD I Input for flash upgrade

43 P13/TXD6 TxD O Output for flash upgrade

44 P12/SO10 Front B RLY O Output for SPK B ON/OFF

45 P11/SI10/RXD0 24C08_SCLK O Clock signal output for 24C08

46 P10/SCK10/TXD0 24C08_SDA I/O Input & output for 24C08 control data

47 AVREF AVREF 3V3

48 AVSS AVSS GROUND

49 P27/ANI7 KEY2 I Input for KEY2 scan

50 P26/ANI6 KEY3 I Input for KEY3 scan

51 P25/ANI5 KEY1 I Input for KEY1 scan

52 P24/ANI4 BT/THERMAL_DET I BLUETOOTH DETECT

53 P23/ANI3 HDMI_HPD O Ouput for HDMI HPD(NOT USED)

54 P22/ANI2 HDMI_S2 O Ouput for HDMI S2 CONTROL(NOT USED)

55 P21/ANI1 HDMI_S2 O Ouput for HDMI S1 CONTROL(NOT USED)

56 P20/ANI0 FUNC_DN I Input for function encoder down

57 P130 ST/BY_LED O Ouput for standby led

58 P04/SCK11 ST/BY_RLY O Onput for standby relay

59 P03/S111 FUNC_UP I Input for function encoder up

60 P02/S011 FLT/PLL_DATA O Output for FLT/PLL control data

61 P01/TI010/TO00 FLT/PLL_CLK O Clock signal output for FLT/PLL

62 P00/TI000 RMC I Input for remocon data

63 P141/BUZ/INTP7 FLT_CE O Chip select output for FLT

64 P140/PCL/INTP6 POWER_DOWN I Input for power down

No. Pin Name Pin Symbol I/O Pin Description

37 P53 DSP_RDY I Input for DSP enable

38 P30/INTP1 DSP_CE O Chip select output for NJW1153

12

13

2. Block Diagram

Program/Data

RAM

192K Bytes

192

256

Program/Data

ROM Page1

256K Bytes

256

256

256K Bytes

ROM Page3

Program/Data

Program/Data

ROM Page2

256K Bytes

3232

DMPPMP

CSP

32

256

Program

Cache

32K Bytes

64

D1

Data

R/W

R/W

Data

D2

64

256

Program

Fetch

INTI/O

C67x+ CPU

Memory

Controller

32

HighúPerformance

Crossbar Switch

32

McASP DMA Bus

JTAG EMU

32

32

32

32

32

32

32

Peripheral Configuration Bus

EMIF

32

Events

In

32

MAX1MAX032CONTROL

32

Interrupts

Out

I/O

dMAX

McASP0

16 Serializers

McASP1

6 Serializers

McASP2

2 Serializers

DIT Only

SPI1

SPI0

I2C1

I2C0

RTI32

PLL

Peripheral Interrupt and DMA Events

32

32

32

32

14

3. Terminal Functions

Table, the Terminal Functions table, identifies the external signal names, the associated pin/ball
numbers along with the mechanical package designator, the pin type(I,O, IO,OZ, or PWR), whetherthe
pin/ball has any internal pullup/pulldown resistors, whether the pin/ball is configurable as an IO in GPIO
mode, and a functional pin description.

Table.Terminal Functions

PIN

SIGNAL NAME TYPE

(1)

PULL

(2)

GPIO

(3)

DESCRIPTION

NO.

External Memory Interface (EMIF) Address and

Control

EM_A[0] 91 O-N

EM_A[1] 89 O-N

EM_A[2] 88 O-N

EM_A[3] 86 O-N

EM_A[4] 84 O-N

EM_A[5] 83 O-N

EMIF AddressBus

EM_A[6] 80 O-N

EM_A[7] 79 O-N

EM_A[8] 76 O-N

EM_A[9] 75 O-N

EM_A[10] 93 O-N

EM_A[11] 74 O-N

EM_BA[0] 96 O-N

SDRAM Bank Address and AsynchronousMemory

Low-OrderAddress

EM_BA[1] 94 O-N

EM_CS[0]

97 O-NSDRAM Chip Select

EM_CS[2]

100 O-NAsynchronous MemoryChip Select

EM_CAS

37 O-NSDRAM Column Address Strobe

EM_RAS

98 O-NSDRAM Row Address Strobe

EM_WE

38 O-NSDRAM Write Enable

EM_CKE 71 O-NSDRAM Clock Enable

EM_CLK 70 O-NSDRAM Clock

EM_WE_DQM[0]

39 O-NWriteEnableor Byte Enable for EM_D[7:0]

EM_WE_DQM[1]

67 O-NWriteEnableor Byte Enable for EM_D[15:8]

EM_OE

104 O-NSDRAM Output Enable

EM_RW

102 O-NAsynchronous Memory Read/not Write

External Memory Interface (EMIF) Data Bus

EM_D[0] 52 IO -N

EM_D[1] 51 IO -N

EM_D[2] 49 IO -N

EM_D[3] 48 IO -N

EM_D[4] 46 IO -N

EM_D[5] 45 IO -N

EM_D[6] 43 IO -N

EM_D[7] 41 IO -N

EMIF DataBus [Lower16 Bits]

EM_D[8] 66 IO -N

EM_D[9] 64 IO -N

EM_D[10] 63 IO -N

EM_D[11] 61 IO -N

EM_D[12] 59 IO -N

EM_D[13] 58 IO -N

EM_D[14] 56 IO -N

EM_D[15] 55 IO -N

15

PIN

SIGNALNAME TYPE

(1)

PULL

(2)

GPIO

(3)

DESCRIPTION

NO.

McASP0, McASP1, McASP2, and SPI1 Serial Ports

AHCLKR0/AHCLKR1 143 IO -YMcASP0 and McASP1 ReceiveMasterClock

ACLKR0 139 IO -YMcASP0 ReceiveBit Clock

AFSR0 141 IO -YMcASP0 ReceiveFrameSync (L/RClock)

AHCLKX0/AHCLKX2 2 IO -YMcASP0 andMcASP2 Transmit Master Clock

ACLKX0 142 IO -YMcASP0 Transmit Bit Clock

AFSX0 144 IO -YMcASP0 Transmit Frame Sync(L/RClock)

AMUTE0 3O - YMcASP0 MUTE Output

AXR0[0] 113 IO -YMcASP0 SerialData0

AXR0[1] 115 IO -YMcASP0 SerialData1

AXR0[2] 116 IO -YMcASP0 SerialData2

AXR0[3] 117 IO -YMcASP0 SerialData3

AXR0[4] 119 IO -YMcASP0 SerialData4

AXR0[5]/ SPI1_SCS

120 IO -YMcASP0 SerialData5 or SPI1 SlaveChip Select

AXR0[6]/SPI1_ENA

121 IO -YMcASP0 SerialData6 or SPI1 Enable(Ready)

AXR0[7]/SPI1_CLK 122 IO -YMcASP0 SerialData 7 or SPI1 SerialClock

AXR0[8]/AXR1[5]/ McASP0 SerialData8 or McASP1 SerialData5 or

126 IO -Y

SPI1_SOMI

SPI1 DataPin SlaveOut MasterIn

AXR0[9]/AXR1[4]/ McASP0 SerialData9 or McASP1 SerialData4 or

127 IO -Y

SPI1_SIMO

SPI1 DataPin SlaveIn MasterOut

AXR0[10]/AXR1[3] 130 IO -YMcASP0 SerialData10 or McASP1 SerialData 3

AXR0[11]/AXR1[2] 131 IO -YMcASP0 SerialData11 or McASP1 SerialData 2

AXR0[12]/AXR1[1] 134 IO -YMcASP0 SerialData12 or McASP1 SerialData 1

AXR0[13]/AXR1[0] 135 IO -YMcASP0 SerialData13 or McASP1 SerialData 0

AXR0[14]/AXR2[1] 137 IO -YMcASP0 SerialData14 or McASP2 SerialData 1

AXR0[15]/AXR2[0] 138 IO -YMcASP0 SerialData15 or McASP2 SerialData 0

ACLKR1 9 IO -YMcASP1 ReceiveBit Clock

AFSR1 12 IO -YMcASP1 ReceiveFrameSync (L/RClock)

AHCLKX1 5 IO -YMcASP1 Transmit Master Clock

ACLKX1 7 IO -YMcASP1 Transmit Bit Clock

AFSX1 11 IO -YMcASP1 Transmit Frame Sync(L/RClock)

AMUTE1 4O - YMcASP1 MUTE Output

SPI0, I2C0, and I2C1 Serial Port Pins

SPI0_SOMI/I2C0_SDA 111 IO -Y

SPI0 DataPin SlaveOut MasterInor I2C0SerialData

SPI0_SIMO 110 IO -YSPI0DataPin SlaveInMasterOut

SPI0_CLK/I2C0_SCL 108 IO -YSPI0 SerialClock or I2C0SerialClock

SPI0_SCS/I2C1_SCL

107 IO -YSPI0 SlaveChip Selector I2C1SerialClock

SPI0_ENA/I2C1_SDA

105 IO -YSPI0 Enable(Ready)or I2C1SerialData

Clocks

OSCIN 23 I-N1.2-VOscillatorInput

OSCOUT 24 O-N1.2-VOscillatorOutput

OSCV

DD

25 PWR -NOscillator1.2-VVDDtappoint(forfilteronly)

OSCV

SS

22 PWR -NOscillatorVSStappoint(forfilteronly)

CLKIN 17 I-NAlternateclock input (3.3-V LVCMOS Input)

PLLHV 27 PWR -NPLL 3.3-VSupplyInput(requiresexternalfilter)

DeviceReset

RESET

14 I-NDeviceresetpin

16