<XR_PAGE_TITLE>
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
78
6
5
4
3
ECN
ZONE
01
REV
279015
DESCRIPTION OF CHANGE
ENGINEERING RELEASED
12
CK
APPD
DATE
06/06/03
ENG
APPD
?
DATE
Schematic,MLB,"Axtena"
D
PAGE
COVER PAGE
1
2,3
4,5
6,7
10-11
12
13
14-15
16
C
17
18
19
20-21
22-23
24-25
26-27
28
29
30
31
32
33
B
34
35
36
37
38
39
40-41
42-43
44
45-51
52-59
60-64
A
65-69
8
BLOCK DIAGRAM, SYSTEM, POWER & PCB INFO
MPC7450 MAXBUS
CPU SPEED & CONFIG OPTIONS
CPU LA CONNECTORS, ESP, CPU BYPASS
8
INTREPID MAX IF (SECTION 1)
9
INTREPID POWER & BYPASS (SECTION 8 & 9)
INTREPID DDR CONTROL
DDR MUXES
SO-DIMM, BIG DIMM
INTREPID AGP (SECTION 3)
NVIDIA AGP (SECTION 1)
NVIDIA FRAME BUFFER (SECTIONS 3 & 4)
NVIDIA FB SERIES TERMS, CLK DELAYS
GRAPHICS MEMORIES
NVIDIA DAC/DVI, CLOCKS & STRAPS (SECTIONS 2 & 5)
TMDS & EXTERNAL VGA CONNECTORS
NVIDIA POWER-ON RESET CONFIGURATION STRAPS
INTREPID GPIOS, INTERRUPTS & SERIAL PORTS (SECTION 6)
MODEM, BLUETOOTH, KITCHEN SINK & SERIAL DOWNLOAD
INTREPID PCI, ROM (SECTION 7)
WIRELESS PCI
USB2 CONTROLLER
USB POWER & CONNECTORS
INTREPID ETHERNET & FIREWIRE (SECTION 4)
ETHERNET PHY
FIREWIRE PHY
INTREPID UATA/IDE (SECTION 5)
ATA CD/HD CONNECTORS
AUDIO CODEC & VOLTAGE REGS
LINE IN/OUT BUFFERS
SPEAKER/MIC AMPS
POWER MANAGER UNIT
+5V/+12V, AUDIO, FW & TMDS POWER CONVERTERS
CONSTRAINT TABLES
NET TABLES
PART TABLES
TABLE OF CONTENTS
67
POWER RAIL DEFINITIONS
RUN
+2_5V_MAIN
+3V_MAIN
+5V_MAIN
+5V_SLEEP
+12V_MAIN
+12V_SLEEP
FW_PWR
+1.8V_SLEEP
+MAXBUS_SLEEP
PCB,UL RECOGNIZED, MIN.130 DEG. C TEMP. RATING AND V-0 FLAME RATING PER UL 796
& UL 94. PCB TO BE SILK-SCREENED WITH UL/CUL RECOGNITION MARK, MANUFACTURER’S UL
FILE NUMBER, UL PCB MATERIAL DESIGNATION, TEMPERATURE RATING AND FLAME RATING.
DIMENSIONS ARE IN MILLIMETERS
XX
X.XX
X.XXX
ANGLES
DO NOT SCALE DRAWING
THIRD ANGLE PROJECTION
5
4
3
ON
ON
ON
ON
ON
ON
ON
ON
ON
SLEEP
DRAFTER
ENG APPD
QA APPD
RELEASE
ON
ON
ON
OFF
ON
OFF
ON
OFF
OFF
MATERIAL/FINISH
NOTED AS
APPLICABLE
Sep 17 12:11:39 2003
SHUTDOWN
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
METRIC
DESIGN CK
MFG APPD
DESIGNER
SCALE
NONE
SIZE
2
TITLE
DRAWING NUMBER
D
Apple Computer Inc.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SCHEMATIC,MLB
051-6497
D
C
B
A
REV.
13
SHT
1
OF
1
69
DRAWING
<XR_PAGE_TITLE>
78
6
5
4
3
12
FW - B
Connector
Inverter
KITCHEN
D
LCD Panel
Connector
P.24P.29P.36
VGA/SVIDEO OUT
VGA
D
Connector
P.25
RGB
GRAPHICS
MEMORY
P.20
(EXTERNAL MEM)
FW - A
Connector
Connector
P.36 P.35
Ethernet
TMDS
EDID (I2C)
NVIDIA
NV18B
GRAPHICS
FireWire
PHY
Ethernet
PHY
64MB
P.17-27
P.35P.36
C
1394 OHCI
3.3V
8BIT TX/RX
AGP BUS
1.5V/3.3V
32BITS
66MHZ
USB
CONN(QTY3)
P.31
FIREWIRE
400 MB/S
P.34
ETHERNET
10/100
P.34
4X AGP
P.16
PCI
P.30
MEMORY
P.21
(EXTERNAL MEM)
PCI BUS
WIRELESS
P.31
32BITS
C
USB2
CONTROL
P.32
MODEM
B
BLUETOOTH
P.29
USB
P.28
INTREPID
DDR MEMORY
MEMORY BUS
2.5V
167MHZ
64BITS
I2C
P.34P.12
I2C
MAXBUS
P.9
MAXBUS
167MHZ
32BIT ADDRESS
64BIT DATA
BOOTROM
P.30
BOOT ROM
1M X 8
P.30
B
PMU
P.44
CPU PLL
DDR MUXES
APOLLO
Config
P.6
P.13
CPU
P.4-5
A
DDR SDRAM DIMM 0
P.15
DDR SDRAM DIMM 1
LAST_MODIFIED=Wed Sep 17 12:11:39 2003
SO-DIMM Connector
P.14
APPLE COMPUTER INC.
8
67
5
4
3
2
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SYSTEM BLOCK
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
SIZE
DRAWING NUMBER
D
051-6497
NONE
SHT
2
1
SCALE
A
REV.
13
OF
69
DRAWING
<XR_PAGE_TITLE>
78
6
5
4
3
12
LAYER
DUAL
+12V
D
DC/DC
(LTC3707)
FW
(SWITCH)
C
GRAPHIC
DC/DC
(SC2602)
5.1V
3.3V
12V
1.6V
TMDS
LDO
(EZ1582)
USB
(SWITCH)
EXTERNAL
VIDEO
(SWITCH)
HARD
DRIVE
(SWITCH)
3.65V
5.1V
5.1V
5.1V
----------------
1 - SIGNAL-TOP
PREPREG
2 - GROUND1
PREPREG
3 - SIGNAL
FILLER
4 - POWER
PREPREG
5 - POWER
FILLER
6 - SIGNAL
PREPREG
7 - GROUND2
PREPREG
8 - SIGNAL-BOTTOM
================
TOTAL
NOSTUFF
ZT39
HOLE-VIA-20R10
1
NOSTUFF
ZT46
HOLE-VIA-20R10
THICKNESS COPPER
(MILS)
------------
0.7
3
1.4
3
0.7
17.4
2.8
4
2.8
17.4
0.7
3
1.4
3
0.7
============
62.0
NOSTUFF
ZT53
1
HOLE-VIA-20R10
1
(OZ)
--------
0.5
--Â1
---
0.5
--Â2
---
2
---
0.5
--Â1
---
0.5
========
---
NOSTUFF
ZT59
HOLE-VIA-20R10
1
TRACE WIDTH
(MILS)
-------------Â4
---
4
---
---
4
---
4
=============
---
NOSTUFF
ZT64
HOLE-VIA-20R10
1
D
C
CPU
DC/DC
1.55V
(LTC3707)
B
BACKLIGHT
INVERTER
600V RMS
(OZ960)
DDR
DC/DC
2.5V
A
(SC2602)
POWER SYSTEM ARCHITECTURE
8
67
3.3V
OPTICAL
DRIVE
(SWITCH)
INTREPID
DC/DC
(SC2602)
MAXBUS I/O
LDO
(EZ1582)
AGP
LDO
(EZ1582)
5
5.1V
1.7V
1.8V
1.5V
NOSTUFF
ZT40
HOLE-VIA-20R10
1
NOSTUFF
ZT41
HOLE-VIA-20R10
1
NOSTUFF
ZT42
HOLE-VIA-20R10
1
NOSTUFF
ZT43
HOLE-VIA-20R10
1
NOSTUFF
ZT44
HOLE-VIA-20R10
1
NOSTUFF
ZT45
HOLE-VIA-20R10
1
4
NOSTUFF
ZT47
HOLE-VIA-20R10
1
NOSTUFF
ZT48
HOLE-VIA-20R10
1
NOSTUFF
ZT49
HOLE-VIA-20R10
1
NOSTUFF
ZT50
HOLE-VIA-20R10
1
NOSTUFF
ZT51
1
NOSTUFF
ZT52
HOLE-VIA-20R10
1
3
NOSTUFF
ZT54
HOLE-VIA-20R10
1
NOSTUFF
ZT55
HOLE-VIA-20R10
1
NOSTUFF
ZT56
HOLE-VIA-20R10
1
NOSTUFF
ZT57
HOLE-VIA-20R10
1
NOSTUFF
ZT58
HOLE-VIA-20R10HOLE-VIA-20R10
1
NOSTUFF
ZT60
HOLE-VIA-20R10
1
NOSTUFF
ZT61
HOLE-VIA-20R10
1
NOSTUFF
ZT62
HOLE-VIA-20R10
1
NOSTUFF
ZT63
HOLE-VIA-20R10
1
PWR BLOCK,PCB INFO
LAST_MODIFIED=Wed Sep 17 12:15:39 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
APPLE COMPUTER INC.
2
NOSTUFF
ZT65
HOLE-VIA-20R10
1
NOSTUFF
ZT66
HOLE-VIA-20R10
1
NOSTUFF
ZT67
HOLE-VIA-20R10
1
NOSTUFF
ZT68
HOLE-VIA-20R10
1
NOTICE OF PROPRIETARY PROPERTY
SIZE
DRAWING NUMBER
D
051-6497
NONE
SHT
3
SCALE
1
B
A
REV.
13
OF
69
DRAWING
<XR_PAGE_TITLE>
78
6
5
4
3
12
CPU INTERNAL PLL FILTERING
C1036
0.1UF
20%
10V
CERM
402
7C4<
8B8<>
7A5<
8A3<>
7A5<
7D5<
7B5<
7B4<
7C4<
8C4<>
8B5<>
9A3<>
44C4<>
7A5<
7A3<
7C5<
7A4<
7A4<
7A5<
6C6<
6C6<
6C6<
6C6<
6C6<
56C3>
9A1<>
9A1<>
9A1<>
7C5<
8B7<>
9B3<>
7B5<
7A5<
4D7<>
1
2
8A8<>
8A8<>
8A8<>
8A8<>
8A8<>
9B1<>
8A3<>
59C8>
8A3<>
8A3<>
9A1<>
9A1<>
7B5<
8D7<>
8A3<>
7A5<
7C5<
1
2
56C3>
56C3>
56C3>
8A3<>
9B3<
56C3>
59C8>
8A3<>
7B3<
B4
C2
C12D5E18F2G18
+MAXBUS_SLEEP
K2L5M3N6P2
H3
J5
59D8>
59B6>
52C6>
45D2<>
8C1<
D
8B7<
4D3<
CPU_VCORE_SLEEP
R891
470
1/16W
1
5%
MF
402
2
K12
K14
L11
L13M8M10
H10
H12
J11
H8
J13K8K10
J7
J9
L7
L9
M12
VDD
9D3<
9D3<>
9D3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9B3<>
9B3<>
9B3<>
9B3<>
9B3<>
9B3<>
9B3<>
9C3<>
9B3<>
9B3<
7C5<
9D3<>
9D3<>
9D3<>
9D3<>
9D3<>
9D3<>
9D3<>
9D3<>
9D3<>
9C3<>
9B3<>
9B3<>
9B3<>
8B8<>
8B4<>
8B4<>
8B7<>
8B8<>
8C4<>
8B7<>
8B8<>
8B7<>
8B7<>
8B8<>
8B8<>
8C8<>
8B7<>
8B8<>
8C7<>
8C7<>
8C8<>
8B7<>
8B8<>
8C8<>
8C8<>
8C7<>
8C8<>
8C7<>
8C7<>
8B4<>
8B5<>
8B4<>
8B5<>
8B4<>
8B4<>
8B5<>
8C5<>
8B5<>
8B8<>
4A3<
8B4<>
8B5<>
8B4<>
8B8<>
8B5<>
8B7<>
8C4<>
8B7<>
8C5<>
8B8<>
8B5<>
8B5<>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
56C3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
56C3>
56C3>
56D3>
9B3<>
C
B
INT_V2
R311
0
9C3<>
CPU_INT_GBL_L
7B7<
56C3>
56C3>
8B5<>
CPU_GBL_L
1 2
5%
1/16W
MF
402
INT_V1
1
R312
100
2
1%
1/16W
MF
402
7C7<
7B7<
7C7<
CPU_PULLDOWN
CPU_ADDR<0>
CPU_ADDR<1>
CPU_ADDR<2>
CPU_ADDR<3>
CPU_ADDR<4>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<7>
CPU_ADDR<8>
CPU_ADDR<9>
CPU_ADDR<10>
CPU_ADDR<11>
CPU_ADDR<12>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<15>
CPU_ADDR<16>
CPU_ADDR<17>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<20>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<25>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<28>
CPU_ADDR<29>
CPU_ADDR<30>
CPU_ADDR<31>
NC_CPUAP<0>
NC_CPUAP<1>
NC_CPUAP<2>
NC_CPUAP<3>
NC_CPUAP<4>
CPU_TT<0>
7A7<
CPU_TT<1>
7A7<
CPU_TT<2>
7A7<
CPU_TT<3>
7A7<
CPU_TT<4>
7A7<
CPU_TBST_L
7B7<
CPU_TSIZ<0>
CPU_TSIZ<1>
CPU_TSIZ<2>
8B7<
7A7<
7A7<
CPU_AACK_L
7B7<
CPU_ARTRY_L
7C7<
CPU_SHD0_L
7B5<
CPU_SHD1_L
7B5<
CPU_HIT_L
7C7<
CPU_BR_L
CPU_BG_L
CPU_TS_L
CPU_WT_L
CPU_CI_L
D2 B7
BR*
M1
BG*
L4
TS*
E11
A0
H1
A1
C11
A2
G3
A3
F10
A4
L2
A5
D11
A6
D1
A7
C10
A8
G2
A9
D12
A10
L3
A11
G4
A12
T2
A13
F4
A14
V1
A15
J4
A16
R2
A17
K5
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
A18
W2
A19
J2
A20
K4
A21
N4
A22
J3
A23
M5
A24
P5
A25
N3
A26
T1
A27
V2
A28
U1
A29
N5
A30
W1
A31
B12
A32
C4
A33
G10
A34
B11
A35
C1
AP0
E3
AP1
H6
AP2
F5
AP3
G7
AP4
E5
TT0
E6
TT1
F6
TT2
E9
TT3
C5
TT4
F11
TBST*
G6
TSIZ0
F7
TSIZ1
E7
TSIZ2
E2
GBL*
D3
WT*
J1
CI*
R1
AACK*
N2
ARTRY*
E4
SHD0*
H5
SHD1*
B2
HIT*
APOLLO_MPC7445_360
U34
800MHZ
BGA
(1 OF 3)
SEE_TABLE
6C5<
P8
OVDD
6D6<
9D8< 9B7<
7A3<
P11R4R13
R16
7B3<
T6T9U2
7C3<
U12
7C5<
44D2< 44D1< 44B7<
U16
45D2<>
V4
V7
7C7<
V10
8A3<>
V14
AVDD
BVSEL
SYSCLK
CLKOUT
PLLCFG0
PLLCFG1
PLLCFG2
PLLCFG3
PLL_EXT
DRDY*
TRST*
LSSDMODE*
L1TSTCLK
L2TSTCLK
QREQ*
QACK*
CKSTP_IN*
CKSTP_OUT*
SRESET*
HRESET*
PMON_IN*
PMON_OUT*
BMODE0*
BMODE1*
EXT_QUAL
TEST0
TEST1
TEST2
TEST3
TEST4
8D4< 8D1<
59C8> 52C6> 46D4<
CPU_AVDD
52C6>
1
A8
2
CPU_BUS_VSEL
A10
NO_TEST
H2
B8
C8
C7
D7
A7
M2
DBG*
R3
G1
DTI0
K1
DTI1
P1
DTI2
N1
DTI3
B9
TDI
A4
TDO
F1
TMS
C6
TCK
A5
E8
G8
B3
K6
TA*
L1
TEA*
E1
TBEN
P4
G5
A3
B1
D4
INT*
F9
SMI*
C9
MCP*
A2
D8
IBORG PULLS THIS UP, SPEC SAYS TO GROUND IT FOR SW CONTROL
D9
A9
G9
F8
A11
A12
B6
B10
E10
D10
NC_CPU_CLKOUT
CPU_PLL_CFG<0>
CPU_PLL_CFG<1>
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_PLL_CFGEXT
CPU_DBG_L
CPU_DRDY_L_UF
CPU_EDTI
CPU_DTI<0>
CPU_DTI<1>
CPU_DTI<2>
JTAG_CPU_TDI
JTAG_CPU_TDO
JTAG_CPU_TMS
JTAG_CPU_TCK
JTAG_CPU_TRST_L
CPU_LSSD_MODE
CPU_L1TSTCLK
CPU_L2TSTCLK
CPU_TA_L
CPU_TEA_L
CPU_TBEN
CPU_QREQ_L
CPU_QACK_L
CPU_CHKSTP_IN_L
CPU_CHKSTP_OUT_L
MPIC_CPU_INT_L
CPU_SMI_L
CPU_MCP_L
CPU_SRESET_L
CPU_HRESET_L
CPU_PMONIN_L
NO_TEST
NC_PMON_OUT_L
CPU_EMODE0_L
CPU_EMODE1_L
CPU_PULLUP
CPU_PULLDOWN
7B7<
7C5<
7C7<
7B7<
7C5<
7A5<
7B5<
8B7<>
8B4<>
8B4<>
7D5<
8B4<>
R901
10
1%
1/16W
MF
603
C1035
2.2UF
N20P80%
16V
CERM
805
56C3>
59C8>
59C8>
59C8>
56C3>
56C3>
59C6>
59C8>
56C3>
8D5<>
28B5>
8A3<>
CPU_VCORE_SLEEP
NOSTUFF
1
R895
47
5%
1/16W
MF
402
2
R850
0
1 2
5%
1/16W
MF
402
59C8>
59C8>
44D2<
44C2<
52C6>
45D2<>
8C1<
8B7<
4D7<
SYSCLK_CPU
RC GLITCH FILTER
PLACE CLOSE TO PIN
CPU_DRDY_L
NOSTUFF
1
C954
10PF
5%
50V
2
CERM
402
FILTERS A WAKE FROM SLEEP GLITCH
IF NECESSARY
ZH4
275R138
1
ZT9P1
ZH6
TH
SL-138X272-292
1
ZT10P1
59B6>
9A4<
7B7<
1
2
1
2
56C3>
8B5<>
C352
0.1UF
20%
10V
CERM
402
C369
0.1UF
20%
10V
CERM
402
59D8>
9B1<
56C3>
ZH5
TH
SL-138X272-292
ZH7
275R138
1
1
ZT11P1
ZT8P1
1
2
1
2
C345
0.1UF
20%
10V
CERM
402
C370
0.1UF
20%
10V
CERM
402
D
C
B
GND
INTREPID VERSION 1 PULLS GBL
ALL THE TIME. NEED TO
B5
C3
D13
E17F3G17
H9
J6
J8
H4
H7
H11
H13
K7K3K9
J10
J12
L6
L8
K11
K13
M4M7M9
L10
L12
M11D6M13
N7P3P9
P12R5R14
R17T7T10
U3
V5
V8
U13
U17
V11
V15
CUT THE TRACE AND YANK
A
FIXED IN INTREPID VERSION 2.
CPU MECHANICAL PARTS SUPPORT
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
DOWN HARD FOR SNOOPING.
875-1475
870-1113
412-0042
835-0251
8
67
1
PAD,THERMAL,CPU,U34
1
HEAT SINK,CPU,Q26,U34
1
CLIP,HEAT SINK,CPU,Q26.U34
1
SCREW,MACH,3MM W,8MM L,U34
1
5
U341
U343870-1114
U344
?
?
?
?
?
DEVU342
DEV
DEV
DEVU345NUT,3MM,U34
4
3
APPLE COMPUTER INC.
2
MPC7450 MAXBUS
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:40 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
SCALE
NONE
SHT
OF
4
69
1
A
REV.
13
DRAWING
<XR_PAGE_TITLE>
78
6
5
4
3
12
APOLLO_MPC7445_360
NC_CPUCRUD<0>
NC_CPUCRUD<1>
NC_CPUCRUD<2>
NC_CPUCRUD<3>
NC_CPUCRUD<4>
NC_CPUCRUD<5>
NC_CPUCRUD<6>
D
C
B
A
NC_CPUCRUD<7>
NC_CPUCRUD<8>
NC_CPUCRUD<9>
NC_CPUCRUD<10>
NC_CPUCRUD<11>
NC_CPUCRUD<12>
NC_CPUCRUD<13>
NC_CPUCRUD<14>
NC_CPUCRUD<15>
NC_CPUCRUD<16>
NC_CPUCRUD<17>
NC_CPUCRUD<18>
NC_CPUCRUD<19>
NC_CPUCRUD<20>
NC_CPUCRUD<21>
NC_CPUCRUD<22>
NC_CPUCRUD<23>
NC_CPUCRUD<24>
NC_CPUCRUD<25>
NC_CPUCRUD<26>
NC_CPUCRUD<27>
NC_CPUCRUD<28>
NC_CPUCRUD<29>
NC_CPUCRUD<30>
NC_CPUCRUD<31>
NC_CPUCRUD<32>
NC_CPUCRUD<33>
NC_CPUCRUD<34>
NC_CPUCRUD<35>
NC_CPUCRUD<36>
NC_CPUCRUD<37>
NC_CPUCRUD<38>
NC_CPUCRUD<39>
NC_CPUCRUD<40>
NC_CPUCRUD<41>
NC_CPUCRUD<42>
NC_CPUCRUD<43>
NC_CPUCRUD<44>
NC_CPUCRUD<45>
NC_CPUCRUD<46>
NC_CPUCRUD<47>
NC_CPUCRUD<48>
NC_CPUCRUD<49>
NC_CPUCRUD<50>
NC_CPUCRUD<51>
NC_CPUCRUD<52>
NC_CPUCRUD<53>
NC_CPUCRUD<54>
NC_CPUCRUD<55>
NC_CPUCRUD<56>
NC_CPUCRUD<57>
NC_CPUCRUD<58>
NC_CPUCRUD<59>
NC_CPUCRUD<60>
NC_CPUCRUD<61>
NC_CPUCRUD<62>
NC_CPUCRUD<63>
NC_CPUCRUD<64>
NC_CPUCRUD<65>
NC_CPUCRUD<66>
NC_CPUCRUD<67>
NC_CPUCRUD<68>
NC_CPUCRUD<69>
NC_CPUCRUD<70>
NC_CPUCRUD<71>
NC_CPUCRUD<72>
NC_CPUCRUD<73>
NC_CPUCRUD<74>
NC_CPUCRUD<75>
NC_CPUCRUD<76>
NC_CPUCRUD<77>
NC_CPUCRUD<78>
NC_CPUCRUD<79>
NC_CPUCRUD<80>
NC_CPUCRUD<81>
NC_CPUCRUD<82>
NC_CPUCRUD<83>
NC_CPUCRUD<84>
NC_CPUCRUD<85>
NC_CPUCRUD<86>
NC_CPUCRUD<87>
NC_CPUCRUD<88>
NC_CPUCRUD<89>
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
8
F18
F17
F19
H19
H18
H17
H16
E19
D18
F16
G16
D19
F15
G19
E16
D17
D16
P15
L15
N15
P18
N14
M14
M17
N13
N16
M19
M16
P19
N17
M15
L17
L14
K15
J14
J18
J19
J15
K19
J16
H15
L16
P16
M18
L19
L18
K18
J17
K16
C19
D15
G15
C18
A16
B19
A19
D14
E15
B15
B17
C17
C16
G13
E14
H14
G14
C15
A17
G12
F14
F13
E13
B16
A15
C14
A18
A13
F12
A14
G11
C13
N12
N18
K17
N19
B18
E12
B13
B14
A6
NC_F18
NC_F17
NC_F19
NC_H19
NC_H18
NC_H17
NC_H16
NC_E19
NC_D18
NC_F16
NC_G16
NC_D19
NC_F15
NC_G19
NC_E16
NC_D17
NC_D16
NC_P15
NC_L15
NC_N15
NC_P18
NC_N14
NC_M14
NC_M17
NC_N13
NC_N16
NC_M19
NC_M16
NC_P19
NC_N17
NC_M15
NC_L17
NC_L14
NC_K15
NC_J14
NC_J18
NC_J19
NC_J15
NC_K19
NC_J16
NC_H15
NC_L16
NC_P16
NC_M18
NC_L19
NC_L18
NC_K18
NC_J17
NC_K16
NC_C19
NC_D15
NC_G15
NC_C18
NC_A16
NC_B19
NC_A19
NC_D14
NC_E15
NC_B15
NC_B17
NC_C17
NC_C16
NC_G13
NC_E14
NC_H14
NC_G14
NC_C15
NC_A17
NC_G12
NC_F14
NC_F13
NC_E13
NC_B16
NC_A15
NC_C14
NC_A18
NC_A13
NC_F12
NC_A14
NC_G11
NC_C13
NC_N12
NC_N18
NC_K17
NC_N19
NC_B18
NC_E12
NC_B13
NC_B14
NC_A6
U34
800MHZ
BGA
(3 OF 3)
APOLLO_MPC7445_360
D
C
B
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
56D3>
56D3>
56D3>
9C1<>
9C1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9D8<
9D8<
9D8<
9D8<
9C8<
9C8<
9C8<
9C8<
56D3>
9D5<
9D5<
9D5<
9D5<
9C5<
9C5<
9C5<
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9D1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9B7<
9B7<
9B7<
9B7<
9A7<
9C1<>
9C1<>
9C1<>
8D7<>
8C4<>
8C5<>
8C4<
8C8<>
8C7<>
8C4<>
8C7<
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
8C4<>
8C7<>
8C8<>
8C5<>
8C7<>
8C8<>
8C4<>
8C8<>
8C5<>
8C4<>
CPU_DATA<10>
8C7<>
CPU_DATA<11>
8C5<>
CPU_DATA<12>
8C5<>
CPU_DATA<13>
8C7<>
CPU_DATA<14>
8C8<>
CPU_DATA<15>
8C5<>
CPU_DATA<16>
8C4<>
CPU_DATA<17>
8C7<>
CPU_DATA<18>
8C4<>
CPU_DATA<19>
8C4<>
CPU_DATA<20>
8C4<>
CPU_DATA<21>
8C8<>
CPU_DATA<22>
8C7<>
CPU_DATA<23>
8C8<>
CPU_DATA<24>
8D4<>
CPU_DATA<25>
8D7<>
CPU_DATA<26>
8C5<>
CPU_DATA<27>
8C7<>
CPU_DATA<28>
8D8<>
CPU_DATA<29>
8C8<>
CPU_DATA<30>
8C5<>
CPU_DATA<31>
8D7<>
CPU_DATA<32>
8D7<>
CPU_DATA<33>
8D8<>
CPU_DATA<34>
8D8<>
CPU_DATA<35>
8D7<>
CPU_DATA<36>
8D4<>
CPU_DATA<37>
8D5<>
CPU_DATA<38>
8D5<>
CPU_DATA<39>
8D5<>
CPU_DATA<40>
6C4<
CPU_DATA<41>
6C4<
CPU_DATA<42>
6C4<
CPU_DATA<43>
6C4<
CPU_DATA<44>
6C4<
CPU_DATA<45>
6C4<
CPU_DATA<46>
6C4<
CPU_DATA<47>
6C4<
CPU_DATA<48>
8C5<>
CPU_DATA<49>
8C4<>
CPU_DATA<50>
8C8<>
CPU_DATA<51>
8C8<>
CPU_DATA<52>
8C5<>
CPU_DATA<53>
8C7<>
CPU_DATA<54>
8D7<>
CPU_DATA<55>
8C5<>
CPU_DATA<56>
8D8<>
CPU_DATA<57>
8D5<>
CPU_DATA<58>
8D4<>
CPU_DATA<59>
8D8<>
CPU_DATA<60>
8D8<>
CPU_DATA<61>
8D4<>
CPU_DATA<62>
8D4<>
CPU_DATA<63>
8D5<>
CPU_DATA<0>
CPU_DATA<1>
CPU_DATA<2>
CPU_DATA<3>
CPU_DATA<4>
CPU_DATA<5>
CPU_DATA<6>
CPU_DATA<7>
CPU_DATA<8>
CPU_DATA<9>
NC_CPUDP<0>
NC_CPUDP<1>
NC_CPUDP<2>
NC_CPUDP<3>
NC_CPUDP<4>
NC_CPUDP<5>
NC_CPUDP<6>
NC_CPUDP<7>
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
R15
D0
W15
D1
T14
D2
V16
D3
W16
D4
T15
D5
U15
D6
P14
D7
V13
D8
W13
D9
T13
D10
P13
D11
U14
D12
W14
D13
R12
D14
T12
D15
W12
D16
V12
D17
N11
D18
N10
D19
R11
D20
U11
D21
W11
D22
T11
D23
R10
D24
N9
D25
P10
D26
U10
D27
R9
D28
W10
D29
U9
D30
V9
D31
W5
D32
U6
D33
T5
D34
U5
D35
W7
D36
R6
D37
P7
D38
V6
D39
P17
D40
R19
D41
V18
D42
R18
D43
V19
D44
T19
D45
U19
D46
W19
D47
U18
D48
W17
D49
W18
D50
T16
D51
T18
D52
T17
D53
W3
D54
V17
D55
U4
D56
U8
D57
U7
D58
R7
D59
P6
D60
R8
D61
W8
D62
T8
D63
T3
DP0
W4
DP1
T4
DP2
W9
DP3
M6
DP4
V3
DP5
N8
DP6
W6
DP7
U34
800MHZ
BGA
(2 OF 3)
MPC7450 - 2
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:41 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
67
5
4
3
2
051-6497
SCALE
NONE
SHT
5
1
REV.
OF
69
A
13
DRAWING
<XR_PAGE_TITLE>
78
6
5
BOMOPTIONS FOR UPPER-SET OF RESISTORS
1200@133&1500@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&1733@133&2167@167&1867@133&2333@167&2000@133&2500@167&2133@133&2667@167
667@133&833@167&733@133&917@167&800@133&1000@167&1067@133&1333@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&1867@133&2333@167&2133@133&2667@167
800@133&1000@167&867@133&1083@167&1067@133&1333@167&1200@133&1500@167&1733@133&2167@167&1867@133&2333@167&2133@133&2667@167
4
3
12
D
SPECIAL CONFIG
1
R382
10K
1%
1/16W
MF
402
2
SPECIAL CONFIG
1
R379
10K
1%
1/16W
MF
402
2
SPECIAL CONFIG
1
R378
10K
1%
1/16W
MF
402
2
C
SPECIAL CONFIG
1
R383
1K
1%
1/16W
MF
402
2
CPU_PLL_STOP
44B8<
SPECIAL CONFIG
1
R381
1K
1%
1/16W
MF
402
2
SPECIAL CONFIG
1
R380
1K
1%
1/16W
MF
402
2
B
667@133&833@167&733@133&917@167&800@133&1000@167&867@133&1083@167&1000@133&1250@167&1200@133&1500@167&1467@133&1833@167&1600@133&2000@167&1733@133&2167@167&2000@133&2500@167&2133@133&2667@167
SPECIAL CONFIG
1
R376
10K
1%
1/16W
MF
402
2
SPECIAL CONFIG
1
R377
1K
1%
1/16W
MF
402
2
+MAXBUS_SLEEP
8D1<
8A3<>
46D4<
45D2<>
SPECIAL CONFIG
1
R374
10K
1%
1/16W
MF
402
2
CPU_PLL_CFGEXT
CPU_PLL_CFG<3>
CPU_PLL_CFG<2>
CPU_PLL_CFG<1>
CPU_PLL_CFG<0>
SPECIAL CONFIG
1
R375
1K
1%
1/16W
MF
402
2
7C7<
44D2<
7C5<
44D1<
4C3<
4C3<
4D3<
4D3<
4D3<
4D5<
44B7<
7C3<
8A8<>
8A8<>
8A8<>
8A8<>
8A8<>
6C5<
44D1<
7B3<
44B7<
7A3<
44D2<
59C8>
7A3<
9D8<
7B3<
52C6>
6D6<
9B7<
7C3<
45D2<>
4D5<
8D4<
7C5<
46D4<
52C6>
59C8>
8A3<>
7C7<
+MAXBUS_SLEEP
R879
10K
1/16W
R363
4.7K
1/16W
NOSTUFF
1
R878
1%
1/16W
MF
402
2
1
R364
4.7K
5%
1/16W
MF
402
2
NOSTUFF
SPARE
10K
402
402
8D1<
1%
MF
5%
MF
1
R889
2
1
R887
4.7K
2
SPARE
8D4<
9D8<
9B7<
NOSTUFF
667@133&733@133&800@133&867@133&933@133&1000@133&1067@133&1200@133&1333@133&1467@133&1600@133&1733@133&1867@133&2000@133&2133@133
1
1
R866
R874
10K
10K
1%
1/16W
MF
402
2
1
R357
4.7K
5%
1/16W
MF
402
2
PLL4MODESEL_NXT[2:0]
000: 166.4 MHZ
001: 149.76 MHZ
010: 133.12 MHZ
011: 99.84 MHZ
100: 83.20 MHZ
(STUFF FOR 133 AND 167)
10K
1%
1/16W
1/16W
402
402
1%
1/16W
MF
MF
402
2
1
R368
4.7K
5%
5%
1/16W
MF
MF
402
2
833@167&917@167&1000@167&1083@167&1167@167&1250@167&1333@167&1500@167&1667@167&1833@167&2000@167&2167@167&2333@167&2500@167&2667@167
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
1
R877
10K
1%
1/16W
MF
402
2
1
R365
4.7K
5%
1/16W
MF
402
2
1
1
2
1
2
1: ACTIVE
0: INACTIVE
R867
R875
R367
4.7K
INTERNALSPREADEN
10K
10K
1%
1/16W
1/16W
MF
402
2
1
R356
4.7K
5%
1/16W
1/16W
MF
402
2
PCI1 SOURCE CLOCK
1: PLL5 (NO SPREAD)
0: PLL4
402
402
(STUFF FOR 133 AND 167)
1
1%
MF
2
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<46>
CPU_DATA<47>
1
INTREPID BOOT STRAPS
5%
BITS 40 - 47
MF
2
PCI0 SOURCE CLOCK
1: PLL5 (NO SPREAD)
0: PLL4
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
8D7<>
8C4<>
8C5<>
8C4<
8C8<>
8C7<>
8C4<>
8C7<
9C1<>
9C1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
CPU FREQUENCY CONFIGURATION
MULTIPLIER
(BUS-TO-CORE)
5.0X
5.5X
6.0X
6.5X
7.0X
7.5X
8.0X
9.0X
10.0X
11.0X
12.0X
13.0X
14.0X
15.0X
16.0X
(SUPPORTED CPU & BUS SPEEDS)
CORE FREQUENCY
(AT BUS FREQUENCY)
167MHZ
833
917
1000
1083
1167
1250
1333
1500
1667
1833
2000
2167
2333
2500
2667
(MHZ)
133MHZ
667
733
800
867
933
1000
1067
1200
1333
1467
1600
1733
1867
2000
2133
CPU_PLL_CFG
E 0123 HEX
0 1011 0B
0 1001 09
0 1101 0D
0 0101 05
0 0010 02
0 0001 01
0 1100 0C
1 0111 17
1 1010 1A
1 1001 19
1 1011 1B
1 0101 15
1 1100 1C
1 0001 11
1 1101 1D
667@133&833@167&933@133&1167@167&1200@133&1500@167&1333@133&1667@167&1600@133&2000@167
D
C
B
933@133&1167@167&1067@133&1333@167&1333@133&1667@167&1867@133&2333@167
733@133&917@167&800@133&1000@167&867@133&1083@167&1000@133&1250@167&1067@133&1333@167&1467@133&1833@167&1733@133&2167@167&1867@133&2333@167&2000@133&2500@167&2133@133&2667@167
667@133&833@167&733@133&917@167&933@133&1167@167&1000@133&1250@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&2000@133&2500@167
867@133&1083@167&933@133&1167@167&1000@133&1250@167&1200@133&1500@167&1733@133&2167@167&2000@133&2500@167
667@133&833@167&733@133&917@167&800@133&1000@167&867@133&1083@167&933@133&1167@167&1000@133&1250@167&1067@133&1333@167
CPU SPEED & BUS RATIO SUPPORT
THE CONFIGURATION RESISTORS BELOW ARE SELF CONFIGURING
WHEN THE ENGINEER SELECTS THE APPROPRIATE CPU AND
A
BUS SPEED BOM OPTION, THE APPROPRIATE RESISTORS ARE
ARE AUTOMATICALLY SELECTED
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
IC,APOLLO6,SICOH,1.0GHZ,1.5V+30/-130MV,28W,85C
1
1
IC,APOLLO6,SICOH,1.25GHZ,1.57V+70/-70MV,35W,85C
1000@167CRITICALU34337S2799
1250@167CRITICALU34337S2801
APPLE COMPUTER INC.
8
67
5
4
3
2
CPU BUS RATIO BITS
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:42 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
SCALE
NONE
SHT
OF
6
69
1
A
REV.
13
DRAWING
<XR_PAGE_TITLE>
D
C
B
A
8D1<
46D4<
56C3>
78
BMODE | MSSCR0 | Sys | Vger | Addr
<0> <1> | <16:17> | Bus | ID | Drve
=========+=========+=====+======+======
L L | 1 1 | ??? | 01 | yes unavail
L !hr | 1 0 | Max | 01 | yes unavail
L hr | 1 1 | ??? | 00 | yes unavail
L H | 1 0 | Max | 00 | yes unavail
---------+---------+-----+------+-----Â !hr L | 0 1 | MB+ | 01 | yes unavail
!hr !hr | 0 0 | 60x | 01 | yes unavail
!hr hr | 0 1 | MB+ | 00 | yes unavail
!hr H | 0 0 | 60x | 00 | yes unavail
---------+---------+-----+------+-----Â hr L | 1 1 | ??? | 01 | norm unavail
hr !hr | 1 0 | Max | 01 | norm
hr hr | 1 1 | ??? | 00 | norm unavail
HR H | 1 0 | MAX | 00 | NORM
---------+---------+-----+------+-----Â H L | 0 1 | MB+ | 01 | norm unavail
H !hr | 0 0 | 60x | 01 | norm
H hr | 0 1 | MB+ | 00 | norm unavail
H H | 0 0 | 60x | 00 | norm
MAXBUS PULL-UPS
59C8>
8A3<>
45D2<>
56D3>
56C3>
56C3>
56C3>
56C3>
56C3>
56D3>
56C3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
9B3<>
56D3>
56D3>
56C3>
56C3>
7C5<
9D3<>
9B3<
9B1<
9A1<>
9B3<>
9B1<>
9B3<>
9C3<>
9B3<>
9B3<>
9B3<>
9B3<>
9B3<>
44D2<
9A1<>
8B8<>
9D3<
8B5<>
9D3<>
9C3<>
9B3<>
7C3<
8B5<>
8B4<>
7B3<
44D1<
8B7<>
4D7<>
8C4<>
4A7<>
8B4<>
8B8<>
4A7>
4C2<
8B5<>
4C3<
4A7<
8B8<>
4C3<
8B4<>
4B7>
CPU_INT_GBL_L
4B8<
8C5<>
8B5<>
8B4<>
4B7<>
8B5<>
4B7<>
8B4<>
4B7<>
8B5<>
4B7<>
8B4<>
4B7<>
7A3<
6D6<
44B7<
9D8<
CPU_TS_L
CPU_TA_L
4C3<
CPU_ARTRY_L
CPU_BR_L
4D7>
CPU_HIT_L
CPU_DRDY_L
CPU_TEA_L
CPU_AACK_L
CPU_DBG_L
CPU_BG_L
4D7<
CPU_TBST_L
CPU_CI_L
4A7>
CPU_WT_L
4B7>
CPU_TT<0>
CPU_TT<1>
CPU_TT<2>
CPU_TT<3>
CPU_TT<4>
52C6>
6C5<
9B7<
+MAXBUS_SLEEP
4D5<
8D4<
R347
10K
1 2
1%
1/16W
MF
402
R346
10K
1 2
1%
1/16W
MF
402
R840
10K
1 2
1%
1/16W
MF
402
R845
10K
1 2
1%
1/16W
MF
402
R847
10K
1 2
1%
1/16W
MF
402
R349
10K
1 2
1%
1/16W
MF
402
R844
10K
1 2
1%
1/16W
MF
402
RP78
10K
1 8
5%
1/16W
SM1
R843
10K
1 2
1%
1/16W
MF
402
R350
10K
1 2
1%
1/16W
MF
402
R348
10K
1 2
1%
1/16W
MF
402
R841
10K
1 2
1%
1/16W
MF
402
R851
10K
1 2
1%
1/16W
MF
402
R849
10K
1 2
1%
1/16W
MF
402
R846
10K
1 2
1%
1/16W
MF
402
R842
10K
1 2
1%
1/16W
MF
402
RP78
10K
2 7
5%
1/16W
SM1
RP78
10K
3 6
5%
1/16W
SM1
RP78
10K
4 5
5%
1/16W
SM1
8
<- DEFAULT
59C8>
44D2<
8D4<
59C8>
44C2<
6
8D1<
52C6>
8D5<>
8A3<>
67
56C3>
59C8>
8A3<>
46D4<
28B5>
59C8>
8A3<>
59C8>
7B3<
59C6>
59C8>
59C8>
9B3<
8B7<>
8A3<>
8A3<>
4C3<
4D7<>
7C7<
7C3<
45D2<>
9A3<>
4C3<
CPU_CHKSTP_OUT_L
4B3>
4B3<
7A3<
8A3<>
8D7<>
4B3<
44C4<>
8A3<>
8A3<>
CPU_QREQ_L
4C3>
JTAG_CPU_TCK
4C3<
JTAG_CPU_TRST_L
CPU_PMONIN_L
4B3<
CPU_EDTI
4C3<
CPU_PULLDOWN
4A3<
7B3<
7A3<
44D1<
CPU_TBEN
4C3<
CPU_SHD0_L
CPU_SHD1_L
CPU_MCP_L
4B3<
6D6<
44B7<
44D2<
4A7<>
4A7<>
CPU_LSSD_MODE
CPU_CHKSTP_IN_L
CPU_PULLUP
4A3<
CPU_HRESET_L
4B3<
CPU_SRESET_L
4B3<
MPIC_CPU_INT_L
CPU_SMI_L
4B3<
JTAG_CPU_TDI
4C3<
JTAG_CPU_TMS
4C3<
5
R848
10K
1 2
1%
1/16W
MF
10K
402
470
402
1%
MF
10K
5%
1/16W
SM1
5%
MF
402
R925
200
1 2
5%
1/16W
MF
402
R858
10K
1 2
1%
1/16W
MF
402
R924
1 2
1/16W
RP79
4 5
R859
1 2
1/16W
MPC7450 PULL-UPS
59C8>
6C5<
9D8<
+MAXBUS_SLEEP
4D5<
9B7<
R857
10K
1 2
1%
1/16W
MF
402
R910
10K
1 2
1%
1/16W
MF
402
NOSTUFF
R921
1K
1 2
1%
1/16W
MF
402
R909
1K
1 2
1%
1/16W
MF
402
RP79
10K
2 7
5%
1/16W
SM1
R912
10K
1 2
1%
1/16W
MF
402
R923
10K
1 2
1%
1/16W
MF
402
R856
10K
1 2
1%
1/16W
MF
402
R860
10K
1 2
1%
1/16W
MF
402
R911
10K
1 2
1%
1/16W
MF
402
R882
1K
1 2
1%
1/16W
MF
402
R922
10K
1 2
1%
1/16W
MF
402
RP79
10K
3 6
5%
1/16W
SM1
RP79
10K
1 8
5%
1/16W
SM1
5
4
CPU_BUS_VSEL
4D3<
CPU_L2TSTCLK
4C3<
CPU_L1TSTCLK
4C3<
CPU_EMODE0_L
4B3<
CPU_EMODE1_L
4B3<
4
3
SIGNAL
CPU_EMODE0_L
CPU_BUS_VSEL
CPU_HRESET_L or L3_OVDD
CPU_L3_VSEL LOW
NOSTUFF
R915
0
1 2
5%
1/16W
NOSTUFF
MF
402
R913
10K
1 2
1/16W
402
R914
200
1 2
5%
1/16W
MF
402
BUS MODE
0V 1.8V BUS MODE
INV_HRESET 1.5V BUS MODE
OVDD 2.5V BUS MODE
R918
10K
1 2
1/16W
NOSTUFF
1 2
NOSTUFF
1 2
DO NOT USE UNLESS FIX INVERTER BUFFER
1 2
1 2
CPUBUS_MAX
1 2
NOSTUFF
R902
1 2
1/16W
R926
0
5%
1/16W
MF
402
R920
200
5%
1/16W
MF
402
NOSTUFF
R906
0
5%
1/16W
MF
402
R917
200
5%
1/16W
MF
402
R905
200
5%
1/16W
MF
402
200
5%
MF
402
402
NOSTUFF
R919
1 2
1/16W
402
NOSTUFF
R907
10K
1 2
1/16W
402
NOSTUFF
R916
1 2
1/16W
402
CPUBUS_60X
1 2
1 2
CPU_HRESET_L
CPU_HRESET_L
CPU_HRESET_H
CPU_HRESET_H
5%
MF
1%
MF
0
5%
MF
5%
MF
0
5%
MF
R904
1K
5%
1/16W
MF
402
R903
1K
1%
1/16W
MF
402
TIED
HIGH
LOW
VGER_INV_HRESET
+MAXBUS_SLEEP
+MAXBUS_SLEEP
CPU_HRESET_L
VGER_INV_HRESET
+MAXBUS_SLEEP
CPU_HRESET_L
VGER_INV_HRESET
+MAXBUS_SLEEP
CPU_HRESET_L
+MAXBUS_SLEEP
VGER_INV_HRESET
12
APPLICATION
60X BUS MODE
MAX BUS MODE
2.5V INTERFACE
1.8V INTERFACE
1.5V INTERFACE
2.5V INTERFACE
1.8V INTERFACE
1.5V INTERFACE
7B3<
7A3<
59C8>
6C5<
4D5<
9B7<
8D4<
6D6<
9D8<
44D1>
7A3<
44B7<
7B3<
44D1<
7C3<
44D2<
7C5<
7C7<
45D2<>
8A3<>
46D4<
8D1<
52C6>
D
C
59C8>
4D5<
8D4<
4B3<
4D5<
9B7<
4B3<
59C8>
4D5<
8D4<
4B3<
59C8>
7A3<
7A3<
7A3<
7A3<
6C5<
9B7<
7A5<
6C5<
9B7<
6C5<
9D8<
7A5<
7B3<
7A5<
7B3<
6D6<
9D8<
7B3<
6D6<
9D8<
6D6<
44B7<
7A3<
44B7<
7B3<
7C3<
7A3<
7B3<
7C3<
7A3<
44B7<
8A3<>
44D1>
44D1<
44D1>
7B3<
44D1<
8A3<>
7C3<
8A3<>
7B3<
44D1<
44C2<
44D2<
7C3<
7C3<
44D2<
44C2<
7C5<
44C2<
44D2<
44D2<
7C5<
7C7<
45D2<>
7C5<
45D2<>
44D2<
44D2<
45D2<>
7C7<
8A3<>
46D4<
7C7<
59C8>
59C8>
8A3<>
46D4<
8A3<>
46D4<
8D1<
52C6>
8D1<
52C6>
8D4<
59C8>
8D1<
52C6>
B
CPU CONFIG OPTIONS
9D8<
7C5<
4D5<
7A3<
44B7<
7B3<
6C5<
7B3<
44D1<
7C3<
6D6<
7C3<
8D1<
44D2<
44D1>
8A3<>
7C7<
3
9B7<
8D4<
46D4<
45D2<>
APPLE COMPUTER INC.
52C6>
2
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:43 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
59C8>
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
NONE
SHT
7
SCALE
1
REV.
OF
69
A
13
DRAWING
<XR_PAGE_TITLE>
1
C992
10UF
N20P80%
10V
2
Y5V
805
3
1
C988
0.1UF
20%
10V
2
CERM
402
1
C1026
0.1UF
20%
10V
2
CERM
402
1
C1043
0.1UF
20%
10V
2
CERM
402
1
C982
0.1UF
20%
10V
2
CERM
402
1
C1013
0.1UF
20%
10V
2
CERM
402
1
C999
0.1UF
20%
10V
2
CERM
402
78
6
8D1<
8A3<>
7C7<
46D4<
7C5<
45D2<>
52C6>
7C3<
44D2<
7B3<
5
7A3<
44D1<
6D6<
44B7<
59C8>
6C5<
9D8<
+MAXBUS_SLEEP
4D5<
9B7<
4
1
C350
10UF
N20P80%
10V
2
Y5V
805
1
C958
10UF
N20P80%
10V
2
Y5V
805
1
C983
10UF
N20P80%
10V
2
Y5V
805
1
C974
0.1UF
20%
10V
2
CERM
402
12
1
C1003
0.1UF
20%
10V
2
CERM
402
D
56B3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
9C1<>
56D3>
9D5<
9C1<>
9D5<
56D3>
56D3>
56D3>
56D3>
56D3>
9D8<
56D3>
56D3>
9D8<
56D3>
9B1<>
9B7<
9B1<>
9B1<>
9B7<
9B1<>
9C1<>
9C1<>
9C1<>
9C1<>
9D1<>
9B1<>
9D1<>
9D1<>
9B1<>
9D1<>
6C4<
5C4<>
5B4<>
5B4<>
5C4<>
5B4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5B4<>
5D4<>
5D4<>
5B4<>
5D4<>
5B4<>
8A2<
C
56D3>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9B1<>
9C3<>
9C3<>
9C3<>
7C7<
9C3<>
9C3<>
9B3<
9D3<>
9C3<>
4B7<>
4B7<>
4B7<>
4C7<>
4C7<>
4B7<>
7B7<
4C7<>
4C7<>
4C7<>
4A7<>
4C7<>
4C7<>
7C7<
4C7<>
4C7<>
4C3<
4A7>
56C3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
56D3>
56D3>
56D3>
9B3<>
56D3>
56D3>
56C3>
56D3>
56D3>
B
59D8>
59B6>
52C6>
45D2<>
8C1<
FMAX DEBUG CONNECTOR
NOSTUFF
J32
SM12B-SRSS-TB
F-RT-SM
14
1
2
3
4
5
A
6
7
8
9
10
11
12
13
CPU_PLL_CFG<0>
CPU_PLL_CFG<1>
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_PLL_CFGEXT
NO_TEST
NO_TEST
PWR_SWITCH*
PMU_RST*
NO_TEST
(518S0105)
8
SYSCLK_LA
CPU_DATA<34>
CPU_DATA<56>
CPU_DATA<59>
CPU_DATA<33>
CPU_DATA<60>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<23>
CPU_DATA<21>
CPU_DATA<14>
CPU_DATA<50>
CPU_DATA<2>
CPU_DATA<5>
CPU_DATA<51>
CPU_DATA<7>
CPU_DATA<44>
CPU_ADDR<26>
CPU_ADDR<29>
CPU_ADDR<27>
CPU_ADDR<18>
CPU_ADDR<23>
CPU_ADDR<25>
CPU_DBG_L
CPU_ADDR<17>
CPU_ADDR<20>
CPU_ADDR<16>
CPU_ARTRY_L
CPU_ADDR<10>
CPU_ADDR<13>
CPU_HIT_L
CPU_ADDR<3>
CPU_ADDR<9>
CPU_VCORE_SLEEP
4D7<
4D3<
4D3<
4D3<
4D3<
4C3<
4C3<
NC_FMAX7
NC_FMAX8
29B3<>
NC_RESET_BUTTON_L
44B1<
44C5<>
44A5<>
CON_38SM_MICTOR
OMIT
10
11
12
13
14
15
16
17
18
19
CON_38SM_MICTOR
OMIT
10
11
12
13
14
15
16
17
18
19
6C6<
6C6<
6C6<
6C6<
6C6<
59D6>
59D6>
44B5<>
J20
SM
CPROBE
1
SYM_VER3
GND
2
GND
3
CLK3
4
C3_7
5
C3_6
6
C3_5
7
C3_4
8
C3_3
9
C3_2
C3_1
C3_0
C2_7
C2_6
C2_5
C2_4
C2_3
C2_2
C2_1
C2_0
GND
39404142434445
J31
SM
APROBE
1
SYM_VER2
GND
2
GND
3
CLK0
4
A3_7
5
A3_6
6
A3_5
7
A3_4
8
A3_3
9
A3_2
A3_1
A3_0
A2_7
A2_6
A2_5
A2_4
A2_3
A2_2
A2_1
A2_0
GND
39404142434445
SEE_TABLE
1
2
MAXBUS LOGIC ANALYZER SUPPORT
NOTE: INTREPID MAXBUS CONFIG STRAPS MUST DROP
TO 1K OR LOGIC ANALYZER MAY AFFECT STRAP VALUES
MPIC_CPU_INT_L
CPU_DATA<35>
CPU_DATA<54>
CPU_DATA<32>
CPU_DATA<40>
CPU_DATA<31>
CPU_DATA<25>
CPU_DATA<27>
CPU_DATA<22>
CPU_DATA<17>
CPU_DATA<10>
CPU_DATA<13>
CPU_DATA<1>
CPU_DATA<4>
CPU_DATA<53>
CPU_DATA<47>
CPU_DATA<45>
CPU_ADDR<30>
CPU_ADDR<31>
CPU_ADDR<28>
CPU_ADDR<22>
CPU_ADDR<21>
CPU_ADDR<24>
CPU_TS_L
CPU_ADDR<15>
CPU_ADDR<19>
CPU_ADDR<14>
CPU_DTI<0>
CPU_ADDR<7>
CPU_ADDR<12>
CPU_QREQ_L
CPU_TSIZ<2>
CPU_ADDR<5>
4D7<>
4C3<
4C3>
5C4<>
5B4<>
5C4<>
5B4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5D4<>
5C4<>
5D4<>
5D4<>
5B4<>
5B4<>
5B4<>
4B7<>
4B7<>
4B7<>
4C7<>
4C7<>
4B7<>
7C7<
4C7<>
4C7<>
4C7<>
4C7<>
4C7<>
4B7>
4C7<>
4B3<
9D1<>
9D1<>
9A1<>
9D3<>
7D5<
9B3<>
9D3<>
7A5<
9B7<
9B1<>
9B7<
6C4<
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
9D1<>
9D1<>
9B1<>
6C4<
6C4<
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9C3<>
9D3<>
9C3<>
9C3<>
9C3<>
9C3<>
9B3<
56D3>
56D3>
56C3>
56D3>
56D3>
56D3>
28B5>
9C1<>
9C8<
9C1<>
9C1<>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
9C8<
9B1<>
9B1<>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
C1_7
C1_6
C1_5
C1_4
C1_3
C1_2
C1_1
C1_0
C0_7
C0_6
C0_5
C0_4
C0_3
C0_2
C0_1
C0_0
CLK1
A1_7
A1_6
A1_5
A1_4
A1_3
A1_2
A1_1
A1_0
A0_7
A0_6
A0_5
A0_4
A0_3
A0_2
A0_1
A0_0
GND
GND
GND
GND
38
37
36
Q1
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
CPU CORE DECOUPLING
SEE_TABLE
1
C1022
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C1009
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C996
1UF
10%
6.3V
2
CERM
402
C1096
1UF
10%
6.3V
CERM
402
1
2
1
2
1
2
SEE_TABLE
1
C1097
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
C1027
1UF
10%
6.3V
CERM
402
SEE_TABLE
C1002
1UF
10%
6.3V
CERM
402
SEE_TABLE
C1012
1UF
10%
6.3V
CERM
402
1
C1901
0.1UF
10V
2
CERM
402
SEE_TABLE
1
C1011
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C1023
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C1024
1UF
10%
6.3V
2
CERM
402
1
C1902
0.1UF
20%20%
10V
2
CERM
SEE_TABLE
1
C1008
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C1017
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C1001
1UF
10%
6.3V
2
CERM
402
1
C1903
0.1UF
20%
10V
2
CERM
402402
67
1
2
1
2
1
2
8A3<>
59C8>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
(519-0698)
SEE_TABLE
C1010
1UF
10%
6.3V
CERM
402
SEE_TABLE
C1031
1UF
10%
6.3V
CERM
402
SEE_TABLE
C1028
1UF
10%
6.3V
CERM
402
1
C1904
0.1UF
20%
10V
2
CERM
402
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
SEE_TABLE
1
C1025
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C997
1UF
10%
6.3V
2
CERM
402
SEE_TABLE
1
C1018
1UF
10%
6.3V
2
CERM
402
1
C1910
2
7B5<
9C5<
9D5<
56D3>
9C8<
56D3>
9C8<
9B1<>
9D8<
56D3>
56C3>
56D3>
56D3>
56C3>
56D3>
56D3>
56C3>
56C3>
0.1UF
20%
10V
CERM
402
CPU_CHKSTP_OUT_L
4B3>
9C1<>
5B4<>
9C1<>
5B4<>
9C1<>
5B4<>
9B1<>
5A4<>
9B1<>
5B4<>
9C1<>
5C4<>
9C1<>
5C4<>
9D1<>
5D4<>
9D1<>
5C4<>
9B1<>
5B4<>
5C4<>
9D1<>
9D1<>
5D4<>
9D1<>
5C4<>
5B4<>
9B1<>
6C4<
5B4<>
9B1<>
5B4<>
9D3<>
4C7<>
9C3<>
7A7<
4B7>
9B3<>
9D3<>
4C7<>
9A1<>
7B7<
9B3<>
7A7<
9D3<>
4C7<>
9B3<>
4B7>
9B3<>
7A7<
9B3<>
7A7<
9B1<
7B7<
56C3>
9B3<>
7B7<
SEE_TABLE
1
C1098
1UF
10%
6.3V
2
CERM
402
59D8>
CPU_DATA<37>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<63>
CPU_DATA<57>
CPU_DATA<30>
CPU_DATA<26>
CPU_DATA<8>
CPU_DATA<15>
CPU_DATA<55>
CPU_DATA<11>
CPU_DATA<3>
CPU_DATA<12>
CPU_DATA<52>
CPU_DATA<42>
CPU_DATA<48>
CPU_ADDR<8>
CPU_CI_L
4A7>
CPU_TSIZ<1>
CPU_ADDR<4>
CPU_TEA_L
4C3<
CPU_TT<1>
4B7<>
CPU_ADDR<1>
CPU_TSIZ<0>
CPU_WT_L
4B7>
CPU_TT<3>
4B7<>
CPU_DRDY_L
4C2<
CPU_GBL_L
4B8<>
CPU_AACK_L
4A7<
C1022,C1027,C1011,C1008,C1010,C1025,C1009,C1002,C1023,C1017,C1031,C997,C996,C1012,C1024,C1001,C1028,C1018,C1096,C1097,C1098
C1022,C1027,C1011,C1008,C1010,C1025,C1009,C1002,C1023,C1017,C1031,C997,C996,C1012,C1024,C1001,C1028,C1018,C1096,C1097,C1098
35A2<
35B4<>
59D8>
34B7<
59D8>
35C4<
59D8>
59C8>
5
J30
CON_38SM_MICTOR
OMIT
OMIT
SM
EPROBE
1
SYM_VER5
GND
J19
F-ST-SM
DPROBE
SYM_VER1
GND
E1_7
E1_6
E1_5
E1_4
E1_3
E1_2
E1_1
E1_0
E0_7
E0_6
E0_5
E0_4
E0_3
E0_2
E0_1
E0_0
CLK2
D1_7
D1_6
D1_5
D1_4
D1_3
D1_2
D1_1
D1_0
D0_7
D0_6
D0_5
D0_4
D0_3
D0_2
D0_1
D0_0
GND
GND
GND
GND
GND
2
GND
3
Q3
4
E3_7
5
E3_6
6
E3_5
7
E3_4
8
E3_3
9
E3_2
10
E3_1
11
E3_0
12
E2_7
13
E2_6
14
E2_5
15
E2_4
16
E2_3
17
E2_2
18
E2_1
19
E2_0
39404142434445
CON_37SM_MICTOR
2
GND
3
Q0
4
D3_7
5
D3_6
6
D3_5
7
D3_4
8
D3_3
9
D3_2
10
D3_1
11
D3_0
12
D2_7
13
D2_6
14
D2_5
15
D2_4
16
D2_3
17
D2_2
18
D2_1
19
D2_0
39 40 41 42 43 44 45
Q2
CPU CORE DECOUPLING
QTY
PART#
132S0013
138S0541 21
DESCRIPTION
CAP,CER,.22UF,20%,6.3V,0402,X5R
21
CAP,CER,1UF,10%,6.3V,0402,X5R
PULLDOWN ON TRST* STRONGER TO OVERCOME POSSIBLE LEAKAGE
+3V_MAIN
R937
10K
1% SM-1
1/16W
MF
402
JTAG_ASIC_TMS
34B7<
JTAG_ASIC_TDI
28C6<
JTAG_ASIC_TDO
35B4<>
JTAG_ASIC_TCK
34B7<
JTAG_ASIC_TRST_L
34B7<
NC_TESTMODE
NC_LCENABLE
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
1
2
NC_JTAG7
1
R939
10K
1%
1/16W
MF
402
2
4
1
C969
2.2UF
N20P80%
16V
2
CERM
805
CPU_DATA<58>
CPU_DATA<36>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<24>
CPU_DATA<41>
CPU_DATA<9>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<16>
CPU_DATA<18>
CPU_DATA<49>
CPU_DATA<6>
CPU_DATA<0>
CPU_DATA<43>
CPU_DATA<46>
REFERENCE DESIGNATOR(S)
1
C353
2.2UF
N20P80%
16V
2
CERM
805
CPU_ADDR<11>
CPU_ADDR<6>
CPU_TA_L
CPU_TT<0>
CPU_ADDR<2>
CPU_BR_L
CPU_TT<4>
CPU_ADDR<0>
CPU_TBST_L
CPU_DTI<1>
CPU_TT<2>
CPU_BG_L
CPU_QACK_L
CPU_DTI<2>
NO_TEST
NO_TEST
NO_TEST
1
R940
1K
1%
1/16W
MF
(511S0018)
402
2
5B4<>
5C4<>
5B4<>
5B4<>
5C4<>
5B4<>
5D4<>
5C4<>
5C4<>
5C4<>
5C4<>
5B4<>
5D4<>
5D4<>
5B4<>
5B4<>
4C7<>
4C7<>
7C7<
4C3<
4B7<>
4C7<>
7C7<
4D7>
4B7<>
4C7<>
4B7>
4C3<
4B7<>
4D7<
7B7<
4C3<
4C3<
NOSTUFF
J22
1
3 4
5 6
7 8
9
11 12
13 14
15 16
17 18
19
9B1<>
9A7<
9B1<>
9B1<>
9C1<>
6C4<
9D1<>
9C1<>
9C1<>
9C1<>
9C1<>
9B1<>
9D1<>
9D1<>
6C4<
6C4<
9C3<>
9D3<>
9A1<>
9B3<>
7A7<
9D3<>
9D3<
9B3<>
7A7<
9D3<>
9B3<>
7B7<
56C3>
9A1<>
9B3<>
7A7<
9D3<>
56C3>
9B3<>
56C3>
9A1<>
BOM OPTION
1GHZ_DECOUP
1_25GHZ_DECOUP
2
NO_TEST
10
20
9D5<
56D3>
56D3>
9C1<>
9C5<
56D3>
9C5<
56D3>
56D3>
9C1<>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
9D8<
56D3>
56D3>
56D3>
56D3>
9B1<>
9B1<>
56D3>
56D3>
56D3>
56C3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
59A8>
56B3>
+MAXBUS_SLEEP
CPU_CHKSTP_OUT_L
CPU_HRESET_L
CPU_SRESET_L
NC_JTAG10
JTAG_CPU_TMS
JTAG_CPU_TDI
JTAG_CPU_TDO
JTAG_CPU_TCK
JTAG_CPU_TRST_L
54A7<
3
52C6>
4D5<
8D4<
4B3<
4B3<
4C3<
4C3<
4C3>
4C3<
1
C1041
0.1UF
20%
10V
2
CERM
402
8D4<
8A3<>
52C6>
59D8>
INT_ANALYZER_CLK
9B4<
59C8>
6C5<
6D6<
9D8<
9B7<
7B5<
4B3>
7A3<
7A5<
59C6>
7A5<
59C8>
7A5<
59C8>
7A5<
59C8>
7D5<
59C8>
7C5<
4C3<
7C7<
46D4<
59B6>
1
C1014
0.1UF
20%
10V
2
CERM
402
7C5<
45D2<>
52C6>
7C3<
45D2<>
44D2<
1
2
1
2
1
2
1
2
7B3<
44D1<
C972
0.1UF
20%
10V
CERM
402
C994
0.1UF
20%
10V
CERM
402
C598
10UF
N20P80%
10V
Y5V
805
C987
0.1UF
20%
10V
CERM
402
8B7<
7A3<
6D6<
44B7<
4D7<
1
2
59C8>
6C5<
9D8<
1
C981
0.1UF
20%
10V
2
CERM
402
1
C1007
0.1UF
20%
10V
2
CERM
402
4D3<
1
C1054
10UF
N20P80%
10V
2
Y5V
805
C998
0.1UF
20%
10V
CERM
402
CPU_VCORE_SLEEP
INTREPID CLOCK OUTPUT
NOSTUFF
R314
0
1 2
5%
1/16W
MF
402
PLACE BOTH RESISTORS
CLOSE TO INTREPID
NOSTUFF
R313
22
2 1
5%
1/16W
MF
402
8D1<
7C7<
7C5<
7C3<
7B3<
7A3<
44B7<
8D5<>
7B3<
59C8>
44D1<
59C8>
44C2<
44D2<
44D2<
45D2<>
59C8>
46D4<
APPLE COMPUTER INC.
2
1
2
1
2
1
2
1
2
1
2
1
2
NOSTUFF
R308
1/16W
1
C991
0.1UF
20%
10V
2
CERM
402
C973
0.1UF
20%
10V
CERM
402
C1020
0.1UF
20%
10V
CERM
402
C976
10UF
N20P80%
10V
Y5V
805
C1042
10UF
N20P80%
10V
Y5V
805
C1912
10UF
N20P80%
10V
Y5V
805
C1056
10UF
N20P80%
10V
Y5V
805
1
47
5%
MF
402
2
8D8<>
1
2
1
C993
0.1UF
20%
10V
2
CERM
402
1
C1021
0.1UF
20%
10V
2
CERM
402
1
C1037
10UF
N20P80%
10V
2
Y5V
805
1
C1016
10UF
N20P80%
10V
2
Y5V
805
1
C1913
10UF
N20P80%
10V
2
Y5V
805
1
C1057
10UF
N20P80%
10V
2
Y5V
805
NOSTUFF
J27
U.FL-R_SMT
F-ST-SM
3
1
2
(518S0104)
56B3> 16C7<
C977
0.1UF
20%
10V
CERM
402
1
C990
0.1UF
20%
10V
2
CERM
402
1
C967
0.1UF
20%
10V
2
CERM
402
1
2
1
2
1
2
1
2
C1033
10UF
N20P80%
10V
Y5V
805
C364
10UF
N20P80%
10V
Y5V
805
C1914
10UF
N20P80%
10V
Y5V
805
1
2
+MAXBUS_SLEEP
4D5<
9B7<
1
C980
0.1UF
20%
10V
2
CERM
402
1
C961
0.1UF
20%
10V
2
CERM
402
1
C1040
10UF
N20P80%
10V
2
Y5V
805
1
C1032
10UF
N20P80%
10V
2
Y5V
805
1
C1911
10UF
N20P80%
10V
2
Y5V
805
1
C1055
10UF
N20P80%
10V
2
Y5V
805
56B3>
INT_CLOCK_OUT
SYSCLK_LA
C995
0.1UF
20%
10V
CERM
402
LA CONS & ESP
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:45 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
SCALE
NONE
SHT
OF
8 69
1
C1058
10UF
N20P80%
10V
Y5V
805
REV.
D
C
B
A
13
DRAWING
<XR_PAGE_TITLE>
52C6>
44D2<
D
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
C
45D2<>
7C3<
9D8<
B
A
8D4<
7A3<
7C7<
7B3<
8D4<
56D3>
56D3>
56D3>
56D3>
56D3>
46D4<
8D1<
6D6<
7C5<
44D1<
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
9B1<>
44D2<
9C1<>
9C1<>
9C1<>
9C1<>
9C1<>
7A3<
8D1<
45D2<>
8A3<>
6C5<
7C3<
44B7<
8C5<>
8C4<>
8C8<>
8C8<>
8C5<>
8C7<>
8D7<>
8C5<>
44D1<
8A3<>
59C8>
8D7<>
8D8<>
8D8<>
8D7<>
8D4<>
6D6<
4D5<
7B3<
9B7<
59C8>
8
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
52C6>
+MAXBUS_SLEEP
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<55>
44B7<
6C5<
4D5<
7C7<
7C5<
46D4<
CPU_DATA<32>
5C4<>
CPU_DATA<33>
5C4<>
CPU_DATA<34>
5C4<>
CPU_DATA<35>
5C4<>
CPU_DATA<36>
5C4<>
INTREPID BOOT STRAPS
NOSTUFF
1
R890
10K
1%
1/16W
MF
402
2
NOSTUFF
R864
10K
1%
1/16W
MF
402
1
R894
4.7K
5%
1/16W
MF
402
2
R359
4.7K
5%
1/16W
MF
402
1: EXTERNAL SOURCE
1: ACTIVE
+MAXBUS_SLEEP
0: INACTIVE
0: PLL5
BUF_REF_CLK_OUTENABLE_H
BITS 32 - 39
NOSTUFF
1
R833
10K
1%
1/16W
MF
402
2
1
R342
4.7K
5%
1/16W
MF
402
2
0: TDI INPUT (JTAG)
DDR_TPDMODEENABLE_H
1: TDI OUTPUT
78
NOSTUFF
1
R868
10K
1%
1/16W
MF
402
2
1
2
1
2
NOSTUFF
R876
1/16W
NOSTUFF
1
R355
4.7K
5%
1/16W
MF
402
2
R366
4.7K
1/16W
1: BOOTROM ON PCI1
0: BOOTROM ON IDE/CARDSLOT
EN_PCI_ROM_P
SELPLL4EXTSRC
1
2
INT_V1
1
R854
10K
1%
1/16W
MF
402
2
1
INT_V2
R353
4.7K
1/16W
2
1
5%
MF
402
2
1: ACTIVE
0: INACTIVE
1: ACTIVE LOW
ANALYZERCLK_EN_H
1
R892
10K
1%
1/16W
MF
402
2
1
10K
1%
MF
402
2
1
R893
4.7K
5%
1/16W
MF
402
2
1
5%
MF
402
2
TI 1394B WORKAROUND
0: NORMAL 1394B
1: TI PHY WORKAROUND
MAXBUS OUTPUT
IMPEDANCE
111: 28.6 OHM
011: 33.3 OHM
101: 40 OHM
001: 50 OHM
110: 66.6 OHM
010: 100 OHM
100: 200 OHM
000: 200 OHM
NOSTUFF
R852
10K
1%
1/16W
MF
402
NOSTUFF
1
R853
10K
1%
1/16W
MF
402
2
R345
4.7K
5%
1/16W
MF
402
1
R344
4.7K
5%
1/16W
MF
402
2
0: ACTIVE HIGH
0: ACTIVE HIGH
DDR_TPDEN_POL
1: ACTIVE LOW
BITS 48 - 63
1
R832
10K
1%
1/16W
MF
402
10K
1%
MF
402
5%
MF
402
NOSTUFF
R862
10K
1%
1/16W
MF
402
R861
4.7K
5%
1/16W
MF
402
2
1
2
NOSTUFF
1
R343
4.7K
5%
1/16W
MF
402
2
1
2
NOSTUFF
R865
1/16W
R358
4.7K
1/16W
1
2
1
2
EXTPLL_SDWN_POL
SPARE
NOSTUFF
R885
10K
1/16W
R886
4.7K
1/16W
4C3<
5D4<>
5D4<>
5D4<>
5D4<>
5D4<>
5D4<>
5D4<>
5D4<>
5D4<>
5D4<>
4C3<
4C2<
4C3<
4C3<
4C3<
4C3<
SHT
5D4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5C4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5B4<>
5A4<>
7C7<
9
12
7B7<
7B7<
8B7<>
8B4<>
8B4<>
7B7<
1
8C4<>
8C7<>
8C8<>
8C5<>
8C7<>
8C8<>
8C4<>
8C8<>
8C5<>
8C4<>
8C7<>
8C5<>
8C5<>
8C7<>
8C8<>
8C5<>
8C4<>
8C7<>
8C4<>
8C4<>
8C4<>
8C8<>
8C7<>
8C8<>
8D4<>
8D7<>
8C5<>
8C7<>
8D8<>
8C8<>
8C5<>
8D7<>
8D7<>
8D8<>
8D8<>
8D7<>
8D4<>
8D5<>
8D5<>
8D5<>
6C4<
6C4<
6C4<
6C4<
6C4<
6C4<
6C4<
6C4<
8C5<>
8C4<>
8C8<>
8C8<>
8C5<>
8C7<>
8D7<>
8C5<>
8D8<>
8D5<>
8D4<>
8D8<>
8D8<>
8D4<>
8D4<>
8D5<>
8B8<>
8C4<>
8B5<>
8B5<>
56C3>
56C3>
56C3>
OF
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
9B7<
9B7<
9B7<
9B7<
9A7<
56D3>
56D3>
56D3>
8D7<>
8C4<>
8C5<>
8C4<
8C8<>
8C7<>
8C4<>
8C7<
9D8<
9D8<
9D8<
9D8<
9C8<
9C8<
9C8<
9C8<
56D3>
9D5<
9D5<
9D5<
9D5<
9C5<
9C5<
9C5<
56C3>
56C3>
56C3>
69
56C3>
REV.
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
13
D
C
B
A
DRAWING
6
NOSTUFF
1
R863
10K
1%
1/16W
MF
402
2
1
1%
MF
402
2
1
R360
4.7K
5%
1/16W
MF
402
2
1
5%
MF
402
2
SPARE
SPARE
1
R855
10K
1%
1/16W
MF
402
2
1
R352
4.7K
5%
1/16W
MF
402
NOSTUFF
R354
4.7K
1/16W
2
1
5%
MF
402
2
0: 0 IDE / 1 PCI1
ROM_Ovrly_Rng
1: 0-1 IDE / 2-3 PCI1
R351
4.7K
1/16W
0: REQ/GNT
1: GPIOs
PCI1_REQ2_L / PCI1_GNT2_L
NOSTUFF
1
R339
10K
1%
1/16W
MF
402
2
1
R338
4.7K
5%
1/16W
MF
402
2
1
5%
MF
402
2
1: GPIOS
0: REQ/GNT
0: REQ/GNT
1: GPIOs
PCI1_REQ1_L / PCI1_GNT1_L
59A8>
67
5
NOSTUFF
1
R340
10K
1%
1/16W
MF
402
NOSTUFF
R869
1/16W
R870
4.7K
1/16W
PCI1_REQ0_L / PCI1_GNT0_L
56B3>
2
1
10K
1%
MF
402
2
1
5%
MF
402
2
0: LEGACY INTERFACE
1: B-MODE INTERFACE
FIREWIRE PHY INTERFACE
54A7<
(0.35 NS)
56C3>
56C3>
56C3>
CPU_DATA<57>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<60>
CPU_DATA<61>
CPU_DATA<62>
CPU_DATA<63>
1
R341
4.7K
5%
1/16W
MF
402
2
PROCESSOR BUS MODE
0: MAX BUS (G4)
1: 60X BUS (G3)
16C7<
CPU_FBI_PLUS1
CPU_FB_PLUS2
INT_ANALYZER_CLK
8A2<
56C3>
NOSTUFF
R321
0
1 2
5%
1/16W
MF
402
NOSTUFF
R319
0
1 2
5%
1/16W
MF
402
CPU_FBO_PLUS1
4D2<
(0.17 NS)
56C3>
5
52D3>
30D5<
SYSCLK_CPU
ADDS 1"ADDS 2"
1 2
CPU_FB_MINUS3
1
R776
0
5%
1/16W
MF
402
2
1 2
5B4<>
56D3>
5B4<>
56D3>
5B4<>
56D3>
5B4<>
56D3>
5B4<>
56D3>
5B4<>
56D3>
5A4<>
56D3>
56B3>
R777
0
5%
1/16W
MF
402
R765
0
5%
1/16W
MF
402
28D6<>
8D5<>
8D4<>
8D8<>
8D8<>
8D4<>
8D4<>
8D5<>
4
R720
4.7
+1_5V_INTREPID_PLL
16D6<
C854
0.1UF
20%
10V
CERM
402
9A2<>
INT_PLL6_GND
56D3>
8B4<>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
9B1<>
56D3>
9B1<>
56D3>
56D3>
9B1<>
56D3>
9B1<>
56D3>
9B1<>
56D3>
9B1<>
9B1<>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
56C3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56D3>
56C3>
56C3>
56C3>
8B8<>
56C3>
56C3>
R764
1 2
CPU_FB_PLUS3
ADDS 3"
NOSTUFF
(0.5 NS)
1
R772
0
5%
1/16W
MF
R310
402
2
1 2
1/16W
402
NOSTUFF
1
R757
0
5%
1/16W
MF
402
2
ALLOWS ADJUSTING FB CLOCK FROM -3" (0.5 NS)
TO +2" (0.35 NS) IN 1" (0.17 NS) INCREMENTS
PLACE ALL SERPENTINES ON INTERNAL LAYER
7C7<
8B4<>
7B7<
8B7<>
7C7<
8B4<>
4C7<>
8B5<>
4C7<>
8B4<>
4C7<>
8B8<>
4C7<>
8B5<>
4C7<>
8B7<>
4C7<>
8C4<>
4C7<>
8B7<>
4C7<>
8C5<>
4C7<>
8B8<>
4C7<>
8B8<>
4C7<>
8C4<>
4C7<>
8B7<>
4C7<>
8B8<>
4C7<>
8B7<>
4C7<>
8B7<>
4C7<>
8B8<>
4C7<>
8B8<>
4C7<>
8C8<>
4C7<>
8B7<>
4C7<>
8B8<>
4C7<>
8C7<>
4C7<>
8C7<>
4C7<>
8C8<>
4C7<>
8B7<>
4B7<>
8B8<>
4B7<>
8C8<>
4B7<>
8C8<>
4B7<>
8C7<>
4B7<>
8C8<>
4B7<>
8C7<>
4B7<>
8C7<>
4B7<>
8C5<>
7A7<
4B8<
7B7<
8B4<>
7B7<
8B5<>
8B5<>
8B7<
8B4<>
7A7<
8B5<>
7A7<
8B4<>
7A7<
8B5<>
7A7<
8B4<>
7A7<
8B5<>
7A7<
8B5<>
7B7<
7C7<
4A7<>
8B8<>
7C7<
8B7<>
7D5<
56C3>
8B4<>
INT_SUSPEND_REQ_L
44B8<>
INT_SUSPEND_ACK_L
44B5<>
INT_V1
10
5%
1/16W
MF
402
1 2
NOSTUFF
1
R766
0
2
0
5%
MF
MAIN LOOP IS 3" (0.5 NS)
SHORTER THAN MAXBUS CLOCK
CPU_BR_L
4D7>
CPU_BG_L
4D7<
CPU_TS_L
4D7<>
CPU_ADDR<0>
CPU_ADDR<1>
CPU_ADDR<2>
CPU_ADDR<3>
CPU_ADDR<4>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<7>
CPU_ADDR<8>
CPU_ADDR<9>
CPU_ADDR<10>
CPU_ADDR<11>
CPU_ADDR<12>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<15>
CPU_ADDR<16>
CPU_ADDR<17>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<20>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<25>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<28>
CPU_ADDR<29>
CPU_ADDR<30>
CPU_ADDR<31>
CPU_CI_L
4A7>
CPU_INT_GBL_L
CPU_TBST_L
4B7>
CPU_TSIZ<0>
4B7>
CPU_TSIZ<1>
4B7>
CPU_TSIZ<2>
4B7>
CPU_TT<0>
4B7<>
CPU_TT<1>
4B7<>
CPU_TT<2>
4B7<>
CPU_TT<3>
4B7<>
CPU_TT<4>
4B7<>
CPU_WT_L
4B7>
CPU_AACK_L
4A7<
CPU_ARTRY_L
CPU_HIT_L
4A7>
CPU_QREQ_L
4C3>
CPU_QACK_L
4C3<
56C3>
56C3>
INT_ANALYZER_CLKA
44C4<>
INTREPID_ACS_REF
R713
0
56C3>
5%
1/16W
MF
402
7C5<
5%
1/16W
MF
402
1
R752
470
5%
1/16W
MF
402
2
INT_CPU_FB_OUT
1 2
1
1/16W
2
INT_CPU_FB_IN
CPU_CLK_EN
SYSCLK_CPU_UF
CPU_TBEN
4C3<
4
3
5%
C1101
MF
0.1UF
402
+1_5V_INTREPID_PLL7
1
20%
10V
2
CERM
402
E29
BR
E26
BG
B27
TS
D24
A_0
D25
A_1
A27
A_2
E24
A_3
G23
A_4
B26
A_5
A26
A_6
D23
A_7
A25
A_8
E23
A_9
J22
A_10
B25
A_11
H22
A_12
G22
A_13
D22
A_14
B24
A_15
B23
A_16
E22
A_17
J21
A_18
G21
A_19
E21
A_20
A24
A_21
D21
A_22
A23
A_23
H20
A_24
B22
A_25
H21
A_26
A22
A_27
E20
A_28
B21
A_29
D20
A_30
A21
A_31
G26
CI
A29
GBL
A28
TBST
G24
TSIZ_0
H24
TSIZ_1
D26
TSIZ_2
E25
TT_0
G25
TT_1
B28
TT_2
D27
TT_3
J25
TT_4
D28
WT
B29
AACK
H23
ARTRY
B31
HIT
A32
QREQ
G27
QACK
AK9
SUSPENDREQ
AM8
SUSPENDACK
J24
CPU_FB_IN
H16 A30
CPU_FB_OUT
G8
ANALYZER_CLK
AH9
STOPCPUCLK
H13
ACS_REF
J15
CPU_CLK
A31
TBEN
1
R712
1K
9D3<
INT_PLL6_GND
2
1%
1/16W
MF
402
3
52D3>
H26
VDD15A_7
(PLL6)
U25
INTREPID
BGA
SEE_TABLE
(ON PAGE 12)
(1 OF 9)
MAXBUS
INTERFACE
VSSA_7
(PLL6)
H25
NO_TEST
XW47
SM
INTREPID V1.1 IS 133MHZ ONLY
2
1
APPLE COMPUTER INC.
2
D10
D_0
G12
D_1
E11
D_2
H11
D_3
B9
D_4
B8
D_5
A9
D_6
A8
D_7
E12
D_8
D11
D_9
B10
D_10
J13
D_11
A10
D_12
D12
D_13
E13
D_14
G13
D_15
B11
D_16
D13
D_17
A11
D_18
G14
D_19
H14
D_20
E14
D_21
B12
D_22
G15
D_23
B13
D_24
H15
D_25
D14
D_26
B14
D_27
A12
D_28
G16
D_29
E15
D_30
J16
D_31
D15
D_32
A14
D_33
A13
D_34
D16
D_35
E16
D_36
G17
D_37
B15
D_38
H17
D_39
A15
D_40
B16
D_41
E17
D_42
A16
D_43
J18
D_44
H18
D_45
D17
D_46
G18
D_47
A17
D_48
B17
D_49
E18
D_50
B18
D_51
D18
D_52
A18
D_53
A19
D_54
H19
D_55
B19
D_56
J19
D_57
A20
D_58
D19
D_59
E19
D_60
G19
D_61
B20
D_62
G20
D_63
DBG
G28
DRDY
K25
DTI_0
D29
DTI_1
B30
DTI_2
E27
TA
E28
TEA
VIN = INTREPID VCORE (1.7V)
VOUT = MAXBUS RAIL (1.8V)
CPU_DATA<0>
CPU_DATA<1>
CPU_DATA<2>
CPU_DATA<3>
CPU_DATA<4>
CPU_DATA<5>
CPU_DATA<6>
CPU_DATA<7>
CPU_DATA<8>
CPU_DATA<9>
CPU_DATA<10>
CPU_DATA<11>
CPU_DATA<12>
CPU_DATA<13>
CPU_DATA<14>
CPU_DATA<15>
CPU_DATA<16>
CPU_DATA<17>
CPU_DATA<18>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<32>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<46>
CPU_DATA<47>
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<60>
CPU_DATA<61>
CPU_DATA<62>
CPU_DATA<63>
CPU_DBG_L
CPU_DRDY_L
CPU_DTI<0>
CPU_DTI<1>
CPU_DTI<2>
CPU_TA_L
CPU_TEA_L
INTREPID MAX
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:46 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
SCALE
NONE
<XR_PAGE_TITLE>
D
C
B
A
INTREPID 1.1 SHOULD ALLOW MAXBUS
RAIL TO TURN OFF IN SLEEP
C12
C15
C18
C21
C24
C27
C30
C9
F12
F15
F18
F21
F24
F27
VDD1.8/CPUVIO
M15
M16
M19
M22
M23
N18
N21
N23
P16
P19
INTREPID
POWER/GROUND
L24
M14
M17
M18
M20
M21
M24
M28
M3
M31
M32
M34
M6
M9
N15
N25
P12
P17
P22
P29
P4
R14
VSS
R16
R18
R19
R21
R23
R24
R26
R29
R3
R31
R34
R6
T11
T14
T23
T24
T27
U10
U16
J6
F6G7J3
F34
J31
J34
8
U25
BGA
(8 OF 9)
SEE_TABLE
F3
F31
SHT
12
1
EMI-SPRING
INT_V1
1
SP4
CLIP-SM
SEE_TABLE
OF
6910
D
C
B
A
REV.
13
DRAWING
3
SP3
1
CLIP-SM
EMI-SPRING
SEE_TABLE
?
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
4
INTREPID EMI CLIP
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
IC,ASIC,INTREPID,V1.X
1
IC,ASIC,INTREPID,V2.1
1
SP1
1
CLIP-SM
EMI-SPRING
SEE_TABLE
1
CLIP-SM
EMI-SPRING
SEE_TABLE
CLIPS TO ATTACH INTREPID
HEATSINK TO GND AT THE
FOUR CORNERS
INTREPID EMI CLIP SUPPORT
SP1,SP2,SP3,SP4
INTREPID VERSION SUPPORT
U25
U25 INT_V2CRITICAL
SP2
INTREPID POWER
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:48 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
3
2
051-6497
SCALE
NONE
52C3>
59C8>
78
46B4<>
17D5< 17A4< 17A3<
47B2<>
46B3<
16D7<
+INTREPID_CORE_MAIN
11D3<
16C2<
16A8<
11A6<
59C8>
6
+1_5V_AGP
5
+3V_MAIN
4
+2_5V_MAIN+1_8V_MAIN
AE3
AE6
AH3
AB3
AB6
AC11
AC12
AC15A3AC16
AC13
AC18
F30
AC20
F7F9G3
AC22
G6
VDD3.3
AC26
AD12
AD23
AC14
AD25
AD21
AE15
AE17
AD20
AE20
AE23
AF22
AH19
AA25
AA29
AB25
AB27
AB31
AB34
AC25
AC27
AC28
AE31
AE34
AF28
AH30
AH34
AK34
AP35
C35
G31
G34
K31
K34
N28
VDD2.5
N31
N34
N36
P25
P28
R25
R27
T25
T28
T29
T31
T34
U25
U28
V25
V29
W25
W31
W34
Y27
Y29
E33
AN33
AN4
AP1
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP34
AP36
AP6
AP9
VSS
AR2
AR35
AT3
AT34
B2
B35
C1
C10
C13
C16
C19
C22
C25
C28
C3
C31
C34
C7
D4
C36
D33
F10
F13
F16
F19
F22
F25
F28
AA21
AA24
AB13
AB15
AB17
AB19
AC17
AC19
AC23
AD13
AD15
AD22
AD28
AD31
AD34
AE14
AE16
AE18
AE19
AE21
AE22
AE28
AG21
AG23
AG24
AG30
AG34
AH20
AH21
AH23
AH27
AL12
AL15
AL18
AL21
AL27
AL31
AL34
P15
P18
P20
P21
R17
R20
T13
U17
U18
U24
V16
V19
V20
V22
W16
W24
Y13
Y18
AD3
AD6
AG3
AG6
AK3
AK7
AL6
AL9
VDD1.5
VSS
AH22
67
AH28
AJ21
AJ23
AL19
AGP_IO_VDD
AL22
A34
AL28
AA20
AL30
AA27
AN32
AA3
AP19
AA31
AP22
AA34
AP25
AA6
AP28
AB11
5
AP31
AR33
AR34
U25
INTREPID
BGA
(9 OF 9)
SEE_TABLE
POWER
GROUND
AGP_IO_VSS
AB12
AB14
AB16
AB18
AB24
AA11
AB28
AA12
AB29
AH6
AK6
AF25
AL10
AL13
AL16
AL3
AL7
AM4
VDD3.3
VSS
AN5
AP10
AP13
AP16
K3
K6
N24
N3
N6
P13
P14
R22
T12
T18
T3
T6
U12
W12
W13
W3
W6
AP2
AP7
AR3
B3
C2
C6
D32
D5
B34
E4
U19
U22
U27
U29
V10
V12
V17
V18
V21
V24
V3
V31
V34
V6
W11
W14
W23
W26
Y11
Y12
Y14
Y16
Y19
Y23
Y24
Y25
870-1125
343S0198
343S0211
4
<XR_PAGE_TITLE>
+1_8V_MAIN
78
INTREPID MAXBUS DECOUPLING
6
24 Balls
4 X 10UF (0805)
36 X 0.1UF (0402)
5
4
INTREPID CORE DECOUPLING
59C8>
47B2<>
46B3<
+INTREPID_CORE_MAIN
10D6<
3
30 Balls
4 X 10UF (0805)
29 X 0.1UF (0402)
12
C291
10UF
N20P80%
C290
10UF
N20P80%
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
C289
10UF
N20P80%
10V
2
Y5V
805
D
C288
10UF
N20P80%
1
10V
2
Y5V
805
1
2
1
2
1
2
1
2
C890
0.1UF
20%
10V
CERM
402
C901
0.1UF
20%
10V
CERM
402
C846
0.1UF
20%
10V
CERM
402
C902
0.1UF
20%
10V
CERM
402
+2_5V_MAIN
INTREPID DDR DECOUPLING
C
C277
10UF
N20P80%
C240
10UF
N20P80%
1
10V
2
Y5V
805
1
10V
2
Y5V
805
C271
10UF
N20P80%
C641
10UF
N20P80%
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
2
1
2
C700
0.1UF
20%
10V
CERM
402
C837
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
C878
0.1UF
2
1
C877
0.1UF
2
C832
0.1UF
20%
10V
CERM
402
C885
0.1UF
20%
10V
CERM
402
C843
0.1UF
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
C900
0.1UF
20%
10V
CERM
402
C823
0.1UF
20%
10V
CERM
402
C887
0.1UF
20%
10V
CERM
402
C725
0.1UF
20%
10V
CERM
402
C688
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C888
0.1UF
20%
10V
CERM
402
C845
0.1UF
20%
10V
CERM
402
C870
0.1UF
20%
10V
CERM
402
C278
0.1UF
20%
10V
CERM
402
C836
0.1UF
20%
10V
CERM
402
C767
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C891
0.1UF
20%
10V
CERM
402
C871
0.1UF
20%
10V
CERM
402
C897
0.1UF
20%
10V
CERM
402
C849
0.1UF
20%
10V
CERM
402
C817
0.1UF
20%
10V
CERM
402
C793
0.1UF
20%
10V
CERM
402
1
C844
0.1UF
20%
10V
2
CERM
402
1
C834
0.1UF
20%
10V
2
CERM
402
1
C889
0.1UF
20%
10V
2
CERM
402
1
C281
0.1UF
20%
10V
2
CERM
402
44 Balls
4 X 10UF (0805)
51 X 0.1UF (0402)
1
C839
0.1UF
20%
10V
2
CERM
402
1
C815
0.1UF
20%
10V
2
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C824
0.1UF
20%
10V
CERM
402
C884
0.1UF
20%
10V
CERM
402
C842
0.1UF
20%
10V
CERM
402
C280
0.1UF
20%
10V
CERM
402
C857
0.1UF
20%
10V
CERM
402
C904
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C872
0.1UF
20%
10V
CERM
402
C896
0.1UF
20%
10V
CERM
402
C895
0.1UF
20%
10V
CERM
402
C279
0.1UF
20%
10V
CERM
402
C794
0.1UF
20%
10V
CERM
402
C827
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
C874
0.1UF
20%
10V
CERM
402
C898
0.1UF
20%
10V
CERM
402
C869
0.1UF
20%
10V
CERM
402
C855
0.1UF
20%
10V
CERM
402
C876
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
C899
0.1UF
20%
10V
CERM
402
C886
0.1UF
20%
10V
CERM
402
C873
0.1UF
20%
10V
CERM
402
C880
0.1UF
20%
10V
CERM
402
C698
0.1UF
20%
10V
CERM
402
C702
10UF
N20P80%
C292
10UF
N20P80%
+3V_MAIN
C655
10UF
N20P80%
C892
10UF
N20P80%
C727
10UF
N20P80%
C841
10UF
N20P80%
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
2
1
2
1
2
C787
0.1UF
20%
10V
CERM
402
C764
0.1UF
20%
10V
CERM
402
C746
0.1UF
20%
10V
CERM
402
INTREPID 3.3V DECOUPLING
C264
10UF
N20P80%
C637
10UF
N20P80%
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
10V
2
Y5V
805
1
2
1
2
1
2
C745
0.1UF
20%
10V
CERM
402
C796
0.1UF
20%
10V
CERM
402
C720
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C789
0.1UF
20%
10V
CERM
402
C831
0.1UF
20%
10V
CERM
402
C730
0.1UF
20%
10V
CERM
402
C830
0.1UF
20%
10V
CERM
402
C867
0.1UF
20%
10V
CERM
402
C728
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C749
0.1UF
20%
10V
CERM
402
C833
0.1UF
20%
10V
CERM
402
C721
0.1UF
20%
10V
CERM
402
C775
0.1UF
20%
10V
CERM
402
C866
0.1UF
20%
10V
CERM
402
C809
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C797
C765
C788
C717
C680
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
1
C719
0.1UF
20%
10V
CERM
402
C808
0.1UF
20%
10V
CERM
402
C734
0.1UF
20%
10V
CERM
402
C829
0.1UF
20%
10V
CERM
402
C863
0.1UF
20%
10V
CERM
402
C894
0.1UF
20%
10V
CERM
402
C800
0.1UF
20%
10V
2
CERM
402
1
C763
0.1UF
20%
10V
2
CERM
402
1
C748
0.1UF
20%
10V
2
CERM
402
57 Balls
4 X 10UF (0805)
66 X 0.1UF (0402)
1
C806
0.1UF
20%
10V
2
CERM
402
1
C868
0.1UF
20%
10V
2
CERM
402
1
C643
0.1UF
20%
10V
2
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C810
0.1UF
20%
10V
CERM
402
C780
0.1UF
20%
10V
CERM
402
C811
0.1UF
20%
10V
CERM
402
C691
0.1UF
20%
10V
CERM
402
C812
0.1UF
20%
10V
CERM
402
C656
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
C766
0.1UF
20%
10V
CERM
402
C798
0.1UF
20%
10V
CERM
402
C747
0.1UF
20%
10V
CERM
402
C821
0.1UF
20%
10V
CERM
402
C689
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C731
C779
C799
C762
C822
C774
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
1
2
C732
0.1UF
20%
10V
CERM
402
C790
0.1UF
20%
10V
CERM
402
C777
0.1UF
20%
10V
CERM
402
C893
0.1UF
20%
10V
CERM
402
C828
0.1UF
20%
10V
CERM
402
D
C
1
C850
C697
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
C792
0.1UF
20%
10V
CERM
402
C755
0.1UF
20%
10V
CERM
402
C814
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C687
0.1UF
20%
10V
CERM
402
C791
0.1UF
20%
10V
CERM
402
C816
0.1UF
20%
10V
CERM
402
1
2
C231
10UF
N20P80%
1
C750
0.1UF
20%
10V
2
CERM
402
1
C723
0.1UF
20%
10V
2
CERM
402
1
C752
0.1UF
20%
10V
2
CERM
402
INTREPID AGP I/O DECOUPLING
1
10V
2
Y5V
805
16C2<
1
C735
0.1UF
2
1
C825
0.1UF
2
1
C751
0.1UF
2
16A8<
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
1
C856
0.1UF
20%
10V
2
CERM
402
1
C801
0.1UF
20%
10V
2
CERM
402
B
52C3>
46B4<>
17D5< 17A4< 17A3<
1
2
1
2
C699
0.1UF
20%
10V
CERM
402
C782
0.1UF
20%
10V
CERM
402
16D7<
10D6<
59C8>
1
C722
0.1UF
20%
10V
2
CERM
402
1
C838
0.1UF
20%
10V
2
CERM
402
1
C826
0.1UF
20%
10V
2
CERM
402
+1_5V_AGP
C232
10UF
N20P80%
1
C753
0.1UF
20%
10V
2
CERM
402
1
C803
0.1UF
20%
10V
2
CERM
402
1
C768
0.1UF
20%
10V
2
CERM
402
1
10V
2
Y5V
805
C693
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
C668
0.1UF
20%
10V
CERM
402
C818
0.1UF
20%
10V
CERM
402
C754
0.1UF
20%
10V
CERM
402
1
C684
0.1UF
20%
10V
2
CERM
402
1
2
1
2
1
2
C714
0.1UF
20%
10V
CERM
402
C802
0.1UF
20%
10V
CERM
402
C724
0.1UF
20%
10V
CERM
402
1
C686
0.1UF
20%
10V
2
CERM
402
1
2
1
2
1
2
C736
0.1UF
20%
10V
CERM
402
C813
0.1UF
20%
10V
CERM
402
C781
0.1UF
20%
10V
CERM
402
1
C709
0.1UF
20%
10V
2
CERM
402
21 Balls
4 X 10UF (0805)
24 X 0.1UF (0402)
1
2
C649
0.1UF
20%
10V
CERM
402
1
2
C667
0.1UF
20%
10V
CERM
402
1
2
C694
0.1UF
20%
10V
CERM
402
1
C695
0.1UF
20%
10V
2
CERM
402
2
1
2
1
2
1
2
0.1UF
20%
10V
CERM
402
C835
0.1UF
20%
10V
CERM
402
C708
0.1UF
20%
10V
CERM
402
C657
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C664
0.1UF
20%
10V
CERM
402
C743
0.1UF
20%
10V
CERM
402
C729
0.1UF
20%
10V
CERM
402
C681
0.1UF
20%
10V
CERM
402
C851
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C761
0.1UF
20%
10V
CERM
402
C881
0.1UF
20%
10V
CERM
402
C678
0.1UF
20%
10V
CERM
402
C875
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C707
C676
C682
C659
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C883
0.1UF
20%
10V
CERM
402
C716
0.1UF
20%
10V
CERM
402
C879
0.1UF
20%
10V
CERM
402
C690
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C807
0.1UF
20%
10V
CERM
402
C805
0.1UF
20%
10V
CERM
402
C903
0.1UF
20%
10V
CERM
402
C658
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C776
0.1UF
20%
10V
CERM
402
C644
0.1UF
20%
10V
CERM
402
C673
0.1UF
20%
10V
CERM
402
C852
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
1
2
C744
0.1UF
20%
10V
CERM
402
C645
0.1UF
20%
10V
CERM
402
C679
0.1UF
20%
10V
CERM
402
C646
0.1UF
20%
10V
CERM
402
C718
0.1UF
20%
10V
CERM
402 402
1
C865
0.1UF
20%
10V
2
CERM
402
1
C677
0.1UF
20%
10V
2
CERM
402
1
2
1
2
1
2
C712
0.1UF
20%
10V
CERM
C882
0.1UF
20%
10V
CERM
402
C660
0.1UF
20%
10V
CERM
402
B
INTREPID BYPASS
1
2
1
2
C685
0.1UF
20%
10V
CERM
402
C711
0.1UF
20%
10V
CERM
402
5
1
C710
0.1UF
2
1
C674
0.1UF
2
20%
10V
CERM
402
20%
10V
CERM
402
A
C638
10UF
N20P80%
1
10V
2
Y5V
805
C628
10UF
N20P80%
1
10V
2
Y5V
805
8
1
C733
0.1UF
20%
10V
2
CERM
402
1
C662
0.1UF
20%
10V
2
CERM
402
67
1
2
1
2
C650
C661
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
1
2
1
2
C647
0.1UF
20%
10V
CERM
402
C648
0.1UF
20%
10V
CERM
402
1
2
1
2
C683
0.1UF
20%
10V
CERM
402
C663
0.1UF
20%
10V
CERM
402
1
2
C665
0.1UF
20%
10V
CERM
402
1
2
C696
0.1UF
20%
10V
CERM
402
1
C666
0.1UF
20%
10V
2
CERM
402
4
1
2
C651
0.1UF
20%
10V
CERM
402
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:51 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
APPLE COMPUTER INC.
3
2
051-6497
SCALE
NONE
SHT
11
1
REV.
OF
69
A
13
DRAWING
<XR_PAGE_TITLE>
78
6
5
DDR MUX CONNECTIONS
0-ohm resistors to allow
rewiring if necessary
4
SERIES RESISTORS FOR CONTROL SIGNALS
3
12
MUX_SEL_H
H35
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13C8<>
13B6<>
13B6<>
13B6<>
13B6<>
13B6<>
13B6<>
13B6<>
13B6<>
13A6<>
13A6<>
13A6<>
13A6<>
13A6<>
13A6<>
13A6<>
13A6<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
13B3<>
MEM_DATA<0>
MEM_DATA<1>
MEM_DATA<2>
MEM_DATA<3>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<6>
MEM_DATA<7>
MEM_DATA<8>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<12>
MEM_DATA<13>
MEM_DATA<14>
MEM_DATA<15>
MEM_DATA<16>
MEM_DATA<17>
MEM_DATA<18>
MEM_DATA<19>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<22>
MEM_DATA<23>
MEM_DATA<24>
MEM_DATA<25>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<28>
MEM_DATA<29>
MEM_DATA<30>
MEM_DATA<31>
MEM_DATA<32>
MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<35>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<38>
MEM_DATA<39>
MEM_DATA<40>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>
MEM_DATA<44>
MEM_DATA<45>
MEM_DATA<46>
MEM_DATA<47>
MEM_DATA<48>
MEM_DATA<49>
MEM_DATA<50>
MEM_DATA<51>
MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<54>
MEM_DATA<55>
MEM_DATA<56>
MEM_DATA<57>
MEM_DATA<58>
MEM_DATA<59>
MEM_DATA<60>
MEM_DATA<61>
MEM_DATA<62>
MEM_DATA<63>
INT_MEM_VREF
14A1<
53D6<
53D6<
53D6<
53D6<
D
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
C
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
B
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
AK32
AK33
AK31
AK35
AK36
AJ32
AJ35
AJ36
AG33
AG35
AH35
AG36
AH36
AH32
AG32
AG31
AE32
AF35
AF36
AE36
AE35
AE33
AD36
AD35
AA36
AA35
AA33
AB36
AB35
AC36
AA32
AB33
V36
U33
U32
V35
T30
U36
U35
T36
P33
R30
P35
P36
R36
R35
R33
R32
N35
M36
L35
M35
M33
L36
N33
M30
J32
J33
J35
K32
K33
J36
K36
K35
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDR_DATA_16
DDR_DATA_17
DDR_DATA_18
DDR_DATA_19
DDR_DATA_20
DDR_DATA_21
DDR_DATA_22
DDR_DATA_23
DDR_DATA_24
DDR_DATA_25
DDR_DATA_26
DDR_DATA_27
DDR_DATA_28
DDR_DATA_29
DDR_DATA_30
DDR_DATA_31
DDR_DATA_32
DDR_DATA_33
DDR_DATA_34
DDR_DATA_35
DDR_DATA_36
DDR_DATA_37
DDR_DATA_38
DDR_DATA_39
DDR_DATA_40
DDR_DATA_41
DDR_DATA_42
DDR_DATA_43
DDR_DATA_44
DDR_DATA_45
DDR_DATA_46
DDR_DATA_47
DDR_DATA_48
DDR_DATA_49
DDR_DATA_50
DDR_DATA_51
DDR_DATA_52
DDR_DATA_53
DDR_DATA_54
DDR_DATA_55
DDR_DATA_56
DDR_DATA_57
DDR_DATA_58
DDR_DATA_59
DDR_DATA_60
DDR_DATA_61
DDR_DATA_62
DDR_DATA_63
U25
INTREPID
BGA
(2 OF 9)
SEE_TABLE
(ON PAGE 12)
DDR
MEMORY
INTERFACE
MIN_LINE_WIDTH=25
+2_5V_MAIN
1
R82
100
A
1%
1/16W
MF
402
2
1
R93
2
MIN_LINE_WIDTH=20
LOCATE THESE RESISTORS NEAR INTREPID
100
1%
1/16W
MF
402
DDR_VREF
14D2<>
DDR_A_0
DDR_A_1
DDR_A_2
DDR_A_3
DDR_A_4
DDR_A_5
DDR_A_6
DDR_A_7
DDR_A_8
DDR_A_9
DDR_A_10
DDR_A_11
DDR_A_12
DDR_BA_0
DDR_BA_1
DDRCS_0
DDRCS_1
DDRCS_2
DDRCS_3
DDR_DQS_0
DDR_DQS_1
DDR_DQS_2
DDR_DQS_3
DDR_DQS_4
DDR_DQS_5
DDR_DQS_6
DDR_DQS_7
DDR_DM_0
DDR_DM_1
DDR_DM_2
DDR_DM_3
DDR_DM_4
DDR_DM_5
DDR_DM_6
DDR_DM_7
DDRRAS
DDRCAS
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
DDR_SELHI_0
DDR_SELHI_1
DDR_SELLO_0
DDR_SELLO_1
DDR_MCLK_0_P
DDR_MCLK_0_N
DDR_MCLK_1_P
DDR_MCLK_1_N
DDR_MCLK_2_P
DDR_MCLK_2_N
DDR_MCLK_3_P
DDR_MCLK_3_N
DDR_MCLK_4_P
DDR_MCLK_4_N
DDR_MCLK_5_P
DDR_MCLK_5_N
DDR_REF
DDR_VREF_0
DDR_VREF_1
15D8<
14D8<>
DDRWE
1
C14
0.1UF
20%
10V
2
CERM
402
LOCATE 2 DECOUPLING CAPS
DIRECTLY AT DDR_VREF_X BALLS
(U25-Y22 & T22)
52A6>
MEM_ADDR<0>
G35
MEM_ADDR<1>
G36
MEM_ADDR<2>
F36
MEM_ADDR<3>
F35
MEM_ADDR<4>
E35
MEM_ADDR<5>
E36
MEM_ADDR<6>
G32
MEM_ADDR<7>
D36
MEM_ADDR<8>
H36
MEM_ADDR<9>
G33
MEM_ADDR<10>
H33
MEM_ADDR<11>
D35
MEM_ADDR<12>
L30
MEM_BA<0>
M29
MEM_BA<1>
AN34
MEM_CS_L<0>
AN36
MEM_CS_L<1>
AL35
MEM_CS_L<2>
AL33
MEM_CS_L<3>
AJ31
MEM_DQS<0>
AH31
MEM_DQS<1>
AD32
MEM_DQS<2>
AB30
MEM_DQS<3>
V30
MEM_DQS<4>
P32
MEM_DQS<5>
N29
MEM_DQS<6>
L32
MEM_DQS<7>
AJ33
MEM_DQM<0>
AH33
MEM_DQM<1>
AD33
MEM_DQM<2>
AC35
MEM_DQM<3>
T35
MEM_DQM<4>
T33
MEM_DQM<5>
N32
MEM_DQM<6>
L33
MEM_DQM<7>
L29
MEM_RAS_L
H32
MEM_CAS_L
K30
MEM_WE_L
AN35
MEM_CKE<0>
AM35
MEM_CKE<1>
AM36
MEM_CKE<2>
AL36
MEM_CKE<3>
AB32
NC_MEM_MUXSEL_H<0>
AE29
N30
NC_MEM_MUXSEL_L<0>
T32
Y32
Y33
Y35
Y36
Y30
W30
W32
W33
V33
V32
W35
W36
AA22
Y22
T22
53C6<
53C6<
NO_TEST
1
R625
1K
2
1%
1/16W
MF
402
8
12C3<
53D6<
12C3<
53D6<
12C3<
53D6<
12D3<
53D6<
12D3<
53D6<
12C2<
53D6<
12D2<
53D6<
12D3<
53D6<
12D2<
53D6<
12C3<
53D6<
12C3<
53D6<
12B3<
53D6<
12D2<
12C2<
12C2<
12B2<
12B2<
13C8<>
13C8<>
13A6<>
13A6<>
13C4<>
13C4<>
13B3<>
13B3<>
13C8<>
13C8<>
13A6<>
13A6<>
13C4<>
13C4<>
13B3<>
13B3<>
53C6<
12C2<
12B2<
12C2<
12B2<
53D6<
53D6<
53C6<
53C6<
53C6<
53C6<
53C6<
53C6<
53D6<
53C6<
53C6<
53C6<
53C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
12B3<
12B3<
12A3<
12A3<
12B3<
MEM_MUXSEL_H<1>
MEM_MUXSEL_L<1>
SYSCLK_DDRCLK_A0_UF
53C6<
SYSCLK_DDRCLK_A0_L_UF
53C6<
SYSCLK_DDRCLK_A1_UF
53C6<
SYSCLK_DDRCLK_A1_L_UF
53C6<
53C6<
SYSCLK_DDRCLK_A2_UF
SYSCLK_DDRCLK_A2_L_UF
53B6<
SYSCLK_DDRCLK_B0_UF
53B6<
SYSCLK_DDRCLK_B0_L_UF
53B6<
SYSCLK_DDRCLK_B1_UF
53B6<
SYSCLK_DDRCLK_B1_L_UF
53B6<
53B6<
SYSCLK_DDRCLK_B2_UF
53B6<
SYSCLK_DDRCLK_B2_L_UF
INT_MEM_REF
+2_5V_MAIN
1
C30
0.1UF
20%
10V
2
CERM
402
67
MEM_MUXSEL_H<1>
MEM_MUXSEL_L<1>
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B2_UF
SYSCLK_DDRCLK_B2_L_UF
R288
47
1 2
5%
1/16W
MF
402
MUX_SEL_L
R261
47
1 2
5%
1/16W
MF
402
’0’S ARE SAME POLARITY (ACTIVE LO)
SEL = 0; HOST=B PORT, A PORT = 100 OHMGND
SEL = 1; HOST=A PORT, B PORT = 100 OHMGND
SYSCLK_DDRCLK_A2_UF
SYSCLK_DDRCLK_A2_L_UF
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B0_L_UF
’1’S ARE SAME POLARITY (ACTIVE HI)
RP102
22
1 8
5%
1/16W
SM1
RP102
22
2 7
5%
1/16W
SM1
RP102
22
3 6
5%
1/16W
SM1
RP102
22
4 5
5%
1/16W
SM1
RP105
22
1 8
5%
1/16W
SM1
RP105
22
2 7
5%
1/16W
SM1
RP105
22
3 6
5%
1/16W
SM1
RP105
22
4 5
5%
1/16W
SM1
RP109
22
4 5
5%
1/16W
SM1
RP109
22
3 6
5%
1/16W
SM1
RP109
22
1 8
5%
1/16W
SM1
RP109
22
2 7
5%
1/16W
SM1
5
13A3<>
13A6<>
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A1_L
NO_TEST
NC_SYSCLK_DDRCLK_A2
NO_TEST
NC_SYSCLK_DDRCLK_A2_L
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B1_L
SYSCLK_DDRCLK_B2
SYSCLK_DDRCLK_B2_L
13C4<>
13C8<>
4
53C6<
53C6<
14D6<>
14A4<>
15B4>
15D6<
15A6<
MEM_ADDR<2>
53C6<
53C6<
14D6<>
MEM_ADDR<0>
53C6<
MEM_ADDR<9>
53C6<
14A4<>
MEM_BA<0>
53B6<
MEM_ADDR<11>
15B3>
53B6<
53B6<
53B6<
15C6<
53B6<
15A6<
53B6<
RP68
22
1 8
5%
1/16W
SM1
RP68
22
2 7
5%
1/16W
SM1
RP68
22
3 6
5%
1/16W
SM1
RP68
22
4 5
5%
1/16W
SM1
RP62
22
1 8
5%
1/16W
SM1
RP62
22
2 7
5%
1/16W
SM1
RP62
22
3 6
5%
1/16W
SM1
RP62
22
4 5
5%
1/16W
SM1
RP116
22
1 8
5%
1/16W
SM1
RP116
22
2 7
5%
1/16W
SM1
RP116
22
3 6
5%
1/16W
SM1
RP116
22
4 5
5%
1/16W
SM1
53C6< 15B4>
12C6<> 14B4<>
53C6< 15B6<
12C6<> 14B4<>
RAM_BA<1>MEM_BA<1>
RAM_BA<0>
RAM_WE_LMEM_WE_L
RAM_ADDR<11>
MEM_RAS_L RAM_RAS_L
MEM_CAS_L RAM_CAS_L
RAM_ADDR<4>MEM_ADDR<4>
RAM_ADDR<3>MEM_ADDR<3>
RAM_ADDR<7>MEM_ADDR<7>
RAM_ADDR<10>MEM_ADDR<10>
RAM_ADDR<2>
RAM_ADDR<1>MEM_ADDR<1>
RAM_ADDR<0>
RAM_ADDR<9>
14B4<> 12D6<>
14B6<> 12D6<>
14B6<> 12C6<>
14B4<> 12D6<>
53C6<
R697
22
1 2
5%
1/16W
MF
402
R286
22
1 2
5%
1/16W
MF
402
15C6< 53D6<
14B4<> 12D6<>
12D6<> 14B6<>
53D6< 15C4>
14B6<> 12D6<>
53D6< 15C4>
14B6<> 12D6<>
53D6< 15C4>
14B6<> 12D6<>
53D6< 15C6<
14B4<> 12D6<>
53C6<
12B6<>
14B6<> 12D6<>
53C6<
12C6<>
14B4<> 12D6<>
53C6<
12C6<>
14B6<> 12D6<>
53C6<
12C6<> 14B4<>
15B6< 53D6<
53D6<
53C6<
12C6<>
15B6< 53D6<
53D6<
53C6<
12B6<>
15B6< 53C6<
53C6<
12C6<>
15C4> 53D6<
12B6<>
53D6<
MEM_ADDR<12>
15C4> 53D6<
53D6<
MEM_ADDR<8>
12D6<> 14B4<>
15C6< 53D6<
53D6<
MEM_ADDR<6>
12D6<> 14B4<>
15B4> 53D6<
53D6<
MEM_ADDR<5>
12D6<> 14B6<>
15C6< 53D6<
53D6<
MEM_CKE<2>
15B6< 53D6<
53D6<
MEM_CS_L<0>
15B6< 53D6<
53D6<
MEM_CKE<0>
15C6< 53D6<
53D6<
MEM_CS_L<1> RAM_CS_L<1>
MEM_CS_L<3>
MEM_CKE<3>
53D6<
MEM_CKE<1>
INTREPID DDR CNTRL
LAST_MODIFIED=Wed Sep 17 12:15:52 2003
APPLE COMPUTER INC.
3
2
RP71
22
1 8
2 7
3 6
4 5
RP51
1 8
RP51
2 7
RP51
3 6
RP51
22
4 5
5%
1/16W
SM1
RP52
1 8
RP52
2 7
RP52
3 6
RP52
4 5
53C6<
53C6<
1/16W
RP71
1/16W
RP71
1/16W
RP71
1/16W
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
5%
SM1
22
5%
SM1
22
5%
SM1
22
5%
SM1
R137
1/16W
NOSTUFF
R172
10K
1/16W
NOSTUFF
RAM_ADDR<12>
RAM_ADDR<8>
RAM_ADDR<6>
RAM_ADDR<5>
1
10K
1%
MF
402
2
1
1%
MF
402
2
RAM_CKE<2>
RAM_CS_L<0>
RAM_CKE<0>
1
R214
10K
1%
1/16W
MF
402
2
NOSTUFF
RAM_CS_L<3>
RAM_CKE<3>
RAM_CS_L<2>MEM_CS_L<2>
RAM_CKE<1>
1
R235
10K
1%
1/16W
MF
402
2
NOSTUFF
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
NONE
SHT
12 69
SCALE
1
OF
15B1<
53C6<
14B6<>
53C6<
14B4<>
53C6<
53C6<
15B4>
15A1<
53C6<
15B4>
14B6<>
53C6<
REV.
53D6<
53D6<
53D6<
53D6<
15C6<
15C1<
53C6<
15C4>
53C6< 53C6<
15C1<
13
D
C
B
A
DRAWING
<XR_PAGE_TITLE>
+2_5V_MAIN
78
6
5
4
3
12
+2_5V_MAIN
NOSTUFF
1
C230
10UF
N20P80%
10V
2
Y5V
805
CBTV4020
F2
DH0
H2
DH1
J2
DH2
J3
DH3
J5
DH4
J6
DH5
J8
DH6
J9
DH7
H9
DH8
F9
DH9
E9
DH10
C9
DH11
B9
DH12
B8
DH13
B6
DH14
B5
DH15
B3
DH16
B2
DH17
C2
DH18
E2
E3
SEL
C5C6D2D9G2G9H5
E8F3F8
VDD
U18
BGA
SYM_VER-3
GND
DA10
DA11
DA12
DA13
DA14
DA15
DA16
DA17
DA18
DA19
DB0*
DB1*
DB2*
DB3*
DB4*
DB5*
DB6*
DB7*
DB8*
DB9*DH19
DB10*
DB11*
DB12*
DB13*
DB14*
DB15*
DB16*
DB17*
DB18*
DB19*
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
H6
D
12D8<>
12D8<>
12D8<>
12D8<>
12D8<>
12D8<>
12D8<>
12D8<>
12C6<>
12C6<>
12D8<>
12D8<>
12D8<>
12D8<>
12D8<>
12D8<>
12C8<>
12C8<>
12C6<>
12C6<>
MEM_DATA<0>
MEM_DATA<1>
MEM_DATA<2>
MEM_DATA<3>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<6>
MEM_DATA<7>
MEM_DQS<0>
MEM_DQM<0>
MEM_DATA<8>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<12>
MEM_DATA<13>
MEM_DATA<14>
MEM_DATA<15>
MEM_DQS<1>
MEM_DQM<1>
MUX_SEL_L
12D4<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
C
53D6<
53D6<
53D6<
53D6<
53C6<
53D6<
53D6<
13A6<>
1
C611
0.1UF
20%
10V
2
CERM
402
RAM_DATA_A<0>
RAM_DATA_A<1>
RAM_DATA_A<2>
RAM_DATA_A<3>
RAM_DATA_A<4>
RAM_DATA_A<5>
RAM_DATA_A<6>
RAM_DATA_A<7>
RAM_DQS_A<0>
RAM_DQM_A<0>
RAM_DATA_A<8>
RAM_DATA_A<9>
RAM_DATA_A<10>
RAM_DATA_A<11>
RAM_DATA_A<12>
RAM_DATA_A<13>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DQS_A<1>
RAM_DQM_A<1>
RAM_DATA_B<0>
RAM_DATA_B<1>
RAM_DATA_B<2>
RAM_DATA_B<3>
RAM_DATA_B<4>
RAM_DATA_B<5>
RAM_DATA_B<6>
RAM_DATA_B<7>
RAM_DQS_B<0>
RAM_DQM_B<0>
RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DATA_B<10>
RAM_DATA_B<11>
RAM_DATA_B<12>
RAM_DATA_B<13>
RAM_DATA_B<14>
RAM_DATA_B<15>
RAM_DQS_B<1>
RAM_DQM_B<1>
B
53C6<
A
8
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
13C8<>
1
2
14D6<>
14D6<>
14D6<>
14D6<>
14D4<>
14D4<>
14D4<>
14D4<>
14C8<
14D4<>
14D6<>
14D6<>
14C8<
14D4<>
15D6<
15D6<
15D6<
15D6<
15D4>
15D4>
15D4>
15D4>
15C8<
15D4>
15D6<
15D6<
15C8<
15D4>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C6<>
12C6<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C6<>
12C6<>
C612
0.1UF
20%
10V
CERM
402
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
14D6<>
53D6<
53D6<
53D6<
53D6<
14D6<>
53D6<
14D6<>
53D6<
14D4<>
53D6<
14D4<>
53D6<
14D4<>
53D6<
14D4<>
14D6<>
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
15D6<
53D6<
53D6<
53D6<
53D6<
53D6<
15C6<
53D6<
15C6<
53D6<
15D4>
53D6<
15D4>
53D6<
15C4>
53D6<
15C4>
15D6<
53D6<
53D6<
MEM_DATA<16>
MEM_DATA<17>
MEM_DATA<18>
MEM_DATA<19>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<22>
MEM_DATA<23>
MEM_DQS<2>
MEM_DQM<2>
MEM_DATA<24>
MEM_DATA<25>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<28>
MEM_DATA<29>
MEM_DATA<30>
MEM_DATA<31>
MEM_DQS<3>
MEM_DQM<3>
MUX_SEL_L
12D4<
1
2
53D6<
53D6<
C613
0.1UF
20%
10V
CERM
402
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
E3
67
+2_5V_MAIN
E8F3F8
VDD
DA0
DA1
DA2
U22
CBTV4020
DH0
DH1
DH2
DH3
DH4
DH5
DH6
DH7
DH8
DH9
DH10
DH11
DH12
DH13
DH14
DH15
DH16
DH17
DH18
SEL
C5C6D2D9G2G9H5
BGA
SYM_VER-3
GND
DA10
DA11
DA12
DA13
DA14
DA15
DA16
DA17
DA18
DA19
DB0*
DB1*
DB2*
DB3*
DB4*
DB5*
DB6*
DB7*
DB8*
DB9*DH19
DB10*
DB11*
DB12*
DB13*
DB14*
DB15*
DB16*
DB17*
DB18*
DB19*
DA3
DA4
DA5
DA6
DA7
DA8
DA9
1
C858
0.1UF
20%
10V
2
CERM
402
E8F3F8
VDD
U27
CBTV4020
BGA
SYM_VER-3
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12C8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
13A3<>
1
C669
0.1UF
20%
10V
2
CERM
402
MEM_DATA<32>
MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<35>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<38>
MEM_DATA<39>
MEM_DQS<4>
12C6<>
MEM_DQM<4>
12C6<>
MEM_DATA<40>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>
MEM_DATA<44>
MEM_DATA<45>
MEM_DATA<46>
MEM_DATA<47>
MEM_DQS<5>
12C6<>
MEM_DQM<5>
12C6<>
MUX_SEL_H
12D4<
14D6<>
14C6<>
14C6<>
14C6<>
14D4<>
14C4<>
14C4<>
14C4<>
14C6<>
14C4<>
14C6<>
14C6<>
14C6<>
14C6<>
14C4<>
14C4<>
14C4<>
14C4<>
14C6<>
14C4<>
15C6<
15C6<
15C6<
15C6<
15C4>
15C4>
15C4>
15C4>
15C6<
15C4>
15C6<
15C6<
15C6<
15C6<
15C4>
15C4>
15C4>
15C4>
15B8<
15C4>
NOSTUFF
1
C671
0.1UF
20%
10V
2
CERM
402
14C8<
53D6<
14C8<
53D6<
15C8<
53D6<
15C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53C6<
1
C670
0.1UF
20%
10V
2
CERM
402
F1
RAM_DATA_A<16>
H1
RAM_DATA_A<17>
K1
RAM_DATA_A<18>
K3
RAM_DATA_A<19>
K4
RAM_DATA_A<20>
K6
RAM_DATA_A<21>
J7
RAM_DATA_A<22>
K9
RAM_DATA_A<23>
J10
RAM_DQS_A<2>
G10
RAM_DQM_A<2>
E10
RAM_DATA_A<24>
C10
RAM_DATA_A<25>
A10
RAM_DATA_A<26>
A8
RAM_DATA_A<27>
A7
RAM_DATA_A<28>
A5
RAM_DATA_A<29>
B4
RAM_DATA_A<30>
A2
RAM_DATA_A<31>
B1
RAM_DQS_A<3>
D1
RAM_DQM_A<3>
G1
RAM_DATA_B<16>
J1
RAM_DATA_B<17>
K2
RAM_DATA_B<18>
J4
RAM_DATA_B<19>
K5
RAM_DATA_B<20>
K7
RAM_DATA_B<21>
K8
RAM_DATA_B<22>
K10
RAM_DATA_B<23>
H10
RAM_DQS_B<2>
F10
RAM_DQM_B<2>
D10
RAM_DATA_B<24>
B10
RAM_DATA_B<25>
A9
RAM_DATA_B<26>
B7
RAM_DATA_B<27>
A6
RAM_DATA_B<28>
A4
RAM_DATA_B<29>
A3
RAM_DATA_B<30>
A1
RAM_DATA_B<31>
C1
RAM_DQS_B<3>
E1
RAM_DQM_B<3>
H6
F2
DH0
H2
DH1
J2
DH2
J3
DH3
J5
DH4
J6
DH5
J8
DH6
J9
DH7
H9
DH8
F9
DH9
E9
DH10
C9
DH11
B9
DH12
B8
DH13
B6
DH14
B5
DH15
B3
DH16
B2
DH17
C2
DH18
E2
E3
SEL
C5C6D2D9G2G9H5
GND
5
DA10
DA11
DA12
DA13
DA14
DA15
DA16
DA17
DA18
DA19
DB0*
DB1*
DB2*
DB3*
DB4*
DB5*
DB6*
DB7*
DB8*
DB9*DH19
DB10*
DB11*
DB12*
DB13*
DB14*
DB15*
DB16*
DB17*
DB18*
DB19*
4
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
H6
NOSTUFF
1
C860
0.1UF
20%
10V
2
CERM
402
RAM_DATA_A<32>
RAM_DATA_A<33>
RAM_DATA_A<34>
RAM_DATA_A<35>
RAM_DATA_A<36>
RAM_DATA_A<37>
RAM_DATA_A<38>
RAM_DATA_A<39>
RAM_DQS_A<4>
RAM_DQM_A<4>
RAM_DATA_A<40>
RAM_DATA_A<41>
RAM_DATA_A<42>
RAM_DATA_A<43>
RAM_DATA_A<44>
RAM_DATA_A<45>
RAM_DATA_A<46>
RAM_DATA_A<47>
RAM_DQS_A<5>
RAM_DQM_A<5>
RAM_DATA_B<32>
RAM_DATA_B<33>
RAM_DATA_B<34>
RAM_DATA_B<35>
RAM_DATA_B<36>
RAM_DATA_B<37>
RAM_DATA_B<38>
RAM_DATA_B<39>
RAM_DQS_B<4>
RAM_DQM_B<4>
RAM_DATA_B<40>
RAM_DATA_B<41>
RAM_DATA_B<42>
RAM_DATA_B<43>
RAM_DATA_B<44>
RAM_DATA_B<45>
RAM_DATA_B<46>
RAM_DATA_B<47>
RAM_DQS_B<5>
RAM_DQM_B<5>
1
2
C859
0.1UF
20%
10V
CERM
402
14B6<>
14B6<>
14B6<>
14B6<>
14B4<>
14B4<>
14B4<>
14B4<>
14B6<>
14B4<>
14B6<>
14B6<>
14A6<>
14A6<>
14B4<>
14B4<>
14A4<>
14A4<>
14A6<>
14A4<>
15B6<
15B6<
15B6<
15B6<
15B4>
15B4>
15B4>
15B4>
15B6<
15B4>
15B6<
15B6<
15A6<
15A6<
15B4>
15B4>
15A4>
15A4>
15B6<
15B4>
14B8<
53D6<
14B8<
53D6<
15B8<
53D6<
15B8<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
12B8<>
13C4<>
MEM_DATA<48>
MEM_DATA<49>
MEM_DATA<50>
MEM_DATA<51>
MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<54>
MEM_DATA<55>
12C6<>
12C6<>
MEM_DATA<56>
MEM_DATA<57>
MEM_DATA<58>
MEM_DATA<59>
MEM_DATA<60>
MEM_DATA<61>
MEM_DATA<62>
MEM_DATA<63>
12C6<>
12C6<>
12D4<
3
MEM_DQS<6>
MEM_DQM<6>
MEM_DQS<7>
MEM_DQM<7>
MUX_SEL_H
+2_5V_MAIN
E8F3F8
VDD
U29
CBTV4020
BGA
SYM_VER-3
F2
DH0
H2
DH1
J2
DH2
J3
DH3
J5
DH4
J6
DH5
J8
DH6
J9
DH7
H9
DH8
F9
DH9
E9
DH10
C9
DH11
B9
DH12
B8
DH13
B6
DH14
B5
DH15
B3
DH16
B2
DH17
C2
DH18
E2
E3
SEL
GND
C5C6D2D9G2G9H5
APPLE COMPUTER INC.
DA10
DA11
DA12
DA13
DA14
DA15
DA16
DA17
DA18
DA19
DB0*
DB1*
DB2*
DB3*
DB4*
DB5*
DB6*
DB7*
DB8*
DB9*DH19
DB10*
DB11*
DB12*
DB13*
DB14*
DB15*
DB16*
DB17*
DB18*
DB19*
NOSTUFF
1
C910
0.1UF
20%
10V
2
CERM
402
14A6<>
14A6<>
14A6<>
14A6<>
14A4<>
14A4<>
14A4<>
14A4<>
14A6<>
14A4<>
14A6<>
14A6<>
14A6<>
14A6<>
14A4<>
14A4<>
14A4<>
14A4<>
14A6<>
14A4<>
15A6<
15A6<
15A6<
15A6<
15A4>
15A4>
15A4>
15A4>
15A6<
15A4>
15A6<
15A6<
15A6<
15A6<
15A4>
15A4>
15A4>
15A4>
15A6<
15A4>
14B8<
53D6<
14A8<
53D6<
15B8<
53D6<
15A8<
53D6<
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
1
C908
0.1UF
20%
10V
2
CERM
402
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
H6
1
C909
0.1UF
20%
10V
2
CERM
402
RAM_DATA_A<48>
RAM_DATA_A<49>
RAM_DATA_A<50>
RAM_DATA_A<51>
RAM_DATA_A<52>
RAM_DATA_A<53>
RAM_DATA_A<54>
RAM_DATA_A<55>
RAM_DQS_A<6>
RAM_DQM_A<6>
RAM_DATA_A<56>
RAM_DATA_A<57>
RAM_DATA_A<58>
RAM_DATA_A<59>
RAM_DATA_A<60>
RAM_DATA_A<61>
RAM_DATA_A<62>
RAM_DATA_A<63>
RAM_DQS_A<7>
RAM_DQM_A<7>
RAM_DATA_B<48>
RAM_DATA_B<49>
RAM_DATA_B<50>
RAM_DATA_B<51>
RAM_DATA_B<52>
RAM_DATA_B<53>
RAM_DATA_B<54>
RAM_DATA_B<55>
RAM_DQS_B<6>
RAM_DQM_B<6>
RAM_DATA_B<56>
RAM_DATA_B<57>
RAM_DATA_B<58>
RAM_DATA_B<59>
RAM_DATA_B<60>
RAM_DATA_B<61>
RAM_DATA_B<62>
RAM_DATA_B<63>
RAM_DQS_B<7>
RAM_DQM_B<7>
DDR MUXES
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:54 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
SCALE
NONE
2
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
SHT
13 69
1
D
C
B
A
REV.
13
OF
DRAWING
<XR_PAGE_TITLE>
D
C
B
A
78
+2_5V_MAIN
1
C1401
0.1UF
20%
10V
2
CERM
1
C1601
0.1UF
2
20%
10V
CERM
402
402
DISTRIBUTE THESE TWO CAPS
ALONG VREF TRACE
15D8<
DDR_VREF
12A7<
14D2<>
52A6>
1
C46
0.1UF
20%
10V
2
CERM
402
NOSTUFF
LOCATE C1601 AND C1401
DIRECTLY ON PIN AT J26-1
1
C47
0.1UF
20%
10V
2
CERM
402
NOSTUFF
+2_5V_MAIN
NOSTUFF
R1403
470
1 2
5%
1/16W
RAM_DQS_A<0>
13D7<>
14D6<>
53D6<
13C7<>
13B5<>
13B5<>
13D4<>
13C4<>
13B2<>
13B2<>
RAM_DQS_A<1>
RAM_DQS_A<2>
RAM_DQS_A<3>
RAM_DQS_A<4>
RAM_DQS_A<5>
RAM_DQS_A<6>
RAM_DQS_A<7>
14D6<>
53D6< 53D6<
14C6<>
53D6<
14C6<>
53D6<
14B6<>
53D6<
14A6<>
53D6<
14A6<>
53D6<
14A6<>
53D6<
MF
402
NOSTUFF
R1405
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1407
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1409
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1411
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1413
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1415
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1417
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1404
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1406
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1408
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1410
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1412
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1414
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1416
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1418
470
1 2
5%
1/16W
MF
402
+3V_MAIN
1
C319
10UF
N20P80%
10V
2
Y5V
805
1
C929
0.1UF
20%
10V
2
CERM
402
8
53D6<
53D6<
53C6<
53C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
13D7<>
53D6<
13D7<>
14C8<
13D7<>
53D6<
13D7<>
53D6<
13D7<>
53D6<
13C7<>
53D6<
13C7<>
14C8<
13C7<>
53D6<
13C7<>
53D6<
13C7<>
12C4<
SYSCLK_DDRCLK_A0_L
53D6<
13B5<>
13B5<>
53D6<
13B5<>
14C8<
13B5<>
53D6<
53D6<
13B5<>
53D6<
13B5<>
53D6<
13B5<>
14C8<
13B5<>
13B5<>
53D6<
13B5<>
53D6<
53C6<
15C1<
15C4>
53D6<
15C6<
53D6<
15C6<
53D6<
15C6<
53D6<
15C4>
53D6<
15B6<
15B4>
53D6<
15B6<
53C6<
15B6<
53C6<
13D4<>
53D6<
13D4<>
53D6<
13D4<>
14B8<
13D4<>
53D6<
13D4<>
53D6<
13D4<>
53D6<
13C4<>
53D6<
13C4<>
14B8<
13C4<>
53D6<
13C4<>
53D6<
13C2<>
53D6<
13C2<>
53D6<
13B2<>
14B8<
13C2<>
53D6<
13C2<>
53D6<
13B2<>
53D6<
13B2<>
53D6<
13B2<>
14A8<
13B2<>
53D6<
13B2<>
53D6<
15A6<
34B3<
34B3<
6
MIN_LINE_WIDTH=20
RAM_DATA_A<0>
RAM_DATA_A<1>
RAM_DQS_A<0>
RAM_DATA_A<2>
RAM_DATA_A<3>
RAM_DATA_A<8>
RAM_DATA_A<9>
RAM_DQS_A<1>
RAM_DATA_A<10>
RAM_DATA_A<11>
SYSCLK_DDRCLK_A0
RAM_DATA_A<16>
RAM_DATA_A<17>
RAM_DQS_A<2>
RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<24>
RAM_DATA_A<25>
RAM_DQS_A<3>
RAM_DATA_A<26>
RAM_DATA_A<27>
RAM_CKE<1>
12B1<
RAM_ADDR<12>
12D1<
RAM_ADDR<9>
12C3<
RAM_ADDR<7>
12D3<
RAM_ADDR<5>
12C1<
RAM_ADDR<3>
12D3<
RAM_ADDR<1>
12C3<
RAM_ADDR<10>
12C3<
RAM_BA<0>
12B3<
RAM_WE_L
12B3<
RAM_CS_L<0>
12C1<
RAM_DATA_A<32>
RAM_DATA_A<33>
RAM_DQS_A<4>
RAM_DATA_A<34>
RAM_DATA_A<35>
RAM_DATA_A<40>
RAM_DATA_A<41>
RAM_DQS_A<5>
RAM_DATA_A<42>
RAM_DATA_A<43>
RAM_DATA_A<48>
RAM_DATA_A<49>
RAM_DQS_A<6>
RAM_DATA_A<50>
RAM_DATA_A<51>
RAM_DATA_A<56>
RAM_DATA_A<57>
RAM_DQS_A<7>
RAM_DATA_A<58>
RAM_DATA_A<59>
INT_I2C_DATA0
INT_I2C_CLK0
15A6<
NC_SODIMM202
67
+2_5V_MAIN
NC_SODIMM71
NC_SODIMM73
NC_SODIMM77
NC_SODIMM79
NC_SODIMM83
NC_SODIMM85
NC_SODIMM89
NC_SODIMM91
NC_SODIMM97
NC_SODIMM123
NC_SODIMM199
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
5
NC_SODIMM201
1 2
3 4
5
7
9
11
13
15
17
19
21
23
25
27 28
29
31
33 34
35
37
39 40
41
43
45 46
47
49
51
53
55
57
59
61
63 64
65
67
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89
91
93 94
97 98
99
103 104
113 114
115
117
119
121 122
123 124
125 126
127
129
131 132
133
135
137 138
139
141
143 144
145
147
149 150
151
153
155 156
157
159
161 162
163
165
167 168
169
171
173
175
177
179
181
183
185 186
187
189
191 192
193
195
197
199 200
201
NO_TEST
VREF0
VSS0
DQ0
AS0A42-D2R
DQ1
F-RT-SM
VDD0
DQS0
DQ2
VSS2
DQ3
DQ8
VDD2
DQ9
DQS1
VSS4
DQ10
DQ11
VDD4
CK0
CK0*
VSS7
DQ16
DQ17
VDD7
DQS2
DQ18
VSS9
DQ19
DQ24
VDD9
DQ25
DQS3
VSS11
DQ26
DQ27
VDD11
RFU0
RFU2
VSS13
RFU4
RFU6
VDD13
RFU8
RFU10
VSS15
RFU12
RFU13
VDD16
CKE1
RFU14
A12
A9
VSS18
A7
A5
A3
A1
VDD18
A10_AP
BA0
WE*
S0*
RFU16
VSS20
DQ32
DQ33
VDD20
DQS4
DQ34
VSS22
DQ35
DQ40
VDD22
DQ41
DQS5
VSS24
DQ42
DQ43
VDD24
VDD26
VSS26
VSS27
DQ48
DQ49
VDD27
DQS6
DQ50
VSS29
DQ51
DQ56
VDD29
DQ57
DQS7
VSS31
DQ58
DQ59
VDD31
SDA
SCL
VDDSPD
RFU18
202
J26
KEY
5
+2_5V_MAIN
VREF1
VSS1
6
DQ4
8
DQ5
10
VDD1
12
DM0
14
DQ6
16
VSS3
18
DQ7
20
DQ12
22
VDD3
24
DQ13
26
DM1
VSS5
30
DQ14
32
DQ15
VDD5
36
VDD6
38
VSS6
VSS8
42
DQ20
44
DQ21
VDD8
48
DM2
50
DQ22
52
VSS10
54
DQ23
56
DQ28
58
VDD10
60
DQ29
62
DM3
VSS12
66
DQ30
68
DQ31
VDD12
RFU1
RFU3
VSS14
RFU5
RFU7
VDD14
RFU9
RFU11
VSS16
90
VSS17
92
VDD15
VDD17
9695
CKE0
RFU15
100
A11
102101
A8
VSS19
106105
A6
108107
A4
110109
A2
112111
A0
VDD19
116
BA1
118
RAS*
120
CAS*
S1*
RFU17
VSS21
128
DQ36
130
DQ37
VDD21
134
DM4
136
DQ38
VSS23
140
DQ39
142
DQ44
VDD23
146
DQ45
148
DM5
VSS25
152
DQ46
154
DQ47
VDD25
158
CK1*
160
CK1
VSS28
164
DQ52
166
DQ53
VDD28
170
DM6
172
DQ54
174
VSS30
176
DQ55
178
DQ60
180
VDD30
182
DQ61
184
DM7
VSS32
188
DQ62
190
DQ63
VDD32
194
SA0
196
SA1
198
SA2
RFU19
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
4
4
NC_SODIMM72
NC_SODIMM74
NC_SODIMM78
NC_SODIMM80
NC_SODIMM84
NC_SODIMM86
NC_SODIMM98
NC_SODIMM124
ADDR=0 (0xA0)
NC_SODIMM200
MIN_LINE_WIDTH=20
RAM_DATA_A<4>
RAM_DATA_A<5>
RAM_DQM_A<0>
RAM_DATA_A<6>
RAM_DATA_A<7>
RAM_DATA_A<12>
RAM_DATA_A<13>
RAM_DQM_A<1>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DATA_A<20>
RAM_DATA_A<21>
RAM_DQM_A<2>
RAM_DATA_A<22>
RAM_DATA_A<23>
RAM_DATA_A<28>
RAM_DATA_A<29>
RAM_DQM_A<3>
RAM_DATA_A<30>
RAM_DATA_A<31>
RAM_CKE<0>
RAM_ADDR<11>
RAM_ADDR<8>
RAM_ADDR<6>
RAM_ADDR<4>
RAM_ADDR<2>
RAM_ADDR<0>
RAM_BA<1>
RAM_RAS_L
RAM_CAS_L
RAM_CS_L<1>
RAM_DATA_A<36>
RAM_DATA_A<37>
RAM_DQM_A<4>
RAM_DATA_A<38>
RAM_DATA_A<39>
RAM_DATA_A<44>
RAM_DATA_A<45>
RAM_DQM_A<5>
RAM_DATA_A<46>
RAM_DATA_A<47>
SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_A1
RAM_DATA_A<52>
RAM_DATA_A<53>
RAM_DQM_A<6>
RAM_DATA_A<54>
RAM_DATA_A<55>
RAM_DATA_A<60>
RAM_DATA_A<61>
RAM_DQM_A<7>
RAM_DATA_A<62>
RAM_DATA_A<63>
12C1<
12B3<
12A2<
12A2<
13D7<>
13C7<>
13B5<>
13A5<>
12B3<
12D1<
12D1<
12D3<
12C3<
12C3<
12C1<
13D4<>
13C4<>
13B2<>
13B2<>
13D7<>
13D7<>
13D7<>
13D7<>
15B6<
15B4>
15B6<
(516S0029)
13C7<>
13C7<>
13C7<>
13C7<>
13B5<>
13B5<>
13B5<>
13B5<>
13B5<>
13B5<>
13B5<>
13B5<>
15C1<
15C4>
15C4>
15C6<
15C6<
15B6<
53C6<
13D4<>
13D4<>
13D4<>
13D4<>
13C4<>
13C4<>
13C4<>
13C4<>
12C4<
13C2<>
13C2<>
13B2<>
13B2<>
13B2<>
13B2<>
13B2<>
13B2<>
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
15C4>
53D6<
53C6<
53C6<
53D6<
53D6<
12B4<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
3
C1602
0.1UF
20%
10V
CERM
402
+2_5V_MAIN
53D6<
53C6<
3
+2_5V_MAIN
1
1
2
LOCATE C1602 AND C1402
DIRECTLY ON PIN AT J26-2
1
C244
0.1UF
20%
10V
2
CERM
402
1
C313
0.1UF
20%
10V
2
CERM
402
1
C1406
0.1UF
20%
10V
2
CERM
402
1
C1415
0.1UF
20%
10V
2
CERM
402
C1402
0.1UF
20%
10V
2
CERM
402
DDR DECOUPLING
SLOT "A"
1
C263
0.1UF
20%
10V
2
CERM
402
1
C242
0.1UF
20%
10V
2
CERM
402
1
C1407
0.1UF
20%
10V
2
CERM
402
1
C1416
0.1UF
20%
10V
2
CERM
402
1
C320
0.1UF
2
1
C275
0.1UF
2
1
C1408
0.1UF
2
1
C1417
0.1UF
2
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
1
C243
2
1
C276
2
1
C1409
2
1
C1418
2
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
+2_5V_MAIN
1
R1401
100
1%
1/16W
MF
402
2
1
R1402
100
1%
1/16W
MF
402
2
LAST_MODIFIED=Wed Sep 17 12:15:56 2003
APPLE COMPUTER INC.
2
12
DDR_VREF
1 - 10UF
24 - 0.1UF
1
C255
0.1UF
2
1
C304
0.1UF
2
1
C1410
0.1UF
2
1
C1419
0.1UF
2
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
1
2
1
C261
2
1
C1411
2
1
C1420
2
C256
0.1UF
20%20%
10V
CERM
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402402
MIN_LINE_WIDTH=25
LOCATE THESE RESISTORS BETWEEN DIMMS
14D8<>
12A7<
402
1
2
1
C311
0.1UF
2
1
C1412
0.1UF
2
1
2
C1403
0.1UF
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
C1421
0.1UF
20%
10V
CERM
402
15D8<
+2_5V_MAIN
INT_MEM_VREF
SO-DIMM SLOT A
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
SCALE
NONE
SHT
OF
1
52A6>
1
2
1
2
1
2
1
2
6914
C1404
0.1UF
20%
10V
CERM
402
C1405
0.1UF
20%
10V
CERM
402
C1413
0.1UF
20%
10V
CERM
402
C1414
10UF
N20P80%
10V
Y5V
805
REV.
D
C
B
12A8<>
A
13
DRAWING
<XR_PAGE_TITLE>
D
53D6<
53D6<
C
53D6<
53D6<
53D6<
53D6<
B
53D6<
53D6<
A
DISTRIBUTE THESE THREE CAPS
ALONG VREF TRACE
DDR_VREF
52A6>
1
C48
0.1UF
20%
10V
2
CERM
402
NOSTUFF
13C7<>
13B7<>
13A5<>
13A5<>
13C4<>
13B4<>
13B2<>
13A2<>
RAM_DQS_B<0>
RAM_DQS_B<1>
RAM_DQS_B<2>
RAM_DQS_B<3>
RAM_DQS_B<4>
RAM_DQS_B<5>
RAM_DQS_B<6>
RAM_DQS_B<7>
15D6<
15D6<
15C6<
15C6<
15B6<
15B6<
15A6<
15A6<
8
LOCATE C1702 AND C1501
DIRECTLY ON PIN J11-1
1
C49
0.1UF
20%
10V
2
CERM
402
NOSTUFF
+2_5V_MAIN
+2_5V_MAIN
1
R809
1K
1%
1/16W
MF
402
2
1
R796
1K
1%
1/16W
MF
402
2
1
C50
0.1UF
20%
10V
2
CERM
402
NOSTUFF
NOSTUFF
R1503
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1505
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1507
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1509
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1511
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1513
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1515
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1517
470
1 2
5%
1/16W
MF
402
M_VDDID
M_SPD_WP
78
+2_5V_MAIN
NOSTUFF
R1504
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1506
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1508
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1510
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1512
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1514
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1516
470
1 2
5%
1/16W
MF
402
NOSTUFF
R1518
470
1 2
5%
1/16W
MF
402
1
2
1
C1702
0.1UF
20%
10V
2
CERM
402
C1501
0.1UF
20%
10V
CERM
402
MIN_LINE_WIDTH=20
13C7<>
53D6<
53D6<
13C7<>
15C8<
53D6<
53D6<
13C7<>
53D6<
13C7<>
53D6<
13C7<>
53D6<
13C7<>
15C8<
53D6<
53B6<
12A4<
53B6<
53D6<
53D6<
53D6<
53D6<
53B6<
53D6<
53D6<
SYSCLK_DDRCLK_B1_L
53D6<
13C7<>
53D6<
13C7<>
15B1<
53C6<
53D6<
13A5<>
53D6<
13A5<>
15C8<
14B6<>
53D6<
53D6<
13A5<>
14B6<>
53D6<
53D6<
13A5<>
14B6<>
53D6<
53D6<
13A5<>
53D6<
13A5<>
15B8<
14B4<>
53D6<
53D6<
13A5<>
53D6<
13A5<>
53D6<
14B4<>
53D6<
14B6<>
53D6<
14B4<>
53D6<
14B4<>
53D6<
13C4<>
53D6<
13C4<>
15B8<
53D6<
13C4<>
53D6<
14B6<>
53D6<
13C4<>
53D6<
13C4<>
53C6<
14B6<>
53D6<
13C4<>
53C6<
14B4<>
15B8<
53D6<
13C4<>
53D6<
13C4<>
53D6<
13B2<>
53D6<
13B2<>
SYSCLK_DDRCLK_B2_L
53B6<
12A4<
15B8<
53D6<
13B2<>
53D6<
13B2<>
53D6<
13B2<>
53D6<
13A2<>
15A8<
53D6<
13A2<>
53D6<
13A2<>
34B3<
14A6<>
34B3<
6
RAM_DATA_B<0>
RAM_DATA_B<1>
RAM_DQS_B<0>
13C7<>
RAM_DATA_B<2>
RAM_DATA_B<3>
RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DQS_B<1>
13B7<>
SYSCLK_DDRCLK_B1
RAM_DATA_B<10>
RAM_DATA_B<11>
RAM_CKE<2>
12C1<
RAM_DATA_B<16>
RAM_DATA_B<17>
RAM_DQS_B<2>
13A5<>
RAM_ADDR<9>
12C3<
RAM_DATA_B<18>
RAM_ADDR<7>
12D3<
RAM_DATA_B<19>
RAM_ADDR<5>
12C1<
RAM_DATA_B<24>
RAM_DATA_B<25>
RAM_DQS_B<3>
13A5<>
RAM_ADDR<4>
12D3<
RAM_DATA_B<26>
RAM_DATA_B<27>
RAM_ADDR<2>
12C3<
RAM_ADDR<1>
12C3<
RAM_ADDR<0>
12C3<
RAM_BA<1>
12B3<
RAM_DATA_B<32>
RAM_DATA_B<33>
RAM_DQS_B<4>
13C4<>
RAM_DATA_B<34>
RAM_BA<0>
12B3<
RAM_DATA_B<35>
RAM_DATA_B<40>
RAM_WE_L
12B3<
RAM_DATA_B<41>
RAM_CAS_L
12A2<
RAM_DQS_B<5>
13B4<>
RAM_DATA_B<42>
RAM_DATA_B<43>
RAM_DATA_B<48>
RAM_DATA_B<49>
SYSCLK_DDRCLK_B2
RAM_DQS_B<6>
13B2<>
RAM_DATA_B<50>
RAM_DATA_B<51>
RAM_DATA_B<56>
RAM_DATA_B<57>
RAM_DQS_B<7>
13A2<>
RAM_DATA_B<58>
RAM_DATA_B<59>
INT_I2C_DATA0
INT_I2C_CLK0
14A6<>
67
NC_BIGDIMM9
NC_BIGDIMM10
NC_BIGDIMM44
NC_BIGDIMM45
NC_BIGDIMM47
NC_BIGDIMM49
NC_BIGDIMM51
NC_BIGDIMM71
+2_5V_MAIN
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
5
J11
TH-DDR-DIMM-71243
FRONT SIDE
SYM_VER3
SX64 DIMM
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
REAR SIDE
VDDQ
DM0/DQS9
VDDQ
DQ12
DQ13
DQ14
DQ15
CKE1
VDDQ
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
VDDQ
DQ30
DQ31
VDDQ
CKO*
VDDQ
DQ36
DQ37
DQ38
DQ39
DQ44
RAS*
DQ45
VDDQ
DQ46
DQ47
NC,S3*
VDDQ
DQ52
DQ53
NC,FETEN
DQ54
DQ55
VDDQ
DQ60
DQ61
DQ62
DQ63
VDDQ
VVDDSPD
VSS
DQ4
DQ5
DQ6
DQ7
VSS
A13
VDD
BA2
A12
VSS
A11
VDD
VSS
VSS
CK0
VSS
A10
VSS
VDD
VSS
S0*
S1*
VSS
VDD
VSS
SA0
SA1
SA2
NC
NC
A8
A6
A3
NC
NC
NC
NC
NC
NC
1
VREF
2
DQ0
3
VSS
4
DQ1
5
DQS0
6
DQ2
7
VDD
8
DQ3
9
NC
10
NC
11
VSS
12
DQ8
13
DQ9
14
DQS1
15
VDDQ
16
CK1
17
CK1*
18
VSS
19
DQ10
20
DQ11
21
CKE0
22
VDDQ
23
DQ16
24
DQ17
25
DQS2
26
VSS
27
A9
28
DQ18
29
A7
30
VDDQ
31
DQ19
32
A5
33
DQ24
34
VSS
35
DQ25
36
DQS3
37
A4
38
VDD
39
DQ26
40
DQ27
41
A2
42
VSS
43
A1
44
NC
45
NC
46
VDD
47
NC
48
A0
49
NC
50
VSS
51
NC
52
BA1
53
DQ32
54
VDDQ
55
DQ33
56
DQS4
57
DQ34
58
VSS
59
BA0
60
DQ35
61
DQ40
62
VDDQ
63
WE*
64
DQ41
65
CAS*
66
VSS
67
DQS5
68
DQ42
69
DQ43
70
VDD
71
NC,S2*
72
DQ48
73
DQ49
74
VSS
75
CK2*
76
CK2
77
VDDQ
78
DQS6
79
DQ50
80
DQ51
81
VSS
82
VDDID
83
DQ56
84
DQ57
85
VDD
86
DQS7
87
DQ58
88
DQ59
89
VSS
90
WP
91
SDA
92
SCL
(516-1001)
DDR SDRAM SLOT B
5
+2_5V_MAIN
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
4
RAM_DATA_B<4>
RAM_DATA_B<5>
RAM_DQM_B<0>
RAM_DATA_B<6>
RAM_DATA_B<7>
NC_BIGDIMM101
NC_BIGDIMM102
NC_BIGDIMM103
RAM_DATA_B<12>
RAM_DATA_B<13>
RAM_DQM_B<1>
RAM_DATA_B<14>
RAM_DATA_B<15>
NC_BIGDIMM113
NC_BIGDIMM134
NC_BIGDIMM135
NC_BIGDIMM140
RAM_ADDR<10>
NC_BIGDIMM142
RAM_DATA_B<20>
RAM_ADDR<12>
RAM_DATA_B<21>
RAM_ADDR<11>
RAM_DQM_B<2>
RAM_DATA_B<22>
RAM_ADDR<8>
RAM_DATA_B<23>
RAM_ADDR<6>
RAM_DATA_B<28>
RAM_DATA_B<29>
RAM_DQM_B<3>
RAM_ADDR<3>
RAM_DATA_B<30>
RAM_DATA_B<31>
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B0_L
NC_BIGDIMM144
RAM_DATA_B<36>
RAM_DATA_B<37>
RAM_DQM_B<4>
RAM_DATA_B<38>
RAM_DATA_B<39>
RAM_DATA_B<44>
RAM_RAS_L
RAM_DATA_B<45>
RAM_CS_L<2>
RAM_CS_L<3>
RAM_DQM_B<5>
RAM_DATA_B<46>
RAM_DATA_B<47>
NC_BIGDIMM163
RAM_DATA_B<52>
RAM_DATA_B<53>
NC_BIGDIMM167
RAM_DQM_B<6>
RAM_DATA_B<54>
RAM_DATA_B<55>
NC_BIGDIMM173
RAM_DATA_B<60>
RAM_DATA_B<61>
RAM_DQM_B<7>
RAM_DATA_B<62>
RAM_DATA_B<63>
RAM_SA0
ADDR = 1 (0XA2)
4
RAM_CKE<3>
12C3<
14B6<>
12A2<
13C7<>
13B7<>
12B1<
12D1<
12B3<
13A5<>
12D1<
12D1<
13A5<>
12D3<
53D6<
44C2<>
13C4<>
12B1<
12B1<
13B4<>
13B2<>
13A2<>
13C7<>
13C7<>
13C7<>
13C7<>
13C7<>
13B7<>
13B7<>
13B7<>
15A1<
13A5<>
13A5<>
13A5<>
14B4<>
13A5<>
14B4<>
13A5<>
13A5<>
14B6<>
13A5<>
13A5<>
34C3<
13C4<>
13C4<>
13C4<>
13C4<>
13C4<>
14B4<>
13C4<>
53C6<
53C6<
13B4<>
13B4<>
13B2<>
13B2<>
13B2<>
13B2<>
53D6<
13A2<>
13A2<>
13A2<>
13A2<>
14B6<>
14B4<>
12B4<
+2_5V_MAIN
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53B6<
53B6<
12B4<
INT_PU_RESET_L
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53C6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
53D6<
1
53D6<
53D6<
R825
2
53D6<
+3V_MAIN
1K
1%
1/16W
MF
402
3
DDR DECOUPLING
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
1
C726
0.1UF
20%
10V
2
CERM
402
1
C925
0.1UF
20%
10V
2
CERM
402
1
C1505
20%
10V
2
CERM
402
1
C1515
0.1UF
20%
10V
2
CERM
402
1
2
1
2
1
2
1
2
C562
0.1UF
C819
0.1UF
C1504
0.1UF
C1514
0.1UF
+2_5V_MAIN
NOSTUFF
1
R512
1K
1%
1/16W
MF
402
2
R508
0
1 2
5%
1/16W
MF
402
CKE_HYNIX
1
C943
0.1UF
20%
10V
2
CERM
402
3
15_I286
SLOT "B"
1
C936
0.1UF
20%
10V
2
CERM
402
1
C741
0.1UF
20%
10V
2
CERM
402
1
C1506
0.1UF0.1UF
20%
10V
2
CERM
402
CKE_HYNIX
1
C51
0.1UF
20%
10V
2
CERM
402
1
1
C945
10UF
N20P80%
10V
2
Y5V
805
G
1
C864
0.1UF
20%
10V
2
CERM
402
1
C914
0.1UF
20%
10V
2
CERM
402
1
C1507
0.1UF
20%
10V
2
CERM
402
CKE_HYNIX
1
R405
4.7K
5%
1/16W
MF
402
2
3
CKE_HYNIX
D
Q41
2N7002
SM
S
2
APPLE COMPUTER INC.
1
2
1
2
1
2
1 - 10UF
24 - 0.1UF
C922
0.1UF
20%
10V
CERM
402
C593
0.1UF
20%
10V
CERM
402
C1508
0.1UF
20%
10V
CERM
402
1
2
1
2
1
2
C602
C1509
C624
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
20%
10V
CERM
402
1
2
1
2
1
2
C1502
0.1UF
20%
10V
CERM
402
C672
0.1UF
20%
10V
CERM
402
C1510
0.1UF0.1UF
10V
CERM
402
1
2
1
2
1
2
C1513
0.1UF
C1503
0.1UF
C1511
0.1UF
+2_5V_MAIN
NOSTUFF
1
R497
10K
1%
1/16W
MF
402
2
3
D
S
2
NOSTUFF
1
R471
10K
1%
1/16W
MF
402
2
CKE_HYNIX
Q54
2N7002
SM
3
CKE_HYNIX
D
Q42
2N7002
1
SM
G
S
2
1
G
+2_5V_MAIN
NOSTUFF
1
R507
10K
1%
1/16W
MF
15_I282
1
G
D
S
1
G
3
CKE_HYNIX
Q52
2N7002
SM
2
3
CKE_HYNIX
D
S
2
Q53
2N7002
SM
2
NOSTUFF
1
R495
10K
1%
1/16W
MF
402
2
402
BIG DIMM SLOT B
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:15:58 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
SCALE
NONE
2
12
+2_5V_MAIN
20%
10V
CERM
402
20%
10V
CERM
402
20%20%
10V
CERM
402
NOSTUFF
1
C55
0.1UF
20%
10V
2
CERM
402
RAM_CKE<0>
TO SO-DIMM
RAM_CKE<1>
NOSTUFF
1
C58
0.1UF
20%
10V
2
CERM
402
RAM_CKE<2>
TO BIG DIMM
RAM_CKE<3>
SHT
15
1
OF
1
C1512
10UF
N20P80%
10V
2
Y5V
805
12C1<
53C6<
12B1<
53C6<
12C1<
53C6<
12B1<
53C6<
69
D
C
14B4<>
14B6<>
B
15C6<
15C4>
A
REV.
13
DRAWING
<XR_PAGE_TITLE>
D
54A7<
C
B
59C8>
52C3>
16D7<
16C2<
17D5<
A
INTREPID AGP CLK IS 1.5V OUT
NEED 3.3V SWING FOR VIDEO CHIPS
VERSION 1 WORKAROUND IS LA CLOCK
VERSION 2 WORKAROUND IS UNUSED PIN
52C3>
46B4<>
17D5<
17A4<
54A7<
CLK66M_GPU_AGP
17C7<
SHARE THE SAME PAD
30C5<>
THESE RESISTORS
INT_ROM_OVERLAY_PU
30A7<
2" LONGER
(0.5NS SLOWER)
1 2
NOSTUFF
AGP_FB_PLUS2
54A7<
1 2
NOSTUFF
R203
5%
1/16W
MF
402
R204
5%
1/16W
MF
402
0
0
PLACE ALL SERPENTINES ON INTERNAL LAYER
GPU AGP I/O REFERENCE
46B4<>
11A6<
17A4<
10D6<
17A3<
(PLACE CLOSE TO GPU AGP BALLS)
1/16W
402
1/16W
C603
470PF
1 2
10%
1
50V
CERM
1%
402
MF
2
1
1%
C222
MF
2
470PF
402
1 2
10%
50V
CERM
402
+1_5V_AGP
4.99K
4.99K
R549
R205
8
17A3<
16C2<
INT_V2
R225
22
1 2
5%
1/16W
MF
402
R224
22
1 2
5%
1/16W
MF
402
NOSTUFF
(ZERO DELAY)
NOSTUFF
1
R211
0
5%
1/16W
MF
402
2
GPU_AGP_VREF_H
R545
1
82.5
1%
1/16W
MF
2
402
1
R197
82.5
1%
1/16W
MF
402
2
GPU_AGP_VREF_L
78
52D3>
30D5<
10D6<
11A6<
16A8<
INT_V1
R226
1 2
1/16W
AGP
AGP_FBI_EQUAL
AGP_FBO_EQUAL
59C8>
0
5%
MF
54B7<
402
NOSTUFF
R215
1 2
1/16W
NOSTUFF
R216
1 2
5%
1/16W
MF
402
28D6<>
9D4<
+1_5V_AGP
54B7<
17A8<
52C3>
INT_ANALYZER_CLK
17A8>
16D3<
54A7<
CLK66M_GPU_UF
54A7<
54A7<
2" SHORTER
(0.5NS FASTER)
54A7<
0
5%
MF
402
1
R220
0
5%
1/16W
MF
402
2
0
54A7<
54B7<
17B8<
INT_AGP_VREF
1
C1802
0.1UF
20%
10V
2
CERM
402
+1_5V_INTREPID_PLL
1
R619
60.4
1%
1/16W
MF
402
2
STOP_AGP_L
16D3<
INT_AGPPVT
INT_AGP_VREF
16A7<
9B4<
8A2<
59A8>
AGP_BUSY_L
16D1<
INT_AGP_FB_IN
INT_AGP_FB_OUT
NOSTUFF
1
R622
0
5%
1/16W
MF
402
2
AGP_WBF_L
16B1<
16C6<>
54A7<
52C3>
6
67
AN19
56B3>
AT19
AK30
1 2
1
C760
0.1UF
20%
10V
2
CERM
402
STP_AGP
AJ24
AGPPVT
AB20
AGPVREF0
AB21
AGPVREF1
AGP_BUSY
AK28
AGP_CLK
AK27
AGP_FB_IN
AK25
AGP_FB_OUT
VOUT = AGPIO (1.5V)
VIN = VCORE (1.5V)
AGP_WBF
R667
4.7
5%
1/16W
MF
402
V14
VDD15A_5
(PLL5)
U25
INTREPID
(3 OF 9)
SEE_TABLE
(ON PAGE 12)
INTERFACES
VSSA_5
(PLL5)
V13
BGA
AGP
OMIT
2
XW48
SM
1
C1801
0.1UF
20%
10V
CERM
402
AGPDEVSEL
AGP_SB_STB_P
AGP_SB_STB_N
AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N
NO_TEST
5
1
2
AGPREQ
AGPGNT
AGPAD0
AGPAD1
AGPAD2
AGPAD3
AGPAD4
AGPAD5
AGPAD6
AGPAD7
AGPAD8
AGPAD9
AGPAD10
AGPAD11
AGPAD12
AGPAD13
AGPAD14
AGPAD15
AGPAD16
AGPAD17
AGPAD18
AGPAD19
AGPAD20
AGPAD21
AGPAD22
AGPAD23
AGPAD24
AGPAD25
AGPAD26
AGPAD27
AGPAD28
AGPAD29
AGPAD30
AGPAD31
AGPCBE_0
AGPCBE_1
AGPCBE_2
AGPCBE_3
AGPPAR
AGPFRAME
AGPTRDY
AGPIRDY
AGPSTOP
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2
AGPPIPE
AGPRBF
INT_PLL5_GND
5
+1_5V_INTREPID_PLL5
INT_PLL5_GND
AT33
AM29
AR19
AM19
AT20
AR20
AT21
AN20
AR21
AN21
AM21
AT22
AR22
AN22
AM22
AN23
AR23
AT24
AM23
AR24
AT25
AR25
AM24
AN25
AL24
AR26
AT26
AM25
AN26
AM26
AR27
AT27
AR28
AN27
AM20
AT23
AN24
AL25
AT29
AN28
AR29
AT28
AM28
AM27
AT32
AR32
AM31
AN31
AR31
AT31
AM30
AN30
AH25
AG25
AN29
AT30
AR30
AK20
AK19
AK21
AK22
AJ29
AK24
16D5<
52D3>
16A5<>
AGP_REQ_L
AGP_GNT_L
AGP_AD<0>
AGP_AD<1>
AGP_AD<2>
AGP_AD<3>
AGP_AD<4>
AGP_AD<5>
AGP_AD<6>
AGP_AD<7>
AGP_AD<8>
AGP_AD<9>
AGP_AD<10>
AGP_AD<11>
AGP_AD<12>
AGP_AD<13>
AGP_AD<14>
AGP_AD<15>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<19>
AGP_AD<20>
AGP_AD<21>
AGP_AD<22>
AGP_AD<23>
AGP_AD<24>
AGP_AD<25>
AGP_AD<26>
AGP_AD<27>
AGP_AD<28>
AGP_AD<29>
AGP_AD<30>
AGP_AD<31>
AGP_CBE<0>
AGP_CBE<1>
AGP_CBE<2>
AGP_CBE<3>
AGP_PAR
AGP_FRAME_L
AGP_TRDY_L
AGP_IRDY_L
AGP_STOP_L
AGP_DEVSEL_L
AGP_SBA<0>
AGP_SBA<1>
AGP_SBA<2>
AGP_SBA<3>
AGP_SBA<4>
AGP_SBA<5>
AGP_SBA<6>
AGP_SBA<7>
AGP_SB_STB
AGP_SB_STB_L
AGP_ST<0>
AGP_ST<1>
AGP_ST<2>
AGP_AD_STB<0>
AGP_AD_STB_L<0>
AGP_AD_STB<1>
AGP_AD_STB_L<1>
AGP_PIPE_L
AGP_RBF_L
17B8<
16C3<
16C3<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17D8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
17C8<
16C3<
16B3<
16C3<
16B3<
16C1<
16C1<
16B1<
16C1<
16C1<
16C1<
16B1<
16B1<
16B3<
16B1<
16B1<
16B1<
16B3<
16B3<
54B7<
16C3<
16D1<
16B3<
16B3<
4
17B7<>
17B7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
17B8<
17B8<
17B8<
17B8<
17A8<
17A8<
17A8<
17A8<
17A8<
17A8<
17A8<
17A8<
17B8<
17B6<
17B6<
17B6<
16D1<
16D1<
17B8<
17B8<
4
54B7<
17B8<
17A8<
54B7<
54B7<
54B7<
17B8<
17B8<
54B7<
54B7<
54C7<
54C7<
54C7<
54C7<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
17B8<
17B8<
54B7<
54B7<
52C3>
54C7<
54B7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
54C7<
17A8>
54B7<
46B4<>
54B7<
54B7<
54C7<
54C7<
54C7<
54C7<
54B7<
54B7<
17B8<
17B8<
54B7<
16D1<
17A8<
17D5<
17B8<
17B8<
17B8<
17B8<
17B8<
17B8<
17B8<
17B7<>
17B7<
16B4<>
16B4<>
17B8<
16A4<>
16A4<>
AGP_BUSY_L
16C6<>
STOP_AGP_L
16C6<>
17A4<
17A3<
AGP_REQ_L
16C4<>
AGP_GNT_L
16C4<>
AGP_FRAME_L
AGP_DEVSEL_L
AGP_IRDY_L
16B4<>
AGP_TRDY_L
16B4<>
AGP_STOP_L
16B4<>
AGP_RBF_L
16A4<>
NC_RP1PIN4
AGP_PIPE_L
16A4<>
AGP_AD_STB<0>
AGP_AD_STB<1>
AGP_SB_STB
16A4<>
3
AGP PULL-UPS/PULL DOWNS
R222
1 2
R217
10K
1 2
1%
1/16W
MF
402
16D7<
16A8<
11A6<
NO_TEST
10D6<
59C8>
RP37
10K
4 5
5%
1/16W
SM1
RP37
10K
3 6
1/16W
SM1
RP98
10K
3 6
5%
1/16W
SM1
RP98
10K
1 8
5%
1/16W
SM1
RP48
10K
1 8
5%
1/16W
SM1
R580
10K
1 2
1%
1/16W
MF
402
R233
10K
1 2
1%
1/16W
MF
402
+1_5V_AGP
RP37
10K
2 7
1/16W
5%
RP98
2 7
RP98
10K
4 5
1/16W
RP37
1 8
RP48
2 7
1 2
3
+3V_MAIN
10K
1%
1/16W
MF
402
5%
SM1
10K
5%
1/16W
SM1
5%
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
R587
10K
1%
1/16W
MF
402
17B8<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
17B8<
17A8>
17A8<
17A8<
17A8<
17A8<
17A8<
17A8<
17A8<
17A8<
16A4<>
16A4<>
17A8<
16D3<
17B6<
17B6<
17B8<
17B6<
16B4<>
16B4<>
16B4<>
16B4<
16B4<>
16A4<>
16A4<>
16A4<>
16B4<>
16A4<>
16A6<>
16A4<>
54C7<
54C7<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
54B7<
APPLE COMPUTER INC.
2
12
R223
10K
AGP_AD_STB_L<0>
AGP_AD_STB_L<1>
AGP_SB_STB_L
16A4<>
AGP_BUSY_L
16C6<>
AGP_SBA<5>
AGP_SBA<1>
AGP_SBA<4>
AGP_SBA<0>
AGP_SBA<3>
AGP_SBA<7>
AGP_ST<1>
AGP_ST<2>
AGP_SBA<2>
AGP_SBA<6>
AGP_WBF_L
AGP_ST<0>
1 2
1/16W
R221
1 2
1/16W
RP99
10K
1 8
5%
1/16W
SM1
RP99
10K
3 6
5%
1/16W
SM1
RP49
10K
1 8
5%
1/16W
SM1
RP49
10K
3 6
5%
1/16W
SM1
RP50
10K
1 8
5%
1/16W
SM1
RP50
10K
3 6
5%
1/16W
SM1
402
10K
402
1%
MF
1%
MF
1 2
NOSTUFF
1 2
RP99
10K
2 7
1/16W
RP99
10K
4 5
1/16W
RP49
10K
2 7
5%
1/16W
SM1
RP49
10K
4 5
1/16W
RP50
10K
2 7
1/16W
RP50
10K
4 5
5%
1/16W
SM1
INTREPID AGP
NOTICE OF PROPRIETARY PROPERTY
LAST_MODIFIED=Wed Sep 17 12:16:00 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
051-6497
NONE
SHT
16
1
SCALE
R234
10K
1%
1/16W
MF
402
R161
10K
1%
1/16W
MF
402
5%
SM1
5%
SM1
5%
SM1
5%
SM1
OF
D
C
B
A
REV.
13
69
DRAWING
TRST*
TDO
TDI
TMS
TCLK
AGPCALPU
AGP 2X,4X : AGP 8X
PCIC0/BE0* : C0*/BE0
PCIC1/BE1* : C1*/BE1
PCIC2/BE2* : C2*/BE2
PCIC3/BE3* : C3*/BE3
PCIRST* : RST*
PCICLK : CLK
AGPVDDQ
VD50CLAMP0
VD50CLAMP1
50 OHM
TO VDDQ
50 OHM
10K OHM
TO GND
TESTMODE
AGPVREF : AGPVREF
AGPSTOP* : STOP*
AGPBUSY* : BUSY*
AGPST2 : ST2
AGPST1 : ST1
AGPST0 : ST0
PCIINTA* : INTA
PCITRDY* : TRDY
PCIPAR : PAR
PCISTOP* : STOP
PCIDEVSEL* : DEVSEL
PCIIRDY* : IRDY
PCIFRAME* : FRAME
PCIGNT* : GNT
PCIREQ* : REQ
PCIAD1
PCIAD2
PCIAD3
PCIAD4
PCIAD5
PCIAD0
PCIAD6
PCIAD7
PCIAD8
PCIAD12
PCIAD11
PCIAD10
PCIAD9
PCIAD16
PCIAD17
PCIAD18
PCIAD13
PCIAD14
PCIAD15
PCIAD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD28
PCIAD27
PCIAD24
PCIAD25
PCIAD26
PCIAD31
PCIAD30
PCIAD29
(1 OF 5)
AGPRBF* : RBF
AGPWBF* : WBF
<RESRVD> : DBI_LO
AGPSBA7 : SBA7*
AGPSBA6 : SBA6*
AGPSBA5 : SBA5*
AGPSBA0 : SBA0*
AGPSBA1 : SBA1*
AGPSBA2 : SBA2*
AGPSBA3 : SBA3*
AGPSBA4 : SBA4*
<RESRVD> : MBDET*
TO GND
AGPPIPE* : DBI_HI
NC_PCIINTB*: INTB
AGPADSTBF1 : ADSTBF1
AGPSBSTBF : SBSTBF
AGPSBSTBS* : SBSTBS
AGPADSTBF0 : ADSTBF0
AGPADSTBS0* : ADSTBS0
AGPADSTBS1* : ADSTBS1
NC
VDD
VDD33
AGPCALPD
AGP_PLLVDD
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CORE BYPASS
(LOW = AGP V3.X)
AGP VERSION SELECT
ALL ARE NO_TEST
OUTPUT DRIVER BYPASS
NVIDIA AGP
I/O BYPASS
GPU AGP I/O REFERENCE
(PLACE CLOSE TO INTREPID AGP BALLS)
(HIGH = AGP V2.X)
MF
49.9
1%
402
1/16W
+3V_MAIN
+5V_MAIN
SM1
1/16W
5%
22
49.9
1/16W
402
MF
1%
22
5%
SM1
1/16W
22
5%
1/16W
SM1
22
SM1
1/16W
5%
22
5%
1/16W
SM1
22
SM1
1/16W
5%
22
SM1
1/16W
5%
22
SM1
1/16W
5%
22
1/16W
5%
SM1
22
SM1
1/16W
5%
22
SM1
1/16W
5%
22
SM1
1/16W
5%
22
SM1
1/16W
5%
22
SM1
1/16W
5%
22
5%
1/16W
SM1
22
GPU_AGP_SB_STB_L
22
10K
402
MF
1/16W
1%
10UF
Y5V
10V
N20P80%
805
10UF
Y5V
10V
N20P80%
805
10UF
Y5V
10V
N20P80%
805
10UF
Y5V
10V
N20P80%
805
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
CERM
0.1UF
402
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.01UF
10%
402
CERM
16V
0.01UF
10%
402
CERM
16V
0.1UF
402
CERM
10V
20%
16V
CERM
402
10%
0.01UF
16V
CERM
402
10%
0.01UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
CERM
402
10V
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
0.01UF
10%
402
CERM
16V 16V
0.01UF
10%
402
CERM
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
402
CERM
10V
20%
16V
CERM
402
10%
0.01UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
16V
CERM
402
10%
0.01UF
Y5V
805
N20P80%
10V
10UF
16V
CERM
402
10%
0.01UF
16V
CERM
402
10%
0.01UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
0.1UF
402
20%
10V
CERM
0.1UF
402
10V
20%
CERM
1%
10
402
MF
1/16W
+3V_MAIN
CERM
50V
10%
402
0.001UF
20%
10V
CERM
402
0.1UF4.7UF
805
CERM
10V
N20P80%
10K
402
10K
402
NV18B
BGA
82.5
1%
1/16W
MF
402
10%
50V
CERM
402
470PF
4.99K
1%
1/16W
MF
402
82.5
402
MF
1/16W
1%
4.99K
MF
1/16W
1%
402
470PF
10%
50V
CERM
402
+3V_MAIN
402
0
5%
0
5%
402
TMDS_XMIT_SI_P
MF
1/16W
1%
10K
402
NV34
10K
1%
1/16W
MF
402
NV34
+3V_MAIN
1%
MF
1/16W
10K
402
17 69
051-6497
13
GRAPH_CORE
MIN_LINE_WIDTH=20
MIN_LINE_WIDTH=20
MIN_LINE_WIDTH=20
GPU_AGP_VREF
STOP_AGP_L
AGP_BUSY_L
AGP_SB_STB_L
AGP_AD_STB<0>
AGP_AD_STB_L<1>
AGP_AD_STB<1>
AGP_AD_STB_L<0>
AGP_RESET_L
MAIN_RESET_L
NV_PCI_RST_L
CLK66M_GPU_AGP
GPU_AGP_CBE<2>
NO_TEST
GPU_AGP_CBE<1>
GPU_AGP_CBE<0>
NO_TEST
GPU_AGP_AD<31>
AGP_REQ_L
AGP_GNT_L
AGP_AD<30>
NO_TEST
GPU_AGP_AD<25>
AGP_FRAME_L
NO_TEST
AGP_AD_STB_L_GPUUF<0>
NO_TEST
AGP_AD_STB_GPUUF<1>
GPU_AGP_SB_STB
GPU_AGP_DEVSEL_L
NO_TEST
GPU_AGP_TRDY_L
NC_GPU<2>
NC_GPU<0>
AGP_ST<2>
AGP_ST<1>
AGP_ST<0>
AGP_INT_L
GPU_AGP_STOP_L
NO_TEST
NO_TEST
GPU_AGP_IRDY_L
GPU_AGP_FRAME_L
NO_TEST
GPU_AGP_PAR
NO_TEST
GPU_AGP_AD<4>
AGP_AD<5>
AGP_AD<7>
GPU_AGP_AD<1>
NO_TEST
NO_TEST
GPU_AGP_AD<2>
NO_TEST
GPU_AGP_AD<3>
GPU_AGP_AD<8>
NO_TEST
GPU_AGP_AD<11>
NO_TEST
GPU_AGP_AD<9>
NO_TEST
GPU_AGP_AD<10>
GPU_AGP_AD<13>
NO_TEST
GPU_AGP_AD<7>
GPU_AGP_CBE<3>
NO_TEST
AGP_AD<2>
GPU_AGP_AD<5>
NO_TEST
AGP_SBA<5>
AGP_SBA<4>
AGP_SBA<6>
AGP_SBA<7>
AGP_SBA<0>
AGP_SBA<1>
AGP_SBA<2>
AGP_SBA<3>
AGP_SB_STB
AGP_AD_STB_GPUUF<0>
GPU_AGP_PIPE_L
NO_TEST
GPU_AGP_WBF_L
AGP_RBF_L
AGP_PIPE_L
AGP_WBF_L
AGP_DEVSEL_L
AGP_STOP_L
AGP_PAR
AGP_IRDY_L
AGP_TRDY_L
AGP_CBE<2>
AGP_AD<31>
AGP_AD<29>
AGP_AD<28>
AGP_AD<27>
AGP_AD<24>
AGP_AD<23>
AGP_AD<22>
AGP_AD<21>
AGP_AD<20>
AGP_AD<19>
AGP_AD<17>
AGP_AD<18>
NC_GPU_DBI_LO
NC_GPU<1>
NC_GPU<3>
NC_GPU<4>
NC_GPU_INTB_L
NVAGP_TCLK
NVAGP_TRST_L
GPU_50PULLDWN
AGP_AD<15>
AGP_AD<14>
AGP_AD<13>
AGP_AD<12>
AGP_AD<11>
AGP_AD<10>
AGP_AD<9>
AGP_AD<8>
AGP_AD<4>
AGP_AD<6>
AGP_AD<3>
AGP_AD<1>
AGP_AD<0>
NO_TEST
AGP_AD_STB_L_GPUUF<1>
GPU_AGP_RBF_L
NO_TEST
NC_NVAGP_TDO
GPU_50PULLUP
+1_5V_AGP
GPU_AGP_SBA<0>
NO_TEST
GPU_AGP_SBA<1>
NO_TEST
GPU_AGP_SBA<2>
NO_TEST
GPU_AGP_SBA<3>
GPU_AGP_SBA<4>
NO_TEST
GPU_AGP_SBA<5>
NO_TEST
GPU_AGP_SBA<6>
NO_TEST
GPU_AGP_SBA<7>
GPU_AGP_AD<6>
NO_TEST
GPU_AGP_AD<12>
GPU_AGP_AD<17>
NO_TEST
NO_TEST
GPU_AGP_AD<19>
GPU_AGP_AD<20>
GPU_AGP_AD<21>
GPU_AGP_AD<22>
NO_TEST
NO_TEST
GPU_AGP_AD<23>
GPU_AGP_AD<24>
GPU_AGP_AD<28>
NO_TEST
GPU_AGP_AD<29>
AGP_AD<26>
NO_TEST
GPU_AGP_AD<27>
GPU_AGP_AD<30>
NO_TEST
AGP_CBE<3>
NVAGP_TDI
NVAGP_TMS
NO_TEST
GPU_AGP_AD<26>
NO_TEST
GPU_AGP_AD<15>
NO_TEST
GPU_AGP_AD<14>
GPU_AGP_AD<18>
NO_TEST
GPU_AGP_AD<16>
AGP_PLLVDD
GPU_AGP_VREF_X
GPU_AGP_VREF_Y
+1_5V_AGP
GPU_AGP_VREF
GPU_AGP_AD<0>
AGP_CBE<1>
AGP_CBE<0>
+1_5V_AGP
MIN_LINE_WIDTH=20
AGP_AD<16>
AGP_AD<25>
GPU_MBDET_L
GPU_TMODE
<XR_PAGE_TITLE>
R160
1
2
RP33
1
2
3
4
8
7
6
5
R169
1
2
RP40
1
2
3
4
8
7
6
5
RP30
1
2
3
4
8
7
6
5
RP32
1
2
3
4
8
7
6
5
RP42
1
2
3
4
8
7
6
5
RP31
1
2
3
4
8
7
6
5
RP41
1
2
3
4
8
7
6
5
RP44
1
2
3
4
8
7
6
5
RP34
1
2
3
4
8
7
6
5
RP43
1
2
3
4
8
7
6
5
RP45
1
2
3
4
8
7
6
5
RP35
1
2
3
4
8
7
6
5
RP46
1
2
3
4
8
7
6
5
RP47
1
2
3
4
8
7
6
5
RP36
1
2
3
4
8
7
6
5
R558
1 2
R210
1 2
R168
1
2
C93
1
2
C94
1
2
C161
1
2
C168
1
2
C178
1
2
C201
1
2
C202
1
2
C185
1
2
C203
1
2
C183
1
2
C176
1
2
C200
1
2
C192
1
2
C180
1
2
C104
1
2
C134
1
2
C117
1
2
C109
1
2
C100
1
2
C101
1
2
C103
1
2
C110
1
2
C139
1
2
C99
1
2
C146
1
2
C148
1
2
C149
1
2
C150
1
2
C147
1
2
C118
1
2
C135
1
2
C169
1
2
C140
1
2
C120
1
2
C102
1
2
C151
1
2
C177
1
2
C184
1
2
C129
1
2
C136
1
2
C116
1
2
C87
1
2
C111
1
2
C137
1
2
C91
1
2
C97
1
2
C187
1
2
C179
1
2
C105
1
2
C112
1
2
C181
1
2
C182
1
2
C188
1
2
C193
1
2
C186
1
2
R198
1 2
C217
1
2
C219
1
2
C223
R80
1 2
R72
1 2
U39
AK24
AG21
AJ25
AF21
AF12
AA13
AA14
AJ19
AF16
AJ18
AG14
AJ11
AH11
AJ12
AH12
AJ14
AH14
AJ15
AH15
AK13
AJ13
AG13
AE16
AE13
AG11
AE14
AD17
AE11
AE17
AE20
AE23
AD11
AD14
AD23
AD20
AK29
AG17
AE12
A1
AK30
G6R7T7
AE10
AJ28
AK28
AH22
AJ22
AJ21
AK21
AH20
AJ20
AG26
AE24
AG25
AG24
AH27
AF24
AG23
AE22
AF22
AE21
AG20
AG19
AF19
AE19
AF18
AK27
AG18
AE18
AJ27
AH26
AJ26
AH25
AH23
AJ23
AJ24
AH19
AF25
AG22
AG12
AJ16
AK16
AE15
AG15
AG16
AK18
AF13
AF15
AH17
AJ17
C2D1E2
AE5
C1
D2
N4
AE9
AA17
AA18
L11
N11
P11
U11
V11
Y11
L14
Y14
L17
Y17
L20
L18
Y18
Y20
H6
AC6
AC7
AD12
P24
U7
G14
U6
AD15
H7
AD16
AD19
AD22
L13
Y13
N20
P20
U20
V20
R192
1
2
C214
1 2
R195
1
2
R193
1
2
R196
1
2
C215
1 2
R1026
1 2
R1027
1 2
R1024
1
2
R1025
1
2
R177
1
2
LAST_MODIFIED=Wed Sep 17 12:16:02 2003
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NC_FBADQS7*
NC_FBADQS6*
NC_FBADQS5*
NC_FBADQS0*
NC_FBADQS1*
NC_FBADQS2*
NC_FBADQS3*
NC_FBADQS4*
FBVDDQ
FBAA12
FBABA0
FBABA1
FBAA11
FBADQM7
FBADQM6
FBADQM5
FBADQM4
FBADQM3
FBADQM2
FBADQM1
FBADQM0
FBAD63
FBAD62
FBAD61
FBAD60
FBAD59
FBAD58
FBAD57
FBAD56
FBAD55
FBAD54
FBAD53
FBAD52
FBAD51
FBAD50
FBAD49
FBAD48
FBAD47
FBAD46
FBAD45
FBAD44
FBAD43
FBAD42
FBAD41
FBAD40
FBAD39
FBAD38
FBAD37
FBAD36
FBAD35
FBAD34
FBAD33
FBAD32
FBAD31
FBAD30
FBAD29
FBAD28
FBAD27
FBAD26
FBAD25
FBAD24
FBAD23
FBAD22
FBAD21
FBAD20
FBAD19
FBAD18
FBAD17
FBAD16
FBAD15
FBAD14
FBAD13
FBAD12
FBAD11
FBAD10
FBAD9
FBAD8
FBAD7
FBAD6
FBAD5
FBAD4
FBAD3
FBAD2
FBAD1
FBAD0
ROMCS*
ROMA15
(3 OF 5)
FBAA6
FBAA0
FBAA2
FBAA4
FBAA1
FBAA5
FBAA3
FBAA7
FBAA10
FBAA8
FBAA9
FBARAS*
FBVREF
FBACS1*
FBACS0*
FBAWE*
FBACAS*
ROMA14
NC_VTT
GND
FB_DLLVDD
FBCAL_CLK_GND
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBACKE
FBACLK1*
FBACLK0
FBACLK0*
FBACLK1
FBADQS4
FBADQS3
FBADQS2
FBADQS1
FBADQS0
FBADQS5
FBADQS6
FBADQS7
FBCDQM7
FBCDQM6
FBCDQM5
FBCDQM4
FBCDQM3
FBCDQM2
FBCDQM1
FBCDQM0
THERMAL GND
(4 OF 5)
FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD63
FBCD61
FBCD24
FBCD62
FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11
FBBCLK1*
FBBCLK0*
FBBCLK0
FBBCLK1
FBCBA0
FBCBA1
FBCA12
FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7
NC_FBCDQS4*
NC_FBCDQS3*
NC_FBCDQS2*
NC_FBCDQS1*
NC_FBCDQS0*
NC_FBCDQS5*
NC_FBCDQS7*
NC_FBCDQS6*
FBCCKE
FBCRAS*
FBCCAS*
FBCWE*
FBCCS0*
FBCCS1*
DRAWING
REV.
DRAWING NUMBER
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
NOTICE OF PROPRIETARY PROPERTY
OFSHT
NONE
SCALE
E
SIZE
APPLE COMPUTER INC.
H
G
1
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E
234
D
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B
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14 3 2
567
H
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7 6 5
D
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8
RECOMMENDED BY NVIDIA
OTHER R’S BETWEEN GPU & MEMORY
DQM R’S CLOSE TO GPU
WEAK PULL-DOWN
WEAK PULL-DOWN
RECOMMENDED BY NVIDIA
EVENLY DISTRIBUTE 0.01UF & 0.1 UF CAPS
AMONGST FBVDDQ PINS ON NV ASIC
NVIDIA FRAME BUFFER
NVIDIA VREF
0.1UF
402
10V
CERM
20%
22
SM1
5%
1/16W
NV34
22
SM1
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1/16W
NV34
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1/16W
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1/16W
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NV34
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1/16W
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402
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1/16W5%402
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0
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1/16W
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0
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1/16W
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1/16W
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49.9
402
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49.9
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402
549
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402
0
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1/16W
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402
NOSTUFF
0
5%
1/16W
MF
402
+2_5V_MAIN
5%
1/16W
MF
402
0
0.1UF
20%
10V
CERM
402
0.1UF
20%
CERM
10V
402
402
MF
1/16W
1%
1K
1K
1%
1/16W
MF
402
100PF
5%
CERM
50V
402
NOSTUFF
TLV431A
SOT
NOSTUFF
+3V_MAIN
0.001UF
CERM
50V
10%
402
0.1UF
20%
10V
CERM
402
4.7UF
CERM
10V
N20P80%
805
0
402
5%
1/16W
MF
0
402
5%
1/16W
MF
0
402
5%
1/16W
MF
0
402
5%
1/16W
MF
0
402
5%
1/16W
MF
0
MF
1/16W5%402
NV34
0
MF5%
402
1/16W
NV34
0
MF5%
402
1/16W
NV34
0
402
5%
1/16W
MF
NV34
0
402
5%
1/16W
MF
NV34
0
5%
1/16W
MF
402
22
1/16W
5%
SM1
NV34
22
SM1
5%
1/16W
NV34
22
1/16W
5%
SM1
NV34
22
SM1
5%
1/16W
NV34
22
1/16W
5%
SM1
NV34
22
SM1
5%
1/16W
NV34
22
SM1
5%
1/16W
NV34
22
1/16W
5%
SM1
NV34
22
1/16W
5%
SM1
NV34
22
1/16W
5%
SM1
22
1/16W
5%
SM1
22
1/16W
5%
SM1
22
1/16W
5%
SM1
NV18B
BGA
NV18B
BGA
10
402
1/16W
1%
MF
0.1UF
402
CERM
10V
20%
0.1UF
20%
10V
CERM
402
0.1UF
20%
CERM
10V
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
CERM
10V
402
0.1UF
402
CERM
10V
20%
0.01UF
16V
CERM
402
10%
0.1UF
20%
CERM
10V
402
0.1UF
20%
CERM
10V
402
0.1UF
20%
CERM
10V
402
0.1UF
20%
CERM
10V
402
0.01UF
CERM
16V
402
10%
0.01UF
16V
CERM
402
10%
0.1UF
402
CERM
10V
20%
0.01UF
10%
402
CERM
16V
0.1UF
402
CERM
10V
20%
0.1UF
402
10V
CERM
20%
0.01UF
10%
402
CERM
16V
0.1UF
402
10V
CERM
20%
0.1UF
402
10V
CERM
20%
0.01UF
10%
402
CERM
16V
69
051-6497
13
18
FBDQM<10>
FBDQM<11>
FBDQM<12>
RFBDQM<11>
RFBDQM<12>
RFBDQM<10>
FBDQM<9>
RFBACAS_L
NO_TEST
RFBARAS_L
NO_TEST
RFBDQM<8>
RFBDQM<9>
RFBBCS0_L
FBD<77>
FBD<89>
FBD<88>
FBD<86>
NC_FBDQS_L<12>
NO_TEST
NO_TEST
NC_RFBA<12>
NO_TEST
NC_RFBBA<12>
NC_VTT<0>
NO_TEST
NC_VTT<1>
NO_TEST
NC_VTT<2>
NO_TEST
NC_VTT<3>
NO_TEST
NC_VTT<4>
NO_TEST
NC_VTT<5>
NO_TEST
NC_VTT<6>
NO_TEST
NC_VTT<7>
NO_TEST
NC_VTT<8>
NO_TEST
NC_VTT<9>
NO_TEST
NC_VTT<10>
NO_TEST
NC_VTT<11>
NO_TEST
FBDQS<0>
FBDQS<1>
FBDQS<2>
FBDQS<6>
FBDQS<5>
FBDQS<7>
FBDQS<4>
FBDQS<3>
FBACLK0
FBACLK0_L
FBACLK1_L
FBACLK1
FBACKE
FBCAL_CLK_GND
FB_DLLVDD
FB_DLLVDD
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
ROMA15
TESTPOINT
ROMA14
TESTPOINT
NC_ROMCS_L
TESTPOINT
GPU_FB_VREF
NC_FBACS1_L
TESTPOINT
FBACS0_L
FBAWE_L
FBACAS_L
FBARAS_L
FBD<0>
FBD<1>
FBD<2>
FBD<3>
FBD<4>
FBD<5>
FBD<6>
FBD<7>
FBD<8>
FBD<9>
FBD<10>
FBD<11>
FBD<12>
FBD<13>
FBD<14>
FBD<15>
FBD<16>
FBD<17>
FBD<18>
FBD<19>
FBD<20>
FBD<21>
FBD<22>
FBD<23>
FBD<24>
FBD<25>
FBD<26>
FBD<27>
FBD<28>
FBD<29>
FBD<30>
FBD<31>
FBD<32>
FBD<33>
FBD<34>
FBD<35>
FBD<36>
FBD<37>
FBD<38>
FBD<39>
FBD<40>
FBD<41>
FBD<43>
FBD<44>
FBD<45>
FBD<46>
FBD<47>
FBD<48>
FBD<49>
FBD<50>
FBD<51>
FBD<52>
FBD<53>
FBD<54>
FBD<55>
FBD<56>
FBD<57>
FBD<58>
FBD<59>
FBD<60>
FBD<61>
FBD<62>
FBD<63>
FBD<42>
FBDQM<0>
FBDQM<1>
FBDQM<2>
FBDQM<3>
FBDQM<4>
FBDQM<5>
FBDQM<6>
FBDQM<7>
FBABA<1>
FBABA<0>
NC_FBDQS_L<2>
NC_FBDQS_L<1>
NC_FBDQS_L<0>
NC_FBDQS_L<4>
NC_FBDQS_L<3>
NC_FBDQS_L<5>
NC_FBDQS_L<6>
NC_FBDQS_L<7>
FBDQM<15>
FBDQM<14>
FBDQM<13>
FBDQM<12>
FBDQM<11>
FBDQM<10>
FBDQM<9>
FBDQM<8>
FBD<72>
FBD<73>
FBD<74>
FBD<75>
FBD<76>
FBD<78>
FBD<79>
FBD<80>
FBD<81>
FBD<82>
FBD<83>
FBD<84>
FBD<85>
FBD<87>
FBD<90>
FBD<91>
FBD<92>
FBD<93>
FBD<94>
FBD<95>
FBD<96>
FBD<97>
FBD<98>
FBD<99>
FBD<100>
FBD<101>
FBD<102>
FBD<103>
FBD<104>
FBD<105>
FBD<106>
FBD<107>
FBD<108>
FBD<109>
FBD<110>
FBD<111>
FBD<112>
FBD<113>
FBD<114>
FBD<115>
FBD<116>
FBD<117>
FBD<118>
FBD<119>
FBD<120>
FBD<121>
FBD<122>
FBD<123>
FBD<125>
FBD<126>
FBD<127>
FBD<71>
FBD<70>
FBD<69>
FBD<68>
FBD<67>
FBD<66>
FBD<65>
FBD<64>
FBBBA<0>
FBBBA<1>
FBBCLK0
FBBCLK0_L
FBBCLK1_L
FBBCLK1
FBDQS<8>
FBDQS<9>
FBDQS<10>
FBDQS<11>
FBDQS<12>
FBDQS<13>
FBDQS<14>
FBDQS<15>
NC_FBDQS_L<9>
NC_FBDQS_L<10>
NC_FBDQS_L<8>
NC_FBDQS_L<11>
NC_FBDQS_L<15>
NC_FBDQS_L<14>
NC_FBDQS_L<13>
FBBCAS_L
FBBRAS_L
TESTPOINT
NC_FBBCS1_L
FBBWE_L
FBBCS0_L
FBBCKE
FBACKE
RFBACKE
RFBABA<1>
FBABA<1>
RFBA<10>
RFBA<8>
RFBA<6>
RFBABA<0>
FBABA<0>
RFBA<11>
RFBA<9>
RFBA<7>
RFBA<5>
RFBA<2>
RFBA<4>
RFBA<0>
RFBACS0_L
NO_TEST
FBACS0_L
RFBA<3>
RFBA<1>
RFBAWE_L
FBAWE_L
FBARAS_L
FBACAS_L
FBDQM<6>
RFBDQM<6>
FBDQM<2>
RFBDQM<2>
FBDQM<4>
RFBDQM<4>
FBDQM<0>
RFBDQM<0>
FBDQM<7>
RFBDQM<7>
FBDQM<5>
RFBDQM<5>
FBDQM<3>
RFBDQM<3>
FBDQM<1>
RFBDQM<1>
RFBBBA<1>
FBBBA<1>
RFBBA<10>
RFBBA<6>
RFBBA<8>
FBBCKE
RFBBCKE
RFBBBA<0>
FBBBA<0>
RFBBA<11>
RFBBA<9>
RFBBA<7>
RFBBA<5>
RFBBA<4>
RFBBA<0>
RFBBA<2>
RFBBCAS_L
FBBCAS_L
FBDQM<14>
RFBDQM<14>
FBBCS0_L
FBDQM<8>
RFBBA<3>
RFBBA<1>
RFBBRAS_L
NO_TEST
FBBRAS_L
RFBBWE_L
FBBWE_L
FBDQM<15>
RFBDQM<15>
FBDQM<13>
RFBDQM<13>
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_CLK_GND
MEMREFN1
NO_TEST
FBBA<0>
FBBA<0>
FBBA<1>
FBBA<1>
FBBA<2>
FBBA<2>
FBBA<3>
FBBA<3>
FBBA<4>
FBBA<4>
FBBA<5>
FBBA<5>
NO_TEST
FBBA<6>
FBBA<6>
FBBA<7>
FBBA<7>
FBBA<8>
FBBA<8>
FBBA<9>
FBBA<9>
FBBA<10>
FBBA<10>
FBBA<11>
FBBA<11>
FBBA<12>
FBBA<12>
FBA<0>
FBA<0>
FBA<1>
NO_TEST
FBA<1>
FBA<2>
FBA<2>
NO_TEST
FBA<3>
FBA<3>
FBA<4>
FBA<4>
FBA<5>
FBA<5>
NO_TEST
FBA<6>
FBA<6>
FBA<7>
FBA<7>
FBA<8>
FBA<8>
FBA<9>
FBA<9>
FBA<10>
FBA<10>
NO_TEST
FBA<11>
FBA<11>
FBA<12>
FBA<12>
FBD<124>
MEMREFN2
<XR_PAGE_TITLE>
C145
1
2
C96
1
2
C89
1
2
C80
1
2
C159
1
2
C167
1
2
C133
1
2
C98
1
2
C86
1
2
C84
1
2
C73
1
2
C81
1
2
C72
1
2
C78
1
2
C90
1
2
C75
1
2
C82
1
2
C79
1
2
C115
1
2
C175
1
2
C199
1
2
C83
1
2
RP84
1 8
RP85
3 6
RP8
1 8
RP8
3 6
RP8
2 7
RP8
4 5
R61
1
2
R62
12
R54
1
2
R58
1
2
R70
1
2
RP9
1 8
RP9
2 7
RP9
3 6
RP9
4 5
C95
1
2
C124
1
2
RP22
2 7
R90
1 2
R164
1 2
R154
1 2
RP22
1 8
RP22
3 6
RP94
3 6
RP22
4 5
RP95
1 8
RP95
3 6
RP94
2 7
RP94
4 5
RP95
2 7
RP95
4 5
RP23
1 8
RP23
3 6
R130
12
RP23
2 7
RP23
4 5
R131
1
2
C62
1
2
R71
1
2
R95
1
2
R88
1
2
R49
1 2
R50
1 2
R36
1
2
C54
1
2
C509
1
2
R41
1
2
R463
1
2
C510
1
2
U7
5
3
4
C69
1
2
C70
1
2
C61
1
2
R117
1 2
R111
1 2
R84
1 2
R155
1 2
R143
1 2
R64
1 2
R66
1 2
R67
1 2
R56
1 2
R59
1 2
ZT22
1
ZT23
1
ZT34
1
ZT24
1
ZT25
1
ZT37
1
ZT26
1
ZT27
1
ZT38
1
ZT36
1
ZT33
1
ZT35
1
ZT21
1
ZT32
1
ZT29
1
ZT20
1
ZT31
1
ZT30
1
ZT28
1
ZT6
1
ZT8
1
ZT11
1
ZT10
1
ZT12
1
ZT17
1
ZT14
1
ZT16
1
ZT18
1
ZT15
1
ZT9
1
ZT13
1
ZT4
1
ZT7
1
ZT3
1
ZT2
1
ZT19
1
R83
1
2
ZT1
1
ZT5
1
RP85
4 5
RP85
2 7
RP84
2 7
RP84
3 6
RP84
4 5
RP83
1 8
RP83
4 5
RP83
2 7
RP83
3 6
RP93
1 8
RP93
2 7
RP93
3 6
RP93
4 5
U39
V30
U28
R25
R30
U24
U29
T28
T29
T27
T30
T26
T25
R27
R26
R29
P29
N30
U21
V21
N21
P21
U27
P27
N25
N27
M28
L29
J29
J28
H29
G30
K25
J26
J25
G26
N26
F28
F26
E27
D27
H28
G29
F29
E29
C30
C29
M25
B30
A30
AJ29
AJ30
AH29
AH30
AF29
AE29
AD29
AC28
K26
AG28
AF27
AE26
AE28
AD25
AB25
AB26
AA25
AD30
AC29
K27
AB28
AB29
Y29
W28
W29
V29
AC27
AB27
AA27
AA26
J27
W25
V26
V27
V25
H27
N29
M29
L27
K29
G25
E28
AF28
AD27
AA30
Y27
M27
K30
G27
D30
AG30
AD26
AA29
W27
P28
R28
E3
F5
E4
D3
F17
G11
Y24
L24
G20
G23
H24
AC24
H25
P25
U25
AC25
G8
F8
L25
Y25
F11
F14
F20
F23
C28
C27
A25
AD28
AH18
F25
C18
E14
AF8
Y8
K3
G3
F6
AK25
AF17
AF23
AH24
AH28
AG27
AF26
AF14
AH13
L8
P26
AA5
G28
K28
N28
V28
AA28
F30
J30
M30
W30
AB30
AF20
AE30
H26
L26
Y26
AC26
E17
D28
C7
E8
A9
AH16
C10
E11
C13
E20
C21
E23
C24
A6
A12
AH10
AK15
AK12
C3
D4
E5
AG4
AH3
AK6
AH7
AF5
AE6
AF11
AK9
N3
H11
AC11
H20
AC20
L23
Y23
F1
J1
AH21
M1
T1
W1
AB1
AE1
A19
AK19
A22
AK22
K5
U26
J7
AE25
M26
L28
F27
D29
AG29
AE27
Y28
W26
G9
G12
W24
AB24
G15
G16
G19
G22
J24
M24
R24
T24
R2
R1
AF2
U39
K18
K17
K13
K14
A18
C17
F15
A15
G17
B17
C16
B16
D16
A16
E16
F16
D15
E15
B15
B14
A13
D17
D14
F13
D13
C12
B11
B9
C9
B8
A7
F10
E9
F9
F7
E13
C6
E6
D5
C4
C8
B7
B6
B5
A3
B3
F12
A2
B2
B29
A29
B28
A28
B26
B25
B24
C23
E10
E26
D26
E25
C25
E24
F22
E22
F21
A24
B23
D10
C22
B22
B20
C19
B19
B18
D23
D22
D21
E21
D9
F19
E18
D18
F18
D8
B13
B12
D11
B10
D7
C5
C26
F24
B21
D20
D12
A10
E7
A4
A27
D24
A21
D19
C14
C15
E12
C11
D6
B4
B27
D25
C20
E19
N13
U14
V14
W14
M15
N15
P15
R15
T15
U15
V15
P13
W15
M16
N16
P16
R16
T16
U16
V16
W16
M17
U13
N17
P17
R17
T17
U17
V17
W17
M18
N18
P18
V13
R18
T18
U18
V18
W18
M19
N19
P19
R19
T19
M14
U19
V19
W19
P12
N12
V12
U12
M12
R12
T12
N14
W12
M13
R13
T13
W13
P14
R14
T14
R52
1 2
LAST_MODIFIED=Wed Sep 17 12:16:07 2003
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DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE 100OHM TERM AT RAM
PLACE 100OHM TERM AT RAM
PLACE R’S CLOSE TO GPU
PLACE 100OHM TERM AT RAM
PLACE 100OHM TERM AT RAM
PLACE THESE R CLOSE TO SGRAM PLACE THESE R CLOSE TO SGRAM
FB TERMINATION
PLACE THESE R CLOSE TO GPU PLACE THESE R CLOSE TO GPU
PLACE R’S BETWEEN GPU & MEMORY
15
15
15
15
15
15
15
15
15
15
402
1%
1/16W
MF
15
MF
1/16W
1%
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15
402
1%
1/16W
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15
MF
1/16W
1%
402
0
5%
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1/16W
402
0
5%
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1/16W
402
15
402
1%
1/16W
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15
402
1%
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15
402
1%
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15
402
1%
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15
402
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15
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402
1/16W
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15
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0
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15
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0
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15
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15
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15
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15
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15
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15
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15
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15
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15
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15
15
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0
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402
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15
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100
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100
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100
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15
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15
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15
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15
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15
6919
13
051-6497
FBBCLK1_L
RFBBCLK1
FBACLK0_L
FBBCLK1FBD<98>
NO_TEST
RFBD<117>
RFBD<108>
RFBD<111>
FBD<113>
NO_TEST
FBD<115>
NO_TEST
FBD<114>
NO_TEST
FBD<116>
FBD<117>
NO_TEST
FBD<118>
NO_TEST
FBD<119>
NO_TEST
FBD<120>
FBD<121>
NO_TEST
FBD<101>
FBD<102>
NO_TEST
FBD<105>
NO_TEST
FBD<23>
NO_TEST
FBD<19>
NO_TEST
FBD<17>
NO_TEST
FBD<18>
NO_TEST
RFBD<18>
RFBD<4>
RFBD<3>
RFBD<2>
FBD<1>
NO_TEST
RFBD<127>
RFBD<126>
RFBD<125>
RFBD<123>
RFBD<124>
RFBD<122>
RFBD<121>
RFBD<120>
RFBD<119>
RFBD<118>
RFBD<115>
RFBD<116>
RFBD<114>
RFBD<113>
RFBD<112>
RFBD<110>
RFBD<107>
RFBD<109>
RFBD<106>
RFBD<105>
RFBD<104>
RFBD<103>
RFBD<102>
RFBD<100>
RFBD<101>
RFBD<99>
RFBD<97>
RFBD<98>
RFBD<96>
RFBD<63>
RFBD<62>
RFBD<60>
RFBD<61>
RFBD<59>
RFBD<58>
RFBD<57>
RFBD<56>
RFBD<55>
RFBD<53>
RFBD<52>
RFBD<54>
RFBD<51>
NO_TEST
RFBD<50>
RFBD<47>
RFBD<49>
RFBD<48>
RFBD<46>
RFBD<45>
RFBD<43>
RFBD<42>
RFBD<44>
RFBD<41>
RFBD<40>
RFBD<39>
RFBD<37>
RFBD<38>
RFBD<36>
RFBD<35>
RFBD<34>
RFBD<33>
RFBD<32>
RFBBCLK0_L
FBBCLK0_L
RFBBCLK0
FBBCLK0
RFBBCLK1_L
RFBACLK0_L
RFBACLK0
FBACLK0
RFBACLK1_L
FBACLK1_L
RFBACLK1
FBACLK1
RFBDQS<9>
RFBDQS<10>
RFBDQS<11>
RFBDQS<13>
RFBDQS<14>
RFBDQS<15>
RFBDQS<12>
RFBDQS<8>
FBDQS<15>
FBDQS<14>
FBDQS<9>
FBDQS<11>
FBDQS<13>
FBDQS<12>
FBDQS<10>
FBDQS<8>
RFBDQS<7>
RFBDQS<5>
RFBDQS<6>
RFBDQS<3>
RFBDQS<4>
RFBDQS<2>
RFBDQS<1>
RFBDQS<0>
FBDQS<5>
FBDQS<7>
FBDQS<6>
FBDQS<3>
FBDQS<1>
FBDQS<4>
FBDQS<2>
FBDQS<0>
FBDQSTERM<15>
NO_TEST
FBDQSTERM<14>
NO_TEST
FBDQSTERM<13>
NO_TEST
FBDQSTERM<11>
NO_TEST
FBDQSTERM<12>
NO_TEST
FBDQSTERM<10>
NO_TEST
FBDQSTERM<9>
NO_TEST
FBDQSTERM<8>
NO_TEST
FBDQSTERM<7>
NO_TEST
FBDQSTERM<6>
NO_TEST
FBDQSTERM<1>
NO_TEST
FBDQSTERM<4>
NO_TEST
FBDQSTERM<2>
NO_TEST
FBDQSTERM<0>
NO_TEST
RFBD<94>
RFBD<95>
RFBD<93>
RFBD<91>
RFBD<92>
RFBD<89>
RFBD<90>
RFBD<88>
RFBD<87>
RFBD<86>
RFBD<84>
RFBD<85>
RFBD<83>
RFBD<82>
RFBD<81>
RFBD<79>
RFBD<80>
RFBD<78>
RFBD<76>
RFBD<77>
RFBD<73>
RFBD<74>
RFBD<75>
RFBD<71>
RFBD<72>
RFBD<70>
RFBD<69>
RFBD<68>
RFBD<66>
RFBD<67>
RFBD<65>
RFBD<64>
RFBD<30>
RFBD<29>
RFBD<27>
RFBD<28>
RFBD<26>
RFBD<10>
RFBD<9>
RFBD<12>
RFBD<11>
RFBD<13>
RFBD<15>
RFBD<14>
RFBD<17>
RFBD<16>
RFBD<19>
RFBD<20>
RFBD<22>
RFBD<21>
RFBD<23>
RFBD<25>
RFBD<24>
RFBD<8>
RFBD<6>
RFBD<7>
RFBD<5>
RFBD<1>
FBD<0>
FBD<2>
NO_TEST
FBD<3>
NO_TEST
FBD<4>
NO_TEST
FBD<5>
FBD<6>
NO_TEST
FBD<7>
NO_TEST
FBD<8>
NO_TEST
FBD<9>
FBD<10>
NO_TEST
FBD<11>
NO_TEST
FBD<12>
NO_TEST
FBD<13>
FBD<15>
NO_TEST
FBD<16>
FBD<20>
FBD<21>
NO_TEST
FBD<22>
NO_TEST
FBD<26>
NO_TEST
FBD<27>
NO_TEST
FBD<28>
FBD<29>
NO_TEST
FBD<30>
FBD<31>
NO_TEST
FBD<32>
FBD<33>
NO_TEST
FBD<34>
NO_TEST
NO_TEST
FBD<35>
FBD<36>
FBD<37>
NO_TEST
FBD<38>
FBD<39>
NO_TEST
FBD<40>
NO_TEST
FBD<41>
FBD<42>
NO_TEST
FBD<43>
NO_TEST
FBD<44>
NO_TEST
FBD<45>
FBD<46>
NO_TEST
FBD<47>
NO_TEST
FBD<48>
NO_TEST
FBD<49>
NO_TEST
FBD<51>
FBD<53>
FBD<54>
NO_TEST
FBD<55>
NO_TEST
FBD<56>
FBD<57>
NO_TEST
FBD<58>
NO_TEST
FBD<59>
NO_TEST
FBD<60>
FBD<61>
NO_TEST
FBD<62>
NO_TEST
FBD<63>
NO_TEST
FBD<64>
FBD<65>
NO_TEST
FBD<66>
NO_TEST
FBD<67>
FBD<68>
FBD<69>
NO_TEST
FBD<70>
NO_TEST
FBD<71>
NO_TEST
FBD<72>
NO_TEST
FBD<73>
NO_TEST
FBD<74>
NO_TEST
FBD<75>
FBD<76>
FBD<77>
NO_TEST
FBD<78>
NO_TEST
FBD<79>
NO_TEST
FBD<80>
FBD<81>
NO_TEST
FBD<82>
NO_TEST
FBD<83>
NO_TEST
FBD<84>
FBD<85>
NO_TEST
FBD<86>
NO_TEST
FBD<87>
NO_TEST
FBD<88>
NO_TEST
FBD<89>
FBD<90>
NO_TEST
FBD<91>
NO_TEST
FBD<92>
NO_TEST
FBD<93>
NO_TEST
FBD<94>
NO_TEST
FBD<95>
FBD<96>
FBD<97>
NO_TEST
NO_TEST
FBD<99>
NO_TEST
FBD<100>
FBD<103>
NO_TEST
FBD<104>
NO_TEST
FBD<106>
NO_TEST
FBD<107>
FBD<108>
FBD<109>
NO_TEST
FBD<110>
NO_TEST
FBD<111>
NO_TEST
FBD<112>
FBD<122>
NO_TEST
FBD<123>
NO_TEST
FBD<124>
FBD<125>
NO_TEST
FBD<126>
NO_TEST
FBD<127>
FBDQSTERM<3>
NO_TEST
FBDQSTERM<5>
NO_TEST
RFBD<0>
RFBD<31>
NO_TEST
FBD<14>
FBD<24>
FBD<25>
NO_TEST
FBD<52>
NO_TEST
FBD<50>
NO_TEST
<XR_PAGE_TITLE>
RP20
1 8
RP20
2 7
RP20
3 6
RP20
4 5
RP19
1 8
RP19
2 7
RP19
3 6
RP19
4 5
RP21
4 5
RP21
3 6
RP21
2 7
RP21
1 8
RP18
1 8
RP18
4 5
RP18
3 6
RP18
2 7
RP91
4 5
RP91
3 6
RP91
2 7
RP91
1 8
RP90
1 8
RP90
4 5
RP90
3 6
RP90
2 7
RP92
4 5
RP92
3 6
RP92
2 7
RP92
1 8
RP17
1 8
RP17
4 5
RP17
3 6
RP17
2 7
RP29
4 5
RP29
3 6
RP29
2 7
RP29
1 8
RP28
4 5
RP28
3 6
RP28
2 7
RP28
1 8
RP97
1 8
RP97
4 5
RP97
3 6
RP97
2 7
RP25
4 5
RP25
3 6
RP25
2 7
RP25
1 8
RP96
1 8
RP96
4 5
RP96
3 6
RP96
2 7
RP26
4 5
RP26
3 6
RP26
2 7
RP26
1 8
RP24
1 8
RP24
4 5
RP24
3 6
RP24
2 7
R148
12
R156
12
R123
12
R132
12
R122
12
R97
12
R479
1 2
R483
1 2
R104
12
R103
12
R105
12
R106
12
R509
1 2
R101
12
R506
1 2
R81
12
RP13
4 5
RP13
3 6
RP13
2 7
RP13
1 8
RP7
4 5
RP87
1 8
RP87
4 5
RP87
3 6
RP87
2 7
RP7
3 6
RP7
2 7
RP7
1 8
RP6
4 5
RP6
3 6
RP6
2 7
RP11
4 5
RP11
3 6
RP11
2 7
RP11
1 8
RP12
4 5
RP12
3 6
RP12
1 8
RP12
2 7
RP14
3 6
RP14
4 5
RP14
1 8
RP14
2 7
RP10
2 7
RP10
3 6
RP10
4 5
RP10
1 8
RP5
4 5
RP5
3 6
RP5
2 7
RP5
1 8
RP6
1 8
RP4
4 5
RP86
1 8
RP86
4 5
RP86
3 6
RP86
2 7
RP89
4 5
RP89
3 6
RP4
3 6
RP4
2 7
RP4
1 8
RP89
1 8
RP89
2 7
RP88
2 7
RP88
3 6
RP88
4 5
RP88
1 8
R140
12
R159
12
R147
12
R167
12
R153
1 2
R146
1 2
R186
1 2
R187
1 2
R428
1 2
R416
1 2
R31
1 2
R24
1 2
R32
1 2
R25
1 2
R415
1 2
R429
1 2
R63
12
R69
12
R53
12
R57
12
R65
12
R68
12
R55
12
R60
12
R158
1
2
R500
1
2
R20
1
2
R403
1
2
RP27
1 8
RP27
4 5
RP27
3 6
RP27
2 7
RP80
1 8
RP80
4 5
RP80
2 7
RP80
3 6
RP81
2 7
RP81
1 8
RP81
4 5
RP81
3 6
RP82
3 6
RP82
2 7
RP82
1 8
RP82
4 5
LAST_MODIFIED=Wed Sep 17 12:16:10 2003
55B3>
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55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
55D3>
18C5<>
21C2<
18D7>
18C5<> 18F5<>
21C1<>
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18E5<>
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18E5<>
18E5<>
18E5<>
18E5<>
18E5<>
18E5<>
18F5<>
18F5<>
18F5<>
18G8<>
18G8<>
18G8<>
18G8<> 20C5<>
20C5<>
20C5<>
20C5<>
18G8<>
21B1<>
21B1<>
21B1<>
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20C1<>
20C1<>
20C1<>
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20C1<>
20C1<>
20C1<>
21C6<
18C5<>
21C6<
18C5<>
21C2<
20C6<
20C6< 18D7>
20C2< 18D7>
20C2< 18D7>
21C6<>
21C6<>
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18D4<>
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20C2<>
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18C7<>
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18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
18G5<>
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18G5<>
18G5<>
18F5<>
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18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
18F5<>
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55C3>
55C3>
20C5<>
20B5<>
18G8<>
18G8<>
18F8<>
18E8<>
18E8<>
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
DRAWING
PLACE NEAR VDD PINS
SGRAM0 & SGRAM1 DDR MEMORY REFERENCE SUPPORT
PLACE NEAR VDD PINS
SGRAM0 & SGRAM1
SGRAM0 & SGRAM1 VREF
SGRAM0 & SGRAM1 MEMORY SUPPORT
10UF
Y5V
10V
N20P80%
805
10UF
Y5V
10V
N20P80%
805
0.1UF
CERM
402
10V
20%
0.1UF
402
20%
CERM
10V
0.1UF
402
CERM
10V
20%
0.1UF
CERM
20%
402
10V
0.1UF
CERM
402
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
20%
10V
CERM
402 402
10V
20%
CERM
0.1UF 0.1UF
20%
10V
402
CERM
0.1UF
10V
CERM
20%
402
0.1UF
20%
10V
CERM
402 402
0.1UF
10V
20%
CERM
10UF
Y5V
10V
N20P80%
805
10UF
Y5V
10V
N20P80%
805
SDRAM_DDR_4MX32
BGA
SEE_TABLE
SDRAM_DDR_4MX32
BGA
SEE_TABLE
SDRAM_DDR_4MX32
BGA
SEE_TABLE
SEE_TABLE
BGA
SDRAM_DDR_4MX32
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN +2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN+2_5V_MAIN
0
5%
1/16W
MF
402
MEMREFG_ACT
0
5%
1/16W
MF
402
MEMREFG_PAS
+2_5V_MAIN
SEE_TABLE
1K
MF
1/16W
5%
402
0.1UF
20%
10V
CERM
402
MEMREFG_PAS
0.1UF
CERM
10V
20%
402
MEMREFG_PAS
1K
MF
1/16W
1%
402
1K
1%
1/16W
MF
402
100PF
5%
50V
CERM
402
MEMREFG_ACT
TLV431A
SOT
MEMREFG_ACT
0.001UF
10%
50V
CERM
402
0.001UF
50V
10%
402
CERM
0.001UF
10%
50V
CERM
402
0.001UF
CERM
50V
10%
402
0.001UF
402
10%
50V
CERM
402
10%
50V
CERM
0.001UF
0.1UF
10V
20%
CERM
402
0.1UF
CERM
20%
10V
402
0.1UF
CERM
20%
10V
402 402
10V
20%
CERM
0.1UF
402
10V
20%
CERM
0.1UF
402
10V
20%
CERM
0.1UF
0.001UF
402
CERM
50V
10%
0.001UF
CERM
50V
10%
402
0.001UF
402
10%
50V
CERMCERM
0.001UF
402
10%
50V
0.1UF
10V
20%
CERM
402
402
20%
CERM
10V
0.1UF
R152 MEMREFG_ACT116S1103
1
RES,1K-OHM,5%,1/16W,0402
SAMSUNG_275_32M
CRITICAL
U12,U41
2
SDRAM,4MX32,DDR,275MHZ
333S0249
HYNIX_300_32M
CRITICAL
2
U12,U41
SDRAM,4MX32,DDR,300MHZ
333S0252
SAMSUNG_300_32M
2
U12,U41
CRITICAL
SDRAM,4MX32,DDR,300MHZ
333S0251
13
051-6497
6920
HYNIX_275_32M
CRITICAL
U12,U41
2
SDRAM,4MX32,DDR,275MHZ
333S0250
R152 MEMREFG_PAS
1
116S1000
RES,0-OHM,5%,1/16W,0402
SGRAVREF
RFBD<50>
NC_FB1<0>
NO_TEST
NC_FB1<1>
NO_TEST
NC_FB1<2>
NO_TEST
NC_FB1<3>
NO_TEST
NC_FB1<4>
NO_TEST
NC_FB1<5>
NO_TEST
NC_FB1<6>
NO_TEST
NC_FB1<7>
NO_TEST
NC_FB1<8>
NO_TEST
NC_FB1<9>
NO_TEST
NC_FB1<10>
NO_TEST
NC_FB2<0>
NO_TEST
NC_FB2<1>
NO_TEST
NC_FB2<2>
NO_TEST
NC_FB2<3>
NO_TEST
NC_FB2<4>
NO_TEST
NC_FB2<5>
NO_TEST
NC_FB2<6>
NO_TEST
NC_FB2<7>
NO_TEST
NC_FB2<8>
NO_TEST
NC_FB2<9>
NO_TEST
NC_FB2<10>
NO_TEST
SGRAVREF
RFBDQS<3>
RFBDQS<2>
RFBDQS<1>
RFBDQS<0>
RFBDQS<4>
RFBDQS<5>
RFBDQS<6>
RFBD<0>
RFBD<1>
RFBACKE
RFBACAS_L
RFBACS0_L
RFBARAS_L
RFBAWE_L
RFBACLK0_L
RFBACLK0
RFBABA<0>
RFBDQM<3>
RFBDQM<2>
RFBDQM<0>
RFBDQM<1>
RFBD<13>
RFBD<11>
RFBD<12>
RFBD<10>
RFBD<9>
RFBD<8>
RFBD<6>
RFBD<7>
RFBD<4>
RFBD<3>
RFBD<5>
RFBD<2>
RFBD<31>
RFBD<30>
RFBD<29>
RFBD<26>
RFBD<28>
RFBD<27>
RFBD<24>
RFBD<21>
RFBD<15>
RFBD<14>
RFBD<17>
RFBD<16>
RFBD<18>
RFBD<19>
RFBD<20>
RFBD<22>
RFBD<23>
RFBDQM<5>
RFBDQM<4>
RFBDQM<6>
RFBDQM<7>
RFBABA<0>
RFBACAS_L
RFBACS0_L
RFBARAS_L
RFBAWE_L
RFBD<32>
RFBD<34>
RFBD<33>
RFBD<37>
RFBD<35>
RFBD<36>
RFBD<39>
RFBD<38>
RFBD<40>
RFBD<41>
RFBD<42>
RFBD<44>
RFBD<43>
RFBD<47>
RFBD<45>
RFBD<46>
RFBD<49>
RFBD<48>
RFBD<51>
RFBD<52>
RFBD<54>
RFBD<55>
RFBD<53>
RFBD<56>
RFBD<57>
RFBD<59>
RFBD<60>
RFBD<58>
RFBD<61>
RFBD<62>
RFBD<63>
RFBACLK1
RFBACLK1_L
RFBACKE
RFBA<0>
RFBA<0>
RFBA<1>
RFBA<1>
RFBA<3>
RFBA<3>
RFBA<2>
RFBA<2>
RFBA<6>
RFBA<6>
RFBA<5>
RFBA<4>
RFBA<4>
RFBA<7>
RFBA<7>
RFBA<8>
RFBA<8>
RFBA<9>
RFBA<9>
RFBA<10>
RFBA<10>
RFBA<11>
RFBA<11>
RFBABA<1>
RFBABA<1>
SGRAVREFMEMREFG1
MEMREFG2
RFBA<5>
RFBDQS<7>
RFBD<25>
<XR_PAGE_TITLE>
C205
1
2
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1
2
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1
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1
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1
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1
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C3
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F4
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E5
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K6
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K8
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L5
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B4
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F5
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G5
G10
H5
H10
J5
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K5
K10
D4
D5
D6
D9
D10
D11
E6
E9
F6
F7
H8
H9
J6
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J8
J9
F8
F9
G6
G7
G8
G9
H6
H7
U41
N5
N6
L6
M7
M6
N7
N8
M9
N9
N10
N11
M8
N4
M5
L2
M11
M12
N12
N2
B3
H12
H3
B12
B7
C6
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
B6
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
B5
C9
B8
C2
D3
D2
E2
K13
K12
B2
H13
H2
B13
M13
C4
C11
H4
H11
L12
L13
M3
M4
N3
M2
L9
M10
L3
U41
D7
D8
E4
E11
L4
L7
L8
L11
C3
C5
G4
G11
J4
J11
K4
K11
C7
C8
C10
C12
E3
E12
F4
F11
N13
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
B4
B11
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
D4
D5
D6
D9
D10
D11
E6
E9
F6
F7
H8
H9
J6
J7
J8
J9
F8
F9
G6
G7
G8
G9
H6
H7
R151
1 2
R166
1 2
R152
1
2
C157
1
2
C172
1
2
R163
1
2
R176
1
2
C191
1
2
U16
5
3
4
C569
1
2
C566
1
2
C535
1
2
C565
1
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C533
1
2
C143
1
2
C540
1
2
C544
1
2
C532
1
2
C158
1
2
C142
1
2
C144
1
2
C166
1
2
C173
1
2
C195
1
2
C194
1
2
C2201
1
2
C2202
1
2
LAST_MODIFIED=Wed Sep 17 12:16:13 2003
52A6>
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(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
DRAWING
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
PLACE NEAR VDD PINS
SGRAM2 & SGRAM3
PLACE NEAR VDD PINS
SGRAM2 & SGRAM3 DDR MEMORY REFERENCE SUPPORT
SGRAM0 & SGRAM1 MEMORY SUPPORT
SGRAM2 & SGRAM3 VREF
64M_GRAM_DECOUP
Y5V
10V
N20P80%
805
10UF
Y5V
10V
N20P80%
805
10UF
64M_GRAM_DECOUP
64M_GRAM_DECOUP
0.1UF
CERM
402
10V
20%
64M_GRAM_DECOUP
0.1UF
402
20%
CERM
10V
64M_GRAM_DECOUP
0.1UF
402
CERM
10V
20%
64M_GRAM_DECOUP
0.1UF
CERM
20%
402
10V
64M_GRAM_DECOUP
0.1UF
CERM
402
10V
20%
64M_GRAM_DECOUP
0.1UF
402
CERM
10V
20%
64M_GRAM_DECOUP
0.1UF
20%
10V
CERM
402
64M_GRAM_DECOUP
0.1UF
10V
402
20%
CERM
64M_GRAM_DECOUP
0.1UF
402
20%
10V
CERM
64M_GRAM_DECOUP
0.1UF
10V
CERM
20%
402
64M_GRAM_DECOUP
0.1UF
20%
10V
CERM
402
64M_GRAM_DECOUP
0.1UF
10V
402
20%
CERM
64M_GRAM_DECOUP
Y5V
10V
N20P80%
805
10UF10UF
805
N20P80%
10V
Y5V
64M_GRAM_DECOUP
SEE_TABLE
SDRAM_DDR_4MX32
BGA
SEE_TABLE
SDRAM_DDR_4MX32
BGA
SEE_TABLE
SDRAM_DDR_4MX32
BGA
BGA
SDRAM_DDR_4MX32
SEE_TABLE
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN +2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN+2_5V_MAIN
MEMREFG_ACT_64M
5%
1/16W
MF
402
0
MEMREFG_PAS_64M
5%
1/16W
MF
402
0
+2_5V_MAIN
402
MF
1/16W
5%
1K
SEE_TABLE
MEMREFG_PAS_64M
402
CERM
10V
20%
0.1UF
MEMREFG_PAS_64M
0.1UF
10V
402
20%
CERM
1K
MF
1/16W
1%
402
64M_GRAM_DECOUP
64M_GRAM_DECOUP
1K
402
MF
1/16W
1%
MEMREFG_ACT_64M
CERM
50V
5%
402
100PF
MEMREFG_ACT_64M
TLV431A
SOT
64M_GRAM_DECOUP
0.1UF
CERM
20%
10V
402
64M_GRAM_DECOUP
20%
0.1UF
10V
CERM
402
64M_GRAM_DECOUP
0.1UF
CERM
20%
10V
402
64M_GRAM_DECOUP
0.001UF
CERM
50V
10%
402
64M_GRAM_DECOUP
0.1UF
10V
20%
CERM
402
64M_GRAM_DECOUP
0.1UF
CERM
20%
10V
402
64M_GRAM_DECOUP
0.1UF
10V
20%
CERM
402
64M_GRAM_DECOUP
0.001UF
10%
50V
CERM
402
0.001UF
CERM
50V
10%
402
64M_GRAM_DECOUP 64M_GRAM_DECOUP
0.001UF
402
CERM
50V
10%
64M_GRAM_DECOUP
0.001UF
402
10%
50V
CERM
64M_GRAM_DECOUP
0.001UF
402
CERM
50V
10%
0.001UF
402
10%
50V
CERM
64M_GRAM_DECOUP 64M_GRAM_DECOUP
0.001UF
402
CERM
50V
10%
64M_GRAM_DECOUP
0.001UF
402
10%
50V
CERM
64M_GRAM_DECOUP
0.001UF
402
CERM
50V
10%
0.1UF
10V
402
20%
CERM
64M_GRAM_DECOUP
64M_GRAM_DECOUP
20%
CERM
402
10V
0.1UF
MEMREFG_PAS_64M
R18
RES,0-OHM,5%,1/16W,0402
116S1000
1
MEMREFG_ACT_64M
RES,1K-OHM,5%,1/16W,0402
R18
1
116S1103
HYNIX_275_64M
CRITICAL
SDRAM,4MX32,DDR,275MHZ
U5,U36333S0250
2
21 69
051-6497
13
HYNIX_300_64MU5,U36333S0252
SDRAM,4MX32,DDR,300MHZ
CRITICAL
2
SAMSUNG_300_64M
U5,U36
SDRAM,4MX32,DDR,300MHZ
333S0251
CRITICAL
2
SAMSUNG_275_64M
U5,U36
SDRAM,4MX32,DDR,275MHZ
CRITICAL
333S0249
2
SGRBVREF
SGRBVREF
RFBD<68>
SGRBVREF
RFBBCAS_L
RFBBCAS_L
RFBD<64>
RFBD<65>
RFBBCKE
RFBBCS0_L
RFBBRAS_L
RFBBWE_L
RFBBCLK0_L
RFBBCLK0
RFBBBA<1>
RFBBBA<0>
RFBDQM<11>
RFBDQM<10>
RFBDQM<8>
RFBDQM<9>
RFBDQS<11>
RFBBA<11>
RFBBA<10>
RFBBA<9>
RFBBA<8>
RFBBA<7>
RFBBA<5>
RFBBA<6>
RFBDQS<10>
RFBDQS<9>
RFBDQS<8>
RFBBA<3>
RFBBA<2>
RFBBA<4>
RFBD<77>
RFBD<75>
RFBD<76>
RFBD<74>
RFBD<73>
RFBD<72>
RFBD<70>
RFBD<71>
RFBD<67>
RFBD<69>
RFBD<66>
RFBD<95>
RFBD<94>
RFBD<93>
RFBD<90>
RFBD<91>
RFBD<89>
RFBD<88>
RFBD<85>
RFBD<79>
RFBD<78>
RFBD<81>
RFBD<80>
RFBD<82>
RFBD<83>
RFBD<84>
RFBD<86>
RFBD<87>
RFBBA<11>
RFBBA<10>
RFBBA<9>
RFBBA<8>
RFBBA<7>
RFBBA<4>
RFBBA<5>
RFBBA<6>
RFBBA<2>
RFBBA<3>
RFBBA<1>
RFBBA<0>
RFBDQS<12>
RFBDQS<13>
RFBDQS<15>
RFBDQS<14>
RFBDQM<13>
RFBDQM<12>
RFBDQM<14>
RFBDQM<15>
RFBBBA<0>
RFBBCS0_L
RFBBRAS_L
RFBBWE_L
RFBD<96>
RFBD<98>
RFBD<97>
RFBD<101>
RFBD<99>
RFBD<100>
RFBD<103>
RFBD<102>
RFBD<104>
RFBD<105>
RFBD<106>
RFBD<108>
RFBD<107>
RFBD<111>
RFBD<109>
RFBD<110>
RFBD<113>
RFBD<112>
RFBD<114>
RFBD<115>
RFBD<116>
RFBD<118>
RFBD<119>
RFBD<117>
RFBD<120>
RFBD<121>
RFBD<123>
RFBD<124>
RFBD<122>
RFBD<125>
RFBD<126>
RFBBBA<1>
RFBD<127>
RFBBCLK1
RFBBCLK1_L
RFBBCKE
RFBBA<0>
NC_FB4<10>
NO_TEST
NC_FB4<9>
NO_TEST
NC_FB4<8>
NO_TEST
NC_FB4<7>
NO_TEST
NC_FB4<6>
NO_TEST
NC_FB4<5>
NO_TEST
NC_FB4<4>
NO_TEST
NC_FB4<3>
NO_TEST
NC_FB4<2>
NO_TEST
NC_FB4<1>
NO_TEST
NC_FB4<0>
NO_TEST
NC_FB3<10>
NO_TEST
NC_FB3<9>
NO_TEST
NC_FB3<8>
NO_TEST
NC_FB3<7>
NO_TEST
NC_FB3<6>
NO_TEST
NC_FB3<5>
NO_TEST
NC_FB3<4>
NO_TEST
NC_FB3<3>
NO_TEST
NC_FB3<2>
NO_TEST
NC_FB3<1>
NO_TEST
NC_FB3<0>
NO_TEST
RFBD<92>
RFBBA<1>
MEMREFG3
MEMREFG4
<XR_PAGE_TITLE>
C492
1
2
C15
1
2
C22
1
2
C23
1
2
C29
1
2
C34
1
2
C20
1
2
C31
1
2
C462
1
2
C488
1
2
C461
1
2
C469
1
2
C486
1
2
C476
1
2
C38
1
2
C460
1
2
U5
N5
N6
L6
M7
M6
N7
N8
M9
N9
N10
N11
M8
N4
M5
L2
M11
M12
N12
N2
B3
H12
H3
B12
B7
C6
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
B6
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
B5
C9
B8
C2
D3
D2
E2
K13
K12
B2
H13
H2
B13
M13
C4
C11
H4
H11
L12
L13
M3
M4
N3
M2
L9
M10
L3
U5
D7
D8
E4
E11
L4
L7
L8
L11
C3
C5
G4
G11
J4
J11
K4
K11
C7
C8
C10
C12
E3
E12
F4
F11
N13
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
B4
B11
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
D4
D5
D6
D9
D10
D11
E6
E9
F6
F7
H8
H9
J6
J7
J8
J9
F8
F9
G6
G7
G8
G9
H6
H7
U36
N5
N6
L6
M7
M6
N7
N8
M9
N9
N10
N11
M8
N4
M5
L2
M11
M12
N12
N2
B3
H12
H3
B12
B7
C6
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
B6
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
B5
C9
B8
C2
D3
D2
E2
K13
K12
B2
H13
H2
B13
M13
C4
C11
H4
H11
L12
L13
M3
M4
N3
M2
L9
M10
L3
U36
D7
D8
E4
E11
L4
L7
L8
L11
C3
C5
G4
G11
J4
J11
K4
K11
C7
C8
C10
C12
E3
E12
F4
F11
N13
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
B4
B11
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
D4
D5
D6
D9
D10
D11
E6
E9
F6
F7
H8
H9
J6
J7
J8
J9
F8
F9
G6
G7
G8
G9
H6
H7
R17
1 2
R5
1 2
R18
1
2
C8
1
2
C9
1
2
R6
1
2
R4
1
2
C11
1
2
U2
5
3
4
C467
1
2
C487
1
2
C493
1
2
C494
1
2
C17
1
2
C39
1
2
C21
1
2
C32
1
2
C470
1
2
C466
1
2
C475
1
2
C489
1
2
C16
1
2
C40
1
2
C33
1
2
C28
1
2
C2301
1
2
C2302
1
2
LAST_MODIFIED=Wed Sep 17 12:16:15 2003
52A6>
52A6>
52A6>
55B3>
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18A2<>
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18B2<>
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18A2<>
18C2<>
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19B4<
19C1<
19B1<
18A2<>
18C2<>
19B7<
18B2<>
S
D
G
VIPCAL_PU_GND
VIPCAL_PD_VDDQ
VIPVDDQ2
VIPVDDQ1
VIPVDDQ0
VIPD7
DVOCAL_PU_GND
DVOCAL_PD_VDDQ
BUFRST*
DVOD10
DVOD11
DVOVDD
NC_DACC_RSET
DACA_VREF
DACA_RSET
NC_DACC_RED
NC_DACC_GREEN
NC_DACC_BLUE
DACA_BLUE
DACA_GREEN
DACA_RED
NC_STRAP3
NC_STRAP2
DACA_IDUMP
DACB_IDUMP
STRAP1
STRAP0
DACB_VREF
DACB_GREEN
DACB_RED
DACB_BLUE
DACB_RSET
XTALOUTBUFF
DACA_HSYNC
DACA_VSYNC
DACA_VDD
DVOVREF
DVOCLKOUT*
DVODE
DACB_VSYNC
DACB_HSYNC
DACB_VDD
I2CA_SDA
I2CA_SCL
I2CC_SDA
I2CC_SCL
VIPPCLK
VIPD4
VIPD2
VIPD3
VIPD1
VIPD0
VIPD5
VIPD6
(2 OF 5)
VIPHCTL
VIPHCLK
PLLVDD
VIPHAD0
VIPHAD1
DVOCLKOUT
DVOCLKIN
DVOHSYNC
DVOVSYNC
XTALSSIN
XTALIN
XTALOUT
DVOD4
DVOD3
DVOD2
DVOD1
DVOD0
DVOD9
DVOD8
DVOD7
DVOD6
DVOD5
XIN/CLKIN
SSCLK
VSS
S0
S1
FRSEL
XOUT
VDD
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
DRAWING
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NVIDIA ASIC SUPPORT
FOR ALTERNATE CRYSTAL
S0=1 (NVIDIA RECOMMENDATION)
HOW MUCH CURRENT DO WE NEED HERE?
THIS IS A HUGE 3A BEAD
STRAPS
S1=M (NC) FOR -1.5% DOWN SPREAD
S0=0
S1=0 FOR +/-1.2% CENTER SPREAD
NC
NC
AS 75 OHM TRACES.
ROUTE THE RGB LINES
(GND)
PLACE CLOSE TO GPU
DAC & CLOCKS
PLACE CLOSE TO GPU
(GND)
ADD DUAL LAYOUT SUPPORT
NOTE: KEEP STUB SHORT ->
TRUELY NC PINS. BUT
WE’RE CONNECTING TO THEM
AS A PRECAUTION
NOTE: GPU_STRAP<3..2> ARE
CERM
50V
5%
402
22PF
1%
10K
1/16W
MF
402
GPU_SS_NO
0.001UF
CERM
50V
10%
402
0.1UF
402
CERM
10V
20%
10UF
Y5V
10V
N20P80%
805
10
603
1%
MF
1/16W
SEE_TABLE
402
MF
1%
121
1/16W
SEE_TABLE
0.01UF
CERM
5%
603
50V
1%
MF
402
1/16W
10K
75
1%
1/16W
MF
402
1%
75
MF
402
1/16W
1/16W
75
402
MF
1%
75
402
MF
1/16W
1%
NOSTUFF
75
1/16W
402
MF
1%
NOSTUFF
75
NOSTUFF
1%
1/16W
MF
402
0.01UF
CERM
16V
402
10%
4.7UF
805
N20P80%
10V
CERM CERM
0.1UF
20%
10V
402
27PF
5%
50V
CERM
402
NOSTUFF
27PF
402
CERM
50V
5%
NOSTUFF
27PF
402
CERM
50V
5%
NOSTUFF
100-OHM-EMI
SM
SEE_TABLE
SM
SEE_TABLE
100-OHM-EMI
0.001UF
CERM
10%
402
50V
MF
1/16W
5%
603
5.1M
10K
1%
1/16W
402
MF
20%
0.1UF
402
10V
CERM
SEE_TABLE
1%
MF
402
1/16W
95.3
2N7002
SM
CRITICAL
SM-3
27.000M
+3V_MAIN
+3V_MAIN
+3V_MAIN
+3V_MAIN
+3V_MAIN
10
1/16W
402
MF 1%
402
1/16W
MF
10
1%
+3V_MAIN
402
MF
1/16W
1%
49.9
49.9
MF
1%
402
1/16W
49.9
1%
1/16W
MF
402
MF
402
49.9
1/16W
1%
+3V_MAIN
0.1UF
20%
10V
CERM
402
27PF
402
5%
50V
CERM
NOSTUFF
27PF
50V
5%
402
NOSTUFF
CERM
402
5%
50V
CERM
27PF
NOSTUFF
MF
NV18B
1%
1K
402
1/16W
BGA
NV18B
SEE_TABLE
1000-OHM-EMI
SM
NOSTUFF
GPU_SS
5%
402
1/16W
MF
0
NOSTUFF
5%
402
1/16W
MF
0
805
CERM
6.3V
20%
4.7UF
GPU_SS
NOSTUFF
5%
1/16W
MF
402
0
5%
1/16W
MF
402
NOSTUFF
0
402
20%
10V
CERM
GPU_SS
0.1UF
GPU_SS
CY25811
SOI
CRITICAL
SM
GPU_SS
FERR-EMI-100-OHM
402
1/16W
MF
5%
GPU_SS
0
121
402
1%
1/16W
MF
NOSTUFF
5%
1/16W
MF
402
0
GPU_SS
5%
1/16W
MF
402
22
NOSTUFF
MF
1/16W
402
5%
0
+3V_MAIN
0.1UF
CERM
10V
20%
402
402
MF
1/16W
10K
1%
1%
402
MF
10K
1/16W
402
CERM
50V
5%
22PF
10UF
NOSTUFF
Y5V
10V
N20P80%
805
0.1UF
402
CERM
10V
20%
0.001UF
CERM
50V
10%
402
R554
1
114S1302
RES 130 OHM,1%,1/16W,0402
NV34
1
NV18B
114S9531
RES 95.3 OHM,1%,1/16W,0402
R554
NV18B
1
114S1212
RES 121 OHM,1%,1/16W,0402
R562
R562
1
114S1242
RES 124 OHM,1%,1/16W,0402
NV34
132S1045
CAP 0.01UF,50V,10%,0603
NV18B
C162
1
CAP 1UF,10V,10%,0603
NV34138S0518
C162
1
CRITICAL338S0119 U39 NV18B
1
IC,NV18B,GRPHCS CTLR
L13,L68
2
155S0143
FLTR,EMI,1000 OHMS,.2A,0805
CRITICAL338S0113 U39
1
NV34
IC,NV34,GRPHCS CTLR
22 69
051-6497
13
L2401155S0141
1
NOSTUFF
FLTR,EMI,600 OHMS,.2A,0603
DVOCLKIN
DVOVREF
ANALOG_RED
DVO_PD
DVOD11
DVOHSYNC
NV11_XTALOUT
DACRSET
GPU_XTALSSIN
GPU_XTALOUTBUFF
DVO_PU
ANALOG_BLU
VIPCLK
ANALOG_GRN
TESTPOINT
NC_BUF_RST
DVODE
TESTPOINT
ANALOG_HSYNC*
ANALOG_VSYNC*
NV11_XTALIN
+3V_GPU_SS
CLK27M_MEM_SS
NC_VIPHCLK
TESTPOINT
NC_DACC_RSET
NO_TEST
NV11_VSYNC
TESTPOINT
DAC2VREF
DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD10
DVOD5
DVOD6
DVOD7
DVOD8
DVOD9
CY811_S1
GPU_XTALOUTBUFF
NV_GPIOD7
GPU_SS_XIN
NV_GPIOD8
GPU_XTALSSIN
CVBS_D
VIPD7
NC_DACC_RED
NO_TEST
NC_DACC_GRN
NO_TEST
NC_DACC_BLU
NO_TEST
GPU_STRAP<3>
GPU_STRAP<1>
GPU_STRAP<0>
VIPD0
TESTPOINT
VIPD1
TESTPOINT
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
NV11_HSYNC
TESTPOINT
DACVREF
VIP_PU
NV_BLUE2 NV_BLUE2
NV_RED2 NV_RED2
CY811_S0
MIN_LINE_WIDTH=25
+3V_GPU_SS
+3V_GPU_SS
GPU_STRAP<2>
CVBS_CNT
NVPLLVDD
VIP_PD
DACVDD
NV_GREEN2NV_GREEN2
DAC2VDD
HSYNC*
VSYNC*
DVOVSYNC
TESTPOINT
DVOCLKOUT*
TESTPOINT
DVOCLKOUT
TESTPOINT
VIPHAD1
TESTPOINT
VIPHAD0
TESTPOINT
VIPHCTL
TESTPOINT
GRAPH_DDC_SDA
GRAPH_DDC_SCL
MON_I2C_SCL
MON_I2C_SDA
DAC2RSET
<XR_PAGE_TITLE>
C226
1
2
C212
1
2
C213
1
2
R183
1
2
R185
1
2
C617
1
2
C227
1
2
C224
1
2
C206
1
2
C616
1
2
R188
1
2
C163
1
2
C164
1
2
C153
1
2
R206
1 2
R562
1
2
C162
1
2
R191
1
2
R178
1
2
R173
1
2
R179
1
2
R557
1
2
R556
1
2
R555
1
2
C228
1
2
C607
1
2
C606
1
2
C605
1
2
L68
1 2
L13
1 2
R569
1 2
R194
1
2
C209
1
2
R554
1
2
Q10
3
1
2
Y2
1 3
R199
1 2
R200
1 2
R171
1
2
R170
1
2
R133
1
2
R145
1
2
C128
1
2
C170
1
2
C190
1
2
C207
1
2
R174
1
2
U39
B1
AJ9
AJ10
AH9
AG10
AK10
AG8
AG9
AH8
AJ8
AD1
AD2
AF3
AC4
AE2
AD3
AB4
AB5
AE3
AB6
AB7
AG1
AJ2
AK2
AG2
AH1
AJ4
AH5
AG3
AJ1
AH2
AK1
AJ3
AK3
AH4
AK4
AE4
AD5
AE8
AD8
AD9
AF4
AD6
AG5
AF7
AG6
AG7
W7
Y7
AA6
AC5
F2
F3
AK7
G1
G2
P6
P7
J3
J2
K2
K1
L3
L2
N2
N1
P3
P2
M5
M4
L4
L6
L7
M7
AJ6
AH6
AJ5
AJ7
L2401
1 2
R957
1 2
R956
1 2
C778
1
2
R954
1
2
R955
1
2
C368
1
2
U9
6
4
3
5
7
2
1
8
L33
1 2
R952
1
2
R953
1
2
R942
1 2
R599
1 2
C1103
1
2
R118
1
2
LAST_MODIFIED=Wed Sep 17 12:16:17 2003
59B8>
59B8>
57C2>
57D5>
57D5>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57D5>
27B5<
27B5<
52A8>
57D5>
57D5>
26B5<
26B5<
22B7<
27C5<
27C5<
27C5<
27C5<
27C5<
27B5<
27C5<
27C5<
27C5<
27C5<
27C5<
52A8>
22A8<
22B7<
25B6<
27A8<
26D7<
57D5>
22A5<
22A8<
25C6<
52A8>
25C6<
27B5<
25D6<>
25C6<>
57D5>
22A6<
26D3<
57D5>
27A8<
27A8<
26D1<
26D1<
27A8<
27A8<
27A8<
27A8<
27A8<
26B1<
27A8<
22B4<>
23D5<>
23D5<>
22B2<
26C5<
26D3<
26B3<
26A4<
26B7<
26B7<
26B8<
26D7<
26D7<
26D7<
26B8<
26D3<
22C1<> 22C1<>
22C1<> 22C1<>
22A6<
22A8<
26D3<
23D7<>
52A6>
52B6>
22C1<> 22C1<>
52B6>
57D5>
57D5>
27B5<
27B6<
27B5<
26B7<
26B7<
26D5<
24A7<
24A7<
25B6<
25B6<
57D5>
TESTMEMCLK
FPBCLKOUT*
FPBCLKOUT
IFPCRSET
I2CB_SCL
I2CB_SDA
IFPCIOGND
IFPCIOVDD
IFPCPLLGND
IFPCPLLVDD
IFPABRSET
IFPABPLLVDD
IFPAIOGND
IFPABPLLGND
IFPAIOVDD
GPIOD7
GPIOD6
(5 OF 5)
GPIOD0
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD8
GPIOD9
NC_FRWR_VAUXC
NC_FRWR_VAUXP
NC_FRWRLNKON
NC_FRWRLPS
IFPABVPROVE
IFPBIOVDD
IFPBIOGND
IFPATXC
IFPATXC*
IFPATXD0
IFPATXD0*
IFPATXD1
IFPATXD1*
IFPATXD2
IFPATXD2*
IFPATXD3
IFPATXD3*
IFPBTXC
IFPBTXC*
IFPBTXD4
IFPBTXD4*
IFPBTXD5
IFPBTXD5*
IFPBTXD6
IFPBTXD6*
IFPBTXD7
IFPBTXD7*
IFPCTXC
IFPCTXC*
IFPCTXD0
IFPCTXD0*
IFPCTXD1
IFPCTXD1*
IFPCTXD2
IFPCTXD2*
IFPCVPROBE
SWAPRDY_B
STEREO
THERMD-
NC_FRWR_PME*
THERMD+
SWAPRDY_A
(SYM_VER1)
IN
ADJ/GND
OUT
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
FPD_PWR_ON
MON_DETECT
[IN]
[OUT]
THE STUFFING OF AN 0805 PACKAGE ONTO C635S LARGER TANT PADS IS CORRECT
DVI AND STRAPS
VOUT = 2.8V
(+3V_MAIN)
[IN]
[IN]
[OUT]
[OUT]
MAKE TP AS SHORT AS POSSIBLE
MAKE TP AS SHORT AS POSSIBLE
PLACE TMDS RESISTORS ON OPPOSITE SIDE TO TMDS
RESISTORS ON PAGE 29
IFP0AVCC
VALUES CONTROL GPU TMDS SWING
1%
402
MF
1/16W
10K
1%
MF
402
1/16W
10K
47
402
47
402
1/16W
1%
402
MF
10K
1%
1/16W
MF
402
10K
1%
1/16W
MF
402
10K
20%
CERM
10V
0.1UF
402
NOSTUFF
20%
402
CERM
10V
0.1UF
0
MF
1/16W
5%
402
+3V_MAIN
+3V_MAIN
+3V_MAIN
0.1UF
CERM
10V
20%
402 402
20%
10V
CERM
0.1UF
10K
402
MF
1/16W
1%
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
402
CERM
402
CERM
10V
20%
0.1UF
1K
402
NV18B
1K
402
NV18B402
1K
402
47
1K
402
1K
402
402
10K
10K
402
10K
402
402
10K
402
MF
5%
2K
1/16W
402
MF
5%
1/16W
2K
CERM
50V
10%
402
0.001UF
+3V_MAIN
MBR0530
SM
TMDS_PLL_ACT
0.1UF
20%
CERM
16V
603
100
402
MF
1/16W
1%
TMDS_PLL_ACT
+5V_MAIN
BGA
NV18B
124
402
MF
1/16W
1%
TMDS_PLL_ACT
0
FF
1/10W
5%
805
FERR-EMI-100-OHM
SM
LM1117
SOT-223-4
TMDS_PLL_ACT
22UF
SMB
10V
20%
TANT
TMDS_PLL_ACT
10UF
SMA
TANT
6.3V
20%
TMDS_PLL_ACT
22UF
10V
20%
TANT
SMB
SEE_TABLE
TMDS_XMIT_GPU
0
0
TMDS_XMIT_GPU
0
TMDS_XMIT_GPU
0
TMDS_XMIT_GPU
TMDS_XMIT_GPU
0
0
TMDS_XMIT_GPU
0
TMDS_XMIT_GPU
402
MF
5%
0
TMDS_XMIT_GPU
1/16W
TMDS_GPU_PU
49.9
TMDS_GPU_PU
49.9
1/16W
402
MF
1%
TMDS_GPU_PU
49.9
TMDS_GPU_PU
49.9
TMDS_GPU_PU
49.9
TMDS_GPU_PU
49.9
TMDS_GPU_PU
49.9
TMDS_GPU_PU
49.9
0
NOSTUFF
NOSTUFF
0
1%
1/16W
10K
402
NV34
MF
10K
1%
402
MF
1/16W
NV34
SEE_TABLE
1%
1/16W
MF
1K
402
47
402
23 69
051-6497
13
C635
1UF,10%,10V,0805,CERM
132S1063
1
FPD_12VM
1
R149
RES,1.5K,1%,1/16W,0402
114S1503
FPD_3V3
R149
RES,1K,1%,1/16W,0402
1
114S1003
IFP0VREF
IFP_AVCC
GPU_SWAP_B
GPU_SWAP_A
GRAPH_CORE
GPU_FPBCLK_L
TMDS_EN
NV_GPIOD8
GPU_TESTMECLK
NV_GPIOD2
LAMP_STS
LCD_PWM
INV_CUR_HI
TMDS_D2M
GPU_TMDS_D1M
TMDS_D1M
TMDS_CKM
TMDS_D1P
GPU_TMDS_D0P
TMDS_D0P
TMDS_CKP
NC_EXT_TMDS_D0M
IFP_VADJ
MON_DETECT
GPU_IFP1PLLVDD
NC_IFP1VREF
NC_DFPD6
NC_DFPD5
NC_DFPD3
NC_DFPD1
NC_DFPCLK*
NC_DFPCLK
NC_TMDS_TXD7M
NC_TMDS_TXD7P
NC_EXT_TMDS_D2M
NC_EXT_TMDS_D2P
NC_EXT_TMDS_D1M
NC_EXT_TMDS_D0P
NC_EXT_TMDS_CKM
NC_EXT_TMDS_CKP
NC_TMDS_TXD3M
NC_TMDS_TXD3P
NC_IFP1RSET
NC_GPU_THERMA
NC_DFPD0
NC_DFPD2
NV_GPIOD9
NC_GPU_THERMC
GPU_FPBCLK
GPU_TMDS_D0M
GPU_TMDS_D2P
TMDS_D2P
SI_SCA
GPU_TMDS_D1P
GRAPH_IIC_SDA2
GPU_IFB1IOVDD
GPU_STEREO
NV_GPIOD7
IFP0PLLVDD
NV_GPIOD0
NO_TEST
NC_GPULPS
GPULNKON
GPU_FW_PME_L
NV_GPIOD5
GPU_TMDS_CKP
SI_SCL
GRAPH_IIC_SCL2
TMDS_D0M
FPD_PWR_ON
GPU_TMDS_CKM
GPU_TMDS_CKM
GPU_TMDS_CKP
GPU_TMDS_D2M
GPU_TMDS_D1P
GPU_TMDS_D2M
NO_TEST
NC_EXT_TMDS_D1P
CVBS_CNT
IFP0AVCC
GPU_TMDS_D2P
GPU_TMDS_D1M
GPU_TMDS_D0M
GPU_TMDS_D0P
IFP0AVCC
IFP0RSET
<XR_PAGE_TITLE>
R112
1 2
R157
1
2
R144
1
2
R85
1 2
R86
1 2
R98
1
2
R91
1
2
R92
1
2
C152
1
2
C119
1
2
R141
1
2
C189
1
2
C160
1
2
R184
1
2
C130
1
2
C125
1
2
C131
1
2
R564
1 2
R213
1 2
R237
1 2
R102
1 2
R119
1 2
R124
1 2
R115
1 2
R113
1 2
R107
1 2
R114
1 2
R208
1
2
R207
1
2
C618
1
2
D10
12
C626
1
2
R602
1
2
U39
M3
M2
G5
F4
G4
H5
H4
J4
J5
J6
K4
K6
AE7
AF6
V10
U10
V6
AA4
T6
T5
W2
V1
U4
T4
Y2
AA1
V3
W3
U5
V4
W5
Y4
AA2
Y3
W4
V5
AB3
AB2
Y6
W6
AC3
AC2
R6
R5
N10
P10
R4
P5
P4
R3
T2
U2
T3
U3
V2
AA3
L5
N5
AF10
N6
M6
Y5
AF9
AD4
G24
H2
H3
R592
1
2
R246
1
2
L2501
1 2
U20
1
3 2
C636
1
2
C2501
1
2
C635
1
2
R961
1 2
R962
1 2
R963
1 2
R964
1 2
R881
1 2
R947
1 2
R946
1 2
R960
1 2
R992
1 2
R999
1 2
R996
1 2
R993
1 2
R997
1 2
R994
1 2
R998
1 2
R995
1 2
R991
1 2
R990
1 2
R1019
1 2
R1020
1 2
R149
1
2
LAST_MODIFIED=Wed Sep 17 12:16:19 2003
59B8>
59B8>
59A8>
59B8>
59B8>
59A8>
59B8>
59A8>
52A6>
57D2>
57D2>
57D2>
57D2>
57D2>
57D2>
57D2>
57D2>
48C2<>
27C2<
57D2>
27C2<
27C2<
27C2<
57D2>
27C2<
27C2<
59D6>
57D2>
57D2>
27C2<
57D2>
57D2>
27C2<
57D2>
57D2>
57D2>
57D2>
57D2>
57D2>
52A6>
57D2>
57D2>
57D2>
57D2>
52A6>
52A6>
17D4<
51B1<>
22A6<
29A3<
29A8<
29B8<
24D7<>
23C2<
24C7<>
24A7<>
24C7<>
23C2<
24B7<>
24B7<>
25C6<
23C2<
23C2<
24D7<>
27C5<
23C2<
22A8<
23C2<
27C5<
24B7<>
51B3<
23C2<
23D3<>
23D3<>
23D3<>
23D3<>
23C2<
22B7<
23A6<
23D3<>
23D3<>
23D3<>
23D3<>
23C1<
SYM_VER-1
SYM_VER-2
SYM_VER-2
SYM_VER-2
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TD1P
TMDS/LVDS
DDC_VCC_3
TMDS_DDC_CLK
TD2P
TD2M
TD0P
TD0M
TCKP
TMDS_DDC_DAT
TCKM
INTERNAL TMDS CONNECTOR
TD1M
(518S0039)
INT_TMDS_3V
INT_TMDS_3V
INT_TMDS_3V
33
5%
1/16W
MF
402
402
MF
1/16W
1%
301
402
MF
1/16W
1%
301
402
1%
1/16W
MF
301
1/16W
301
402
1%
MF
2K
5%
402
MF
1/16W
0.01UF
CERM
10%
16V
402
0.01UF
CERM
10%
16V
402
FERR-250-OHM
SM
FERR-250-OHM
SM
F-ST-SM
FI-TWE21P-VF
+3V_MAIN
33
402
MF
1/16W
5%
XMIT_CHOKE
SM
90-OHM
XMIT_CHOKE
SM
90-OHM
XMIT_CHOKE
90-OHM
SM
XMIT_CHOKE
90-OHM
SM
XMIT_RES
0
XMIT_RES
0
XMIT_RES
0
XMIT_RES
0
XMIT_RES
0
XMIT_RES
0
XMIT_RES
0
XMIT_RES
0
2K
402
MF
1/16W
5%
1210
CERM
16V
10%
10UF
24 69
051-6497
13
TMDS_D2M
TMDS_D2P
TMDS_D0M
TMDS_D0P
TMDS_D1P
TMDS_D1M
GRAPH_DDC_SCL
GRAPH_DDC_SDA
TD1P
TMDS_CKP
TMDS_CKM
TD0M
TCKP
+3.3VFPD
TMDS_DDC_DAT
TD2M
TD0P
TCKM
TD1M
TMDS_DDC_CLK
DDC_VCC_3
TD2P
INT_TMDS_3V
<XR_PAGE_TITLE>
R551
1 2
R559
1
2
R570
1
2
R591
1
2
R600
1
2
R547
1
2
C652
1
2
C610
1
2
L82
1 2
L64
1 2
J12
22
23
1
10
11
12
13
14
15
16
17
18
19
2
20
21
3
4
5
6
7
8
9
R546
1 2
L67
1
2 3
4
L71
1
2 3
4
L74
1
2 3
4
L76
1
2 3
4
R603
1 2
R594
1 2
R550
1 2
R567
1 2
R568
1 2
R581
1 2
R593
1 2
R582
1 2
R540
1
2
C107
1
2
LAST_MODIFIED=Wed Sep 17 12:16:20 2003
59B8>
59B8>
59A8>
59B8>
59B8>
59B8>
59A8>
59A8>
52C4
57D2>
57D2>
57D2>
57D2>
57D2>
57D2>
57D2>
57D2>
43B7<
27C2<
27C2<
27C2<
27C2<
27C2<
27C2<
27C2<
27C2<
52B6>
59B8>
59C8>
43A7<
23D1<
23D1<
23D1<
23D1<
23D1<
23D1<
22D5<>
22D5<>
57C5>
23D1<
23D1<
57C5>
57C5>
51C1<>
59C6>
57C5>
57C5>
57C5>
57C5>
59C6>
52B6>
57C5>
52A6>
29A3<
CHASSIS
ALT
CHASSIS
ALT
LCFILTER
LCFILTER
LCFILTER
CHASSIS
ALT
CHASSIS
ALT
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SEE THE EXTERNAL DESIGN GUIDE FOR LAYOUT DETAILS.
EXTERNAL VGA
NEAR GRAPHICS CHIP RGB PINS
(BLU_RTN)
BY DACGND FROM THE GRAPHICS CHIP
MON_DETECT
(RED_RTN)
(GRN_RTN)
PLACE 75 OHM TERMINATIONS
THE RGB TRACES MUST BE GUARDBANDED
ANALOG_VSYNC*
ANALOG_HSYNC*
EXTERNAL VGA CONNECTOR
(514-0021)
ROUTE THE ANALOG RGB TRACES AT 75 OHMS.
FERR-250-OHM
SM
0.01UF
CERM
10%
16V
402
CERM
10%
16V
402
0.01UF
TH-4MT
F-RT-TCX3160-110200
33
5%
1/16W
MF
402
47PF
402
50V
CERM
5%
0.01UF
402
16V
10%
CERM
47PF
402
5%
CERM
50V
2K
1/16W
MF
402
5%
2K
1/16W
MF
402
5%
402
33
5%
1/16W
MF
SM-220MHZ
SM-220MHZ
CERM
50V
5%
22PF
402
SM-220MHZ
NOSTUFF
BAV99DW
SOT-363
NOSTUFF
BAV99DW
SOT-363
NOSTUFF
BAV99DW
SOT-363
NOSTUFF
BAV99DW
SOT-363
22PF
402
5%
50V
CERM
0.01UF
402
16V
10%
CERM
25 69
051-6497
13
USB_PWR
DDC_VCC_5
ANALOG_RED
ANALOG_GRN
ANALOG_BLU
MON_I2C_SCL
USB_PWR
MON_I2C_SDA
USB_PWR
FILT_ANALOG_BLU
FILT_ANALOG_RED
MON_DETECT
ANALOG_HSYNC*
ANALOG_VSYNC*
VGA_IIC_CLK
VGA_IIC_DAT
FILT_ANALOG_GRN
<XR_PAGE_TITLE>
L9
1 2
C423
1
2
C421
1
2
C422
1
2
C409
1
2
C432
1
2
C414
1
2
J9
15
16
17
18
1
10
11
12
13
14
2
3
4
5
6
7
8
9
R3
1 2
C416
1
2
C415
1
2
R19
1
2
R7
1
2
R2
1 2
FL3
1 2
3 4
FL2
1 2
3 4
FL4
1 2
3 4
D6
4
5
3
D7
4
5
3
D28
4
5
3
D27
4
5
3
LAST_MODIFIED=Wed Sep 17 12:16:21 2003
52C4
52C4
36C1<
36C1<
36C1<>
36C1<>
36B6<>
36B6<>
36B6<
36B6<
36B2<
36B2<
36A7<>
36A7<>
33D4<
33D4<
33D2<
33D2<
33C4<
33C4<
33C2<
52A3>
52A3>
52A3>
59B8>
59B8>
33C2<
33B4<
33A6<>
33A6<>
33A6<>
57D5>
57D5>
33B4<
33B2<
25D3<>
59B8>
57D5>
57D5>
57D5>
25D3<>
25C2<
59B8>
59B8>
59D6>
26B5<
26B5<
59B8>
33B2<
25B3<>
25B5<>
52A6>
22C7<>
22C7<>
22C7<>
22D5<>
25C2<
22D5<>
25B5<>
57D5>
57D5>
23D7<>
22D7<
22D7<
59B6>
59B6> 57D5>
25C3<
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
1101 = 275MHZ SAMSUNG
[3..0] = [NV11_HSYNC,NV11_VSYNC,GPU_STRAP<3>,GPU_STRAP<2>]
(8) FRAME BUFFER MEMORY TYPE
0 = SYSTEM BIOS (VENDOR & SUBSYSTEM ID=0X0000)
1 = ADAPTER CARD VGA BIOS (VENDOR & SUBSYSTEM ID=0X54-0X57)
(9) SUB-VENDOR
[0] = [GPU_STRAP<1>]
1 = DISABLE
FASTWR
0 = ENABLE
(10) PCI ADDRESS BUS
[0] = [GPU_STRAP<0>]
(4) USER DEFINED STRAPS
THESE BITS ARE UNDEFINED BUT THEY
(6) AGP SIDEBAND
0010 = 0X112 GEFORCE2 GO
0000 = 0X110 GEFORCE2GO MX (NV11B)
1001 = NV18B,NV31,NV34
[0] = [VIPHCTL]
1100 = 275MHZ HYNIX
[0] = [VIPD7]
*
*
[1..0] = [ROMA15,ROMA14]
(1) ROM TYPE (OVERRIDDEN IF STRAP1 = 0)
*
*
(5) HOST MODE
00 = PARALLEL
01 = SERIAL AT25F
10 = SERIAL SST45VF
11 = SERIAL FUTURE
0 = ENABLE AGP SIDEBAND
1 = DISABLE AGP SIDEBAND
0 = PCI MODE
1 = AGP MODE
1111 = 222MHZ
NVIDIA STRAPS 1
0100 = 0X114 NV17M
[3..0] = [DVOHSYNC,VIPD3,VIPD5,VIPD4]
(3) PCI DEVICE ID
0011 = 0X113 QUADRO2 GO
10 = 27MHZ
00 = 13.5MHZ
*
01 = 14.38MHZ
11 = {UNDEFINED}
[1..0] = [VIPD6,VIPD2]
(2) CRYSTAL FREQUENCY SELECT
MUST BE KEPT LOW DURING RESET
[3..0] = [VIPHAD1,VIPHAD0,VIPD1,VIPD0]
[1..0] = [ANALOG_HSYNC*,ANALOG_VSYNC*]
(THESE RESISTORS ARE ALL NOSTUFF)
(7) TV MODE
*
10 = PAL
11 = DISABLED
00 = SECAM
01 = NTSC
0 = REVERSED
1 = NORMAL
*
*
1K
402
MF
1/16W
1%
+3V_MAIN
1%
402
MF
1/16W
10K
402
MF
1/16W
1K
1%
1%
1/16W
402
MF
10K
1/16W
1K
MF
402
1%
NOSTUFF
5%
402
MF
1/16W
10K
1/16W
5%
402
MF
10K
TMDS_XMIT_SI
TMDS_XMIT_GPU
1K
402
1/16W
MF
1%
1K
1/16W
MF
402
1%
+3V_MAIN
1%
402
MF
1/16W
10K
NOSTUFF
1/16W
5%
402
MF
10K
NOSTUFF
1K
1/16W
MF
402
1%
1/16W
MF
402
1%
1K
+3V_MAIN
1%
402
MF
1/16W
10K
NOSTUFF
402
MF
1/16W
1K
1%
+3V_MAIN
MF
1K
402
1/16W
1%
+3V_MAIN
10K
1/16W
MF
402
5%
NOSTUFF
10K
5%
1/16W
MF
402
NOSTUFF
NOSTUFF
1/16W
MF
402
1K
1%
NOSTUFF
402
MF
1/16W
1K
1%
1%
SEE_TABLE
1/16W
402
MF
10K
1%
SEE_TABLE
402
MF
1/16W
10K
+3V_MAIN
1%
SEE_TABLE
1/16W
MF
402
10K
1%
SEE_TABLE
1/16W
402
MF
10K
SEE_TABLE
MF
1/16W
402
1K
1%
1K
402
MF
1/16W
SEE_TABLE
1%
1/16W
SEE_TABLE
402
MF
1K
1%
MF
SEE_TABLE
1/16W
402
1K
1%
1%
402
MF
1/16W
1K
+3V_MAIN
1%
1/16W
MF
402
10K
NOSTUFF
402
MF
1/16W
1%
10K
1%
SEE_TABLE
402
MF
1/16W
10K
1%
402
1/16W
SEE_TABLE
10K
MF
1/16W
5%
402
MF
10K
NV18B
SEE_TABLE
1K
1/16W
MF
402
1%
402
SEE_TABLE
1K
1/16W
MF
1%
1%
NV34
1K
1/16W
MF
402
+3V_MAIN
+3V_MAIN
1%
1/16W
MF
402
10K
1%
1/16W
MF
402
10K
NOSTUFF
1/16W
MF
402
1K
1%
NOSTUFF
402
MF
1/16W
1K
1%
+3V_MAIN
1%
402
MF
1/16W
10K
RES,10KOHM,1%,0402
114S1004
SAMSUNG_NV18B_270
R598,R583,R77,R236,R535
5
13
051-6497
6926
RES,1KOHM,1%,0402
R73
SAMSUNG_NV18B_270
1
114S1003
HYNIX_NV18B_270
RES,10KOHM,1%,0402
114S1004
4
R598,R583,R236,R535
R583,R74,R77,R535
114S1004
RES,10KOHM,1%,0402
HYNIX_NV34_270
4
RES,1KOHM,1%,0402
HYNIX_NV18B_270
2
114S1003 R73,R79
RES,10KOHM,1%,0402
R598,R583,R535,R74,R77
114S1004
SAMSUNG_NV34_270
5
R597,R1022
RES,1KOHM,1%,0402
114S1003
2
HYNIX_NV34_270
RES,1KOHM,1%,0402
114S1003 R1022
1
SAMSUNG_NV34_270
ANALOG_HSYNC*
GPU_STRAP<2>
DVOD8
GPU_STRAP<1>
VIPD4
NV11_VSYNC
VIPD0
VIPHAD1
VIPHAD0
VIPD3
ROMA15
ANALOG_VSYNC*
DVOD2
VIPD7
ROMA14
VIPD6
VIPD5
DVOHSYNC
VIPHCTL
GPU_STRAP<3>
NV11_HSYNC
DVOD3
VIPD2
VIPD1
GPU_STRAP<0>
<XR_PAGE_TITLE>
R553
1
2
R561
1
2
R552
1
2
R560
1
2
R134
1
2
R100
1
2
R533
1
2
R116
1
2
R125
1
2
R126
1
2
R445
1
2
R401
1
2
R408
1
2
R449
1
2
R399
1
2
R542
1
2
R541
1
2
R397
1
2
R596
1
2
R595
1
2
R136
1
2
R427
1
2
R439
1
2
R443
1
2
R426
1
2
R77
1
2
R74
1
2
R598
1
2
R583
1
2
R79
1
2
R73
1
2
R588
1
2
R597
1
2
R87
1
2
R94
1
2
R142
1
2
R535
1
2
R236
1
2
R543
1
2
R1022
1
2
R1023
1
2
R1021
1
2
LAST_MODIFIED=Wed Sep 17 12:16:22 2003
59B8>
59B8>
57D5>
57C2>
57D5>
57C2>
57C2>
25D6<>
27C5<
25C6<>
27C5<
27B5<
27C5<
22D7<
22B4<>
22B5<>
22B4<>
22D4<>
22C4<>
22D4<>
22D5<>
22D5<>
22D4<>
18C8<
22D7<
22C5<>
22D4<>
18C8>
22D4<>
22D4<>
22C5>
22D5<>
22B4<>
22C4<>
22B5<>
22D4<>
22D4<>
22B4<>
PAD
THRML
GND
SDA/DK0
SCL/DK1
AGND
PD*
EDGE/HTPLG
DE
HSYNC
VSYNC
IDCK+
IDCK-
D11
D10
D2
D3
D4
D5
D6
D7
D8
D9
D1
D0
GND
GND
AVCC
PVCC2
PVCC1
VCC
AVCC
VCC
EXT_SWING
VREF
TX1+
TX2-
TX1ÂTX2+
TX0+
TX0-
TXC-
TXC+
MSEN
PGND
AGND
PGND
AGND
CTL3/A2
ISEL/RST*
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
DRAWING
PLL NOISE SHOULD BE LESS THAN 100MV PEAK-TO-PEAK
SILICON IMAGE 1162 TMDS
NC
IPD
IPD
IPD
NC
RESISTORS ON PAGE 25
PLACE TMDS RESISTORS ON OPPOSITE SIDE TO TMDS
HIGHER
NOTE:
330OHM HI SWING
RESISTOR MAY NEED TO BE
UNDEFINED RESET CONFIGURATION STRAPS
NVIDIA STRAPS 2
TMDS_XMIT_SI_P
1/16W
4.7K
MF
402
5%
TMDS_XMIT_SI_P
1/16W
4.7K
MF
402
5%
4.7K
1/16W
NOSTUFF
MF
402
5%
SM
FERR-EMI-100-OHM
TMDS_XMIT_SI_P
TMDS_XMIT_SI_P
20%
805
6.3V
CERM
10UF
+3V_MAIN
+3V_MAIN
TMDS_XMIT_SI_P
4.7K
1/16W
MF
402
5%
4.7K
NOSTUFF
1/16W
MF
402
5%
1/16W
22
TMDS_XMIT_SI
MF
402
5%
22
TMDS_XMIT_SI
22
TMDS_XMIT_SI
22
TMDS_XMIT_SI
22
TMDS_XMIT_SI
22
TMDS_XMIT_SI
22
TMDS_XMIT_SI
TMDS_XMIT_SI
22
4.7K
1/16W
NOSTUFF
MF
402
5%
SI_SWING_HI
1/16W
0
MF
402
5%
SI_SWING_LO
0
1/16W
MF
402
5%
1/16W
SEE_TABLE
1K
MF
402
1%
1K
SI_SWING_LO
1/16W
MF
402
1%
10K
MF
402
1/16W
1%
+3V_MAIN
1/16W
10K
MF
402
1%
1/16W
10K
MF
402
1%
1/16W
10K
MF
402
1%
1/16W
10K
MF
402
1%
1/16W
10K
MF
402
1%
1/16W
10K
MF
402
1%
10K
1/16W
MF
402
1%
10K
1/16W
MF
402
1%
TMDS_XMIT_SI_P
1/16W
330
MF
402
5%
TMDS_XMIT_SI_P
CRITICAL
SIL1162
TSSOP
TMDS_XMIT_SI_P
20%
805
6.3V
CERM
10UF
TMDS_XMIT_SI_P
5%
402
50V
CERM
100PF
TMDS_XMIT_SI_P
5%
402
50V
CERM
100PF
50V
TMDS_XMIT_SI_P
5%
402
CERM
100PF
TMDS_XMIT_SI_P
100PF
CERM
50V
402
5%
5%
402
50V
CERM
100PF
TMDS_XMIT_SI_P
TMDS_XMIT_SI_P
SM
FERR-EMI-100-OHM
10UF
CERM
6.3V
20%
805
TMDS_XMIT_SI_P
TMDS_XMIT_SI_P
FERR-EMI-100-OHM
SM
TMDS_XMIT_SI_P
100PF
CERM
50V
402
5%
TMDS_XMIT_SI_P
20%
805
6.3V
CERM
10UF
1/16W
4.7K
NOSTUFF
MF
402
5%
1/16W
NOSTUFF
4.7K
MF
402
5%
1
114S1003
SI_SWING_LO
RES,1K,1%,1/16W,0402
R1003
SI_SWING_HI
R1003
RES,0 OHM,1%,1/16W,0402
1
116S1000
13
051-6497
6927
TMDS_CKM
TMDS_D0M
TMDS_D1M
SI_TMDS_D2P
3V_SI_PLLVCC
3V_SI_VCC
3V_SI_AVCC
SI_SCL
DVOD7
DVOHSYNC
SI_SCA
DVOD4
DVOCLKOUT*
AGP_RESET_L
DVOVSYNC
DVOCLKOUT
DVOD11
DVODE
DVOD9
DVOD10
DVOD8
DVOD6
DVOD5
DVOD3
DVOD1
DVOD2
DVOD0
SI_TMDS_D2M
SI_TMDS_D1M
SI_TMDS_D0M
SI_TMDS_D0P
SI_TMDS_D1P
SI_TMDS_CKP
SI_TMDS_CKM
TMDS_D2M
TMDS_D2P
TMDS_D0P
TMDS_D1P
TMDS_CKP
SI_IDCK_M
SI_EXT_SWING_SET
SI_VREF
3V_SI_VCC
DVOD7
DVOD9
DVOD10
DVOD11
DVOD6
DVOD5
DVOD4
DVOD0
DVOD1
SI_EDGE
SI_I2C_OFF
<XR_PAGE_TITLE>
R248
1
2
R548
1
2
R250
1
2
R241
1
2
R563
1
2
R243
1
2
R238
1
2
R244
1
2
R537
1
2
R972
1
2
U1
374331
34
40
24
18
17
6
5
16
15
14
13
10
9
8
7
19
44
30
4231
20
12
11
25
48
47
29
45
28
46
27
26
49
36
35
39
38
42
41
33
32
3
22
2
21
C984
1
2
C786
1
2
C583
1
2
C557
1
2
C449
1
2
C366
1
2
L88
1 2
C325
1
2
L4
1 2
C360
1
2
C272
1
2
R969
1
2
R971
1
2
R967
1
2
R970
1
2
R968
1
2
L87
1 2
C113
1
2
R966
1
2
R965
1
2
R976
1 2
R980
1 2
R975
1 2
R979
1 2
R974
1 2
R978
1 2
R973
1 2
R977
1 2
R1001
1
2
R1002
1
2
R1000
1 2
R1003
1
2
R1004
1
2
LAST_MODIFIED=Wed Sep 17 12:16:24 2003
59A8>
59A8>
59B8>
59B8>
59B8>
59B8>
59B8>
59A8>
57D2>
57D2>
57D2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57D2>
57D2>
57D2>
57D2>
57D2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
24A7<>
24B7<>
24C7<>
27A8<
26D7<
27A8<
44D3<
27A8<
27A8<
27A8<
26B1<
27A8<
27A8<
26D1<
27A8<
26D1<
27A8<
24D7<>
24D7<>
24B7<>
24C7<>
24B7<>
27C5<
27C5<
27B5<
27B5<
27C5<
27C5<
27C5<
27C5<
27C5<
23D1<
23D1<
23D1<
57C2>
27B2<
23D2<
22B5<>
22C5>
23D2<
22B5<>
22C5<>
17B8<
22C5>
22C5>
22B5<>
22C5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22C5<>
22C5<>
22C5<>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
57C2>
23D1<
23D1<
23D1<
23D1<
23D1<
27D3<
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22C5<>
22C5<>
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VSSA_8
VSSA4
VSSA3
VSSA2
VSSA1
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VDD15A_8
VDD15A_4
VDD15A_3
VDD15A_2
VDD15A_1
CPU_INT
PCIPME
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
GPIO16
GPIO15
GPIO12
GPIO11
GPIO9
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSSU_2 VDDU33_2
VDDU33_1
(6 OF 9)
SCCRTSA
SCCTXDA
SCCDTRA
SCCRXDA
SCCGPIOA
SCCTRXCA
SCCTXDB
SCCGPIOB
SCCTRXCB
SCCRXDB
SCCRTSB
PURPOSE
GENERAL
I/O’S
EXTINT8
EXTINT7
EXTINT6
EXTINT0
INTERRUPTS
EXTINT11
EXTINT4
EXTINT5
EXTINT10
EXTINT9
EXTINT3
EXTINT2
EXTINT1
AUD_DTO
AUD_DTI
AUD_SYNC
MOD_DTO
AUD_BITCLK
AUD_CLKOUT
IICCLK_2
MOD_SYNC
MOD_DTI
MOD_CLKOUT
IICDATA_2
MOD_BITCLK
IIC
AUDIO/I2S
CLOCKS
XTAL_OUT
PROCSLEEPREQ
PENDPROCINT
XTAL_IN
SS_REF_CLK_IN
BUF_REF_CLK_OUT
STOPXTAL
WATCHDOG
PCI_
PCI_
PCI_
VSSU_1
PCI_
USB_VD0_P
USB_VD0_N
USB_VD1_P
USB_VD1_N
USB_VD2_N
USB_VD2_P
USB_PWRFLT0
USB_PRTPWR0
USB_VD3_N
USB_VD3_P
USB
USB_PRTPWR1
USB_PWRFLT1
USB_VD4_N
USB_VD4_P
USB_VD5_N
USB_VD5_P
USB_PRTPWR2
USB_PWRFLT2
ADJ
BYP
GND
OUT
NC
NC
SHDN
IN
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(USB2.0 IRQ)
SPARE
TOO MANY MODS TO LIST, SEE INTREPID ERS
CONFIGURED FOR INTREPID VERSION 1
GPIO & INTERRUPT PULL-UPS
REQ*
ACK*
HWPLL_TESTMUXSEL[0:5]
PLL TEST FUNCTION
(518S0104)
(ON PAGE 12)
SCC/USB/I2S
AUDIO_TO_SND
USB PULL-UPS
INTREPID GPIO/
(INTREPID JTAG TDO)
INTREPID DEBUG HOOKS
MOSI
SCK
SPARE
VIEW AGP CLOCK OUT LA CLOCK PIN
I2C 2 PULL-UPS
MISO
VIA
+3V_MAIN
N20P80%
10V
CERM
805
4.7UF
5%
1/16W
SM1
10K
+3V_MAIN
402
10V
20%
CERM
0.1UF
402
16V
CERM
10%
0.01UF
SEE_TABLE
BGA
INTREPID
1/16W
5%
MF
402
4.7K
402
5%
1/16W
MF
4.7K
CERM
20%
402
10V
0.1UF
MF
402
5%
4.7
1/16W
10V
CERM
20%
402
0.1UF
402
5%
1/16W
MF
4.7
10V
CERM
20%
402
0.1UF
MF
1/16W
5%
4.7
402
10V
CERM
20%
402
0.1UF
402
10V
CERM
20%
0.1UF
MF
1/16W
5%
402
4.7
MF
5%
402
1/16W
4.7
8X4.5MM-SM
18.432M
CRITICAL
50V
CERM
402
27pF
5%
402
CERM
50V
5%
27pF
5%
1/16W
402
MF
0
NOSTUFF
NOSTUFF
F-ST-SM
U.FL-R_SMT
402
5%
1/16W
MF
51
NOSTUFF
5%
1/16W
MF
402
0
10%
603
10V
X5R
1UF
MF
1/16W
1%
402
56.2K
MF
1/16W
1%
15.8K
402
10UF
CERM
6.3V
20%
805
5%
1/16W
MF
603
0
NOSTUFF
603
MF
1/16W
5%
0
+2_5V_MAIN
+1_8V_MAIN
MSOP
LT1962-ADJ
16V
402
10%
0.01uF
CERM
5%
NOSTUFF
402
1/16W
MF
0
NOSTUFF
402
MF
1/16W
5%
10M
1%
MF
402
1K
1/16W
402
MF
1%
1K
1/16W
NOSTUFF
1K
MF
402
1%
1/16W
NOSTUFF
1K
402
MF
1%
1/16W
MF
402
1%
1K
1/16W
402
MF
1%
1K
1/16W
+3V_MAIN
MF
402
1%
1K
1/16W
402
MF
NOSTUFF
1%
1K
1/16W
NOSTUFF
1K
MF
402
1%
1/16W
1K
402
MF
NOSTUFF
1%
1/16W
1K
MF
402
NOSTUFF
1%
1/16W
1K
402
MF
1%
1/16W
1%
1/16W
MF
402
10K
1%
MF
1/16W
402
10K
1%
402
1/16W
MF
10K
MF
402
1%
1K
1/16W
402
MF
1%
1K
1/16W
NOSTUFF
1K
MF
402
1%
1/16W
1K
402
MF
NOSTUFF
1%
1/16W
+3V_MAIN
1%
MF
1/16W
402
10K
1%
402
MF
1/16W
10K
5%
SM1
10K
1/16W
5%
1/16W
SM1
10K
1/16W
5%
SM1
10K
1/16W
5%
SM1
10K
NOSTUFF
SM1
1/16W
5%
10K
+3V_MAIN
10K
SM1
1/16W
5%
1/16W
5%
SM1
10K
5%
10K
SM1
1/16W
10K
SM1
1/16W
5%
SM1
1/16W
5%
10K
SM1
5%
10K
1/16W
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
+3V_MAIN
47
47
47
47
USB1
24
402
USB1
24
402
USB1
24
402
USB1
24
402
USB1
24
402
USB1
24
402
24
402
402
24
22
402
22
402
402
1/16W
MF
5%
15K
402
5%
1/16W
MF
15K
22
402
402
22
402
1/16W
MF
1%
10K
1%
MF
1/16W
402
10K
402
1/16W
MF
1%
10K
UNUSED_EXTINT8
+3V_MAIN
1%
10K
1/16W
MF
402
1%
1/16W
MF
402
10K
NOSTUFF
402
1/16W
5%
MF
15K
402
15K
5%
1/16W
MF
402
10V
CERM
20%
0.1UF
CERM
10V
20%
402
0.1UF
10V
20%
CERM
402
0.1UF
10V
CERM
20%
402
0.1UF
10V
20%
402
0.1UF
CERM
SM SM SM SM SM
1%
1/16W
MF
402
10K
15K402
USB2
15K402
USB2
402
USB2
15K
15K402
USB2
15K402
USB2
15K402
USB2
1%
10K
MF
402
1/16W
MF
1/16W
1K
402
1%
1%
1/16W
402
10K
MF
SM
FERR-EMI-100-OHM
6928
051-6497
13
33SLOTB_INT_L
33SLOTB_INT_L
33SLOTB_INT_L
UNUSED_EXTINT8
SND_SPKR_ID
CLK18M_INT_EXT
UNUSED_EXTINT7
UNUSED_EXTINT7
INT_EXTINT3_PU
ENET_ENERGY_DET
CLK18M_INT_XIN
USB_DAN
SND_HW_RESET_L
INT_GPIO1_PD
INT_GPIO12_PU
PMU_INT_L
INT_EXTINT13_PU
EXTINT14
PMU_REQ_L
PMU_INT_NMI
NO_TEST
NC_RPT77P6
NO_TEST
NC_RP2848
NO_TEST
NC_CBUS_INT_L
INT_EXTINT3_PU
INT_EXTINT17_PU
INT_EXTINT12_PU
INT_GPIO9_PU
COMM_RING_DET_L
JTAG_INTRP_TDO
INT_MOD_BITCLK
INT_TST_PLLEN_PD
USB_DFN
USB_PWR_FLT*
USB_PWREN_CD_L
JTAG_ASIC_TDI
INT_MOD_DTI
INT_MOD_SYNC
INT_MOD_CLKOUT
INT_MOD_DTO
AUDIO_TO_SND
USB_DBN
USB_DDN
USB_DDP
USB_DCP
USB_DBP
+1_5V_INTREPID_PLL1
+1_5V_INTREPID_PLL3
+1_5V_INTREPID_PLL8
CLK18M_INT_XO
USB_DDN_F_TERM
MODEM_USB_DP
MODEM_USB_DM
BT_USB_DP
BT_USB_DM
SND_TO_AUDIO
SND_CLKOUT
SND_SCLK
SND_SYNC
SYSTEM_CLK_EN
INT_WATCHDOG_L
USB_DDP_F_TERM
INT_MOD_SYNC
CLK18M_INT_XOUT
INT_PROC_SLEEP_REQ_L
USB_DFP
SNF_FSEL
COMM_TRXC
VCORE_VGATE
NO_TEST
NC_RP3319
COMM_GPIO_L
NO_TEST
NC_RPT48P1
INT_PLL9_GND
INT_I2C_DATA2
USB_PWR_FLT*
NO_TEST
NC_RP3324_2
ENET_ENERGY_DET
INT_ENET_RST_L
COMM_SHUTDOWN
USB_PWREN_EF_L
USB_OC_EF_L
USB_DEN
USB_DEP
USB_PWREN_AB_L
USB_DCN
USB_DAP
NO_TEST
INT_PLL9_GND
+1_5V_INTREPID_PLL4
NO_TEST
INT_PLL7_GND
NO_TEST
INT_PLL2_GND
NO_TEST
INT_PLL1_GND
NO_TEST
INT_PLL3_GND
PMU_TO_INT
PMU_CLK
COMM_RXD
COMM_TRXC
NC_BRCLKO
INT_PEND_PROC_INT
INT_I2C_CLK2
INT_I2C_DATA2
INT_MOD_BITCLK
INT_MOD_CLKOUT
INT_MOD_DTI
INT_SND_CLKOUT
INT_MOD_DTO
INT_SND_SCLK
INT_SND_SYNC
INT_SND_TO_AUDIO
VCORE_VGATE
PMU_INT_NMI
AGP_INT_L
COMM_RING_DET_L
PMU_INT_L
PMU_REQ_L
PMU_ACK_L
PMU_FROM_INT
COMM_GPIO_L
COMM_RTS_L
COMM_TXD_L
+3V_INTREPID_USB
SNF_FSEL
INT_GPIO1_PD
COMM_SHUTDOWN
COMM_RESET_L
FWPHYRST
SND_HP_MUTE_L
SND_AMP_MUTE_L
INT_GPIO9_PU
SND_HW_RESET_L
UNUSED_GPIO15
INT_GPIO12_PU
EXTINT14
PMU_PME_L
USB_DCN_F
USB_DCP_F
USB_DBN_F
USB_DBP_F
USB_DAN_F
USB_DAP_F
USB_DAP
USB_DBN
USB_DBP
USB_DCP
USB_DCN
USB2_CRUN_L_INT
INT_MOD_DTI
NO_TEST
NC_UT6P6
LT1962_INT_ADJ
INT_PLL1_GND
INT_PLL2_GND
INT_PLL3_GND
INT_PLL7_GND
+1_5V_INTREPID_PLL
NO_TEST
NC_UT6P7
INT_MOD_SYNC
INT_MOD_BITCLK
INT_MOD_DTO
INT_MOD_CLKOUT
LT1962_INT_VIN
USB_OC_EF_L
USB_PWREN_EF_L
USB_PWREN_AB_L
USB_PWREN_CD_L
FW_C_LKON
AGP_INT_L
LT1962_INT_BYP
INT_I2C_CLK2
UNUSED_GPIO15
+1_5V_INTREPID_PLL2
USB_DAN
COMM_DTR_L
MPIC_CPU_INT_L
INT_ENET_RST_L
USB2_CRUN_L_INT
INT_EXTINT12_PU
INT_EXTINT13_PU
INT_EXTINT17_PU
INT_REF_CLK_IN_PD
SND_LIN_SENSE_L
SND_HP_SENSE_L
<XR_PAGE_TITLE>
L16
1 2
C795
1
2
C785
1
2
C820
1
2
RP60
1
2
3
4
8
7
6
5
U25
P2
R5
R7
R4
T5
U15
D30
F33
E34
B32
E30
J9
F4
D1
E2
H7
G4
C33
D34
B33
A33
E31
G30
D31
C32
G5
E1
J5
K8
F1
K7
J7
F2
J8
H5
L9
H4
AL4
AH8
V8
P1
T4
R2
R1
AJ7
AA16
AJ12
AJ17
AJ18
AN8
AT6
AF10
AG9
AP4
AN3
AL5
AG11
AG10
AT4
AM5
AF9
AR4
K9
AN7
J4
J2
M5
K4
J1
N7
L7
L8
G1
G2
H1
H2
M8
M7
L5
K5
N8
P8
AG29
T8
U8
AA15
AJ13
AJ16
AK18
AH29
R9
R8
AT7
U4
V15
R641
2 1
R264
2 1
C229
1
2
R565
1 2
C692
1
2
R620
1 2
C703
1
2
R628
1 2
C713
1
2
C704
1
2
R630
1 2
R629
1 2
Y5
1 2
C840
1
2
C784
1
2
R666
1 2
J23
3
2
1
R611
1
2
R711
1
2
C234
1
2
R590
1
2
R586
1
2
C233
1
2
R571
1 2
R572
1 2
U19
2
3
4
8
6
7
1
5
C623
1
2
R747
1 2
R672
1 2
R274
1
2
R291
1
2
R661
1
2
R727
1
2
R292
1
2
R289
1
2
R678
1
2
R231
1
2
R735
1
2
R708
1
2
R276
1
2
R574
1
2
R710
1
2
R683
1
2
R660
1
2
R228
1
2
R232
1
2
R577
1
2
R573
1
2
R746
1 2
R680
1 2
RP113
1
2
3
4
8
7
6
5
RP74
1
2
3
4
8
7
6
5
RP100
1
2
3
4
8
7
6
5
RP110
1
2
3
4
8
7
6
5
RP66
1
2
3
4
8
7
6
5
RP39
2 7
RP39
1 8
RP39
3 6
RP39
4 5
RP117
4 5
RP117
1 8
RP117
3 6
RP117
2 7
RP108
1 8
RP108
3 6
RP108
2 7
RP108
4 5
R724
1 2
R718
1 2
R742
1 2
R736
1 2
R723
1 2
R728
1 2
R691
1 2
R694
1 2
R762
1 2
R763
1 2
R651
1
2
R650
1
2
R272
1 2
R271
1 2
R749
1 2
R750
1 2
R306
1 2
R294
1
2
R267
1
2
R3002
1
2
R3001
1
2
C3001
1
2
C3002
1
2
C3003
1
2
C3004
1
2
C3005
1
2
XW42
1
2
XW43
1
2
XW44
1
2
XW45
1
2
XW46
1
2
R589
1 2
R305
1 2
R396
1 2
R247
1 2
R398
1 2
R333
1 2
R493
1 2
R1005
1 2
R755
2 1
R756
2 1
LAST_MODIFIED=Wed Sep 17 12:16:27 2003
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DRAWING
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
’KITCHEN SINK’ CONNECTOR
BLUETOOTH CONNECTOR
WE ARE SET TO ADDR= AC
PIN 35 IIC ADDRESS
(515S0120)
(518-0098)
(CE*)
SERIAL DOWNLOAD CONNECTOR
& SERIAL DOWNLOAD
SERIAL DOWNLOAD INTERFACE
BLUETOOTH CARD MOUNTING HARDWARE SUPPORT
(DASH II)
MODEM BOARD CONNECTOR
MODEM, BLUETOOTH,
515S1392
(SCLK)
(BUSY)
(RXD)
(TXD)
KITCHEN SINK
+12V NEEDS TO BE 25 MIL TRACE
FURTHEST FROM J28
BS4 SHORTEST STANDOFF
(516S0093)
MODEM STANDOFF SUPPORT
INVERTER,LCD,LED & FAN POWER)
LOW FOR LOADING CODE
(MICROPHONE,INTERNAL SPEAKER CONNECTIONS
STDOFF-197OD-236H-TH
5%
402
1/16W
MF
4.7K
SM-2MT-6MM-HT
STDOFF-197OD-236H-TH
+3V_MAIN
NOSTUFF
Y5V
10V
N20P80%
805
10UF
CERM
0.1uF
20%
10V
402
+5V_MAIN
10UF
805
N20P80%
10V
Y5V
NOSTUFF
CERM
402
10V
20%
0.1uF
1%
402
MF
1/16W
10K
402
MF
1/16W
5%
15K
402
MF
1/16W
5%
15K
5%
50V
CERM
402
100PF
CERM
50V
5%
402
100PF
SM
FERR-250-OHM
FW_12V
SM
1000-OHM-EMI
SM
FERR-250-OHM
402
16V
10%
CERM
0.01UF
402
25V
CERM
5%
220PF
402
16V
10%
CERM
0.01UF
402
16V
10%
CERM
0.01UF
402
25V
5%
CERM
220PF
CERM
16V
10%
402
0.01UF
402
25V
CERM
5%
220PF
SM
FERR-250-OHM
SM
FERR-250-OHM
SM
FERR-250-OHM
10V
10UF
N20P80%
Y5V
805
SM
FERR-250-OHM
+5V_SLEEP
SM
FERR-250-OHM
+5V_MAIN
35V
10UF
TANT
20%
SMD
10V
402
20%
CERM
0.1uF
+3V_MAIN
6.3V
CERM
20%
NOSTUFF
10UF
805
MF
1/16W
402
1%
10K
MF
1/16W
402
1%
10K
MF
1/16W
402
1%
10K
1%
MF
1/16W
402
10K
OMIT
SM
1%
402
1/16W
MF
10K
FF
1210
1%
1/4W
82.5
FERR-250-OHM
SM
SM
FERR-250-OHM
STDOFF-197OD-236H-TH
STDOFF-197OD-236H-TH
F-ST-SM
53307-1090
SEE_TABLE
M-ST-TH
CRITICAL
HL55091
402
CERM
10V
20%
0.1UF
NOSTUFF
FW_24V
0
5%
1/16W
MF
603
SM
FERR-250-OHM
FW_24V
BS1,BS2
2
860-1034
STDOFF-19709-236H-TH
860-0170
STDOFF,BLUETOOTH,SHORT
BS4
1
1
CRITICAL
J14
516-0031
CONN,HDR,STR,2MMPITCH,16P,PEG
KITCH_SINK_16P
1
KITCH_SINK_18P
CRITICAL
J14
CONN,HDR,STR,2MMPITCH,18P,PEG
518-0098
6929
051-6497
13
860-0171
STDOFF,BLUETOOTH,LONG
BS3
1
KS_INT_SPKR-_FILT
KS_INT_SPKR+_FILT
LED_5V_FILT
INV_CUR_HI_FILT
PMU_POWER
LAMP_STS_FILT
LED_RET_FILT
IIC_ADD
NO_TEST
NC_DAA_CLKOUT
NC_-10VUNREG
NO_TEST
NO_TEST
NC_DAA_LOADOUT
NO_TEST
NC_AUD_MODEM
18P_GND
FW_PWR
FAN_12V_FILT
KS5VSD
PMU_P64
RESET_BUTTON*
NC_AUD_MODEM_RTN
NO_TEST
NO_TEST
NC_AUDIO2MODEM
MICHIGH
MICLOW
LCD_PWM_FILT
+12V_SLEEP
LID_SWITCH
PMU_RST*
NMI_BUTTON*
COMM_SHUTDOWN
COMM_DTR_L
COMM_TXD_L
COMM_TRXC
INT_I2C_CLK2
INT_I2C_DATA2
COMM_RTS_L
COMM_RXD
COMM_GPIO_L
COMM_RING_DET_L
+12V_SLEEP
MODEM_USB_DP
MODEM_USB_DM
KS_INT_SPKR+
KS_INT_SPKR-
+12V_SLEEP
LED_RET
LAMP_STS
INV_CUR_HI
BT_USB_DM
BT_USB_DP
NO_TEST
NC_PMU_DL_12
NC_PMU_DL_10
NO_TEST
NO_TEST
NC_BT6
NO_TEST
NC_BT5
NO_TEST
NC_BT4
NC_BT3
NO_TEST
NO_TEST
NC_BT1
NO_TEST
NC_BS4
NO_TEST
NC_BS3
NO_TEST
NC_BS2
NO_TEST
NC_BS1
NC_AUDIO2MODEMRTN
NO_TEST
NO_TEST
NC_-12VREG
COMM_RESET_L
PMU_EPM*
PMU_AP
PMU_CNVSS
NO_TEST
NC_MODEM_DETECT_L
+12VSD_FILT
MICSHLD
LCD_PWM
LED_5V
<XR_PAGE_TITLE>
BS2
1
R584
1
2
J13
43
44
1
6
7 8
9
10
11 12
13 14
15
2
16
17 18
19 20
21 22
23 24
25
3
26
27 28
29 30
31 32
33 34
35
4
36
37 38
39 40
5
BS1
1
C622
1
2
C621
1
2
C619
1
2
C620
1
2
R585
1
2
R328
1
2
R329
1
2
C640
1
2
C639
1
2
L73
1 2
L66
1 2
L69
1 2
C609
1
2
C615
1
2
C601
1
2
C608
1
2
C614
1
2
C627
1
2
C630
1
2
L72
1 2
L77
1 2
L70
1 2
C625
1
2
L75
1 2
L65
1 2
C629
1
2
C314
1
2
C312
1
2
R669
1
2
R668
1
2
R670
1
2
R706
1
2
J24
1
10
11 12
2
3 4
5 6
7 8
9
R705
1
2
R613
1
2
L80
1 2
L78
1 2
BS3
1
BS4
1
J28
1
10
2
3
4
5
6
7
8
9
J14
1
10
11 12
13 14
15 16
17 18
2
3 4
5 6
7 8
9
C604
1
2
R1015
1 2
L103
1 2
LAST_MODIFIED=Wed Sep 17 12:16:29 2003
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52C1>
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59A8>
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44B5<
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43A8<
23D7<
52B3>
(PLL4)
VDD15A_6
(PLL4)
VSSA_6
ROM_WE
ROM_OE
PCI_STOP
PCI_DEVSEL
PCI_CBE_3
PCI_CBE_2
PCI_CBE_1
PCI_CBE_0
ROM_CS
PCI_CLK_IN
PCI_CLK_OUT
PCI_CLK2
PCI_CLK1
PCI_CLK0
PCI_FRAME
PCI_PAR
PCI_TRDY
PCI_IRDY
PCI_REQ_2
PCI_REQ_1
PCI_REQ_0
PCI_GNT_0
PCI_GNT_1
PCI_GNT_2
PCI/ROM
INTERFACE
PCIAD_31
PCIAD_30
PCIAD_28
PCIAD_27
PCIAD_26
PCIAD_25
PCIAD_29
PCIAD_19
PCIAD_18
PCIAD_17
PCIAD_16
PCIAD_15
PCIAD_23
PCIAD_24
PCIAD_20
PCIAD_21
PCIAD_22
PCIAD_14
(7 OF 9)
PCIAD_11
PCIAD_10
PCIAD_12
PCIAD_13
PCIAD_9
PCIAD_6
PCIAD_5
PCIAD_7
PCIAD_8
PCIAD_4
PCIAD_3
PCIAD_1
PCIAD_2
PCIAD_0
ROM_OVRLY_EN
A0
A1
A6
A2
A3
A4
A5
A9
A8
A7
A10
A11
A12
A13
A14
A15
A16
A20
A17
A18
A19
CE
OE
WE
WP
PWD
GND
DQ0
DQ1
DQ6
DQ5
DQ2
DQ3
DQ4
DQ7
VPP VCC
FEPR-1MX8
04
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FLASH BOOT ROM SUPPORT
TO +10" (1.7 NS) IN 2" (0.35 NS) INCREMENTS
ALLOWS ADJUSTING FEEDBACK CLOCK FROM MATCHED (0 NS)
Adds 2"
PLACE ALL SERPENTINES ON INTERNAL LAYER
Vin = Vcore (1.5V)
PCI PULL-UPS
INTREPID PCI INTERFACE
INTREPID PCI
& BOOT ROM
MAIN LOOP MATCHES
LONGEST PCI CLOCK
Vout = PCI I/O (3.3V)
TEST WITH 220-OHM
(0.7 ns)
Adds 6"
(1 ns)
Adds 2"
(0.35 ns)
TEST WITH 220-OHM
1MB BOOT ROM
ROM CHIP SELECT
INTERCEPTS ROM CHIP SELECT
OVERRIDE ROM MODULE
(ON PAGE 12)
ROM PULL-UP
INTREPID
BGA
SEE_TABLE
2.2
402
5%
1/16W
MF
0.1UF
10V
402
20%
CERM
MF
1/16W
22
402
5%
22
5%
1/16W
MF
402
NOSTUFF
402
MF
USB2
22
1/16W
5%
5%
1/16W
MF
402
39
22
5%
1/16W
MF
402
5%
1/16W
MF
402
22
22
402
MF
1/16W
5%
22
5%
1/16W
MF
402
1/16W
NOSTUFF
5%
MF
402
22
NOSTUFF
402
MF
1/16W
5%
0
NOSTUFF
5%
1/16W
MF
4020NOSTUFF
402
MF
1/16W
5%
0
NOSTUFF
5%
1/16W
MF
402
0
CERM
50V
10%
402
0.001UF
20%
10V
CERM
402
0.1UF
+3V_MAIN
1%
10K
402
MF
1/16W
+3V_MAIN
1%
1/16W
402
10K
MF
1K
402
MF
1/16W
1%
SEE_TABLE
TSOP
110
NOSTUFF
402
MF
1/16W
5%
0
0
402
MF
1/16W
5%5%
1/16W
MF
402
0
10K
5%
SM1
1/16W
1/16W
10K
5%
SM1
10K
5%
SM1
1/16W
4.7K
5%
1/16W
SM1
10K
5%
SM1
1/16W
4.7K
5%
1/16W
SM1
4.7K
5%
1/16W
SM1
INT_V1
MF
1/16W
402
1%
10K
4.7K
5%
1/16W
SM1
+3V_MAIN
10K
5%
1/16W
SM1
10K
1/16W
5%
SM1
SM1
10K
5%
1/16W
10K
5%
1/16W
SM1
+3V_MAIN
DEV
SC70-5
SN74AUC1G04
DEV
5%
1/16W
MF
402
LED_ROMCS_L
0
DEV
SM
GREEN
DEV
402
MF
1/16W
1%
681
SM
0.1UF
10V
402
20%
CERM
IC,FLASH ROM,1MB,BLANK
335S0350
1
OMITU42
IC,FLASH,ROM,Q59 EVT,VER TBD
341S1289
1
ROM_EVTCRITICALU42
30
051-6497
13
69
IC,FLASH,ROM,Q59 PROD,VER TBD
1
U42 CRITICAL341T1292 ROM_PROD_T
ROM_IMG_Q59
1
009-6525
IC,FEPR,FLASH ROM,DEV
U42
IC,FLASH,ROM,Q59 PROD,VER TBD
ROM_PRODCRITICALU42
1
341S1280
IC,FLASH,ROM,Q59 PVT,VER TBD
341S1291 U42 ROM_PVT
1
CRITICAL
IC,FLASH,ROM,Q59 DVT,4.7.4B0
341S1290 ROM_DVT
1
U42 CRITICAL
PCI_SLOTD_REQ_L
PCI_SLOTC_REQ_L
PCI_STOP_L
PCI_SLOTB_REQ_L
PCI_DEVSEL_L
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
NO_TEST
NC_RP1399
PCI_SLOTC_GNT_L
PCI_SLOTB_GNT_L
PCI_SLOTD_GNT_L
ROM_RW_L
ROM_CS_L
ROM_OE_L
CLK33M_PCI_SLOTD
NC_CLK33M_PCI_SLOTC
NO_TEST
CLK33M_PCI_SLOTB
INT_ROM_RW_L
INT_ROM_CS_L
INT_ROM_OE_L
INT_PLL4_GND
NO_TEST
+1_5V_INTREPID_PLL
+1_5V_INTREPID_PLL6
INT_PLL4_GND
CLK33M_PCI_SLOTD_UF
NO_TEST
PCI_FB_PLUS4
PCI_FBO_PLUS2
PCI_FBI_PLUS2
NO_TEST
PCI_FB_PLUS6
PCI_FBI_EQUAL
MAIN_RESET_L
ROM_WP_L
ROM_RW_L
ROM_OE_L
ROM_ONBOARD_CS_L
+2_5V_MAIN
LED_ROMCS
LED_ROMCS_LIGHT
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
PCI_SLOTB_REQ_L
PCI_SLOTC_REQ_L
PCI_SLOTD_REQ_L
PCI_SLOTD_GNT_L
PCI_SLOTB_GNT_L
PCI_SLOTC_GNT_L
PCI_STOP_L
PCI_PAR
PCI_IRDY_L
PCI_FRAME_L
PCI_TRDY_L
PCI_DEVSEL_L
PCI_CBE<0>
PCI_CBE<1>
PCI_CBE<2>
PCI_CBE<3>
INT_ROM_OVERLAY_PU
ROM_CS_L
INT_ROM_OVERLAY_PU
INT_PCI_FB_OUT
PCI_AD<0>
PCI_AD<7>
PCI_AD<3>
PCI_AD<1>
PCI_AD<2>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<8>
PCI_AD<10>
PCI_AD<9>
PCI_AD<11>
PCI_AD<13>
PCI_AD<12>
PCI_AD<16>
PCI_AD<14>
PCI_AD<15>
PCI_AD<18>
PCI_AD<17>
PCI_AD<20>
PCI_AD<19>
PCI_AD<21>
PCI_AD<22>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<30>
PCI_AD<29>
PCI_AD<23>
PCI_AD<31>
PCI_AD<0>
PCI_AD<5>
PCI_AD<4>
PCI_AD<3>
PCI_AD<2>
PCI_AD<1>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<10>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
PCI_AD<20>
PCI_AD<19>
PCI_AD<18>
PCI_AD<17>
CLK33M_PCI_SLOTC_UF
CLK33M_PCI_SLOTB_UF
INT_PCI_FB_IN
<XR_PAGE_TITLE>
U25
AM10
AR8
AR10
AT9
AR11
AM12
AN12
AK11
AT11
AT10
AN13
AM13
AK12
AR12
AJ11
AT12
AM11
AR13
AK15
AH15
AN14
AT13
AK14
AJ8
AN15
AM15
AN10
AT8
AN11
AH13
AK13
AR9
AR14
AK16
AM16
AJ15
AR18
AH18
AT18
AJ19
AM18
AM17
AN16
AT16
AN18
AN17
AH16
AT14
AR17
AR16
AT17
AR15
AT15
AM9
AR7
AK17
AN9
J11
J10
R719
1 2
C848
1
2
R218
1 2
R219
1 2
R566
1 2
R621
1
2
R227
12
R252
1
2
R230
12
R578
12
R617
1 2
R616
1 2
R253
1
2
R262
1 2
R256
1 2
C225
1
2
C123
1
2
R212
1
2
R139
1
2
R138
1 2
U42
21
20
36
6
5
4
3
2
1
40
13
37
19
38
18
17
16
15
14
8
7
22
25
26
27
28
32
33
34
35
23 39
24
10
30 3111
9
12
R618
1 2
R255
1
2
R259
1
2
RP63
7 2
RP63
5 4
RP63
8 1
RP69
5 4
RP63
6 3
RP69
8 1
RP69
7 2
R579
2 1
RP69
6 3
RP38
8 1
RP38
5 4
RP38
7 2
RP38
6 3
U38
2
3
5
4
R510
1 2
DS4
1
2
R511
1
2
XW49
1
2
C3201
1
2
LAST_MODIFIED=Wed Sep 17 12:16:31 2003
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30C1<>
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30D4<>
30D4<>
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30D4<>
30D4<>
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30D4<>
30D4<>
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30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
54D7<
54D7<
54C7<
DRAWING
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE RP’S NEAR WIRELESS CONNECTOR
WIRELESS PCI
(516S0046)
WIRELESS CARD MOUNTING HARDWARE SUPPORT
22
402
MF
1/16W
5%
+3V_MAIN
+3V_MAIN
MF
10K
402
1/16W
1%
F-RT-SM-4MM
EDGE-SOCKET-UP
TOP_CONTACTS BOT_CONTACTS
33
SM1
1/16W
5%
33
SM1
1/16W
5%
33
SM1
1/16W
5%
33
SM1
1/16W
5%
33
SM1
1/16W
5%
33
SM1
1/16W
5%
33
SM1
1/16W
5%
33
1/16W
SM1
5%
33
SM1
1/16W
5%
33
SM1
1/16W
5%
33
SM1
1/16W
5%
0
5%
402
1/16W
MF
10K
NOSTUFF
1/16W
MF
1%
402
+3V_MAIN
10K
NOSTUFF
1%
1/16W
MF
402
0
NOSTUFF
402
1/16W
5% MF
0.1UF
10V
CERM
20%
402
0.01UF
402
16V
10%
CERM
10UF
N20P80%
10V
Y5V
NOSTUFF
805
10UF
Y5V
10V
N20P80%
805
2
452-0411 J252,J253
NUT,HEX,M2 X 1.5H, J25
1
815-7245 J251
WIRELESS CARD GUIDE,J25
452-0412
2
J254,J255
SCREW,M2 X 0.4 X 6.0 L,J25
13
051-6497
6931
RF_CLKRUN_L
PCI_SLOTB_GNT_L
PMU_PME_LL
PCIT_AD<31>
PCIT_AD<0>
PCIT_AD<0>
PCIT_AD<1>
NO_TEST
PCIT_AD<1>
PCIT_AD<2>
NO_TEST
PCIT_AD<2>
PCIT_AD<3>
NO_TEST
PCIT_AD<3>
PCIT_AD<4>
PCIT_AD<4>
PCIT_AD<5>
NO_TEST
PCIT_AD<5>
PCIT_AD<6>
PCIT_AD<6>
NO_TEST
PCIT_AD<7>
PCIT_AD<7>
PCIT_AD<8>
PCIT_AD<8>
PCIT_AD<9>
PCIT_AD<9>
NO_TEST
PCIT_AD<10>
NO_TEST
PCIT_AD<10>
PCIT_AD<11>
PCIT_AD<11>
NO_TEST
PCIT_AD<12>
PCIT_AD<12>
PCIT_AD<13>
NO_TEST
PCIT_AD<13>
PCIT_AD<14>
NO_TEST
PCIT_AD<14>
PCIT_AD<15>
NO_TEST
PCIT_AD<15>
PCIT_AD<16>
PCIT_AD<16>
PCIT_AD<17> PCIT_AD<18>
PCIT_AD<18>
PCIT_AD<19>
PCIT_AD<19>
PCIT_AD<20>
PCIT_AD<20>
PCIT_AD<21>
PCIT_AD<21>
PCIT_AD<22>
PCIT_AD<22>
PCIT_AD<23>
PCIT_AD<23>
PCIT_AD<24>
PCIT_AD<24>
PCIT_AD<25>
PCIT_AD<25>
PCIT_AD<26>
PCIT_AD<26>
PCIT_AD<27>
PCIT_AD<27>
PCIT_AD<28>
PCIT_AD<28>
PCIT_AD<29>
NO_TEST
PCIT_AD<29>
PCIT_AD<30>
PCIT_AD<30>
NO_TEST
PCIT_AD<31>
PCIT_CBE<0>
NO_TEST
PCIT_CBE<0>
PCIT_CBE<1>
NO_TEST
PCIT_CBE<1>
PCIT_CBE<2>
PCIT_CBE<2>
PCIT_CBE<3>
NO_TEST
PCIT_CBE<3>
PCI_CBE<3>
PCI_CBE<2>
PCIT_STOP_L
PCI_CBE<0>
PCI_CBE<1>
PCI_DEVSEL_L
PCI_STOP_L
PCIT_PAR
PCI_IRDY_L
PCI_TRDY_L
PCI_FRAME_L
PCI_PAR
PCI_AD<30>
PCI_AD<28>
PCI_AD<29>
PCI_AD<31>
PCI_AD<24>
PCI_AD<26>
PCI_AD<25>
PCI_AD<27>
PCI_AD<20>
PCI_AD<22>
PCI_AD<21>
PCI_AD<23>
PCI_AD<19>
PCI_AD<17>
PCI_AD<18>
PCI_AD<16>
PCI_AD<15>
PCI_AD<13>
PCI_AD<12>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<11>
PCI_AD<10>
PCI_AD<9>
PCI_AD<8>
PCI_AD<3>
PCI_AD<2>
PCI_AD<1>
PCI_AD<0>
PCI_SLOTB_REQ_L
ROM_RW_L
ROM_ONBOARD_CS_L
ROM_CS_L
WL_PCI_IDSEL
PCIT_PAR
PCIT_STOP_L
ROM_OE_L
MAIN_RESET_L
CLK33M_PCI_SLOTB
33SLOTB_INT_L
PMU_PME_L
MAIN_RESET_L_PU
RF_DISABLE_L
NC_WL<23>
NO_TEST
NC_WL<21>
NO_TEST
NO_TEST
NC_WL<20>
NC_WL<19>
NO_TEST
NO_TEST
NC_WL<18>
NC_WL<17>
NO_TEST
NO_TEST
NC_WL<16>
NC_WL<15>
NO_TEST
NO_TEST
NC_WL<14>
NC_WL<13>
NO_TEST
NO_TEST
NC_WL<12>
NC_WL<11>
NO_TEST
NO_TEST
NC_WL<10>
NC_WL<9>
NO_TEST
NO_TEST
NC_WL<8>
NC_WL<7>
NO_TEST
NO_TEST
NC_WL<6>
NC_WL<5>
NO_TEST
NO_TEST
NC_WL<4>
NC_WL<3>
NO_TEST
NO_TEST
NC_WL<2>
NC_WL<1>
NO_TEST NO_TEST
NC_USB_P
NO_TEST
NC_USB_M
NC_PCITR1
NO_TEST
NC_PCITR0
NO_TEST
NC_PCIR1
NO_TEST
NC_PCIR0
NO_TEST
PCIT_TRDY_L
NO_TEST
PCIT_TRDY_L
PCIT_IRDY_L
NO_TEST
PCIT_IRDY_L
PCIT_FRAME_L
NO_TEST
PCIT_FRAME_L
PCIT_DEVSEL_L
NO_TEST
PCIT_DEVSEL_L
PCIT_AD<17>
PCI_AD<14>
<XR_PAGE_TITLE>
C249
1
2
C259
1
2
C260
1
2
C250
1
2
R285
1
2
R293
1
2
J25
1
10
100
11 12
13 14
15 16
17 18
19
2
20
21 22
23 24
25 26
27 28
29
3
30
31 32
33 34
35 36
37 38
39
4
40
41 42
43 44
45 46
47 48
49
5
50
51 52
53 54
55 56
57 58
59
6
60
61 62
63 64
65 66
67 68
69
7
70
71 72
73 74
75 76
77 78
79
8
80
81 82
83 84
85 86
87 88
89
9
90
91 92
93 94
95 96
97 98
99
RP75
1
2
3
4
8
7
6
5
RP77
1
2
3
4
8
7
6
5
RP73
1
2
3
4
8
7
6
5
RP72
1
2
3
4
8
7
6
5
RP59
1
2
3
4
8
7
6
5
RP56
1
2
3
4
8
7
6
5
RP58
1
2
3
4
8
7
6
5
RP54
1
2
3
4
8
7
6
5
RP61
1
2
3
4
8
7
6
5
RP67
1
2
3
4
8
7
6
5
RP64
1
2
3
4
8
7
6
5
R948
1 2
R949
1
2
R950
1
2
R951
1 2
LAST_MODIFIED=Wed Sep 17 12:15:38 2003
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VSS
AD6
AD7
AD17
AD16
AD15
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD27
AD26
AD25
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD28
AD29
AD30
AD31
CBE0
CBE1
CBE2
CBE3
PAR
PERR
GNT
DEVSEL
IDSEL
FRAME
IRDY
TRDY
STOP
REQ
SERR
CRUN
SMI
VBBRST
VCCRST
INTA
INTB
INTC
PCLK
PME
LEGC
XT2
DM1
DP1
DM2
DP2
DM3
DP3
RSDM4
RSDM2
RSDP2
RSDM3
RSDP3
RSDP1
XT1/SCLK
RSDM1
DM4
DP4
DM5
DP5
RREF
OCI1
OCI2
OCI4
OCI3
OCI5
RSDP4
RSDM5
RSDP5
PPON1
NC1
NC2
SMC
TEB
NTEST1
PPON2
PPON3
PPON4
PPON5
AVSS(R)
AVSS
SRCLK
SRDTA
SRMOD
NANDTEST
AMC
TEST
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
OVERLAP STUFFING OF 35.7OHMS HERE WITH 0OHMS ON SH31 TO MINIMIZE STUBS
USB2_DCP_F
USB2_DCN_F
USB2_DBP_F
USB2_DBN_F
USB2_DAP_F
USB2_DAN_F
TIED TO BALL N11
OD
OD
OD
OD
USB2 CONTROLLER
STARTUP & RESTARTS
OD
OD
STARTUP, RESTARTS, WAKEUP
USB_PWR_FLT*
NEC_UPD720101_USB2
FBGA
USB2
CRITICAL
USB2
402
5%
1/16W
MF
22
8X4.5MM-SM
CRITICAL
USB2
30.0000M
100-OHM-EMI
SM
USB2
+3V_MAIN
100
402
1/16W
MF
1%
USB2
+3V_MAIN
+3V_MAIN
35.7
USB2
35.7
USB2
35.7
USB2
35.7
USB2
35.7
USB2
4.7K
5%
402
MF
1/16W
USB2
4.7K
402
MF
1/16W
USB2
5%
+3V_MAIN
402
2.2K
1/16W
MF
5%
USB2
2.2K
402
5%
MF
1/16W
USB2
4.7K
402
5%
MF
1/16W
USB2
+3V_MAIN
402
100K
MF
1/16W
1%
NOSTUFF
0
5%
1/16W
402
NOSTUFF
USB2
1%
1/16W
MF
9.09K
402
D3_COLD
1/16W
402
MF
5%
0
D3_HOT
4.7K
5%
1/16W
MF
402
+3V_MAIN
0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
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0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
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0.1UF
20%
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0.1UF
402
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402
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20%
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CERM
0.1UF
402
20%
10V
CERM
USB2
0.1UF
20%
402
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
USB2
0.1UF
402
20%
10V
CERM
USB2
805
10UF
Y5V
10V
N20P80%
NOSTUFF
805
10UF
Y5V
10V
N20P80%
USB2
35.7
USB2
805
10UF
Y5V
10V
N20P80%
NOSTUFF
805
Y5V
10V
N20P80%
USB2
10UF
402
5%
1/16W
USB2
0
1%
1K
1/16W
MF
402
Y5V
10V
N20P80%
USB2
805
10UF
20%
0.1UF
CERM
10V
402
USB2
0.1UF
CERM
10V
20%
402
USB2
10PF
50V
5%
402
USB2
CERM
10PF
CERM
50V
5%
402
USB2
32 69
051-6497
13
USB2_RSDCP
USB2_NC1
USB2_NC2
USB2_XT1
PCI_AD<12>
USB2_CRUN_L
PCI_AD<27>
USB2_IDSEL
USB2_DAN_F
U_USB_PWR_FLT*
IO_RESET_L
USB2_VCCRST
33PCI_SLOTD_SERR_L
PCI_STOP_L
PCI_CBE<1>
PCI_SLOTD_PERR_L
USB2_DBN_F
USB2_DAP_F
INT_EXTINT17_PU
CLK33M_PCI_SLOTD
PCI_SLOTD_GNT_L
PCI_SLOTD_REQ_L
PCI_DEVSEL_L
PCI_IRDY_L
PCI_FRAME_L
PCI_PAR
PCI_CBE<2>
PCI_CBE<0>
PCI_CBE<3>
PCI_AD<31>
PCI_AD<30>
PCI_AD<28>
PCI_AD<29>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<21>
PCI_AD<22>
PCI_AD<20>
PCI_AD<19>
PCI_AD<18>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<14>
PCI_AD<13>
PCI_AD<10>
PCI_AD<11>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<5>
PCI_AD<6>
USB2_DCP_F
USB2_RSDBM
USB2_RSDAP
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<0>
PCI_AD<1>
USB2_XT2
USB2_RSDAM
NEC_XT2_B
USB2_DCN_F
USB2_DBP_F
NC_USB2_RSDEM
NC_USB2_RSDEP
NC_USB2_RSDFM
NC_USB2_RSDFP
NC_USB2_PPON4
NC_USB2_PPON2
NC_USB2_PPON3
NC_USB2_PPON1
NC_USB2_AMC
NC_USB2_TEST
NC_USB2_NANDTEST
NC_USB2_SRCLK
NC_USB2_SRDTA
NC_USB2_SRMOD
NC_USB2_TEB
NC_USB2_SMC
NC_USB2_NTEST1
USB2_RSDCM
PCI_TRDY_L
NC_USB2_PPON5
USB2_RSDBP
NEC_AVDD
NC_USB2_SMI_L
PMU_PME_L
USB2_CRUN_L_INT
MAIN_RESET_L
USB2_PME_L
USB2_RREF
USB_PWR_FLT*
<XR_PAGE_TITLE>
U11
M5
P5
K2
L3
K1
K3
J2
J1
F2
E3
E1
D3
N5
D1
D2
C2
C1
B4
A4
B5
C4
A5
C5
P4
B6
A6
N4
M3
N3
M1
L2
L1
P7
N10
N12
P13
M12
N11
M2
J3
F1
C3
N6
G2
M13
K12
G11
F14
D14
L14
J14
G13
E12
C13
F3
D6
B3
C7
B7
A7
F4
L7
M10
P6
M6
M8
B12
B11
B10
A10
B9J4
A8
H2
D9
C12
A11
C11
C10
A9
C6
P11
M14
K14
H11
F12
E13
K13
J12
G14
E14
C14
H1
M7
L6
M9
N9
P9
G3
N7
L8
G1
B8
C9
P2
J13
H13
F13
D13
G12H4D7
P3
P12
A13
A12A3E2N8L13
H3M4C8
B1
N13
B13
M11
L12
H12
D12G4J11
F11
D8
N1
P10
N14
H14
B14
A2B2N2
L9
P8
R469
1 2
R476
1 2
C519
1
2
C522
1
2
C547
1
2
C527
1
2
C555
1
2
C548
1
2
C541
1
2
C523
1
2
C536
1
2
C559
1
2
C515
1
2
C570
1
2
C546
1
2
C516
1
2
C537
1
2
C530
1
2
C517
1
2
C573
1
2
C574
1
2
C531
1
2
R484
1 2
R78
1
2
C511
1
2
C529
1
2
C526
1
2
C77
1
2
C114
1
2
R494
1 2
Y7
1 2
L58
1 2
R129
1
2
R468
1 2
R467
1 2
R466
1 2
R465
1 2
R464
1 2
R128
1
2
R127
1
2
R470
1
2
R490
1
2
R480
1
2
R89
1 2
R373
1 2
R1028
1 2
R1029
1
2
LAST_MODIFIED=Wed Sep 17 12:16:33 2003
59A6>
59A6>
59A6>
59B3>
59B3>
59B3>
59B3>
59B3>
59B3>
59B3>
59C3>
59C3>
59C3>
59C3>
59C3>
59C3>
59A6>
59A6>
53A6<
53A6<
59A8>
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53A6<
59A6>
59A6>
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53A6<
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53A6<
59B3>
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53A6<
53A6<
53A6<
53A6<
53A6<
53A6<
53A6<
53A6<
54D7<
59A6>
44C4<>
31C7<
31B7<
44D3<
31B7<
53A6<
31B7<
31B7<
31B7<
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53A6<
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31B7<
31B6<
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31C6<
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31B7<
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31D4<
33A7>
30C4<>
30C4<>
56B3>
44B8<>
30C5<>
31B7<
56B3>
56B3>
28B8<
54A7<
30D5<>
30D5<>
30C5<>
30C5<>
30C5<>
31B7<
31B7<
31B7<
31B7<
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
31C7<
31C7<
31C6<
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30C4<>
30D4<>
30D4<>
30D4<>
30D4<>
30D4<>
56B3>
30D4<>
30D4<>
30D4<>
30D4<>
30D4<>
56B3>
56B3>
30C5<>
31C2<
28B5<>
30B2<
28C1<
56B3>
56B3>
30B2<
30C1<>
33B7<
35B8<
30B7<
30C5<>
33C7<
33B7<
28B5<>
30D7<
30B5<
30B7<
30B7<
30B7<
30B7<
30C5<>
30C5<>
30C5<>
30C5<>
30C1<>
30C1<>
30C1<>
30C1<>
30C1<>
30C1<>
30C1<>
30C4<>
30C4<>
30C4<>
30B2<
30B2<
30B2<
30B2<
30B2<
30B2<
30B2<
30B2<
30C2<
30B2<
30C2<
30C2<
30C2<
30C2<
30C2<
33D7<
56B3>
56B3>
30C2<
30C2<
30C2<
30C2<
30C2<
56B3>
56B3>
33D7<
33C7<
56B3>
30B7<
56B3>
52A3>
28B5<>
28A8<
17C8<
56B3>
28B3<
SYM_VER-2
SYM_VER-2
SYM_VER-2
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
SYM_VER-2
SYM_VER-2
SYM_VER-2
GND
OC
OUT_2
OUT_1
OUT_0
EN
IN_1
IN_0
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LOCATED AT THE USB2 CHIP
USB CONNS & PWR
USB PORT 3
USB PORT 2
USB PORT 1
(514-0048)
USB CONNECTOR
PLACE NEAR CONNECTOR
USB CONNECTOR
PLACE UNDER
(514-0048)
USB_GND
USB_GND
USB_GND
USB_GND
THE SAME PIN-2 PAD AND ARE
USB CONNECTOR
PLACE UNDER
(514-0048)
THE ABOVE RESISTORS SHARE
10K PULLUP ON PAGE 28
PLACE UNDER
10%
16V
CERM
402
0.01UF
0.01UF
10%
16V
CERM
402
10%
16V
CERM
402
0.01UF
20%
POLY
6.3V
SMD
150UF
NOSTUFF
+5V_MAIN
TH-1
F-RT-USB-NMP1
TH-1
F-RT-USB-NMP1
TH-1
F-RT-USB-NMP1
SMD
6.3V
20%
POLY
150UF
NOSTUFF
10%
16V
CERM
402
0.01UF
402
16V
10%
0.01UF
CERM
FERRITE-4532
SM
1/16W
MF
402
15K
5%
15K
MF
1/16W
402
5%
5%
1/16W
MF
402
0
USB1
5%
MF
402
USB1
0
1/16W
USB2
402
MF
1/16W
5%
0
0
MF
5%
USB2
402
1/16W
5%
50V
CERM
402
33PF
USB1
402
CERM
5%
50V
33PF
USB1
5%
1/16W
MF
402
USB2
0
402
15K
1/16W
MF
5%
15K
402
1/16W
MF
5%
5%
1/16W
MF
402
USB2
0
5%
1/16W
MF
USB1
0
402
402
MF
1/16W
5%
USB1
0
402
MF
1/16W
5%
USB1
0
5%
50V
CERM
402
33PF
USB1
402
CERM
5%
50V
33PF
USB1
402
15K
MF
1/16W
5%
15K
402
1/16W
MF
5%
MF
1/16W
5%
USB2
0
402
MF
1/16W
5%
0
402
USB2
5%
1/16W
MF
402
USB1
0
10UF
N20P80%
Y5V
805
10V
10UF
N20P80%
10V
Y5V
805
N20P80%
10UF
10V
Y5V
805
402
CERM
10%
16V
0.01UF
10%
16V
CERM
402
0.01UF
402
16V
10%
CERM
0.01UF
10%
402
CERM
0.01UF
16V
402
10%
16V
CERM
0.01UF
165-OHM
SM
SM
165-OHM
165-OHM
SM
0
5%
1/16W
MF
402
NOSTUFF
5%
402
MF
1/16W
0
NOSTUFF
402
MF
1/16W
5%
0
NOSTUFF
0
5%
1/16W
MF
402
NOSTUFF
402
MF
1/16W
5%
0
NOSTUFF
5%
0
1/16W
MF
402
NOSTUFF
SOI
TPS2023
10%
CERM
402
0.01UF
16V
47
5%
1/16W
MF
402
CERM
402
10V
20%
0.1UF
402
CERM
16V
10%
0.01UF
CERM
5%
33PF
USB1
50V
402
50V
5%
CERM
402
33PF
USB1
13
051-6497
6933
USBT_DCP_F
USBT_DAP_F
USBT_DAN_F
USB_DAN_F
USBT_DBP_F
USB_DAP_CON
USBT_DCN_F
USB_DCN_CON
USB_DCP_CON
USBT_DBN_F
USB_DBP_CON
USB_DAN_CON
USB_DCP_F
USB_DBP_F
USB2_DCN_F
USB2_DCP_F
USB2_DBN_F
USB2_DBP_F
USB2_DAN_F
USB2_DAP_F
USB_DAP_F
USB_DBN_CON
USB_DBN_F
USB_DCN_F
USB_PWR_EN
USB_PWR_FLT*
USB_PWR
USB_PORT_PWR
USB_PORT_PWR
USB_PORT_PWR
USB_PORT_PWR
<XR_PAGE_TITLE>
C380
1
2
C396
1
2
C404
1
2
C403
1
2
C433
1
2
C417
1
2
C413
1
2
C5
1
2
J4
5
6
7
1
2
3
4
J6
5
6
7
1
2
3
4
J7
5
6
7
1
2
3
4
C7
1
2
C377
1
2
C382
1
2
L2
1 2
R455
1
2
R454
1
2
R43
1 2
R44
1 2
R461
1 2
R460
1 2
C389
1
2
C391
1
2
R458
1 2
R452
1
2
R453
1
2
R459
1 2
R46
1 2
R45
1 2
R48
1 2
C383
1
2
C387
1
2
R450
1
2
R451
1
2
R456
1 2
R457
1 2
R47
1 2
C2
1
2
C6
1
2
C1
1
2
C385
1
2
C397
1
2
C405
1
2
C398
1
2
C386
1
2
L100
1
2 3
4
L101
1
2 3
4
L102
1
2 3
4
R1007
1 2
R1006
1 2
R1008
1 2
R1009
1 2
R1010
1 2
R1011
1 2
U3501
4
1
2
3
5
8
7
6
R3501
1
2
C3502
1
2
LAST_MODIFIED=Wed Sep 17 12:16:35 2003
52C4
52C4
52C4
52C4
36C1<
36C1<
36C1<
36C1<
36C1<>
36C1<>
36C1<>
36C1<>
36B6<>
36B6<>
36B6<>
36B6<>
36B6<
36B6<
36B6<
36B6<
36B2<
36B2<
36B2<
36B2<
36A7<>
36A7<>
36A7<>
36A7<>
33D4<
33D4<
33D4<
33D4<
33D2<
33D2<
33D2<
33C4<
33C4<
33C4<
59B6>
59B6>
59B6>
59B6>
33C4<
33C2<
33C2<
33B4<
52A3>
52A3>
52A3>
52A3>
52A3>
33C2<
33B4<
33B2<
33B2<
32B1<
25D3<>
33C3<>
33D3<>
33D3<>
33D3<>
33B4<
33B2<
25C3<
25C3<
58B5>
59C6>
59C6>
59C6>
59C6>
59C6>
58B5>
58B5>
56B3>
56B3>
56B3>
56B3>
56B3>
56B3>
58B5>
59C6>
58B5>
58B5>
28C1<
25C2<
33B3<>
33B3<>
33C3<>
33C3<>
25C3<
25C3<
25B3<>
25B3<>
56A3>
56B3>
56B3>
28B2<
56A3>
56A3>
56A3>
56A3>
56A3>
56A3>
56A3>
56A3>
28B2<
28B2<
32C1<>
32C1<>
32C1<>
32C1<>
32C1<>
32C1<>
28B2<
56A3>
28B2<
28B2<
28B3<
25B5<>
33A4<>
33A4<>
33A4<>
33B3<>
52C4
52C4
52C4
25B3<>
25B3<>
IICDATA_1
IICCLK_1
IICCLK_0
IICDATA_0
TST_PLLEN
TST_MONOUT
TST_MONIN
TEI
TRSTN
TMS
TCK
TDO
TDI
TEST
MDC
GBE_REFCLK
MDIO
COL
CRS
GTX_CLK
RXD_6
RXD_4
RXD_5
RXD_3
RXD_7
RXD_2
RXD_1
RX_ER
RX_DV
RX_CLK
RXD_0
FW_PINT
FW_LINKON
FWR_LCLK
TX_ER
TX_EN
TX_CLK
TXD_0
RESET
PURESET
PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK
(4 OF 9)
MISC
TXD_3
TXD_2
TXD_1
TXD_4
TXD_5
TXD_6
TXD_7
GB ETHERNET
FIREWIRE
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA5
PHY_DATA7
PHY_DATA4
PHY_DATA6
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TEST PULL-DOWNS
INTREPID VERSION 1 HAS AN I2C BUS PROBLEM
USE KEY LARGO’S I2C INSTEAD.
FIXED IN INTREPID VERSION 2
INTREPID ENET & FW
(515-1560)
I2C DEBUG HEADER
(ON PAGE 12)
INT_I2C_CLK1
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_DATA1
I2C 3.3V PULL-UPS
1%
MF
1K
402
1/16W
1/16W
5% MF
402
22
402
MF5%
1/16W
22
NOSTUFF
TH
M-ST-LK
+3V_MAIN
1%
1/16W
402
10K
MF
INT_V1
MF
402
5%
1/16W
0
INT_V1
1/16W
5%
402
MF
0
INT_V2
MF
402
5%
1/16W
0
INT_V2
MF
402
5%
1/16W
0
5%
1/16W
33
SM1
1K
402
MF
1/16W
1%
402
5%
1/16W
MF
47
MF
1/16W
5%
402
47
1%
402
MF
1/16W
1K
5%
1/16W
SM1
22
402
CERM
50V
5%
NOSTUFF
47PF
1/16W
5%
SM1
22
SM1
5%
1/16W
33
+3V_MAIN
1%
1/16W
MF
402
1K
4.7K
SM1
1/16W
5%
5%
SM1
1/16W
4.7K
SM1
1/16W
5%
4.7K
1/16W
5%
SM1
4.7K
INTREPID
SEE_TABLE
BGA
22
402
MF
1/16W
5%
402
MF
1/16W
5%
33
1/16W
MF
402
33
5%
34
051-6497
13
69
CLKENET_LINK_TX
FW_PINT
FW_C_LKON
FW_LINK_CNTL<1>
FW_D<7>
NO_TEST
FW_D<6>
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_CLK0R
INT_I2C_DATA0R
INT_I2C_DATA1
ENET_PHY_TX_EN
ENET_LINK_TX_EN
ENET_PHY_TX_ER
ENET_LINK_TX_ER
INT_JTAG_TEI
INT_TST_MONIN_PD
ENET_LINK_RXD<1>
FW_SCLK
FW_LINK_DATA<0>
FW_LINK_DATA<1>
FW_LINK_DATA<3>
INT_PU_RESET_L
RINT_PU_RESET_L
INT_RESET_L
FW_LINK_DATA<4>
FW_LINK_DATA<6>
ENET_PHY_TXD<3>
ENET_PHY_TXD<1>
ENET_PHY_TXD<0>
ENET_LINK_TXD<3>
ENET_LINK_TXD<2>
ENET_LINK_TXD<1>
ENET_LINK_TXD<0>
NC_ENET_LINK_TXD<5>
NC_ENET_LINK_TXD<6>
NC_ENET_LINK_TXD<4>
INT_I2C_CLK1
INT_I2C_CLK0
INT_I2C_DATA0
NO_TEST
FW_D<3>
FW_LINK_DATA<2>
RINT_RESET_L
FW_LINK_DATA<5>
INT_I2C_DATA0R
INT_I2C_CLK0R
NO_TEST
FW_D<2>
NO_TEST
FW_D<4>
NO_TEST
FW_D<5>
FW_LINK_DATA<7>
FW_CNTL1
FW_CNTL0
FW_LINK_CNTL<0>
FW_LREQ
FW_D<0>
CLKFW_LINK_LCLK
FW_LPS
NO_TEST
FW_D<1>
FW_PINT
ENET_LINK_RXD<5>
ENET_LINK_RXD<6>
INT_I2C_DATA2
INT_I2C_CLK2
NC_ENET_LINK_TXD<7>
ENET_LINK_RXD<4>
ENET_PHY_TXD<2>
ENET_LINK_RXD<7>
CLKENET_LINK_RX
ENET_LINK_RXD<3>
ENET_RX_ER
JTAG_ASIC_TCK
JTAG_INTRP_TDO
JTAG_ASIC_TDI
ENET_MDC
ENET_MDIO
ENET_CRS
ENET_COL
NC_CLKENET_LINK_GTX
NO_TEST
NC_INT_TST_MONOUT_TP
CLKENET_LINK_GBE_REF
ENET_RX_DV
ENET_LINK_RXD<0>
ENET_LINK_RXD<2>
JTAG_ASIC_TMS
JTAG_ASIC_TRST_L
INT_JTAG_TEI
INT_TST_MONIN_PD
INT_TST_PLLEN_PD
FW_LINK_LREQ
<XR_PAGE_TITLE>
R575
1 2
RP119
4 5
RP119
2 7
RP101
1 8
RP101
3 6
U25
C5
E6
U14
T7
N2
N1
L13
H12
AN2
AK5
AN1
AM3
B6
B5
P5
L1
L4
M4
P7
N5
K1
K2
L2
N4
M1
M2
T2
U5
D3
E7
D6
B4
A4
D7
G9
E8
J12
C4
D2
AP5
AK8
AT5
AH10
AR5
AN6
AM7
AK10
AR6
H10
E9
D8
A6
B7
G10
D9
E10
H9
A7
A5
R702
1 2
R303
1 2
R307
1 2
R576
1 2
R269
1 2
R709
1 2
J18
1
2
3
4
R684
1 2
R637
1 2
R647
1 2
R254
1 2
R257
1 2
RP76
1
2
3
4
8
7
6
5
R714
1
2
R707
1 2
R275
1 2
R673
1
2
RP112
1
2
3
4
8
7
6
5
C92
1
2
RP65
1
2
3
4
8
7
6
5
RP70
1
2
3
4
8
7
6
5
LAST_MODIFIED=Wed Sep 17 12:16:36 2003
59A8>
59A8>
44D2<>
39B1<>
39B1<>
59D8>
43C7<
29C7<>
29C7<>
59D8>
59D8>
35B4<>
57C5>
36B5<>
57A5>
57A5>
57C5>
57C5>
57B5>
57A5>
44C2<>
41A7<
57C5>
57C5>
57C5>
15A6<
15A6<
57A5>
57A5>
57A5>
57A5>
57A5>
57A5>
57A5>
57A5>
57A5>
28D1<
28D1<
57C5>
57C5>
57B5>
57B5>
35C4<
35B3<
28C6<
57B5>
57B5>
57B5>
57B5>
57B5>
35A2<
59C8>
35C8<
34C1<
28B6<
57A5>
36B8<
36B8<
34A3<>
34A3<>
34B5<>
34B5<>
34B1<
35C6<
57C5>
35C6<
57C5>
34B7<
34B7<
35C8<
36C8<
57A5>
57A5>
57A5>
15B3<
35B8<
57A5>
57A5>
35C6<>
35C6<>
35C6<>
57C5>
57C5>
57C5>
57C5>
34B1<
14A6<>
14A6<>
36B8<
57A5>
57A5>
34C1<
34C1<
36B8<
36B8<
36B8<
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36C8<
36C8<
57A5>
36C8<
36C8<
36C8<
36C8<
34B5<>
28A3<>
28A3<>
35C6<>
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35B8<
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8A4<>
28C6<
8A4<>
35B6<
35A8<>
35B8<
35B8<
35B8<
35C8<
35C8<
8A4<>
8A4<>
34C1<
34C1<
28C6<
57A5>
SYM_VER-2
MDIX
XFR-100BT
TX
RX
NC3
NC4
NC1
NC2
FDX
COL
CRS
RXDV
RXER
RXD0
RXD3
RXD2
RXD1
MDC
RESET*
XTALO
XTALI
MDIO
PHYAD3
PHYAD4
PHYAD0
PHYAD1
PHYAD2
RXC
TXD1
TXD0
TXD3
TXER
TXEN
TXD2
TXC
RDAC
XMTLED*
LOW_PWR
MII_EN
TESTEN
ENERGY_DET
SD-
SD+
RD+
RD-
TD+
TD-
OVDD2
OVDD1
OVDD/NC
BIASVDD
BIASGND
AGND1
AGND2
PLLGND
AVDD2
AVDD1
DVDD2
DVDD1
REGAVDD
REGDVDD
DGND1
DGND2
OGND2
OGND1
OGND3/
JTAG_EN
RCVLED/JTAG_TDO*
SPDLED/JTAG_TMS*
LNKLED/JTAG_TDI*
F100/JTAG_TCK
ANEN/JTAG_TRST
REFCLK
TRANSC_BCM5221
DRAWING
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
JTAG_ENET_TDI
PLACE CLOSER TO PIN 22
PIN 55PIN 12
PIN 27, 28
PIN 8PIN 3
ENET_AVDD
ENET_AVDD
NOTE: 1.5MM SPACE FROM TRACE TO GND
10/100 XMIT LINK
FOR ALTERNATE CRYSTAL
NC
NC
NC
NC
NC
PHY ADDRESS 00000
NC
(514-0030)
ETHERNET PHY
ADD DUAL LAYOUT SUPPORT
RE-PLACE NEAR PIN 1>
PLACE NEAR PIN 20
PIN 46
1%
MF
402
1/16W
49.9
1/16W
1%
49.9
402
MF
402
49.9
1%
1/16W
MF
402
1%
1/16W
MF
49.9
1%
1/16W
MF
402
10K
1.27K
402
1%
1/16W
MF
402
5%
1/16W
MF
33
5%
33
1/16WMF402
5%
1/16W
SM1
33
CRITICAL
8X4.5MM-SM
25.0000M
27PF
402
5%
50V
CERM
402
5%
50V
CERM
27PF
20%
CERM
402
10V
0.1UF
33
MF
1/16W
5%
402
402
CERM
16V
10%
0.01UF
10%
16V
CERM
402
0.01UF
N20P80%
10UF
10V
Y5V
805
805
N20P80%
10UF
10V
Y5V
N20P80%
10V
805
10UF
Y5V
MF
1/16W
402
1K
1%
1/16W
5%
33
1/16W
5%
33
33
1/16W
5%
+3V_MAIN
+3V_MAIN
1/16W
MF
4.7K
5%
402
1K
402
MF
5%
1/16W
NOSTUFF
SOT23
1N914
TH-NMP-1
0.1UF
CERM
402
10V
20%
75
402
1/16W
MF
1%
0.1UF
CERM
20%
10V
402
75
1%
402
1/16W
MF
75
1%
1/16W
MF
402
75
1%
402
MF
1/16W
SM
10V
20%
0.1UF
402
CERM
10V
20%
0.1UF
CERM
402
GREEN
DEV
SM
SEE_TABLE
FLAS-1
CRITICAL
0.1UF
CERM
20%
10V
402
10K
1%
402
MF
1/16W
+3V_MAIN
402
1%
1/16W
MF
1.5K
402
1/16W
10K
1%
MF
10K
1/16W
5%
SM1
330
DEV
MF
1/16W
5%
402
330
DEV
402
5%
1/16W
MF
330
DEV
MF
1/16W
5%
402
0.001UF
1808
20%
2KV
CERM
+3V_MAIN
CERM
402
0.1UF
20%
10V
NOSTUFF
402
MF
1/16W
5%
0
GREEN
DEV
SM
GREEN
DEV
SM
1/16W
MF
4.7K
5%
402
402
10V
0.1UF
20%
CERMCERM
402
10V
20%
0.1UF0.1UF
CERM
10V
402
20%20%
CERM
402
0.1UF
10V
ENET_BCM5231CRITICAL
U37
338S0127
IC,BCM5231,FAST ENET XCVR,64P,TQFP
1
13
051-6497
6935
MIN_LINE_WIDTH=20
ENET_RX_DV
ENET_PHY_COL
JTAG_ASIC_TDO
ENET_ENERGY_DET
ENET_PHY_TX_ER
JTAG_ASIC_TMS
XMIT_LED
ANEN
JTAG_ENET_TDI
MII_EN
ETHPHYRESET_L
CLK25M_ENET_XIN
ENET_MDIO
ENET_AVDD
MIN_LINE_WIDTH=20
ENET_AVDD
MIN_LINE_WIDTH=20
ENET_PHY_RX_ER
RJ45_4_5
RJ45_RXN
RJ45_RXP
RJ45_7_8
OGND3_JTAG_EN
LOW_PWR
TESTEN
FDX
JTAG_ASIC_TMS
DS3P1
XMIT_LED
DS1P1
JTAG_ENET_TDI
DS2P1
INT_RESET_L
INT_ENET_RST_L
IO_RESET_L
ENET_CRS
ENET_RX_ER
RJ45_TXN
RJ45_TXP
RJ45_RREF
RJ45_TREF
RJ45_F_TREF
NO_TEST
NC_TX1_4
NO_TEST
NC_TX1_3
NC_TX1_2
NO_TEST
NC_TX1_1
NO_TEST
FDX
CLK25M_ENET_XOUT
ENET_MDC
ENET_PHY_TXD<0>
ENET_PHY_TXD<1>
ENET_PHY_TX_EN
JTAG_ASIC_TCK
NC_UB3P4
NO_TEST
ENET_TDP
ENET_PHY_RX_DV
ENET_RDP
ENET_RDN
ENET_TDN
LOW_PWR
ENET_PHY_CRS
ENET_PHY_RXD<0>
ENET_PHY_RXD<1>
ENET_PHY_RXD<2>
ENET_PHY_RXD<3>
ENET_LINK_RXD<0>
ENET_LINK_RXD<1>
ENET_LINK_RXD<2>
ENET_LINK_RXD<3>
CLKENET_PHY_TX
NO_TEST
CLKENET_LINK_TX
CLKENET_PHY_RX
CLKENET_LINK_RX
ENET_PHY_TXD<2>
ENET_PHY_TXD<3>
MIN_LINE_WIDTH=20
ENET_DVDD
MIN_LINE_WIDTH=20
ENET_RDAC_PD
JTAG_INTRP_TDO
TESTEN
ENET_COL
<XR_PAGE_TITLE>
R96
1
2
DS2
1
2
DS3
1
2
DS1
1
2
R485
1
2
C65
1
2
C37
1
2
C66
1
2
C41
1
2
R33
1
2
R30
1
2
R37
2
1
R40
2
1
R26
1
2
R42
1
2
R38
1 2
R34
1 2
RP1
1
2
3
4
8
7
6
5
Y6
1 2
C76
1
2
C74
1
2
C44
1
2
R29
1 2
C56
1
2
C67
1
2
C57
1
2
C52
1
2
C68
1
2
R76
1 2
RP15
1 8
RP15
3 6
RP15
2 7
R75
1 2
D9
13
J1
10
9
1
2
3
4
5
6
7
8
C400
1
2
R390
1
2
C401
1
2
R391
1
2
R393
1
2
R394
1
2
T1
1
10
11
14
15
16
2
3
6
7
8 9
4
5
12
13
C438
1
2
C434
1
2
U37
29
32
38
27
28
24
22
61
62
54
63
2
55
17
37
39
35
16
42
41
18
40
45
64
8
1
46
10
11
12
13
14
7
33
26
25
23
4
20
3
9
50
48
47
44
43
49
51
21
19
36
31
30
15
53
57
58
59
60
56
52
34
6
5
C53
1
2
R27
1
2
R28
1
2
R165
1
2
RP16
1
2
3
4
8
7
6
5
R486
1
2
R491
1
2
R492
1
2
C3
1
2
C3501
1
2
R326
1 2
LAST_MODIFIED=Wed Sep 17 12:16:38 2003
52C4
43A5<
42A6<>
42A5<>
41D3< 41C3< 41B3<
41B1<>
41A4<
41A2<>
40C6<
59D8>
59D8>
44D2<>
59A8>
40B6<
35A2<
35B4<>
43C7<
44D3<
59D8>
40B5<>
57B5>
59D8>
28C1<
57C5>
34B7<
52C6>
52C6>
34B7<
41A7<
44B8<>
57B5>
57B5>
57C5>
57C5>
57C5>
34B7<
57B5>
57B5>
57B5>
57B5>
57C5>
57C5>
57C5>
57C5>
34B7>
57B5>
35C1<>
34C7<
57B5>
8A4<>
28B5<>
34D7<
8A4<>
35A2<
52C4
35A2<
57B5>
34B7<>
35D2<>
35D4<>
57B5>
57B5>
57B5>
57B5>
57B5>
35B4<
35C4<
35C4<
8A4<>
35B4<>
35B5<>
34C3<
28D1<
32A6<
34C7<
34C7<
57B5>
57B5>
57B5>
57B5>
57B5>
35A5<
57B5>
34B7>
34C7<
34C7<
34D7<
8A4<>
57B5>
57B5>
57B5>
57B5>
57B5>
35A5<
57B5>
57B5>
57B5>
57B5>
57B5>
34C7<
34C7<
34C7<
34C7<
57C5>
34D7<
57C5>
34C7<
34C7<
34C7<
28C6<
35A5<
34B7<
VTAP
IN
OUT
SENSE
GND
FDBK
ERR
LP2951
SHUT
SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
NC_44
NC_45
NC_46
NC_47
TPB1-
NC_48
TPBIAS1
D5
D6
D4
D3
D0
D1
D2
DGND0
DGND1
DGND2
DGND3
DGND4
CNA
D7
CTL1
PD
PLLVDD
LPS
RESET
LREQ
ISO
SM
SE
SYSCLK
CTL0
XO
CPS
XI
AVDD0
AVDD1
AVDD2
AVDD3
AVDD4
DVDD3
DVDD0
DVDD1
DVDD4
DVDD2
TPBIAS0
TPA0+
TPA0-
TPB0-
TPB0+
TPA1+
TPB1+
TPA1-
R0
R1
PC0
PC1
PC2
C/LKON
PLLVSS
AGND3
AGND2
AGND1
AGND0
VGND
VP
TPI#
TPI
TPO#
TPO
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
CHASSIS
ALT
VGND
VP
TPI#
TPI
TPO#
TPO
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
DRAWING
ONE CAP FOR EACH DIODE PIN
FIREWIRE PHY
[OUT]
3A
(155S0109)
(155S0109)
AVDD BYPASS
DO NOT STUFF R1 PER SAFETY REQUIREMENTS
3A
DVDD BYPASS
PORT 1
(514-0023)
(514-0023)
PORT 2
1210
10%
CERM
0.1UF
50V
1%
1/16W
MF
603
2.49K
402
5%
25V
CERM
220PF
402
5%
25V
CERM
220PF
1%
1/16W
MF
603
56.2
603
MF
1/16W
1%
56.2
603
1%
1/16W
MF
56.2
1%
1/16W
MF
603
56.2
603
MF
1/16W
5%
390K
PHY_NOT_LEAKS
805
CERM
16V
20%
0.47UF
20%
16V
CERM
805
0.47UF
603
MF
1/16W
1%
56.2
603
MF
1/16W
1%
56.2
603
MF
1/16W
1%
56.2
1%
1/16W
MF
603
56.2
SM
2N3904
Y5V
10V
N20P80%
805
10UF
NOSTUFF
Y5V
10V
N20P80%
805
10UF
NOSTUFF
Y5V
10V
N20P80%
805
10UF
MURS320T3
SM
FW_12V
1UF
20%
CERM
1206
25V
10PF
CERM
50V
5%
402
NOSTUFF
10PF
CERM
50V
5%
402
NOSTUFF
SOI-3.3V
PHY_LEAKS
402
MF
1/16W
5%
47
402
5%
MF
4.7K
1/16W
SM
0.75AMP
SEE_TABLE
SOT-363
BAV99DW
SOT-363
BAV99DW
SOT-363
BAV99DW
SOT-363
BAV99DW
SOT-363
BAV99DW
SOT-363
BAV99DW
SOT-363
BAV99DW
SOT-363
BAV99DW
5%
SM1
1/16W
33
5%
SM1
1/16W
33
402
MF
1/16W
5%
33
5%
1/16W
MF
402
33
5%
1/16W
MF
402
33
402
CERM
16V
10%
0.01UF
402
10%
16V
CERM
0.01UF
402
CERM
16V
10%
0.01UF
CERM
16V
10%
402
0.01UF
402
CERM
16V
10%
0.01UF
10%
16V
CERM
0.01UF
402402
10%
0.01UF
CERM
16V
402
10%
16V
CERM
0.01UF
10%
16V
CERM
402
0.01UF
402
10%
16V
CERM
0.01UF
402
10%
16V
CERM
0.01UF
16V
402
CERM
10%
0.01UF
NOSTUFF
402
5%
50V
CERM
10PF
5%
NOSTUFF
402
50V
CERM
10PF
NOSTUFF
402
5%
50V
CERM
10PF
NOSTUFF
402
5%
50V
CERM
10PF
NOSTUFF
402
5%
50V
CERM
10PF
NOSTUFF
402
5%
50V
CERM
10PF
CERM
50V
5%
603
0.01UF
603
5%
50V
CERM
0.01UF
0.01UF
CERM
50V
5%
603 603
0.01UF
CERM
5%
50V
402
5%
MF
1/16W
4.7K
1/16W
MF
5%
402
4.7K
1/16W
5%
MF
402
4.7K
402
5%
1/16W
MF
2K
SM
165-OHM
165-OHM
SM
165-OHM
SM
165-OHM
SM
402
50V
CERM
10%
0.001UF
CERM
50V
10%
402
0.001UF 0.001UF
CERM
50V
402
10%
402
10%
50V
CERM
0.001UF
402
50V
CERM
10%
0.001UF
CERM
50V
402
10%
0.001UF
402
50V
CERM
10%
0.001UF
CERM
50V
402
10%
0.001UF
SOT23
1N5227B
CERM
0.001UF
402
50V
10%20%
10V
CERM
402
0.1UF
1%
MF
1/16W
402
10K
402
CERM
10V
20%
0.1UF
20%
10V
CERM
402
0.1UF
SM
FERRITE-4532
TQFP
FW802A
NOSTUFF
5%
1/16W
MF
402
5.1M
TH-NMP-UF1161C
SM
FERRITE-4532
1210
CERM
50V
10%
0.1UF
SEE_TABLE
0.75AMP
SM
NOSTUFF
5%
1/8W
FF
1206
0
1%
402
1/16W
MF
100
NOSTUFF
5%
50V
CERM
402
47PF
1/16W
402
MF
5%
4.7K
402
10%
50V
CERM
0.001UF
0.001UF
402
10%
50V
CERM
SM
100-OHM-EMI
22UF
ELEC
4V
20%
SM
NOSTUFF
22UF
SM
ELEC
4V
20%
2512
FF
5%
1W
56
603
MF
5%
0
1/16W
NOSTUFF
MURS320T3
SM
FW_24V
603
1%
1/16W
MF
4.99K
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10%
402
0.01UF
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4.99K
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603
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CRITICAL
SM
24.576M
402
5%
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CERM
27PF
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CERM
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36 69
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13
FUSE,0.5A,SMD
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FW_DIODE_BYPASS_V
FW_DIO_V
FW_PHY_D<6>
FW_PWR
FW_VP
FW_PWR_SW
3.8V_TRICKLE
FW_PHY_3_3
FW_PHY_3_3
FW_VREG_FB
U22_8
FW_PHY_RST*
FW_XI_A
FW_C_LKON
FW_TPB2 FW_TPB1
FW_SCLK
FW_PHY_ISO*
FW_R1
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FW_D<5>
FW_D<6>
FW_D<7>
FW_D<3>
FW_D<2>
FW_D<0>
FW_D<1>
FW_CNTL1
FW_CNTL0
FWPHYRST
FW_PHY_D<3>
FW_PHY_D<2>
FW_PHY_D<0>
FW_PHY_D<7>
FW_PHY_D<5>
FW_PHY_D<4>
FW_PHY_SCLK
FW_PHY_RST
FW_R0
FW_CPS
FW_VP_2
FW_XO
FW_PHY_3_3
FW_TPO2N
FW_TPI1P
FW_TPI2P
FW_TPO1P
FW_TPO2P
FW_TPI1N
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FW_TPI2N
+12V_MAIN
NO_TEST
NC_FW_CNA
FW_PHY_D<1>
FW_PHY_CNTL1
FW_PHY_CNTL0
FW_VP_1
FW_XI
FW_BIAS2
FW_BIAS1
FW_TPA2N
FW_TPA2P
FW_TPB2N
FW_TPI2N
FW_TPO1P
FW_TPA1N
FW_TPA1P
FW_TPI2P
FW_TPB2P
FW_PHY_3_3
FW_TPO2N
FW_TPO2P
FW_VP1
FW_VP1
FW_TPO1N
FW_TPI1P
FW_TPI1N
FW_TPB1N
FW_TPB1P
FW_VP2
FW_VP2
FW_LREQ
FW_LPS
<XR_PAGE_TITLE>
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LAST_MODIFIED=Wed Sep 17 12:16:41 2003
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IDECS1
IDEDMACK
IDEDMARQ
IDERD
IDEWR
IDERST
IDEA9
IDEA8
IDEA7
IDEA6
IDEA5
IDEA4
IDEA3
IDEA2
IDEA1
IDEA0
IDEDD15
IDEDD14
IDEDD13
IDEDD12
IDEDD11
IDEDD10
IDEDD9
IDEDD8
IDEDD7
IDEDD6
IDEDD5
IDEDD4
IDEDD3
IDEDD2
IDEDD1
IDEDD0
CARDSLOT
CS_WAIT
CS_OE
CS_WE
ATA_INTRQ
ATA_DMARQ
ATA_CHRDY
ATA_DMACK
ATA_RD
ATA_WR
ATA_RST
ATA_VREF
UATA100
ATA_A1
ATA_A2
ATA_A0
ATA_D12
ATA_D11
ATA_D15
ATA_D14
ATA_D13
ATA_D10
ATA_D9
ATA_D3
ATA_D2
ATA_D1
ATA_D0
ATA_D4
ATA_D8
ATA_D7
ATA_D6
ATA_D5
(5 OF 9)
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(ON PAGE 12)
INTREPID UATA/IDE
MF
1/16W
5%
402
4.7K
CERM
50V
5%
402
NOSTUFF
10PF
402
MF
1/16W
1%
1K
BGA
SEE_TABLE
INTREPID
1%
402
MF
1/16W
10K
1%
1/16W
MF
402
10K
402
MF
1/16W
1%
10K
1/16W
5%
SM1
33
5%
1/16W
SM1
33
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1/16W
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SM1
33
1/16W
5%
SM1
33
402
1/16W
5%
MF
22
5%
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33
1/16W
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1/16W
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SM1
33
402
1/16W
MF
1K
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1/16W
5%
MF
402
22
+5V_SLEEP
1%
1/16W
MF
402
10K
1%
402
MF
1/16W
10K
MF
5%
1/16W
402
22
402
1/16W
5%
MF
33
5%
402
1/16W
MF
22
402
MF
5%
1/16W
22
402
1/16W
MF
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82.5
402
5%
50V
CERM
NOSTUFF
10PF
MF
5%
1/16W
402
33
SM1
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1/16W
33
SM1
1/16W
5%
33
SM1
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1/16W
33
SM1
1/16W
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33
SM1
5%
1/16W
33
SM1
1/16W
5%
33
SM1
1/16W
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33
SM1
5%
1/16W
33
SM1
1/16W
5%
33
SM1
5%
1/16W
33
MF
1/16W
402
5%
22
SM1
5%
1/16W
33
5%
1/16W
SM1
33
SM1
5%
1/16W
33
SM1
1/16W
5%
33
SM1
5%
1/16W
33
SM1
1/16W
5%
33
1%
1/16W
402
MF
10K
1%
1/16W
MF
402
10K
+3V_MAIN
MF
402
1%
1/16W
82.5
+5V_SLEEP
5%
1/16W
MF
402
NOSTUFF
4.7K
402
5%
1/16W
MF
NOSTUFF
4.7K
402
1/16W
MF
1%
NOSTUFF
10K
603
X7R
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37
051-6497
13
69
3_6V_SLEEP
HD_RESET_L
HD_IOCHRDY
EIDE_DATA<7>
CD_DSTB_RDY
CD_RESET_LEIDE_RST_L
EIDE_DMACK_L
CD_DMACK_L
CD_HSTB_RDY
EIDE_HSTB_RDY
CD_STOP
EIDE_STOP
EIDE_DSTB_RDY
UATAD<1>EIDE_DATA<1>
UATAD<0>EIDE_DATA<0>
UATAD<2>EIDE_DATA<2>
UATAD<3>EIDE_DATA<3>
UATAD<5>EIDE_DATA<5>
UATAD<4>EIDE_DATA<4>
UATAD<6>EIDE_DATA<6>
UATAD<7>
EIDE_DATA<9> UATAD<9>
EIDE_DATA<8> UATAD<8>
EIDE_DATA<11>
UATAD<11>
UATAD<13>
EIDE_DATA<13>
EIDE_DATA<10>
UATAD<10>
UATAD<12>
EIDE_DATA<12>
UATAD<15>
EIDE_DATA<15>
UATAD<14>
EIDE_DATA<14>
UIDE_DMARQ
UIDE_INTRQ
NC_CSLOT_CE2_L
NC_CSLOT_CE1_L
UIDE_CS3FX_L
UIDE_CS1FX_L
NC_CSLOT_IOWR_L
EIDE_INTRQ
EIDE_DMACK_L
EIDE_DMARQ
EIDE_STOP
EIDE_HSTB_RDY
EIDE_RST_L
EIDE_DSTB_RDY
NC_CSLOT_ADDR<9>
NC_CSLOT_ADDR<8>
NC_CSLOT_ADDR<7>
NC_CSLOT_ADDR<6>
NC_CSLOT_ADDR<5>
NC_CSLOT_ADDR<4>
NC_CSLOT_ADDR<3>
EIDE_ADDR<2>
EIDE_ADDR<1>
EIDE_ADDR<0>
EIDE_DATA<14>
EIDE_DATA<15>
EIDE_DATA<13>
EIDE_DATA<11>
EIDE_DATA<12>
EIDE_DATA<9>
EIDE_DATA<10>
EIDE_DATA<8>
EIDE_DATA<6>
EIDE_DATA<7>
EIDE_DATA<4>
EIDE_DATA<5>
EIDE_DATA<3>
EIDE_DATA<2>
EIDE_DATA<1>
EIDE_DATA<0>
CSLOT_IOWAIT_L
NC_CSLOT_WE_L
NC_CSLOT_OE_L
UIDE_IOCHRDY
UIDE_DMACK_L
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_RST_L
UIDE_REF
UIDE_ADDR<2>
UIDE_ADDR<1>
UIDE_ADDR<0>
UIDE_DATA<5>
UIDE_DATA<15>
UIDE_DATA<14>
UIDE_DATA<13>
UIDE_DATA<12>
UIDE_DATA<11>
UIDE_DATA<10>
UIDE_DATA<9>
UIDE_DATA<8>
UIDE_DATA<7>
UIDE_DATA<6>
UIDE_DATA<4>
UIDE_DATA<3>
UIDE_DATA<2>
UIDE_DATA<1>
UIDE_DATA<0>
EIDE_CS1FX_L
EIDE_CS3FX_L
UIDE_IOCHRDY
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_DATA<7>
UIDE_DATA<1>
UIDE_DATA<3>
UIDE_DATA<5>
UIDE_DATA<0>
UIDE_DATA<2>
UIDE_DATA<4>
UIDE_DATA<6>
UIDE_DATA<9>
UIDE_DATA<11>
UIDE_DATA<13>
UIDE_DATA<8>
UIDE_DATA<10>
UIDE_DATA<14>
UIDE_DATA<15>
UIDE_DATA<12>
HD_DIOR_L
HD_DMACK_L
HD_DIOW_L
T_UD_IDEDD_0
T_UD_IDEDD_1
T_UD_IDEDD_3
T_UD_IDEDD_5
T_UD_IDEDD_2
T_UD_IDEDD_4
T_UD_IDEDD_6
T_UD_IDEDD_7
T_UD_IDEDD_8
T_UD_IDEDD_9
T_UD_IDEDD_11
T_UD_IDEDD_12
T_UD_IDEDD_10
T_UD_IDEDD_13
T_UD_IDEDD_14
T_UD_IDEDD_15
UIDE_DMACK_L
UIDE_RST_L
NC_CSLOT_IORD_L
<XR_PAGE_TITLE>
R759
1
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R635
1
2
R773
1 2
R270
1 2
R626
1 2
R273
1 2
R753
1 2
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1
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R624
2
1
U25
Y5
AB1
Y7
AA5
AA4
AB2
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AB4
AB5
AD2
AC4
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AF5
AE7
AK1
AG5
AH4
AL1
AK2
AH5
AF7
AG7
AK4
AB7
AM1
AC5
AD4
AF4
AH2
AD7
AG4
AJ1
AJ2
AF1
AG1
AF2
AH1
AD5
AG2
AE4
AE5
AG8
AH7
AA7
AL2
AJ4
AM2
R679
1
2
R767
1
2
RP118
1 8
RP118
2 7
RP118
3 6
RP118
4 5
RP103
1 8
RP103
2 7
RP103
3 6
RP103
4 5
RP106
18
RP106
27
RP106
36
RP106
45
RP114
18
RP114
27
RP114
36
RP114
45
R754
1
2
R768
1
2
R623
1
2
R774
1 2
R627
1 2
R258
1 2
R263
1 2
R761
1 2
C917
1
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1 8
RP111
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RP111
3 6
RP111
4 5
RP104
1 8
RP104
2 7
RP104
4 5
RP104
3 6
RP107
27
RP107
18
RP107
36
RP107
45
RP115
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RP115
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1
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1
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LAST_MODIFIED=Wed Sep 17 12:16:43 2003
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38C3<>
37B7<>
38C6<>
38C6<>
37A7>
37A7<> 38C6<>
38C6<>
37A7>
38C6<>
37A7>
37A7<
38C6<> 37B7<>
38C6<> 37B7<>
38C6<> 37B7<>
38C6<> 37B7<>
38C6<> 37B7<>
38C6<> 37B7<>
38C6<> 37B7<>
38C6<>
37B7<> 38C6<>
37B7<> 38C6<>
37B7<> 38C6<>
38C6<> 37B7<>
37B7<> 38C6<>
38C6<> 37B7<>
38C6<> 37B7<>
38C6<> 37B7<>
38C4<
38C4<
38B4<
38B4<
38C8<
37D5<
38C8<
37D5<
37C5<
37D5<
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38B8<
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37A5<
37A5<
37A5<
37B5<
37B5<
37B5<
37B5<
37B5<
37B5<
37B5<
37B5<
37B5<
37C5<
37C5<
37C5<
37C5<
52A8>
37C3<
37D3<
37D3<
37C3<
37D3<
38A4<
38B4<
38B4<
37B3<
37A3<
37A3<
37A3<
37B3<
37B3<
37B3<
37B3<
37B3<
37B3<
37B3<
37B3<
37C3<
37C3<
37C3<
37C3<
38B8<
38B8<
37C7<
37C7<>
37C7<>
37D7<>
37D7<>
37D7<>
37D7<>
37D7<>
37D7<>
37D7<>
37D7<>
37D7<>
37C7<>
37C7<>
37D7<>
37C7<>
37C7<>
37C7<>
37C7<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
37C7<>
37C7<>
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE NEAR CONNECTOR
OPTICAL DRIVE INTERFACE
(515-1588)
CD/HD CONS
(515-1588)
ATA-100 INTERFACE
ATA-100 ACTIVE
OPTICAL DRIVE ACTIVE
5.6K
402
MF
1/16W
5%
0
1/16W
5%
MF
402
0.047UF
603
CERM
16V
5%
100PF
402
5%
50V
CERM
ST-NC20
TH
GREEN
DEV
SM
CERM
100PF
NOSTUFF
50V
5%
603
100PF
402
CERM
50V
5%
0
5%
1/16W
MF
603
0.047UF
5%
16V
CERM
603
5.6K
1/16W
MF
5%
402
82.5
MF
402
1/16W
1%
33
MF
402
5%
1/16W
GREEN
DEV
SM
33
MF
402
5%
1/16W
33
5%
MF
402
1/16W
33
402
1/16W
5%
MF
33
1/16W
402
MF
5%
ST-NC20
TH
1K
NOSTUFF
402
MF
1/16W
5%
+5V_SLEEP
+5V_SLEEP
5%
1/16W
MF
402
NOSTUFF
1K
6.2K
5%
1/16W
MF
402
82.5
1/16W
402
MF
1%
82.5
1%
1/16W
402
MF
33
MF
402
5%
1/16W
33
1/16W
5%
402
MF
33
MF
402
5%
1/16W
33
1/16W
5%
402
MF
33
1/16W
5%
402
MF
+5V_SLEEP
+5V_SLEEP
82.5
1%
1/16W
MF
402
6.2K
5%
1/16W
MF
402
330
DEV
MF
1/16W
5%
402
330
DEV
MF
1/16W
5%
402
69
051-6497
13
38
EIDE_IOCS16_L
UATAD<9>
UIDE_CSELP_L
UNUSED_ATAIOCS16_L
UATAD<10>
UATAD<8>
CD_CS1FX_L
CD_EIDE_ADDR<0>
CD_EIDE_ADDR<1>
CD_DMACK_L
CD_DSTB_RDY
CD_HSTB_RDY
UIDE_DMARQ
HD_DMARQ
UIDE_ADDR<2>
UIDE_CS3FX_L
UIDE_INTRQ
UIDE_CS1FX_L
UIDE_ADDR<0>
UIDE_ADDR<1>
HD_UIDE_ADDR<2>
HD_UIDE_CS3FX_LHD_UIDE_CS1FX_L
HD_UIDE_ADDR<0>
HD_INTRQ
HD_UIDE_ADDR<1>
T_UD_IDEDD_4
T_UD_IDEDD_5
T_UD_IDEDD_6
T_UD_IDEDD_7
HD_DMACK_L
HD_IOCHRDY
HD_DIOR_L
HD_DIOW_L
T_UD_IDEDD_0
T_UD_IDEDD_1
T_UD_IDEDD_2
T_UD_IDEDD_3
HD_RESET_L
UATAD<4>
UATAD<5>
UATAD<6>
UATAD<7>
CD_STOP
UATAD<0>
UATAD<1>
UATAD<2>
UATAD<3>
CD_RESET_L
EIDE_CSELP_L
EIDE_PDIAG UIDE_PDIAG
DS2_1
DS6_1DS6_2
DS2_2
UATAD<14>
UATAD<15>
UATAD<13>
UATAD<12>
UATAD<11>
T_UD_IDEDD_12
T_UD_IDEDD_14
T_UD_IDEDD_15
T_UD_IDEDD_13
T_UD_IDEDD_11
T_UD_IDEDD_9
T_UD_IDEDD_8
T_UD_IDEDD_10
CD_EIDE_ADDR<2>
UATA0IRQ
EIDE_INTRQ
EIDE_ADDR<1>
EIDE_ADDR<0>
EIDE_ADDR<2>
EIDE_CS1FX_L
CD_CS3FX_L
EIDE_CS3FX_L
CD_DMARQ
EIDE_DMARQ
<XR_PAGE_TITLE>
R744
1
2
R760
1
2
C921
1
2
C923
1
2
J15
1
10
11 12
13 14
15 16
17 18
19
2
21 22
23 24
25 26
27 28
29
3
30
31 32
33 34
35 36
37 38
39
4
40
5 6
7 8
9
DS8
1
2
C919
1
2
C924
1
2
R758
1
2
C920
1
2
R745
1
2
R743
1 2
R785
1 2
DS7
1
2
R786
1 2
R268
1 2
R787
1 2
R265
1 2
J16
1
10
11 12
13 14
15 16
17 18
19
2
21 22
23 24
25 26
27 28
29
3
30
31 32
33 34
35 36
37 38
39
4
40
5 6
7 8
9
R779
1
2
R781
1
2
R775
1
2
R737
1 2
R782
1 2
R789
1 2
R784
1 2
R790
1 2
R788
1 2
R791
1 2
R783
1 2
R780
1
2
R792
1
2
R793
1
2
LAST_MODIFIED=Wed Sep 17 12:16:45 2003
59D8>
51C8<
51C5<>
50D5<
46D6<>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58C5>
58B5>
58B5>
58C5>
58B5>
58B5>
58B5>
58C2>
58C2>
58B2>
58B2>
58C5>
58C5>
58C5>
58C5>
58C2>
58C2>
58C2>
58C2>
58C5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5>
58D5> 58B2>
58B2>
58B2>
58B2>
58B2>
58B2>
58B2>
58B2>
58C5>
58C5>
58C5>
58C5>
58C5>
58C5>
58D5>
46C7<
52A8>
37B4<
52A8>
52A8>
37B4<
37B4<
58C5>
58C5>
58C5>
37D4<
37C4<
37C4<
37C7<>
58C5>
37C7<>
37C7<>
37C7<
37C7<>
37C7<>
37C7<>
58C5>
58B5> 58B5>
58C5>
58C5>
58C5>
37B1<
37B1<
37B1<
37B1<
37D1<
37C1<
37D1<
37C1<
37C1<
37C1<
37C1<
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52A8>
37A4<
37A4<
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58D5>
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37A1<
37A1<
37A1<
37B1<
37B1<
37B1<
37B1<
58C5>
58D5>
37A7<
37B7>
37B7>
37B7>
37A7>
58C5>
37A7>
58D5>
37A7<
XTLIN0
XTIN1/MCLK
AINRP
AINRM
AINLP
AINLM
LINA
LINB
RINA
RINB
AOUTR
AOUTL
SDIN2
SDIN1
SDOUT0
SDOUT1
SDOUT2
GPI1
GPI0
GPI2
GPI4
GPI5
GPI3
IFM/S
ALLPASS
CS1
CAP_PLL
CLKSEL
VREFP
VREFM
PWR_DN
RESET
TEST
DVDD AVDD
NC0
NC1
AVSS
(REF)
AVSSDVSS
MCLKO
SDA
VRFILT
INPA
SCL
SCLK/O
VCOM
LRCLK/O
VTAP
IN
OUT
SENSE
GND
FDBK
ERR
LP2951
SHUT
(SYM_VER1)
IN
ADJ/GND
OUT
S
D
G
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
AUDIO CODEC
& VOLTAGE REGS
DIRECT FROM PS (TRACES)
0
5%
1/16W
MF
402
0
5%
1/16W
MF
402
1%
1/16W
MF
402
100K
+3V_MAIN
100UH
SMA
0.1UF
16V
603
20%
CERM
TAS3004
PQFP
50R28
SM
22UF
20%
10V
TANT
SMB
1%
10K
402
MF
1/16W
180
402
1/16W
MF
5%
MF
560
1/16W
5%
402
47PF
NOSTUFF
5%
50V
CERM
402
22UF
SMB
20%
10V
TANT
0.1UF
20%
16V
CERM
603
SOI-3.3V
LM1117
SOT-223-4
5.11
1%
1/10W
FF
805
0.01UF
603
CERM
50V
5%
0.1UF
603
CERM
16V
20%
603
20%
16V
CERM
0.1UF
5%
25V
CERM
603
1000pF
24.9K
1%
1/16W
MF
402
24.9K
MF
1/16W
1%
402
1UF
10%
CERM
805
10V
0.1UF
20%
16V
CERM
603
1000pF
603
CERM
25V
5%
47
47UF
ELEC
16V
20%
SM
3.3UF
10%
16V
TANT
SMA
1UF
10%
10V
CERM
805
SM
0.1UF
16V
CERM
603
20%
SM
3.3UF
10%
16V
SMA
TANT
NOSTUFF
SM
SM
SM
SM
0.1UF
20%
16V
CERM
603
22UF
20%
10V
TANT
SMB
0.1UF
20%
16V
CERM
603
22UF
10V
SMB
TANT
20%
47UF
SM
20%
16V
ELEC
2N7002
SM
13
39
051-6497
69
U5_SDOUT
OPA_STAR_GND
AUD_R_FB
NC_VR4
AOUTL
AOUTR
SND_CLKOUT
REF_STAR_GND
REF_STAR_GND
TAS_STAR_GND
NO_TEST
NC_SDOUT2
+3V_AUDIO
NO_TEST
NC_INPA
NO_TEST
NC_TAS_SDOUT1
NO_TEST
NC_XTLINO
+5V_AUDIO
PWR_UP
AUDIO_TO_SND
SLEEP_OFF_L2
+3V_AUDIO
VREFP
VREFM
AINLM
AINRM
AINRP
CY69P2
CAP_PLL
R264P2
TAS_DVDD
UX6P23
TAS_VCOMTAS_VCOM
VRFILT
AINLP
LINA
RINA
MIC_IN
SND_TO_AUDIO
TAS_PWR_DOWN
SND_HW_RESET_L
INT_I2C_DATA2
INT_I2C_CLK2
SND_SCLK
SND_SYNC
TAS_PWR_DOWN
VR4210P1
HP_STAR_GND
AUD_GND
PSEUDO_STAR_GND
OPA_STAR_GND
+12V_MAIN
+5V_AUDIO
UX6_LINB
TAS_STAR_GND
+3V_AUDIO
+3V_MAIN
<XR_PAGE_TITLE>
C579
1
2
R531
1 2
C581
1
2
C587
1
2
C580
1
2
R532
1
2
U15
46
47
43
42
27
39
37
35
4 3
10
11
7
17
18
28
29
30
31
32
33
21
5
1
48
19
12
34
36
8
6
40
41
15
20
16
22
23
25
26
24
9
38
45
44
2
14
13
R528
1
2
R524
1 2
C597
12
C595
1
2
C584
1
2
C578
1
2
R517
1
2
R521
1
2
C588
1
2
C594
1
2
C85
1
2
C600
1
2
C592
1 2
XW4
1 2
XW32
1 2
C591
1
2
XW37
1 2
XW38
1 2
XW5
1 2
XW1
1 2
C539
1
2
C599
1
2
C126
1
2
Q32
3
1
2
R501
1 2
R502
1 2
L63
1 2
C121
1
2
ZH3
1
XW34
1 2
C127
1
2
R482
1
2
R481
1
2
C248
12
C538
1
2
C549
1
2
U14
5
7
4
8 1
2
3
6
VR1
1
3 2
LAST_MODIFIED=Wed Sep 17 12:16:47 2003
59D8> 52C1>
51D7<>
51C3<
51B7<
51A7< 51A5<
50D5<>
50D2<
50C4<> 50B4<> 49D7<>
49D3<> 49C4<>
43D4<
48D6<>
59D8>
43D2<
48C8<>
52C4
43C2<
48C4<>
43C7<
41D7<
42D7<
45D7<
42C8<
43C6<
59D6>
43C6<
59A8>
59A8>
41D4<
42D6<
45D3<>
43C6< 42B7<
43B2<
51C6<
43B2<
34B5<
34B5<
41C5<
42D4<
45B4<>
43B2< 42B5<
43A3<
40C3<
50C8<
40C3<
29C7<>
29C7<>
41B8<
42D3<
43A3<
44D8<
40C3< 41A7<
40C2<
43D3<
43D3<
39D7<
41B8<>
50C3<
39D6<
43D5< 43D5<
28B5<>
28D1<
28D1<
41B4<
42C4<
40C2<
42B3<
41B8<>
39D7< 41A5<
39A7<>
41D7<
41C7<
28A1<
39A5<> 39A5<>
39D2<
39D2<
39D7<
42D8<
28B1<
39D2<
43A3<
39B1<> 39B1<>
40C2<
40B2<
43B2<
28B1<
39D7<
28A8<
28A3<>
28A3<>
28A1<
28B1<
39B4<
41A8<
42B2<
40B4<
39D6<
36D8<
39C6<>
39A7<>
39D6< 40D5<
52C4
S
D
G
V-
V+
V-
V+
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LINE IN BUFFER
KEEP CLOSE TO IC
KEEP SHORT
(514-0084)
MF
402
1/16W
1%
47.5K
MF
402
1%
1/16W
47.5K
1/16W
1%
402
MF
14.7K
MF
402
1%
1/16W
14.7K
MF
402
1%
1/16W
14.7K
1/16W
1%
402
MF
14.7K
402
MF
1/16W
1%
100K
1%
1/16W
MF
402
100K
10V
20%
CERM
402
0.1UF
SM
1000-OHM-EMI
SM
1000-OHM-EMI
50V
5%
402
CERM
100PF
SM
1000-OHM-EMI
SM
1000-OHM-EMI
CERM
402
5%
50V
100PF
SM
1000-OHM-EMI
SM
1000-OHM-EMI
CERM
402
5%
50V
100PF
NOSTUFF
CERM
50V
5%
603
560PF
NOSTUFF
CERM
50V
5%
603
560PF
NOSTUFF
402
CERM
50V
5%
180PF
NOSTUFF
402
CERM
50V
5%
180PF
402
5%
1/16W
MF
470K
402
5%
50V
CERM
100PF
SM
1000-OHM-EMI
SM
1000-OHM-EMI
CERM
16V
20%
805
0.47UF
CERM
16V
20%
805
0.47UF
SM
2N7002
1%
47.5K
1/16W
402
MF
20%
10V
CERM
402
0.1UF
SMA
TANT
16V
10%
3.3UF
SMA
10%
16V
TANT
3.3UF
SMA
10%
16V
TANT
3.3UF
SMA
10%
16V
TANT
3.3UF
SOT23
15V
SOT23
15V
F-RT-TH
JA1333C-AN4
5%
1/16W
MF
603
100
SOI
TLV2362
SOI
TLV2362
1/16W
1%
402
MF
47.5K
MF
402
1%
1/16W
47.5K
40 69
13
051-6497
SND_LIN_SENSE_L
OPA_STAR_GND
C4242P2
U4202P5
LP4202P4
PSEUDO_STAR_GND
OPA_VREF
U4202P3
C4240P2
+3V_MAIN
LINA
+3V_AUDIO
C756_2
U4202P2
RINA
U4202P7
U4202P6
C4237P2
LINSENSE
LP4202P2
C4243P2
LP4202P3
L3202_1
L31_2
L36_2
L32_2
LINE_IN_COM
LINE_IN_SENSE
LINE_IN_SENSE
LINE_IN_R
LINE_IN_R
LINE_IN_L
LINE_IN_L
<XR_PAGE_TITLE>
U6
5
6
7
4
8
U6
3
2
1
4
8
R436
1 2
R437
1 2
R435
1 2
R434
1 2
R442
1 2
R474
1 2
R462
1 2
R448
1 2
R410
1
2
R407
1
2
C506
1
2
L50
1 2
L46
1 2
C437
1
2
L49
1 2
L36
1 2
C431
1
2
L52
1 2
L48
1 2
C447
1
2
C505
1 2
C507
1 2
C513
1 2
C514
1 2
R180
1
2
C454
1
2
L51
1 2
L53
1 2
C64
1 2
C63
1 2
Q35
3
1
2
R175
1
2
C204
1
2
C25
12
C479
12
C480
12
C24
12
D29
1 2
3
D5
12
3
J10
5
6
7
8
1
2
3
4
R420
1
2
LAST_MODIFIED=Wed Sep 17 12:16:48 2003
52C4
52C4
43A5<
43A5<
52C4
52C4
42A6<>
42A6<>
43A5<
43A5<
42A5<>
42A5<>
42A6<>
42A6<>
41D3<
41D3<
42A5<>
42A5<>
41C3<
41C3<
41D3<
41D3<
41B3<
41B3<
41C3<
59D8>
41C3<
41B1<>
41B1<>
41B3<
52C4
41B3<
41A4<
41A4<
41B1<>
43C7<
41B1<>
41A2<>
41A2<>
41A4<
42C8<
41A4<
40C6<
40C6<
41A2<>
42B7<
43C6<
41A2<>
40B6<
40B6<
40C6<
42B5<
43B2<
40C6<
40B5<>
40B5<>
40B5<>
43A3<
41A7<
39D7<
40B6<
35C1<>
35C1<>
35C1<>
59B6>
39D6<
41A5<
39D6<
59B6>
59B6>
59B6>
59B6>
59B6>
59B6>
35C1<>
35B1<
35B1<
35B1<
28B5<>
39A7<>
39B7<>
43A4<>
39D4<
39C4<
39D2<
39C4<
59B6>
40C7<>
40B7<>
40B6<>
40B7<>
40C7<>
40B7<>
35B1<
VO2
GND
VO1
VDD
SHUTDOWN
IN2+
IN2-
BYPASS
IN1+
IN1-
S
D
G
S
D
G
Y
B
A
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GROUND NOISE CANCELLATION
MUTE & SHUTDOWN
HEADPHONE OUT AMP
(514-0084)
HEADPHONE DRIVER AND 2ND ORDER LPF
HP DETECT
POWER SOURCE
LOCATE CLOSE TO AMP
SM
1000-OHM-EMI
SM
1000-OHM-EMI
1%
1/16W
MF
402
9.09K
1%
1/16W
MF
402
9.09K
TANT
SMA
10%
6.3V
22UF
402
10%
50V
CERM
0.001UF
402
MF
1/16W
5%
4.7K
402
MF
1/16W
5%
4.7K
1%
1/16W
MF
402
100K
402
10%
50V
CERM
0.001UF
5%
FF
1/10W
805
HP16_R
33
1/10W
5%
FF
805
33
SM
1000-OHM-EMI
SM
1000-OHM-EMI
50V
5%
CERM
402
100PF
SOI
TPA6112A2
SM
2N7002
SM
20%
16V
ELEC
HPGAL_R
100UF
20%
16V
ELEC
SM
100UF
1%
1/16W
MF
402
25.5K
402
1%
1/16W
20.5K
MF
1%
1/16W
MF
402
25.5K
5%
50V
CERM
402
100PF
5%
50V
CERM
402
100PF
402
1%
1/16W
MF
20.5K
402
MF
1/16W
1%
20.5K
402
1%
1/16W
MF
9.09K
SMA
TANT
16V
10%
3.3UF
SMA
10%
16V
TANT
3.3UF
20%
16V
CERM
805
0.47UF
SM
603
X7R
10%
16V
0.1UF
603
X7R
16V
10%
0.1UF
805
FF
1/10W
5%
0
F-RT-TH
JA1333C-AN4
SM
FERR-250-OHM
SM
1000-OHM-EMI
50V
5%
402
CERM
LO_T1
100PF
SM
1000-OHM-EMI
1%
100K
402
MF
1/16W
1%
1/16W
MF
402
100K
10V
20%
402
CERM
0.1UF
10K
402
MF
1/16W
1%
SM
2N7002
CERM
25V
20%
1206
1UF
SOI
NC7WZ08
NOSTUFF
402
MF
1/16W
5%
0
402
10V
20%
CERM
0.1UF
SOT23
15V
603
20%
16V
CERM
0.1UF
SOT23
15V
SM
1000-OHM-EMI
SM
1000-OHM-EMI
CERM
5%
50V
402
100PF
CERM
5%
50V
402
100PF
41 69
13
051-6497
HPBYP
HPIN_L
HP16_L
HP_STAR_GND
+3V_MAIN
PB_AUDPB_GAL
HP_STAR_GND
PROBE_DIV
HP_TL
HP_TR
HEADPHONE_COM
C412P1
HP_STAR_GND
HP_OUT_L
HP_STAR_GND
HPBYP
+5V_HP
HP_OFF
HPIN_R
HEADPHONE_L
HEADPHONE_R
SND_HP_SENSE_CONN
HPGAL_L
HEADPHONE_R
HEADPHONE_L
+5V_AUDIO
+5V_HP
HP_STAR_GND
HP_TP
L43_1Q25_1
SND_HP_SENSE_CONN
LPR1
LPL1
HP_STAR_GND
AOUTL
OGAL
AOUTR
OGAR
PROBE_DIV
HP_OUT_R
+5V_HP
HP_OFF
INT_RESET_L
SND_HP_MUTE_L
SND_HP_M_L
+3V_MAIN
SND_HP_SENSE_L
<XR_PAGE_TITLE>
D26
12
3
L34
1 2
L27
1 2
L45
1 2
L44
1 2
C408
1
2
D24
1
2
3
C412
1
2
C420
1
2
R473
1 2
R472
1 2
C512
1
2
C43
1
2
R412
1
2
R419
1
2
R440
1
2
C60
1
2
R400
1 2
R406
1 2
L42
1 2
L35
1 2
C427
1
2
U8
4
5
3
2
7
8
6
10
1
9
Q31
3
1
2
C13
1 2
C26
1 2
R447
1 2
R441
1 2
R446
1 2
C499
1 2
C503
1 2
R444
1 2
R477
1 2
R478
1 2
C524
12
C525
12
C508
1
2
XW33
1 2
C518
1
2
C504
1
2
R392
1 2
J8
5
6
7
8
1
2
3
4
L47
1 2
L39
1 2
C436
1
2
L43
1 2
R181
1
2
R182
1 2
C208
1
2
R162
1
2
Q5
3
1
2
C453
1 2
U48
5
6
4
8
3
R4301
1 2
C4301
1
2
LAST_MODIFIED=Wed Sep 17 12:16:50 2003
52C4
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41C3<
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41B1<>
41B1<>
41B3<
41B1<>
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52C4
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41B4<
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41B8<
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43C7<
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35C1<>
35C1<>
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41A8<
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41A8<
41A8<
41B7<>
39D7<
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41B4<
41A8<
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35B8<
40D5<
59B8>
35B1<
35B1<
35B1<
35B1<
35B1<
52C4
41D6<
39B7<>
39D4<
39B7<>
41B4<
39B7<>
39B7<>
41B5<
41A8<
41A7<
41D2<
41C2<
41A3<
41B2<>
41B2<>
39C6<>
41B7<>
39B7<>
41B2<>
39B7<>
39C2>
39C2>
41D7<
41A8<
41D5<
34C3<
28C5<>
39D4<
28B5<>
S
D
G
S
D
G
FADE*
VAROUTR
VAROUTL
MODE
MODE_OUT
VARDIFF
VARMAX
ROSC
COSC
VCLAMPR
PGNDR1
PVCCR3
PVCCR2
RINN
PVCCR1
PVCCR0
REF
GND
AGND
PAD
THRML
AVCCV2P5 AVDD
REF
AVDD VREF
VCLAMPL
PGNDL1
PVCCL2
PVCCL3
PVCCL1
PGNDL0
PVCCL0
LINP
LINN
VOL
SD*
BSLN
BSLP
LOUTN0
LOUTN1
LOUTP0
LOUTP1
PGNDR0
ROUTP0
ROUTP1
ROUTN0
ROUTN1
RINP
BSRN
BSRP
Y
B
A
S
D
G
S
D
G
S
D
G
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(TPA_GND)
(+12V_TPA)
(TPA_GND)
(+12V_TPA)
(+12V_TPA)
(+12V_TPA)
PLACE C4307 AND C4308
NEAR PINS 14,15, 18
NEAR PINS 38,39, 42
PLACE C4311 AND C4312
NEAR PINS 46,47, 43
PLACE C4313 AND C4314
PLACE C4309 AND C4310
NEAR PINS 22,23, 19
NEAR PINS 33, 26
PLACE C4306
SPKR_RM
NC
NC
TPA_5V IS NOT USED IN THIS SCHEMATIC
SPEAKER AMP
(514-0020)
1%
47.5K
MF
402
1/16W
TH-2MT
HSJ1724-REV-E-NMP
SM
2N7002
14.7K
402
1%
1/16W
MF
1%
MF
402
1/16W
100K
TB321611B130
SEE_TABLE
1206
1%
402
100K
1/16W
MF
1UF
805
25V
CERM
20%
SM
2N7002
TB321611B130
SEE_TABLE
1206
5%
CERM
603
50V
0.01UF
0.01UF
5%
CERM
603
50V
805
CERM
20%
1UF
25V
220PF
5%
25V
402
CERM
402
1/16W
1%
MF
118K
10UF
1206
CERM
6.3V
20%
0.01UF
5%
CERM
603
50V
5%
0.01UF
CERM
603
50V
SEE_TABLE
TB321611B130
1206
TB321611B130
SEE_TABLE
1206
24.9K
402
MF
1%
1/16W
CERM
1UF
805
20%
25V
CERM
50V
805
2700PF
5%
2700PF
50V
CERM
805
5%
CERM
2700PF
50V
805
5%
CERM
805
50V
5%
2700PF
20%
0.01UF
50V
805
CERM
20%
0.01UF
50V
805
CERM
20%
0.01UF
50V
CERM
805
20%
0.01UF
50V
805
CERM
FERR-8A
SM
10UH
SM-9
SM-9
10UH
SM-9
10UH
SM-9
10UH
SN0210045A
CRITICAL
PQFP
1UF
20%
CERM
25V
805
805
CERM
25V
20%
1UF
FERRITE-4532
SM
NOSTUFF
20%
220UF
16V
SM-2
ELEC
CERM
603
16V
20%
0.1UF
0.1UF
20%
16V
603
CERM
CERM
603
16V
20%
0.1UF
0.1UF
20%
16V
603
CERM
CERM
603
16V
20%
0.1UF
CERM
16V
10%
10UF
1210
CERM
1210
16V
10%
10UF
ELEC
SM-2
16V
20%
220UF
CERM
1210
16V
10%
10UF
10UF
10%
CERM
16V
1210
CERM
1210
16V
10%
10UF
220UF
20%
16V
SM-2
ELEC
BAV99
SOT23E
402
5%
MF
1/16W
4.7K
1000-OHM-EMI
SM
NC7WZ08
SOI
160K
402
5%
1/16W
MF
SM
2N7002
1%
47.5K
1/16W
402
MF
NOSTUFF
MF
402
5%
0
1/16W
805
1UF
20%
25V
CERM
1000-OHM-EMI
L41_FILT
SM
CERM
603
50V
5%
47PF
402
MF
1%
1/16W
100K
1%
1/16W
MF
402
100K
805
1UF
20%
25V
CERM
SM
2N7002
1%
47.5K
1/16W
402
MF
NOSTUFF
0
5%
1/16W
MF
402
CERM
1210
16V
10%
10UF
30.1K
1%
1/16W
MF
603
603
MF
1/16W
30.1K
1%
1206
FF
1/8W
1%
2K
1206
2K
1%
1/8W
FF
SM
2N7002
47.5K
1%
MF
1/16W
402
5%
4.7K
1/16W
MF
402
5%
1/16W
MF
470K
402
1/16W
5%
402
MF
0
NOSTUFF
1210
CERM
16V
10%
10UF
1000-OHM-EMI
SM
SOT23
BAS40-4
121
402
1%
MF
1/16W
1%
1/16W
47.5K
402
MFMF
402
1%
249K
1/16W
NOSTUFF
2.2UF
16V
N20P80%
CERM
805
L90,L91,L93,L96
4
155S0148
FILTR,EMI,160OHM,6A,1206
051-6497
42 69
13
NET_PHYSICAL_TYPE=AUDIO
NET_PHYSICAL_TYPE=AUDIO
MIN_LINE_WIDTH=20
MIN_LINE_WIDTH=20
TPA_BSLP
NET_PHYSICAL_TYPE=AUDIO
TI_MODE_OUT_2
+3V_MAIN
TPA_LOUTP
NET_PHYSICAL_TYPE=AUDIO
LINP
TPA_LOUTN
NET_PHYSICAL_TYPE=AUDIO
NET_PHYSICAL_TYPE=AUDIO
TPA_VCLAMPL
SPKR_JACK_DALLAS
SND_SPKR_ID_U10
42_I295
+12V_MAIN
AUD_GND
MIN_LINE_WIDTH=12
SPKR_RMS
TI_MODE_OUT
MIN_LINE_WIDTH=25
TPA_V2P5
AUD_GND
TPA_AVDD_REF
TI_SD*
AUD_GND
PWR_UP
SND_SPKR_ID
+3V_MAIN
NET32
AUD_GND
PRESPK_LOUTN
PRESPK_LOUTP
+12V_TPA
AUD_GND
SND_AMP_M_L
TPA_BSRN
NET_PHYSICAL_TYPE=AUDIO
SPKROUT_R_P
AUD_GND
+12V_TPA
NET_PHYSICAL_TYPE=AUDIO
PRESPK_ROUTP
NET_PHYSICAL_TYPE=AUDIO
TPA_VCLAMPR
NET_PHYSICAL_TYPE=AUDIO
+12V_TPA
TPA_BSRP
NET_PHYSICAL_TYPE=AUDIO
NET_PHYSICAL_TYPE=AUDIO
TPA_COSC
LINN RINN
RINP
NET_PHYSICAL_TYPE=AUDIO
TPA_ROUTN
TPA_ROUTP
NET_PHYSICAL_TYPE=AUDIO
PRESPK_ROUTN
+3V_MAIN
SPKROUT_L_P
SPKROUT_L_N
U10_A
U10_OUT
Q2_GATE
NET_PHYSICAL_TYPE=AUDIO
TPA_VOL
TPA_5V
MIN_LINE_WIDTH=25
NET_PHYSICAL_TYPE=AUDIO
TPA_ROSC
SPKROUT_R_N
TPA_BSLN
NET_PHYSICAL_TYPE=AUDIO
U10_OUT
NET32_B
SPKROUT_R_N
SPKROUT_R_P
SPKROUT_L_N
SPKROUT_L_P
INT_SPKR+
INT_SPKR-
MIN_LINE_WIDTH=25
SPKR_RM
MIN_LINE_WIDTH=25
SPKR_RP
SPKR_LM
MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25
SPKR_LP
KS_INT_SPKR-
TPA_MODE
NET_PHYSICAL_TYPE=AUDIO
+12V_TPA
MIN_LINE_WIDTH=25
+12V_TPA
42_I291
SPDA
<XR_PAGE_TITLE>
R525
1
2
Q4
3
1
2
L40
1 2
C388
1
2
L26
1 2
D23
1
2
3
R522
1 2
R51
1
2
R526
1
2
C582
1
2
J3
9
10
1
2
3
4
5
6
7
8
R981
2 1
R985
1
2
L96
1 2
R984
1
2
C1069
1
2
Q36
3
1
2
L93
1 2
C1072
1
2
C1071
1
2
C1073
1
2
C1070
1
2
R983
1
2
C1068
2 1
C1064
1
2
C1063
1
2
L91
1 2
L90
1 2
R982
1
2
C1066
1
2
C1060
1
2
C1059
1
2
C1075
1
2
C1074
1
2
C1067
1
2
C1065
1
2
C1062
1
2
C1061
1
2
LP1
1
2
3
4
8
7
6
5
L89
1 2
L92
1 2
L94
1 2
L95
1 2
U49
26
33 29
7
13
24
48
37
28
30
6
5
16
17
20
21
34
35
18
19
42
43
14
15
22
23
38
39
46
47
12
2
3
27
44
45
40
41
1
49
4
9
10
31
32
25
36
11
8
C1099
1
2
C1100
1
2
L99
1 2
C1102
1
2
C1089
1
2
C1090
1
2
C1091
1
2
C1092
1
2
C1093
1
2
C1082
1
2
C1083
1
2
C1080
1
2
C1084
1
2
C1085
1
2
C1086
1
2
C1081
1
2
D48
1
2
3
R4201
1
2
U10
1
2
4
8
7
R99
1 2
Q2
3
1
2
R108
1
2
R109
1 2
C36
1
2
L41
1 2
R110
1 2
R120
1
2
C45
1
2
Q3
3
1
2
R121
1
2
R135
1
2
C4201
1
2
R4203
1
2
R4202
1 2
R240
1
2
R239
1
2
Q6
3
1
2
R242
1
2
R324
1 2
R245
1
2
R249
1 2
C108
1
2
LAST_MODIFIED=Wed Sep 17 12:16:53 2003
59D8> 52C1>
51D7<>
51C3< 51B7< 51A7< 51A5<
50D5<>
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52C4
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59D8>
48D6<>
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59D8>
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39B7<>
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52C4
V-
V+
V-
V+
Y
B
A
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
MIC PREAMP
518S0008
PLACE R4504, R4505 AND R4506 NEAR KITCHENSINK
PLACE R4501, R4502 AND R4503 NEAR AUDIO
1000-OHM-EMI
SM
1000-OHM-EMI
SM
47PF
402
5%
50V
CERM
1000-OHM-EMI
SM
1000-OHM-EMI
SM
47PF
402
5%
50V
CERM
1000-OHM-EMI
SM
0.1UF
16V
603
CERM
20%
100PF
5%
50V
CERM
402
121K
1%
402
MF
1/16W
1/16W
MF
402
47.5K
1%
402
1/16W
2.2K
MIC3
MF
5%
330
402
MF
1/16W
5%
402
MF
1/16W
5%
2.2K
0.1UF
16V
603
CERM
20%
2.2UF
MIC2
CERM
10V
20%
805
470PF
402
CERM
50V
10%
TLV2362
SOI
TLV2362
SOI
2N3904
SM
1/16W
MF
402
47.5K
1%
10%
1UF
603
10V
X5R
0
5%
MF
1/16W
402
DF13B-4P-1.25V
NOSTUFF
F-ST-SM
DF13B-4P-1.25V
NOSTUFF
F-ST-SM
0
402
5%
1/16W
MF
0
MF
1/16W
5%
402
0
MF
1/16W
5%
402
0
402
5%
1/16W
MF
0
MF
5%
402
1/16W
0
402
5%
1/16W
MF
402
1/16W
MF
5%
330
NEEDED FOR MIC NOISE
TANT
10V
20%
SMB
22UF
TB321611B130
1206
TB321611B130
1206
SOI
NC7WZ08
0
NOSTUFF
5%
1/16W
402
MF
CERM
0.047UF
10%
16V
402
CERM
0.047UF
10%
16V
402
200
5%
1/16W
402
MF
200
5%
1/16W
MF
402
CERM
805
10V
10%
1UF
CERM
805
10V
10%
1UF
CERM
0.047UF
10%
16V
402
CERM
0.047UF
10%
16V
402
200
5%
MF
1/16W
402
CERM
805
10V
10%
1UF
200
5%
402
MF
1/16W
CERM
805
10V
10%
1UF
43 69
051-6497
13
MIC1S1
AUD_GND
M1L
M1L
MIC5
+3V_AUDIO
MIC4
OPA_VREF
M1H
M1H
M1FH
M1FL
M1S
M1S
MIC_IN
VREFP
MIC1
NO_TEST
JAZ
NO_TEST
ASH
MICHIGH
MICLOW
KAVAN
NO_TEST
MICSHLD
MIC_FIX
M1HFILT
+3V_AUDIO
INT_SPKR+
KS_INT_SPKR+
INT_SPKR-
KS_INT_SPKR-
NET_PHYSICAL_TYPE=AUDIO
LINP
AUD_GND
NET_PHYSICAL_TYPE=AUDIO
RINP
TAS_VCOM
NET_PHYSICAL_TYPE=AUDIO
VCOML
AUDIO
VCOMR
AUDIO
+3V_MAIN
SND_AMP_M_L
SND_AMP_MUTE_L
INT_RESET_L
AUD_GND
AOUTL
AOUTR
LINN
RINN
LINN1
RINN1
OPA_STAR_GND
<XR_PAGE_TITLE>
L83
1 2
L60
1 2
C642
1
2
L79
1 2
L59
1 2
C675
1
2
L81
1 2
C551
1
2
C542
1
2
R489
1 2
R413
1 2
R488
1 2
R414
1 2
R421
1 2
C556
1
2
C35
1
2
C478
1
2
U13
5
6
7
4
8
U13
3
2
1
4
8
Q33
1
3
2
R498
1
2
C550
1
2
R487
1 2
J4501
5
6
1
2
3
4
J4502
5
6
1
2
3
4
R4503
1 2
R4502
1 2
R4501
1 2
R4504
1 2
R4505
1 2
R4506
1 2
R4507
1 2
C4502
1
2
L97
1 2
L98
1 2
U48
1
2
4
8
7
R4401
1 2
C1078
1
2
C1079
1
2
R986
1 2
R987
1 2
C1076
1 2
C1077
1 2
C1095
1
2
C1094
1
2
R989
1 2
C1088
1
2
R988
1 2
C1087
1
2
LAST_MODIFIED=Wed Sep 17 12:16:55 2003
52C4
42A6<> 42A5<>
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43D2<
59D8>
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52C4
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42D4<
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52C4
52C4
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42D3<
41A7<
44D2<>
42D3<
40B6<
43A7<
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59A8>
59A8>
59A8>
39D7<
59B8>
58A5>
42C4<
41A5<
41A7<
42C4<
40B5<>
40C2<
29A3<
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39D6<
58A5>
58A5>
58A5>
39D6<
58A5>
42B4<
42B2<
40D5<
35B8<
42B2<
41D7<
41C7<
35C1<>
39D6<
24B3<
24B3<
39B7<>
43B6<>
43A6<>
39D2<
40B3<
43B6<>
43B6<>
43B6<>
43A6<>
39C4<
39B4<
29A5<>
29A5<>
29A5<>
39D2<
42A6<>
29A3<
42A6<>
29A3<
42C5<
39B7<>
42C4<
39B1<>
39D4<
42D3<
28C5<>
34C3<
39B7<>
39C2>
39C2>
42C5<
42C4<
35B1<
39A7<>
CAT
NC
NC
REF
ANODE4
ANODE3
ANODE2
ANODE1
MC33465N_22ATR
VOLTAGE DETECTOR
GND
VCC
DELAYRESET
VCC
GND
RESET
P86_XCOUT
AVSS
VSS
XIN
RESET
VREF
CNVSS
BYTE
XOUT
AVCC
P50_WRL_WR
P51_WRH_BHE
P52_RD
P65_CLK1
P66_RXD1
P67_TXD1
P74_TA2OUT_W
P75_TA2IN_W
P60_CTS0_RTS0
P57_RDY_CLKOUT
P56_ALE
P55_HOLD
P54_HLDA
P53_BCLK
P61_CLK0
P62_RXD0
P63_TXD0
P70_TXD2_SDA_TA0OUT
P72_CLK2_TA1OUT_V
P73_CTS2_RTS2_TA1IN_V
P100_AN0
P90_TB0IN_CLK3
P91_TB1IN_SIN3
P92_TB2IN_SOUT3
P93_DA0_TB3IN
P94_DA1_TB4IN
P95_ANEX0_CLK4
P96_ANEX1_SOUT4
P97_ADTRG_SIN4
P87_XCIN
P85_NMI
P84_INT2
P83_INT1
P82_INT0
P81_TA4IN_U
P80_TA4OUT_U
P77_TA3IN
P76_TA3OUT
P107_AN7_KI3
P106_AN6_KI2
P105_AN5_KI1
P104_AN4_KI0
P103_AN3
P102_AN2
P101_AN1
P64_CTS1_RTS1_CTS0_CLKS1
P71_RXD2_SCL_TA0IN_TB5IN
VCC
P01_D1
P00_D0
P02_D2
P03_D3
P04_D4
P05_D5
P06_D6
P07_D7
P10_D8
P11_D9
P12_D10
P13_D11
P21_A1_D1_D0
P22_A2_D2_D1
P23_A3_D3_D2
P24_A4_D4_D3
P25_A5_D5_D4
P14_D12
P17_D15_INT5
P15_D13_INT3
P16_D14_INT4
P20_A0_D0
P27_A7_D7_D6
P26_A6_D6_D5
P30_A8_D7
P31_A9
P32_A10
P33_A11
P34_A12
P35_A13
P36_A14
P37_A15
P45_CS1
P46_CS2
P47_CS3
P44_CS0
P43_A19
P40_A16
P41_A17
P42_A18
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DRAWING
NO NEED TO VOLTAGE CONVERT
(WAS KW_SUSPEND_REQ*)
ALSO "BUSY" FOR LOADING CODE
LOCATE NEAR TO PMU
AGP_RESET_L IS USED AS MAIN_RESET_L FOR SIL1162
THROUGH R1027 AND IS NOT USED IN ANY OTHER DEVICE
(525-0057)
BATTERY HOLDER
518-0054
PMU SUPPORT
DRIVEN OPEN COLLECTOR
ALSO CE* FOR LOADING CODE
PMU RESET BUTTON
PMU NOT RATED STRONG ENOUGH FOR 1K
IIC BUS PULLUPS
(THERMISTOR)
(OK TO POWER UP SIGNAL)
ALSO "TXD" FOR LOADING CODE
ALSO "RXD" FOR LOADING CODE
ALSO SCLK FOR LOADING CODE
PMU OPERATES ON 2.7 TO 3.6 VOLTS
LOW INDICATES
(TRICKLE_DETECT)
MAIN RAIL, TO PREVENT LEAKAGE INTO UNPOWERED DEVICES
PMU POWER MGR
(SEC_FPB_LED*)
(BACKUP SELECT)
IVAD PRESENT
LOW INDICATES
DESKTOP SYSTEM
IO_RESET_L
INT_SUSPEND_REQ_L
PWR_FAIL*
PMU_P64
INT_RESET_L
POWER_UP*
CERM
20%
10V
402
0.1UF
402
MF
1/16W
1%
10K
SM
CRITICAL
32.768K
5%
402
MF
1/16W
2K
20%
16V
ELEC
SM
47UF
5%
1/16W
MF
603
NOSTUFF
0
603
1%
MF
1/16W
787
SM
MBR0530
SOI
TL431
SM
BT1
MBR0530
SM
MBR0530
16V
N20P80%
CERM
805
2.2UF
TH
NOSTUFF
3.6V-850MAH
5%
1/16W
MF
402
NOSTUFF
33
SM
787
1%
1/16W
MF
603
CERM
50V
5%
402
22PF
5%
50V
CERM
402
10PF
402
5%
1/16W
MF
160K
5%
1/16W
MF
402
22
CERM
50V
10%
402
NOSTUFF
0.001UF
402
MF
1/16W
5%
47
SOT23-2.32V
MAX6328
NOSTUFF
SM
CRITICAL
10.0000M
5%
1/16W
MF
603
0
SM
MBR0530
4.7K
402
5%
MF
1/16W
1%
1/16W
MF
603
10K
402
10V
20%
CERM
0.1UF
FF
1W
5%
2512
100
5% MF
1/16W
402
0
X5R
10V
603
10%
1UF
SM-SKQDAA
5%
1/16W
MF
603
4.7
+3V_MAIN
+3V_MAIN
+3V_MAIN
SOT23-5
NOSTUFF
SN74LVC1G04
402
MF5%
NOSTUFF
0
1/16W
5%
1/16W
MF
402
NOSTUFF
10K
1%
402
MF
1/16W
NOSTUFF
10K
1%
MF
402
1/16W
10K
1/16W
MF
402
1K
1%
1%
402
MF
1/16W
10K
1%
402
MF
1/16W
10K
1/16W
MF
402
1K
1%
5%
1/16W
MF
402
NOSTUFF
5.1M
1%
1/16W
MF
402
10K
5% MF
1/16W
402
0
1%
1/16W
MF
402
10K
1%
1/16W
MF
402
NOSTUFF
10K
1%
1/16W
MF
402
10K
1%
1/16W
MF
402
10K
1%
402
MF
1/16W
10K
1/16W
MF
402
5%
2K
402
1K
1/16W
MF
1%
402
1/16W
5% MF
0
NOSTUFF
1%
402
10K
MF
1/16W
1/16W
5% MF
402
0
NOSTUFF
5%
402
MF
1/16W
2K
5%
1/16W
402
MF
33
SM
1000-OHM-EMI
SM
1000-OHM-EMI
TH
TACT-SPST
+3V_MAIN
5%
1/16W
MF
402
4.7K
5%
1/16W
MF
402
4.7K
1%
10
1/16W
MF
402
402
5%
50V
CERM
22PF
1.5K
402
1%
1/16W
MF
1%
1/16W
MF
402
100K
100K
MF
1/16W
1%
402
MF
100K
402
1/16W
1%
402
CERM
10V
20%
0.1UF
MF
1K
1/16W
402
1%
402
MF
1/16W
5%
NOSTUFF
5.1M
5%
50V
CERM
402
10PF
FLAS
M16C62
SEE_TABLE
SM
2N3904
PMU,M16C62,64KB,PRMGD
1
341S1008 U26
CONN,BATTERY HOLDER
525-0057
1
BT1
13
051-6497
6944
INT_SUSPEND_REQ_L
PMU_P64
CPU_HRESET_L
VGER_INV_HRESET
+MAXBUS_SLEEP
NET24
NC_UT165
NO_TEST
NC_UT164
NO_TEST
NET22
3.8VH_TRICKLE
3.8V_TRICKLE
PWR_SWITCH*
PMU_PWR_LED*
+MAXBUS_SLEEP
NO_TEST
NC_P27_A7_D7_D6
PMU_XO
S3700P2
S3700P1
AGP_RESET_L
IO_RESET_L
PMU_AGP_RESET
VC_CNTL1
3.8V_TRICKLE
MAIN_RESET_L
PMURESETBUTTON*
PMURESETBUTTON*
SB1P1
PMU_POWER
PMU_IIC_CLK
PMU_IIC_DAT
PMU_CLKT
PMU_POWER
+12V_MAIN
3.8V_TRICKLE
NET19
NET18
PMU_AVCC
PMU_CNVSS
PMU_AP
PMU_INT_NMI
PMU_EPM*
PMU_FROM_INT
PMU_TO_INT
PMU_ACK_L
PMU_CLK
LID_SWITCH
RESET_BUTTON*
NMI_BUTTON*
SYSTEM_CLK_EN
CPU_CLK_EN
CPU_STATE_LED*
CPU_SMI_L
INT_PEND_PROC_INT
INT_PROC_SLEEP_REQ_L
PMU_IIC_CLK
PMU_IIC_DAT
PMU_STRAP1
PMU_LOW_DSKTP
PMU_INT_L
NET40
POWERUP_OK
PMU_CLKIN
PMU_5V_SCL
PMU_5V_SDA
CPU_HDRST_L
PMU_BYTE
PMU_CLKOUT
+12V_DROPPED
PMU_AVCC
PWR_SWITCH*
COMM_RING_DET_L
INT_WATCHDOG_L
+MAXBUS_SLEEP
INT_SUSPEND_ACK_L
SLEEP
PMU_XI
PMU_XT
INT_RESET_L
NO_TEST
NC_PPL*
NO_TEST
NC_P96_ANEX0_CLK4
NO_TEST
NC_P93_DA0_TB3IN
NO_TEST
NC_P92_TB2IN_SOUT3
NO_TEST
NC_P77_TA3IN
NO_TEST
NC_P76_TA3OUT
NO_TEST
NC_P75_TA2IN_W
NO_TEST
NC_P74_TA2OUT_W
NO_TEST
NC_P6_D6
NO_TEST
NC_P45_CS1_L
NO_TEST
NC_P43_A19
NO_TEST
NC_P37_A15
NO_TEST
NC_P36_A14
NO_TEST
NC_P35_A13
NO_TEST
NC_P34_A12
NO_TEST
NC_P33_A11
NO_TEST
NC_P26_A6_D6_D5
NO_TEST
NC_P25_A5_D5_D4
NO_TEST
NC_P24_A4_D4_D3
NO_TEST
NC_P23_A3_D3_D2
NO_TEST
NC_P22_A2_D2_D1
NO_TEST
NC_P21_A1_D1_D0
NO_TEST
NC_P20_A0_D0
NO_TEST
NC_P14_D12
NO_TEST
NC_P11_D9
NO_TEST
NC_P10_D8
NO_TEST
NC_P103_AN3
NO_TEST
NC_P07_D7
NO_TEST
NC_P05_D5
NO_TEST
NC_P04_D4
NO_TEST
NC_P03_D3
NC_P02_D2
NO_TEST
NO_TEST
NC_P01_D1
NO_TEST
NC_P00_D0
POWER_UP*
PMU_PRE_PLLSTOP
CPU_PLL_STOP
PWR_FAIL*
PMU_PME_L
PMU_REQ_L
3.8VH_TRICKLE
CPU_HRESET_L
PMU_SMB_SCK
PMU_POWER
PMU_RST*
PMU_RST*
PMU_POWER
PWR_FAILPMU*
PMU_NMI
INT_PU_RESET_LINT_PU_RESET_L
PMU_SMB_SDA
IO_RESET_L
<XR_PAGE_TITLE>
C783
1
2
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1 4
R287
1 2
C759
1
2
R734
1
2
R636
1 2
C706
1
2
U26
97
94
6
7
86
85
84
83
82
81
80
79
95
93
92
91
90
89
88
87
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
61
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
9
8
5
4
3
2
1
100
99
98
10
14 60
96
12 62
13
11
Q12
1
3
2
R729
1
2
R671
1
2
C245
1
2
R280
1 2
R290
1
2
D11
1 2
U28
2
3
6
7
1
4
5
8
D36
1
2
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1
2
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1
2
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2
1
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1 2
U21
5
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1
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1
2
C701
1
2
C715
1
2
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1
2
R725
1 2
C862
1
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R689
12
U23
1
2
3
Y3
1 2
R297
1
2
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1
2
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1
2
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1
2
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1
2
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1 2
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1 2
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1
2
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1 2
3 4
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2
3
5
4
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1 2
R732
1
2
R731
1
2
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1
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1
2
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1
2
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1
2
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1
2
R648
1 2
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1
2
R646
1 2
R658
1
2
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1
2
R659
1
2
R698
1
2
R692
1
2
R665
1
2
R677
1 2
R700
1 2
R688
1 2
R699
1 2
R690
1
2
R604
1 2
L57
1 2
L56
1 2
S1
1 2
R686
1 2
R687
1 2
R656
1
2
C705
1
2
R282
1
2
R716
1
2
R717
1 2
R733
1
2
LAST_MODIFIED=Wed Sep 17 12:16:57 2003
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SGND PGND
STBYMD
FCB
FREQSET
SNS1-
PGOOD
VOSNS2
VOUT
3.3
VCCVCC
EXT INT VIN
TG2
SW2
SNS2-
BG2
SNS2+
BOOST2
ITH2
RUN/
SS2SS1
SNS1+
BG1
SW1
BOOST1
TG1
VOSNS1
ITH1
RUN/
S
D
G
S
D
G
S
D
G
G
D
S
G
D
S
G
D
S
G
D
S
TABLE_5_ITEM
TABLE_5_ITEM
DRAWING
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
CORE_MOSFET_1
CPU_VCORE_SLEEP
DON’T EVER STUFF THIS
1.25GHZ,1.57V+70/-70MV,35W
1.0GHZ,1.5V+30/-130MV,35W
CPU_VCORE_SLEEP
KUMA SERVER(1):HARDWARE:KUMA DESIGNS:KUMA POWER SUPPLIES:VCORE WITH AVP TABLES
FOR DANNY ITANI FMAX!!!
CONN NOT FIT ON PCB
CPU & AGP VREGS
515-1563
FLO_KNOWS_BEST
16V
CERM
603
20%
0.1UF
1210
CERM
16V
10%
10UF
NOSTUFF
CERM
10%
16V
1210
10UF
5%
50V
CERM
402
47PF
603
CERM
50V
5%
VCORE_SF
470PF
SM
NOSTUFF
MBRS340T3
5%
1/16W
MF
603
4.7
0.1UF
1210
CERM
50V
10%
1206-1
20%
16V
CERM
4.7UF
10%
50V
0.22UF
CERM
1210
SM
MBR0540
MF
603
1/16W
5%
0
5%
603
1/16W
0
MF
603
5%
50V
CERM
47PF
20%
16V
ELEC
SM-1
150UF 150UF
20%
16V
SM-1
ELEC
1210
CERM
16V
10%
10UF
NOSTUFF
TH
NOSTUFF
20%
603
CERM
16V
0.1UF
0.01UF
5%
50V
CERM
603
SMC
2.2UH
SM
CERM
16V
10%
10UF
12101210
CERM
16V
10%
10UF
MBR0540
SM
LTC3707
SSOP
MF
1/16W
1%
603
10
0.001UF0.001UF
402
10%
50V
CERM
0.0022UF
603
10%
CERM
50V
10
MF
1/16W
603
1%
10
1%
1/16W
MF
603
442K
1/10W
SEE_TABLE
805
FF
0.1%
0.1%
TF
805
1/8W
475K
402
CERM
50V
5%
47PF
MF
1/16W
5%
603
0
+5V_MAIN
SM
2.5V
1000UF
SEE_TABLE
POLY
20%
SMD
4V
330UF
SEE_TABLE
20%
TANT
SM
2.5V
20%
SEE_TABLE
1000UF
POLY
SMD
20%
4V
330UF
SEE_TABLE
TANT
SMD
4V
330UF
SEE_TABLE
20%
TANT
SMD
4V
330UF
SEE_TABLE
20%
TANT
16V
603
CERM
5%
0.047UF
16V
603
CERM
5%
0.047UF
603
NOSTUFF
5%
1/16W
MF
510K
5%
50V
CERM
603
0.01UF
1/16W
1%
603
MF
10K
1/16W
MF
603
1%
30.1K
MF
1/16W
1%
603
10K
SMC
2.2UH
1210
0.22UF
CERM
50V
10%
1/16W
MF 5%
603
0
0
1/16W
603
MF
5%
MBR0540
SM
NOSTUFF
SM
MBRS340T3
0.0022UF
603
CERM
50V
10%
1%
1/16WMF603
10
MF
603
1%
1/16W
10
NOSTUFF
10UF
CERM
1210
16V
10%
CERM
1210
16V
10%
10UF
NOSTUFF
10%
16V
1210
CERM
10UF
10%
16V
CERM
1210
10UF
SM
2.5V
1000UF
SEE_TABLE
20%
POLY
SM
2.5V
1000UF
SEE_TABLE
20%
POLY
SM
2.5V
SEE_TABLE
20%
POLY
1000UF
SM
2.5V
1000UF
SEE_TABLE
20%
POLY
SM
2.5V
1000UF
SEE_TABLE
POLY
20%
SM
2.5V
SEE_TABLE
20%
POLY
1000UF
603
CERM
50V
5%
0.01UF
0.1UF
16V
CERM
603
20%
CERM
16V
1210
10%
10UF
SM
2N7002
TF
1/8W
0.1%
805
274K
603
1/16W
MF
10
1%
SM
SM
SM
SM
SM
402
CERM
50V
5%
47PF
50V
CERM
10%
402
0.001UF
0.008
2512
MF
1W
1%
0.008
MF
1W
2512
1%
0.008
1W
2512
1%
MF
MF
0.008
1%
2512
1W
603
NOSTUFF
1/16W
MF
0
5%
NOSTUFF
603
5%
1/16W
MF
0
NOSTUFF
603
5%
1/16W
MF
0
0
NOSTUFF
MF
1/16W
5%
603
NOSTUFF
MF
1/16W
5%
0
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5%
MF
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0
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805
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0
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MF
5%
0
TO-252
SUD50N03
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MBRS130T3
TO-252
SUD50N03
SUD70N03
TO-252
TO-252
SUD70N03
TO-252
NOSTUFF
SUD70N03
SUD70N03
TO-252
NOSTUFF
1000PF
5%
603
CERM
25V
NOSTUFF
CERM
5%
25V
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603
NOSTUFF
805
1/10W
FF
1%
1
NOSTUFF
1
FF
NOSTUFF
805
1/10W
1%
CAP,TANT,POLY,330UF,4.OV,D4
128S0012
4
1_25GHZ_DECOUP
C340,C947,C362,C957
RES,CER,453K,0.1%,1/10W,0805
103S0042
1_25GHZ_DECOUP
CRITICALR388
1
RES,CER,374K,0.1%,1/10W,0805
103S0041 CRITICALR388
1
1GHZ_DECOUP
13
051-6497
6945
C337,C335,C336,C334,C347,C361,C348,C346,C340,C947,C362,C957
CAP,EL,POLY,220UF,20%,2V
12128S0022
1GHZ_DECOUP
128S0410
C337,C335,C336,C334,C347,C361,C348,C346
1_25GHZ_DECOUP
8
CAP,TANT,POLY,1000UF,2.5V,D4
VCORE_FREQSET
FLOW_SS
FLOW_SS
FLOW_SS
VCORE_INTVCC
VCORE_INTVCC
45_I408
VCORE_SEN+
SENSE+
SENSE-
VCORE_SENA+
CORE_MOSFET_1
CPU_VCORE_SLEEPC
VC_SENA
BRE
VCORE_BOOST
+12V_MAIN
CPU_VCORE_SLEEP
MR_FLO
MR_FLO_1
VCORE_BOOST_1
VCORE_BG
TRANS_ADJ
NO_TEST
VCORE_VIN
CPU_VCORE_SLEEPB
NC_VCORE10
NO_TEST
VCORE_STBY
VC_CNTL1
+12V_MAIN
VCORE_EXTVCC
SENSE-_1
VCORE_TG
VCORE_BOOST2
VCORE_TG_1
VCORE_BOOST2_1
CORE_MOSFET_1
VCORE_BG_1
SENSE+_1
SENSE-_1
SENSE+_1
VCORE_SEN+_1
VCOREIN
+MAXBUS_SLEEP
VCORE_SGND
FLO_KNOWS_BEST
SENSE-
VCORE_BOOST2_1
VCORE_BG_1
45_I525
CORE_MOSFET
CORE_MOSFET
45_I526
CPU_VCORE_SLEEPA
VCORE_SGND
VCORE_SGND
VCORE_SGND
VCORE_SGND
VCORE_INTVCC
+12V_MAIN
SUPER_FLO
SUPER_FLO
FLO_KNOWS_BEST
DUKE_BD
PG_E
BRE_1
VCORE_TG_1
<XR_PAGE_TITLE>
D44
1
2
C944
1
2
C952
1
2
C1006
1
2
C1051
1
2
C1052
1 2
D41
1
2
R908
1 2
C1044
1
2
C1047
1
2
C1039
1 2
D20
12
R384
1 2
R900
1 2
C373
1 2
C343
1
2
C357
1
2
C965
1
2
J21
1
2
3
C1048
1
2
C1046
1
2
L20
1 2
XW29
1 2
C964
1
2
C963
1
2
D45
1
2
U47
10
23 19
25 18
22
7
5
21
8
11
20
28
1
15
2
3
14
13
9
6
26 17
27 16
24
4
12
R896
1 2
C371
1 2
C949
1
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R928
1
2
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1
2
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1
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R389
1
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1
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1
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1
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1
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1
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1
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1
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1
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1
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1
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1
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1
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1
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1
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1 2
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1 2
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1 2
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1
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1
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21
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1
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1
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1
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1
2
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1
2
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1
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1
2
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1
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1
2
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1
2
C1034
1
2
C1030
1
2
C960
1
2
Q29
3
1
2
R387
1
2
R898
1 2
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1
2
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1
2
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1
2
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1
2
XW28
1
2
C372
1
2
C374
1 2
R801
1 2
R800
1 2
R362
1 2
R361
1 2
R4701
1 2
R4704
1
2
R4705
1
2
R4703
1 2
R4707
1
2
R4706
1
2
R4702
1
2
C4701
1
2
R4708
1
2
R4709
1
2
Q44
4
1
3
Q50
4
1
3
Q43
4
1
3
Q49
4
1
3
Q51
4
1
3
Q40
4
1
3
C4509
1
2
C4504
1
2
R4509
1
2
R4508
1
2
LAST_MODIFIED=Wed Sep 17 12:17:00 2003
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OUT
ADJ
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
DRAWING
MAXBUS I/O SUPPLY SUPPORT
CPU & AGP VREGS
(OFF DURING SLEEP)
AGP I/O POWER CONVERTER
AGP I/O SUPPLY SUPPORT
*
*
INTREPID MAXBUS & CPU OVDD POWER CONVERTER
+1_5V_AGP 1.5V,+/-5%,.6W
+MAXBUS_SLEEP 1.8V,+/-2%,.606W
NOSTUFF
5%
1/4W
FF
0
1210
+1_8V_MAIN
1%
1/16W
MF
402
10K
1%
1/16W
MF
402
47.5K
0
1210
1/4W
FF
5%
10K
MF
402
1/16W
1%
SM
MBRS130T3
22.1K
402
MF
1/16W
1%
+3V_MAIN
1210
FF
1/4W
5%
0
+3V_MAIN
MF
1/16W
402
100K
1%
0.1UF
X7R
16V
10%
603
+3V_MAIN
200K
1%
1/16W
MF
603
0.47UF
X7R
10%
16V
805
1210
10V
20%
CERM
22UF
10V
22UF
20%
CERM
1210
MF
1%
150
1/16W
402
NOSTUFF
10V
22UF
CERM
1210
20%
10V
22UF
20%
CERM
1210
NOSTUFF
MF
1%
150
1/16W
402
MIC39102
SOP-8
CRITICAL
MBRS130T3
SM
SOP-8
MIC39102
CRITICAL
RES,FF,26.7K-OHM,1%
114S2674 R519 AGPIO_1’70V
1
RES,FF,47.5K-OHM,1%
114S4754 R519 AGPIO_1’50V
1
RES,FF,22.1K-OHM,1%
114S2214 R519 AGPIO_1’80V
1
RES,FF,30.1K-OHM,1%
114S3014 R519 AGPIO_1’65V
1
114S3014
RES,FF,30.1K-OHM,1%
R930
1
MAXIO_1’65V
RES,FF,22.1K-OHM,1%
MAXIO_1’80V114S2214
1
R930
6946
13
051-6497
RES,FF,47.5K-OHM,1%
114S4754
1
MAXIO_1’50VR930
MAXIO_1’70VR930
RES,FF,26.7K-OHM,1%
114S2674
1
MAXBUS_PWR_EN
MAX_PWR_ADJ
KYLE
+5V_SLEEP
+MAXBUS_SLEEP
+5V_SLEEP
IPWRGD
AGP_PWR_ADJ
+INTREPID_CORE_MAIN
+1_5V_AGP
<XR_PAGE_TITLE>
R610
1 2
D33
12
R518
1
2
R519
1
2
R372
1 2
R927
1
2
D19
12
R930
1
2
R385
1
2
R945
1
2
C1053
1
2
R4801
1 2
C4081
1
2
C171
1
2
C138
1
2
R958
1
2
C365
1
2
C363
1
2
R959
1
2
VR4
4
1
5 6 7 8
2
3
VR2
4
1
5 6 7 8
2
3
LAST_MODIFIED=Wed Sep 17 12:17:01 2003
59C8> 52C6>
45D2<>
44D2< 44D1< 44B7<
9D8< 9B7< 8D4<
8D1<
59C8>
8A3<>
52C3>
7C7<
17D5<
7C5<
17A4<
59D8>
7C3<
59D8>
17A3<
51C8<
7B3<
51C8<
16D7<
51C5<>
7A3<
51C5<>
59C8>
16C2<
50D5<
6D6<
50D5<
47B2<>
16A8<
46C7<
6C5<
46D6<>
11D3<
11A6<
38C1<
4D5<
38C1<
47A6<>
10D6<
10D6<
BSTH
BSTL
DH
PHASE
VCC
OCSET
PGND
PWRGD
DL
SS/SHDN
OVP
SENSE
COMP
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DRAWING
+INTREPID_CORE_MAIN (MEASURED), 1.7V +/-50MV, 3.752W
INTREPID CORE
TABLES FOR INTREPID CORE RESISTOR VALUES TO VOLTAGES ARE LOCATED AT
KUMA SERVER(1):HARDWARE:KUMA DESIGNS;KUMA POWER SUPPLIES;ICORE R TOLERANCE
+INTREPID_CORE_MAIN (BUDGET MAX), 1.7V +/-50MV, 6W
+5V_MAIN
20K
0.1%
1/16W
603
FF
3.8UH
SM1
1UF
805
CERM
10V
10%
CRITICAL
TANT
20%
2V
7343
220UF
150UF
20%
6.3V
POLY
SMD
CRITICAL
220UF
20%
2V
TANT
7343
CRITICAL
7343
TANT
2V
20%
220UF
16V
CERM
20%
603
0.1UF
NOSTUFF
10UF
CERM
16V
1210
10%
CERM
1000PF
5%
25V
603
1%
MF
603
1/16W
1K
150UF
20%
6.3V
SMD
POLY
0
1/16W
MF
603
5%
+5V_MAIN
10
1%
1/16W
MF
603
0.1UF
16V
CERM
603
20%
SC2602
SO
1%
603
1/16W
MF
20
30.1K
1%
603
1/16W
MF
+5V_MAIN
MBR0530
SM
+5V_MAIN
0.0022UF
10%
50V
CERM
402
NOSTUFF
1/16W
MF
603
5%
0
MBR0530
SM
SM
10PF
603
CERM
50V
5%
0.1UF
805
25V
5%
CERM
1K
603
MF
1/16W
1%
X5R
10V
603
10%
1UF
0.1UF
20%
16V
CERM
603
0.1UF
CERM
16V
20%
603
SM
SM
SM
NOSTUFF
805
5%
1/10W
FF
100
51.1
MF
1/16W
1%
402
6.98K
TF
1/8W
0.1%
805
+3V_MAIN
SM
MBR0540
CRITICAL
IRF7807Z
SO-8
CRITICAL
SO-8
IRF7807Z
25V
NOSTUFF
603
CERM
5%
1000PF
805
FF
1/10W
1%
1
NOSTUFF
10UF
CERM
16V
1210
10%
10UF
CERM
16V
1210
10%
1210
CERM
NOSTUFF
10UF
16V
10%
47 69
051-6497
13
INTREPID_VPWRA
47_I66
INTCORE_1
NO_TEST
ICORE_COMP
INTCORE_DH
INTCORE_VCC
INTCORE_BSTH
INTCORE_OVP
RT406P2
GPWRGD
INTCORE_OCSET
INTCORE_GND
IPWRGD
RT401P1
INTREPID_VSENSE
INTCORE_DHT
INTREP_DLT
INTREPID_VPWR
INTCORE_DL
ICW
INTCORE_BSTH_TERM
+INTREPID_CORE_MAIN
<XR_PAGE_TITLE>
C300
1
2
C301
1
2
R295
1
2
C299
1
2
C305
1
2
C297
1
2
R304
1
2
L19
1 2
C262
1
2
C935
1
2
C296
1
2
C928
1
2
C284
1
2
C298
1
2
C273
1
2
R317
1
2
R320
1 2
R318
1
2
C283
1
2
U31
10
9
12
6
8
14
4
3
7
5
2
11
13
1
R296
1 2
R316
1 2
D13
1
2
C270
1
2
R301
1 2
D14
1
2
XW15
1 2
C282
1
2
C286
1
2
R309
1
2
C266
1
2
C285
1
2
C265
1
2
XW14
1 2
XW13
1
2
XW12
1
2
R315
1
2
R299
1
2
D4901
1
2
Q25
5 6 7 8
4
1 2 3
Q26
5 6 7 8
4
1 2 3
C4702
1
2
R4710
1
2
LAST_MODIFIED=Wed Sep 17 12:17:02 2003
59C8> 46B3< 11D3<
48A5<>
46A8<
59C8>
10D6<
S
D
G
S
D
G
G
D
S
G
D
S
BSTH
BSTL
DH
PHASE
VCC
OCSET
PGND
PWRGD
DL
SS/SHDN
OVP
SENSE
COMP
GND
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
GRAPH_CORE (NV34), 1.45V +/-100MV, 16W
GRAPH_CORE (NV18B), 1.6V +/-100MV, 12W
GRAPHICS CORE
(+12V_MAIN)
SEE_TABLE
603
MF
1/16W
1%
5.23K
NOSTUFF
1
1%
1/10W
FF
805
SUD50N03
TO-252
SUD50N03
TO-252
NOSTUFF
SUD70N03
TO-252
SUD70N03
TO-252
NOSTUFF
0
5%
1/16W
MF
603
20K
1%
1/16W
MF
603
1%
1/16W
MF
603
10
SO
SC2602
16V
CERM
603
20%
0.1UF
NOSTUFF
1000UF
SM
POLY
2.5V
20%
NOSTUFF
1000UF
20%
2.5V
POLY
SM
1000UF
SEE_TABLE
SM
POLY
2.5V
20%
NOSTUFF
1000UF
20%
2.5V
POLY
SM
CERM
0.1UF
20%
603
16V
0
5%
1/16W
MF
603
SEE_TABLE
SM
POLY
2.5V
20%
1000UF
402
NOSTUFF
50V
10%
CERM
0.0022UF
0
603
MF
1/16W
5%
SM
MBR0530
10PF
5%
603
CERM
50V
1K
603
MF
1%
1/16W
POLY
2.5V
20%
SM
1000UF
NOSTUFF
0.1UF
16V
20%
CERM
603
SM
MBRS340T3
NOSTUFF
603
0.1UF
16V
20%
CERM
SM
POLY
20%
SEE_TABLE
2.5V
1000UF
SM
SM
50V
603
CERM
330PF
10%
SM
10%
CERM
16V
1210
10UF
10%
CERM
16V
1210
10UF
10%
CERM
16V
1210
10UF10UF
10%
16V
CERM
1210
SM-1
16V
ELEC
20%
150UF
SM
MBR0530
603
MF
1/16W
1%
10
2.2UH
SMC
1/16W
603
1%
MF
1.5K
0.1UF
CERM
16V
20%
603
3.92K
1%
1/16W
MF
603
SM
603
20%
25V
CERM
0.1UF
0.1UF
805
5%
25V
CERM
5%
1/10W
FF
805
NOSTUFF
100
1/16W
1%
51.1
402
MF
SM
MBRS130T3
+2_5V_MAIN
NOSTUFF
603
1000PF
5%
25V
CERM
R499
1
NV34110S2943
RES,2.94K OHMS,1%,1/16W,0603
1_25GHZ_DECOUP
C106,C132,C88
3
128S0410
CAP,TANT,POLY,1000UF,2.5V,D4
CAP,TANT,POLY,1000UF,2.5V,D4
C106,C132,C88
3
128S0410
1GHZ_DECOUP
13
051-6497
6948
R499
1
110S5233
RES,5.23K OHMS,1%,1/16W,0603
NV18B
GCORE_BSTH_TERM
48_I10
QT1P1
QT2P3
48_I99
GCORE_VSENSE
GCORE_VSENSE
NO_TEST
RB22P2
GRAPH_CORE
+12V_MAIN
GCORE_DL
+12V_MAIN
QT2P1
MPWRGDMPWRGD
GCORE_VCC
GCORE_1
NO_TEST
+12V_MAIN
GCORE_GND
NO_TEST
GCORE_COMP
GCORE_OVP
GCORE_OCSET
GPWRGD
GRAPHICS_VPWR
GCORE_DH
NO_TEST
GCORE_BSTH
RB37P1
RB27-1
<XR_PAGE_TITLE>
C71
1
2
C88
1
2
C59
1
2
C132
1
2
R499
1
2
R504
1
2
R523
1
2
U40
10
9
12
6
8
14
4
3
7
5
2
11
13
1
C589
1
2
C558
1
2
C106
1
2
C528
1
2
C543
1
2
R150
1 2
C586
1
2
R515
1 2
D32
1
2
C563
1
2
R527
1
2
C552
1
2
D31
1
2
C564
1
2
XW2
1
2
XW6
1 2
C596
1
2
XW7
1 2
C632
1
2
C631
1
2
C633
1
2
C634
1
2
C220
1
2
D30
1
2
R505
1
2
L12
1 2
R529
1
2
C585
1
2
R503
1
2
XW39
1
2
C576
1
2
C572
1
2
R475
1
2
R496
1
2
D34
1
2
C4801
1
2
R4802
1
2
Q9
4
1
3
Q8
4
1
3
Q7
4
1
3
Q34
4
1
3
R4803
1
2
LAST_MODIFIED=Wed Sep 17 12:17:04 2003
59D8>
59D8>
52C1>
52C1>
51D7<>
51D7<>
51C3<
51C3<
51B7<
51B7<
51A7<
51A7<
51A5<
51A5<
50D5<>
50D5<>
50D2<
50D2<
50C4<>
50C4<>
50B4<>
50B4<>
49D7<>
49D7<>
49D3<>
49D3<>
49C4<>
49C4<>
48C8<>
48D6<>
48C4<>
48C8<>
45D7<
45D7<
45D3<>
45D3<>
45B4<>
45B4<>
44D8<
44D8<
52A6>
42B3<
42B3<
23C7<>
39C8<
39C8<
49B5<> 49B5<>
48C4<>
48B6<>
17D4<
36D8<
36D8<
48B7< 48B7<
59D8>
47B8<
BSTH
BSTL
DH
PHASE
VCC
OCSET
PGND
PWRGD
DL
SS/SHDN
OVP
SENSE
COMP
GND
G
D
S
S
D
G
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
MAIN MEMORY DDR AND FRAME BUFFER POWER CONVERTER (2.50VDC)
MEMORY PS
+2_5V_MAIN, 1.61V +/-50MV, 12.908W
10UF
CERM
16V
1210
10%
10UF
CERM
16V
1210
10%
22.1K
603
1%
MF
1/16W
20K
1/16W
MF
603
1%
20%
6.3V
POLY
SMD
330UF
NOSTUFF
20%
SMD
POLY
6.3V
330UF
+2_5V_MAIN
4.0UH
SM1
20%
6.3V
POLY
SMD
330UF
16V
20%
0.1UF
603
CERM
1210
10UF
CERM
16V
10%
1210
10UF
CERM
16V
10%
CERM
402
50V
10%
470PF
1/16W
MF
1K
1%
603
20%
6.3V
POLY
SMD
330UF
MBRS340T3
NOSTUFF
SM
0
603
MF
1/16W
5%
0
603
MF
1/16W
5%
10
1%
1/16W
MF
603
0.1UF
20%
16V
603
CERM
MBR0530
SM
SC2602
SO
0.1UF
CERM
20%
603
16V
NOSTUFF
0.0022UF
10%
50V
CERM
402
SM
MBR0530
SM
10PF
5%
603
CERM
50V
1K
1%
1/16W
MF
603
20%
SMD
POLY
6.3V
330UF
20
MF
1%
1/16W
603
0.1UF
CERM
20%
16V
603
4.75K
603
MF
1%
1/16W
SM
SM
SM
NOSTUFF
SMD
POLY
6.3V
20%
330UF
0.1UF
603
20%
16V
CERM
0.1UF
603
20%
25V
CERM
0.1UF
5%
25V
CERM
805
5%
1/10W
FF
805
100
51.1
MF
1%
402
1/16W
SM
MBRS130T3
+3V_MAIN
SMD
POLY
6.3V
20%
330UF
NOSTUFF
1000PF
5%
25V
CERM
603
NOSTUFF
1
1%
1/10W
FF
805
SUD70N03
TO-252
SUD50N03
TO-252
SM-1
150UF
16V
ELEC
20%
NOSTUFF
SM-1
150UF
16V
ELEC
20%
49 69
051-6497
13
25V_DH
49_I70
25V_DLT
25V_VPWRA
+12V_MAIN
25V_DHT
RB213P2
25V_VSENSE
NO_TEST
+12V_MAIN
25_CORE_1
NO_TEST
PGOODPGOOD
25V_OVP
25V_VCC
+12V_MAIN
25V_DL
25V_BSTH
RB227P1
25V_COMP
NO_TEST
25V_COMP_DWN
25V_GND
MPWRGD
25V_OCSET
25V_VPWR
25V_VPWR
25V_BSTH_TERM
<XR_PAGE_TITLE>
C332
1
2
C962
1
2
C331
1
2
C323
1
2
C235
1
2
C351
1
2
C342
1
2
C989
1
2
C975
1
2
R871
1
2
R880
1
2
C330
1
2
C324
1
2
L21
1
2
3
C218
1
2
C329
1
2
C968
1
2
C959
1
2
C1005
1
2
R884
1
2
D15
1
2
R873
1 2
R827
1 2
R888
1
2
C1019
1
2
D42
1
2
U45
10
9
12
6
8
14
4
3
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C1004
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R883
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XW25
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XW24
1
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XW23
1
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C358
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4
1
3
LAST_MODIFIED=Wed Sep 17 12:17:06 2003
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SGND PGND
STBYMD
FCB
FREQSET
SNS1-
PGOOD
VOSNS2
VOUT
3.3
VCCVCC
EXT INT VIN
TG2
SW2
SNS2-
BG2
SNS2+
BOOST2
ITH2
RUN/
SS2SS1
SNS1+
BG1
SW1
BOOST1
TG1
VOSNS1
ITH1
RUN/
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DRAWING
(THIS PAGE)
(517-0886)
+3V_MAIN, 3.3V +/-3%,7.567W
+5V_MAIN, 5.1V +/-3%, 32.172W
DC/DC CONVERTER
+3V_MAIN
SM
MBR0540
1/16W
5%
MF
603
62K
1/16W
MF
1%
603
20K
LTC3707
SSOP
SW3V_TG2
SW3V_BOOST2
SM
603
CERM
50V
5%
0.01UF
+5V_MAIN
603
5%
1/16W
MF
0
0.1UF
20%
25V
CERM
603
603
CERM
50V
5%
0.01UF
5%
50V
CERM
603
0.01UF
10%
CERM
50V
402
470PF
1%
603
1/16W
MF
15K
5%
25V
CERM
603
SW5VITH1R
1000PF
0.01UF
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5%
50V
CERM
20%
603
CERM
16V
0.1UF
10%
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CERM
1210
10UF
0.01UF
CERM
603
50V
5%
603
20%
CERM
16V
0.1UF
1210
10UF
CERM
16V
10%
10UF
1210
CERM
16V
10%
1W
MF
1%
2512
0.008
10UF
10%
16V
CERM
1210
10UF
10%
16V
CERM
1210
10UF
10%
16V
CERM
1210
10UF
10%
16V
CERM
1210
10UF
10%
16V
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10UF
10%
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CERM
1210
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0.22UF
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0.01UF
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603
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402
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MBR0540
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603
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0
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MF
603
10
CERM
50V
10%
402
0.001UF0.001UF
1%
1/16W
10
603
MF
100UF
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20%
SM-1
100UF
SM-1
35V
ELEC
20%
100UF
35V
ELEC
20%
SM-1
NOSTUFF
20%
6.3V
POLY
SMD
150UF
20%
6.3V
POLY
SMD
150UF
6.3V
POLY
20%
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150UF
4.0UH
SM1
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SMD
POLY
6.3V
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NOSTUFF
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6.3V
POLY
SMD
150UF
NOSTUFF
SMD
POLY
6.3V
20%
150UF150UF
20%
6.3V
POLY
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POLY
6.3V
20%
150UF
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6.3V
POLY
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150UF
+5V_MAIN
4.7
603
MF
1/16W
5%
25V
CERM5%
402
220PF
603
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MF
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15K
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CERM
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603
SW3VITH2R
1000PF
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5%
402
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1%
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107K
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SM
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1210
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2N3904
SM
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787
DEV
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DEV
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10
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1%
1/16W
MF
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402
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MF
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5%
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MBRS130T3
M-ST-43045
TH
CRITICAL
CRITICAL
SO-8
IRF7807Z
SO-8
IRF7807Z
CRITICAL
CRITICAL
1W
0.005
5%
MPL
2512
MF
1/16W
1%
10K
402
PWRS_Q59
47K
5%
1/16W
MF
603
PWRS_Q59
603
CERM
25V
5%
1000PF
NOSTUFF
1
1%
1/10W
FF
805
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5%
25V
CERM
603
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NOSTUFF
1
1%
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805
SUD50N03
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SUD50N03
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805
FF
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69
13
051-6497
50
SW5V_SW1
+12VSD_T
+12V_MAIN
RUNSS
PWR_UP*
SW3V5V_12VIN
SW3V5V_SGND
+12V_MAIN
SW3V_SNSP
VOSNS2
SW3V_BG2
FW_PWR
+5VSD_T
PWR_FAIL_T
SW3V_BG2R
SW3V5V_SGND
SW3V5V_SGND
SW3V5V_SGND
SW3V5V_SGND
SW3V5V_SGND
STBYMD
SW5V_ITH1
SW5V_RUNSS
NO_TEST
SW5V_VOSNS
SW5V_SNSP
SW5V_BG1
SW5V_BOOST1
SW5V_TG1
SW3V_ITH2
RT418P2
SW5V_SNSM
SW5V_BG1
SW5V_5VSENSE
SW5V_SNSMA
RB160P1
VOSNS1
SW3V_ITH2
SW5V_BOOST1
SW5V_SNSM
SW5V_SNSP
SW5V_TG1
SW3V5V_INTVCC
NO_TEST
NC_SW3V5V_33OUT
PGOOD
SW3V_TG2R
NO_TEST
SW3V_RUNSS
PWR_UP
SW3V_RUNSSR
3.8V_TRICKLE
PWR_FAIL*
MAIN_SUPPLY_LED
PWR_UP
RUNSS
+5V_SLEEP
+12V_SLEEP
SLEEP
SW5V_RUNSS
SW3V5V_VIN
SW3V5V_INTVCC
NO_TEST
SW3V_VOSNS
SW3V_RUNSS
SW3V_BOOST2R
SW3V_SNSM
5V_XRA
SW5V_TG1R
+12V_MAIN
SW5V_BG1R
SW3V_3VSENSE
SW3V_SW2A
+12V_MAIN
SW5V_SW1A
50_I408
SW3V_SW2
SW3V_SW2
50_I410
SW5V_SW1SW5V_SW1
<XR_PAGE_TITLE>
D38
1
2
R804
12
R332
1
2
U33
10
23 19
25 18
22
7
5
21
8
11
20
28
1
15
2
3
14
13
9
6
26 17
27 16
24
4
12
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1
2
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1
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1
2
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1
2
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1
2
C318
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12
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1
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1
2
C934
1
2
C294
1
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1
2
C287
1
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1
2
R808
1 2
C985
1
2
C956
1
2
C979
1
2
C978
1
2
C986
1
2
C970
1
2
C971
1
2
C341
1
2
C941
1 2
R337
1 2
R336
1 2
D40
1
2
D39
1
2
C938
1
2
C344
1
2
C940
1 2
R807
1 2
R803
1
2
C931
1 2
R802
1
2
D17
12
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1 2
R798
1
2
C932
1 2
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1
2
C355
1
2
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1
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1
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1
2
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C327
1
2
L22
1
2
3
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1
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1
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1
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1
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1
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C308
1
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12
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12
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3
1
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3
1
2
R322
1
2
C303
1
2
Q24
3
1
2
Q23
3
1
2
R795
1
2
R815
1 2
L23
1 2
R323
1
2
C338
1
2
L85
1 2
L86
1 2
C295
1
2
L84
1 2
C241
1
2
C349
1
2
C339
1
2
Q39
1
3
2
R721
1 2
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1
2
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1
2
R811
1 2
R335
1 2
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1
2
C333
1 2
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1
2
XW18
1
2
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1
2
XW20
1
2
XW19
1
2
D16
1 2
R682
1
2
C939
1
2
D37
1
2
J17
1
10
11
12
13
14
15
16
2
3
4
5
6
7
8
9
Q46
5 6 7 8
4
1 2 3
Q45
5 6 7 8
4
1 2 3
R805
1 2
R1013
1
2
R1014
1 2
C5001
1
2
R5001
1
2
C5002
1
2
R5002
1
2
Q48
4
1
3
Q47
4
1
3
R5003
1
2
LAST_MODIFIED=Wed Sep 17 12:17:09 2003
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S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
TAB
VOUTVPWR
VCTRL
VOUT
ADJ
SENSE
S
D
G
S
D
G
S
D
G
A
S2
GATE
S1
S3 D4
D3
D2
D1
DRAWING
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
EVALUATE CIRCUIT FOR SURGE PROTECTION FOR Q59C
TMDS POWER CONVERTER & SWITCH
+3.3VFPD (3_6V_SLEEP), 3.6V +/-50MV, 3.32W
(OFF DURING SLEEP)
+5V POWER SWITCH
SLEEP LED
(OFF DURING SLEEP)
VOLTAGE TO SUPPORT 3.3V AT PANEL
(OFF DURING SLEEP)
(TESTPOINT LED IS USED TO FOR SERVICE AND
+5V/+12V, AUDIO
FW & TMDS PWR
IF NOT ILLUMINATED, TELLS USER ITS OK TO ADD MEMORY)
+5V POWER, SLEEP & TESTPOINT LEDS
+5V POWER LED
GENERAL POWER LED
(NOT ILLUMINATED = OK TO ADD MEMORY)
VOLTAGE HERE WILL EXCEED 3.3V
+12V MAIN POWER SWITCH
FIREWIRE POWER SWITCH
2N7002
DEV
SM
SM
2N7002
MF
1/16W
402
10K
1%
SM
2N7002
1/16W
MF
5%
402
4.7K
GREEN
DEV
SM
20%
6.3V
SMD
POLY
150UF
0.0022UF
402
10%
50V
CERM
2N7002
SM
0.01UF
CERM
10%
16V
402
SM
2N7002
FDC602P
SOT-6
10%
16V
10UF
CERM
1210
402
16V
CERM
20%
NOSTUFF
0.01UF
FPD_3V3&FPD_12VM
402
10%
50V
CERM
0.0022UF
FPD_3V3&FPD_12VM
FDC602P
SOT-6
CERM
10%
16V
402
0.01UF
FPD_3V3&FPD_12VM
2N7002
SM
FPD_3V3&FPD_12VM
SMD
20%
POLY
150UF
FPD_3V3
6.3V
10%
50V
CERM
805
0.022UF
FPD_3V3
SM
FPD_3V3
EZ1582
10UF
16V
CERM
1210
10%
FPD_3V3
1210
16V
CERM
10%
10UF
FPD_3V3
+5V_MAIN
+3V_MAIN
+5V_MAIN
+5V_MAIN
SM
2N7002
470K
MF
1/16W
5%
402
0
5%
1/16W
MF
402
5%
1/16W
0
402
MF
FPD_3V3&FPD_12VM
0
5%
1/16W
MF
402
MF
1/16W
402
10K
FPD_3V3&FPD_12VM
1%
10K
MF
1/16W
402
1%
FW_12V
CERM
0.0022UF
10%
402
50V
100K
5%
1/16W
603
MF
FW_12V
FW_12V
2N7002
SM
5%
50V
603
FW_12V
0.01UF
CERM
1/16W
5%
470K
MF
603
FW_12V
FW_12V
10K
1%
1/16W
MF
603
47UF
SM
ELEC
20%
35V
+5V_MAIN
10%
50V
CERM
402
0.0022UF
FDC602P
SOT-6
1%
1/16W
MF
402
100K
SM
SW12V_SL
2N7002
402
CERM
10%
16V
0.01UF
MF
1/16W
5%
402
470K
SM
ELEC
16V
20%
47UF
402
1/16W
MF
5%
0
1%
47.5K
1/16W
MF
402
TH-TP50
RED
SM
TESTPOINT
0
NOSTUFF
MF
1/16W
5%
402
TESTPOINT
TESTPOINT
0
NOSTUFF
402
MF
1/16W
5%
TESTPOINT
TESTPOINT
+5V_MAIN
0
402
1/16W
MF
5%
TESTPOINT
TESTPOINT
1%
787
603
MF
1/16W
0
NOSTUFF
MF
1/16W
5%
402
TESTPOINT
TESTPOINT
402
1%
MF
FPD_3V3
1/16W
102
1/16W
FPD_3V3
402
1%
MF
182
330
DEV
MF
1/16W
5%
402
330
DEV
MF
1/16W
5%
402
470
NOSTUFF
MF
5%
1/16W
402
402
MF
1/16W
1%
100K
FPD_3V3&FPD_12VM
402
MF
1%
100K
1/16W
FPD_3V3&FPD_12VM
100K
MF
1/16W
1%
402
MF
1/16W
5%
402
NOSTUFF
0
1206
FF
1/8W
5%
0
FPD_12VM
1206
FF
1/8W
5%
0
FPD_12VS
SEE_TABLE
402
MF
1/16W
1%
100K
SOT23
1N5227B
FPD_12VS&FPD_12VM
FW_12V
SI4435DY
SOI
DEV
SM
GREEN
1
116S1000
RES,0 OHM,5%,1/16W,O4O2,SMD
FPD_3V3
R1012
R1012
FPD_12VM114S1005
1
RES,100K OHM,1%,1/16W,O4O2,SMD
13
051-6497
6951
Q42P4
FW_PWR_SW
+12V_SLEEP
Q1P3
Q1P1
SLEEP_OFF_L
SWITCH5V_3
SWITCH5V_4
+5V_SLEEP
CPU_SLEEPIN
PWR_UP
LED_RET
SLEEP2
SLEEP_LED_BD
SLEEPLED_TERM
+12V_SLEEP
SW12V_SLEEP
SWITCH5V_6
CPU_STATE_LED*
+12V_MAIN
POWER_UP*
+12V_MAIN
HONK_ADJ
+12V_MAIN
SLEEP_OFF_L
3_6V_SLEEP
FPD_PWR_ON
+12V_MAIN
3_5_HONKER
SWITCH5V_5
CHOC_BROWNIE
TMDS_EN
+5V_SLEEP
RUNLED1
+12V_SLEEP
+12V_MAIN
BT1
PWR_LEDRT373P1
BT1_LED
FPD_PWR_ON_T
SLEEP1
+3.3VFPD
FW_PWR
<XR_PAGE_TITLE>
DS6
1
2
Q19
3
1
2
Q18
3
1
2
R740
1
2
Q16
3
1
2
R738
1
2
DS5
1
2
C238
1
2
C773
1 2
Q38
3
1
2
C742
1 2
Q17
3
1
2
Q37
1
2
5
63
4
C254
1
2
C258
1
2
C252
1 2
Q11
1
2
5
63
4
C257
1 2
Q13
3
1
2
C246
1
2
C236
1
2
VR3
2
1
4
3
6
5
C653
1
2
C654
1
2
Q15
3
1
2
R645
1
2
R685
1 2
R751
1 2
R283
1 2
R277
1
2
R279
1
2
C473
1 2
R21
1
2
Q1
3
1
2
C18
1 2
R23
1 2
R22
1
2
C19
1
2
C918
1 2
Q20
1
2
5
63
4
R770
1
2
Q14
3
1
2
C915
1 2
R769
1 2
C269
1
2
R739
1
2
R741
1
2
JAZ1
1
DS10
1
2
R608
1
2
R609
1
2
R607
1
2
R612
1 2
R615
1
2
R251
1
2
R601
1
2
R300
1
2
R302
1
2
R614
1 2
R278
1
2
R284
1
2
R664
1
2
R5301
1 2
R1017
1
2
R1018
1
2
R1012
1
2
DZ1
1
3
U35
5
6
7
8
4
1
2
3
LAST_MODIFIED=Wed Sep 17 12:17:11 2003
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50C4<>
50C4<>
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50B4<>
50B4<>
50B4<>
50B4<>
49D7<>
49D7<>
49D7<>
49D7<>
49D7<>
49D3<>
49D3<>
49D3<>
49D3<>
49D3<>
49C4<>
49C4<>
49C4<>
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48D6<>
48D6<>
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CHASSIS
ALT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
MIN_NECK_WIDTH
VOLTAGE
USB POWER CONSTRAINT TABLE
MIN_LINE_WIDTH
VOLTAGE
SYSTEM POWER CONSTRAINT TABLE
MIN_LINE_WIDTH
MIN_NECK_WIDTH
VOLTAGE
PMU POWER CONSTRAINT TABLE
MIN_LINE_WIDTH
MIN_NECK_WIDTH
INTREPID POWER CONSTRAINT TABLE
VOLTAGE
MIN_LINE_WIDTH
MAIN POWER CONSTRAINT TABLE
MIN_NECK_WIDTH
VOLTAGE
MIN_LINE_WIDTH
MIN_NECK_WIDTH MIN_LINE_WIDTH
MIN_LINE_WIDTH
VOLTAGE
MIN_NECK_WIDTH
ETHERNET POWER CONSTRAINT TABLE
MIN_NECK_WIDTH MIN_LINE_WIDTH
VOLTAGE
MIN_NECK_WIDTH
VOLTAGE
MIN_LINE_WIDTH
POWER CONSTRAINTS
SIG_NAME
SIG_NAME
SIG_NAME
SIG_NAME
SIG_NAME
SIG_NAME
SIG_NAME
SIG_NAME
SIG_NAME
CPU POWER CONSTRAINT TABLE
FIREWIRE POWER CONSTRAINT TABLE
VOLTAGE
GRAPHICS POWER CONSTRAINT TABLE
MIN_NECK_WIDTH
+3V_MAIN
+2_5V_MAIN
+5V_MAIN
+1_8V_MAIN
38C2<>
38C2<>
22D4<
38C6<>
38C6<>
37B7<
22B2< 22A5<
17A5<
17A5<>
17B5<>
6952
051-6497
13
20
+3V_MAIN
10
3.3
+2_5V_MAIN
2010
2.5
+5V_MAIN
2010
5
GND
0
10 20
AGND
0
10 20
ANALOGGND
2010
0
ALTCHGND
10 20
0
CHGND
2010
0
+1_8V_MAIN
2010
1.8
20
DDR_VREF
10
1.25
20
2.5
10
ENET_AVDD
USB_GND
0
10 20
20
LED_5V
5
10
5
KS5VSD
2010
FW_VP_2
1210 20
GPU_TMODE
0
GPU_50PULLDWN
0
SGRAVREF
1.25
10 20
3.3
DACVDD
2010
3.6
+3.3VFPD
10 20
3.3
DAC2VDD
10 20
FW_PWR
24 2010
IFP0VREF
10 20
3.8
FW_VP
1210 20
FW_DIO_V
3.3
10 20
+MAXBUS_SLEEP
1.8
2010
CPU_AVDD
1.85
2010
CPU_VCORE_SLEEP
1.85
10 20
FW_VP_1
1210 20
FW_VP2
1210 20
FW_VP1
1210 20
FW_VGND
0
10 20
FW_PHY_3_3
3.3
10 20
FW_PWR_SW
2410 20
FW_DIODE_BYPASS_V
3.3
10 20
DDC_VCC_3
10 20
3.3
DDC_VCC_5
10 20
5
IFP0AVCC
10 20
3.8
GPU_AGP_VREF
0.75
2010
INT_TMDS_3V
2010
3.6
10
GPU_FB_VREF
1.25
20
NVPLLVDD
3.3
10 20
10
SGRBVREF
1.25
20
3.8V_TRICKLE
3.8V_TRICKLE
2010
3.8
+12V_MAIN
+12V_MAIN
2010 12
+1_5V_INTREPID_PLL
1.5
10 20
+1_5V_INTREPID_PLL1
1.5
10 20
+1_5V_INTREPID_PLL2
1.5
2010
+1_5V_INTREPID_PLL3
10 20
1.5
+1_5V_INTREPID_PLL4
10 20
1.5
+1_5V_INTREPID_PLL5
10 20
1.5
+1_5V_INTREPID_PLL6
10 20
1.5
+1_5V_INTREPID_PLL7
10 20
1.5
+1_5V_INTREPID_PLL8
10 20
1.5
INT_AGP_VREF
0.75
10 20
PMU_AVCC
3.5
2010
3.8VH_TRICKLE
3.8
2010
PMU_POWER
3.5
10 20
+12VSD_FILT
1210 20
10
FAN_12V_FILT
12 20
LED_5V_FILT
5
10 20
LED_RET_FILT
10
0
20
LED_RET
0
10 20
+3V_INTREPID_USB
3.3
2010
NEC_AVDD
3.3
10 20
USB_PORT_PWR
10 20
5
USB_PWR
2010
5
GPU_50PULLUP
1.5
GPU_XTALSSIN
0
CSLOT_IOWAIT_L
3.3
EIDE_IOCS16_L
5
EIDE_CSELP_L
0
VIPCLK
0
UNUSED_ATAIOCS16_L
5
UIDE_CSELP_L
0
GRAPH_CORE
20
1.6
10
+1_5V_AGP
2010
1.5
+12V_SLEEP
1210 20
+12V_SLEEP
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:35 2003
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DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SIG_NAME
RATSNEST_SCHEDULE
RELATIVE_PROPAGATION_DELAY
MAX_VIAS
PROPAGATION_DELAY
STUB_LENGTH
NET_SPACING_TYPE
MIN_NECK_WIDTH
DIGITAL SIGNAL CONSTRAINTS
MAX_EXPOSED_LENGTH
NO_TEST
FUNC_TEST
PULSE_PARAM
SIGNAL CONSTRAINTS
6953
051-6497
13
3
L:S:500 MIL:850 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLKB2:G:L:S:0 MIL:100 MIL
3
L:S::3500 MIL 200
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B2
MEM_GROUP0:G:L:S:0:150
8
L:S::1300 167 MHZ
3
MEM_DATA<0..63>
RAM_GROUP0_A:G:L:S:0:180
8
L:S::1800 167 MHZ
3
RAM_DATA_A<0..63>
RAM_GROUP0_B:G:L:S:0:180
2
L:S::2400 167 MHZ
3
RAM_DATA_B<0..63>
MEM_GROUP0:G:L:S:0:180
3
L:S::1300
167 MHZ
3
MEM_DQS<0..7>
RAM_GROUP0_A:G:L:S:0:180
3
L:S::1700 167 MHZ
3
RAM_DQS_A<0..7>
RAM_GROUP0_B:G:L:S:0:180
2
L:S::2400 167 MHZ
3
RAM_DQS_B<0..7>
MEM_GROUP0:G:L:S:0:180
3
L:S::1300 167 MHZ
3
MEM_DQM<0..7>
RAM_GROUP0_A:G:L:S:0:180
3
L:S::1800 167 MHZ
3
RAM_DQM_A<0..7>
RAM_GROUP0_B:G:L:S:0:180
2
L:S::2400 167 MHZ
3
RAM_DQM_B<0..7>
MEM_ADDR:G:L:S:0:200
3
L:S::600
MEM_ADDR<0..12>
RAM_ADDR:G:L:S:0:1300
4
L:S::3500 200
RAM_ADDR<0..12>
MEM_ADDR:G:L:S:0:1300
3
L:S::600
MEM_BA<0..1>
RAM_ADDR:G:L:S:0:1300
4
L:S::4000 200
RAM_BA<0..1>
MEM_ADDR:G:L:S:0:200
3
L:S::600
10 MIL SPACING
MEM_CS_L<0..3>
RAM_CS_GROUP0:G:L:S:0:400
3
L:S:2000:3500
RAM_CS_L<0..1>
10 MIL SPACING
RAM_CS_GROUP1:G:L:S:0:350
2
L:S:2000:3500
RAM_CS_L<2..3>
10 MIL SPACING
MEM_ADDR:G:L:S:0 MIL:200 MIL
3
L:S::600 MIL
MEM_RAS_L
MEM_ADDR:G:L:S:0 MIL:200 MIL
3
L:S::600 MIL
MEM_CAS_L
MEM_ADDR:G:L:S:0 MIL:280 MIL
3
L:S::600 MIL
MEM_WE_L
RAM_ADDR:G:L:S:0 MIL:2000 MIL
4
L:S::4000 MIL 200
RAM_CAS_L
RAM_ADDR:G:L:S:0 MIL:2000 MIL
4
L:S::4000 MIL 200
RAM_RAS_L
RAM_ADDR:G:L:S:0 MIL:2000 MIL
4
L:S::4000 MIL 200
RAM_WE_L
MEM_ADDR:G:L:S:0:200
3
L:S::600
MEM_CKE<0..3>
10 MIL SPACING
RAM_CS_GROUP0:G:L:S:0:400
3
L:S::2500
10 MIL SPACING
RAM_CKE<0..1>
RAM_CS_GROUP1:G:L:S:0:350
2
L:S::2500
10 MIL SPACING
RAM_CKE<2..3>
3
L:S::1000
MEM_MUXSEL_H<0..1>
3
L:S::1000 167 MHZ
MEM_MUXSEL_L<0..1>
4
L:S::2000 MIL
200
MUX_SEL_H
167 MHZ
4
L:S::2000 MIL
200
167 MHZ
MUX_SEL_L
3
L:S:500 MIL:850 MIL
8 MIL SPACING
270
167 MHZ
SYSCLK_DDRCLK_A0_UF
3
L:S:500 MIL:850 MIL
8 MIL SPACING
270
167 MHZ
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLKA0:G:L:S:0 MIL:100 MIL
3
L:S::2600 MIL 200 8 MIL SPACING
270
167 MHZ
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLKA0:G:L:S:0 MIL:100 MIL
3
L:S::2600 MIL 200 8 MIL SPACING
270
167 MHZ
SYSCLK_DDRCLK_A0_L
3
L:S:500 MIL:850 MIL
SYSCLK_DDRCLK_A1_UF
8 MIL SPACING
270
167 MHZ
3
L:S:500 MIL:850 MIL
8 MIL SPACING
270
167 MHZ
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLKA1:G:L:S:0 MIL:100 MIL
3
L:S::2600 MIL 200
SYSCLK_DDRCLK_A1
8 MIL SPACING
270
167 MHZ
3
200
SYSCLK_DDRCLK_A1_L
8 MIL SPACING
270
167 MHZL:S::2600 MIL
SYSCLK_DDRCLKA1:G:L:S:0 MIL:100 MIL
3
L:S:500 MIL:850 MIL
SYSCLK_DDRCLK_A2_UF
270
167 MHZ8 MIL SPACING
3
L:S:500 MIL:850 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_A2_L_UF
3
L:S::750 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_A2_L
3
L:S:500 MIL:850 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B0_L_UF
3
L:S::3500 MIL 200
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLKB0:G:L:S:0 MIL:100 MIL
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLKB0:G:L:S:0 MIL:100 MIL
3
L:S::3500 MIL 200
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B0_L
3
L:S:500 MIL:850 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B1_UF
3
L:S:500 MIL:850 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLKB1:G:L:S:0 MIL:100 MIL
3
L:S::3500 MIL 200
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLKB1:G:L:S:0 MIL:100 MIL
3
L:S::3200 MIL 200
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B1_L
3
L:S:500 MIL:850 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B2_UF
3
L:S:500 MIL:850 MIL
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B2_L_UF
SYSCLK_DDRCLKB2:G:L:S:0 MIL:100 MIL
3
L:S::3500 MIL 200
270
167 MHZ8 MIL SPACING
SYSCLK_DDRCLK_B2_L
8
L:S::2500 MIL
270
66.56 MHZ
10 MIL SPACING
INT_REF_CLK_IN_PD
MIN_DAISY_CHAIN
6
L:S:6000:8000 500 33 MHZ
PCI_AD<31..0>
MIN_DAISY_CHAIN
6
L:S:6000:8000 500 33 MHZ
PCI_CBE<3..0>
MIN_DAISY_CHAIN
7
L:S:6000 MIL:8000 MIL
500 33 MHZ
PCI_FRAME_L
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:36 2003
14D6<> 14D4<>
15D6<
59C3>
14C6<>
14D6<>
15C8<
59B3>
14C4<>
14C8<
15C6<
32C6<>
14B6<>
14C6<>
15B8<
14D4<>
15D4>
15C6<
32B7<>
14B4<>
14B8<
15B6<
14C4<>
15C4>
15C4>
32B6<>
14A6<>
14B6<>
15A8<
14B4<>
15B4>
15B6<
31C7<
13C8<>
14A4<>
14A8<
15A6<
14A4<>
15A4>
15B4>
31C6<
13C4<>
13D7<>
14A6<>
13C7<>
13D7<>
13C7<>
14B6<>
31B7<
13B6<>
13D4<>
13D7<>
13C4<>
13D4<>
13C4<>
12D6<>
14B4<>
15C6<
31B6<
13B3<>
13C7<>
13C8<>
13D4<>
13B7<>
13C8<>
13C7<>
13B7<>
12D3<
12D3<
15C1<
15C4>
30D4<>
59A6>
13A6<>
13C4<>
13C4<>
13C7<>
13B4<>
13C4<>
13C4<>
13B4<>
12D2<
12D1<
15B6<
12C6<>
14B6<>
15B1<
30C4<>
59A6>
32B6<>
12D8<>
13C2<>
13B3<>
13C4<>
13B2<>
13B3<>
13B5<>
13B2<>
12C3<
12C3<
14B6<>
12C6<>
14B6<>
15B6<
15B4>
15B6<
12C2<
14B4<>
15A1<
13C4<>
13C8<>
30C2<
32B6<>
31B7<
15A6<
12C8<>
13B5<>
13A6<>
13B5<>
13A5<>
13A6<>
13B2<>
13A5<>
12C2<
12C1<
12D6<>
14B4<>
12C2<
14B4<>
15B4>
12C6<>
12C6<>
12C6<>
14B4<>
14B4<>
14B6<>
12B6<>
12C1<
12C1<
13A3<>
13A6<>
14D6<>
14D6<>
14A4<>
14A4<>
15B4>
15D6<
30C1<>
31B7<
30C5<>
12B6<>
12A4<
12B8<>
13B2<>
15D6<
12C6<>
13B2<>
13A2<>
12C6<>
13A5<>
13A2<>
12B3<
12B3<
12B3<
12B3<
12B2<
12C1<
12B1<
12A3<
12A3<
12B3<
12A2<
12A2<
12B3<
12B2<
12B1<
12B1<
12B6<>
12B6<>
12D4<
12D4<
12B6<>
12B6<>
12C4<
12C4<
12B6<>
12B6<>
12C4<
12B4<
12B6<>
12B6<>
12B6<>
12B4<
15B3>
12B6<>
12B6<>
12A4<
15C6<
12B6<>
12B6<>
15A6<
28A6<
30B2<
30C5<>
30B7<
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DRAWING
SIG_NAME
SIGNAL CONSTRAINTS
RATSNEST_SCHEDULE
STUB_LENGTH
NET_SPACING_TYPE
MAX_EXPOSED_LENGTH
DIFFERENTIAL_PAIR
FUNC_TEST
PULSE_PARAM
MAX_VIAS
PROPAGATION_DELAY
RELATIVE_PROPAGATION_DELAY
I1
I10
I11
I12
I13
I14
I15
I16
I17
I18
I19
I2
I20
I21
I22
I23
I24
I25
I26
I27
I28
I29
I3
I30
I31
I32
I33
I34
I35
I36
I37
I38
I39
I4
I40
I41
I42
I43
I44
I45
I46
I47
I48
I49
I5
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
I6
I60
I61
I62
I63
I64
I65
I66
I67
I68
I7
I70
I71
I72
I73
I74
I75
I76
I77
I78
I79
I8
I9
051-6497
13
54 69
AGP_GROUP0:G:L:S:0:280
L:S::4500
5
266 MHZ
AGP_AD<16..31>
AGP_GROUP0:G:L:S:0 MIL:330 MIL
L:S::4400 MIL 8 MIL SPACING AGP_ADSTBDP0
4
200 500 133 MHZ
AGP_AD_STB_L<0>
AGP_GROUP0:G:L:S:0 MIL:330 MIL
L:S::4400 MIL 200 8 MIL SPACING
4
500 AGP_ADSTBDP0 133 MHZ
AGP_AD_STB<0>
L:S:4000 MIL:4500 MIL
5
66 MHZ
AGP_IRDY_L
AGP_GROUP0:G:L:S:0:330
L:S::4500
5
266 MHZ
AGP_CBE<0..1>
AGP_GROUP0:G:L:S:0:280
L:S::4500
5
266 MHZ
AGP_AD<0..15>
GPU_AGP_STB0:G:L:S:0 MIL:50 MIL
L:S::450 MIL
3
8 MIL SPACING GPU_ADSTBDP0500 133 MHZ
AGP_AD_STB_GPUUF<0>
GPU_AGP_STB1:G:L:S:0 MIL:50 MIL
L:S::800 MIL
3
8 MIL SPACING GPU_ADSTBDP1500 133 MHZ
AGP_AD_STB_GPUUF<1>
GPU_AGP_STB0:G:L:S:0 MIL:50 MIL
L:S::800 MIL
3
8 MIL SPACING GPU_ADSTBDP0500 133 MHZ
AGP_AD_STB_L_GPUUF<0>
GPU_AGP_STB1:G:L:S:0 MIL:50 MIL
L:S::800 MIL
3
8 MIL SPACING 500 GPU_ADSTBDP1 133 MHZ
AGP_AD_STB_L_GPUUF<1>
L:S:4500 MIL:5000 MIL
5
AGP_BUSY_L
L:S::200 MIL
4
200 250 66 MHZ
AGP_FBI_EQUAL
L:S:900 MIL:1080 MIL
4
200 250 66 MHZ
AGP_FBO_EQUAL
L:S:1900 MIL:2000 MIL
4
250 66 MHZ
AGP_FB_PLUS2
L:S:4500 MIL:5000 MIL
5
AGP_GNT_L
L:S:4000 MIL:4500 MIL
5
66 MHZ
AGP_PAR
L:S:4000 MIL:4500 MIL
5
AGP_PIPE_L
L:S:4000 MIL:4500 MIL
5
AGP_RBF_L
L:S:4500 MIL:5000 MIL
5
AGP_REQ_L
AGP_GROUP99:G:L:S:0 MIL:200 MIL
L:S::4500 MIL
5
AGP_SBSTBB
AGP_SB_STB
AGP_GROUP99:G:L:S:0 MIL:200 MIL
L:S::4500 MIL
5
AGP_SBSTBB
AGP_SB_STB_L
L:S:4000 MIL:4500 MIL
5
66 MHZ
AGP_STOP_L
L:S:4000 MIL:4500 MIL
5
AGP_WBF_L
L:S:3000 MIL:3500 MIL
4
200 8 MIL SPACING 250 33 MHZ
CLK33M_PCI_SLOTD
L:S:3700 MIL:3900 MIL
4
200
10 MIL SPACING
250 66 MHZ
CLK66M_GPU_AGP
L:S:1000 MIL:1100 MIL
3
10 MIL SPACING
250 66 MHZ
CLK66M_GPU_UF
L:S:300 MIL:600 MIL
3
66 MHZ
GPU_AGP_DEVSEL_L
L:S:300 MIL:600 MIL
3
66 MHZ
GPU_AGP_FRAME_L
L:S:300 MIL:600 MIL
3
66 MHZ
GPU_AGP_IRDY_L
L:S:300 MIL:600 MIL
3
66 MHZ
GPU_AGP_PAR
L:S:300 MIL:600 MIL
3
GPU_AGP_PIPE_L
L:S:300 MIL:600 MIL
3
GPU_AGP_RBF_L
GPU_AGP_SBSTB:G:L:S:0 MIL:50 MIL
L:S:300 MIL:600 MIL
3
GPU_SBSTBB
GPU_AGP_SB_STB
GPU_AGP_SBSTB:G:L:S:0 MIL:50 MIL
L:S:300 MIL:600 MIL
3
GPU_SBSTBB
GPU_AGP_SB_STB_L
L:S:300 MIL:600 MIL
3
66 MHZ
GPU_AGP_STOP_L
L:S:300 MIL:600 MIL
3
66 MHZ
GPU_AGP_TRDY_L
L:S::1200 MIL
4
200 250 66 MHZ
INT_AGP_FB_IN
L:S:1400 MIL:1500 MIL
4
200 250 66 MHZ
INT_AGP_FB_OUT
L:S::2800 MIL
3
166 MHZ8 MIL SPACING 250
INT_ANALYZER_CLK
L:S:600 MIL:800 MIL
3
10 MIL SPACING
250 66 MHZ
INT_ROM_OVERLAY_PU
L:S:4500 MIL:5000 MIL
5
STOP_AGP_L
L:S:300:600
3
GPU_AGP_SBA<0..7>
GPU_AGP_GROUP1:G:L:S:0:100
L:S::600
3
266 MHZ
GPU_AGP_CBE<2..3>
GPU_AGP_GROUP1:G:L:S:0:100
L:S::600
3
266 MHZ
GPU_AGP_AD<16..31>
GPU_AGP_GROUP0:G:L:S:0:100
L:S::600
3
266 MHZ
GPU_AGP_CBE<0..1>
GPU_AGP_GROUP0:G:L:S:0:100
L:S::600
3
266 MHZ
GPU_AGP_AD<0..15>
L:S:4500:5000
5
AGP_ST<0..2>
L:S:4000:4500
5
AGP_SBA<0..7>
AGP_GROUP0:G:L:S:0 MIL:280 MIL
L:S::4400 MIL 8 MIL SPACING
4
200 AGP_ADSTBDP1500 133 MHZ
AGP_AD_STB<1>
AGP_GROUP0:G:L:S:0 MIL:330 MIL
L:S::4400 MIL 500
4
200 8 MIL SPACING AGP_ADSTBDP1 133 MHZ
AGP_AD_STB_L<1>
L:S:4000 MIL:4500 MIL
5
66 MHZ
AGP_FRAME_L
L:S:4000 MIL:4500 MIL
5
66 MHZ
AGP_TRDY_L
L:S:4000 MIL:4500 MIL
5
66 MHZ
AGP_DEVSEL_L
AGP_GROUP0:G:L:S:0:280
L:S::4500
5
266 MHZ
AGP_CBE<2..3>
L:S::1000 MIL
3
33 MHZ
PCIT_STOP_L
L:S::1000 MIL
3
33 MHZ
PCIT_DEVSEL_L
L:S:1900 MIL:2000 MIL
4
450 33 MHZ
PCI_FB_PLUS4
L:S:2000 MIL:3000 MIL
4
200 450 33 MHZ
PCI_FBI_EQUAL
L:S::1080 MIL
4
200 450 33 MHZ
INT_PCI_FB_IN
PCIT_CBE<31..0>
L:S::1000
3
33 MHZ
L:S::1000 MIL
3
33 MHZ
PCIT_TRDY_L
L:S::1000 MIL
3
33 MHZ
PCIT_IRDY_L
L:S:3000 MIL:4000 MIL
5
200
10 MIL SPACING
450 33 MHZ
CLK33M_PCI_SLOTB
CLK33M_PCI_SLOTB_UF
L:S:600 MIL:1000 MIL
3
200
450 33 MHZ
L:S:600 MIL:1200 MIL
3
200 450 33 MHZ
CLK33M_PCI_SLOTC_UF
L:S:600 MIL:1000 MIL
3
200 450 33 MHZ
CLK33M_PCI_SLOTD_UF
L:S::1000 MIL
4
200 450 33 MHZ
INT_PCI_FB_OUT
L:S::1000 MIL
3
33 MHZ
PCIT_FRAME_L
L:S::1000 MIL
3
33 MHZ
PCIT_PAR
L:S:6000 MIL:8000 MIL
MIN_DAISY_CHAIN
6
500 33 MHZ
PCI_DEVSEL_L
L:S:1900 MIL:2000 MIL
4
200 450 33 MHZ
PCI_FBI_PLUS2
L:S::200 MIL
4
200 450 33 MHZ
PCI_FBO_PLUS2
L:S:5900 MIL:6000 MIL
4
450 33 MHZ
PCI_FB_PLUS6
L:S:6000 MIL:8000 MIL
MIN_DAISY_CHAIN
6
500
33 MHZ
PCI_IRDY_L
L:S:6000 MIL:8000 MIL
MIN_DAISY_CHAIN
6
500 33 MHZ
PCI_TRDY_L
L:S::1000
3
33 MHZ
PCIT_AD<31..0>
MIN_DAISY_CHAIN
L:S:6000 MIL:8000 MIL
6
500 33 MHZ
PCI_PAR
MIN_DAISY_CHAIN
L:S:6000 MIL:8000 MIL
6
500 33 MHZ
PCI_STOP_L
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:37 2003
59C3> 59B3> 31C7<
31C6<
17A8<
31C3<>
59A8>
16C1<
59A6>
59A6>
31C2<>
59A6>
17A8>
56B3>
16B4<
59A6>
32B6<>
32B6<>
32B6<>
31B7<
59A6>
32B6<>
17C8<
17B8<
17B8<
17B8<
17D8<
16D3<
17B7<
17B8<
17B8<
17B7<>
17B8<
17A8<
17B8<
17B8<
16C7<
30C5<>
17A8<
17D7<>
17B6<
16B4<>
17B8<
17B8<
17B8<
17B8<
17B8<
31C3<>
59B6>
59A6>
31B7<
31B7<
31B7<
31B6<
32B6<>
31B7<
16C4<>
16D1<
16B3<
16C3<
17C8<
17C8<
16D1<
16C4<>
17B8<
16B3<
16B3<
16C4<>
16B3<
16D1<
16B4<>
16B1<
32A6<
17C7<
9B4<
30A7<
16D3<
17D6<>
16B1<
16B1<
16B3<
16D1<
16C3<
16B4<>
16C3<
17C8<
31C2<>
31C2<>
31B6<
31C2<>
31C3<>
31C2<>
31C2<>
31C2<>
30C5<>
30C5<>
30C5<>
31B3<>
31B7<
30C5<>
16B4<>
16A4<>
16A4<>
16B4<>
16B4<>
16C4<>
17B6<
17B6<
17B6<
17B6<
16C6<>
16C7<
16B7<
16B8<
16C3<
16B4<>
16A4<>
16A4<>
16C3<
16A4<>
16A4<>
16B3<
16A6<>
30D7<
16D8<
16C6<>
17B6<>
17B6<>
17B6<>
17B6<>
17B6<>
17B6<>
17B6<>
17A6<>
17B6<>
17B6<>
16C6<
16C6<>
8A2<
16D7<
16C6<>
17A6<>
17C6<>
17C6<>
17C6<>
17C6<>
16A4<>
16A4<>
16A4<>
16A4<>
16B4<>
16B3<
16B4<>
16B4<>
31B6<
31B6<
30C8<
30C7<
30C5<
31B2<>
31B6<
31B6<
30D7<
30D5<>
30D5<>
30D5<>
30C5<>
31B6<
31B6<
30B7<
30C8<
30D8<
30C7<
30B7<
30B7<
31B2<>
30C5<>
30B7<
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SIG_NAME
RELATIVE_PROPAGATION_DELAY
PROPAGATION_DELAY
SIGNAL CONSTRAINTS
PULSE PARAM
MAX EXPOSED LENGTH
NET_SPACING_TYPE
RATSNEST_SCHEDULE
STUB_LENGTH
MAX VIAS
DIGITAL SIGNALS
GROUP
55 69
051-6497
13
FB_FBDQSTERM_B:G:L:S:0:60
L:S::1500
300 MHZ
10 MIL SPACING
3
FBDQSTERM<8..15>
FB_DQSTERM_A:G:L:S:0:50
L:S::1500
300 MHZ
10 MIL SPACING
3
FBDQSTERM<0..7>
RAM_FBDQS_B:G:L:S:0:50
L:S::150
300 MHZ
10 MIL SPACING
3
RFBDQS<8..15>
GPU_FBDQS_B:G:L:S:0:100
L:S::350
300 MHZ
10 MIL SPACING
3
FBDQS<8..15>
RAM_FBADDR_B:G:L:S:0:370
L:S::2400
300 MHZ
50
5
RFBBBA<0..1>
RAM_FBADDR_B:G:L:S:0:370
L:S::2400
300 MHZ
50
5
RFBBA<0..11>
GPU_FBADDR_B:G:L:S:0:120
L:S::600
300 MHZ
4
FBBBA<0..1>
GPU_FBADDR_B:G:L:S:0:120
L:S::600
300 MHZ
4
FBBA<0..12>
RAM_FBDQM_B:G:L:S:0:120
L:S::1000
300 MHZ
4
RFBDQM<8..15>
GPU_FBDQM_B:G:L:S:0:120
L:S::800
300 MHZ
4
FBDQM<8..15>
GPU_FBDATA_B:G:L:S:0:225
L:S::800
300 MHZ
4
FBD<64..127>
RAM_FBDQS_A:G:L:S:0:55
L:S::150
300 MHZ
10 MIL SPACING
3
RFBDQS<0..7>
GPU_FBDQS_A:G:L:S:0:100
L:S::350
300 MHZ
3
FBDQS<0..7>
RAM_FBADDR_A:G:L:S:0:530
L:S::2400
300 MHZ
50
5
RFBABA<0..1>
GPU_FBADDR_A:G:L:S:0:200
L:S::600
300 MHZ
4
FBABA<0..1>
RAM_FBADDR_A:G:L:S:0:530
L:S::2400
300 MHZ
2350
5
RFBA<0..11>
RAM_FBDQM_A:G:L:S:0:200
L:S::1000
300 MHZ
4
RFBDQM<0..7>
GPU_FBDQM_A:G:L:S:0:200
L:S::800
300 MHZ
4
FBDQM<0..7>
GPU_FBDATA_A:G:L:S:0:225
L:S::800
300 MHZ
4
FBD<0..63>
RAM_FBDATA_A:G:L:S:0:300
L:S::1000
300 MHZ
4
RFBD<0..63>
RAM_FBDATA_B:G:L:S:0:325
L:S::1000
300 MHZ
4
RFBD<64..127>
RAM_FBCNTL_B:G:L:S:0 MIL:2000 MIL
L:S::3500 MIL
300 MHZ3550
5
RFBBWE_L
RAM_FBCNTL_B:G:L:S:0 MIL:2000 MIL
L:S::3500 MIL
300 MHZ3550
5
RFBBRAS_L
RAM_FBCNTL_B:G:L:S:0 MIL:2000 MIL
L:S::3500 MIL
300 MHZ3550
5
RFBBCS0_L
RAM_FBCLK_B:G:L:S:0 MIL:90 MIL
L:S::2500 MIL
300 MHZ
200
3
RFBBCLK1_L
RAM_FBCLK_B:G:L:S:0 MIL:90 MIL
L:S::2500 MIL
300 MHZ
200
4
RFBBCLK1
RAM_FBCLK_B:G:L:S:0 MIL:90 MIL
L:S::2500 MIL
300 MHZ
200
3
RFBBCLK0_L
RAM_FBCLK_B:G:L:S:0 MIL:90 MIL
L:S::2500 MIL
300 MHZ
200
3
RFBBCLK0
RAM_FBCNTL_B:G:L:S:0 MIL:2000 MIL
L:S::3500 MIL
300 MHZ3550
5
RFBBCKE
RAM_FBCNTL_B:G:L:S:0 MIL:2000 MIL
L:S::3500 MIL
300 MHZ3550
5
RFBBCAS_L
RAM_FBCNTL_A:G:L:S:0 MIL:500 MIL
L:S::2700 MIL
300 MHZ
50
5
RFBAWE_L
RAM_FBCNTL_A:G:L:S:0 MIL:350 MIL
L:S::2700 MIL
300 MHZ
50
5
RFBARAS_L
RAM_FBCNTL_A:G:L:S:0 MIL:350 MIL
L:S::2700 MIL
300 MHZ
50
5
RFBACS0_L
RAM_FBCLK_A:G:L:S:0 MIL:80 MIL
L:S::2500 MIL
300 MHZ
200
3
RFBACLK1_L
RAM_FBCLK_A:G:L:S:0 MIL:80 MIL
L:S::2500 MIL
300 MHZ
200
3
RFBACLK1
RAM_FBCLK_A:G:L:S:0 MIL:70 MIL
L:S::2500 MIL
300 MHZ
200
3
RFBACLK0_L
RAM_FBCLK_A:G:L:S:0 MIL:70 MIL
L:S::2500 MIL
300 MHZ
200
3
RFBACLK0
RAM_FBCNTL_A:G:L:S:0 MIL:500 MIL
L:S::2700 MIL
300 MHZ
50
5
RFBACKE
L:S::2700 MIL
RAM_FBCNTL_A:G:L:S:0 MIL:500 MIL
300 MHZ
50
5
RFBACAS_L
GPU_FBCNTL_B:G:L:S:0 MIL:120 MIL
L:S::400 MIL
300 MHZ
4
FBBWE_L
GPU_FBCNTL_B:G:L:S:0 MIL:120 MIL
L:S::400 MIL
300 MHZ
4
FBBRAS_L
GPU_FBCNTL_B:G:L:S:0 MIL:120 MIL
L:S::400 MIL
300 MHZ
4
FBBCS0_L
GPU_FBCLK_B:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBBCLK1_L
GPU_FBCLK_B:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBBCLK1
GPU_FBCLK_B:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBBCLK0_L
GPU_FBCLK_B:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBBCLK0
GPU_FBCNTL_B:G:L:S:0 MIL:120 MIL
L:S::400 MIL
300 MHZ100
5
FBBCKE
GPU_FBCNTL_B:G:L:S:0 MIL:120 MIL
L:S::400 MIL
300 MHZ
4
FBBCAS_L
GPU_FBCNTL_A:G:L:S:0 MIL:200 MIL
L:S::400 MIL
300 MHZ
4
FBAWE_L
GPU_FBCNTL_A:G:L:S:0 MIL:200 MIL
L:S::400 MIL
300 MHZ
4
FBARAS_L
GPU_FBCNTL_A:G:L:S:0 MIL:200 MIL
L:S::400 MIL
300 MHZ
4
FBACS0_L
GPU_FBCLK_A:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBACLK1_L
GPU_FBCLK_A:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBACLK1
GPU_FBCLK_A:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBACLK0_L
GPU_FBCLK_A:G:L:S:0 MIL:50 MIL
L:S::150 MIL
300 MHZ
200
3
FBACLK0
GPU_FBCNTL_A:G:L:S:0 MIL:200 MIL
L:S::400 MIL
300 MHZ
100
5
FBACKE
GPU_FBCNTL_A:G:L:S:0 MIL:200 MIL
L:S::400 MIL
300 MHZ
4
FBACAS_L
GPU_FBADDR_A:G:L:S:0:200
L:S::700
300 MHZ
4
FBA<0..12>
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:38 2003
20C5<>
21C5<>
19C8<
19D8<
20C1<>
21C1<>
21D6<
19C5<
20D6<
19D5<
20B5<>
21B5<>
21D2<
18D5<>
19B8<
20D2<
19C8<
20B1<>
21B1<>
21C6<
18C5<>
21C6<
19B5<
20C6<
19C5<
19D7<
19C7<
18F3<
21C6<>
21C6<
21C2<
18C3<
21C2<
18D5>
18G5<>
20C6<>
20C6<
20C2<
20C6<
18G8<>
19D4<
19C4<
21B6<
21B6<
21B6<
21C6<
21B6<
20B6<
20B6<
20B6<
20C6<
20B6<
18E3<
21C2<>
19A5<
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18C2<>
18C5<>
18B3<
18D2<
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18F5<>
20C2<>
19A8<
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18E3<
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20C2<
18G3<
18F8<>
19C7<
19B7<
21B2<
21B2<
21B2<
21C2<
21C2<
21C6<
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20B2<
20B2<
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20C2<
20C6<
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18D4<>
18D4<>
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19B3<
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19B3<
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18F3<
18G3<
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19D3<
19D3<
19C3<
19C3<
18D7<>
18G3<
18D8>
19A4<
19A7<
19A3<
18D4<>
18A2<>
18B2<>
18A3<
18A3<
18C2<
18C3<
18E5<>
19A6<
18C7<>
18E2<>
18C8<>
18E2<>
18G2<
18D8>
18E8<>
19C4<
19B4<
18C2<>
18C2<>
18C2<>
19B1<
19C1<
19B1<
19B1<
18A2<>
18C2<>
18F2<>
18G2<>
18F2<>
19D1<
19D1<
19C1<
19C1<
18D2<>
18G2<>
18C3<
18C3<
18C3<
18C5<>
18C5<>
18C5<>
18C5<>
18A3<
18C3<
18C8>
18C8>
18C8>
18D7>
18D7>
18D7>
18D7>
18D3<
18C8>
18C8>
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SIG_NAME
RATSNEST_SCEDULE
MIN_LINE_WIDTH
MAXBUS
GROUP
MAX_VIAS
DIGITAL SIGNALS
STUB_LENGTH
NET_SPACING_TYPE
NO_TEST
PULSE_PARAM
MAX_EXPOSED_LENGTH
SIGNAL CONSTRAINTS
DIFFERENTIAL_PAIR
PROPAGATION_DELAY
RELATIVE_PROPAGATION_DELAY
I1
I10
I11
I12
I13
I14
I15
I16
I17
I18
I19
I2
I20
I21
I22
I23
I24
I25
I26
I27
I28
I29
I3
I30
I31
I32
I33
I34
I35
I36
I37
I38
I39
I4
I40
I41
I42
I43
I44
I45
I46
I47
I48
I49
I5
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
I6
I60
I61
I62
I63
I7
I8
I9
6956
13
051-6497
3
:::1000
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:::1000
CPU_GBL_L
7
:::5000
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:::1000
CPU_AACK_L
7
:::5000
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_TS_L
7
250 166 MHZ
L:S::5000
CPU_ADDR_GROUP:G:L:S:0:1250
CPU_ADDR<0..31>
7
1550 166 MHZ
:::5000
CPU_DATA_GROUP:G:L:S:0:1400
CPU_DATA<0..63>
7
:::5000
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_ARTRY_L
7
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1100 MIL
:::5000
CPU_BG_L
7
250
10 MIL SPACING
166 MHZ
:::5000
CPU_CNTL_GROUP:G:L:S:0 MIL:1100 MIL
CPU_BR_L
7
:::5000
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_CI_L
7
:::3500
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_DBG_L
250
5
:::500
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1100 MIL
CPU_DRDY_L
7
250
10 MIL SPACING
166 MHZ
:::5000
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_HIT_L
5
:::3500
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1100 MIL
CPU_INT_GBL_L
:::4000
8
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_QACK_L
:::5000
7
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_QREQ_L
:::5000
7
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1100 MIL
CPU_TA_L
7
:::5000
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1100 MIL
CPU_TBST_L
:::5000
7
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1100 MIL
CPU_TEA_L
:::5000
7
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0 MIL:1000 MIL
CPU_WT_L
:::300
166 MHZ
3
INT_ANALYZER_CLK
MIN_DAISY_CHAIN
3
:::500
50
8 MIL SPACING 3.5
480 MHZ
USB2_DMA_DP
USB2_DMA:G:L:S:0 MIL:30 MIL
USB2_DAN_F
MIN_DAISY_CHAIN
3
:::500
50
8 MIL SPACING 3.5
480 MHZ
USB2_DMA_DP
USB2_DMA:G:L:S:0 MIL:30 MIL
USB2_DAP_F
MIN_DAISY_CHAIN
3
:::500
50
8 MIL SPACING 3.5
480 MHZ
USB2_DMB_DP
USB2_DMB:G:L:S:0 MIL:20 MIL
USB2_DBN_F
MIN_DAISY_CHAIN
3
:::500
50
8 MIL SPACING 3.5
480 MHZ
USB2_DMB_DP
USB2_DMB:G:L:S:0 MIL:20 MIL
USB2_DBP_F
MIN_DAISY_CHAIN
3
:::500
50
8 MIL SPACING 3.5
480 MHZ
USB2_DMC_DP
USB2_DMC:G:L:S:0 MIL:20 MIL
USB2_DCN_F
MIN_DAISY_CHAIN
3
:::500
50
8 MIL SPACING 3.5
480 MHZ
USB2_DMC_DP
USB2_DMC:G:L:S:0 MIL:20 MIL
USB2_DCP_F
2
:::500 8 MIL SPACING 3.5
480 MHZ
USB2_RSDA:G:L:S:0 MIL:20 MIL
USB2_RSDAM
2
:::500 8 MIL SPACING 3.5
480 MHZ
USB2_RSDA:G:L:S:0 MIL:20 MIL
USB2_RSDAP
2
:::500 8 MIL SPACING 3.5
480 MHZ
USB2_RSDB:G:L:S:0 MIL:20 MIL
USB2_RSDBM
2
:::500 8 MIL SPACING 3.5
480 MHZ
USB2_RSDB:G:L:S:0 MIL:20 MIL
USB2_RSDBP
2
:::500 8 MIL SPACING 3.5
480 MHZ
USB2_RSDC:G:L:S:0 MIL:20 MIL
USB2_RSDCM
2
:::500 8 MIL SPACING 3.5
480 MHZ
USB2_RSDC:G:L:S:0 MIL:20 MIL
USB2_RSDCP
MIN_DAISY_CHAIN
4
:::3000
2000
8 MIL SPACING 3.5
480 MHZ
USB2_DMAT_DP
USB2_DMAT:G:L:S:0 MIL:60 MIL
USBT_DAN_F
MIN_DAISY_CHAIN
4
:::3000
2000
8 MIL SPACING 3.5
480 MHZ
USB2_DMAT_DP
USB2_DMAT:G:L:S:0 MIL:60 MIL
USBT_DAP_F
MIN_DAISY_CHAIN
4
:::3000
2000
8 MIL SPACING 3.5
480 MHZ
USB2_DMBT_DP
USB2_DMBT:G:L:S:0 MIL:60 MIL
USBT_DBN_F
MIN_DAISY_CHAIN
4
:::3000
2000
8 MIL SPACING 3.5
480 MHZ
USB2_DMBT_DP
USB2_DMBT:G:L:S:0 MIL:60 MIL
USBT_DBP_F
MIN_DAISY_CHAIN
4
:::3000
2000
8 MIL SPACING 3.5
480 MHZ
USB2_DMCT_DP
USB2_DMCT:G:L:S:0 MIL:60 MIL
USBT_DCN_F
MIN_DAISY_CHAIN
4
:::3000
2000
8 MIL SPACING 3.5
480 MHZ
USB2_DMCT_DP
USB2_DMCT:G:L:S:0 MIL:60 MIL
USBT_DCP_F
MIN_DAISY_CHAIN
2
:::750
50
8 MIL SPACING 3.5
480 MHZ
USB2_CONA_DP
USB2_CONA:G:L:S:0 MIL:30 MIL
USB_DAN_CON
MIN_DAISY_CHAIN
2
:::750
50
8 MIL SPACING 3.5
480 MHZ
USB2_CONA_DP
USB2_CONA:G:L:S:0 MIL:30 MIL
USB_DAP_CON
MIN_DAISY_CHAIN
2
:::750
50
8 MIL SPACING 3.5
480 MHZ
USB2_CONB_DP
USB2_CONB:G:L:S:0 MIL:30 MIL
USB_DBN_CON
MIN_DAISY_CHAIN
2
:::750
50
8 MIL SPACING 3.5
480 MHZ
USB2_CONB_DP
USB2_CONB:G:L:S:0 MIL:30 MIL
USB_DBP_CON
MIN_DAISY_CHAIN
2
:::750
50
8 MIL SPACING 3.5
480 MHZ
USB2_CONC_DP
USB2_CONC:G:L:S:0 MIL:30 MIL
USB_DCN_CON
MIN_DAISY_CHAIN
480 MHZ
2
:::750
50
8 MIL SPACING 3.5 USB2_CONC_DP
USB2_CONC:G:L:S:0 MIL:30 MIL
USB_DCP_CON
7
:::5000
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0:1260
CPU_TSIZ<0..2>
7
250
10 MIL SPACING
166 MHZ
:::5000
CPU_CNTL_GROUP:G:L:S:0:1300
CPU_TT<0..4>
:::5000
7
250
10 MIL SPACING
166 MHZ
CPU_CNTL_GROUP:G:L:S:0:1150
CPU_DTI<0..2>
::2900:3000
3
166 MHZ
315
CPU_FB_PLUS3
::900:1000
3
166 MHZ
315
CPU_FB_PLUS2
:::5000
2
250
10 MIL SPACING
166 MHZ
CPU_DRDY_L_UF
4
::2200:2400
200
10 MIL SPACING
166 MHZ
315
SYSCLK_CPU
:::150
2
10 MIL SPACING
166 MHZ
315
SYSCLK_CPU_UF
3
:::1000
200 166 MHZ
315
INT_CPU_FB_OUT
:::200
3
200 166 MHZ
315
CPU_FBO_PLUS1
3
::1400:1500
200 166 MHZ
315
CPU_FBI_PLUS1
::900:1000
4
200 166 MHZ
315
CPU_FB_MINUS3
4
:::1000
200 166 MHZ
315
INT_CPU_FB_IN
:::2000
2
166 MHZ
SYSCLK_LA
:::3000
3
166 MHZ
INT_CLOCK_OUT
3
:::1000
100
10 MIL SPACING
30 MHZ
USB2_XT1
:::1000
3
100
10 MIL SPACING
30 MHZ
USB2_XT2_B
3
:::100
100
10 MIL SPACING
30 MHZ
USB2_XT2
:::100
2
USB2_RREF
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:39 2003
9D8< 9D5<
9D1<>
9C8< 9C5<
9C1<>
9B7<
9B1<>
9A7<
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8D4<>
9C3<>
8C8<>
8C8<>
8C7<
8C7<>
8C7<>
8C5<>
8C5<>
8C4<>
8C4<
8B8<>
8C4<>
8B7<>
6C4<
59A8>
9B3<>
9B3<>
9D3<>
8B5<>
5D4<>
9B3<>
9D3<>
9D3<
9C3<>
9B1<>
9B1<
9B3<
9B3<
9A1<>
9B3<>
9A1<>
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54A7<
9B3<>
8B5<>
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8B5<>
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5C4<>
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8B5<>
7A7<
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8D8<>
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4A7<
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4B7<>
5A4<>
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4D7<
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4A7>
4C3<
4C2<
4A7>
4B8<
4C3<
4C3>
4C3<
4B7>
4C3<
4B7>
8A2<
32C1<>
32C1<>
32C1<>
32C1<>
32C1<>
32C1<>
32C4<>
32C4<>
32C4<>
32C4<>
32C4<>
32C4<>
33B6<>
33B6<>
33C6<>
33C6<>
33D6<>
33D6<>
33C3<>
33C3<>
33B3<>
33B3<>
33D3<>
33D3<>
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4B7<>
4C3<
9A4<
9A5<
4C3<>
4D2<
9A3<>
9B3<>
9A5<
9A5<
9A4<
9B3<
8A2<
8B2<>
32C4<
32C4<>
32B4<>
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
RELATIVE_PROPAGATION_DELAY
DIGITAL SIGNALS
SIGNAL CONSTRAINTS
PULSE_PARAM
MAX_EXPOSED_LENGTH
MIN_LINE_WIDTH
NET_SPACING_TYPE
STUB_LENGTH
DIGITAL SIGNALS
PROPAGATION_DELAY
MAX_VIAS
RELATIVE_PROPAGATION_DELAY
SIG_NAME
STUFF
GROUP
NEW
HERE
PULSE_PARAM
MAX_EXPOSED_LENGTH
MIN_LINE_WIDTH
NET_SPACING_TYPE
SIG_NAME
GROUP
STUFF
NEW
HERE
STUB_LENGTH
MAX_VIAS
I274
I275
I276
I277
I278
I279
I280
I281
I282
I283
I284
I285
I286
I287
I288
I289
I290
I291
I292
I293
I294
I295
I296
I297
I298
I299
I300
I301
I302
I303
I304
I305
I306
I307
I308
I309
13
051-6497
6957
GTMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
GPU_TMDS_D2M
G_TMDS_D2
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_D1M
S_TMDS_D1
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_CKP
S_TMDS_CLK
FW_TPI2N
400 MHZ
FW_TPL2
5000
3
L:S::1220 MIL
FWTPL2:G:L:S:0 MIL:50 MIL
FW_TPO2P
400 MHZFW_TPO25000
3
L:S::1220 MIL
FWTPO2:G:L:S:0 MIL:50 MIL
FW_TPO2N
5000
3
FW_TPO2 400 MHZ
L:S::1220 MIL
FWTPO2:G:L:S:0 MIL:50 MIL
FW_TPI2P
400 MHZFW_TPL2
5000
3
L:S::1220 MIL
FWTPL2:G:L:S:0 MIL:50 MIL
FW_TPI1N
400 MHZ5000
3
FW_TPL1
L:S::1220 MIL
FWTPL1:G:L:S:0 MIL:50 MIL
FW_TPI1P
400 MHZ
FW_TPL15000
3
L:S::1220 MIL
FWTPL1:G:L:S:0 MIL:50 MIL
FW_TPO1N
400 MHZFW_TPO1
5000
3
L:S::1220 MIL
FWTPO1:G:L:S:0 MIL:50 MIL
FW_TPO1P
400 MHZFW_TPO1
5000
3
L:S::1220 MIL
FWTPO1:G:L:S:0 MIL:50 MIL
FW_TPB2N
400 MHZ
FW_TPB25000
3
L:S::1220 MIL
FWTPB2:G:L:S:0 MIL:50 MIL
FW_TPB2P
400 MHZ
FW_TPB25000
3
L:S::1220 MIL
FWTPB2:G:L:S:0 MIL:50 MIL
FW_TPA2N
400 MHZFW_TPA25000
3
L:S::1220 MIL
FWTPA2:G:L:S:0 MIL:50 MIL
FW_TPA2P
400 MHZ
FW_TPA2
5000
3
L:S::1220 MIL
FWTPA2:G:L:S:0 MIL:50 MIL
FW_TPB1N
400 MHZFW_TPB15000
3
L:S::1220 MIL
FWTPB1:G:L:S:0 MIL:50 MIL
FW_TPA1N
400 MHZFW_TPA15000
3
L:S::1220 MIL
FWTPA1:G:L:S:0 MIL:50 MIL
FW_TPB1P
400 MHZFW_TPB1
5000
3
L:S::1220 MIL
FWTPB1:G:L:S:0 MIL:50 MIL
FW_TPA1P
400 MHZFW_TPA15000
3
L:S::1220 MIL
FWTPA1:G:L:S:0 MIL:50 MIL
FW_BIAS2
FW_BIAS1
FW_XO
24.576 MHZ
8 MIL SPACING
100
3
L:S::1000 MIL
FW_XI
24.576 MHZ
8 MIL SPACING
100
3
L:S::1000 MIL
FW_PHY_D<0..7>
49.152 MHZ
4
L:S::1000
FW_PHY_CNTL1
49.152 MHZ
4
L:S::1000 MIL
FW_PHY_CNTL0
49.152 MHZ
4
L:S::1000 MIL
FW_PHY_SCLK
49.152 MHZ
4
L:S::500 MIL
FW_LREQ
49.152 MHZ
4
L:S:3700 MIL:4700 MIL
FW_CNTL1
49.152 MHZ
4
L:S:3700 MIL:4700 MIL
FW_CNTL0
49.152 MHZ
4
L:S:3700 MIL:4700 MIL
FW_D<0..7>
49.152 MHZ
4
L:S:3700:4700
FW_SCLK
49.152 MHZ
4
L:S:3500 MIL:4500 MIL
RJ45_F_TREF
2KV_ISO
4
L:S::1000
FW_LINK_DATA<0..7>
FW_LINK_LREQ
49.152 MHZL:S::1000 MIL
4
4
49.152 MHZ
L:S::1000
FW_LINK_CNTL<0..1>
RJ45_7_8
2KV_ISO
RJ45_4_5
2KV_ISO
RJ45_RREF
2KV_ISO
RJ45_TREF
2KV_ISO
RJ45_RXN
2KV_ISO
100 MHZRJ45_RXD
2
L:S::750 MIL
RJRXD:G:L:S:0 MIL:70 MIL
RJ45_RXP
2KV_ISO
100 MHZ
RJ45_RXD
2
L:S::750 MIL
RJRXD:G:L:S:0 MIL:70 MIL
RJ45_TXN
2KV_ISO
100 MHZ
RJ45_TXD
2
RJTXD:G:L:S:0 MIL:70 MIL
L:S::750 MIL
ENET_RDP
100 MHZ
ETH_RXD
10 MIL SPACING
3
3150
L:S::4000 MIL
ETHRD:G:L:S:0 MIL:70 MIL
ENET_TDN
100 MHZ
ETH_TXD
10 MIL SPACING
3
3150
L:S::4000 MIL
ETHTD:G:L:S:0 MIL:70 MIL
ENET_RDN
100 MHZETH_RXD
10 MIL SPACING
3
3150
L:S::4000 MIL
ETHRD:G:L:S:0 MIL:70 MIL
RJ45_TXP
2KV_ISO
100 MHZRJ45_TXD
2
L:S::750 MIL
RJTXD:G:L:S:0 MIL:70 MIL
ENET_TDP
100 MHZ
ETH_TXD
10 MIL SPACING
3
3150
L:S::4000 MIL
ETHTD:G:L:S:0 MIL:70 MIL
CLK25M_ENET_XIN
25 MHZ
8 MIL SPACING
100
3
L:S::1000 MIL
ENET_RX_ER
25 MHZ
4
L:S:4600 MIL:5600 MIL
CLK25M_ENET_XOUT
25 MHZ
8 MIL SPACING
100
3
L:S::1000 MIL
ENET_RX_DV
25 MHZ
4
L:S:4600 MIL:5600 MIL
ENET_PHY_COL
25 MHZ
4
L:S::1000 MIL
ENET_COL
25 MHZ
4
L:S:4600 MIL:5600 MIL
ENET_LINK_RXD<0..3>
25 MHZ
4
L:S:4600:5600
ENET_CRS
25 MHZ
4
L:S:4600 MIL:5600 MIL
ENET_PHY_CRS
25 MHZ
4
L:S::1000 MIL
ENET_PHY_RX_DV
25 MHZ
4
L:S::1000 MIL
ENET_PHY_RX_ER
25 MHZ
4
L:S::1000 MIL
ENET_PHY_RXD<0..3>
25 MHZ
4
L:S::1000
CLKENET_LINK_RX
25 MHZ
4
L:S:4600 MIL:5600 MIL
CLKENET_PHY_RX
25 MHZ
4
L:S::1000 MIL
ENET_PHY_TX_ER
25 MHZ
4
L:S::5600 MIL
CLKENET_LINK_TX
25 MHZ
4
L:S:4600 MIL:5600 MIL
25 MHZ
4
L:S:4600:5600
ENET_PHY_TXD<0..3>
CLKENET_PHY_TX
25 MHZ
4
L:S::1000 MIL
ENET_PHY_TX_EN
25 MHZ
4
L:S::5600 MIL
ENET_LINK_TX_ER
25 MHZ
4
L:S::1000 MIL
25 MHZ
4
L:S::1000
ENET_LINK_TXD<0..3>
ENET_LINK_TX_EN
25 MHZ
4
L:S::1000 MIL
TD2M
TMDSFILT_D2
2
8 MIL SPACING
TMDSFILT:G:L:S:0 MIL:110 MIL
110
TD1P
TMDSFILT_D1
2
8 MIL SPACING
TMDSFILT:G:L:S:0 MIL:110 MIL
110
TD1M
TMDSFILT_D1
2
8 MIL SPACING
110
TMDSFILT:G:L:S:0 MIL:110 MIL
TD2P
TMDSFILT_D2
2
8 MIL SPACING
TMDSFILT:G:L:S:0 MIL:110 MIL
110
TD0P
TMDSFILT_D0
2
8 MIL SPACING
110
TMDSFILT:G:L:S:0 MIL:110 MIL
TCKM
TMDSFILT_CLK
2
8 MIL SPACING
110
TMDSFILT:G:L:S:0 MIL:110 MIL
TCKP
TMDSFILT_CLK
2
8 MIL SPACING
110
TMDSFILT:G:L:S:0 MIL:110 MIL
NV11_XTALIN
27 MHZ
8 MIL SPACING
100
4
L:S::1000 MIL
L:S::1000 MIL
10 MIL SPACING
DAC2VREF
FILT_ANALOG_RED
2
5.8
10 MIL SPACING
L:S::500 MIL
ANALOG_RED
4
5.8
10 MIL SPACING
200
L:S::4000 MIL
ANALOG_GRN
4
5.8
10 MIL SPACING
200
L:S::4000 MIL
ANALOG_BLU
4
5.8
10 MIL SPACING
200
L:S::4000 MIL
ANALOG_HSYNC*
5
L:S::3500 MIL
HSYNC*
3
L:S::1000 MIL
ANALOG_VSYNC*
4
L:S::3500 MIL
VSYNC*
3
L:S::1000 MIL
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_D1P
S_TMDS_D1
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_D2M
S_TMDS_D2
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_CKM
S_TMDS_CLK
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_D2P
S_TMDS_D2
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_D0M
S_TMDS_D0
STMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
SI_TMDS_D0P
S_TMDS_D0
TMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
TMDS_D2
TMDS_D2M
70
165MHZ200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD1
165MHZ
TMDS_XMIT:G:L:S:0 MIL:400 MIL
200
DVOD0
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD2
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD3
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD6
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD4
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD5
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD8
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD7
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD11
165MHZ
200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD9
165MHZ200
TMDS_XMIT:G:L:S:0 MIL:400 MIL
DVOD10
GTMDS:G:L:S:0 MIL:120 MIL
3
50
GPU_TMDS_CKP
G_TMDS_CLK
8 MIL SPACING
GTMDS:G:L:S:0 MIL:120 MIL
GPU_TMDS_D1P
3
50
8 MIL SPACING
G_TMDS_D1
GTMDS:G:L:S:0 MIL:120 MIL
GPU_TMDS_D0M
3
50
8 MIL SPACING
G_TMDS_D0
GTMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
GPU_TMDS_D2P
G_TMDS_D2
GTMDS:G:L:S:0 MIL:120 MIL
GPU_TMDS_D1M
50
8 MIL SPACING
G_TMDS_D1
3
GTMDS:G:L:S:0 MIL:120 MIL
GPU_TMDS_CKM
3
8 MIL SPACING
50
G_TMDS_CLK
GTMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
50
GPU_TMDS_D0P
G_TMDS_D0
3
8 MIL SPACING
TMDS_D2
TMDS_D2P
TMDS:G:L:S:0 MIL:120 MIL
70
8 MIL SPACING
TMDS_D1
TMDS_D1M
TMDS:G:L:S:0 MIL:120 MIL
3
70
3
8 MIL SPACING
TMDS_D1
TMDS:G:L:S:0 MIL:120 MIL
TMDS_D1P
70
TMDS:G:L:S:0 MIL:120 MIL
3
8 MIL SPACING
TMDS_D0
TMDS_D0M
70
8 MIL SPACING
TMDS_CKP
TMDS_CLK
3
TMDS:G:L:S:0 MIL:120 MIL
70
3
8 MIL SPACING
TMDS_CKM
TMDS_CLK
TMDS:G:L:S:0 MIL:120 MIL
70
TMDS:G:L:S:0 MIL:120 MIL
8 MIL SPACING
TMDS_D0
3
TMDS_D0P
70
TD0M
2
8 MIL SPACING
TMDSFILT_D0
TMDSFILT:G:L:S:0 MIL:110 MIL
110
27 MHZ
8 MIL SPACING
100
4
L:S::1000 MIL
NV11_XTALOUT
10 MIL SPACING
L:S::1000 MIL
DAC2RSET
2
5.8
10 MIL SPACING
L:S::500 MIL
FILT_ANALOG_BLU
2
5.8
10 MIL SPACING
L:S::500 MIL
FILT_ANALOG_GRN
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:40 2003
59B8>
59B8>
59B8>
59B8>
59B8>
59B8>
59A8>
59A8>
59A8>
59B8>
36C8<
35C8<
26B5<
26B5<
27C2<
27C5<
27C5<
27C5<
27C5<
27C5<
27C5<
27C5<
27C5<
27C5<
27B5<
27C5<
27B5<
27C2<
27C2<
27C2<
27C2<
27C2<
27C2<
27C2<
23D3<>
36C1<>
36C1<>
36C1<>
36C1<>
36D1<>
36D1<>
36D1<>
36D1<>
36C7<>
36C8<
36C8<
36C8<
36B8<
36C8<
35B8<
35B8<
35B8<
35B8<
35B8<
35C6<>
35C8<
35C6<
35C8<
35C6<>
35C6<
59B8>
25B6<
25C6<
25C6<
25D6<>
25C6<>
24D7<>
27A8<
27A8<
26D1<
26D1<
27A8<
27A8<
27A8<
26B1<
27A8<
27A8<
27A8<
27A8<
23D3<>
23D3<>
23D3<>
23D3<>
23D3<>
23D3<>
23D3<>
24D7<>
24C7<>
24C7<>
24B7<>
24B7<>
24A7<>
24B7<>
59B8>
59B8>
23C2<
27C3<>
27C3<>
36A8<>
36A8<>
36A8<>
36A8<>
36A8<>
36A8<>
36A8<>
36B8<>
36C5<>
36C5<>
36C5<>
36C5<>
36C5<>
36C5<>
36C5<>
36C5<>
36C5<>
36C5<>
36C6<>
36C6<
36B7<>
36C7<>
36C7<>
36C7<>
34C3<
34C3<
34C3<
34C3<
34C5<>
35B2<
34C4<>
34C4<>
34C4<>
35C1<>
35C1<>
35C2<>
35C2<>
35C1<>
35C1<>
35C1<>
35C3<>
35C3<>
35C3<>
35C1<>
35C3<>
35B6<
34C7<
35B6<>
34C7<
35B6<>
34B7<
34C7<
34C7<
35B6<>
35B6<>
35B6<>
35B6<>
34C7<
35C6<>
34D7<
34D7<
34C7<
35C6<>
34D7<
34D6<>
34C6<>
34D6<>
24C4<>
24C4<>
24C3<>
24C3<>
24C3<>
24C3<>
24C4<>
22B4<>
22C5<>
25C5<
22C7<>
22C7<>
22C7<>
22D7<
22C5<>
22D7<
22C5<>
27C3<>
27C3<>
27C3<>
27C3<>
27C3<>
27C3<>
23D1<
22C5<>
22C5<>
22C5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
22B5<>
23C2<
23C2<
23C2<
23C2<
23C2<
23C2<
23C2<
23D1<
23D1<
23D1<
23D1<
23D1<
23D1<
23D1<
24C4<>
22B4<>
22C5<>
25C5<
25C5<
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DRAWING
SIG_NAME
SIG_NAME
CD DRIVE BUS
PULSE_PARAM
MAX_EXPOSED_LENGTH
NET_SPACING_TYPE
DIGITAL SIGNALS (CONT’D)
STUB_LENGTH
MAX_VIAS
GROUP
HD DRIVE BUS
PULSE_PARAM
SIGNAL CONSTRAINTS
PROPAGATION_DELAY
PROPAGATION_DELAY
RELATIVE_PROPAGATION_DELAY
I1
I10
I11
I12
I13
I14
I15
I16
I17
I18
I19
I2
I20
I21
I22
I23
I24
I25
I26
I27
I28
I29
I3
I30
I31
I32
I33
I34
I35
I36
I37
I38
I39
I4
I40
I41
I42
I43
I44
I45
I46
I47
I48
I49
I5
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
I6
I60
I61
I62
I63
I64
I65
I66
I67
I68
I69
I7
I70
I71
I72
I73
I74
I75
I76
I77
I78
I79
I8
I80
I81
I82
I83
I84
I85
I86
I87
I88
I89
I9
I90
I91
I92
I93
58 69
051-6497
13
33 MHZ
L:S:3500 MIL:5500 MIL
EIDE_CS3FX_L
33 MHZL:S::1000
CD_EIDE_ADDR<0..2>
100
USBE_F:G:L:S:0 MIL:500 MIL
BT_USB_DM
100
USBE_F:G:L:S:0 MIL:500 MIL
BT_USB_DP
33 MHZ
L:S::1000 MIL
CD_CS1FX_L
33 MHZ
L:S::1000 MIL
CD_CS3FX_L
33 MHZL:S::4000 MIL
CD_DMACK_L
33 MHZL:S::1000 MIL
CD_DMARQ
33 MHZL:S::1000 MIL
CD_DSTB_RDY
33 MHZL:S::5000 MIL
CD_HSTB_RDY
33 MHZL:S::1000 MIL
CD_RESET_L
33 MHZL:S::5000 MIL
CD_STOP
33 MHZ
L:S:3500 MIL:5500 MIL
EIDE_CS1FX_L
33 MHZ
L:S:3500 MIL:5500 MIL
EIDE_DMACK_L
33 MHZ
L:S:3500 MIL:5500 MIL
EIDE_DMARQ
33 MHZ
L:S:3500 MIL:5500 MIL
EIDE_DSTB_RDY
33 MHZL:S::5500 MIL
EIDE_HSTB_RDY
33 MHZ
L:S:3500 MIL:5500 MIL
EIDE_INTRQ
33 MHZ
L:S:3500 MIL:5500 MIL
EIDE_RST_L
33 MHZL:S::5500 MIL
EIDE_STOP
100 MHZL:S::5500 MIL
HD_DIOR_L
100 MHZ
L:S::55000 MIL
HD_DIOW_L
100 MHZL:S::1000 MIL
HD_DMACK_L
100 MHZL:S::1000 MIL
HD_DMARQ
500
100 MHZ
L:S::1000 MIL
HD_INTRQ
100 MHZ
L:S::1000 MIL
HD_IOCHRDY
100 MHZL:S::1000 MIL
HD_RESET_L
100 MHZ
L:S::6000 MIL
HD_UIDE_CS1FX_L
100 MHZ
L:S::6000 MIL
HD_UIDE_CS3FX_L
100
USFE_F:G:L:S:0 MIL:500 MIL
MODEM_USB_DM
100
USBF_F:G:L:S:0 MIL:500 MIL
MODEM_USB_DP
3
100 8 MIL SPACING
32.768 MHZ
L:S::1000 MIL
PMU_CLKIN
3
100 8 MIL SPACING
32.768 MHZ
L:S::1000 MIL
PMU_CLKOUT
3
50
32.768 MHZ
8 MIL SPACING
L:S::300 MIL
PMU_CLKT
3
100 8 MIL SPACING
10 MHZ
L:S::1000 MIL
PMU_XI
3
100
10 MHZ
8 MIL SPACING
L:S::1000 MIL
PMU_XO
3
50
8 MIL SPACING
10 MHZ
L:S::300 MIL
PMU_XT
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_0
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_1
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_2
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_3
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_4
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_5
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_6
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_7
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_8
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_9
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_10
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_11
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_12
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_13
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_14
100 MHZ
L:S::1000 MIL
T_UD_IDEDD_15
33 MHZL:S::1000 MIL
UATA0IRQ
100 MHZL:S::6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_CS1FX_L
100 MHZL:S::6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_CS3FX_L
100 MHZ
L:S:100 MIL:6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_DIOR_L
100 MHZ
L:S::6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_DIOW_L
500 100 MHZ
L:S:100 MIL:6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_DMACK_L
100 MHZ
L:S:100 MIL:6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_DMARQ
100 MHZ
L:S:100 MIL:6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_INTRQ
500
100 MHZ
L:S:100 MIL:6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_IOCHRDY
500 100 MHZ
L:S:100 MIL:6000 MIL
HD_DATA:G:L:S:0 MIL:5500 MIL
UIDE_RST_L
USBA:G:L:S:0 MIL:500 MIL
USB_DAN
100
USBA_F:G:L:S:0 MIL:500 MIL
USB_DAN_F
USBA:G:L:S:0 MIL:500 MIL
USB_DAP
100
USBA_F:G:L:S:0 MIL:500 MIL
USB_DAP_F
USBB:G:L:S:0 MIL:500 MIL
USB_DBN
100
USBB_F:G:L:S:0 MIL:500 MIL
USB_DBN_F
USBB:G:L:S:0 MIL:500 MIL
USB_DBP
100
USBB_F:G:L:S:0 MIL:500 MIL
USB_DBP_F
USBC:G:L:S:0 MIL:500 MIL
USB_DCN
100
USBC_F:G:L:S:0 MIL:500 MIL
USB_DCN_F
USBC:G:L:S:0 MIL:500 MIL
USB_DCP
100
USBC_F:G:L:S:0 MIL:500 MIL
USB_DCP_F
USBE:G:L:S:0 MIL:500 MIL
USB_DEN
USBE:G:L:S:0 MIL:500 MIL
USB_DEP
USBF:G:L:S:0 MIL:500 MIL
USB_DFN
USBF:G:L:S:0 MIL:500 MIL
USB_DFP
10 MIL SPACING
KS_INT_SPKR-
10 MIL SPACING
KS_INT_SPKR+
10 MIL SPACING
MICLOW
10 MIL SPACING
MICHIGH
10 MIL SPACING
MICSHLD
3
50
18.432 MHZ
8 MIL SPACINGL:S::200
CLK_18M_INT_XOUT
3
100 18.432 MHZ8 MIL SPACING
L:S::1000
CLK_18M_INT_XOUT
3
100 18.432 MHZ8 MIL SPACINGL:S::1000
CLK_18M_INT_XOUT
100 MHZL:S:100:6000
HD_DATA:G:L:S:0:5500
UIDE_ADDR<0..2>
100 MHZ
L:S::1000
HD_UIDE_ADDR<0..2>
100 MHZ
L:S:100:6000
HD_DATA:G:L:S:0:5500
UIDE_DATA<0..15>
33 MHZ
L:S:3500:5500
EIDE_ADDR<0..2>
33 MHZL:S::1000
UATAD<0..15>
33 MHZL:S:3500:5500
EIDE_DATA<0..15>
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:41 2003
37D7<>
59B8>
37C7<>
38C6<>
37C5<
59B6>
59B6>
59B6>
59B6>
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59A8>
59A8>
59A8>
38B4<
37C3<
38B8<
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37B7<>
38B8<
29D3<>
29D3<>
38C6<>
38C6<>
38C6<>
38C6<>
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38B8<
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37C5<
37C5<
38C8<
37D5<
37D5<
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
29C5<>
29C5<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C3<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
38C2<>
38B4<
38B4<
37D3<
37C7<>
37D3<
38C4<
38C4<
37C7<
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28B3<>
33B7<
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33B7<
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33C7<
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33C7<
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33D7<
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43D7<
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43B8<
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37B3<
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37C7<>
37C7<>
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37C3<
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37C7<>
37C7<
37C3<
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28A3<
28B2<
28A3<
28B2<
28A3<
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28B3<>
28B3<>
28B3<>
29A3<
29A3<
29A5<>
29A5<>
29A5<>
58B5>
58B5>
58B5>
37C7<>
38C2<>
37A3<
37B7>
37A4<
37A5<
OUT
OUT
OUT
OUT
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OUT
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DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FUNC_TEST
FUNC_TEST
FUNC_TEST
CONSTRINT TABLES
52C4
35C4< 34B7< 8A4<>
25C6<
23D7<>
29D7<>
28D1<
28C5<>
45C8<> 45C7<>
44C4<> 29B2<>
59D6>
44C5<>
44B1< 8A8<>
44B5<> 44A5<> 29B3<>
8A8<>
44A4<
59D6>
44C5<>
44B1< 8A8<>
51C6< 50C8< 50C3< 42D8< 39C8<
51A8<
44C7<>
34B7< 28C6< 8A4<>
44C5<> 29C5<>
28B8<
28B5<>
44C4<> 29B2<>
31B4<>
30B2<
29C7<>
28C3>
29C7<> 28C3<>
29C7<>
28D3<
28C3<>
29D5<>
28C3>
29C5<> 28C3<>
29C5<>
28D3<
28C3<>
50C2<
44B5<>
35B4<>
35A2< 34B7< 8A4<>
52B3>
44D4<>
44B5<
8A3<>
7A5< 4B3<
24B3<>
24B4<>
56A3>
33D3<>
56A3>
33D3<>
56A3>
33B3<>
56A3>
33C3<>
56A3>
33B3<>
56A3>
33C3<>
35B4<>
8A4<>
58B5>
29D3<>
28B2<
58A5>
29D3<>
28B2<
58A5>
29C5<>
28B2<
58A5>
29C5<>
28B2<
52A3>
33D3<> 33C3<> 33B3<> 33A4<>
25C4<>
25C4<>
40B7<>
59D8> 52C6>
45D2<>
8C1< 8B7< 4D7< 4D3<
40B7<> 40B6<>
52A6>
24C3<>
40C7<> 40B7<>
40C7<> 40B7<>
40D4<
28B5<>
54C7<
31C3<>
31B6<
31C3<>
54D7<
32B6<>
31B7<
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30B7<
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31B7<
30C5<>
30B7<
34B7< 8A4<>
54D7<
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31B7<
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30B7<
53A6<
32B6<>
31B7<
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30B7<
54D7<
32B6<>
31B7<
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31C2<> 28B7<>
31C2<>
44B2<>
32A8< 31C2<
28B5<>
31C2<> 30D5<>
30B5<
54D7<
31C2<>
30D7<
31C3<> 30D5<>
30B7<
44C4<>
32A8< 31D4< 30B2< 17C8<
52C3>
46B4<>
17D5< 17A4< 17A3<
16D7< 16C2< 16A8< 11A6< 10D6<
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31B7<
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54C7<
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31B6<
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31B6<
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31B6<
28C1<
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52B3>
29A5<>
47B2<>
46B3< 11D3< 10D6<
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52C1>
51D7<>
51C3<
51B7< 51A7< 51A5<
50D5<>
50D2<
50C4<> 50B4<> 49D7<> 49D3<> 49C4<>
48D6<> 48C8<> 48C4<>
45D7<
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44D8< 42B3< 39C8< 36D8<
8D5<> 8A3<>
7B5< 4B3>
7B5< 4B3<
44D2<
44C2< 8A3<>
7B3< 7A5< 7A3< 4B3<
8A3<>
7A5< 4C3<
8A3<>
7D5< 4C3<
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7A5< 4C3<
8A3<>
4C3>
8A3<>
7C5< 4C3<
52C6> 46D4<
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44D2< 44D1<
44B7<
9D8< 9B7< 8D4< 8D1<
8A3<>
7C7< 7C5< 7C3< 7B3< 7A3< 6D6< 6C5< 4D5<
52C1>
51D6<>
51C2<
51A5< 50D5<
29C5<>
29A8< 29A3<
31B4<>
30C6< 30B4<
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30B6< 30B2<
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30C6< 30B2<
52B6>
24B3<>
52A6> 25C4<
41A5<
28B5<>
57D5> 26B5<
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22D7<
57D5> 26B5<
25C6<>
22D7<
57D5> 25C5<
57D5> 25C5<
57D5> 25C5<
58A5> 43D7< 29A3<
58A5> 43D7< 42B4< 29A3<
57D2> 27C2<
24D7<>
23D1<
57D2> 27C2<
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23D1<
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23D1<
57D2> 27C2<
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23D1<
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23D1<
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24B7<>
23D1<
52C4
51B4<>
57D2> 27C2<
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23D1<
57D2> 27C2<
24A7<>
23D1<
29A5<>
52B3>
29A5<>
44D3<
44B8<>
35B8< 32A6<
39B1<>
34B5<
29C7<>
28D1<
28A3<>
39B1<>
34B5<
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28D1<
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56B3> 54A7< 16C7<
9B4< 8A2<
29A5<>
29A5<>
51C8<
51C5<>
50D5<
46D6<>
46C7< 38C1<
52A3>
29A5<>
52B3>
29A5<>
58A5> 43A8<
29A5<>
58A5> 43B8<
29A5<>
58A5> 43A8<
29A5<>
29C6<>
29D5<> 28C5<>
30B2<
53A6<
32C6<>
31C7<
30D4<>
30C2<
54C7< 31C6<
31B3<>
52C4
49B2<>
30B3<
54C7< 31C6<
31B2<>
54C7< 31C6<
31B3<>
54C7< 31C6<
31B3<>
53A6<
32C6<>
31C7<
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30C2<
54C7< 31C6<
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53A6<
32C6<>
31C7<
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30C2<
54C7< 31C6<
31B3<>
53A6<
32C6<>
31C7<
30D4<>
30C2<
54C7< 31C6<
31B3<>
54C7< 31C6<
31B3<>
52C4
43C7< 42C8< 42B7<
42B5< 41A7< 41A5< 40D5< 39D4<
53A6<
32C6<>
31C7<
30C4<>
30B2<
53A6<
32C6<>
31C7<
30C4<>
30B2<
54C7< 31C6<
31C3<>
53A6<
32C6<>
31C7<
30C4<>
30B2<
54C7< 31C7<
31C3<>
53A6<
32C6<>
31C7<
30C4<>
30B2<
53A6<
32C6<>
31C7<
30C4<>
30B2<
54C7< 31C7<
31C3<>
53A6<
32C6<>
31C6<
30C4<>
30B2<
54C7< 31C6<
31C3<>
59B6>
52C6>
45D2<>
8C1< 8B7< 4D7< 4D3<
53A6<
32C6<>
31C6<
30C4<>
53A6<
32C6<>
31B6<
30C4<> 30C1<>
54C7< 31C6<
31C3<>
54C7<
31C3<>
31B6<
53A6<
32B6<>
31B6<
30C4<> 30C1<>
54C7<
31C3<>
31B6<
54C7<
31C3<>
31B6<
54C7<
31C2<>
31B7<
53A6<
32B6<>
31B6<
30C4<> 30C1<>
54C7<
31C3<>
31B6<
13
051-6497
6959
+3V_MAIN
GND
KS_INT_SPKR-
TMDS_D2M
INT_I2C_CLK2
INT_I2C_DATA2
PCI_CBE<0>
PCI_SLOTB_REQ_L
33SLOTB_INT_L
WL_PCI_IDSEL
PCIT_AD<27>
PCIT_AD<14>
PMURESETBUTTON*
NMI_BUTTON*
PWR_SWITCH*
COMM_TXD_L
BT_USB_DM
CPU_VCORE_SLEEP
LINE_IN_COM
LINE_IN_R
PCI_DEVSEL_L
PCI_TRDY_L
INTREPID_VSENSE
JTAG_ASIC_TRST_L
JTAG_ASIC_TMS
+5V_SLEEP
JTAG_ASIC_TDO
INT_TMDS_3V
PCIT_AD<1>
PCIT_AD<2>
PCIT_AD<3>
PCIT_AD<5>
PCIT_AD<7>
PCIT_AD<8>
PCIT_AD<10>
PCIT_AD<12>
PCIT_AD<17>
PCIT_AD<19>
PCIT_AD<21>
PCIT_AD<23>
PCIT_AD<25>
PCIT_AD<28>
PCIT_AD<29>
PCIT_AD<31>
PCIT_CBE<1>
PCIT_CBE<2>
PCIT_CBE<3>
PCI_AD<0>
PCI_AD<4>
PCI_AD<6>
PCI_AD<9>
PCI_AD<11>
PCI_AD<13>
PCI_AD<15>
PCI_AD<16>
PCI_AD<18>
PCI_AD<20>
PCI_AD<22>
PCI_AD<24>
PCI_AD<26>
PCI_AD<30>
PMU_AVCC
USB_PORT_PWR
BT_USB_DP
CLK33M_PCI_SLOTB
MODEM_USB_DM
MODEM_USB_DP
PCIT_IRDY_L
PCI_FRAME_L
PCI_PAR
PCI_STOP_L
USB_DAN_CON
USB_DAP_CON
USB_DBN_CON
USB_DBP_CON
USB_DCN_CON
USB_DCP_CON
COMM_DTR_L
COMM_GPIO_L
COMM_RING_DET_L
COMM_RTS_L
COMM_RXD
COMM_SHUTDOWN
COMM_TRXC
CPU_SRESET_L
FLO_KNOWS_BEST
LINE_IN_L
LINE_IN_SENSE
MAIN_RESET_L
MON_DETECT
PCI_SLOTB_GNT_L
PMU_PME_L
PMU_RST*
POWER_UP*
PWR_SWITCH*
PWR_UP
RESET_BUTTON*
RF_CLKRUN_L
ROM_ONBOARD_CS_L
SLEEP
TMDS_DDC_CLK
TMDS_DDC_DAT
UNUSED_GPIO15
VGA_IIC_CLK
VGA_IIC_DAT
NC_RF_DISABLE_L
FUNC_TEST
LINE_OUT_L
FUNC_TEST
LINEOUT_COMM2
FUNC_TEST
OUT_R
FUNC_TEST
+1_8V_MAIN
+12V_MAIN
+12V_SLEEP
FUNC_TEST
+12V_SLEEPA
+5V_MAIN
+2_5V_MAIN
JTAG_ASIC_TCK
JTAG_ASIC_TDI
CPU_VCORE_SLEEP
+1_5V_AGP
FAN_12V_FILT
+INTREPID_CORE_MAIN
FUNC_TEST
OVDD_ADJ
CPU_CHKSTP_OUT_L
CPU_CHKSTP_IN_L
CPU_HRESET_L
JTAG_CPU_TDI
JTAG_CPU_TCK
JTAG_CPU_TMS
JTAG_CPU_TDO
JTAG_CPU_TRST_L
+MAXBUS_SLEEP
ROM_CS_L
ROM_OE_L
ROM_RW_L
DDC_VCC_3
DDC_VCC_5
ANALOG_HSYNC*
ANALOG_VSYNC*
FILT_ANALOG_BLU
FILT_ANALOG_RED
FILT_ANALOG_GRN
KS_INT_SPKR+
TMDS_D2P
TMDS_D1P
TMDS_D1M
TMDS_D0P
TMDS_D0M
TMDS_CKP
TMDS_CKM
INV_CUR_HI_FILT
KS5VSD
IO_RESET_L
INT_ANALYZER_CLK
LCD_PWM_FILT
LAMP_STS_FILT
LED_RET_FILT
LED_5V_FILT
MICSHLD
MICLOW
MICHIGH
COMM_RESET_L
IIC_ADD
ROM_WP_L
SND_LIN_SENSE_L
SND_HP_SENSE_L
<XR_PAGE_TITLE>
LAST_MODIFIED=Wed Sep 17 12:12:42 2003
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
FBD<50> 18E8<> 19D5<
FBD<49> 18E8<> 19D5<
FBD<48> 18E8<> 19D5<
FBD<47> 18E8<> 19D5<
FBD<46> 18E8<> 19D5<
FBD<45> 18E8<> 19D5<
FBD<44> 18F8<> 19D5<
FBD<43> 18F8<> 19D5<
FBD<42> 18F8<> 19D5<
FBD<41> 18F8<> 19D5<
FBD<40> 18F8<> 19D5<
FBD<39> 18F8<> 19D5<
FBD<38> 18F8<> 19D5<
FBD<37> 18F8<> 19D5<
FBD<36> 18F8<> 19D5<
FBD<35> 18F8<> 19D5<
FBD<34> 18F8<> 19D5<
FBD<33> 18F8<> 19D5<
FBD<32> 18F8<> 19D5<
FBD<31> 18F8<> 19C8<
FBD<30> 18F8<> 19C8<
FBD<29> 18F8<> 19C8<
FBD<28> 18F8<> 19C8<
FBD<27> 18F8<> 19C8<
FBD<26> 18F8<> 19C8<
FBD<25> 18F8<> 19C8<
FBD<24> 18G8<> 19C8<
FBD<23> 18G8<> 19C8<
FBD<22> 18G8<> 19C8<
FBD<21> 18G8<> 19C8<
FBD<20> 18G8<> 19C8<
FBD<19> 18G8<> 19C8<
FBD<18> 18G8<> 19D8<
FBD<17> 18G8<> 19D8<
FBD<16> 18G8<> 19D8<
FBD<15> 18G8<> 19D8<
FBD<14> 18G8<> 19D8<
FBD<13> 18G8<> 19D8<
FBD<12> 18G8<> 19D8<
FBD<11> 18G8<> 19D8<
FBD<10> 18G8<> 19D8<
FBD<9> 18G8<> 19D8<
FBD<8> 18G8<> 19D8<
FBD<7> 18G8<> 19D8<
FBD<6> 18G8<> 19D8<
FBD<5> 18G8<> 19D8<
FBD<4> 18G8<> 19D8<
FBD<3> 18G8<> 19D8<
FBD<2> 18G8<> 19D8<
FBD<1> 18G8<> 19D8<
FBD<0..63> 55D3>
FBD<0> 18G8<> 19D8<
FBCAL_TERM_GND 18A5< 18D7<
FBCAL_PU_GND 18A5< 18D7<
FBCAL_PD_VDDQ 18D7<
FBCAL_CLK_GND 18A5< 18D7<
FBBWE_L 18C3< 18D4<> 55C3>
FBBRAS_L 18C3< 18D4<> 55C3>
FBBCS0_L 18C3< 18C4<> 55C3>
FBBCLK1_L 18C5<> 19B3< 55B3>
FBBCLK1 18C5<> 19C3< 55B3>
FBBCLK0_L 18C5<> 19B3< 55B3>
FBBCLK0 18C5<> 19B3< 55B3>
FBBCKE 18A3< 18C4<> 55B3>
FBBCAS_L 18C3< 18D4<> 55C3>
FBBBA<1> 18A3< 18C5<>
FBBBA<0..1> 55C3>
FBBBA<0> 18A3< 18C5<>
FBBA<12> 18A3< 18C5<>
FBBA<11> 18B3< 18C5<>
FBBA<10> 18B3< 18D5<>
FBBA<9> 18B3< 18D5<>
FBBA<8> 18B3< 18D5<>
FBBA<7> 18B3< 18D5<>
FBBA<6> 18B3< 18D5<>
FBBA<5> 18B3< 18D5<>
FBBA<4> 18B3< 18D5<>
FBBA<3> 18B3< 18D5<>
FBBA<2> 18B3< 18D5<>
FBBA<1> 18B3< 18D5<>
FBBA<0..12> 55C3>
FBBA<0> 18C3< 18D5<>
FBAWE_L 18C8> 18F3< 55D3>
FBARAS_L 18C8> 18G3< 55D3>
FBACS0_L 18C8> 18F3< 55D3>
FBACLK1_L 18D7> 19D3< 55C3>
FBACLK1 18D7> 19D3< 55C3>
FBACLK0_L 18D7> 19C3< 55C3>
FBACLK0 18D7> 19C3< 55C3>
FBACKE 18D3< 18D7<> 55D3>
FBACAS_L 18C8> 18G3< 55D3>
FBABA<1> 18C8<> 18E3<
FBABA<0..1> 55D3>
FBABA<0> 18C8<> 18E3<
FBA<12> 18C8> 18E3<
FBA<11> 18C8> 18E3<
FBA<10> 18D8> 18E3<
FBA<9> 18D8> 18E3<
FBA<8> 18D8> 18E3<
FBA<7> 18D8> 18E3<
FBA<6> 18D8> 18E3<
FBA<5> 18D8> 18F3<
FBA<4> 18D8> 18F3<
FBA<3> 18D8> 18F3<
FBA<2> 18D8> 18F3<
FBA<1> 18D8> 18F3<
FBA<0..12> 55D3>
FBA<0> 18D8> 18F3<
FAN_12V_FILT 29A5<> 52B3> 59C8>
EXTINT14 28A8< 28B5<>
ETHPHYRESET_L 35B6<
ENET_TDP 35C3<> 57B5>
ENET_TDN 35C3<> 57B5>
ENET_RX_ER 34C7< 35B8< 57B5>
ENET_RX_DV 34C7< 35B8< 57B5>
ENET_RDP 35C3<> 57B5>
ENET_RDN 35C3<> 57B5>
ENET_RDAC_PD 35B5<>
ENET_PHY_TX_ER 34D7< 35C6< 57C5>
ENET_PHY_TX_EN 34D7< 35C6< 57C5>
ENET_PHY_TXD<3> 34C7< 35C6<>
ENET_PHY_TXD<2> 34C7< 35C6<>
ENET_PHY_TXD<1> 34C7< 35C6<>
ENET_PHY_TXD<0..3> 57C5>
ENET_PHY_TXD<0> 34C7< 35C6<>
ENET_PHY_RX_ER 35B6<> 57B5>
ENET_PHY_RX_DV 35B6<> 57B5>
ENET_PHY_RXD<3> 35B6<>
ENET_PHY_RXD<2> 35C6<>
ENET_PHY_RXD<1> 35C6<>
ENET_PHY_RXD<0..3> 57B5>
ENET_PHY_RXD<0> 35C6<>
ENET_PHY_CRS 35B6<> 57B5>
ENET_PHY_COL 35B6<> 57B5>
ENET_MDIO 34B7<> 35A8<>
ENET_MDC 34B7> 35B6<
ENET_LINK_TX_ER 34D6<> 57C5>
ENET_LINK_TX_EN 34D6<> 57C5>
ENET_LINK_TXD<3> 34C6<>
ENET_LINK_TXD<2> 34C6<>
ENET_LINK_TXD<1> 34C6<>
ENET_LINK_TXD<0..3> 57C5>
ENET_LINK_TXD<0> 34C6<>
ENET_LINK_RXD<7> 34C6<
ENET_LINK_RXD<6> 34C6<
ENET_LINK_RXD<5> 34C6<
ENET_LINK_RXD<4> 34C6<
ENET_LINK_RXD<3> 34C7< 35B8<
ENET_LINK_RXD<2> 34C7< 35C8<
ENET_LINK_RXD<1> 34C7< 35C8<
ENET_LINK_RXD<0..3> 57B5>
ENET_LINK_RXD<0> 34C7< 35C8<
ENET_ENERGY_DET 28B5<> 28C1< 35B4>
ENET_DVDD 35D6<>
ENET_CRS 34C7< 35B8< 57B5>
ENET_COL 34B7< 35B8< 57B5>
ENET_AVDD 35D2<> 35D4<> 52C6>
EIDE_STOP 37A7> 37D5< 58D5>
EIDE_RST_L 37A7> 37D5< 58D5>
EIDE_PDIAG 38C6<>
EIDE_IOCS16_L 38C6<> 52A8>
EIDE_INTRQ 37A7< 38C8< 58C5>
EIDE_HSTB_RDY 37A7> 37C5< 58D5>
EIDE_DSTB_RDY 37A7< 37C5< 58D5>
EIDE_DMARQ 37A7< 38C8< 58D5>
EIDE_DMACK_L 37A7<> 37D5< 58D5>
EIDE_DATA<15> 37A5< 37B7<>
EIDE_DATA<14> 37A5< 37B7<>
EIDE_DATA<13> 37A5< 37B7<>
EIDE_DATA<12> 37B5< 37B7<>
EIDE_DATA<11> 37B5< 37B7<>
EIDE_DATA<10> 37B5< 37B7<>
EIDE_DATA<9> 37B5< 37B7<>
EIDE_DATA<8> 37B5< 37B7<>
EIDE_DATA<7> 37B5< 37B7<>
EIDE_DATA<6> 37B5< 37B7<>
EIDE_DATA<5> 37B5< 37B7<>
EIDE_DATA<4> 37B5< 37B7<>
EIDE_DATA<3> 37B7<> 37C5<
EIDE_DATA<2> 37B7<> 37C5<
EIDE_DATA<1> 37B7<> 37C5<
EIDE_DATA<0..15> 58D5>
EIDE_DATA<0> 37B7<> 37C5<
EIDE_CSELP_L 38C6<> 52A8>
EIDE_CS3FX_L 37A7> 38B8< 58C5>
EIDE_CS1FX_L 37A7> 38B8< 58C5>
EIDE_ADDR<2> 37B7> 38A8<
EIDE_ADDR<1> 37B7> 38B8<
EIDE_ADDR<0..2> 58C5>
EIDE_ADDR<0> 37B7> 38B8<
DVO_PU 22B5<
DVO_PD 22B5<
DVOVSYNC 22C5> 27B5<
DVOVREF 22C5<>
DVOHSYNC 22C5> 26D7< 27B5<
DVODE 22C5<> 27B5<
DVOD11 22B5<> 27A8< 27B5< 57C2>
DVOD10 22B5<> 27A8< 27B5< 57C2>
DVOD9 22B5<> 27A8< 27C5< 57C2>
DVOD8 22B5<> 26B1< 27C5< 57C2>
DVOD7 22B5<> 27A8< 27C5< 57C2>
DVOD6 22B5<> 27A8< 27C5< 57C2>
DVOD5 22B5<> 27A8< 27C5< 57C2>
DVOD4 22B5<> 27A8< 27C5< 57C2>
DVOD3 22B5<> 26D1< 27C5< 57C2>
DVOD2 22C5<> 26D1< 27C5< 57C2>
DVOD1 22C5<> 27A8< 27C5< 57C2>
DVOD0 22C5<> 27A8< 27C5< 57C2>
DVOCLKOUT* 22C5<> 27B6<
DVOCLKOUT 22C5> 27B5<
DVOCLKIN 22C5<
DUKE_BD 45B5<
DS6_2 38B6<>
DS6_1 38B6<
DS3P1 35B2<
DS2_2 38B2<>
DS2_1 38B2<
DS2P1 35B1<
DS1P1 35B2<
DDR_VREF 12A7< 14D2<> 14D8<> 15D8< 52A6>
DDC_VCC_5 25C4< 52A6> 59B8>
DDC_VCC_3 24B3<> 52B6> 59B8>
DACVREF 22C4<
DACVDD 22C4< 52B6>
DACRSET 22C4<
DAC2VREF 22C5<> 57D5>
DAC2VDD 22C5< 52B6>
DAC2RSET 22C5<> 57D5>
CY811_S1 22A7<
CY811_S0 22A7<
CY69P2 39B5<
CVBS_D 22B7<
CVBS_CNT 22B7< 23D7<>
CSLOT_IOWAIT_L 37B7< 52A8>
CPU_WT_L 4B7> 7A7< 8B5<> 9B3<> 56C3>
CPU_VCORE_SLEEPC 45A1<>
CPU_VCORE_SLEEPB 45A4<>
CPU_VCORE_SLEEPA 45C3<>
59B6> 59D8>
CPU_VCORE_SLEEP 4D3< 4D7< 8B7< 8C1< 45D2<> 52C6>
CPU_TT<4> 4B7<> 7A7< 8B4<> 9B3<>
CPU_TT<3> 4B7<> 7A7< 8B5<> 9B3<>
CPU_TT<2> 4B7<> 7A7< 8B4<> 9B3<>
CPU_TT<1> 4B7<> 7A7< 8B5<> 9B3<>
CPU_TT<0..4> 56D3>
CPU_TT<0> 4B7<> 7A7< 8B4<> 9B3<>
CPU_TS_L 4D7<> 7C7< 8B7<> 9D3<> 56D3>
CPU_TSIZ<2> 4B7> 8B7< 9B3<>
CPU_TSIZ<1> 4B7> 8B5<> 9B3<>
CPU_TSIZ<0..2> 56D3>
CPU_TSIZ<0> 4B7> 8B5<> 9B3<>
CPU_TEA_L 4C3< 7B7< 8B5<> 9A1<> 56C3>
CPU_TBST_L 4B7> 7B7< 8B4<> 9B3<> 56D3>
CPU_TBEN 4C3< 7C5< 9A3<>
CPU_TA_L 4C3< 7C7< 8C4<> 9A1<> 56C3>
CPU_STATE_LED* 44C4<> 51A8<
CPU_SRESET_L 4B3< 7A5< 8A3<> 59C6>
CPU_SMI_L 4B3< 7A5< 44C4<>
CPU_SLEEPIN 51B7<
CPU_SHD1_L 4A7<> 7B5<
CPU_SHD0_L 4A7<> 7B5<
CPU_QREQ_L 4C3> 7D5< 8B7<> 9B3< 56C3>
CPU_QACK_L 4C3< 8B4<> 9B3<> 56C3>
CPU_PULLUP 4A3< 7A5<
CPU_PULLDOWN 4A3< 4D7<> 7C5<
CPU_PMONIN_L 4B3< 7C5<
CPU_PLL_STOP 6B8< 44B8<
CPU_PLL_CFGEXT 4C3< 6C6< 8A8<>
CPU_PLL_CFG<3> 4C3< 6C6< 8A8<>
CPU_PLL_CFG<2> 4D3< 6C6< 8A8<>
CPU_PLL_CFG<1> 4D3< 6C6< 8A8<>
CPU_PLL_CFG<0> 4D3< 6C6< 8A8<>
CPU_MCP_L 4B3< 7B5<
CPU_LSSD_MODE 4C3< 7B5<
CPU_L2TSTCLK 4C3< 7C4<
CPU_L1TSTCLK 4C3< 7B4<
CPU_INT_GBL_L 4B8< 7B7< 9C3<> 56C3>
44C2< 44D2< 59C8>
CPU_HRESET_L 4B3< 7A3< 7A5< 7B3< 7B3< 8A3<>
CPU_HIT_L 4A7> 7C7< 8B8<> 9B3< 56C3>
CPU_HDRST_L 44C4<>
CPU_GBL_L 4B8<> 8B5<> 56C3>
CPU_FB_PLUS3 9A4< 56B3>
CPU_FB_PLUS2 9A5< 56C3>
CPU_FB_MINUS3 9A4< 56C3>
CPU_FBO_PLUS1 9A5< 56C3>
CPU_FBI_PLUS1 9A5< 56C3>
CPU_EMODE1_L 4B3< 7A4<
CPU_EMODE0_L 4B3< 7A4<
CPU_EDTI 4C3< 7C5<
CPU_DTI<2> 4C3< 8B4<> 9A1<>
CPU_DTI<1> 4C3< 8B4<> 9A1<>
CPU_DTI<0..2> 56C3>
CPU_DTI<0> 4C3< 8B7<> 9A1<>
CPU_DRDY_L_UF 4C3<> 56C3>
CPU_DRDY_L 4C2< 7B7< 8B5<> 9B1< 56C3>
CPU_DBG_L 4C3< 7B7< 8B8<> 9B1<> 56C3>
CPU_DATA<63> 5A4<> 8D5<> 9B1<> 9C5<
CPU_DATA<62> 5B4<> 8D4<> 9B1<> 9C5<
CPU_DATA<61> 5B4<> 8D4<> 9B1<> 9C5<
CPU_DATA<60> 5B4<> 8D8<> 9B1<> 9D5<
CPU_DATA<59> 5B4<> 8D8<> 9B1<> 9D5<
CPU_DATA<58> 5B4<> 8D4<> 9B1<> 9D5<
CPU_DATA<57> 5B4<> 8D5<> 9B1<> 9D5<
CPU_DATA<56> 5B4<> 8D8<> 9B1<>
CPU_DATA<55> 5B4<> 8C5<> 9B1<> 9C8<
CPU_DATA<54> 5B4<> 8D7<> 9B1<> 9C8<
CPU_DATA<53> 5B4<> 8C7<> 9B1<> 9C8<
CPU_DATA<52> 5B4<> 8C5<> 9B1<> 9C8<
CPU_DATA<51> 5B4<> 8C8<> 9B1<> 9D8<
CPU_DATA<50> 5B4<> 8C8<> 9B1<> 9D8<
CPU_DATA<49> 5B4<> 8C4<> 9B1<> 9D8<
CPU_DATA<48> 5B4<> 8C5<> 9B1<> 9D8<
CPU_DATA<47> 5B4<> 6C4< 8C7< 9B1<>
CPU_DATA<46> 5B4<> 6C4< 8C4<> 9B1<>
CPU_DATA<45> 5B4<> 6C4< 8C7<> 9B1<>
CPU_DATA<44> 5B4<> 6C4< 8C8<> 9B1<>
CPU_DATA<43> 5B4<> 6C4< 8C4< 9B1<>
CPU_DATA<42> 5B4<> 6C4< 8C5<> 9B1<>
CPU_DATA<41> 5B4<> 6C4< 8C4<> 9C1<>
CPU_DATA<40> 5B4<> 6C4< 8D7<> 9C1<>
CPU_DATA<39> 5B4<> 8D5<> 9C1<>
CPU_DATA<38> 5B4<> 8D5<> 9C1<>
CPU_DATA<37> 5B4<> 8D5<> 9C1<>
CPU_DATA<36> 5C4<> 8D4<> 9A7< 9C1<>
CPU_DATA<35> 5C4<> 8D7<> 9B7< 9C1<>
CPU_DATA<34> 5C4<> 8D8<> 9B7< 9C1<>
CPU_DATA<33> 5C4<> 8D8<> 9B7< 9C1<>
CPU_DATA<32> 5C4<> 8D7<> 9B7< 9C1<>
CPU_DATA<31> 5C4<> 8D7<> 9C1<>
CPU_DATA<30> 5C4<> 8C5<> 9C1<>
CPU_DATA<29> 5C4<> 8C8<> 9C1<>
CPU_DATA<28> 5C4<> 8D8<> 9C1<>
CPU_DATA<27> 5C4<> 8C7<> 9C1<>
CPU_DATA<26> 5C4<> 8C5<> 9C1<>
CPU_DATA<25> 5C4<> 8D7<> 9C1<>
CPU_DATA<24> 5C4<> 8D4<> 9C1<>
CPU_DATA<23> 5C4<> 8C8<> 9C1<>
CPU_DATA<22> 5C4<> 8C7<> 9C1<>
CPU_DATA<21> 5C4<> 8C8<> 9C1<>
CPU_DATA<20> 5C4<> 8C4<> 9C1<>
CPU_DATA<19> 5C4<> 8C4<> 9C1<>
CPU_DATA<18> 5C4<> 8C4<> 9C1<>
CPU_DATA<17> 5C4<> 8C7<> 9C1<>
CPU_DATA<16> 5C4<> 8C4<> 9C1<>
CPU_DATA<15> 5C4<> 8C5<> 9D1<>
CPU_DATA<14> 5C4<> 8C8<> 9D1<>
CPU_DATA<13> 5C4<> 8C7<> 9D1<>
CPU_DATA<12> 5C4<> 8C5<> 9D1<>
CPU_DATA<11> 5C4<> 8C5<> 9D1<>
CPU_DATA<10> 5D4<> 8C7<> 9D1<>
CPU_DATA<9> 5D4<> 8C4<> 9D1<>
CPU_DATA<8> 5D4<> 8C5<> 9D1<>
CPU_DATA<7> 5D4<> 8C8<> 9D1<>
CPU_DATA<6> 5D4<> 8C4<> 9D1<>
CPU_DATA<5> 5D4<> 8C8<> 9D1<>
CPU_DATA<4> 5D4<> 8C7<> 9D1<>
CPU_DATA<3> 5D4<> 8C5<> 9D1<>
CPU_DATA<2> 5D4<> 8C8<> 9D1<>
CPU_DATA<1> 5D4<> 8C7<> 9D1<>
CPU_DATA<0..63> 56D3>
CPU_DATA<0> 5D4<> 8C4<> 9D1<>
CPU_CLK_EN 9A3< 44C4<>
CPU_CI_L 4A7> 7A7< 8C5<> 9C3<> 56C3>
CPU_CHKSTP_OUT_L 4B3> 7B5< 8A3<> 8D5<> 59C8>
CPU_CHKSTP_IN_L 4B3< 7B5< 59C8>
CPU_BUS_VSEL 4D3< 7C4<
CPU_BR_L 4D7> 7C7< 8B4<> 9D3< 56D3>
CPU_BG_L 4D7< 7B7< 8B4<> 9D3<> 56D3>
CPU_AVDD 4D3< 52C6>
CPU_ARTRY_L 4A7<> 7C7< 8B8<> 9B3<> 56C3>
CPU_ADDR<31> 4B7<> 8C7<> 9C3<>
CPU_ADDR<30> 4B7<> 8C7<> 9C3<>
CPU_ADDR<29> 4B7<> 8C8<> 9C3<>
CPU_ADDR<28> 4B7<> 8C7<> 9C3<>
CPU_ADDR<27> 4B7<> 8C8<> 9C3<>
CPU_ADDR<26> 4B7<> 8C8<> 9C3<>
CPU_ADDR<25> 4B7<> 8B8<> 9C3<>
CPU_ADDR<24> 4B7<> 8B7<> 9C3<>
CPU_ADDR<23> 4C7<> 8C8<> 9C3<>
CPU_ADDR<22> 4C7<> 8C7<> 9C3<>
CPU_ADDR<21> 4C7<> 8C7<> 9C3<>
CPU_ADDR<20> 4C7<> 8B8<> 9C3<>
CPU_ADDR<19> 4C7<> 8B7<> 9C3<>
CPU_ADDR<18> 4C7<> 8C8<> 9C3<>
CPU_ADDR<17> 4C7<> 8B8<> 9C3<>
CPU_ADDR<16> 4C7<> 8B8<> 9C3<>
CPU_ADDR<15> 4C7<> 8B7<> 9C3<>
CPU_ADDR<14> 4C7<> 8B7<> 9C3<>
CPU_ADDR<13> 4C7<> 8B8<> 9C3<>
CPU_ADDR<12> 4C7<> 8B7<> 9C3<>
CPU_ADDR<11> 4C7<> 8C4<> 9C3<>
CPU_ADDR<10> 4C7<> 8B8<> 9C3<>
CPU_ADDR<9> 4C7<> 8B8<> 9C3<>
CPU_ADDR<8> 4C7<> 8C5<> 9D3<>
CPU_ADDR<7> 4C7<> 8B7<> 9D3<>
CPU_ADDR<6> 4C7<> 8C4<> 9D3<>
CPU_ADDR<5> 4C7<> 8B7<> 9D3<>
CPU_ADDR<4> 4C7<> 8B5<> 9D3<>
CPU_ADDR<3> 4C7<> 8B8<> 9D3<>
CPU_ADDR<2> 4C7<> 8B4<> 9D3<>
CPU_ADDR<1> 4C7<> 8B5<> 9D3<>
CPU_ADDR<0..31> 56D3>
CPU_ADDR<0> 4C7<> 8B4<> 9D3<>
CPU_AACK_L 4A7< 7B7< 8B5<> 9B3<> 56C3>
CORE_MOSFET_1 45B5<> 45C7<>
CORE_MOSFET 45C4<> 45C6<>
COMM_TXD_L 28C3<> 29C7<> 59C6>
COMM_TRXC 28C3<> 28D3< 29C7<> 59C6>
COMM_SHUTDOWN 28C5<> 28D1< 29D7<> 59D6>
COMM_RXD 28C3<> 29C5<> 59C6>
COMM_RTS_L 28C3> 29D5<> 59C6>
COMM_RING_DET_L 28B5<> 28B8< 29C5<> 44C5<> 59D6>
COMM_RESET_L 28C5<> 29D5<> 59A8>
COMM_GPIO_L 28C3<> 28D3< 29C5<> 59C6>
COMM_DTR_L 28C3> 29C7<> 59C6>
CLK_18M_INT_XOUT 58B5> 58B5> 58B5>
CLKFW_LINK_LCLK 34C5<>
CLKENET_PHY_TX 35C6<> 57C5>
CLKENET_PHY_RX 35C6<> 57C5>
CLKENET_LINK_TX 34D7< 35C8< 57C5>
CLKENET_LINK_RX 34C7< 35C8< 57C5>
CLKENET_LINK_GBE_REF 34C6<
CLK66M_GPU_UF 16C6<> 54A7<
CLK66M_GPU_AGP 16D8< 17C7< 54A7<
CLK33M_PCI_SLOTD_UF 30D5<> 54D7<
CLK33M_PCI_SLOTD 30D7< 32A6< 54A7<
CLK33M_PCI_SLOTC_UF 30D5<> 54D7<
CLK33M_PCI_SLOTB_UF 30D5<> 54D7<
CLK33M_PCI_SLOTB 30D7< 31C2<> 54D7< 59A6>
CLK27M_MEM_SS 22A6<>
CLK25M_ENET_XOUT 35B6<> 57B5>
CLK25M_ENET_XIN 35B6< 57B5>
CLK18M_INT_XOUT 28A5<>
CLK18M_INT_XO 28A6<
CLK18M_INT_XIN 28A5<
CLK18M_INT_EXT 28B6<>
CHOC_BROWNIE 51B2<
CHGND 24B3< 29A3< 43A7< 43B7< 52C4
CD_STOP 37D4< 38C6<> 58D5>
CD_RESET_L 37D4< 38C6<> 58D5>
CD_HSTB_RDY 37C4< 38C6<> 58D5>
CD_EIDE_ADDR<2> 38C6<>
CD_EIDE_ADDR<1> 38C6<>
CD_EIDE_ADDR<0..2> 58C5>
CD_EIDE_ADDR<0> 38C6<>
CD_DSTB_RDY 37C4< 38C6<> 58D5>
CD_DMARQ 38C6<> 58D5>
CD_DMACK_L 37D4< 38C6<> 58D5>
CD_CS3FX_L 38C6<> 58C5>
CD_CS1FX_L 38C6<> 58C5>
CAP_PLL 39B4<
C4243P2 40B4<
C4242P2 40B4<
C4240P2 40C4<
C4237P2 40C4<
C756_2 40D3<>
C412P1 41B3<
BT_USB_DP 28B2< 29D3<> 58B5> 59B6>
BT_USB_DM 28B2< 29D3<> 58A5> 59B6>
BT1_LED 51A6<
BT1 44D6<> 51A6<
BRE_1 45B5<>
BRE 45C5<>
AUD_R_FB 39D6<
42D6< 42D7< 43C2< 43D2< 43D4<
AUD_GND 39B7<> 42B2< 42C4< 42D3< 42D4<
AUDIO_TO_SND 28B1< 39C1<
ASH 43A6<
AOUTR 39C2> 41C7< 43D3<
AOUTL 39C2> 41D7< 43D3<
ANEN 35C4<
ANALOG_VSYNC* 22D7< 25C6<> 26B5< 57D5> 59B8>
ANALOG_RED 22C7<> 25B6< 57D5>
ANALOG_HSYNC* 22D7< 25D6<> 26B5< 57D5> 59B8>
ANALOG_GRN 22C7<> 25C6< 57D5>
ANALOG_BLU 22C7<> 25C6< 57D5>
41C3< 41D3< 42A5<> 42A6<> 43A5< 52C4
40C6< 41A2<> 41A4< 41B1<> 41B3<
ANALOGGND 35B1< 35C1<> 40B5<> 40B6< 40C6<
52C4
36B6< 36B6<> 36C1<> 36C1<> 36C1<
33C4< 33C4< 33D2< 33D4< 36A7<> 36B2<
ALTCHGND 25B3<> 25C3< 33B2< 33B4< 33C2<
AINRP 39C4<
AINRM 39C4<
AINLP 39C4<
AINLM 39C4<
AGP_WBF_L 16A6<> 16B1< 17B8< 54B7<
AGP_TRDY_L 16B3< 16B4<> 17B8< 54C7<
AGP_STOP_L 16B3< 16B4<> 17B8< 54C7<
AGP_ST<2> 16A4<> 16B1< 17B6<
AGP_ST<1> 16A4<> 16B1< 17B6<
AGP_ST<0..2> 54B7<
AGP_ST<0> 16A4<> 16B1< 17B6<
AGP_SB_STB_L 16A4<> 16D1< 17A8< 54B7<
AGP_SB_STB 16A4<> 16B3< 17B8< 54B7<
AGP_SBA<7> 16A4<> 16B1< 17A8<
AGP_SBA<6> 16A4<> 16B1< 17A8<
AGP_SBA<5> 16B4<> 16C1< 17A8<
AGP_SBA<4> 16B4<> 16C1< 17A8<
AGP_SBA<3> 16B4<> 16C1< 17A8<
AGP_SBA<2> 16B1< 16B4<> 17A8<
AGP_SBA<1> 16B4<> 16C1< 17A8<
AGP_SBA<0..7> 54B7<
AGP_SBA<0> 16B4< 16C1< 17A8<
AGP_RESET_L 17B8< 27C5< 44D3<
AGP_REQ_L 16C3< 16C4<> 17B7<> 54B7<
AGP_RBF_L 16A4<> 16B3< 17B8< 54B7<
AGP_PWR_ADJ 46A5<>
AGP_PLLVDD 17C5<
AGP_PIPE_L 16A4<> 16B3< 17B8< 54B7<
AGP_PAR 16B4<> 17B8< 54B7<
AGP_IRDY_L 16B4<> 16C3< 17B8< 54C7<
AGP_INT_L 17B6<> 28B5<> 28B8<
AGP_GNT_L 16C3< 16C4<> 17B7< 54B7<
AGP_FRAME_L 16B4<> 16C3< 17B8< 54C7<
AGP_FB_PLUS2 16B8< 54A7<
AGP_FBO_EQUAL 16B7< 54A7<
AGP_FBI_EQUAL 16C7< 54A7<
AGP_DEVSEL_L 16B4<> 16C3< 17B8< 54C7<
AGP_CBE<3> 16B4<> 17C8<
AGP_CBE<2..3> 54C7<
AGP_CBE<2> 16B4<> 17C8<
AGP_CBE<1> 16B4<> 17C8<
AGP_CBE<0..1> 54C7<
AGP_CBE<0> 16B4<> 17C8<
AGP_BUSY_L 16C6<> 16D1< 16D3< 17A8> 54B7<
AGP_AD_STB_L_GPUUF<1> 17B6< 54B7<
AGP_AD_STB_L_GPUUF<0> 17B6< 54B7<
AGP_AD_STB_L<1> 16A4<> 16D1< 17B8< 54C7<
AGP_AD_STB_L<0> 16A4<> 16D1< 17B8< 54C7<
AGP_AD_STB_GPUUF<1> 17B6< 54B7<
AGP_AD_STB_GPUUF<0> 17B6< 54B7<
AGP_AD_STB<1> 16A4<> 16B3< 17B8< 54C7<
AGP_AD_STB<0> 16A4<> 16B3< 17B8< 54C7<
AGP_AD<31> 16B4<> 17C8<
AGP_AD<30> 16B4<> 17C8<
AGP_AD<29> 16B4<> 17C8<
AGP_AD<28> 16B4<> 17C8<
AGP_AD<27> 16B4<> 17C8<
AGP_AD<26> 16B4<> 17C8<
AGP_AD<25> 16B4<> 17C8<
AGP_AD<24> 16B4<> 17C8<
AGP_AD<23> 16C4<> 17C8<
AGP_AD<22> 16C4<> 17C8<
AGP_AD<21> 16C4<> 17C8<
AGP_AD<20> 16C4<> 17C8<
AGP_AD<19> 16C4<> 17C8<
AGP_AD<18> 16C4<> 17C8<
AGP_AD<17> 16C4<> 17C8<
AGP_AD<16..31> 54C7<
AGP_AD<16> 16C4<> 17C8<
AGP_AD<15> 16C4<> 17C8<
AGP_AD<14> 16C4<> 17D8<
AGP_AD<13> 16C4<> 17D8<
AGP_AD<12> 16C4<> 17D8<
AGP_AD<11> 16C4<> 17D8<
AGP_AD<10> 16C4<> 17D8<
AGP_AD<9> 16C4<> 17D8<
AGP_AD<8> 16C4<> 17D8<
AGP_AD<7> 16C4<> 17D8<
AGP_AD<6> 16C4<> 17D8<
AGP_AD<5> 16C4<> 17D8<
AGP_AD<4> 16C4<> 17D8<
AGP_AD<3> 16C4<> 17D8<
AGP_AD<2> 16C4<> 17D8<
AGP_AD<1> 16C4<> 17D8<
AGP_AD<0..15> 54C7<
AGP_AD<0> 16C4<> 17D8<
AGND 39B7<> 52C4
50_I410 50A3<
50_I408 50B3<
49_I70 49B4<
48_I99 48B4<
48_I10 48C3<
47_I66 47B4<
45_I526 45B3<
45_I525 45C4<
45_I408 45B6<
42_I295 42B5<
42_I291 42B6<
33SLOTB_INT_L 28B7<> 28B7<> 28B7<> 31C2<> 59A6>
33PCI_SLOTD_SERR_L 32B6<>
25_CORE_1 49C3<
25V_VSENSE 49C4<>
25V_VPWRA 49B4<>
25V_VPWR 49B5<> 49C4<>
25V_VCC 49C6<
25V_OVP 49B6<>
25V_OCSET 49C5<>
25V_GND 49B6<>
25V_DLT 49B4<>
25V_DL 49B5<>
25V_DHT 49B5<>
25V_DH 49B5<>
25V_COMP_DWN 49B6<
25V_COMP 49B6<
25V_BSTH_TERM 49C5<>
25V_BSTH 49C5<>
18P_GND 29B5<>
15_I286 15B3<
15_I282 15B2<
5V_XRA 50B4<>
3_6V_SLEEP 37D1< 51C1<
3_5_HONKER 51C4<>
3V_SI_VCC 27B2< 27D3<
3V_SI_PLLVCC 27D4<
3V_SI_AVCC 27D4<
52C1> 52C2>
3.8V_TRICKLE 36D8< 44C2< 44C6< 44D7<> 50D5<
3.8VH_TRICKLE 44C1< 44D7<> 52B3>
52C6> 59C8>
9D8< 44B7< 44D1< 44D2< 45D2<> 46D4<
7C3< 7C5< 7C7< 8A3<> 8D1< 8D4< 9B7<
+MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7A3< 7B3< 7C3<
+INTREPID_CORE_MAIN 10D6< 11D3< 46B3< 47B2<> 59C8>
+12V_TPA 42B2< 42B7< 42C4< 42C5< 42D5<
+12V_SLEEPA 59D8>
51C2< 51D6<> 52C1> 52C1> 59D8>
+12V_SLEEP 29A3< 29A8< 29C5<> 50D5< 51A5<
51D7<> 52C1> 52C1> 59D8>
50D2< 50D5<> 51A5< 51A7< 51B7< 51C3<
49C4<> 49D3<> 49D7<> 50B4<> 50C4<>
45D3<> 45D7< 48C4<> 48C8<> 48D6<>
+12V_MAIN 36D8< 39C8< 42B3< 44D8< 45B4<>
+12V_DROPPED 44D8<
+12VSD_T 50D6<>
+12VSD_FILT 29A5<> 52B3>
51C8< 59D8>
+5V_SLEEP 38C1< 46C7< 46D6<> 50D5< 51C5<>
+5V_MAIN 51B4<> 51B4<> 52C4 59D8>
+5V_HP 41A8< 41B7<> 41D5<
+5V_AUDIO 39C6<> 39D7< 41B8<>
+5VSD_T 50D6<>
42B7< 42C8< 43C7< 52C4 59D8>
+3V_MAIN 39D4< 40D5< 41A5< 41A7< 42B5<
+3V_INTREPID_USB 28C4< 52A3>
+3V_GPU_SS 22A6< 22A8< 22B7<
43C6<
+3V_AUDIO 39D2< 39D6< 39D7< 40C3< 43B2<
+3.3VFPD 24D7< 51C1<> 52B6>
+2_5V_MAIN 30B3< 49B2<> 52C4 59D8>
+1_8V_MAIN 52C4 59D8>
+1_5V_INTREPID_PLL8 28D4< 52D3>
+1_5V_INTREPID_PLL7 9D2< 52D3>
+1_5V_INTREPID_PLL6 30D4< 52D3>
+1_5V_INTREPID_PLL5 16D5< 52D3>
+1_5V_INTREPID_PLL4 28D4< 52D3>
+1_5V_INTREPID_PLL3 28D4< 52D3>
+1_5V_INTREPID_PLL2 28D4< 52D3>
+1_5V_INTREPID_PLL1 28C4< 52D3>
+1_5V_INTREPID_PLL 9D4< 16D6< 28D6<> 30D5< 52D3>
17A3< 17A4< 17D5< 46B4<> 52C3> 59C8>
+1_5V_AGP 10D6< 11A6< 16A8< 16C2< 16D7<
*** Signal Cross-Reference for the entire design ***
60
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
MIC1 43B5<
MEM_WE_L 12B3< 12C6<> 53C6<
MEM_RAS_L 12A3< 12C6<> 53C6<
MEM_MUXSEL_L<1> 12B6<>
MEM_MUXSEL_L<0..1> 53C6<
MEM_MUXSEL_H<1> 12B6<>
MEM_MUXSEL_H<0..1> 53C6<
MEM_DQS<7> 12C6<> 13B3<>
MEM_DQS<6> 12C6<> 13B3<>
MEM_DQS<5> 12C6<> 13C4<>
MEM_DQS<4> 12C6<> 13C4<>
MEM_DQS<3> 12C6<> 13A6<>
MEM_DQS<2> 12C6<> 13A6<>
MEM_DQS<1> 12C6<> 13C8<>
MEM_DQS<0..7> 53D6<
MEM_DQS<0> 12C6<> 13C8<>
MEM_DQM<7> 12C6<> 13B3<>
MEM_DQM<6> 12C6<> 13B3<>
MEM_DQM<5> 12C6<> 13C4<>
MEM_DQM<4> 12C6<> 13C4<>
MEM_DQM<3> 12C6<> 13A6<>
MEM_DQM<2> 12C6<> 13A6<>
MEM_DQM<1> 12C6<> 13C8<>
MEM_DQM<0..7> 53D6<
MEM_DQM<0> 12C6<> 13C8<>
MEM_DATA<63> 12B8<> 13B3<>
MEM_DATA<62> 12B8<> 13B3<>
MEM_DATA<61> 12B8<> 13B3<>
MEM_DATA<60> 12B8<> 13B3<>
MEM_DATA<59> 12B8<> 13B3<>
MEM_DATA<58> 12B8<> 13B3<>
MEM_DATA<57> 12B8<> 13B3<>
MEM_DATA<56> 12B8<> 13B3<>
MEM_DATA<55> 12B8<> 13B3<>
MEM_DATA<54> 12B8<> 13B3<>
MEM_DATA<53> 12B8<> 13B3<>
MEM_DATA<52> 12B8<> 13B3<>
MEM_DATA<51> 12B8<> 13B3<>
MEM_DATA<50> 12B8<> 13B3<>
MEM_DATA<49> 12B8<> 13B3<>
MEM_DATA<48> 12B8<> 13B3<>
MEM_DATA<47> 12B8<> 13C4<>
MEM_DATA<46> 12B8<> 13C4<>
MEM_DATA<45> 12B8<> 13C4<>
MEM_DATA<44> 12B8<> 13C4<>
MEM_DATA<43> 12B8<> 13C4<>
MEM_DATA<42> 12B8<> 13C4<>
MEM_DATA<41> 12B8<> 13C4<>
MEM_DATA<40> 12B8<> 13C4<>
MEM_DATA<39> 12C8<> 13C4<>
MEM_DATA<38> 12C8<> 13C4<>
MEM_DATA<37> 12C8<> 13C4<>
MEM_DATA<36> 12C8<> 13C4<>
MEM_DATA<35> 12C8<> 13C4<>
MEM_DATA<34> 12C8<> 13C4<>
MEM_DATA<33> 12C8<> 13C4<>
MEM_DATA<32> 12C8<> 13C4<>
MEM_DATA<31> 12C8<> 13A6<>
MEM_DATA<30> 12C8<> 13A6<>
MEM_DATA<29> 12C8<> 13A6<>
MEM_DATA<28> 12C8<> 13A6<>
MEM_DATA<27> 12C8<> 13A6<>
MEM_DATA<26> 12C8<> 13A6<>
MEM_DATA<25> 12C8<> 13A6<>
MEM_DATA<24> 12C8<> 13A6<>
MEM_DATA<23> 12C8<> 13B6<>
MEM_DATA<22> 12C8<> 13B6<>
MEM_DATA<21> 12C8<> 13B6<>
MEM_DATA<20> 12C8<> 13B6<>
MEM_DATA<19> 12C8<> 13B6<>
MEM_DATA<18> 12C8<> 13B6<>
MEM_DATA<17> 12C8<> 13B6<>
MEM_DATA<16> 12C8<> 13B6<>
MEM_DATA<15> 12C8<> 13C8<>
MEM_DATA<14> 12C8<> 13C8<>
MEM_DATA<13> 12D8<> 13C8<>
MEM_DATA<12> 12D8<> 13C8<>
MEM_DATA<11> 12D8<> 13C8<>
MEM_DATA<10> 12D8<> 13C8<>
MEM_DATA<9> 12D8<> 13C8<>
MEM_DATA<8> 12D8<> 13C8<>
MEM_DATA<7> 12D8<> 13C8<>
MEM_DATA<6> 12D8<> 13C8<>
MEM_DATA<5> 12D8<> 13C8<>
MEM_DATA<4> 12D8<> 13C8<>
MEM_DATA<3> 12D8<> 13C8<>
MEM_DATA<2> 12D8<> 13C8<>
MEM_DATA<1> 12D8<> 13C8<>
MEM_DATA<0..63> 53D6<
MEM_DATA<0> 12D8<> 13C8<>
MEM_CS_L<3> 12B2< 12C6<>
MEM_CS_L<2> 12B2< 12C6<>
MEM_CS_L<1> 12C2< 12C6<>
MEM_CS_L<0..3> 53C6<
MEM_CS_L<0> 12C2< 12C6<>
MEM_CKE<3> 12B2< 12B6<>
MEM_CKE<2> 12B6<> 12C2<
MEM_CKE<1> 12B2< 12B6<>
MEM_CKE<0..3> 53C6<
MEM_CKE<0> 12C2< 12C6<>
MEM_CAS_L 12A3< 12C6<> 53C6<
MEM_BA<1> 12B3< 12D6<>
MEM_BA<0..1> 53D6<
MEM_BA<0> 12B3< 12D6<>
MEM_ADDR<12> 12D2< 12D6<>
MEM_ADDR<11> 12B3< 12D6<>
MEM_ADDR<10> 12C3< 12D6<>
MEM_ADDR<9> 12C3< 12D6<>
MEM_ADDR<8> 12D2< 12D6<>
MEM_ADDR<7> 12D3< 12D6<>
MEM_ADDR<6> 12D2< 12D6<>
MEM_ADDR<5> 12C2< 12D6<>
MEM_ADDR<4> 12D3< 12D6<>
MEM_ADDR<3> 12D3< 12D6<>
MEM_ADDR<2> 12C3< 12D6<>
MEM_ADDR<1> 12C3< 12D6<>
MEM_ADDR<0..12> 53D6<
MEM_ADDR<0> 12C3< 12D6<>
MEMREFN2 18B7<>
MEMREFN1 18B8<>
MEMREFG4 21A4<>
MEMREFG3 21A4<>
MEMREFG2 20A4<>
MEMREFG1 20A5<>
MAX_PWR_ADJ 46C5<>
MAXBUS_PWR_EN 46C7<
MAIN_SUPPLY_LED 50D5<
MAIN_RESET_L_PU 31D3<>
59A6>
MAIN_RESET_L 17C8< 30B2< 31D4< 32A8< 44C4<>
M1S 43A6<> 43B6<>
M1L 43A6<> 43B6<>
M1HFILT 43B5<
M1H 43B6<> 43B6<>
M1FL 43A7<>
M1FH 43B7<>
LT1962_INT_VIN 28D7<>
LT1962_INT_BYP 28D7<>
LT1962_INT_ADJ 28D7<
LPR1 41C6<
LPL1 41D6<
LP4202P4 40B5<
LP4202P3 40B5<
LP4202P2 40C5<
LO_T1 41A4<
LOW_PWR 35A5< 35B4<
LINSENSE 40C5<
LINP 42C5< 43D4<
LINN1 43D2<
LINN 42C5< 43D2<
LINE_OUT_L 59B6>
LINE_IN_SENSE 40B7<> 40C7<> 59B6>
LINE_IN_R 40B6<> 40B7<> 59B6>
LINE_IN_L 40B7<> 40C7<> 59B6>
LINE_IN_COM 40B7<> 59B6>
LINEOUT_COMM2 59B6>
LINA 39C4< 40C2<
LID_SWITCH 29B2<> 44C4<>
LED_ROMCS_LIGHT 30A3<
LED_ROMCS_L 30B4<
LED_ROMCS 30B3<>
LED_RET_FILT 29A5<> 52A3> 59A8>
LED_RET 29A3< 51B6< 52B3>
LED_5V_FILT 29A5<> 52B3> 59A8>
LED_5V 29A8< 52B3>
LCD_PWM_FILT 29A5<> 59A8>
LCD_PWM 23D7< 29A8<
LAMP_STS_FILT 29A5<> 59A8>
LAMP_STS 23D7< 29A3<
L3202_1 40C6<
L43_1 41A4<
L41_FILT 42B7<>
L36_2 40B6<
L32_2 40B6<>
L31_2 40C6<
KYLE 46C6<
KS_INT_SPKR-_FILT 29A5<>
KS_INT_SPKR- 29A3< 42B4< 43D7< 58A5> 59B8>
KS_INT_SPKR+_FILT 29A5<>
KS_INT_SPKR+ 29A3< 43D7< 58A5> 59B8>
KS5VSD 29A5<> 52B3> 59A8>
KAVAN 43A6<
JTAG_INTRP_TDO 28C6< 34B7> 35B3<
JTAG_ENET_TDI 35A2< 35B5<>
JTAG_CPU_TRST_L 4C3< 7C5< 8A3<> 59C8>
JTAG_CPU_TMS 4C3< 7A5< 8A3<> 59C8>
JTAG_CPU_TDO 4C3> 8A3<> 59C8>
JTAG_CPU_TDI 4C3< 7A5< 8A3<> 59C8>
JTAG_CPU_TCK 4C3< 7D5< 8A3<> 59C8>
JTAG_ASIC_TRST_L 8A4<> 34B7< 59C8>
JTAG_ASIC_TMS 8A4<> 34B7< 35A2< 35B4<> 59D8>
JTAG_ASIC_TDO 8A4<> 35B4<> 59D8>
JTAG_ASIC_TDI 8A4<> 28C6< 34B7< 59D8>
JTAG_ASIC_TCK 8A4<> 34B7< 35C4< 59D8>
JAZ 43B6<
IPWRGD 46A8< 47A6<>
IO_RESET_L 32A6< 35B8< 44B8<> 44D3< 59A8>
INV_CUR_HI_FILT 29A5<> 59A8>
INV_CUR_HI 23D7< 29B8<
INT_WATCHDOG_L 28A5> 44C5<>
INT_TST_PLLEN_PD 28C6< 34B7<
INT_TST_MONIN_PD 34B7< 34C1<
INT_TMDS_3V 24C3<> 52A6> 59C8>
INT_SUSPEND_REQ_L 9B3< 44B8<>
INT_SUSPEND_ACK_L 9B3> 44B5<>
INT_SPKR- 42A6<> 43D8<
INT_SPKR+ 42A6<> 43D8<
INT_SND_TO_AUDIO 28B3<>
INT_SND_SYNC 28B3<>
INT_SND_SCLK 28A3<>
INT_SND_CLKOUT 28A3<>
INT_ROM_RW_L 30C5<>
INT_ROM_OVERLAY_PU 16D7< 30A7< 30C5<> 54A7<
INT_ROM_OE_L 30C5<>
INT_ROM_CS_L 30C5<>
INT_RESET_L 34C3< 35B8< 41A7< 43C7< 44D2<>
INT_REF_CLK_IN_PD 28A6< 53A6<
INT_PU_RESET_L 15B3< 34C3< 44C2<> 44C2<>
INT_PROC_SLEEP_REQ_L 28A5< 44B4<>
INT_PLL9_GND 28A4<> 28D4<
INT_PLL7_GND 28A4<> 28D4<
INT_PLL6_GND 9A2<> 9D3<
INT_PLL5_GND 16A5<> 16D5<
INT_PLL4_GND 30C4<> 30D4<
INT_PLL3_GND 28A4<> 28D4<
INT_PLL2_GND 28A5<> 28D4<
INT_PLL1_GND 28A5<> 28C4<
INT_PEND_PROC_INT 28A5> 44B4<>
INT_PCI_FB_OUT 30C5<> 54D7<
INT_PCI_FB_IN 30C5< 54C7<
INT_MOD_SYNC 28A3<> 28A8< 28C6<
INT_MOD_DTO 28A3> 28A8< 28C6<
INT_MOD_DTI 28A3< 28A8< 28C6<
INT_MOD_CLKOUT 28A3> 28A8< 28C6<
INT_MOD_BITCLK 28A3<> 28A8< 28C6<
INT_MEM_VREF 12A8<> 14A1<
INT_MEM_REF 12B6<
INT_JTAG_TEI 34B7< 34C1<
59A8>
INT_I2C_DATA2 28A3<> 28D1< 29C7<> 34B5< 39B1<>
INT_I2C_DATA1 34A3<> 34B1<
INT_I2C_DATA0R 34B5<> 34C1<
INT_I2C_DATA0 14A6<> 15A6< 34B3<
59A8>
INT_I2C_CLK2 28A3<> 28D1< 29C7<> 34B5< 39B1<>
INT_I2C_CLK1 34A3<> 34B1<
INT_I2C_CLK0R 34B5<> 34C1<
INT_I2C_CLK0 14A6<> 15A6< 34B3<
INT_GPIO12_PU 28A8< 28B5<>
INT_GPIO9_PU 28B5<> 28B8<
INT_GPIO1_PD 28A8< 28C5<>
INT_EXTINT17_PU 28B5<> 28B8< 32B6>
INT_EXTINT13_PU 28B5<> 28B8<
INT_EXTINT12_PU 28B5<> 28B8<
INT_EXTINT3_PU 28B5<> 28B8<
INT_ENET_RST_L 28B5<> 28D1< 35B8<
INT_CPU_FB_OUT 9B3<> 56C3>
INT_CPU_FB_IN 9B3< 56C3>
INT_CLOCK_OUT 8B2<> 56B3>
INT_ANALYZER_CLKA 9B3<>
INT_ANALYZER_CLK 8A2< 9B4< 16C7< 54A7< 56B3> 59A8>
INT_AGP_VREF 16A7< 16C6<> 52C3>
INT_AGP_FB_OUT 16C6<> 54A7<
INT_AGP_FB_IN 16C6< 54A7<
INT_AGPPVT 16C6<>
INTREP_DLT 47B5<>
INTREPID_VSENSE 47C6<> 59C8>
INTREPID_VPWRA 47B4<>
INTREPID_VPWR 47B6<>
INTREPID_ACS_REF 9A3<
INTCORE_VCC 47C7<
INTCORE_OVP 47B6<>
INTCORE_OCSET 47B6<>
INTCORE_GND 47A7<>
INTCORE_DL 47B6<>
INTCORE_DHT 47B5<>
INTCORE_DH 47B6<>
INTCORE_BSTH_TERM 47B6<>
INTCORE_BSTH 47B6<>
INTCORE_1 47B3<
IIC_ADD 29C6<> 59A8>
IFP_VADJ 23A8<
IFP_AVCC 23A7<>
IFP0VREF 23B4<> 52A6>
IFP0RSET 23B4<>
IFP0PLLVDD 23B4<
IFP0AVCC 23A6< 23C1< 52A6>
ICW 47B7<
ICORE_COMP 47B6<
HSYNC* 22C5<> 57D5>
HP_TR 41C3<
HP_TP 41B3<
HP_TL 41D3<
41D4< 41D7<
HP_STAR_GND 39B7<> 41A8< 41B4< 41B8< 41C5<
HP_OUT_R 41D5<>
HP_OUT_L 41D5<>
HP_OFF 41A7< 41D5<
HPIN_R 41D6<
HPIN_L 41D6<
HPGAL_R 41C4<
HPGAL_L 41D4<
HPBYP 41B5< 41D6<
HP16_R 41C4<
HP16_L 41D4<
HONK_ADJ 51B4<>
HEADPHONE_R 41B2<> 41C2<
HEADPHONE_L 41B2<> 41D2<
HEADPHONE_COM 41B2<>
HD_UIDE_CS3FX_L 38C2<> 58B5>
HD_UIDE_CS1FX_L 38C3<> 58B5>
HD_UIDE_ADDR<2> 38C2<>
HD_UIDE_ADDR<1> 38C3<>
HD_UIDE_ADDR<0..2> 58C5>
HD_UIDE_ADDR<0> 38C3<>
HD_RESET_L 37D1< 38C3<> 58C5>
HD_IOCHRDY 37C1< 38C3<> 58C5>
HD_INTRQ 38C3<> 58C5>
HD_DMARQ 38C3<> 58C5>
HD_DMACK_L 37D1< 38C3<> 58C5>
HD_DIOW_L 37C1< 38C3<> 58C5>
HD_DIOR_L 37D1< 38C3<> 58C5>
GRAPH_IIC_SDA2 23D3<>
GRAPH_IIC_SCL2 23D3<>
GRAPH_DDC_SDA 22D5<> 24A7<
GRAPH_DDC_SCL 22D5<> 24A7<
GRAPH_CORE 17D4< 23C7<> 48C2<> 52A6>
GRAPHICS_VPWR 48B5<>
GPWRGD 47B8< 48A5<>
GPU_XTALSSIN 22A5< 22B2< 52A8>
GPU_XTALOUTBUFF 22A8< 22B4<>
GPU_TMODE 17A5< 52A8>
GPU_TMDS_D2P 23C2< 23D3<> 57D2>
GPU_TMDS_D2M 23C2< 23D3<> 57D2>
GPU_TMDS_D1P 23C2< 23D3<> 57D2>
GPU_TMDS_D1M 23C2< 23D3<> 57D2>
GPU_TMDS_D0P 23C2< 23D3<> 57D2>
GPU_TMDS_D0M 23C2< 23D3<> 57D2>
GPU_TMDS_CKP 23C2< 23D3<> 57D2>
GPU_TMDS_CKM 23C2< 23D3<> 57D2>
GPU_TESTMECLK 23C4<>
GPU_SWAP_B 23C4<>
GPU_SWAP_A 23C4<>
GPU_STRAP<3> 22B4<> 26D3<
GPU_STRAP<2> 22B4<> 26D3<
GPU_STRAP<1> 22B4<> 26B3<
GPU_STRAP<0> 22B4<> 26A4<
GPU_STEREO 23C4<>
GPU_SS_XIN 22A7<
GPU_MBDET_L 17A6<>
GPU_IFP1PLLVDD 23B3<
GPU_IFB1IOVDD 23B3<
GPU_FW_PME_L 23C4<>
GPU_FPBCLK_L 23C4<>
GPU_FPBCLK 23C4<>
GPU_FB_VREF 18C8< 52A6>
GPU_AGP_WBF_L 17B6<>
GPU_AGP_VREF_Y 17A2<
GPU_AGP_VREF_X 17A2<
GPU_AGP_VREF_L 16A7<
GPU_AGP_VREF_H 16A7<
GPU_AGP_VREF 17A2< 17A8< 52A6>
GPU_AGP_TRDY_L 17B6<> 54B7<
GPU_AGP_STOP_L 17B6<> 54B7<
GPU_AGP_SB_STB_L 17A6<> 54A7<
GPU_AGP_SB_STB 17B6<> 54A7<
GPU_AGP_SBA<7> 17A6<>
GPU_AGP_SBA<6> 17A6<>
GPU_AGP_SBA<5> 17A6<>
GPU_AGP_SBA<4> 17A6<>
GPU_AGP_SBA<3> 17A6<>
GPU_AGP_SBA<2> 17A6<>
GPU_AGP_SBA<1> 17A6<>
GPU_AGP_SBA<0..7> 54A7<
GPU_AGP_SBA<0> 17A6<>
GPU_AGP_RBF_L 17B6<> 54A7<
GPU_AGP_PIPE_L 17B6<> 54A7<
GPU_AGP_PAR 17B6<> 54B7<
GPU_AGP_IRDY_L 17B6<> 54B7<
GPU_AGP_FRAME_L 17B6<> 54B7<
GPU_AGP_DEVSEL_L 17B6<> 54B7<
GPU_AGP_CBE<3> 17C6<>
GPU_AGP_CBE<2..3> 54B7<
GPU_AGP_CBE<2> 17C6<>
GPU_AGP_CBE<1> 17C6<>
GPU_AGP_CBE<0..1> 54B7<
GPU_AGP_CBE<0> 17C6<>
GPU_AGP_AD<31> 17C6<>
GPU_AGP_AD<30> 17C6<>
GPU_AGP_AD<29> 17C6<>
GPU_AGP_AD<28> 17C6<>
GPU_AGP_AD<27> 17C6<>
GPU_AGP_AD<26> 17C6<>
GPU_AGP_AD<25> 17C6<>
GPU_AGP_AD<24> 17C6<>
GPU_AGP_AD<23> 17C6<>
GPU_AGP_AD<22> 17C6<>
GPU_AGP_AD<21> 17C6<>
GPU_AGP_AD<20> 17C6<>
GPU_AGP_AD<19> 17C6<>
GPU_AGP_AD<18> 17C6<>
GPU_AGP_AD<17> 17C6<>
GPU_AGP_AD<16..31> 54B7<
GPU_AGP_AD<16> 17C6<>
GPU_AGP_AD<15> 17C6<>
GPU_AGP_AD<14> 17D6<>
GPU_AGP_AD<13> 17D6<>
GPU_AGP_AD<12> 17D6<>
GPU_AGP_AD<11> 17D6<>
GPU_AGP_AD<10> 17D6<>
GPU_AGP_AD<9> 17D6<>
GPU_AGP_AD<8> 17D6<>
GPU_AGP_AD<7> 17D7<>
GPU_AGP_AD<6> 17D7<>
GPU_AGP_AD<5> 17D7<>
GPU_AGP_AD<4> 17D7<>
GPU_AGP_AD<3> 17D6<>
GPU_AGP_AD<2> 17D6<>
GPU_AGP_AD<1> 17D6<>
GPU_AGP_AD<0..15> 54B7<
GPU_AGP_AD<0> 17D6<>
GPU_50PULLUP 17B5<> 52A8>
GPU_50PULLDWN 17A5<> 52A8>
GPULNKON 23C4<>
GCORE_VSENSE 48B6<> 48C4<>
GCORE_VCC 48C6<
GCORE_OVP 48B6<>
GCORE_OCSET 48B6<>
GCORE_GND 48B5<>
GCORE_DL 48B5<>
GCORE_DH 48B5<>
GCORE_COMP 48B6<
GCORE_BSTH_TERM 48C3<>
GCORE_BSTH 48C5<>
GCORE_1 48C2<
FW_XO 36C6<> 57A5>
FW_XI_A 36C6<
FW_XI 36C6< 57A5>
FW_VREG_FB 36D7<
FW_VP_2 36D4< 52B6>
FW_VP_1 36D4< 52B6>
FW_VP2 36C1<> 36D3<> 52B6>
FW_VP1 36D1<> 36D3<> 52B6>
FW_VP 36D5< 52B6>
FW_VGND 52B6>
FW_TPO2P 36A8<> 36C1<> 57A5>
FW_TPO2N 36A8<> 36C1<> 57A5>
FW_TPO1P 36B8<> 36D1<> 57A5>
FW_TPO1N 36A8<> 36D1<> 57A5>
FW_TPI2P 36A8<> 36C1<> 57A5>
FW_TPI2N 36A8<> 36C1<> 57A5>
FW_TPI1P 36A8<> 36D1<> 57A5>
FW_TPI1N 36A8<> 36D1<> 57A5>
FW_TPB2P 36C5<> 57A5>
FW_TPB2N 36C5<> 57A5>
FW_TPB2 36B4<
FW_TPB1P 36C5<> 57A5>
FW_TPB1N 36C5<> 57A5>
FW_TPB1 36B3<
FW_TPA2P 36C5<> 57A5>
FW_TPA2N 36C5<> 57A5>
FW_TPA1P 36C5<> 57A5>
FW_TPA1N 36C5<> 57A5>
FW_SCLK 34C5<> 36C8< 57A5>
FW_R1 36C5<>
FW_R0 36C5<>
FW_PWR_SW 36D6< 51D2<> 52B6>
FW_PWR 29B3< 36D6< 50C6<> 51D4<> 52B6>
FW_PINT 34B5<> 34C1<
FW_PHY_SCLK 36C7<> 57A5>
FW_PHY_RST* 36C6<
FW_PHY_RST 36C8<
FW_PHY_ISO* 36C6<
FW_PHY_D<7> 36B7<>
FW_PHY_D<6> 36B7<>
FW_PHY_D<5> 36B7<>
FW_PHY_D<4> 36B7<>
FW_PHY_D<3> 36B7<>
FW_PHY_D<2> 36B7<>
FW_PHY_D<1> 36C7<>
FW_PHY_D<0..7> 57A5>
FW_PHY_D<0> 36C7<>
FW_PHY_CNTL1 36C7<> 57A5>
FW_PHY_CNTL0 36C7<> 57A5>
FW_PHY_3_3 36B5< 36B7< 36D7< 36D7< 52B6>
FW_LREQ 34C3< 36C8< 57A5>
FW_LPS 34C4<> 36C8<
FW_LINK_LREQ 34C4<> 57A5>
FW_LINK_DATA<7> 34C4<>
FW_LINK_DATA<6> 34C4<>
FW_LINK_DATA<5> 34C4<>
FW_LINK_DATA<4> 34C4<>
FW_LINK_DATA<3> 34C4<>
FW_LINK_DATA<2> 34C4<>
FW_LINK_DATA<1> 34C4<>
FW_LINK_DATA<0..7> 57A5>
FW_LINK_DATA<0> 34C4<>
FW_LINK_CNTL<1> 34C4<>
FW_LINK_CNTL<0..1> 57A5>
FW_LINK_CNTL<0> 34C4<>
FW_DIO_V 36B6< 52B6>
FW_DIODE_BYPASS_V 36B6<> 36B7<> 52B6>
FW_D<7> 34C3< 36B8<
FW_D<6> 34C3< 36B8<
FW_D<5> 34C3< 36B8<
FW_D<4> 34C3< 36B8<
FW_D<3> 34C3< 36B8<
FW_D<2> 34C3< 36B8<
FW_D<1> 34C3< 36C8<
FW_D<0..7> 57A5>
FW_D<0> 34C3< 36C8<
FW_C_LKON 28B6< 34C5<> 36B5<>
FW_CPS 36C6<
FW_CNTL1 34C3< 36C8< 57A5>
FW_CNTL0 34C3< 36C8< 57A5>
FW_BIAS2 36C5<> 57A5>
FW_BIAS1 36C5<> 57A5>
FWPHYRST 28C5<> 36C8<
FPD_PWR_ON_T 51B3<
FPD_PWR_ON 23D7<> 51B3<
FLO_KNOWS_BEST 45C7<> 45C8<> 59D6>
FLOW_SS 45C6< 45C7< 45D8<
FILT_ANALOG_RED 25C5< 57D5> 59B8>
FILT_ANALOG_GRN 25C5< 57D5> 59B8>
FILT_ANALOG_BLU 25C5< 57D5> 59B8>
FDX 35A5< 35C4<
FB_DLLVDD 18C6< 18D7<
FBDQSTERM<15> 19A4<
FBDQSTERM<14> 19A4<
FBDQSTERM<13> 19A4<
FBDQSTERM<12> 19A4<
FBDQSTERM<11> 19A4<
FBDQSTERM<10> 19A4<
FBDQSTERM<9> 19A4<
FBDQSTERM<8..15> 55B3>
FBDQSTERM<8> 19A4<
FBDQSTERM<7> 19A7<
FBDQSTERM<6> 19A7<
FBDQSTERM<5> 19A7<
FBDQSTERM<4> 19A7<
FBDQSTERM<3> 19A7<
FBDQSTERM<2> 19A7<
FBDQSTERM<1> 19A7<
FBDQSTERM<0..7> 55C3>
FBDQSTERM<0> 19A7<
FBDQS<15> 18D4<> 19A5<
FBDQS<14> 18D4<> 19A5<
FBDQS<13> 18D4<> 19A5<
FBDQS<12> 18D4<> 19A5<
FBDQS<11> 18D4<> 19A5<
FBDQS<10> 18D4<> 19A5<
FBDQS<9> 18D4<> 19A5<
FBDQS<8..15> 55B3>
FBDQS<8> 18D4<> 19A5<
FBDQS<7> 18C7<> 19A8<
FBDQS<6> 18C7<> 19A8<
FBDQS<5> 18C7<> 19A8<
FBDQS<4> 18C7<> 19A8<
FBDQS<3> 18C7<> 19A8<
FBDQS<2> 18C7<> 19A8<
FBDQS<1> 18C7<> 19A8<
FBDQS<0..7> 55C3>
FBDQS<0> 18C7<> 19A8<
FBDQM<15> 18C3< 18D5>
FBDQM<14> 18C3< 18D5>
FBDQM<13> 18D3< 18D5>
FBDQM<12> 18D3< 18D5>
FBDQM<11> 18D3< 18D5>
FBDQM<10> 18D3< 18D5>
FBDQM<9> 18D3< 18D5>
FBDQM<8..15> 55C3>
FBDQM<8> 18D3< 18D5>
FBDQM<7> 18D8> 18G3<
FBDQM<6> 18D8> 18G3<
FBDQM<5> 18D8> 18G3<
FBDQM<4> 18D8> 18G3<
FBDQM<3> 18D8> 18G3<
FBDQM<2> 18D8> 18G3<
FBDQM<1> 18D8> 18G3<
FBDQM<0..7> 55D3>
FBDQM<0> 18D8> 18G3<
FBD<127> 18E5<> 19B5<
FBD<126> 18E5<> 19B5<
FBD<125> 18E5<> 19B5<
FBD<124> 18E5<> 19B5<
FBD<123> 18E5<> 19B5<
FBD<122> 18E5<> 19B5<
FBD<121> 18E5<> 19B5<
FBD<120> 18E5<> 19B5<
FBD<119> 18E5<> 19B5<
FBD<118> 18E5<> 19B5<
FBD<117> 18E5<> 19B5<
FBD<116> 18E5<> 19B5<
FBD<115> 18E5<> 19B5<
FBD<114> 18E5<> 19B5<
FBD<113> 18E5<> 19B5<
FBD<112> 18E5<> 19B5<
FBD<111> 18E5<> 19B5<
FBD<110> 18E5<> 19B5<
FBD<109> 18E5<> 19B5<
FBD<108> 18F5<> 19B5<
FBD<107> 18F5<> 19B5<
FBD<106> 18F5<> 19B5<
FBD<105> 18F5<> 19C5<
FBD<104> 18F5<> 19C5<
FBD<103> 18F5<> 19C5<
FBD<102> 18F5<> 19C5<
FBD<101> 18F5<> 19C5<
FBD<100> 18F5<> 19C5<
FBD<99> 18F5<> 19C5<
FBD<98> 18F5<> 19C5<
FBD<97> 18F5<> 19C5<
FBD<96> 18F5<> 19C5<
FBD<95> 18F5<> 19B8<
FBD<94> 18F5<> 19B8<
FBD<93> 18F5<> 19B8<
FBD<92> 18F5<> 19B8<
FBD<91> 18F5<> 19B8<
FBD<90> 18F5<> 19B8<
FBD<89> 18F5<> 19B8<
FBD<88> 18G5<> 19B8<
FBD<87> 18G5<> 19B8<
FBD<86> 18G5<> 19B8<
FBD<85> 18G5<> 19B8<
FBD<84> 18G5<> 19B8<
FBD<83> 18G5<> 19B8<
FBD<82> 18G5<> 19B8<
FBD<81> 18G5<> 19B8<
FBD<80> 18G5<> 19B8<
FBD<79> 18G5<> 19B8<
FBD<78> 18G5<> 19B8<
FBD<77> 18G5<> 19B8<
FBD<76> 18G5<> 19B8<
FBD<75> 18G5<> 19B8<
FBD<74> 18G5<> 19B8<
FBD<73> 18G5<> 19C8<
FBD<72> 18G5<> 19C8<
FBD<71> 18G5<> 19C8<
FBD<70> 18G5<> 19C8<
FBD<69> 18G5<> 19C8<
FBD<68> 18G5<> 19C8<
FBD<67> 18G5<> 19C8<
FBD<66> 18G5<> 19C8<
FBD<65> 18G5<> 19C8<
FBD<64..127> 55C3>
FBD<64> 18G5<> 19C8<
FBD<63> 18E8<> 19C5<
FBD<62> 18E8<> 19C5<
FBD<61> 18E8<> 19C5<
FBD<60> 18E8<> 19C5<
FBD<59> 18E8<> 19C5<
FBD<58> 18E8<> 19C5<
FBD<57> 18E8<> 19C5<
FBD<56> 18E8<> 19C5<
FBD<55> 18E8<> 19C5<
FBD<54> 18E8<> 19C5<
FBD<53> 18E8<> 19C5<
FBD<52> 18E8<> 19C5<
FBD<51> 18E8<> 19C5<
61
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
RAM_ADDR<5> 12C1< 14B6<> 15C6<
RAM_ADDR<4> 12D3< 14B4<> 15C6<
RAM_ADDR<3> 12D3< 14B6<> 15C4>
RAM_ADDR<2> 12C3< 14B4<> 15C6<
RAM_ADDR<1> 12C3< 14B6<> 15B6<
RAM_ADDR<0..12> 53D6<
RAM_ADDR<0> 12C3< 14B4<> 15B6<
R264P2 39B4<
QT2P3 48B4<>
QT2P1 48B4<>
QT1P1 48A4<>
Q42P4 51D3<>
Q25_1 41A5<
Q2_GATE 42D7<
Q1P3 51D3<
Q1P1 51C3<
PWR_UP* 50D7<>
59D6>
PWR_UP 39C8< 42D8< 50C3< 50C8< 51C6<
PWR_SWITCH* 8A8<> 44B1< 44C5<> 59D6> 59D6>
PWR_LED 51A4<
PWR_FAIL_T 50D6<>
PWR_FAILPMU* 44B4<>
PWR_FAIL* 44B1<> 50D5<
PSEUDO_STAR_GND 39B7<> 40B4<
PROBE_DIV 41B4< 41D7<
PRESPK_ROUTP 42C3<
PRESPK_ROUTN 42C3<
PRESPK_LOUTP 42C7<
PRESPK_LOUTN 42C7<
POWER_UP* 44C7<> 51A8< 59D6>
POWERUP_OK 44B4<>
PMU_XT 44A6< 58A5>
PMU_XO 44B5< 58A5>
PMU_XI 44B5< 58A5>
PMU_TO_INT 28C3<> 44C4<>
PMU_STRAP1 44C5<>
PMU_SMB_SDA 44A3<>
PMU_SMB_SCK 44A3<>
PMU_RST* 8A8<> 29B3<> 44A5<> 44B5<> 59D6>
PMU_REQ_L 28A8< 28C3> 44C2<
PMU_PWR_LED* 44C5<>
PMU_PRE_PLLSTOP 44B5<>
52B3>
PMU_POWER 29C3<> 44A5<> 44B1< 44C2< 44D5<>
PMU_PME_LL 31C2<>
PMU_PME_L 28B5<> 31C2< 32A8< 44B2<> 59A6>
PMU_P64 29B2<> 44C2<>
PMU_NMI 44B4<>
PMU_LOW_DSKTP 44B5<>
PMU_INT_NMI 28A8< 28B5<> 44C4<>
PMU_INT_L 28B5<> 28B8< 44B5<>
PMU_IIC_DAT 44A8< 44B4<>
PMU_IIC_CLK 44A8< 44B4<>
PMU_FROM_INT 28C3<> 44C4<>
PMU_EPM* 29B3<> 44C4<>
PMU_CNVSS 29B3<> 44B5<
PMU_CLKT 44B2<> 58A5>
PMU_CLKOUT 44B4<> 58A5>
PMU_CLKIN 44B4<> 58A5>
PMU_CLK 28C3<> 44C4<>
PMU_BYTE 44B5<
PMU_AVCC 44B5< 44D4<> 52B3> 59C6>
PMU_AP 29B3<> 44D4<>
PMU_AGP_RESET 44C4<>
PMU_ACK_L 28C3< 44C4<>
PMU_5V_SDA 44C3<>
PMU_5V_SCL 44C3<>
PMURESETBUTTON* 44A4< 44A4< 59D6>
PG_E 45B6<
PGOOD 49B7< 49B7< 50A6>
59A6>
PCI_TRDY_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
59A6>
PCI_STOP_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
PCI_SLOTD_REQ_L 30B7< 30D5<> 32B6>
PCI_SLOTD_PERR_L 32B6<>
PCI_SLOTD_GNT_L 30B5< 30D5<> 32B6<
PCI_SLOTC_REQ_L 30B7< 30D5<>
PCI_SLOTC_GNT_L 30B5< 30D5<>
PCI_SLOTB_REQ_L 30B7< 30D5<> 31C3<> 59A6>
PCI_SLOTB_GNT_L 30B5< 30D5<> 31C2<> 59A6>
PCI_PAR 30C5<> 31B7< 32B6<> 54D7< 59A6>
PCI_IRDY_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
59A6>
PCI_FRAME_L 30B7< 30C5<> 31B7< 32B6<> 53A6<
PCI_FB_PLUS6 30C7< 54C7<
PCI_FB_PLUS4 30C8< 54C7<
PCI_FBO_PLUS2 30D8< 54D7<
PCI_FBI_PLUS2 30C8< 54C7<
PCI_FBI_EQUAL 30C7< 54C7<
59A6>
PCI_DEVSEL_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
PCI_CBE<3> 30C5<> 31B7< 32B6<>
PCI_CBE<2> 30C5<> 31B7< 32B6<>
PCI_CBE<1> 30C5<> 31B7< 32B6<>
PCI_CBE<3..0> 53A6<
PCI_CBE<0> 30C5<> 31B7< 32B6<> 59A6>
PCI_AD<31> 30C1<> 30C4<> 31B7< 32B6<>
PCI_AD<30> 30C1<> 30C4<> 31B6< 32B6<> 59B3>
PCI_AD<29> 30C1<> 30C4<> 31B7< 32B6<>
PCI_AD<28> 30C1<> 30C4<> 31B6< 32B6<>
PCI_AD<27> 30C1<> 30C4<> 31B7< 32B7<>
PCI_AD<26> 30C1<> 30C4<> 31B6< 32B6<> 59B3>
PCI_AD<25> 30C1<> 30C4<> 31B7< 32C6<>
PCI_AD<24> 30C1<> 30C4<> 31B6< 32C6<> 59B3>
PCI_AD<23> 30C4<> 31C7< 32C6<>
PCI_AD<22> 30C4<> 31C6< 32C6<> 59B3>
PCI_AD<21> 30C4<> 31C7< 32C6<>
PCI_AD<20> 30B2< 30C4<> 31C6< 32C6<> 59B3>
PCI_AD<19> 30B2< 30C4<> 31C6< 32C6<>
PCI_AD<18> 30B2< 30C4<> 31C7< 32C6<> 59B3>
PCI_AD<17> 30B2< 30C4<> 31C6< 32C6<>
PCI_AD<16> 30B2< 30C4<> 31C7< 32C6<> 59B3>
PCI_AD<15> 30B2< 30C4<> 31C7< 32C6<> 59B3>
PCI_AD<14> 30B2< 30C4<> 31C7< 32C6<>
PCI_AD<13> 30B2< 30C4<> 31C7< 32C6<> 59C3>
PCI_AD<12> 30B2< 30C4<> 31C7< 32C6<>
PCI_AD<11> 30B2< 30C4<> 31C7< 32C6<> 59C3>
PCI_AD<10> 30C2< 30C4<> 31C7< 32C6<>
PCI_AD<9> 30C2< 30D4<> 31C7< 32C6<> 59C3>
PCI_AD<8> 30C2< 30D4<> 31C7< 32C6<>
PCI_AD<7> 30C2< 30D4<> 31C7< 32C6<>
PCI_AD<6> 30C2< 30D4<> 31C7< 32C6<> 59C3>
PCI_AD<5> 30C2< 30D4<> 31C7< 32C6<>
PCI_AD<4> 30C2< 30D4<> 31C7< 32C6<> 59C3>
PCI_AD<3> 30C2< 30D4<> 31C7< 32C6<>
PCI_AD<2> 30C2< 30D4<> 31C7< 32C6<>
PCI_AD<1> 30C2< 30D4<> 31C7< 32C6<>
PCI_AD<31..0> 53A6<
PCI_AD<0> 30C2< 30D4<> 31C7< 32C6<> 59C3>
PCIT_TRDY_L 31B6< 31C2<> 54C7<
PCIT_STOP_L 31B6< 31C2<> 54C7<
PCIT_PAR 31B6< 31C2<> 54C7<
PCIT_IRDY_L 31B6< 31C3<> 54C7< 59B6>
PCIT_FRAME_L 31B6< 31C2<> 54C7<
PCIT_DEVSEL_L 31B6< 31C2<> 54C7<
PCIT_CBE<3> 31B6< 31C3<> 59A6>
PCIT_CBE<2> 31B6< 31C3<> 59A6>
PCIT_CBE<1> 31B6< 31C3<> 59A6>
PCIT_CBE<31..0> 54C7<
PCIT_CBE<0> 31B2<> 31B6<
PCIT_AD<31> 31B6< 31C3<> 59B3>
PCIT_AD<30> 31B7< 31C2<>
PCIT_AD<29> 31B6< 31C3<> 59B3>
PCIT_AD<28> 31B7< 31C2<> 59B3>
PCIT_AD<27> 31B6< 31C3<> 59B3>
PCIT_AD<26> 31B7< 31C2<>
PCIT_AD<25> 31B6< 31C3<> 59B3>
PCIT_AD<24> 31B7< 31C2<>
PCIT_AD<23> 31C3<> 31C6< 59B3>
PCIT_AD<22> 31C2<> 31C7<
PCIT_AD<21> 31C3<> 31C6< 59B3>
PCIT_AD<20> 31C2<> 31C7<
PCIT_AD<19> 31C3<> 31C7< 59B3>
PCIT_AD<18> 31C2<> 31C6<
PCIT_AD<17> 31C3<> 31C7< 59B3>
PCIT_AD<16> 31C2<> 31C6<
PCIT_AD<15> 31C2<> 31C6<
PCIT_AD<14> 31C3<> 31C6< 59B3>
PCIT_AD<13> 31B2<> 31C6<
PCIT_AD<12> 31B3<> 31C6< 59C3>
PCIT_AD<11> 31B2<> 31C6<
PCIT_AD<10> 31B3<> 31C6< 59C3>
PCIT_AD<9> 31B2<> 31C6<
PCIT_AD<8> 31B3<> 31C6< 59C3>
PCIT_AD<7> 31B3<> 31C6< 59C3>
PCIT_AD<6> 31B2<> 31C6<
PCIT_AD<5> 31B3<> 31C6< 59C3>
PCIT_AD<4> 31B2<> 31C6<
PCIT_AD<3> 31B3<> 31C6< 59C3>
PCIT_AD<2> 31B2<> 31C6< 59C3>
PCIT_AD<1> 31B3<> 31C6< 59C3>
PCIT_AD<31..0> 54C7<
PCIT_AD<0> 31B2<> 31C6<
PB_GAL 41B4<
PB_AUD 41B4<
OVDD_ADJ 59C8>
OUT_R 59B6>
OPA_VREF 40B3< 43A4<>
OPA_STAR_GND 39A7<> 39D6< 40C2< 43A3<
OGND3_JTAG_EN 35A5<>
OGAR 41C7<
OGAL 41D7<
NV_RED2 22C1<> 22C1<>
NV_PCI_RST_L 17C7<
NV_GREEN2 22C1<> 22C1<>
NV_GPIOD9 23C4<>
NV_GPIOD8 22A6< 23D5<>
NV_GPIOD7 22A8< 23D5<>
NV_GPIOD5 23D4<>
NV_GPIOD2 23D4<>
NV_GPIOD0 23D4<>
NV_BLUE2 22C1<> 22C1<>
NVPLLVDD 22D5< 52A6>
NVAGP_TRST_L 17A5<>
NVAGP_TMS 17A5<>
NVAGP_TDI 17A5<>
NVAGP_TCLK 17A5<>
NV11_XTALOUT 22B4<> 57D5>
NV11_XTALIN 22B4<> 57D5>
NV11_VSYNC 22C4<> 26D3<
NV11_HSYNC 22C4<> 26D3<
NMI_BUTTON* 29B2<> 44C4<> 59D6>
NET40 44B4<>
NET32_B 42A5<>
NET32 42A5<
NET24 44D8<>
NET22 44D8<>
NET19 44D6<>
NET18 44D6<>
NEC_XT2_B 32D3<
NEC_AVDD 32D5< 52A3>
NC_XTLINO 39B4<
NC_WL<23> 31B3<>
NC_WL<21> 31B3<>
NC_WL<20> 31B2<>
NC_WL<19> 31B3<>
NC_WL<18> 31B2<>
NC_WL<17> 31B3<>
NC_WL<16> 31B2<>
NC_WL<15> 31B3<>
NC_WL<14> 31B2<>
NC_WL<13> 31B3<>
NC_WL<12> 31B2<>
NC_WL<11> 31B3<>
NC_WL<10> 31B2<>
NC_WL<9> 31B3<>
NC_WL<8> 31B2<>
NC_WL<7> 31B3<>
NC_WL<6> 31B2<>
NC_WL<5> 31B3<>
NC_WL<4> 31B2<>
NC_WL<3> 31B3<>
NC_WL<2> 31B2<>
NC_WL<1> 31B3<>
NC_VTT<11> 18F7<
NC_VTT<10> 18F7<
NC_VTT<9> 18F7<
NC_VTT<8> 18G7<
NC_VTT<7> 18G7<
NC_VTT<6> 18G7<
NC_VTT<5> 18G7<
NC_VTT<4> 18G7<
NC_VTT<3> 18G7<
NC_VTT<2> 18G7<
NC_VTT<1> 18G7<
NC_VTT<0> 18G7<
NC_VR4 39D6<
NC_VIPHCLK 22D5>
NC_VCORE10 45D6<
NC_UT165 44D7<>
NC_UT164 44D7<>
NC_UT6P7 28D8<>
NC_UT6P6 28D8<>
NC_USB_P 31B2<>
NC_USB_M 31B2<>
NC_USB2_TEST 32A4<
NC_USB2_TEB 32A4<
NC_USB2_SRMOD 32A4<
NC_USB2_SRDTA 32A4<>
NC_USB2_SRCLK 32A4>
NC_USB2_SMI_L 32A6>
NC_USB2_SMC 32A4<
NC_USB2_RSDFP 32B4>
NC_USB2_RSDFM 32C4>
NC_USB2_RSDEP 32C4>
NC_USB2_RSDEM 32C4>
NC_USB2_PPON5 32B4>
NC_USB2_PPON4 32B4>
NC_USB2_PPON3 32B4>
NC_USB2_PPON2 32B4>
NC_USB2_PPON1 32B4>
NC_USB2_NTEST1 32A4<
NC_USB2_NANDTEST 32A4<
NC_USB2_AMC 32A4<
NC_UB3P4 35D5<>
NC_TX1_4 35C2<
NC_TX1_3 35C2<
NC_TX1_2 35C3<
NC_TX1_1 35C3<
NC_TMDS_TXD7P 23C3>
NC_TMDS_TXD7M 23C3>
NC_TMDS_TXD3P 23C3>
NC_TMDS_TXD3M 23C3>
NC_TESTMODE 8A4<>
NC_TAS_SDOUT1 39C2>
NC_SYSCLK_DDRCLK_A2_L 12B4<
NC_SYSCLK_DDRCLK_A2 12B4<
NC_SW3V5V_33OUT 50C6<
NC_SODIMM202 14A6<>
NC_SODIMM201 14D5<>
NC_SODIMM200 14A4<>
NC_SODIMM199 14A5<>
NC_SODIMM124 14B4<>
NC_SODIMM123 14B5<>
NC_SODIMM98 14B4<>
NC_SODIMM97 14B5<>
NC_SODIMM91 14C5<>
NC_SODIMM89 14C5<>
NC_SODIMM86 14C4<>
NC_SODIMM85 14C5<>
NC_SODIMM84 14C4<>
NC_SODIMM83 14C5<>
NC_SODIMM80 14C4<>
NC_SODIMM79 14C5<>
NC_SODIMM78 14C4<>
NC_SODIMM77 14C5<>
NC_SODIMM74 14C4<>
NC_SODIMM73 14C5<>
NC_SODIMM72 14C4<>
NC_SODIMM71 14C5<>
NC_SDOUT2 39C2>
NC_RPT77P6 28B8<
NC_RPT48P1 28D3<
NC_RP3324_2 28C1<
NC_RP3319 28D3<
NC_RP2848 28A8<
NC_RP1399 30B5<
NC_RP1PIN4 16B3<
NC_ROMCS_L 18C8>
NC_RF_DISABLE_L 59A6>
NC_RFBBA<12> 18A2<
NC_RFBA<12> 18E2<
NC_RESET_BUTTON_L 8A8<>
NC_PPL* 44C6<
NC_PMU_DL_12 29B2<>
NC_PMU_DL_10 29B2<>
NC_PMON_OUT_L 4B3>
NC_PCITR1 31B6<
NC_PCITR0 31B6<
NC_PCIR1 31B7<
NC_PCIR0 31B7<
NC_P103_AN3 44B4<>
NC_P96_ANEX0_CLK4 44B4<>
NC_P93_DA0_TB3IN 44B4<>
NC_P92_TB2IN_SOUT3 44B4<>
NC_P77_TA3IN 44C4<>
NC_P76_TA3OUT 44C4<>
NC_P75_TA2IN_W 44C4<>
NC_P74_TA2OUT_W 44C4<>
NC_P45_CS1_L 44B5<>
NC_P43_A19 44B5<>
NC_P37_A15 44B5<>
NC_P36_A14 44B5<>
NC_P35_A13 44B5<>
NC_P34_A12 44B5<>
NC_P33_A11 44B5<>
NC_P27_A7_D7_D6 44C5<>
NC_P26_A6_D6_D5 44C5<>
NC_P25_A5_D5_D4 44C5<>
NC_P24_A4_D4_D3 44C5<>
NC_P23_A3_D3_D2 44C5<>
NC_P22_A2_D2_D1 44C5<>
NC_P21_A1_D1_D0 44C5<>
NC_P20_A0_D0 44C5<>
NC_P14_D12 44C5<>
NC_P11_D9 44C5<>
NC_P10_D8 44C5<>
NC_P07_D7 44C5<>
NC_P6_D6 44C5<>
NC_P05_D5 44C5<>
NC_P04_D4 44C5<>
NC_P03_D3 44C5<>
NC_P02_D2 44C5<>
NC_P01_D1 44D5<>
NC_P00_D0 44D5<>
NC_NVAGP_TDO 17A5<>
NC_MODEM_DETECT_L 29C7<>
NC_MEM_MUXSEL_L<0> 12B6<>
NC_MEM_MUXSEL_H<0> 12B6<>
NC_LCENABLE 8A4<>
NC_JTAG10 8A3<>
NC_JTAG7 8A4<>
NC_INT_TST_MONOUT_TP 34B6>
NC_INPA 39C2>
NC_IFP1VREF 23B3<>
NC_IFP1RSET 23B3<>
NC_GPU_THERMC 23C4<>
NC_GPU_THERMA 23C4<>
NC_GPU_INTB_L 17B6<>
NC_GPU_DBI_LO 17B6<>
NC_GPULPS 23C4<>
NC_GPU<4> 17A6<>
NC_GPU<3> 17A6<>
NC_GPU<2> 17A6<>
NC_GPU<1> 17A6<>
NC_GPU<0> 17A6<>
NC_FW_CNA 36B6>
NC_FMAX8 8A8<>
NC_FMAX7 8A8<>
NC_FBDQS_L<15> 18D4<>
NC_FBDQS_L<14> 18D4<>
NC_FBDQS_L<13> 18D4<>
NC_FBDQS_L<12> 18D4<>
NC_FBDQS_L<11> 18D4<>
NC_FBDQS_L<10> 18D4<>
NC_FBDQS_L<9> 18D4<>
NC_FBDQS_L<8> 18D4<>
NC_FBDQS_L<7> 18C7<>
NC_FBDQS_L<6> 18C7<>
NC_FBDQS_L<5> 18C7<>
NC_FBDQS_L<4> 18C7<>
NC_FBDQS_L<3> 18C7<>
NC_FBDQS_L<2> 18C7<>
NC_FBDQS_L<1> 18C7<>
NC_FBDQS_L<0> 18C7<>
NC_FBBCS1_L 18C4<>
NC_FBACS1_L 18C8>
NC_FB4<10> 21B1<>
NC_FB4<9> 21B1<>
NC_FB4<8> 21B2<>
NC_FB4<7> 21B2<>
NC_FB4<6> 21B2<>
NC_FB4<5> 21B2<>
NC_FB4<4> 21B2<>
NC_FB4<3> 21B2<>
NC_FB4<2> 21B2<>
NC_FB4<1> 21B2<>
NC_FB4<0> 21B2<>
NC_FB3<10> 21B5<>
NC_FB3<9> 21B5<>
NC_FB3<8> 21B6<>
NC_FB3<7> 21B6<>
NC_FB3<6> 21B6<>
NC_FB3<5> 21B6<>
NC_FB3<4> 21B6<>
NC_FB3<3> 21B6<>
NC_FB3<2> 21B6<>
NC_FB3<1> 21B6<>
NC_FB3<0> 21B6<>
NC_FB2<10> 20B1<>
NC_FB2<9> 20B1<>
NC_FB2<8> 20B2<>
NC_FB2<7> 20B2<>
NC_FB2<6> 20B2<>
NC_FB2<5> 20B2<>
NC_FB2<4> 20B2<>
NC_FB2<3> 20B2<>
NC_FB2<2> 20B2<>
NC_FB2<1> 20B2<>
NC_FB2<0> 20B2<>
NC_FB1<10> 20B5<>
NC_FB1<9> 20B5<>
NC_FB1<8> 20B6<>
NC_FB1<7> 20B6<>
NC_FB1<6> 20B6<>
NC_FB1<5> 20B6<>
NC_FB1<4> 20B6<>
NC_FB1<3> 20B6<>
NC_FB1<2> 20B6<>
NC_FB1<1> 20B6<>
NC_FB1<0> 20B6<>
NC_EXT_TMDS_D2P 23C3>
NC_EXT_TMDS_D2M 23C3>
NC_EXT_TMDS_D1P 23C3>
NC_EXT_TMDS_D1M 23C3>
NC_EXT_TMDS_D0P 23C3>
NC_EXT_TMDS_D0M 23C3>
NC_EXT_TMDS_CKP 23C3>
NC_EXT_TMDS_CKM 23C3>
NC_ENET_LINK_TXD<7> 34C6>
NC_ENET_LINK_TXD<6> 34C6>
NC_ENET_LINK_TXD<5> 34C6>
NC_ENET_LINK_TXD<4> 34C6>
NC_DFPD6 23C3>
NC_DFPD5 23C3>
NC_DFPD3 23C3>
NC_DFPD2 23C3>
NC_DFPD1 23C3>
NC_DFPD0 23C3>
NC_DFPCLK* 23C3>
NC_DFPCLK 23C3>
NC_DACC_RSET 22C4>
NC_DACC_RED 22C4>
NC_DACC_GRN 22C4>
NC_DACC_BLU 22C4>
NC_DAA_LOADOUT 29C7<>
NC_DAA_CLKOUT 29C7<>
NC_CSLOT_WE_L 37B7>
NC_CSLOT_OE_L 37B7>
NC_CSLOT_IOWR_L 37C7>
NC_CSLOT_IORD_L 37C7>
NC_CSLOT_CE2_L 37C7>
NC_CSLOT_CE1_L 37C7>
NC_CSLOT_ADDR<9> 37A7>
NC_CSLOT_ADDR<8> 37A7>
NC_CSLOT_ADDR<7> 37A7>
NC_CSLOT_ADDR<6> 37A7>
NC_CSLOT_ADDR<5> 37A7>
NC_CSLOT_ADDR<4> 37A7>
NC_CSLOT_ADDR<3> 37B7>
NC_CPU_CLKOUT 4D3>
NC_CPUDP<7> 5A4<>
NC_CPUDP<6> 5A4<>
NC_CPUDP<5> 5A4<>
NC_CPUDP<4> 5A4<>
NC_CPUDP<3> 5A4<>
NC_CPUDP<2> 5A4<>
NC_CPUDP<1> 5A4<>
NC_CPUDP<0> 5A4<>
NC_CPUCRUD<89> 5A7<>
NC_CPUCRUD<88> 5A7<>
NC_CPUCRUD<87> 5A7<>
NC_CPUCRUD<86> 5A7<>
NC_CPUCRUD<85> 5A7<>
NC_CPUCRUD<84> 5A7<>
NC_CPUCRUD<83> 5A7<>
NC_CPUCRUD<82> 5A7<>
NC_CPUCRUD<81> 5A7<>
NC_CPUCRUD<80> 5A7<>
NC_CPUCRUD<79> 5A7<>
NC_CPUCRUD<78> 5A7<>
NC_CPUCRUD<77> 5A7<>
NC_CPUCRUD<76> 5A7<>
NC_CPUCRUD<75> 5A7<>
NC_CPUCRUD<74> 5A7<>
NC_CPUCRUD<73> 5A7<>
NC_CPUCRUD<72> 5A7<>
NC_CPUCRUD<71> 5A7<>
NC_CPUCRUD<70> 5A7<>
NC_CPUCRUD<69> 5A7<>
NC_CPUCRUD<68> 5A7<>
NC_CPUCRUD<67> 5A7<>
NC_CPUCRUD<66> 5B7<>
NC_CPUCRUD<65> 5B7<>
NC_CPUCRUD<64> 5B7<>
NC_CPUCRUD<63> 5B7<>
NC_CPUCRUD<62> 5B7<>
NC_CPUCRUD<61> 5B7<>
NC_CPUCRUD<60> 5B7<>
NC_CPUCRUD<59> 5B7<>
NC_CPUCRUD<58> 5B7<>
NC_CPUCRUD<57> 5B7<>
NC_CPUCRUD<56> 5B7<>
NC_CPUCRUD<55> 5B7<>
NC_CPUCRUD<54> 5B7<>
NC_CPUCRUD<53> 5B7<>
NC_CPUCRUD<52> 5B7<>
NC_CPUCRUD<51> 5B7<>
NC_CPUCRUD<50> 5B7<>
NC_CPUCRUD<49> 5B7<>
NC_CPUCRUD<48> 5B7<>
NC_CPUCRUD<47> 5B7<>
NC_CPUCRUD<46> 5B7<>
NC_CPUCRUD<45> 5B7<>
NC_CPUCRUD<44> 5B7<>
NC_CPUCRUD<43> 5B7<>
NC_CPUCRUD<42> 5B7<>
NC_CPUCRUD<41> 5B7<>
NC_CPUCRUD<40> 5C7<>
NC_CPUCRUD<39> 5C7<>
NC_CPUCRUD<38> 5C7<>
NC_CPUCRUD<37> 5C7<>
NC_CPUCRUD<36> 5C7<>
NC_CPUCRUD<35> 5C7<>
NC_CPUCRUD<34> 5C7<>
NC_CPUCRUD<33> 5C7<>
NC_CPUCRUD<32> 5C7<>
NC_CPUCRUD<31> 5C7<>
NC_CPUCRUD<30> 5C7<>
NC_CPUCRUD<29> 5C7<>
NC_CPUCRUD<28> 5C7<>
NC_CPUCRUD<27> 5C7<>
NC_CPUCRUD<26> 5C7<>
NC_CPUCRUD<25> 5C7<>
NC_CPUCRUD<24> 5C7<>
NC_CPUCRUD<23> 5C7<>
NC_CPUCRUD<22> 5C7<>
NC_CPUCRUD<21> 5C7<>
NC_CPUCRUD<20> 5C7<>
NC_CPUCRUD<19> 5C7<>
NC_CPUCRUD<18> 5C7<>
NC_CPUCRUD<17> 5C7<>
NC_CPUCRUD<16> 5D7<>
NC_CPUCRUD<15> 5D7<>
NC_CPUCRUD<14> 5D7<>
NC_CPUCRUD<13> 5D7<>
NC_CPUCRUD<12> 5D7<>
NC_CPUCRUD<11> 5D7<>
NC_CPUCRUD<10> 5D7<>
NC_CPUCRUD<9> 5D7<>
NC_CPUCRUD<8> 5D7<>
NC_CPUCRUD<7> 5D7<>
NC_CPUCRUD<6> 5D7<>
NC_CPUCRUD<5> 5D7<>
NC_CPUCRUD<4> 5D7<>
NC_CPUCRUD<3> 5D7<>
NC_CPUCRUD<2> 5D7<>
NC_CPUCRUD<1> 5D7<>
NC_CPUCRUD<0> 5D7<>
NC_CPUAP<4> 4B7<>
NC_CPUAP<3> 4B7<>
NC_CPUAP<2> 4B7<>
NC_CPUAP<1> 4B7<>
NC_CPUAP<0> 4B7<>
NC_CLKENET_LINK_GTX 34C6>
NC_CLK33M_PCI_SLOTC 30D7<
NC_CBUS_INT_L 28A8<
NC_BUF_RST 22B5>
NC_BT6 29D2<>
NC_BT5 29D2<>
NC_BT4 29D2<>
NC_BT3 29D2<>
NC_BT1 29D2<>
NC_BS4 29D1<>
NC_BS3 29D1<>
NC_BS2 29B6<>
NC_BS1 29B7<>
NC_BRCLKO 28A5>
NC_BIGDIMM173 15A4>
NC_BIGDIMM167 15A4>
NC_BIGDIMM163 15A4>
NC_BIGDIMM144 15B4>
NC_BIGDIMM142 15B4>
NC_BIGDIMM140 15B4>
NC_BIGDIMM135 15B4>
NC_BIGDIMM134 15C4>
NC_BIGDIMM113 15C4>
NC_BIGDIMM103 15D4>
NC_BIGDIMM102 15D4>
NC_BIGDIMM101 15D4>
NC_BIGDIMM71 15A6<
NC_BIGDIMM51 15B6<
NC_BIGDIMM49 15B6<
NC_BIGDIMM47 15B6<
NC_BIGDIMM45 15B6<
NC_BIGDIMM44 15B6<
NC_BIGDIMM10 15D6<
NC_BIGDIMM9 15D6<
NC_AUD_MODEM_RTN 29C6<>
NC_AUD_MODEM 29C6<>
NC_AUDIO2MODEMRTN 29C6<>
NC_AUDIO2MODEM 29C6<>
NC_-12VREG 29C6<>
NC_-10VUNREG 29C7<>
M_VDDID 15A7<
M_SPD_WP 15A7<
MUX_SEL_L 12D4< 13A6<> 13C8<> 53C6<
MUX_SEL_H 12D4< 13A3<> 13C4<> 53C6<
MR_FLO_1 45B4<>
MR_FLO 45C5<>
MPWRGD 48B7< 48B7< 49B5<>
MPIC_CPU_INT_L 4B3< 7A5< 8D7<> 28B5>
MON_I2C_SDA 22D5<> 25B6<
MON_I2C_SCL 22D5<> 25B6<
MON_DETECT 23D7<> 25C6< 59D6>
MODEM_USB_DP 28B2< 29C5<> 58A5> 59B6>
MODEM_USB_DM 28B2< 29C5<> 58A5> 59B6>
MII_EN 35C4<
MIC_IN 39C4< 43B2<
MIC_FIX 43C5<
MICSHLD 29A5<> 43A8< 58A5> 59A8>
MICLOW 29A5<> 43A8< 58A5> 59A8>
MICHIGH 29A5<> 43B8< 58A5> 59A8>
MIC5 43A3<
MIC4 43B3<>
MIC3 43B4<
MIC2 43B4<
MIC1S1 43A7<>
62
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
UATAD<11> 37B4< 38C6<>
UATAD<10> 37B4< 38C6<>
UATAD<9> 37B4< 38C6<>
UATAD<8> 37B4< 38C6<>
UATAD<7> 37B4< 38C6<>
UATAD<6> 37B4< 38C6<>
UATAD<5> 37B4< 38C6<>
UATAD<4> 37B4< 38C6<>
UATAD<3> 37C4< 38C6<>
UATAD<2> 37C4< 38C6<>
UATAD<1> 37C4< 38C6<>
UATAD<0..15> 58D5>
UATAD<0> 37C4< 38C6<>
UATA0IRQ 38C6<> 58D5>
U4202P7 40B3<>
U4202P6 40B3<
U4202P5 40B3<
U4202P3 40C3<
U4202P2 40C3<
U22_8 36D8<
U10_OUT 42C7> 42D8<
U10_A 42C7<
U5_SDOUT 39C3<>
T_UD_IDEDD_15 37A1< 38C2<> 58B2>
T_UD_IDEDD_14 37A1< 38C2<> 58B2>
T_UD_IDEDD_13 37A1< 38C2<> 58B2>
T_UD_IDEDD_12 37B1< 38C2<> 58B2>
T_UD_IDEDD_11 37B1< 38C2<> 58B2>
T_UD_IDEDD_10 37B1< 38C2<> 58B2>
T_UD_IDEDD_9 37B1< 38C2<> 58B2>
T_UD_IDEDD_8 37B1< 38C2<> 58B2>
T_UD_IDEDD_7 37B1< 38C3<> 58B2>
T_UD_IDEDD_6 37B1< 38C3<> 58B2>
T_UD_IDEDD_5 37B1< 38C3<> 58C2>
T_UD_IDEDD_4 37B1< 38C3<> 58C2>
T_UD_IDEDD_3 37C1< 38C3<> 58C2>
T_UD_IDEDD_2 37C1< 38C3<> 58C2>
T_UD_IDEDD_1 37C1< 38C3<> 58C2>
T_UD_IDEDD_0 37C1< 38C3<> 58C2>
TRANS_ADJ 45B3<
TPA_VOL 42D5<
TPA_VCLAMPR 42C4<
TPA_VCLAMPL 42C5<
TPA_V2P5 42D5<
TPA_ROUTP 42C4<>
TPA_ROUTN 42C4<>
TPA_ROSC 42C4<>
TPA_MODE 42D4<
TPA_LOUTP 42C5<>
TPA_LOUTN 42C5<>
TPA_COSC 42C4<>
TPA_BSRP 42D4<>
TPA_BSRN 42D4<>
TPA_BSLP 42D5<>
TPA_BSLN 42D5<>
TPA_AVDD_REF 42D4<
TPA_5V 42D4<
TMDS_EN 23D7<> 51B1<>
TMDS_DDC_DAT 24B4<> 59C6>
TMDS_DDC_CLK 24B3<> 59C6>
TMDS_D2P 23D1< 24D7<> 27C2< 57D2> 59B8>
TMDS_D2M 23D1< 24D7<> 27C2< 57D2> 59B8>
TMDS_D1P 23D1< 24C7<> 27C2< 57D2> 59B8>
TMDS_D1M 23D1< 24C7<> 27C2< 57D2> 59B8>
TMDS_D0P 23D1< 24B7<> 27C2< 57D2> 59B8>
TMDS_D0M 23D1< 24B7<> 27C2< 57D2> 59A8>
TMDS_CKP 23D1< 24B7<> 27C2< 57D2> 59A8>
TMDS_CKM 23D1< 24A7<> 27C2< 57D2> 59A8>
TI_SD* 42D5<
TI_MODE_OUT_2 42C7<
TI_MODE_OUT 42D4<>
TESTEN 35A5< 35C4<
TD2P 24C3<> 57C5>
TD2M 24C4<> 57C5>
TD1P 24C4<> 57C5>
TD1M 24C3<> 57C5>
TD0P 24C3<> 57C5>
TD0M 24C4<> 57C5>
TCKP 24C4<> 57C5>
TCKM 24C3<> 57C5>
TAS_VCOM 39B1<> 39B1<> 43D5<
TAS_STAR_GND 39A7<> 39D2<
TAS_PWR_DOWN 39B4< 39D7<
TAS_DVDD 39D3<
SYSTEM_CLK_EN 28A5< 44C4<>
SYSCLK_LA 8A2< 8D8<> 56B3>
SYSCLK_DDRCLK_B2_UF 12B6<> 53B6<
SYSCLK_DDRCLK_B2_L_UF 12B6<> 53B6<
SYSCLK_DDRCLK_B2_L 12A4< 15A6< 53B6<
SYSCLK_DDRCLK_B2 12A4< 15A6< 53B6<
SYSCLK_DDRCLK_B1_UF 12B6<> 53B6<
SYSCLK_DDRCLK_B1_L_UF 12B6<> 53B6<
SYSCLK_DDRCLK_B1_L 12A4< 15C6< 53B6<
SYSCLK_DDRCLK_B1 12A4< 15D6< 53B6<
SYSCLK_DDRCLK_B0_UF 12B6<> 53B6<
SYSCLK_DDRCLK_B0_L_UF 12B6<> 53B6<
SYSCLK_DDRCLK_B0_L 12B4< 15B3> 53B6<
SYSCLK_DDRCLK_B0 12B4< 15B4> 53B6<
SYSCLK_DDRCLK_A2_UF 12B6<> 53C6<
SYSCLK_DDRCLK_A2_L_UF 12B6<> 53B6<
SYSCLK_DDRCLK_A2_L 53B6<
SYSCLK_DDRCLK_A1_UF 12B6<> 53C6<
SYSCLK_DDRCLK_A1_L_UF 12B6<> 53C6<
SYSCLK_DDRCLK_A1_L 12B4< 14A4<> 53C6<
SYSCLK_DDRCLK_A1 12C4< 14A4<> 53C6<
SYSCLK_DDRCLK_A0_UF 12B6<> 53C6<
SYSCLK_DDRCLK_A0_L_UF 12B6<> 53C6<
SYSCLK_DDRCLK_A0_L 12C4< 14D6<> 53C6<
SYSCLK_DDRCLK_A0 12C4< 14D6<> 53C6<
SYSCLK_CPU_UF 9A3<> 56C3>
SYSCLK_CPU 4D2< 9A4< 56C3>
SWITCH5V_6 51B2<>
SWITCH5V_5 51B3<
SWITCH5V_4 51B6<>
SWITCH5V_3 51B6<
SW12V_SLEEP 51D7<>
SW12V_SL 51C7<
SW5V_VOSNS 50B7<>
SW5V_TG1R 50B4<>
SW5V_TG1 50B5< 50B7>
SW5V_SW1A 50A3<>
SW5V_SW1 50A5<> 50A5<> 50B7<>
SW5V_SNSP 50A5< 50B7<
SW5V_SNSMA 50A4<>
SW5V_SNSM 50A5< 50B7<
SW5V_RUNSS 50B8< 50D1<
SW5V_ITH1 50B7<>
SW5V_BOOST1 50A5< 50B7<>
SW5V_BG1R 50A5<>
SW5V_BG1 50A5< 50B7<>
SW5V_5VSENSE 50A4<>
SW5VITH1R 50B8<
SW3V_VOSNS 50B6<>
SW3V_TG2R 50C5<>
SW3V_TG2 50B6<>
SW3V_SW2A 50B3<>
SW3V_SW2 50B6<> 50C4<>
SW3V_SNSP 50B6<
SW3V_SNSM 50B6<
SW3V_RUNSSR 50C2<
SW3V_RUNSS 50B6< 50C1<
SW3V_ITH2 50A7< 50B6>
SW3V_BOOST2R 50C5<>
SW3V_BOOST2 50B6<>
SW3V_BG2R 50B5<>
SW3V_BG2 50B6<>
SW3V_3VSENSE 50B4<>
SW3VITH2R 50A8<
SW3V5V_VIN 50C6<>
50C7<
SW3V5V_SGND 50A7<> 50A8<> 50B7<> 50B8<> 50B8<>
SW3V5V_INTVCC 50B5<> 50C6<>
SW3V5V_12VIN 50C7<>
SUPER_FLO 45C7<> 45C7<>
STOP_AGP_L 16C6<> 16D3< 17A8< 54B7<
STBYMD 50B7<>
SPKR_RP 42A5<>
SPKR_RMS 42C8<
SPKR_RM 42A5<>
SPKR_LP 42A5<>
SPKR_LM 42A5<>
SPKR_JACK_DALLAS 42A5<>
SPKROUT_R_P 42A8< 42C1<
SPKROUT_R_N 42A8< 42C1<
SPKROUT_L_P 42A8< 42C8<
SPKROUT_L_N 42A8< 42C8<
SPDA 42B7<
SNF_FSEL 28C5<> 28D3<
SND_TO_AUDIO 28B1< 39C4<
SND_SYNC 28B1< 39C1<>
SND_SPKR_ID_U10 42B8<
SND_SPKR_ID 28B5<> 42B8<
SND_SCLK 28A1< 39B1<>
SND_LIN_SENSE_L 28B5<> 40D4< 59B6>
SND_HW_RESET_L 28A8< 28B5<> 39B4<
SND_HP_SENSE_L 28B5<> 41A5< 59B8>
SND_HP_SENSE_CONN 41A3< 41B2<>
SND_HP_M_L 41A7<>
SND_HP_MUTE_L 28C5<> 41A7<
SND_CLKOUT 28A1< 39B4<
SND_AMP_M_L 42D3< 43C7<>
SND_AMP_MUTE_L 28C5<> 43C8<
SLEEP_OFF_L2 39C7<
SLEEP_OFF_L 51B6< 51C7<
SLEEP_LED_BD 51A6<
SLEEPLED_TERM 51A6<
SLEEP2 51A7<
SLEEP1 51A8<
SLEEP 44B5<> 50C2< 59C6>
SI_VREF 27B3<
SI_TMDS_D2P 27C3<> 57C2>
SI_TMDS_D2M 27C3<> 57C2>
SI_TMDS_D1P 27C3<> 57C2>
SI_TMDS_D1M 27C3<> 57C2>
SI_TMDS_D0P 27C3<> 57C2>
SI_TMDS_D0M 27C3<> 57C2>
SI_TMDS_CKP 27C3<> 57C2>
SI_TMDS_CKM 27C3<> 57C2>
SI_SCL 23D2< 27C5<
SI_SCA 23D2< 27C5<
SI_IDCK_M 27B5<
SI_I2C_OFF 27C5<
SI_EXT_SWING_SET 27B3<>
SI_EDGE 27C5<
SHS 50C7<
SGRBVREF 21A3< 21C4< 21C8< 52A6>
SGRAVREF 20A3< 20C4< 20C8< 52A6>
SENSE-_1 45B5< 45C7<
SENSE- 45C6< 45C8<>
SENSE+_1 45B5< 45C7<
SENSE+ 45C6<
SB1P1 44A3<
S3700P2 44A1<>
S3700P1 44A1<>
RUNSS 50C8< 50D3<
RUNLED1 51C8<
RT418P2 50C7<
RT406P2 47B3<>
RT401P1 47C5<>
RT373P1 51A5<
ROM_WP_L 30B2< 59A8>
ROM_RW_L 30B2< 30B6< 31B4<> 59B8>
ROM_ONBOARD_CS_L 30B2< 31B4<> 59D6>
ROM_OE_L 30B2< 30C6< 31B2<> 59C8>
ROM_CS_L 30B4< 30C6< 31B4<> 59C8>
ROMA15 18C8< 26D8<
ROMA14 18C8> 26D8<
RJ45_TXP 35C1<> 57B5>
RJ45_TXN 35C1<> 57B5>
RJ45_TREF 35C2<> 57B5>
RJ45_RXP 35C1<> 57B5>
RJ45_RXN 35C1<> 57B5>
RJ45_RREF 35C2<> 57B5>
RJ45_F_TREF 35B2< 57B5>
RJ45_7_8 35C1<> 57B5>
RJ45_4_5 35C1<> 57B5>
RINT_RESET_L 34C5<
RINT_PU_RESET_L 34C5<
RINP 42C4< 43D4<
RINN1 43C2<
RINN 42C4< 43C2<
RINA 39C4< 40B2<
RF_DISABLE_L 31C3<>
RF_CLKRUN_L 31C3<> 59B6>
RFBDQS<15> 19A3< 21C2<>
RFBDQS<14> 19A3< 21C2<>
RFBDQS<13> 19A3< 21C2<>
RFBDQS<12> 19A3< 21C2<>
RFBDQS<11> 19A3< 21C6<>
RFBDQS<10> 19A3< 21C6<>
RFBDQS<9> 19A3< 21C6<>
RFBDQS<8..15> 55B3>
RFBDQS<8> 19A3< 21C6<>
RFBDQS<7> 19A6< 20C2<>
RFBDQS<6> 19A6< 20C2<>
RFBDQS<5> 19A6< 20C2<>
RFBDQS<4> 19A6< 20C2<>
RFBDQS<3> 19A6< 20C6<>
RFBDQS<2> 19A6< 20C6<>
RFBDQS<1> 19A6< 20C6<>
RFBDQS<0..7> 55C3>
RFBDQS<0> 19A6< 20C6<>
RFBDQM<15> 18C2< 21C2<
RFBDQM<14> 18C2< 21C2<
RFBDQM<13> 18D2< 21C2<
RFBDQM<12> 18D2< 21C2<
RFBDQM<11> 18D2< 21C6<
RFBDQM<10> 18D2< 21C6<
RFBDQM<9> 18D2< 21C6<
RFBDQM<8..15> 55C3>
RFBDQM<8> 18D2< 21C6<
RFBDQM<7> 18G2< 20C2<
RFBDQM<6> 18G2< 20C2<
RFBDQM<5> 18G2< 20C2<
RFBDQM<4> 18G2< 20C2<
RFBDQM<3> 18G2< 20C6<
RFBDQM<2> 18G2< 20C6<
RFBDQM<1> 18G2< 20C6<
RFBDQM<0..7> 55D3>
RFBDQM<0> 18G2< 20C6<
RFBD<127> 19B4< 21B1<>
RFBD<126> 19B4< 21B1<>
RFBD<125> 19B4< 21B1<>
RFBD<124> 19B4< 21B1<>
RFBD<123> 19B4< 21B1<>
RFBD<122> 19B4< 21B1<>
RFBD<121> 19B4< 21C1<>
RFBD<120> 19B4< 21C1<>
RFBD<119> 19B4< 21C1<>
RFBD<118> 19B4< 21C1<>
RFBD<117> 19B4< 21C1<>
RFBD<116> 19B4< 21C1<>
RFBD<115> 19B4< 21C1<>
RFBD<114> 19B4< 21C1<>
RFBD<113> 19B4< 21C1<>
RFBD<112> 19B4< 21C1<>
RFBD<111> 19B4< 21C1<>
RFBD<110> 19B4< 21C1<>
RFBD<109> 19B4< 21C1<>
RFBD<108> 19B4< 21C1<>
RFBD<107> 19B4< 21C1<>
RFBD<106> 19B4< 21C1<>
RFBD<105> 19C4< 21C1<>
RFBD<104> 19C4< 21C1<>
RFBD<103> 19C4< 21C1<>
RFBD<102> 19C4< 21C1<>
RFBD<101> 19C4< 21C1<>
RFBD<100> 19C4< 21C1<>
RFBD<99> 19C4< 21C1<>
RFBD<98> 19C4< 21C1<>
RFBD<97> 19C4< 21C1<>
RFBD<96> 19C4< 21C1<>
RFBD<95> 19B7< 21B5<>
RFBD<94> 19B7< 21B5<>
RFBD<93> 19B7< 21B5<>
RFBD<92> 19B7< 21B5<>
RFBD<91> 19B7< 21B5<>
RFBD<90> 19B7< 21B5<>
RFBD<89> 19B7< 21C5<>
RFBD<88> 19B7< 21C5<>
RFBD<87> 19B7< 21C5<>
RFBD<86> 19B7< 21C5<>
RFBD<85> 19B7< 21C5<>
RFBD<84> 19B7< 21C5<>
RFBD<83> 19B7< 21C5<>
RFBD<82> 19B7< 21C5<>
RFBD<81> 19B7< 21C5<>
RFBD<80> 19B7< 21C5<>
RFBD<79> 19B7< 21C5<>
RFBD<78> 19B7< 21C5<>
RFBD<77> 19B7< 21C5<>
RFBD<76> 19B7< 21C5<>
RFBD<75> 19B7< 21C5<>
RFBD<74> 19B7< 21C5<>
RFBD<73> 19C7< 21C5<>
RFBD<72> 19C7< 21C5<>
RFBD<71> 19C7< 21C5<>
RFBD<70> 19C7< 21C5<>
RFBD<69> 19C7< 21C5<>
RFBD<68> 19C7< 21C5<>
RFBD<67> 19C7< 21C5<>
RFBD<66> 19C7< 21C5<>
RFBD<65> 19C7< 21C5<>
RFBD<64..127> 55C3>
RFBD<64> 19C7< 21C5<>
RFBD<63> 19C4< 20B1<>
RFBD<62> 19C4< 20B1<>
RFBD<61> 19C4< 20B1<>
RFBD<60> 19C4< 20B1<>
RFBD<59> 19C4< 20B1<>
RFBD<58> 19C4< 20B1<>
RFBD<57> 19C4< 20C1<>
RFBD<56> 19C4< 20C1<>
RFBD<55> 19C4< 20C1<>
RFBD<54> 19C4< 20C1<>
RFBD<53> 19C4< 20C1<>
RFBD<52> 19C4< 20C1<>
RFBD<51> 19C4< 20C1<>
RFBD<50> 19D4< 20C1<>
RFBD<49> 19D4< 20C1<>
RFBD<48> 19D4< 20C1<>
RFBD<47> 19D4< 20C1<>
RFBD<46> 19D4< 20C1<>
RFBD<45> 19D4< 20C1<>
RFBD<44> 19D4< 20C1<>
RFBD<43> 19D4< 20C1<>
RFBD<42> 19D4< 20C1<>
RFBD<41> 19D4< 20C1<>
RFBD<40> 19D4< 20C1<>
RFBD<39> 19D4< 20C1<>
RFBD<38> 19D4< 20C1<>
RFBD<37> 19D4< 20C1<>
RFBD<36> 19D4< 20C1<>
RFBD<35> 19D4< 20C1<>
RFBD<34> 19D4< 20C1<>
RFBD<33> 19D4< 20C1<>
RFBD<32> 19D4< 20C1<>
RFBD<31> 19C7< 20B5<>
RFBD<30> 19C7< 20B5<>
RFBD<29> 19C7< 20B5<>
RFBD<28> 19C7< 20B5<>
RFBD<27> 19C7< 20B5<>
RFBD<26> 19C7< 20B5<>
RFBD<25> 19C7< 20C5<>
RFBD<24> 19C7< 20C5<>
RFBD<23> 19C7< 20C5<>
RFBD<22> 19C7< 20C5<>
RFBD<21> 19C7< 20C5<>
RFBD<20> 19C7< 20C5<>
RFBD<19> 19C7< 20C5<>
RFBD<18> 19D7< 20C5<>
RFBD<17> 19D7< 20C5<>
RFBD<16> 19D7< 20C5<>
RFBD<15> 19D7< 20C5<>
RFBD<14> 19D7< 20C5<>
RFBD<13> 19D7< 20C5<>
RFBD<12> 19D7< 20C5<>
RFBD<11> 19D7< 20C5<>
RFBD<10> 19D7< 20C5<>
RFBD<9> 19D7< 20C5<>
RFBD<8> 19D7< 20C5<>
RFBD<7> 19D7< 20C5<>
RFBD<6> 19D7< 20C5<>
RFBD<5> 19D7< 20C5<>
RFBD<4> 19D7< 20C5<>
RFBD<3> 19D7< 20C5<>
RFBD<2> 19D7< 20C5<>
RFBD<1> 19D7< 20C5<>
RFBD<0..63> 55D3>
RFBD<0> 19D7< 20C5<>
RFBBWE_L 18C2<> 21B2< 21B6< 55B3>
RFBBRAS_L 18C2<> 21B2< 21B6< 55B3>
RFBBCS0_L 18C2<> 21B2< 21B6< 55B3>
RFBBCLK1_L 19B1< 21C2< 55B3>
RFBBCLK1 19C1< 21C2< 55B3>
RFBBCLK0_L 19B1< 21C6< 55B3>
RFBBCLK0 19B1< 21C6< 55B3>
RFBBCKE 18A2<> 21C2< 21C6< 55B3>
RFBBCAS_L 18C2<> 21B2< 21B6< 55B3>
RFBBBA<1> 18A2<> 21C2< 21C6<
RFBBBA<0..1> 55C3>
RFBBBA<0> 18A2<> 21C2< 21C6<
RFBBA<11> 18B2<> 21C2< 21C6<
RFBBA<10> 18B2<> 21C2< 21C6<
RFBBA<9> 18B2<> 21C2< 21C6<
RFBBA<8> 18B2<> 21C2< 21C6<
RFBBA<7> 18B2<> 21C2< 21C6<
RFBBA<6> 18B2<> 21C2< 21C6<
RFBBA<5> 18B2<> 21C2< 21C6<
RFBBA<4> 18B2<> 21C2< 21C6<
RFBBA<3> 18B2<> 21C2< 21C6<
RFBBA<2> 18B2<> 21C2< 21C6<
RFBBA<1> 18B2<> 21C2< 21C6<
RFBBA<0..11> 55C3>
RFBBA<0> 18C2<> 21D2< 21D6<
RFBAWE_L 18F2<> 20B2< 20B6< 55D3>
RFBARAS_L 18G2<> 20B2< 20B6< 55D3>
RFBACS0_L 18F2<> 20B2< 20B6< 55C3>
RFBACLK1_L 19D1< 20C2< 55C3>
RFBACLK1 19D1< 20C2< 55C3>
RFBACLK0_L 19C1< 20C6< 55C3>
RFBACLK0 19C1< 20C6< 55C3>
RFBACKE 18D2<> 20C2< 20C6< 55C3>
RFBACAS_L 18G2<> 20B2< 20B6< 55D3>
RFBABA<1> 18E2<> 20C2< 20C6<
RFBABA<0..1> 55D3>
RFBABA<0> 18E2<> 20C2< 20C6<
RFBA<11> 18E2<> 20C2< 20C6<
RFBA<10> 18E2<> 20C2< 20C6<
RFBA<9> 18E2<> 20C2< 20C6<
RFBA<8> 18E2<> 20C2< 20C6<
RFBA<7> 18E2<> 20C2< 20C6<
RFBA<6> 18E2<> 20C2< 20C6<
RFBA<5> 18F2<> 20C2< 20C6<
RFBA<4> 18F2<> 20C2< 20C6<
RFBA<3> 18F2<> 20C2< 20C6<
RFBA<2> 18F2<> 20C2< 20C6<
RFBA<1> 18F2<> 20C2< 20C6<
RFBA<0..11> 55D3>
RFBA<0> 18F2<> 20D2< 20D6<
RESET_BUTTON* 29B2<> 44C4<> 59D6>
REF_STAR_GND 39A5<> 39A5<>
RB227P1 49C5<>
RB213P2 49C3<>
RB160P1 50A5<>
RB37P1 48C6<>
RB27-1 48B6<
RB22P2 48B3<>
RAM_WE_L 12B3< 14B6<> 15B6< 53C6<
RAM_SA0 15A4<
RAM_RAS_L 12A2< 14B4<> 15B4> 53C6<
RAM_DQS_B<7> 13A2<> 15A6< 15A8<
RAM_DQS_B<6> 13B2<> 15A6< 15B8<
RAM_DQS_B<5> 13B4<> 15B6< 15B8<
RAM_DQS_B<4> 13C4<> 15B6< 15B8<
RAM_DQS_B<3> 13A5<> 15B8< 15C6<
RAM_DQS_B<2> 13A5<> 15C6< 15C8<
RAM_DQS_B<1> 13B7<> 15C8< 15D6<
RAM_DQS_B<0..7> 53D6<
RAM_DQS_B<0> 13C7<> 15C8< 15D6<
RAM_DQS_A<7> 13B2<> 14A6<> 14A8<
RAM_DQS_A<6> 13B2<> 14A6<> 14B8<
RAM_DQS_A<5> 13C4<> 14A6<> 14B8<
RAM_DQS_A<4> 13D4<> 14B6<> 14B8<
RAM_DQS_A<3> 13B5<> 14C6<> 14C8<
RAM_DQS_A<2> 13B5<> 14C6<> 14C8<
RAM_DQS_A<1> 13C7<> 14C8< 14D6<>
RAM_DQS_A<0..7> 53D6<
RAM_DQS_A<0> 13D7<> 14C8< 14D6<>
RAM_DQM_B<7> 13A2<> 15A4>
RAM_DQM_B<6> 13B2<> 15A4>
RAM_DQM_B<5> 13B4<> 15B4>
RAM_DQM_B<4> 13C4<> 15B4>
RAM_DQM_B<3> 13A5<> 15C4>
RAM_DQM_B<2> 13A5<> 15C4>
RAM_DQM_B<1> 13B7<> 15D4>
RAM_DQM_B<0..7> 53D6<
RAM_DQM_B<0> 13C7<> 15D4>
RAM_DQM_A<7> 13B2<> 14A4<>
RAM_DQM_A<6> 13B2<> 14A4<>
RAM_DQM_A<5> 13C4<> 14A4<>
RAM_DQM_A<4> 13D4<> 14B4<>
RAM_DQM_A<3> 13A5<> 14C4<>
RAM_DQM_A<2> 13B5<> 14C4<>
RAM_DQM_A<1> 13C7<> 14D4<>
RAM_DQM_A<0..7> 53D6<
RAM_DQM_A<0> 13D7<> 14D4<>
RAM_DATA_B<63> 13A2<> 15A4>
RAM_DATA_B<62> 13A2<> 15A4>
RAM_DATA_B<61> 13A2<> 15A4>
RAM_DATA_B<60> 13A2<> 15A4>
RAM_DATA_B<59> 13A2<> 15A6<
RAM_DATA_B<58> 13A2<> 15A6<
RAM_DATA_B<57> 13A2<> 15A6<
RAM_DATA_B<56> 13B2<> 15A6<
RAM_DATA_B<55> 13B2<> 15A4>
RAM_DATA_B<54> 13B2<> 15A4>
RAM_DATA_B<53> 13B2<> 15A4>
RAM_DATA_B<52> 13B2<> 15A4>
RAM_DATA_B<51> 13B2<> 15A6<
RAM_DATA_B<50> 13B2<> 15A6<
RAM_DATA_B<49> 13B2<> 15A6<
RAM_DATA_B<48> 13B2<> 15A6<
RAM_DATA_B<47> 13B4<> 15A4>
RAM_DATA_B<46> 13B4<> 15A4>
RAM_DATA_B<45> 13C4<> 15B4>
RAM_DATA_B<44> 13C4<> 15B4>
RAM_DATA_B<43> 13C4<> 15A6<
RAM_DATA_B<42> 13C4<> 15A6<
RAM_DATA_B<41> 13C4<> 15B6<
RAM_DATA_B<40> 13C4<> 15B6<
RAM_DATA_B<39> 13C4<> 15B4>
RAM_DATA_B<38> 13C4<> 15B4>
RAM_DATA_B<37> 13C4<> 15B4>
RAM_DATA_B<36> 13C4<> 15B4>
RAM_DATA_B<35> 13C4<> 15B6<
RAM_DATA_B<34> 13C4<> 15B6<
RAM_DATA_B<33> 13C4<> 15B6<
RAM_DATA_B<32> 13C4<> 15B6<
RAM_DATA_B<31> 13A5<> 15C4>
RAM_DATA_B<30> 13A5<> 15C4>
RAM_DATA_B<29> 13A5<> 15C4>
RAM_DATA_B<28> 13A5<> 15C4>
RAM_DATA_B<27> 13A5<> 15C6<
RAM_DATA_B<26> 13A5<> 15C6<
RAM_DATA_B<25> 13A5<> 15C6<
RAM_DATA_B<24> 13A5<> 15C6<
RAM_DATA_B<23> 13A5<> 15C4>
RAM_DATA_B<22> 13A5<> 15C4>
RAM_DATA_B<21> 13A5<> 15C4>
RAM_DATA_B<20> 13A5<> 15C4>
RAM_DATA_B<19> 13A5<> 15C6<
RAM_DATA_B<18> 13A5<> 15C6<
RAM_DATA_B<17> 13A5<> 15C6<
RAM_DATA_B<16> 13A5<> 15C6<
RAM_DATA_B<15> 13B7<> 15C4>
RAM_DATA_B<14> 13B7<> 15C4>
RAM_DATA_B<13> 13B7<> 15D4>
RAM_DATA_B<12> 13C7<> 15D4>
RAM_DATA_B<11> 13C7<> 15C6<
RAM_DATA_B<10> 13C7<> 15C6<
RAM_DATA_B<9> 13C7<> 15D6<
RAM_DATA_B<8> 13C7<> 15D6<
RAM_DATA_B<7> 13C7<> 15D4>
RAM_DATA_B<6> 13C7<> 15D4>
RAM_DATA_B<5> 13C7<> 15D4>
RAM_DATA_B<4> 13C7<> 15D4>
RAM_DATA_B<3> 13C7<> 15D6<
RAM_DATA_B<2> 13C7<> 15D6<
RAM_DATA_B<1> 13C7<> 15D6<
RAM_DATA_B<0..63> 53D6<
RAM_DATA_B<0> 13C7<> 15D6<
RAM_DATA_A<63> 13B2<> 14A4<>
RAM_DATA_A<62> 13B2<> 14A4<>
RAM_DATA_A<61> 13B2<> 14A4<>
RAM_DATA_A<60> 13B2<> 14A4<>
RAM_DATA_A<59> 13B2<> 14A6<>
RAM_DATA_A<58> 13B2<> 14A6<>
RAM_DATA_A<57> 13B2<> 14A6<>
RAM_DATA_A<56> 13B2<> 14A6<>
RAM_DATA_A<55> 13B2<> 14A4<>
RAM_DATA_A<54> 13B2<> 14A4<>
RAM_DATA_A<53> 13C2<> 14A4<>
RAM_DATA_A<52> 13C2<> 14A4<>
RAM_DATA_A<51> 13C2<> 14A6<>
RAM_DATA_A<50> 13C2<> 14A6<>
RAM_DATA_A<49> 13C2<> 14A6<>
RAM_DATA_A<48> 13C2<> 14A6<>
RAM_DATA_A<47> 13C4<> 14A4<>
RAM_DATA_A<46> 13C4<> 14A4<>
RAM_DATA_A<45> 13C4<> 14B4<>
RAM_DATA_A<44> 13C4<> 14B4<>
RAM_DATA_A<43> 13C4<> 14A6<>
RAM_DATA_A<42> 13C4<> 14A6<>
RAM_DATA_A<41> 13C4<> 14B6<>
RAM_DATA_A<40> 13D4<> 14B6<>
RAM_DATA_A<39> 13D4<> 14B4<>
RAM_DATA_A<38> 13D4<> 14B4<>
RAM_DATA_A<37> 13D4<> 14B4<>
RAM_DATA_A<36> 13D4<> 14B4<>
RAM_DATA_A<35> 13D4<> 14B6<>
RAM_DATA_A<34> 13D4<> 14B6<>
RAM_DATA_A<33> 13D4<> 14B6<>
RAM_DATA_A<32> 13D4<> 14B6<>
RAM_DATA_A<31> 13B5<> 14C4<>
RAM_DATA_A<30> 13B5<> 14C4<>
RAM_DATA_A<29> 13B5<> 14C4<>
RAM_DATA_A<28> 13B5<> 14C4<>
RAM_DATA_A<27> 13B5<> 14C6<>
RAM_DATA_A<26> 13B5<> 14C6<>
RAM_DATA_A<25> 13B5<> 14C6<>
RAM_DATA_A<24> 13B5<> 14C6<>
RAM_DATA_A<23> 13B5<> 14C4<>
RAM_DATA_A<22> 13B5<> 14C4<>
RAM_DATA_A<21> 13B5<> 14C4<>
RAM_DATA_A<20> 13B5<> 14D4<>
RAM_DATA_A<19> 13B5<> 14C6<>
RAM_DATA_A<18> 13B5<> 14C6<>
RAM_DATA_A<17> 13B5<> 14C6<>
RAM_DATA_A<16> 13B5<> 14D6<>
RAM_DATA_A<15> 13C7<> 14D4<>
RAM_DATA_A<14> 13C7<> 14D4<>
RAM_DATA_A<13> 13C7<> 14D4<>
RAM_DATA_A<12> 13C7<> 14D4<>
RAM_DATA_A<11> 13C7<> 14D6<>
RAM_DATA_A<10> 13C7<> 14D6<>
RAM_DATA_A<9> 13C7<> 14D6<>
RAM_DATA_A<8> 13C7<> 14D6<>
RAM_DATA_A<7> 13D7<> 14D4<>
RAM_DATA_A<6> 13D7<> 14D4<>
RAM_DATA_A<5> 13D7<> 14D4<>
RAM_DATA_A<4> 13D7<> 14D4<>
RAM_DATA_A<3> 13D7<> 14D6<>
RAM_DATA_A<2> 13D7<> 14D6<>
RAM_DATA_A<1> 13D7<> 14D6<>
RAM_DATA_A<0..63> 53D6<
RAM_DATA_A<0> 13D7<> 14D6<>
RAM_CS_L<3> 12B1< 15B4>
RAM_CS_L<2..3> 53C6<
RAM_CS_L<2> 12B1< 15B4>
RAM_CS_L<1> 12C1< 14B4<>
RAM_CS_L<0..1> 53C6<
RAM_CS_L<0> 12C1< 14B6<>
RAM_CKE<3> 12B1< 15A1< 15C4>
RAM_CKE<2..3> 53C6<
RAM_CKE<2> 12C1< 15B1< 15C6<
RAM_CKE<1> 12B1< 14B6<> 15C1<
RAM_CKE<0..1> 53C6<
RAM_CKE<0> 12C1< 14B4<> 15C1<
RAM_CAS_L 12A2< 14B4<> 15B6< 53C6<
RAM_BA<1> 12B3< 14B4<> 15B6<
RAM_BA<0..1> 53D6<
RAM_BA<0> 12B3< 14B6<> 15B6<
RAM_ADDR<12> 12D1< 14B6<> 15C4>
RAM_ADDR<11> 12B3< 14B4<> 15C4>
RAM_ADDR<10> 12C3< 14B6<> 15B4>
RAM_ADDR<9> 12C3< 14B6<> 15C6<
RAM_ADDR<8> 12D1< 14B4<> 15C4>
RAM_ADDR<7> 12D3< 14B6<> 15C6<
RAM_ADDR<6> 12D1< 14B4<> 15C4>
63
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ZT11P1 4B1<>
ZT10P1 4A2<>
ZT9P1 4B2<>
ZT8P1 4A1<>
XMIT_LED 35A2< 35B4<>
WL_PCI_IDSEL 31C2<> 59A6>
VSYNC* 22C5<> 57D5>
VRFILT 39B3<>
VREFP 39B4< 43A3<
VREFM 39B4<
VR4210P1 39B7<
VOSNS2 50B5<>
VOSNS1 50B8<>
VIP_PU 22D4<
VIP_PD 22D4<
VIPHCTL 22D5<> 26D5<
VIPHAD1 22D5<> 26B7<
VIPHAD0 22D5<> 26B7<
VIPD7 22D4<> 26C5<
VIPD6 22D4<> 26B8<
VIPD5 22D4<> 26D7<
VIPD4 22D4<> 26D7<
VIPD3 22D4<> 26D7<
VIPD2 22D4<> 26B8<
VIPD1 22D4<> 26B7<
VIPD0 22D4<> 26B7<
VIPCLK 22D4< 52A8>
VGER_INV_HRESET 7A3< 7B3< 7B3< 7C3< 44D1>
VGA_IIC_DAT 25C4<> 59B6>
VGA_IIC_CLK 25C4<> 59B6>
VC_SENA 45B3<>
VC_CNTL1 44C7< 45D8<
VCORE_VIN 45D7<>
VCORE_VGATE 28B5<> 28D3<
VCORE_TG_1 45B5< 45C7>
VCORE_TG 45C6<>
VCORE_STBY 45C7<>
VCORE_SGND 45B7<> 45C7<> 45C7<> 45C8<> 45C8<>
VCORE_SF 45C8<
VCORE_SENA+ 45C3<>
VCORE_SEN+_1 45A3<>
VCORE_SEN+ 45C3<>
VCORE_INTVCC 45C5<> 45D5<> 45D7<>
VCORE_FREQSET 45C7<
VCORE_EXTVCC 45D7<
VCORE_BOOST_1 45B5<>
VCORE_BOOST2_1 45B5< 45C7<>
VCORE_BOOST2 45C6<>
VCORE_BOOST 45C5<>
VCORE_BG_1 45B5< 45C7<>
VCORE_BG 45C6<>
VCOREIN 45D6<>
VCOMR 43D5<
VCOML 43D5<
U_USB_PWR_FLT* 32B4<
UX6_LINB 39C4<
UX6P23 39C4<
USB_PWR_FLT* 28B3< 28C1< 32B1< 33A7>
USB_PWR_EN 33A8<>
USB_PWREN_EF_L 28B3<> 28C2<
USB_PWREN_CD_L 28B3<> 28C2<
USB_PWREN_AB_L 28B3<> 28C2<
USB_PWR 25B5<> 25C2< 25D3<> 33A6<> 52A3>
59B6>
USB_PORT_PWR 33A4<> 33B3<> 33C3<> 33D3<> 52A3>
USB_OC_EF_L 28B3< 28C2<
USB_GND 52A3>
USB_DFP 28B3<> 58A5>
USB_DFN 28B3<> 58A5>
USB_DEP 28B3<> 58B5>
USB_DEN 28B3<> 58B5>
USB_DDP_F_TERM 28B2<
USB_DDP 28B3<>
USB_DDN_F_TERM 28B2<
USB_DDN 28B3<>
USB_DCP_F 28B2< 33D7< 58B5>
USB_DCP_CON 33D3<> 56A3> 59C6>
USB_DCP 28A3< 28B3<> 58B5>
USB_DCN_F 28B2< 33D7< 58B5>
USB_DCN_CON 33D3<> 56A3> 59C6>
USB_DCN 28A3< 28B3<> 58B5>
USB_DBP_F 28B2< 33C7< 58B5>
USB_DBP_CON 33B3<> 56A3> 59C6>
USB_DBP 28A3< 28B3<> 58B5>
USB_DBN_F 28B2< 33C7< 58B5>
USB_DBN_CON 33B3<> 56A3> 59C6>
USB_DBN 28A3< 28B3<> 58B5>
USB_DAP_F 28B2< 33B7< 58B5>
USB_DAP_CON 33C3<> 56A3> 59C6>
USB_DAP 28A3< 28B3<> 58B5>
USB_DAN_F 28B2< 33B7< 58B5>
USB_DAN_CON 33C3<> 56A3> 59C6>
USB_DAN 28A3< 28B3<> 58B5>
USBT_DCP_F 33D6<> 56A3>
USBT_DCN_F 33D6<> 56A3>
USBT_DBP_F 33C6<> 56A3>
USBT_DBN_F 33C6<> 56A3>
USBT_DAP_F 33B6<> 56B3>
USBT_DAN_F 33B6<> 56B3>
USB2_XT2_B 56B3>
USB2_XT2 32C4<> 56B3>
USB2_XT1 32C4< 56B3>
USB2_VCCRST 32A6<
USB2_RSDCP 32C4<> 56B3>
USB2_RSDCM 32C4<> 56B3>
USB2_RSDBP 32C4<> 56B3>
USB2_RSDBM 32C4<> 56B3>
USB2_RSDAP 32C4<> 56B3>
USB2_RSDAM 32C4<> 56B3>
USB2_RREF 32B4<> 56B3>
USB2_PME_L 32A6<>
USB2_NC2 32B4<>
USB2_NC1 32B4<>
USB2_IDSEL 32B6<
USB2_DCP_F 32C1<> 33D7< 56B3>
USB2_DCN_F 32C1<> 33D7< 56B3>
USB2_DBP_F 32C1<> 33C7< 56B3>
USB2_DBN_F 32C1<> 33C7< 56B3>
USB2_DAP_F 32C1<> 33B7< 56B3>
USB2_DAN_F 32C1<> 33B7< 56B3>
USB2_CRUN_L_INT 28A8< 28B5<> 32A8<
USB2_CRUN_L 32A6<>
UNUSED_GPIO15 28B5<> 28C1< 59A6>
UNUSED_EXTINT8 28B5<> 28B8<>
UNUSED_EXTINT7 28B5<> 28B8<>
UNUSED_ATAIOCS16_L 38C2<> 52A8>
UIDE_RST_L 37C7<> 37D3< 58C5>
UIDE_REF 37C7<>
UIDE_PDIAG 38C2<>
UIDE_IOCHRDY 37C3< 37C7< 58C5>
UIDE_INTRQ 37C7< 38C4< 58C5>
UIDE_DMARQ 37C7<> 38C4< 58C5>
UIDE_DMACK_L 37C7<> 37D3< 58C5>
UIDE_DIOW_L 37C3< 37C7<> 58C5>
UIDE_DIOR_L 37C7<> 37D3< 58C5>
UIDE_DATA<15> 37A3< 37C7<>
UIDE_DATA<14> 37A3< 37C7<>
UIDE_DATA<13> 37A3< 37C7<>
UIDE_DATA<12> 37B3< 37C7<>
UIDE_DATA<11> 37B3< 37C7<>
UIDE_DATA<10> 37B3< 37C7<>
UIDE_DATA<9> 37B3< 37D7<>
UIDE_DATA<8> 37B3< 37D7<>
UIDE_DATA<7> 37B3< 37D7<>
UIDE_DATA<6> 37B3< 37D7<>
UIDE_DATA<5> 37B3< 37D7<>
UIDE_DATA<4> 37B3< 37D7<>
UIDE_DATA<3> 37C3< 37D7<>
UIDE_DATA<2> 37C3< 37D7<>
UIDE_DATA<1> 37C3< 37D7<>
UIDE_DATA<0..15> 58C5>
UIDE_DATA<0> 37C3< 37D7<>
UIDE_CSELP_L 38C2<> 52A8>
UIDE_CS3FX_L 37C7<> 38B4< 58B5>
UIDE_CS1FX_L 37C7<> 38B4< 58B5>
UIDE_ADDR<2> 37C7<> 38A4<
UIDE_ADDR<1> 37C7<> 38B4<
UIDE_ADDR<0..2> 58B5>
UIDE_ADDR<0> 37C7<> 38B4<
UATAD<15> 37A4< 38C6<>
UATAD<14> 37A4< 38C6<>
UATAD<13> 37A4< 38C6<>
UATAD<12> 37B4< 38C6<>
64
051-6497
13
6964
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
C688 CAP 11C7
C687 CAP 11B6
C686 CAP 11A5
C685 CAP 11A5
C684 CAP 11A5
C683 CAP 11A4
C682 CAP 11B3
C681 CAP 11B3
C680 CAP 11C3
C679 CAP 11B1
C678 CAP 11B3
C677 CAP 11B1
C676 CAP 11B3
C675 CAP 43A7
C674 CAP 11A5
C673 CAP 11B2
C672 CAP 15D1
C671 CAP 13C5
C670 CAP 13C5
C669 CAP 13C5
C668 CAP 11B5
C667 CAP 11A4
C666 CAP 11A4
C665 CAP 11A4
C664 CAP 11A3
C663 CAP 11A4
C662 CAP 11A6
C661 CAP 11A6
C660 CAP 11B1
C659 CAP 11B3
C658 CAP 11B2
C657 CAP 11B3
C656 CAP 11C2
C655 CAP 11C4
C654 CAP 51B4
C653 CAP 51B4
C652 CAP 24B2
C651 CAP 11A3
C650 CAP 11A6
C649 CAP 11A4
C648 CAP 11A5
C647 CAP 11A5
C646 CAP 11B1
C645 CAP 11B1
C644 CAP 11B2
C643 CAP 11C2
C642 CAP 43B7
C641 CAP 11C8
C640 CAP 29A3
C639 CAP 29A4
C638 CAP 11A6
C637 CAP 11C4
C636 CAP_P 23A8
C635 CAP_P 23A6
C634 CAP 48C7
C633 CAP 48C7
C632 CAP 48C7
C631 CAP 48C7
C630 CAP 29A6
C629 CAP_P 29A5
C628 CAP 11A6
C627 CAP 29A6
C626 CAP 23A6
C625 CAP 29A7
C624 CAP 15D2
C623 CAP 28D7
C622 CAP 29D7
C621 CAP 29D7
C620 CAP 29C7
C619 CAP 29C7
C618 CAP 23A6
C617 CAP 22A3
C616 CAP 22A2
C615 CAP 29A4
C614 CAP 29A6
C613 CAP 13D6
C612 CAP 13D6
C611 CAP 13D7
C610 CAP 24A3
C609 CAP 29A4
C608 CAP 29A6
C607 CAP 22C1
C606 CAP 22C2
C605 CAP 22C2
C604 CAP 29A7
C603 CAP 16A8
C602 CAP 15D2
C601 CAP 29A5
C600 CAP_P 39D4
C599 CAP 39D4
C598 CAP 8B2
C597 CAP 39C4
C596 CAP 48C6
C595 CAP 39B5
C594 CAP 39B5
C593 CAP 15D2
C592 CAP 39B5
C591 CAP_P 39D2
C589 CAP 48C5
C588 CAP 39B5
C587 CAP 39B2
C586 CAP 48A4
C585 CAP 48B5
C584 CAP 39D3
C583 CAP 27D3
C582 CAP 42B7
C581 CAP 39B2
C580 CAP_P 39B2
C579 CAP 39C5
C578 CAP 39C5
C576 CAP 48C3
C574 CAP 32C8
C573 CAP 32C8
C572 CAP 48B7
C570 CAP 32C8
C569 CAP 20B8
C568 CAP 20B8
C567 CAP 20B7
C566 CAP 20B7
C565 CAP 20B5
C564 CAP 48C2
C563 CAP 48B6
C562 CAP 15D3
C559 CAP 32D8
C558 CAP_P 48B2
C557 CAP 27D4
C556 CAP 43B3
C555 CAP 32D7
C554 CAP 20B7
C553 CAP 20B6
C552 CAP 48B6
C551 CAP 43B3
C550 CAP 43A3
C549 CAP 39D7
C548 CAP 32D8
C547 CAP 32D7
C546 CAP 32D8
C545 CAP 20B7
C544 CAP 20D7
C543 CAP 48B3
C542 CAP 43B4
C541 CAP 32D8
C540 CAP 20D8
C539 CAP_P 39B7
C538 CAP_P 39D6
C537 CAP 32D7
C536 CAP 32C8
C535 CAP 20B6
C534 CAP 20B6
C533 CAP 20D7
C532 CAP 20D7
C531 CAP 32C7
C530 CAP 32C7
C529 CAP 32D5
C528 CAP_P 48B3
C527 CAP 32D8
C526 CAP 32D5
C525 CAP_P 41D7
C524 CAP_P 41C7
C523 CAP 32D8
C522 CAP 32D8
C521 CAP 20D2
C520 CAP 20D2
C519 CAP 32D8
C518 CAP 41B7
C517 CAP 32C8
C516 CAP 32D8
C515 CAP 32C8
C514 CAP 40C3
C513 CAP 40B3
C512 CAP_P 41B7
C511 CAP 32D5
C510 CAP 18B8
C509 CAP 18B8
C508 CAP 41C6
C507 CAP 40B3
C506 CAP 40C3
C505 CAP 40D3
C504 CAP 41B7
C503 CAP 41C6
C500 CAP 36C7
C499 CAP 41D6
C496 CAP 36B2
C495 CAP 36B2
C494 CAP 21D7
C493 CAP 21D7
C492 CAP 21D1
C490 CAP 36B6
C489 CAP 21B5
C488 CAP 21B7
C487 CAP 21D7
C486 CAP 21B6
C485 CAP 36B1
C484 CAP 36B5
C483 CAP 36B3
C482 CAP 36B3
C481 CAP 36B3
C480 CAP_P 40B4
C479 CAP_P 40C4
C478 CAP 43A5
C477 CAP 36C7
C476 CAP 21B6
C475 CAP 21B6
C473 CAP 51D2
C472 CAP 36B1
C471 CAP 36B4
C470 CAP 21B8
C469 CAP 21B7
C468 CAP 36B1
C467 CAP 21D8
C466 CAP 21B7
C464 CAP 36B4
C463 CAP 36B4
C462 CAP 21B8
C461 CAP 21B7
C460 CAP 21D2
C458 CAP 36B3
C457 CAP 36B4
C456 CAP 36B3
C455 CAP 36B4
C454 CAP 40C6
C453 CAP 41B4
C452 CAP 36B4
C451 CAP 36B2
C450 CAP 36B3
C449 CAP 27D4
C447 CAP 40B6
C446 CAP 36C3
C445 CAP 36C3
C444 CAP 36B2
C443 CAP 36B2
C442 CAP 36C5
C441 CAP 36C4
C440 CAP 36B4
C439 CAP 36B4
C438 CAP 35D3
C437 CAP 40C6
C436 CAP 41A4
C434 CAP 35D3
C433 CAP 33C3
C432 CAP 25B3
C431 CAP 40B6
C428 CAP 36B7
C427 CAP 41B3
C424 CAP 36B6
C423 CAP 25C3
C422 CAP 25C4
C421 CAP 25D4
C420 CAP 41D3
C418 CAP 36D4
C417 CAP 33B3
C416 CAP 25A4
C415 CAP 25A4
C414 CAP 25B4
C413 CAP 33D3
C412 CAP 41C3
C411 CAP 36A7
C410 CAP 36D4
C409 CAP 25B3
C408 CAP 41B3
C407 CAP 36A6
C406 CAP 36B6
C405 CAP 33D3
C404 CAP 33D4
C403 CAP 33D4
C401 CAP 35D1
C400 CAP 35C1
C399 CAP 36A7
C398 CAP 33B3
C397 CAP 33D4
C396 CAP 33A5
C395 CAP 36A6
C394 CAP 36A6
C393 CAP 36A6
C392 CAP 36A6
C391 CAP 33B4
C390 CAP 36A6
C389 CAP 33B4
C388 CAP 42A5
C387 CAP 33C4
C386 CAP 33C3
C385 CAP 33B4
C384 CAP 36C2
C383 CAP 33C4
C382 CAP 33A4
C381 CAP 36D3
C380 CAP 33C4
C379 CAP 36C2
C378 CAP 36C1
C377 CAP 33A4
C376 CAP 36D3
C375 CAP 36C1
C374 CAP 45B5
C373 CAP 45C8
C372 CAP 45B7
C371 CAP 45C5
C370 CAP 4A1
C369 CAP 4A1
C368 CAP 22B6
C367 CAP 45B6
C366 CAP 27D4
C365 CAP 46C6
C364 CAP 8C1
C363 CAP 46C4
C362 CAP_P 45B2
C361 CAP_P 45B2
C360 CAP 27D4
C359 CAP 49B7
C358 CAP 49C4
C357 CAP_P 45D3
C356 CAP_P 50D3
C355 CAP_P 50D3
C354 CAP_P 50D3
C353 CAP 8D4
C352 CAP 4B1
C351 CAP_P 49C3
C350 CAP 8D4
C349 CAP_P 50D6
C348 CAP_P 45B2
C347 CAP_P 45B2
C346 CAP_P 45B1
C345 CAP 4B1
C344 CAP 50B4
C343 CAP_P 45D3
C342 CAP_P 49C3
C341 CAP 50B7
C340 CAP_P 45C2
C339 CAP_P 50D6
C338 CAP_P 50D6
C337 CAP_P 45C2
C336 CAP_P 45C2
C335 CAP_P 45C2
C334 CAP_P 45C1
C333 CAP 50B6
C332 CAP_P 49B2
C331 CAP_P 49B2
C330 CAP_P 49B2
C329 CAP 49B3
C328 CAP_P 50B2
C327 CAP_P 50B2
C326 CAP_P 50B2
C325 CAP 27D4
C324 CAP_P 49B2
C323 CAP_P 49B2
C322 CAP 50A7
C321 CAP 50B7
C320 CAP 14C2
C319 CAP 14A7
C318 CAP 50B8
C317 CAP 50B8
C316 CAP 50A8
C315 CAP 50A8
C314 CAP 29D3
C313 CAP 14C3
C312 CAP 29D3
C311 CAP 14C1
C310 CAP_P 50A2
C309 CAP_P 50A3
C308 CAP_P 50A3
C307 CAP_P 50A2
C306 CAP_P 50A2
C305 CAP 47C4
C304 CAP 14C2
C303 CAP 50C2
C302 CAP_P 50A2
C301 CAP_P 47C4
C300 CAP_P 47C3
C299 CAP 47C4
C298 CAP 47C5
C297 CAP 47C4
C296 CAP_P 47B3
C295 CAP_P 50C5
C294 CAP 50A1
C293 CAP 50A1
C292 CAP 11D4
C291 CAP 11D8
C290 CAP 11D8
C289 CAP 11D8
C288 CAP 11D8
C287 CAP 50A2
C286 CAP 47B7
C285 CAP 47B7
C284 CAP 47B4
C283 CAP 47C7
C282 CAP 47B6
C281 CAP 11C6
C280 CAP 11C6
C279 CAP 11C5
C278 CAP 11C6
C277 CAP 11C8
C276 CAP 14C2
C275 CAP 14C2
C273 CAP 47C5
C272 CAP 27D4
C271 CAP 11C8
C270 CAP 47A5
C269 CAP_P 51D6
C267 CAP 44D6
C266 CAP 47B8
C265 CAP 47B3
C264 CAP 11C4
C263 CAP 14C2
C262 CAP 47B4
C261 CAP 14C1
C260 CAP 31D2
C259 CAP 31D1
C258 CAP 51B2
C257 CAP 51B2
C256 CAP 14C1
C255 CAP 14C2
C254 CAP 51B1
C252 CAP 51B2
C250 CAP 31D2
C249 CAP 31D1
C248 CAP 39B4
C246 CAP_P 51B3
C245 CAP_P 44D5
C244 CAP 14C3
C243 CAP 14C2
C242 CAP 14C2
C241 CAP 50C5
C240 CAP 11C8
C239 CAP 44A4
C238 CAP_P 51C5
C236 CAP 51B3
C235 CAP_P 49B2
C234 CAP 28D7
C233 CAP 28D6
C232 CAP 11A6
C231 CAP 11A6
C230 CAP 13D7
C229 CAP 28C6
C228 CAP 22C3
C227 CAP 22C3
C226 CAP 22D6
C225 CAP 30C2
C224 CAP 22C2
C223 CAP 17C2
C222 CAP 16A8
C220 CAP_P 48C8
C219 CAP 17C2
C218 CAP_P 49B3
C217 CAP 17C1
C216 CAP 20D2
C215 CAP 17A3
C214 CAP 17B3
C213 CAP 22D6
C212 CAP 22D6
C209 CAP 22B6
C208 CAP 41A5
C207 CAP 22C7
C206 CAP 22C2
C205 CAP 20D2
C204 CAP 40C5
C203 CAP 17D2
C202 CAP 17D3
C201 CAP 17D4
C200 CAP 17D4
C199 CAP 18H3
C198 CAP 20B4
C197 CAP 20B2
C196 CAP 20B2
C195 CAP 20B1
C194 CAP 20B4
C193 CAP 17B5
C192 CAP 17D4
C191 CAP 20A5
C190 CAP 22C7
C189 CAP 23C7
C188 CAP 17B1
C187 CAP 17B3
C186 CAP 17B4
C185 CAP 17D3
C184 CAP 17B2
C183 CAP 17D2
C182 CAP 17B1
C181 CAP 17B2
C180 CAP 17D3
C179 CAP 17B3
C178 CAP 17D4
C177 CAP 17B4
C176 CAP 17D2
C175 CAP 18H3
C174 CAP 20B4
C173 CAP 20B2
C172 CAP 20A4
C171 CAP 46A6
C170 CAP 22C7
C169 CAP 17C2
C168 CAP 17C3
C167 CAP 18H5
C166 CAP 20B3
C165 CAP 20B3
C164 CAP 22C6
C163 CAP 22C6
C162 CAP 22C6
C161 CAP 17C4
C160 CAP 23C6
C159 CAP 18H5
C158 CAP 20D5
C157 CAP 20A4
C153 CAP 22C7
C152 CAP 23B5
C151 CAP 17C2
C150 CAP 17C3
C149 CAP 17C3
C148 CAP 17C4
C147 CAP 17C3
C146 CAP 17D1
C145 CAP 18H2
C144 CAP 20D5
C143 CAP 20D5
C142 CAP 20D5
C141 CAP 20B3
C140 CAP 17C2
C139 CAP 17D1
C138 CAP 46B4
C137 CAP 17B4
C136 CAP 17B3
C135 CAP 17C2
C134 CAP 17D3
C133 CAP 18H6
C132 CAP_P 48B2
C131 CAP 23B4
C130 CAP 23B6
C129 CAP 17B3
C128 CAP 22D3
C127 CAP_P 39B2
C126 CAP_P 39C7
C125 CAP 23B6
C124 CAP 18H1
C123 CAP 30C3
C121 CAP 39C4
C120 CAP 17C3
C119 CAP 23B5
C118 CAP 17C3
C117 CAP 17D3
C116 CAP 17B3
C115 CAP 18H3
C114 CAP 32D3
C113 CAP 27D5
C112 CAP 17B2
C111 CAP 17B3
C110 CAP 17D2
C109 CAP 17D3
C108 CAP 42B7
C107 CAP 24B2
C106 CAP_P 48B2
C105 CAP 17B2
C104 CAP 17D4
C103 CAP 17D2
C102 CAP 17C2
C101 CAP 17D2
C100 CAP 17D3
C99 CAP 17D1
C98 CAP 18H6
C97 CAP 17B3
C96 CAP 18H2
C95 CAP 18H5
C94 CAP 17C3
C93 CAP 17C3
C92 CAP 34B6
C91 CAP 17B3
C90 CAP 18H7
C89 CAP 18H2
C88 CAP_P 48B1
C87 CAP 17B2
C86 CAP 18H8
C85 CAP_P 39C6
C84 CAP 18H8
C83 CAP 18H3
C82 CAP 18H4
C81 CAP 18H7
C80 CAP 18H2
C79 CAP 18H4
C78 CAP 18H6
C77 CAP 32D3
C76 CAP 35B7
C75 CAP 18H5
C74 CAP 35B7
C73 CAP 18H7
C72 CAP 18H7
C71 CAP_P 48B1
C70 CAP 18B6
C69 CAP 18B5
C68 CAP 35D6
C67 CAP 35D5
C66 CAP 35D7
C65 CAP 35D7
C64 CAP 40C2
C63 CAP 40B2
C62 CAP 18D6
C61 CAP 18B6
C60 CAP 41C6
C59 CAP_P 48B2
C58 CAP 15B1
C57 CAP 35D6
C56 CAP 35D4
C55 CAP 15C1
C54 CAP 18B8
C53 CAP 35D5
C52 CAP 35D4
C51 CAP 15C3
C50 CAP 15D7
C49 CAP 15D8
C48 CAP 15D8
C47 CAP 14D8
C46 CAP 14D8
C45 CAP 42B8
C44 CAP 35D4
C43 CAP 41D6
C42 CAP 36B8
C41 CAP 35D8
C40 CAP 21B3
C39 CAP 21D5
C38 CAP 21D2
C37 CAP 35D7
C36 CAP 42D7
C35 CAP 43B5
C34 CAP 21B3
C33 CAP 21B2
C32 CAP 21D4
C31 CAP 21B2
C30 CAP 12A6
C29 CAP 21B3
C28 CAP 21B1
C27 CAP 36D8
C26 CAP_P 41D4
C25 CAP_P 40C4
C24 CAP_P 40B4
C23 CAP 21B4
C22 CAP 21B4
C21 CAP 21D5
C20 CAP 21B2
C19 CAP_P 51D4
C18 CAP 51D3
C17 CAP 21D5
C16 CAP 21B4
C15 CAP 21D2
C14 CAP 12A7
C13 CAP_P 41C4
C12 CAP_P 36D7
C11 CAP 21A4
C10 CAP_P 36D7
C9 CAP 21A4
C8 CAP 21A4
C7 CAP_P 33A5
C6 CAP 33B4
C5 CAP_P 33A5
C4 CAP 36B6
C3 CAP 35B1
C2 CAP 33D4
C1 CAP 33C4
BT1 BATTERY 44D6
BS4 PCB_STANDOFF 29D1
BS3 PCB_STANDOFF 29D1
BS2 PCB_STANDOFF 29B6
BS1 PCB_STANDOFF 29B5
*** Part Cross-Reference for the entire design ***
65
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
Q4 TRA_2N7002 42B8
Q3 TRA_2N7002 42C7
Q2 TRA_2N7002 42D7
Q1 TRA_2N7002 51C3
LP1 LPAK4P 42A8
L2501 IND 23A6
L2401 IND 22C7
L103 IND 29B3
L102 FILTER_4P 33B5
L101 FILTER_4P 33C5
L100 FILTER_4P 33D5
L99 IND 42B3
L98 IND 43D7
L97 IND 43D7
L96 IND 42C3
L95 IND 42C2
L94 IND 42C2
L93 IND 42C3
L92 IND 42C7
L91 IND 42C6
L90 IND 42C6
L89 IND 42C7
L88 IND 27D2
L87 IND 27D5
L86 IND 50D6
L85 IND 50D6
L84 IND 50D6
L83 IND 43A7
L82 IND 24D5
L81 IND 43A7
L80 IND 29B3
L79 IND 43B7
L78 IND 29A3
L77 IND 29B7
L76 FILTER_4P 24D5
L75 IND 29A7
L74 FILTER_4P 24C5
L73 IND 29A3
L72 IND 29A7
L71 FILTER_4P 24B5
L70 IND 29A7
L69 IND 29A3
L68 IND 22D2
L67 FILTER_4P 24B5
L66 IND 29A3
L65 IND 29A7
L64 IND 24A5
L63 IND 39D4
L60 IND 43B5
L59 IND 43A5
L58 IND 32D6
L57 IND 44A1
L56 IND 44A1
L53 IND 40D5
L52 IND 40C5
L51 IND 40D6
L50 IND 40C5
L49 IND 40B5
L48 IND 40C6
L47 IND 41B3
L46 IND 40C6
L45 IND 41D3
L44 IND 41C3
L43 IND 41A4
L42 IND 41B3
L41 IND 42B7
L40 IND 42A5
L39 IND 41A3
L36 IND 40B6
L35 IND 41B3
L34 IND 41D3
L33 IND 22B7
L32 IND 36B6
L27 IND 41C3
L26 IND 42A6
L24 IND 45B3
L23 IND 50C3
L22 IND_3P 50A3
L21 IND_3P 49B3
L20 IND 45C3
L19 IND 47B4
L16 IND 28C3
L13 IND 22D7
L12 IND 48B3
L9 IND 25C2
L8 FILTER_4P 36D2
L7 FILTER_4P 36D2
L6 FILTER_4P 36C2
L5 FILTER_4P 36C2
L4 IND 27D5
L3 IND 36D4
L2 IND 33A5
L1 IND 36D4
JAZ1 TP 51A5
J4502 CON_F4ST_S2MT_SM 43B6
J4501 CON_F4ST_S2MT_SM 43B6
J32 CON_F12RT_S2MT_SM 8A8
J31 CON_38SM_MTOR 8C7
J30 CON_38SM_MTOR 8D4
J28 CON_F10ST_D_SMA 29D2
J27 CON_F1ST_S2MT_SM 8B1
J26 CON_F200RT_DDRDIMM_SM2 14D5
J25 CON_F100RT_LP_SM 31D3
J24 CON_M12ST_SM 29B3
J23 CON_F1ST_S2MT_SM 28B7
J22 CON_F20SM_KX 8A4
J21 CON_M3ST_LCK 45C8
J20 CON_38SM_MTOR 8D7
J19 CON_37SM_MTOR 8C4
J18 CON_M4ST_LCK 34B4
J17 CON_M16ST_MICROFIT 50D7
J16 CON_M40ST_NC20 38D2
J15 CON_M40ST_NC20 38D6
J14 CON_M18ST_D_TH 29B5
J13 CON_M40SM_635 29D6
J12 CON_F21ST_D2MT_SM 24C4
J11 CON_F184ST_DDRDIMM 15D5
J10 CON_F4RT_S4MT_TH1 40C7
J9 CON_F14RT_D4MT_TH1 25C5
J8 CON_F4RT_S4MT_TH1 41C1
J7 CON_F4RT_USB_UPRIGHT 33D3
J6 CON_F4RT_USB_UPRIGHT 33B3
J5 CON_FWVERT_SKT 36D1
J4 CON_F4RT_USB_UPRIGHT 33C3
J3 CON_F8RT_S_TH1 42B5
J2 CON_FWVERT_SKT 36C1
J1 CON_RJ45 35C1
FL4 FILTER_LC 25B6
FL3 FILTER_LC 25C6
FL2 FILTER_LC 25C6
F3 FUSE 36D5
F2 FUSE 36D5
DZ1 ZENER 51B1
DS10 LED 51A4
DS9 LED 50D5
DS8 LED 38B6
DS7 LED 38B2
DS6 LED 51A6
DS5 LED 51C8
DS4 LED 30A3
DS3 LED 35A1
DS2 LED 35A1
DS1 LED 35A2
D4901 DIODE_SCHOT 47B2
D48 DIODE_DUAL_SWI 42B6
D47 DIODE 36D6
D46 DIODE_SCHOT 49B1
D45 DIODE_SCHOT 45D6
D44 DIODE_SCHOT 45D2
D43 DIODE_SCHOT 45B4
D42 DIODE_SCHOT 49B5
D41 DIODE_SCHOT 45C4
D40 DIODE_SCHOT 50A4
D39 DIODE_SCHOT 50B4
D38 DIODE_SCHOT 50C6
D37 DIODE_SCHOT 50B2
D36 DIODE_SCHOT 44D6
D35 DIODE_SCHOT 44D6
D34 DIODE_SCHOT 48B2
D33 DIODE_SCHOT 46B6
D32 DIODE_SCHOT 48B5
D31 DIODE_SCHOT 48B3
D30 DIODE_SCHOT 48C5
D29 ZENER_MMBZ15VDLT1 40B5
D28 DIODE_DUAL_6P 25B4
D27 DIODE_DUAL_6P 25B4
D26 ZENER_MMBZ15VDLT1 41B2
D25 ZENER 36B6
D24 ZENER_MMBZ15VDLT1 41B2
D23 DIODE_SCHOT_3P 42A6
D21 DIODE_SCHOT 45B5
D20 DIODE_SCHOT 45D5
D19 DIODE_SCHOT 46D6
D18 DIODE_SCHOT 49C6
D17 DIODE_SCHOT 50B5
D16 DIODE_SCHOT 50C5
D15 DIODE_SCHOT 49B3
D14 DIODE_SCHOT 47B5
D13 DIODE_SCHOT 47C7
D12 DIODE_SCHOT 44D7
D11 DIODE_SCHOT 44D7
D10 DIODE_SCHOT 23B8
D9 DIODE 35B8
D8 DIODE 36D6
D7 DIODE_DUAL_6P 25D4
D6 DIODE_DUAL_6P 25D4
D5 ZENER_MMBZ15VDLT1 40B6
D4 DIODE_DUAL_6P 36B7
D3 DIODE_DUAL_6P 36A7
D2 DIODE_DUAL_6P 36A7
D1 DIODE_DUAL_6P 36A7
C5002 CAP 50A3
C5001 CAP 50C3
C4901 CAP 49B4
C4801 CAP 48B4
C4702 CAP 47B4
C4701 CAP 45B6
C4509 CAP 45C4
C4504 CAP 45B3
C4502 CAP_P 43B5
C4301 CAP 41A6
C4201 CAP 42B6
C4081 CAP 46C7
C3901 CAP 37D1
C3502 CAP 33A8
C3501 CAP 35D6
C3201 CAP 30D4
C3005 CAP 28D4
C3004 CAP 28D4
C3003 CAP 28D5
C3002 CAP 28D5
C3001 CAP 28C5
C2501 CAP_P 23A8
C2302 CAP 21C4
C2301 CAP 21C8
C2202 CAP 20C4
C2201 CAP 20C8
C1914 CAP 8C1
C1913 CAP 8C1
C1912 CAP 8C1
C1911 CAP 8C2
C1910 CAP 8A6
C1904 CAP 8A6
C1903 CAP 8A6
C1902 CAP 8A6
C1901 CAP 8A7
C1802 CAP 16A7
C1801 CAP 16D5
C1702 CAP 15D7
C1602 CAP 14D3
C1601 CAP 14D7
C1515 CAP 15C3
C1514 CAP 15C3
C1513 CAP 15D1
C1512 CAP 15D1
C1511 CAP 15D1
C1510 CAP 15D1
C1509 CAP 15D2
C1508 CAP 15D2
C1507 CAP 15D2
C1506 CAP 15D3
C1505 CAP 15D3
C1504 CAP 15D3
C1503 CAP 15D1
C1502 CAP 15D1
C1501 CAP 15D7
C1421 CAP 14C1
C1420 CAP 14C1
C1419 CAP 14C2
C1418 CAP 14C2
C1417 CAP 14C2
C1416 CAP 14C2
C1415 CAP 14C3
C1414 CAP 14B1
C1413 CAP 14C1
C1412 CAP 14C1
C1411 CAP 14C1
C1410 CAP 14C2
C1409 CAP 14C2
C1408 CAP 14C2
C1407 CAP 14C2
C1406 CAP 14C3
C1405 CAP 14C1
C1404 CAP 14C1
C1403 CAP 14C1
C1402 CAP 14D2
C1401 CAP 14D7
C1103 CAP 22B5
C1102 CAP_P 42B3
C1101 CAP 9D3
C1100 CAP 42C2
C1099 CAP 42C8
C1098 CAP 8B5
C1097 CAP 8A7
C1096 CAP 8A7
C1095 CAP 43D2
C1094 CAP 43C2
C1093 CAP 42A2
C1092 CAP 42B2
C1091 CAP 42B2
C1090 CAP 42B2
C1089 CAP 42B2
C1088 CAP 43D2
C1087 CAP 43D2
C1086 CAP 42A2
C1085 CAP 42B2
C1084 CAP 42B2
C1083 CAP 42B2
C1082 CAP 42B2
C1081 CAP_P 42A3
C1080 CAP_P 42B3
C1079 CAP 43D5
C1078 CAP 43D5
C1077 CAP 43D5
C1076 CAP 43D5
C1075 CAP 42C2
C1074 CAP 42C3
C1073 CAP 42C3
C1072 CAP 42C3
C1071 CAP 42C4
C1070 CAP 42C4
C1069 CAP 42D4
C1068 CAP 42D6
C1067 CAP 42A7
C1066 CAP 42C6
C1065 CAP 42A7
C1064 CAP 42C6
C1063 CAP 42C6
C1062 CAP 42A7
C1061 CAP 42A7
C1060 CAP 42C6
C1059 CAP 42C7
C1058 CAP 8B1
C1057 CAP 8B1
C1056 CAP 8B1
C1055 CAP 8B2
C1054 CAP 8B2
C1053 CAP 46A7
C1052 CAP 45C8
C1051 CAP 45B6
C1050 CAP 45C7
C1049 CAP 45B7
C1048 CAP 45C2
C1047 CAP 45D5
C1046 CAP 45C1
C1045 CAP 45B7
C1044 CAP 45D7
C1043 CAP 8D2
C1042 CAP 8C1
C1041 CAP 8D3
C1040 CAP 8C2
C1039 CAP 45C5
C1038 CAP 45B4
C1037 CAP 8C1
C1036 CAP 4D3
C1035 CAP 4D3
C1034 CAP 45B2
C1033 CAP 8C1
C1032 CAP 8C2
C1031 CAP 8A6
C1030 CAP 45B2
C1029 CAP 45B4
C1028 CAP 8A6
C1027 CAP 8B7
C1026 CAP 8D2
C1025 CAP 8B6
C1024 CAP 8A6
C1023 CAP 8A6
C1022 CAP 8B7
C1021 CAP 8C1
C1020 CAP 8C1
C1019 CAP 49C6
C1018 CAP 8A6
C1017 CAP 8A6
C1016 CAP 8C1
C1015 CAP 49B7
C1014 CAP 8D2
C1013 CAP 8D2
C1012 CAP 8A7
C1011 CAP 8B6
C1010 CAP 8B6
C1009 CAP 8A7
C1008 CAP 8B6
C1007 CAP 8C2
C1006 CAP 45C2
C1005 CAP 49C4
C1004 CAP 49B6
C1003 CAP 8D1
C1002 CAP 8A7
C1001 CAP 8A6
C1000 CAP 49B6
C999 CAP 8D1
C998 CAP 8D2
C997 CAP 8A6
C996 CAP 8A7
C995 CAP 8D2
C994 CAP 8C2
C993 CAP 8D1
C992 CAP 8D3
C991 CAP 8D1
C990 CAP 8D1
C989 CAP 49C3
C988 CAP 8D3
C987 CAP 8D2
C986 CAP 50D4
C985 CAP 50D3
C984 CAP 27D3
C983 CAP 8D3
C982 CAP 8D2
C981 CAP 8D2
C980 CAP 8D2
C979 CAP 50D4
C978 CAP 50D4
C977 CAP 8D1
C976 CAP 8C1
C975 CAP 49C4
C974 CAP 8D1
C973 CAP 8D1
C972 CAP 8D2
C971 CAP 50D4
C970 CAP 50D4
C969 CAP 8D4
C968 CAP 49C4
C967 CAP 8C1
C966 CAP 45D4
C965 CAP 45D4
C964 CAP 45D4
C963 CAP 45D4
C962 CAP 49C3
C961 CAP 8C2
C960 CAP 45B2
C959 CAP 49C4
C958 CAP 8D4
C957 CAP_P 45B1
C956 CAP 50D4
C955 CAP 50D3
C954 CAP 4C2
C953 CAP 45D4
C952 CAP 45D4
C951 CAP 45D4
C950 CAP 45D4
C949 CAP 45C5
C948 CAP 49B4
C947 CAP_P 45C1
C945 CAP 15A2
C944 CAP 45D3
C943 CAP 15A3
C941 CAP 50C5
C940 CAP 50A5
C939 CAP 50A6
C938 CAP 50A4
C937 CAP 50C7
C936 CAP 15D3
C935 CAP_P 47B3
C934 CAP 50B1
C933 CAP 50A6
C932 CAP 50A5
C931 CAP 50B5
C930 CAP 50B8
C929 CAP 14A7
C928 CAP_P 47B4
C927 CAP 50B1
C926 CAP 50C1
C925 CAP 15D3
C924 CAP 38B7
C923 CAP 38B5
C922 CAP 15D2
C921 CAP 38C5
C920 CAP 38C1
C919 CAP 38C7
C918 CAP 51D6
C917 CAP 37C5
C915 CAP 51D7
C914 CAP 15D2
C911 CAP 37C2
C910 CAP 13C1
C909 CAP 13C2
C908 CAP 13C2
C904 CAP 11C6
C903 CAP 11B2
C902 CAP 11C7
C901 CAP 11D7
C900 CAP 11D7
C899 CAP 11D5
C898 CAP 11D5
C897 CAP 11D6
C896 CAP 11D5
C895 CAP 11D5
C894 CAP 11C2
C893 CAP 11C1
C892 CAP 11C4
C891 CAP 11D6
C890 CAP 11D7
C889 CAP 11D6
C888 CAP 11D6
C887 CAP 11D7
C886 CAP 11D5
C885 CAP 11D7
C884 CAP 11D6
C883 CAP 11B2
C882 CAP 11B1
C881 CAP 11B3
C880 CAP 11C5
C879 CAP 11B2
C878 CAP 11C7
C877 CAP 11C7
C876 CAP 11C5
C875 CAP 11B3
C874 CAP 11D5
C873 CAP 11D5
C872 CAP 11D5
C871 CAP 11D6
C870 CAP 11D6
C869 CAP 11D5
C868 CAP 11C2
C867 CAP 11C3
C866 CAP 11C3
C865 CAP 11B1
C864 CAP 15D2
C863 CAP 11C2
C862 CAP 44B7
C861 CAP 44A1
C860 CAP 13D4
C859 CAP 13D3
C858 CAP 13D4
C857 CAP 11C6
C856 CAP 11B7
C855 CAP 11C5
C854 CAP 9D3
C852 CAP 11B2
C851 CAP 11B3
C850 CAP 11B3
C849 CAP 11C6
C848 CAP 30D5
C846 CAP 11D7
C845 CAP 11D6
C844 CAP 11D6
C843 CAP 11C7
C842 CAP 11D6
C841 CAP 11D4
C840 CAP 28A6
C839 CAP 11C6
C838 CAP 11B7
C837 CAP 11C7
C836 CAP 11C6
C835 CAP 11B3
C834 CAP 11D6
C833 CAP 11D3
C832 CAP 11D7
C831 CAP 11D3
C830 CAP 11C3
C829 CAP 11C2
C828 CAP 11C1
C827 CAP 11C5
C826 CAP 11B7
C825 CAP 11B7
C824 CAP 11D6
C823 CAP 11D7
C822 CAP 11C1
C821 CAP 11C1
C820 CAP 28C3
C819 CAP 15D3
C818 CAP 11B5
C817 CAP 11C6
C816 CAP 11B6
C815 CAP 11C6
C814 CAP 11B6
C813 CAP 11B5
C812 CAP 11C2
C811 CAP 11D2
C810 CAP 11D2
C809 CAP 11C3
C808 CAP 11D2
C807 CAP 11B2
C806 CAP 11C2
C805 CAP 11B2
C803 CAP 11B6
C802 CAP 11B5
C801 CAP 11B7
C800 CAP 11D2
C799 CAP 11D1
C798 CAP 11D1
C797 CAP 11D3
C796 CAP 11C3
C795 CAP 28C3
C794 CAP 11C5
C793 CAP 11C6
C792 CAP 11B6
C791 CAP 11B6
C790 CAP 11D1
C789 CAP 11D3
C788 CAP 11D3
C787 CAP 11D3
C786 CAP 27D3
C785 CAP 28C3
C784 CAP 28A6
C783 CAP 44D5
C782 CAP 11B7
C781 CAP 11B5
C780 CAP 11D2
C779 CAP 11D1
C778 CAP 22B6
C777 CAP 11C1
C776 CAP 11B2
C775 CAP 11C3
C774 CAP 11C1
C773 CAP 51C6
C768 CAP 11B6
C767 CAP 11C6
C766 CAP 11D1
C765 CAP 11D3
C764 CAP 11D3
C763 CAP 11D2
C762 CAP 11C1
C761 CAP 11B3
C760 CAP 16D6
C759 CAP 44D5
C755 CAP 11B6
C754 CAP 11B5
C753 CAP 11B6
C752 CAP 11B6
C751 CAP 11B7
C750 CAP 11B6
C749 CAP 11D3
C748 CAP 11D2
C747 CAP 11D1
C746 CAP 11D3
C745 CAP 11C3
C744 CAP 11B1
C743 CAP 11B3
C742 CAP 51C6
C741 CAP 15D3
C736 CAP 11B5
C735 CAP 11B7
C734 CAP 11D2
C733 CAP 11A6
C732 CAP 11D1
C731 CAP 11D1
C730 CAP 11D3
C729 CAP 11B3
C728 CAP 11C3
C727 CAP 11D4
C726 CAP 15D3
C725 CAP 11C7
C724 CAP 11B5
C723 CAP 11B6
C722 CAP 11B7
C721 CAP 11D3
C720 CAP 11C3
C719 CAP 11D2
C718 CAP 11B1
C717 CAP 11C3
C716 CAP 11B2
C715 CAP 44B2
C714 CAP 11B5
C713 CAP 28D5
C712 CAP 11B1
C711 CAP 11A5
C710 CAP 11A5
C709 CAP 11A5
C708 CAP 11B3
C707 CAP 11B3
C706 CAP 44A6
C705 CAP 44A6
C704 CAP 28D5
C703 CAP 28D6
C702 CAP 11D4
C701 CAP 44B2
C700 CAP 11C7
C699 CAP 11B7
C698 CAP 11C5
C697 CAP 11A6
C696 CAP 11A4
C695 CAP 11A4
C694 CAP 11A4
C693 CAP 11A6
C692 CAP 28D6
C691 CAP 11C2
C690 CAP 11B2
C689 CAP 11C1
66
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
R629 RES 28D5
R628 RES 28D5
R627 RES 37D5
R626 RES 37D2
R625 RES 12B6
R624 RES 37A7
R623 RES 37D5
R622 RES 16C6
R621 RES 30C6
R620 RES 28D5
R619 RES 16D6
R618 RES 30C7
R617 RES 30D8
R616 RES 30D8
R615 RES 51A6
R614 RES 51A5
R613 RES 29A8
R612 RES 51A5
R611 RES 28A6
R610 RES 46B4
R609 RES 51A5
R608 RES 51A5
R607 RES 51A5
R606 RES 44A5
R605 RES 44A5
R604 RES 44A3
R603 RES 24D5
R602 RES 23A7
R601 RES 51B3
R600 RES 24D6
R599 RES 22A8
R598 RES 26D3
R597 RES 26C3
R596 RES 26D5
R595 RES 26D5
R594 RES 24D5
R593 RES 24C5
R592 RES 23A7
R591 RES 24C6
R590 RES 28D6
R589 RES 28A8
R588 RES 26C3
R587 RES 16B3
R586 RES 28D6
R585 RES 29D6
R584 RES 29D7
R583 RES 26D3
R582 RES 24C5
R581 RES 24B5
R580 RES 16B3
R579 RES 30A8
R578 RES 30B6
R577 RES 28C7
R576 RES 34C1
R575 RES 34C1
R574 RES 28C8
R573 RES 28C6
R572 RES 28D8
R571 RES 28D8
R570 RES 24B6
R569 RES 22B3
R568 RES 24B5
R567 RES 24B5
R566 RES 30D6
R565 RES 28D5
R564 RES 23C5
R563 RES 27A6
R562 RES 22C6
R561 RES 26D7
R560 RES 26C7
R559 RES 24B6
R558 RES 17B7
R557 RES 22C2
R556 RES 22C2
R555 RES 22C3
R554 RES 22C7
R553 RES 26D8
R552 RES 26C8
R551 RES 24A5
R550 RES 24A5
R549 RES 16A8
R548 RES 27A7
R547 RES 24A6
R546 RES 24A5
R545 RES 16A7
R543 RES 26B1
R542 RES 26B6
R541 RES 26A6
R540 RES 24A6
R537 RES 27A5
R535 RES 26D1
R533 RES 26D6
R532 RES 39C4
R531 RES 39C2
R529 RES 48C6
R528 RES 39C4
R527 RES 48B7
R526 RES 42B7
R525 RES 42B7
R524 RES 39B4
R523 RES 48C6
R522 RES 42B8
R521 RES 39C5
R519 RES 46A5
R518 RES 46B5
R517 RES 39C5
R515 RES 48B5
R512 RES 15C3
R511 RES 30A3
R510 RES 30B4
R509 RES 19A7
R508 RES 15B3
R507 RES 15B1
R506 RES 19A7
R505 RES 48C5
R504 RES 48C3
R503 RES 48B6
R502 RES 39D7
R501 RES 39C7
R500 RES 19C2
R499 RES 48C3
R498 RES 43A2
R497 RES 15C1
R496 RES 48C2
R495 RES 15B1
R494 RES 32B7
R493 RES 28A2
R492 RES 35B1
R491 RES 35B2
R490 RES 32B3
R489 RES 43B4
R488 RES 43B4
R487 RES 43A6
R486 RES 35B2
R485 RES 35B2
R484 RES 32A7
R483 RES 19A6
R482 RES 39C6
R481 RES 39B6
R480 RES 32B2
R479 RES 19A6
R478 RES 41B5
R477 RES 41B4
R476 RES 32B3
R475 RES 48B1
R474 RES 40C3
R473 RES 41D7
R472 RES 41C7
R471 RES 15C1
R470 RES 32B3
R469 RES 32C3
R468 RES 32C3
R467 RES 32C2
R466 RES 32C2
R465 RES 32C3
R464 RES 32C3
R463 RES 18B8
R462 RES 40B3
R461 RES 33D7
R460 RES 33D7
R459 RES 33C7
R458 RES 33C7
R457 RES 33B7
R456 RES 33B7
R455 RES 33D6
R454 RES 33D5
R453 RES 33C6
R452 RES 33C5
R451 RES 33B6
R450 RES 33B5
R449 RES 26A6
R448 RES 40B3
R447 RES 41D6
R446 RES 41C6
R445 RES 26B6
R444 RES 41C6
R443 RES 26A4
R442 RES 40C4
R441 RES 41D6
R440 RES 41A8
R439 RES 26B4
R438 RES 36C8
R437 RES 40B4
R436 RES 40B4
R435 RES 40C4
R434 RES 40C4
R433 RES 36B6
R432 RES 36C7
R431 RES 36C7
R430 RES 36B6
R429 RES 19A3
R428 RES 19A3
R427 RES 26B5
R426 RES 26A5
R425 RES 36C7
R424 RES 36C7
R423 RES 36B5
R422 RES 36C6
R421 RES 43B5
R420 RES 40B4
R419 RES 41D4
R418 RES 36C6
R417 RES 36C7
R416 RES 19A3
R415 RES 19A3
R414 RES 43B5
R413 RES 43B5
R412 RES 41C4
R411 RES 36C5
R410 RES 40B5
R409 RES 36D7
R408 RES 26A6
R407 RES 40C5
R406 RES 41D4
R405 RES 15C2
R404 RES 36D8
R403 RES 19B2
R402 RES 36B4
R401 RES 26B6
R400 RES 41C4
R399 RES 26B7
R398 RES 28A2
R397 RES 26A7
R396 RES 28A2
R395 RES 36B7
R394 RES 35C2
R393 RES 35C2
R392 RES 41B3
R391 RES 35C2
R390 RES 35C1
R389 RES 45B6
R388 RES 45B6
R387 RES 45B5
R386 RES 45B5
R385 RES 46D6
R384 RES 45C5
R383 RES 6C8
R382 RES 6C8
R381 RES 6C8
R380 RES 6C7
R379 RES 6C8
R378 RES 6C7
R377 RES 6C7
R376 RES 6C7
R375 RES 6C6
R374 RES 6C6
R373 RES 32A7
R372 RES 46D4
R371 RES 49B6
R370 RES 50D5
R369 RES 49C6
R368 RES 6C4
R367 RES 6C4
R366 RES 9C7
R365 RES 6C4
R364 RES 6C5
R363 RES 6C5
R362 RES 45B3
R361 RES 45B3
R360 RES 9C6
R359 RES 9C7
R358 RES 9C6
R357 RES 6C4
R356 RES 6C4
R355 RES 9C7
R354 RES 9C6
R353 RES 9A7
R352 RES 9C6
R351 RES 9C5
R350 RES 7A7
R349 RES 7B7
R348 RES 7C7
R347 RES 7C7
R346 RES 7C7
R345 RES 9A7
R344 RES 9A7
R343 RES 9C6
R342 RES 9A7
R341 RES 9C5
R340 RES 9D5
R339 RES 9D5
R338 RES 9C5
R337 RES 50B5
R336 RES 50C5
R335 RES 50A5
R334 RES 49B1
R333 RES 28A2
R332 RES 50A7
R331 RES 50B8
R330 RES 50A8
R329 RES 29D3
R328 RES 29D3
R326 RES 35B3
R324 RES 42B5
R323 RES 50D2
R322 RES 50C2
R321 RES 9A5
R320 RES 47B5
R319 RES 9A5
R318 RES 47C6
R317 RES 47C5
R316 RES 47B7
R315 RES 47B3
R314 RES 8B2
R313 RES 8A2
R312 RES 4A8
R311 RES 4B8
R310 RES 9A4
R309 RES 47B7
R308 RES 8B1
R307 RES 34D7
R306 RES 28B8
R305 RES 28A2
R304 RES 47B3
R303 RES 34D7
R302 RES 51A6
R301 RES 47B5
R300 RES 51C8
R299 RES 47B3
R298 RES 44B1
R297 RES 44D6
R296 RES 47B7
R295 RES 47B3
R294 RES 28C1
R293 RES 31C5
R292 RES 28C7
R291 RES 28C7
R290 RES 44D8
R289 RES 28C8
R288 RES 12D5
R287 RES 44D5
R286 RES 12A3
R285 RES 31C1
R284 RES 51A3
R283 RES 51B3
R282 RES 44D7
R281 RES 44D7
R280 RES 44D8
R279 RES 51B2
R278 RES 51B3
R277 RES 51B2
R276 RES 28C8
R275 RES 34C4
R274 RES 28C7
R273 RES 37D2
R272 RES 28B3
R271 RES 28B3
R270 RES 37D2
R269 RES 34C4
R268 RES 38B4
R267 RES 28B1
R266 RES 37C6
R265 RES 38B4
R264 RES 28D1
R263 RES 37D4
R262 RES 30C8
R261 RES 12D5
R259 RES 30C7
R258 RES 37D5
R257 RES 34B3
R256 RES 30C8
R255 RES 30C7
R254 RES 34B4
R253 RES 30C8
R252 RES 30C7
R251 RES 51B3
R250 RES 27A7
R249 RES 42B5
R248 RES 27A7
R247 RES 28A2
R246 RES 23B7
R245 RES 42B5
R244 RES 27A5
R243 RES 27A6
R242 RES 42B5
R241 RES 27A5
R240 RES 42B6
R239 RES 42B7
R238 RES 27A6
R237 RES 23C5
R236 RES 26D2
R235 RES 12A1
R234 RES 16D1
R233 RES 16B3
R232 RES 28C6
R231 RES 28C8
R230 RES 30C6
R228 RES 28C7
R227 RES 30C6
R226 RES 16C7
R225 RES 16D7
R224 RES 16C7
R223 RES 16D1
R222 RES 16D3
R221 RES 16D1
R220 RES 16C7
R219 RES 30D6
R218 RES 30D6
R217 RES 16D3
R216 RES 16B7
R215 RES 16C7
R214 RES 12B1
R213 RES 23C5
R212 RES 30B3
R211 RES 16C7
R210 RES 17B7
R208 RES 23D2
R207 RES 23D2
R206 RES 22D6
R205 RES 16A8
R204 RES 16B8
R203 RES 16C8
R200 RES 22D6
R199 RES 22D6
R198 RES 17C1
R197 RES 16A7
R196 RES 17A3
R195 RES 17A3
R194 RES 22B6
R193 RES 17A2
R192 RES 17A2
R191 RES 22B6
R188 RES 22B2
R187 RES 19A6
R186 RES 19A6
R185 RES 22B6
R184 RES 23C6
R183 RES 22C3
R182 RES 41A4
R181 RES 41A4
R180 RES 40D5
R179 RES 22C6
R178 RES 22C7
R177 RES 17A5
R176 RES 20A4
R175 RES 40D4
R174 RES 22C6
R173 RES 22C7
R172 RES 12A1
R171 RES 22B6
R170 RES 22B5
R169 RES 17A4
R168 RES 17A7
R167 RES 19A7
R166 RES 20A4
R165 RES 35C4
R164 RES 18G3
R163 RES 20A4
R162 RES 41A5
R161 RES 16D1
R160 RES 17A5
R159 RES 19A7
R158 RES 19D2
R157 RES 23B3
R156 RES 19C2
R155 RES 18G2
R154 RES 18G3
R153 RES 19A7
R152 RES 20A5
R151 RES 20A4
R150 RES 48C5
R149 RES 23B5
R148 RES 19C2
R147 RES 19A7
R146 RES 19A7
R145 RES 22D3
R144 RES 23B2
R143 RES 18G2
R142 RES 26C5
R141 RES 23B5
R140 RES 19A7
R139 RES 30B4
R138 RES 30B3
R137 RES 12B1
R136 RES 26C5
R135 RES 42D7
R134 RES 26B8
R133 RES 22D3
R132 RES 19D2
R131 RES 18D3
R130 RES 18D2
R129 RES 32D3
R128 RES 32B8
R127 RES 32B8
R126 RES 26C6
R125 RES 26D5
R124 RES 23C5
R123 RES 19D2
R122 RES 19A7
R121 RES 42C8
R120 RES 42B8
R119 RES 23C5
R118 RES 22D3
R117 RES 18G3
R116 RES 26C6
R115 RES 23C5
R114 RES 23C5
R113 RES 23D5
R112 RES 23D6
R111 RES 18G2
R110 RES 42C8
R109 RES 42D6
R108 RES 42D7
R107 RES 23D5
R106 RES 19C2
R105 RES 19C2
R104 RES 19B2
R103 RES 19B2
R102 RES 23C5
R101 RES 19A7
R100 RES 26A8
R99 RES 42D8
R98 RES 23D6
R97 RES 19A7
R96 RES 35B1
R95 RES 18A5
R94 RES 26A3
R93 RES 12A8
R92 RES 23D6
R91 RES 23D6
R90 RES 18G3
R89 RES 32D3
R88 RES 18A5
R87 RES 26B3
R86 RES 23D6
R85 RES 23D6
R84 RES 18G2
R83 RES 18A5
R82 RES 12A8
R81 RES 19A7
R80 RES 17A5
R79 RES 26C2
R78 RES 32A7
R77 RES 26D2
R76 RES 35B8
R75 RES 35B8
R74 RES 26D2
R73 RES 26C2
R72 RES 17A5
R71 RES 18D6
R70 RES 18D3
R69 RES 19A4
R68 RES 19A4
R67 RES 18D2
R66 RES 18D2
R65 RES 19A4
R64 RES 18D3
R63 RES 19A4
R62 RES 18A2
R61 RES 18A3
R60 RES 19A4
R59 RES 18C2
R58 RES 18D3
R57 RES 19A4
R56 RES 18D2
R55 RES 19A4
R54 RES 18D3
R53 RES 19A4
R52 RES 18C5
R51 RES 42B7
R50 RES 18B7
R49 RES 18B7
R48 RES 33B7
R47 RES 33B7
R46 RES 33C7
R45 RES 33C7
R44 RES 33D7
R43 RES 33D7
R42 RES 35B4
R41 RES 18B8
R40 RES 35C4
R39 RES 36D6
R38 RES 35C7
R37 RES 35C4
R36 RES 18B8
R35 RES 36D6
R34 RES 35C7
R33 RES 35C4
R32 RES 19A3
R31 RES 19A3
R30 RES 35C3
R29 RES 35B7
R28 RES 35A8
R27 RES 35C4
R26 RES 35B4
R25 RES 19A3
R24 RES 19A3
R23 RES 51D3
R22 RES 51C4
R21 RES 51D3
R20 RES 19C2
R19 RES 25B5
R18 RES 21A4
R17 RES 21A3
R16 RES 36B3
R15 RES 36C3
R14 RES 36C3
R13 RES 36C3
R12 RES 36C3
R11 RES 36C4
R10 RES 36C4
R9 RES 36C4
R8 RES 36C4
R7 RES 25B5
R6 RES 21A4
R5 RES 21A3
R4 RES 21A4
R3 RES 25B4
R2 RES 25B4
R1 RES 36D4
Q54 TRA_2N7002 15B2
Q53 TRA_2N7002 15A2
Q52 TRA_2N7002 15B2
Q51 TRA_SUD70N03 45B4
Q50 TRA_SUD50N03 45B4
Q49 TRA_SUD70N03 45B4
Q48 TRA_SUD50N03 50A4
Q47 TRA_SUD50N03 50A4
Q46 TRA_IRF7807Z 50C4
Q45 TRA_IRF7807Z 50B4
Q44 TRA_SUD50N03 45C4
Q43 TRA_SUD70N03 45C4
Q42 TRA_2N7002 15C2
Q41 TRA_2N7002 15B2
Q40 TRA_SUD70N03 45C4
Q39 TRA_2N3904 50C7
Q38 TRA_2N7002 51B6
Q37 TRA_FDC602P 51C6
Q36 TRA_2N7002 42D3
Q35 TRA_2N7002 40D4
Q34 TRA_SUD70N03 48B4
Q33 TRA_2N3904 43A2
Q32 TRA_2N7002 39C7
Q31 TRA_2N7002 41A8
Q30 TRA_2N3904 36C7
Q29 TRA_2N7002 45D8
Q28 TRA_SUD50N03 49B4
Q27 TRA_SUD70N03 49B4
Q26 TRA_IRF7807Z 47B5
Q25 TRA_IRF7807Z 47B5
Q24 TRA_2N7002 50C2
Q23 TRA_2N7002 50C2
Q22 TRA_2N7002 50D1
Q21 TRA_2N7002 50C1
Q20 TRA_FDC602P 51D7
Q19 TRA_2N7002 51A6
Q18 TRA_2N7002 51A7
Q17 TRA_2N7002 51B6
Q16 TRA_2N7002 51A7
Q15 TRA_2N7002 51B7
Q14 TRA_2N7002 51C7
Q13 TRA_2N7002 51B2
Q12 TRA_2N3904 44D7
Q11 TRA_FDC602P 51C2
Q10 TRA_2N7002 22B7
Q9 TRA_SUD50N03 48C4
Q8 TRA_SUD50N03 48B4
Q7 TRA_SUD70N03 48B4
Q6 TRA_2N7002 42B6
Q5 TRA_2N7002 41A5
67
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
ZT13 HOLE_VIA 18B2
ZT12 HOLE_VIA 18B2
ZT11 HOLE_VIA 18B2
ZT10 HOLE_VIA 18B2
ZT9 HOLE_VIA 18B2
ZT8 HOLE_VIA 18C2
ZT7 HOLE_VIA 18A2
ZT6 HOLE_VIA 18C2
ZT5 HOLE_VIA 18C2
ZT4 HOLE_VIA 18A2
ZT3 HOLE_VIA 18C2
ZT2 HOLE_VIA 18C2
ZT1 HOLE_VIA 18C2
ZH7 MTGHOLE 4B1
ZH6 SLOT 4B2
ZH5 SLOT 4B1
ZH4 MTGHOLE 4B2
ZH3 MTGHOLE 39A7
Y7 CRYSTAL 32D3
Y6 CRYSTAL 35B7
Y5 CRYSTAL 28A6
Y4 CRYSTAL_4PIN 44B2
Y3 CRYSTAL 44A6
Y2 CRYSTAL_4PIN 22B3
Y1 CRYSTAL 36C6
XW49 SHORT 30B5
XW48 SHORT 16A5
XW47 SHORT 9A2
XW46 SHORT 28A4
XW45 SHORT 28A4
XW44 SHORT 28A5
XW43 SHORT 28A5
XW42 SHORT 28A5
XW41 SHORT8L25_WITH_ALTS 49B5
XW39 SHORT8L25_WITH_ALTS 48B5
XW38 SHORT 39A7
XW37 SHORT 39B7
XW34 SHORT 39A7
XW33 SHORT 41B7
XW32 SHORT 39B7
XW31 SHORT8L25_WITH_ALTS 45B3
XW30 SHORT8L25_WITH_ALTS 45A3
XW29 SHORT8L25_WITH_ALTS 45C6
XW28 SHORT8L25_WITH_ALTS 45B1
XW27 SHORT8L25_WITH_ALTS 45C3
XW26 SHORT8L25_WITH_ALTS 45C3
XW25 SHORT8L25_WITH_ALTS 49C4
XW24 SHORT8L25_WITH_ALTS 49C4
XW23 SHORT8L25_WITH_ALTS 49B2
XW22 SHORT8L25_WITH_ALTS 50B5
XW21 SHORT8L25_WITH_ALTS 50A6
XW20 SHORT8L25_WITH_ALTS 50B3
XW19 SHORT8L25_WITH_ALTS 50B2
XW18 SHORT8L25_WITH_ALTS 50A3
XW17 SHORT8L25_WITH_ALTS 50B8
XW16 SHORT8L25_WITH_ALTS 50A3
XW15 SHORT8L25_WITH_ALTS 47A6
XW14 SHORT8L25_WITH_ALTS 47C5
XW13 SHORT8L25_WITH_ALTS 47B4
XW12 SHORT8L25_WITH_ALTS 47B3
XW7 SHORT8L25_WITH_ALTS 48C7
XW6 SHORT8L25_WITH_ALTS 48B4
XW5 SHORT 39B7
XW4 SHORT 39B7
XW2 SHORT8L25_WITH_ALTS 48B2
XW1 SHORT 39B7
VR4 VREG_MIC39102 46C5
VR3 VREG_EZ1582 51B4
VR2 VREG_MIC39102 46B6
VR1 VREG_LM1117 39C7
U3501 SWI_TPS2023 33A7
U49 AMP_SN0210045A 42D5
U48 NC7WZ08 41A7 43C7
U47 LTC3707 45C6
U46 SN74LVC1G04 44D1
U45 DCDC_SC2602 49C5
U42 FEPR_1MX8 30C2
U41 SDRAM_DDR_4MX32 20D2 20D3
U40 DCDC_SC2602 48C6
U39 NV18B 17D6 18G5 18G7 22D4 23D4
U38 SN74AUC1G04 30B3
U37 TRANSCEIVER_BCM5221 35C5
U36 SDRAM_DDR_4MX32 21D2 21D3
U35 TRA_SI4435DY 51D3
U34 APOLLO_MPC7445_360 4C5 5D3 5D6
U33 LTC3707 50B6
U31 DCDC_SC2602 47B6
U29 CBTV4020 13C2
U28 VREG_TL431 44D8
U27 CBTV4020 13D4
U26 M16C62 44C5
34C5 37D8
U25 INTREPID 9D2 10D5 10D7 12D7 16D5 28C4 30D5
U23 MAX6328 44A5
U22 CBTV4020 13B6
U21 VDET_MC33465N_22ATR 44A4
U20 VREG_LM1117 23A8
U19 VREG_LT1962 28D7
U18 CBTV4020 13D7
U16 SHNTREG_TLV431A 20A5
U15 TAS3004 39C3
U14 VREG_LP2951 39D6
U13 OPAMP_TLV2362 43A3 43A4
U12 SDRAM_DDR_4MX32 20D6 20D7
U11 UPD720101_FBGA 32C5
U10 NC7WZ08 42C7
U9 CLK_GEN_CY25811 22A7
U8 AMP_TPA6112A2 41D5
U7 SHNTREG_TLV431A 18B8
U6 OPAMP_TLV2362 40B3 40C3
U5 SDRAM_DDR_4MX32 21D6 21D7
U4 FW802A 36C5
U3 VREG_LP2951 36D7
U2 SHNTREG_TLV431A 21A4
U1 SIL1162 27C3
T1 XFR_100BT_MDIX 35C3
SP4 SPRING_CLIP_1P_EMI 10D1
SP3 SPRING_CLIP_1P_EMI 10D1
SP2 SPRING_CLIP_1P_EMI 10D2
SP1 SPRING_CLIP_1P_EMI 10D2
S2 SWI_TACT 44A3
S1 SWI_TACT_2P1 44B2
RP119 RPAK4P 34C1
RP118 RPAK4P 37C2
RP117 RPAK4P 28C1 28C1 28D1 28D1
RP116 RPAK4P 12B3
RP115 RPAK4P 37A4 37A5 37B4 37B5
RP114 RPAK4P 37A2 37B2
RP113 RPAK4P 28B8
RP112 RPAK4P 34C4
RP111 RPAK4P 37C4 37C4 37C5 37C5
RP110 RPAK4P 28A8
RP109 RPAK4P 12A5
RP108 RPAK4P 28A3 28B3
RP107 RPAK4P 37B4 37B4 37B5
RP106 RPAK4P 37B2
RP105 RPAK4P 12B5
RP104 RPAK4P 37B4 37B5 37C5
RP103 RPAK4P 37B2 37C2
RP102 RPAK4P 12C5
RP101 RPAK4P 34B1
RP100 RPAK4P 28A8
RP99 RPAK4P 16C1
RP98 RPAK4P 16B3 16C3 16C3
RP97 RPAK4P 19D5
RP96 RPAK4P 19C5
RP95 RPAK4P 18F2 18F2 18F3
RP94 RPAK4P 18F2 18F3
RP93 RPAK4P 18E2 18E3
RP92 RPAK4P 19C7
RP91 RPAK4P 19C7 19D7
RP90 RPAK4P 19C7
RP89 RPAK4P 19C5
RP88 RPAK4P 19C5
RP87 RPAK4P 19B5
RP86 RPAK4P 19B5
RP85 RPAK4P 18B3 18C2 18C3
RP84 RPAK4P 18B2 18B2 18B3
RP83 RPAK4P 18B2 18B3 18B3
RP82 RPAK4P 19B7 19C7 19C7
RP81 RPAK4P 19B7
RP80 RPAK4P 19B7
RP79 RPAK4P 7A5 7C5
RP78 RPAK4P 7A7
RP77 RPAK4P 31C7
RP76 RPAK4P 34C7
RP75 RPAK4P 31C7
RP74 RPAK4P 28A8
RP73 RPAK4P 31C7
RP72 RPAK4P 31C7
RP71 RPAK4P 12C2 12D2
RP70 RPAK4P 34C7
RP69 RPAK4P 30B8
RP68 RPAK4P 12D3
RP67 RPAK4P 31B7
RP66 RPAK4P 28A8
RP65 RPAK4P 34C4
RP64 RPAK4P 31B7
RP63 RPAK4P 30B8
RP62 RPAK4P 12C3
RP61 RPAK4P 31B7
RP60 RPAK4P 28C2
RP59 RPAK4P 31C7
RP58 RPAK4P 31C7
RP56 RPAK4P 31B7
RP54 RPAK4P 31B7
RP52 RPAK4P 12B2
RP51 RPAK4P 12C2
RP50 RPAK4P 16B1
RP49 RPAK4P 16B1 16B1 16C1
RP48 RPAK4P 16B3
RP47 RPAK4P 17A7
RP46 RPAK4P 17B7
RP45 RPAK4P 17B7
RP44 RPAK4P 17C7
RP43 RPAK4P 17C7
RP42 RPAK4P 17D7
RP41 RPAK4P 17C7
RP40 RPAK4P 17D7
RP39 RPAK4P 28D2
RP38 RPAK4P 30B6
RP37 RPAK4P 16B3 16C3 16C3
RP36 RPAK4P 17A7
RP35 RPAK4P 17B7
RP34 RPAK4P 17C7
RP33 RPAK4P 17B7
RP32 RPAK4P 17D7
RP31 RPAK4P 17C7
RP30 RPAK4P 17D7
RP29 RPAK4P 19D5
RP28 RPAK4P 19D5
RP27 RPAK4P 19D5
RP26 RPAK4P 19C5
RP25 RPAK4P 19C5 19D5
RP24 RPAK4P 19C5
RP23 RPAK4P 18E2 18E3
RP22 RPAK4P 18F2 18F3 18G2 18G3
RP21 RPAK4P 19D7
RP20 RPAK4P 19D7
RP19 RPAK4P 19D7
RP18 RPAK4P 19D7
RP17 RPAK4P 19C7
RP16 RPAK4P 35A4
RP15 RPAK4P 35B7 35B8
RP14 RPAK4P 19C7
RP13 RPAK4P 19B7
RP12 RPAK4P 19B7
RP11 RPAK4P 19B7
RP10 RPAK4P 19C7
RP9 RPAK4P 18C2 18C2 18C3 18C3
RP8 RPAK4P 18A2 18A3 18B2
RP7 RPAK4P 19B5
RP6 RPAK4P 19B5
RP5 RPAK4P 19B5
RP4 RPAK4P 19B5 19C5
RP3 RPAK4P 36B7
RP2 RPAK4P 36C7
RP1 RPAK4P 35C7
R5301 RES 51C1
R5003 RES 50A1
R5002 RES 50A3
R5001 RES 50B3
R4901 RES 49B4
R4803 RES 48C3
R4802 RES 48B4
R4801 RES 46C7
R4710 RES 47B4
R4709 RES 45B6
R4708 RES 45C5
R4707 RES 45D3
R4706 RES 45D3
R4705 RES 45B3
R4704 RES 45B3
R4703 RES 45B3
R4702 RES 45B6
R4701 RES 45B6
R4509 RES 45C4
R4508 RES 45B3
R4507 RES 43C5
R4506 RES 43A6
R4505 RES 43A6
R4504 RES 43B6
R4503 RES 43A6
R4502 RES 43A6
R4501 RES 43B6
R4401 RES 43C7
R4301 RES 41A7
R4203 RES 42B5
R4202 RES 42C5
R4201 RES 42B6
R3501 RES 33A8
R3002 RES 28A2
R3001 RES 28A2
R1518 RES 15A7
R1517 RES 15A7
R1516 RES 15B7
R1515 RES 15B7
R1514 RES 15B7
R1513 RES 15B7
R1512 RES 15B7
R1511 RES 15B7
R1510 RES 15B7
R1509 RES 15C7
R1508 RES 15C7
R1507 RES 15C7
R1506 RES 15C7
R1505 RES 15C7
R1504 RES 15C7
R1503 RES 15C7
R1418 RES 14A7
R1417 RES 14B7
R1416 RES 14B7
R1415 RES 14B7
R1414 RES 14B7
R1413 RES 14B7
R1412 RES 14B7
R1411 RES 14B7
R1410 RES 14C7
R1409 RES 14C7
R1408 RES 14C7
R1407 RES 14C7
R1406 RES 14C7
R1405 RES 14C7
R1404 RES 14C7
R1403 RES 14D7
R1402 RES 14A2
R1401 RES 14B2
R1029 RES 32A7
R1028 RES 32A7
R1027 RES 17C7
R1026 RES 17C7
R1025 RES 17A4
R1024 RES 17A4
R1023 RES 26C1
R1022 RES 26C2
R1021 RES 26A1
R1020 RES 23C6
R1019 RES 23C6
R1018 RES 51C2
R1017 RES 51C3
R1016 RES 36D7
R1015 RES 29B4
R1014 RES 50C8
R1013 RES 50D7
R1012 RES 51B2
R1011 RES 33B5
R1010 RES 33B5
R1009 RES 33C5
R1008 RES 33C5
R1007 RES 33D5
R1006 RES 33D5
R1005 RES 28C1
R1004 RES 27B3
R1003 RES 27B3
R1002 RES 27B4
R1001 RES 27C4
R1000 RES 27B5
R999 RES 23C1
R998 RES 23C1
R997 RES 23C1
R996 RES 23C1
R995 RES 23C1
R994 RES 23C1
R993 RES 23C1
R992 RES 23C1
R991 RES 23D2
R990 RES 23D2
R989 RES 43D2
R988 RES 43C2
R987 RES 43D5
R986 RES 43D5
R985 RES 42D3
R984 RES 42D4
R983 RES 42C4
R982 RES 42D6
R981 RES 42D6
R980 RES 27C2
R979 RES 27C2
R978 RES 27C2
R977 RES 27C2
R976 RES 27C2
R975 RES 27C2
R974 RES 27C2
R973 RES 27C2
R972 RES 27C3
R971 RES 27C4
R970 RES 27B4
R969 RES 27C4
R968 RES 27B4
R967 RES 27C5
R966 RES 27B4
R965 RES 27B5
R964 RES 23D1
R963 RES 23D1
R962 RES 23D1
R961 RES 23D1
R960 RES 23D2
R959 RES 46C5
R958 RES 46B5
R957 RES 22A6
R956 RES 22A6
R955 RES 22A6
R954 RES 22A6
R953 RES 22A7
R952 RES 22A7
R951 RES 31C2
R950 RES 31D3
R949 RES 31D4
R948 RES 31D4
R947 RES 23D2
R946 RES 23D2
R945 RES 46B7
R944 RES 37D2
R943 RES 37D2
R942 RES 22A7
R941 RES 37D1
R940 RES 8A4
R939 RES 8A4
R937 RES 8A4
R936 RES 45A5
R935 RES 45A5
R934 RES 45C8
R933 RES 45D7
R932 RES 45C7
R931 RES 45D7
R930 RES 46C5
R929 RES 45C5
R928 RES 45C5
R927 RES 46C5
R926 RES 7C3
R925 RES 7C5
R924 RES 7D5
R923 RES 7A5
R922 RES 7A5
R921 RES 7B5
R920 RES 7B3
R919 RES 7B3
R918 RES 7C3
R917 RES 7B3
R916 RES 7B3
R915 RES 7C3
R914 RES 7C3
R913 RES 7C3
R912 RES 7A5
R911 RES 7B5
R910 RES 7B5
R909 RES 7B5
R908 RES 45D6
R907 RES 7B3
R906 RES 7B3
R905 RES 7A3
R904 RES 7A3
R903 RES 7A3
R902 RES 7A3
R901 RES 4D3
R900 RES 45C5
R899 RES 45D6
R898 RES 45B5
R897 RES 45B5
R896 RES 45C5
R895 RES 4D2
R894 RES 9C7
R893 RES 9C7
R892 RES 9D7
R891 RES 4D6
R890 RES 9D7
R889 RES 6C5
R888 RES 49D5
R887 RES 6C5
R886 RES 9C6
R885 RES 9D6
R884 RES 49C5
R883 RES 49B6
R882 RES 7B5
R881 RES 23D2
R880 RES 49C3
R879 RES 6C5
R878 RES 6C5
R877 RES 6C4
R876 RES 9D7
R875 RES 6C4
R874 RES 6C4
R873 RES 49C5
R872 RES 49C3
R871 RES 49C3
R870 RES 9C5
R869 RES 9D5
R868 RES 9D7
R867 RES 6C4
R866 RES 6C4
R865 RES 9D6
R864 RES 9D7
R863 RES 9D6
R862 RES 9B7
R861 RES 9A7
R860 RES 7B5
R859 RES 7C5
R858 RES 7C5
R857 RES 7B5
R856 RES 7C5
R855 RES 9D6
R854 RES 9B7
R853 RES 9B7
R852 RES 9B7
R851 RES 7B7
R850 RES 4C2
R849 RES 7B7
R848 RES 7D5
R847 RES 7B7
R846 RES 7B7
R845 RES 7B7
R844 RES 7A7
R843 RES 7A7
R842 RES 7B7
R841 RES 7C7
R840 RES 7C7
R833 RES 9B7
R832 RES 9D6
R827 RES 49B5
R825 RES 15A3
R815 RES 50B3
R811 RES 50C5
R810 RES 50A5
R809 RES 15A8
R808 RES 50C3
R807 RES 50B5
R806 RES 50C6
R805 RES 50A3
R804 RES 50B6
R803 RES 50B5
R802 RES 50B5
R801 RES 45C3
R800 RES 45C3
R799 RES 50B8
R798 RES 50A5
R797 RES 50A5
R796 RES 15A8
R795 RES 50A6
R794 RES 50C7
R793 RES 38B6
R792 RES 38B2
R791 RES 38B7
R790 RES 38B7
R789 RES 38B7
R788 RES 38A7
R787 RES 38B4
R786 RES 38A4
R785 RES 38C4
R784 RES 38C7
R783 RES 38C4
R782 RES 38C7
R781 RES 38C5
R780 RES 38C3
R779 RES 38C1
R777 RES 9A4
R776 RES 9A5
R775 RES 38C7
R774 RES 37D4
R773 RES 37D2
R772 RES 9A4
R770 RES 51D7
R769 RES 51D7
R768 RES 37D5
R767 RES 37D2
R766 RES 9A4
R765 RES 9A4
R764 RES 9B4
R763 RES 28B3
R762 RES 28B3
R761 RES 37C5
R760 RES 38C5
R759 RES 37D2
R758 RES 38C1
R757 RES 9A4
R756 RES 28D2
R755 RES 28D2
R754 RES 37D4
R753 RES 37C2
R752 RES 9A4
R751 RES 51A8
R750 RES 28B8
R749 RES 28B8
R747 RES 28B6
R746 RES 28B8
R745 RES 38C3
R744 RES 38C7
R743 RES 38C4
R742 RES 28B2
R741 RES 51A7
R740 RES 51A7
R739 RES 51C7
R738 RES 51B7
R737 RES 38C7
R736 RES 28B2
R735 RES 28C7
R734 RES 44B7
R733 RES 44B7
R732 RES 44C7
R731 RES 44B6
R730 RES 44C7
R729 RES 44C6
R728 RES 28B2
R727 RES 28C7
R726 RES 44B7
R725 RES 44B6
R724 RES 28C2
R723 RES 28B2
R722 RES 44C6
R721 RES 50C8
R720 RES 9D3
R719 RES 30D5
R718 RES 28B2
R717 RES 44C3
R716 RES 44B8
R714 RES 34B7
R713 RES 9A4
R712 RES 9A3
R711 RES 28A6
R710 RES 28A5
R709 RES 34C3
R708 RES 28C8
R707 RES 34D4
R706 RES 29C3
R705 RES 29B3
R702 RES 34C4
R701 RES 44D4
R700 RES 44D3
R699 RES 44D3
R698 RES 44A3
R697 RES 12A3
R694 RES 28B3
R693 RES 44D8
R692 RES 44A3
R691 RES 28B3
R690 RES 44D3
R689 RES 44C3
R688 RES 44C2
R687 RES 44A7
R686 RES 44A7
R685 RES 51B7
R684 RES 34C1
R683 RES 28A1
R682 RES 50D5
R680 RES 28A8
R679 RES 37A2
R678 RES 28C8
R677 RES 44C2
R676 RES 44B4
R673 RES 34B4
R672 RES 28A6
R671 RES 44C1
R670 RES 29C2
R669 RES 29C2
R668 RES 29C3
R667 RES 16D6
R666 RES 28A6
R665 RES 44C1
R664 RES 51B6
R661 RES 28C7
R660 RES 28A1
R659 RES 44C2
R658 RES 44C3
R657 RES 44C3
R656 RES 44A6
R655 RES 44B2
R654 RES 44A5
R653 RES 44B7
R651 RES 28A2
R650 RES 28A2
R649 RES 44C3
R648 RES 44B2
R647 RES 34B4
R646 RES 44C1
R645 RES 51B6
R641 RES 28D1
R640 RES 37A5
R637 RES 34B3
R636 RES 44B6
R635 RES 37D3
R630 RES 28D5
68
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
34
5
678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ZT16 HOLE_VIA 18B2
69
ZT14 HOLE_VIA 18B2
ZT15 HOLE_VIA 18B2
ZT17 HOLE_VIA 18B2
ZT18 HOLE_VIA 18B2
ZT19 HOLE_VIA 18A2
ZT20 HOLE_VIA 18G2
ZT21 HOLE_VIA 18E2
ZT22 HOLE_VIA 18F2
ZT23 HOLE_VIA 18F2
ZT24 HOLE_VIA 18F2
ZT25 HOLE_VIA 18F2
ZT26 HOLE_VIA 18F2
ZT27 HOLE_VIA 18E2
ZT28 HOLE_VIA 18D2
ZT29 HOLE_VIA 18G2
ZT30 HOLE_VIA 18F2
ZT31 HOLE_VIA 18F2
ZT32 HOLE_VIA 18E2
ZT33 HOLE_VIA 18E2
ZT34 HOLE_VIA 18F2
ZT35 HOLE_VIA 18E2
ZT36 HOLE_VIA 18E2
ZT37 HOLE_VIA 18F2
ZT38 HOLE_VIA 18E2
ZT39 HOLE_VIA 3B3
ZT40 HOLE_VIA 3B3
ZT41 HOLE_VIA 3B3
ZT42 HOLE_VIA 3B3
ZT43 HOLE_VIA 3A3
ZT44 HOLE_VIA 3A3
ZT45 HOLE_VIA 3A3
ZT46 HOLE_VIA 3B3
ZT47 HOLE_VIA 3B3
ZT48 HOLE_VIA 3B3
ZT49 HOLE_VIA 3B3
ZT50 HOLE_VIA 3A3
ZT51 HOLE_VIA 3A3
ZT52 HOLE_VIA 3A3
ZT53 HOLE_VIA 3B2
ZT54 HOLE_VIA 3B2
ZT55 HOLE_VIA 3B2
ZT56 HOLE_VIA 3B2
ZT57 HOLE_VIA 3A2
ZT58 HOLE_VIA 3A2
ZT59 HOLE_VIA 3B2
ZT60 HOLE_VIA 3B2
ZT61 HOLE_VIA 3B2
ZT62 HOLE_VIA 3B2
ZT63 HOLE_VIA 3A2
ZT64 HOLE_VIA 3B1
ZT65 HOLE_VIA 3B1
ZT66 HOLE_VIA 3B1
ZT67 HOLE_VIA 3B1
ZT68 HOLE_VIA 3A1
051-6497
69 69
13
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