Anritsu PAM4 PPG MU196020A, PAM4 ED MU196040B Product Introduction

Product Introduction
58 G/64 Gbaud Multichannel PAM4 BERT
PAM4 PPG MU196020A PAM4 ED MU196040B
Signal Quality Analyzer-R MP1900A Series
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High-quality data output waveforms up to 64 Gbaud and high input sensitivity performance provide strong support for testing PAM4 device designs
All-in-one Jitter Addition, Clock Recovery, Emphasis, NRZ/PAM3/PAM4 Pattern Editing, SER, FEC functions, etc.
Easily configured, high-reproducibility PAM4 measurement solution
MP1900A PAM4 Target Applications
200/400/800 GbE, CEI-56G/112G, InfiniBand HDR, 64G Fibre Channel
Outline of MP1900A Series PAM4 BERT
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MP1900A PAM4 BERT Features
All-in-one, high-reproducibility, easily configured test solutionHigh-quality waveforms for more accurate measurementEasy, low-cost, future-proof expandability supporting high bit rates and multichannels
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PAM4 All-in-One BERT Solution
DUT
PAM4 PPG MU196020A
PAM4 ED MU196040B
Easy-to-use and configure all-in-one solution with high reproducibility, helping cut test times
No External Equipment, Compact Module with Built-in PAM4 Functions
High-Quality 64G PAM4 Waveforms with Variable Emphasis/Linearity Functions
SER/BER/FEC, Capture,
Logging functions
ED w/ Built-in Clock
Recovery and Equalizer
Typ. 36 mV at 53.125 G
High Input Sensitivity
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High-Quality Waveform PAM4 PPG MU196020A
64.2 Gbaud 53.125 Gbaud 26.5625 Gbaud
Differential 1.4 Vp-p, PRBS13Q pattern, J1789A 40-cm cable + 70 GHz Scope
Best-in-class waveform quality with low Intrinsic Jitter (typ. 170 fs (rms) and fast Tr/Tf (typ. 8.5 ps) for more accurate evaluation of actual DUT performance
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116 Gbit/s PAM4 Best Level High-Sensitivity Input Performance
High sensitivity input of 36 mV (typical at 53.125 Gbaud) simplifies
previously difficult PAM4 error troubleshooting measurements.
PAM4 PPG
MU196020A
PAM4 ED
MU196040B
Error-Free at 53.125 Gbaud
Best level PAM4 sensitivity
Typ. 36 mV EH/ Eye
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Multichannel Support and Expandability (1/2)
One MP1900A PPG supports up to 4ch for 400 GbE (53 Gbaud x 4 Lanes), and faster evaluations, helping cut future support upgrade costs.
4-Lane DUT (Driver + E/O) Measurement Example
2ch Combination (NRZ)
a1 a2 a3 a4 a5
b1 b2 b3 b4 b5
Ch1
Ch2
Supports shift to “a1b1 a2b2 . . .” pattern
a1 a2 a3 a4 a5
Ch1
Ch2
One MP1900A unit supports synchronous output for up to 4ch; two units support up to 8ch.
*Future support for 8ch
a1 a2 a3 a4 a5
Channel Synchronization
Ch3
a1 a2 a3 a4 a5
Ch4
a1 a2 a3 a4 a5
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Multichannel Support and Expandability (2/2)
Expanded support for 800G using 8ch synchronization function (4ch x 53.125 Gbaud PAM4 x two MP1900A units) Supports QSFP-DD transceiver FEC evaluation using 8-lane FEC Pattern Generation function
400G QSFP-DD, OSFP
Optical Transceiver
or 800G Next Generation Transceiver
Synchronized 8-lane FEC Pattern
Unit Sync. Control
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Supports PAM4 Jitter Tolerance test using just one unit. A measurement system to help cut measurement time is configured easily by combining the Jitter/Noise
Addition function, built-in Clock Recovery function, and Jitter Tolerance
MX183000A-PL001 software.
Jitter Tolerance Measurement Function
Sine-Wave Jitter (SJ) Random Jitter (RJ) CM/DM Noise White Noise
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Uncorrectable Codeword and FEC Symbol Errors can be measured and displayed on one screen in real-time simultaneously with bit error measurements. Measurement of jitter tolerance and FEC Symbol Error per codeword distribution based on correctable/uncorrectable FEC is supported (MU196040B-042).
Both bit error and FEC Symbol Errors are measured at high speed.
PAM4 Test Signal
with Jitter
MP1900A PAM4 BERT
FEC based Jitter Tolerance test (MX183000A-PL001)
FEC Symbol Error Distribution
Real-time FEC Symbol Error Measurement
Real-time FEC Symbol Error and FEC Standard Jitter Tolerance
Measurement Functions
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When the DUT has a built-in bit error counter, combination with the MP1900A PPG makes it easy to configure a highly cost-effective Jitter Tolerance measurement environment.
Jitter Tolerance Measurement using DUT BER Counter
(MX183000A-PL001 Jitter tolerance software) (MX183000A-PL031 DUT Error Counts Import)
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FEC can be evaluated by combining FEC pattern generation with error insertion, and reading the DUT bit error count.
Multilane FEC Evaluation
Evaluate Jitter Tolerance, etc., using captured error count
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PAM4 PPG/ED Specifications
PAM4 PPG MU196020A
PAM4 ED MU196040B
Baud-rate: 2.4 Gbaud to 32.1/58.2/64.2 Gbaud
Output amplitude: 0.14 Vp-p to 1.6 Vp-p (Differential)
Emphasis: 4Tap, ±20 dB (1 post/2 pre-cursor), ISI/Channel Emulator
Intrinsic jitter(rms): 170 fs (typ., NRZ)
Tr/Tf (20-80%): 8.5 ps (typ., NRZ)
Multichannel synchronization
FEC pattern generation
Baud-rate: 2.4 Gbaud to 32.1/58.2 Gbaud PAM4 and 64.2 Gbaud NRZ
Input amplitude (max.): 1.0 Vp-p (NRZ, PAM4)
Input sensitivity(Eye Height) : 23 mV (typ., 26.5625 Gbaud), 36 mV (typ., 53.125 Gbaud)
Built-in Clock Recovery: 2.4 G to 29 Gbaud or 32.1 Gbaud/ 51 G to 58.2 Gbaud extension
Analog bandwidth: >40 GHz (nominal)
Built-in Equalizer: Low Frequency Equalizer(2 dB)+DFE(1.4 dB)
SER measurement, logic error analysis using Diagnostics Mode, Capture , Logging function
Real-time FEC Symbol Error measurement, FEC based Jitter Tolerance Test function
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P A M 4 P P G F u n c t i o n s a n d
P e r f o r m a n c e
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